//***************************************************************************** // (C) Automotive Lighting Reutlingen GmbH // Tuebinger Strasse 123, 72762 Reutlingen, Germany // // Automotive Lighting Reutlingen GmbH owns all the rights to this work. // This work shall not be copied, reproduced, used, modified, transferred // or its information shall not be disclosed without the prior written // authorization of Automotive Lighting Reutlingen GmbH. //***************************************************************************** //----------------------------------------------------------------------------- /// \file CddNcv78702_Com.c /// /// \brief /// /// \author OTT, Peter ALDE-RT/EES6 //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Includes //----------------------------------------------------------------------------- // standard includes #include #include // module API (include path) #include #include #include // module includes (relative to API) #include <../Cfg/CddNcv78702_Cfg.h> #include <../Cfg/CddNcv78702_RoutCfg.h> #include <../Gen/CddNcv78702_Types.h> #include <../Gen/CddNcv78702_Com.h> #include <../Gen/CddNcv78702_Sched.h> //----------------------------------------------------------------------------- // Defines and Typedef //----------------------------------------------------------------------------- #define CDDNCV78702_InitZeroReg {.unRaw=0x0000u} #define CDDNCV78702_Reg0x01_Init {.Bit={ .biBOOST_SKCL=CDDNCV78702_Cfg_BOOST_SKCL, \ .biBOOST_OTA_GAIN=CDDNCV78702_Cfg_BOOST_OTA_GAIN, \ .biVDRIVE_VSETPOINT=CDDNCV78702_Cfg_VDRIVE_VSETPOINT, \ .biVBOOST_VGATE_THR=CDDNCV78702_Cfg_VBOOST_VGATE_THR, \ .biBOOST_DIV3_DIV2=CDDNCV78702_BOOST_DIV3_DIV2_reserved, \ .biUNUSED=0u}} #define CDDNCV78702_Reg0x02_Init {.Bit={.biBOOST_VLIMTH1=CDDNCV78702_Cfg_BOOST_VLIMTH1, .biBOOST_VLIMTH2=CDDNCV78702_Cfg_BOOST_VLIMTH2, .biBOOST_VLIMTH3=CDDNCV78702_BOOST_VLIMTH3_reserved, .biBOOST_SLPCTRL=CDDNCV78702_Cfg_BOOST_SLPCTLR, .biZero=0u, .biUNUSED=0u}} #define CDDNCV78702_Reg0x03_Init {.Bit={ .biBOOST_OVERVOLTSD_THR=CDDNCV78702_Cfg_BOOST_OVERVOLTSD_THR, \ .biBOOST_SRCINV=CDDNCV78702_Cfg_BOOST_SRCINV, \ .biBOOST_MULTI_PHASE_MD=CDDNCV78702_Cfg_BOOST_MULTI_PHASE_MD, \ .biUNUSED=0u}} #define CDDNCV78702_Reg0x04_Init {.Bit={ .biBOOST_VSETPOINT=CDDNCV78702_BOOST_VSETPOINT_Init, \ .biFSO_BST_FREQ=CDDNCV78702_Cfg_FSO_BST_FREQ, \ .biUNUSED=0u}} #define CDDNCV78702_Reg0x05_Init {.Bit={ .biBOOST1_EN=CDDNCV78702_BOOSTx_EN_Disable, \ .biBOOST2_EN=CDDNCV78702_BOOSTx_EN_Disable, \ .biBOOST3_EN=CDDNCV78702_BOOST3_EN_reserved, \ .biFSO_MD=CDDNCV78702_Cfg_FSO_MD, \ .biADC_TEMP_THR=CDDNCV78702_Cfg_ADC_TEMP_THR, \ .biTSD_AUT_RCVR_EN=CDDNCV78702_Cfg_TSD_AUT_RCVR_EN, \ .biUNUSED=0u}} #define CDDNCV78702_Reg0x06_Init {.Bit={ .biVDD_ENA=CDDNCV78702_Cfg_VDD_ENA, \ .biFSO_ENABLE_SEL=CDDNCV78702_Cfg_FSO_ENABLE_SEL, \ .biVBOOST_TOFF_SET=CDDNCV78702_Cfg_VBOOST_TOFF_SET, \ .biVBOOST_TON_SET=CDDNCV78702_Cfg_VBOOST_TON_SET, \ .biBOOST_OV_REACT=CDDNCV78702_Cfg_BOOST_OV_REACT, \ .biUNUSED=0u}} #define CDDNCV78702_Reg0x07_Init {.Bit={.biP_DISTRIBUTION1=CDDNCV78702_Cfg_P_DISTRIBUTION1, .biP_DISTRIBUTION2=CDDNCV78702_Cfg_P_DISTRIBUTION2, .biUNUSED=0u}} #define CDDNCV78702_Reg0x08_Init {.Bit={.biP_DISTRIBUTION3=CDDNCV78702_P_DISTRIBUTION3_Reserved, .biVDRIVE_UV_THR=CDDNCV78702_Cfg_VDRIVE_UV_THR, .biZero=0u, .biUNUSED=0u}} #define CDDNCV78702_DataMirror_Init \ { \ { /* CtrlTx */ \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_Reg0x01_Init, \ CDDNCV78702_Reg0x02_Init, \ CDDNCV78702_Reg0x03_Init, \ CDDNCV78702_Reg0x04_Init, \ CDDNCV78702_Reg0x05_Init, \ CDDNCV78702_Reg0x06_Init, \ CDDNCV78702_Reg0x07_Init, \ CDDNCV78702_Reg0x08_Init, \ CDDNCV78702_InitZeroReg \ }, \ { /* CtrlRx */ \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg \ \ }, \ { /* StatRx */ \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg, \ CDDNCV78702_InitZeroReg \ } \ } #define CDDNCV78702_Reg0x00_Tx &CddNcv78702_DataMirror.CtrlTx.Reg0x00.unRaw #define CDDNCV78702_Reg0x01_Tx &CddNcv78702_DataMirror.CtrlTx.Reg0x01.unRaw #define CDDNCV78702_Reg0x02_Tx &CddNcv78702_DataMirror.CtrlTx.Reg0x02.unRaw #define CDDNCV78702_Reg0x03_Tx &CddNcv78702_DataMirror.CtrlTx.Reg0x03.unRaw #define CDDNCV78702_Reg0x04_Tx &CddNcv78702_DataMirror.CtrlTx.Reg0x04.unRaw #define CDDNCV78702_Reg0x05_Tx &CddNcv78702_DataMirror.CtrlTx.Reg0x05.unRaw #define CDDNCV78702_Reg0x06_Tx &CddNcv78702_DataMirror.CtrlTx.Reg0x06.unRaw #define CDDNCV78702_Reg0x07_Tx &CddNcv78702_DataMirror.CtrlTx.Reg0x07.unRaw #define CDDNCV78702_Reg0x08_Tx &CddNcv78702_DataMirror.CtrlTx.Reg0x08.unRaw #define CDDNCV78702_Reg0x01_Rx &CddNcv78702_DataMirror.CtrlRx.Reg0x01.unRaw #define CDDNCV78702_Reg0x02_Rx &CddNcv78702_DataMirror.CtrlRx.Reg0x02.unRaw #define CDDNCV78702_Reg0x03_Rx &CddNcv78702_DataMirror.CtrlRx.Reg0x03.unRaw #define CDDNCV78702_Reg0x04_Rx &CddNcv78702_DataMirror.CtrlRx.Reg0x04.unRaw #define CDDNCV78702_Reg0x05_Rx &CddNcv78702_DataMirror.CtrlRx.Reg0x05.unRaw #define CDDNCV78702_Reg0x06_Rx &CddNcv78702_DataMirror.CtrlRx.Reg0x06.unRaw #define CDDNCV78702_Reg0x07_Rx &CddNcv78702_DataMirror.CtrlRx.Reg0x07.unRaw #define CDDNCV78702_Reg0x08_Rx &CddNcv78702_DataMirror.CtrlRx.Reg0x08.unRaw #define CDDNCV78702_Reg0x0A_Rx &CddNcv78702_DataMirror.StatRx.Reg0x0A.unRaw #define CDDNCV78702_Reg0x0B_Rx &CddNcv78702_DataMirror.StatRx.Reg0x0B.unRaw #define CDDNCV78702_Reg0x0D_Rx &CddNcv78702_DataMirror.StatRx.Reg0x0D.unRaw #define CDDNCV78702_Zero_Tx &CddNcv78702_aunZero #define CDDNCV78702_Dummy_Rx &CddNcv78702_aunDummy #define CDDNCV78702_BSTSYNC_DUTY_50 0x4000u // SPI schedule table entry datatype typedef struct tCddNcv78702_SpiSchedTable { uint8 ucNextEntry; // index of next schedule table entry uint8 ucAction; // index of action function done after Rx --> TODO change as function pointer ? uint16 unCmd; // Read/Write Command to send uint16 unAddr; // SPI address (combination of low and high nibble) const uint16* punTx; // SPI control register data for transmission - offset related to 1st address of stuct uint16* punRx; // SPI status register data for reception - offset related to 1st address of stuct } tCddNcv78702_SpiSchedTable; //----------------------------------------------------------------------------- // Start definitions of initialized 16 bit variables //----------------------------------------------------------------------------- #define ctadCddBoost_START_SEC_VAR_INIT_16 #include <../Cfg/CddNcv78702_MemMap.h> STATIC_AL uint16 CddNcv78702_unSchedIx_Rx = 0u; // pointer to schedule table for receiving frames STATIC_AL uint16 CddNcv78702_unSchedIx_Tx = 0u; // pointer to schedule table for sending frames STATIC_AL uint16 CddNcv78702_aunDummy = 0u; // for dummy recieve Spi Frames #define ctadCddBoost_STOP_SEC_VAR_INIT_16 #include <../Cfg/CddNcv78702_MemMap.h> //----------------------------------------------------------------------------- // End definitions of initialized 16 bit variables //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Start definitions of initialized structures and unions or arrays variables //----------------------------------------------------------------------------- #define ctadCddBoost_START_SEC_VAR_INIT_UNSPECIFIED #include <../Cfg/CddNcv78702_MemMap.h> STATIC_AL tCddNcv78702_DataMirror CddNcv78702_DataMirror = CDDNCV78702_DataMirror_Init; #define ctadCddBoost_STOP_SEC_VAR_INIT_UNSPECIFIED #include <../Cfg/CddNcv78702_MemMap.h> //----------------------------------------------------------------------------- // End definitions of initialized structures and unions or arrays variables //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Start definitions of 16 bit const //----------------------------------------------------------------------------- /* #define ctadCddBoost_START_SEC_CONST_ROM_16BIT */ #define ctadCddBoost_START_SEC_CONST_16 //for UAP BSW #include <../Cfg/CddNcv78702_MemMap.h> STATIC_AL CONST_AL uint16 CddNcv78702_aunZero = 0; /*#define ctadCddBoost_STOP_SEC_CONST_ROM_16BIT*/ #define ctadCddBoost_STOP_SEC_CONST_16 //for UAP BSW #include <../Cfg/CddNcv78702_MemMap.h> //----------------------------------------------------------------------------- // End definitions of 16 bit const //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Start definitions of const structures and unions or arrays variables //----------------------------------------------------------------------------- /*#define ctadCddBoost_START_SEC_CONST_ROM_UNSPECIFIED*/ #define ctadCddBoost_START_SEC_CONST_UNSPECIFIED //for UAP BSW #include <../Cfg/CddNcv78702_MemMap.h> STATIC_AL CONST_AL tCddNcv78702_SpiSchedTable aCddNcv78702_SpiSchedTable[CDDNCV78702_Cfg_SpiSchedTableLen] = CDDNCV78702_Cfg_SpiSchedTable_Init; /*#define ctadCddBoost_STOP_SEC_CONST_ROM_UNSPECIFIED*/ #define ctadCddBoost_STOP_SEC_CONST_UNSPECIFIED //for UAP BSW #include <../Cfg/CddNcv78702_MemMap.h> //----------------------------------------------------------------------------- // End definitions of const structures and unions or arrays variables //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Start declaration or definitions of functions //----------------------------------------------------------------------------- #define ctadCddBoost_START_SEC_CODE #include <../Cfg/CddNcv78702_MemMap.h> //----------------------------------------------------------------------------- // Function prototypes //----------------------------------------------------------------------------- STATIC_AL uint16 CddNcv78702_CalculateAndAddOddParityBit(const uint16 unCmd, const uint16 unAddr, const uint16 unData); STATIC_AL boolean CddNcv78702_StAction(const uint8 ucAction); //----------------------------------------------------------------------------- // Function definitions //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- /// \brief Set the Booster Voltage Setpoint /// /// \descr Set the Booster voltage setpoint sent via SPI. /// /// \param ucBoostVsetpoint /// /// \return void //----------------------------------------------------------------------------- void CddNcv78702_SetBoostVsetpoint(const uint8 ucBoostVsetpoint) { CddNcv78702_DataMirror.CtrlTx.Reg0x04.Bit.biBOOST_VSETPOINT = ucBoostVsetpoint; } //----------------------------------------------------------------------------- /// \brief Calculate odd parity bit based on 15 bits (Cmd, Addr, Data) and /// add it to bit position 8 /// /// \descr Concatenate Command bit, Address register and Data /// Calculate parity bit based on Cmd, Addr and data /// Add parity bit in order to have an odd parity on SPI Tx frame /// /// \param unCmd : Read or Write command bit shifted at the bit15 /// \param unAddr : Register address shifted at the bit position 9 /// \param unData : Data shifted at the bit position 0 /// /// \return uint16 : complete SPI command frame (Cmd, Addr, Parity Bit, Data) //----------------------------------------------------------------------------- STATIC_AL uint16 CddNcv78702_CalculateAndAddOddParityBit(const uint16 unCmd, const uint16 unAddr, const uint16 unData) { uint16 unSPITxFrame = 0x0000u; //Initialize polarity bit with '0' uint8 ucNbOfBits = 0x00u; uint16 ucCmdAddrData = (unCmd | unAddr | unData); // Concat Command bit, Address register and Data unSPITxFrame = ucCmdAddrData; // Save concatenation of SPI Tx frame without parity bit (parity bit should be 0) for (uint8 i = 0u; i < CDDNCV78702_NbOfBit_SPIFrame; i++) { // Check if LSB bit is '1' if ((ucCmdAddrData & 0x01u) == 1u) { ucNbOfBits++; } else { // Do nothing } // Shift Data to 1bit right ucCmdAddrData = ucCmdAddrData >> 1u; } // If an even number of bits '1' has been counted if (ucNbOfBits % 2u == 0u) { if (unCmd != CDDNCV78702_ReadCmd) { // Set parity bit to 1 in order to have an odd parity in SPI frame unSPITxFrame = unSPITxFrame | CDDNCV78702_ParityBitWriteFrame; } else { // Set parity bit to 1 in order to have an odd parity in SPI frame unSPITxFrame = unSPITxFrame | CDDNCV78702_ParityBitReadFrame; } } else { // Do nothing. Parity bit already intialized with '0' } return unSPITxFrame; } //----------------------------------------------------------------------------- /// \brief Action executed synchronously with schedule Table /// /// \descr /// /// \param ucAction /// /// \return boolean //----------------------------------------------------------------------------- STATIC_AL boolean CddNcv78702_StAction(const uint8 ucAction) { boolean boRestart = FALSE; switch (ucAction) { case CDDNCV78702_ST_ACT_DIS_BOOST: CddNcv78702_SetBoostEnableGpio(FALSE); break; case CDDNCV78702_ST_ACT_BSTSYNC_50: //Enable booster bits //TODO CddLed check EFT param to set enable booster bits if (CDDNCV78702_ECUVARCFG_ucBoostCfg(0) == CDDNCV78702_EFT_BoosterDual) { CddNcv78702_DataMirror.CtrlTx.Reg0x05.Bit.biBOOST1_EN = 1u; CddNcv78702_DataMirror.CtrlTx.Reg0x05.Bit.biBOOST2_EN = 1u; } else if (CDDNCV78702_ECUVARCFG_ucBoostCfg(0) == CDDNCV78702_EFT_BoosterSingle) { CddNcv78702_DataMirror.CtrlTx.Reg0x05.Bit.biBOOST1_EN = 1u; } else { //Do nothing. Enable bits pre init with 0 } CddNcv78702_SetBoostBstSyncDuty(CDDNCV78702_BSTSYNC_DUTY_50); break; case CDDNCV78702_ST_ACT_EN_BOOST: CddNcv78702_SetBoostEnableGpio(TRUE); break; // case CDDNCV78702_ST_CHECK_START: //Check EFT parameters valid // if (CddNcv78702_Com_pEftData == NULL_PTR) // { // boRestart = TRUE; // Loop in SPI schedule table index 0..2 // } // break; default: //Do nothing break; } return boRestart; } //----------------------------------------------------------------------------- /// \brief Called after reception of a SPI frame /// /// \descr The function reads the content of SPI Rx data provided by SPI and /// store data in CddNcv78702_DataMirror. /// /// \param unIx /// \param ulData : SPI Rx data (only 16 LSB valid) /// /// \return void //----------------------------------------------------------------------------- void CddNcv78702_SpiRx(const uint16 unIx, const uint32 ulData) { boolean boSchTableRestart = FALSE; // calculate pointer to actual schedule table entry const tCddNcv78702_SpiSchedTable* pTabEntry = &aCddNcv78702_SpiSchedTable[CddNcv78702_unSchedIx_Rx]; pTabEntry->punRx[unIx] = (uint16) ulData; // store RX data (only 16 LSB are relevant) // set index to next schedule table entry CddNcv78702_unSchedIx_Rx = pTabEntry->ucNextEntry; CddNcv78702_unSchedIx_Tx = pTabEntry->ucNextEntry; // make copy to ensure synchronism of RX and TX // calculate pointer to actual schedule table entry (read next TX entry to check action) pTabEntry = &aCddNcv78702_SpiSchedTable[CddNcv78702_unSchedIx_Tx]; if (pTabEntry->ucAction != CDDNCV78702_ST_NO_ACT) { boSchTableRestart = CddNcv78702_StAction(pTabEntry->ucAction); if (boSchTableRestart != FALSE) { CddNcv78702_unSchedIx_Rx = 0u; CddNcv78702_unSchedIx_Tx = 0u; } } } //----------------------------------------------------------------------------- /// \brief Called before transmission of SPI telegram /// /// \descr The function reads the content of CddNcv78702_DataMirror /// and adds the odd parity bit. /// /// \param unIx /// /// \return uint32 : Tx data (16 LSB are valid) //----------------------------------------------------------------------------- uint32 CddNcv78702_SpiTx(const uint16 unIx) { // calculate pointer to actual schedule table entry const tCddNcv78702_SpiSchedTable* pSchedEntry = &aCddNcv78702_SpiSchedTable[CddNcv78702_unSchedIx_Tx]; (void)unIx; // switch to next schedule table entry for next transmission CddNcv78702_unSchedIx_Tx = pSchedEntry->ucNextEntry; // get SPI command (read or write), register address and contents of control register for next SPI frame // update parity bit according to control register data return (uint32) CddNcv78702_CalculateAndAddOddParityBit(pSchedEntry->unCmd, pSchedEntry->unAddr, *(pSchedEntry->punTx)); } //----------------------------------------------------------------------------- /// \brief Called before SBC sleep /// /// \descr The function disables the booster /// /// \param void /// /// \return void //----------------------------------------------------------------------------- void CddNcv78702_SetBoostSleep(void) { uint16 unCmdAddrData = CddNcv78702_CalculateAndAddOddParityBit(CDDNCV78702_WriteCmd, CDDNCV78702_WriteReg0x06Addr, 0u); (void)CDDNCV78702_TransferMsg((uint8)CDDSPI_DEVICE(BOOST), &unCmdAddrData); } #define ctadCddBoost_STOP_SEC_CODE #include <../Cfg/CddNcv78702_MemMap.h> //----------------------------------------------------------------------------- // End declaration or definitions of functions //-----------------------------------------------------------------------------