/***************************************************************************//** * \file Cdd_bd18397.c * * \version 1.0 * ******************************************************************************** * \copyright * Copyright 2023-2040, Cypress Semiconductor Corporation. All rights reserved. * You may use this file only in accordance with the license, terms, conditions, * disclaimers, and limitations in the end user license agreement accompanying * the software package with which this file was provided. *******************************************************************************/ #include "Cdd_bd18397.h" #include "Cdd_bd18397.h" #include "Port.h" #include "Dio.h" #include "Spi.h" //----------------------------------------------------------------------------- /// \brief set current on LED channel /// /// \param ulChnIdx /// \param unCurrent /// /// \return void //----------------------------------------------------------------------------- static tCdd_BD18397RUV_Registor_Configure BD18397RUV_Registor_cfg[CDDBD18397RUV_REGISTOR_MAX_NUMBER] = { { ID_SYSTEM_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_SYSTEM_REGISTER, { 0,0,0,0 } }, { ID_ERRSET1_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_ERRSET1_REGISTER, { 0,0,0,0 } }, { ID_DIMSET_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_DIMSET_REGISTER, { 0,0,0,0 } }, { ID_ISET1H_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_ISET1H_REGISTER, { 0xe1,0xe1,0xe1,0xe1}}, { ID_ISET1L_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_ISET1L_REGISTER, { 0x01,0x01,0x01,0x01}}, { ID_ISET2H_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_ISET2H_REGISTER, { 0xe1,0xe1,0xe1,0xe1}}, { ID_ISET2L_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_ISET2L_REGISTER, { 0x01,0x01,0x01,0x01}}, { ID_DPWM1H_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_DPWM1H_REGISTER, { 0xff,0xff,0xff,0xff}}, { ID_DPWM1L_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_DPWM1L_REGISTER, { 0x03,0x03,0x03,0x03}}, { ID_DPWM2H_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_DPWM2H_REGISTER, { 0xff,0xff,0xff,0xff}}, { ID_DPWM2L_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_DPWM2L_REGISTER, { 0x03,0x03,0x03,0x03}}, { ID_DCDCSET1_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_DCDCSET1_REGISTER, { 0x07,0x07,0x07,0x07}}, { ID_DCDCSET2_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_DCDCSET2_REGISTER, { 0x07,0x07,0x07,0x07}}, { ID_DCDCSET4_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_DCDCSET4_REGISTER, { 0x00,0x00,0x00,0x00 } }, { ID_CHEN_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_CHEN_REGISTER, { 0x33,0x33,0x33,0x33}}, { ID_ADSEL_REGISTER, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_ADSEL_REGISTER, { 0x10,0x10,0x10,0x10}}, //{ 15, CDDBD18397RUV_WRITE_MODE, CDDBD18397RUV_ADSEL_REGISTER, { 0x15,0x15,0x15,0x15}}, // --the followings is Read-Only-Register this status register can not to write { ID_VMONH_REGISTER, CDDBD18397RUV_READ_MODE, CDDBD18397RUV_VMONH_REGISTER, { 0,0,0,0 }}, { ID_VMONL_REGISTER, CDDBD18397RUV_READ_MODE, CDDBD18397RUV_VMONL_REGISTER, { 0,0,0,0 }}, { ID_ERRSTALL_REGISTER, CDDBD18397RUV_READ_MODE, CDDBD18397RUV_ERRSTALL_REGISTER, { 0x80,0x80,0x80,0x80}}, { ID_ERRST1_REGISTER, CDDBD18397RUV_READ_MODE, CDDBD18397RUV_ERRST1_REGISTER, { 0,0,0,0 }}, { ID_ERRST2_REGISTER, CDDBD18397RUV_READ_MODE, CDDBD18397RUV_ERRST2_REGISTER, { 0,0,0,0 }}, }; static Spi_DataBufferType Ex_Spi_MasterRxDataBuffer[CDDBD18397RUV_SPI_DATA_LENGTH]; static tCddBD18397RUV_M_Bit_SYSCFG1 bd18397_mult_device_SYSCFG1[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_ERRSET1 bd18397_mult_device_ERRSET1[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_DIMSET bd18397_mult_device_DIMSET[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_ISET1H bd18397_mult_device_ISET1H[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_ISET1L bd18397_mult_device_ISET1L[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_ISET2H bd18397_mult_device_ISET2H[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_ISET2L bd18397_mult_device_ISET2L[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_DPWM1H bd18397_mult_device_DPWM1H[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_DPWM1L bd18397_mult_device_DPWM1L[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_DPWM2H bd18397_mult_device_DPWM2H[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_DPWM2L bd18397_mult_device_DPWM2L[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_DCDCSET1 bd18397_mult_device_DCDCSET1[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_DCDCSET2 bd18397_mult_device_DCDCSET2[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_DCDCSET4 bd18397_mult_device_DCDCSET4[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_CHEN bd18397_mult_device_CHEN[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_ADSEL bd18397_mult_device_ADSEL[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_VMONH bd18397_mult_device_VMONH[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_VMONL bd18397_mult_device_VMONL[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_ERRSTALL bd18397_mult_device_ERRSTALL[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_ERRST1 bd18397_mult_device_ERRST1[CDDBD18397RUV_Cfg_NbOfDevices]; static tCddBD18397RUV_M_Bit_ERRST2 bd18397_mult_device_ERRST2[CDDBD18397RUV_Cfg_NbOfDevices]; void Cdd_bd18397_SPI_PWM_Dimming (const uint32 ulChnIdx, const uint16 value); static Std_ReturnType BD18397_RUV_SPI_Drv_Access(uint8 *Data, uint8 *RcData, uint8 len, uint8 Cs) { /* Connect SPI0 with SPI2. SPI0: master, sync transmission SPI2: slave, async transmission */ Std_ReturnType ret = 0; Spi_SetAsyncMode(SPI_INTERRUPT_MODE); Spi_SetupEB(Cs, Data, RcData, len); Dio_WriteChannel(DioConf_DioChannel_PTB17,STD_LOW); //modify for changed by hardware //SPI1_PCS0 Spi_AsyncTransmit(Cs); return ret; } void BD18397_RUV_get_registor_data(uint8 index) { uint8 i; for(i=0;i>1)&0x03; bd18397_mult_device_SYSCFG1[i].biSLEEP =(Ex_Spi_MasterRxDataBuffer[4*i+1]>>4)&0x01; bd18397_mult_device_SYSCFG1[i].biRDMODE =(Ex_Spi_MasterRxDataBuffer[4*i+1]>>5)&0x01; bd18397_mult_device_SYSCFG1[i].biWDTEN =(Ex_Spi_MasterRxDataBuffer[4*i+1]>>6)&0x01; bd18397_mult_device_SYSCFG1[i].biWLOCK =(Ex_Spi_MasterRxDataBuffer[4*i+1]>>7)&0x01; } else if(ID_ERRSET1_REGISTER==index) { bd18397_mult_device_ERRSET1[i].biSWOCPLAT =Ex_Spi_MasterRxDataBuffer[4*i+1]&0x01; bd18397_mult_device_ERRSET1[i].biLEDOCPLAT=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>1)&0x01; bd18397_mult_device_ERRSET1[i].biFLTRST =(Ex_Spi_MasterRxDataBuffer[4*i+1]>>2)&0x01; bd18397_mult_device_ERRSET1[i].biRESERVED =(Ex_Spi_MasterRxDataBuffer[4*i+1]>>3)&0x1f; } else if(ID_DIMSET_REGISTER==index) { bd18397_mult_device_DIMSET[i].biISETDIM1=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x01; bd18397_mult_device_DIMSET[i].biISETDIM2=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>1)&0x01; bd18397_mult_device_DIMSET[i].biISETDIM3=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>2)&0x01; bd18397_mult_device_DIMSET[i].biPWMDIV =(Ex_Spi_MasterRxDataBuffer[4*i+1]>>3)&0x0f; //01111000 bd18397_mult_device_DIMSET[i].biPHEN =(Ex_Spi_MasterRxDataBuffer[4*i+1]>>7)&0x01; } else if(ID_ISET1H_REGISTER==index) { bd18397_mult_device_ISET1H[i].biISET1H=Ex_Spi_MasterRxDataBuffer[4*i+1]&0xff; } else if(ID_ISET1L_REGISTER==index) { bd18397_mult_device_ISET1L[i].biISET1L=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x03; } else if(ID_ISET2H_REGISTER==index) { bd18397_mult_device_ISET2H[i].biISET2H=Ex_Spi_MasterRxDataBuffer[4*i+1]&0xff; } else if(ID_ISET2L_REGISTER==index) { bd18397_mult_device_ISET2L[i].biISET2L=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x03; } else if(ID_DPWM1H_REGISTER==index) { bd18397_mult_device_DPWM1H[i].biDPWM1H=Ex_Spi_MasterRxDataBuffer[4*i+1]&0xff; } else if(ID_DPWM1L_REGISTER==index) { bd18397_mult_device_DPWM1L[i].biDPWM1L=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x03; } else if(ID_DPWM2H_REGISTER==index) { bd18397_mult_device_DPWM2H[i].biDPWM2H=Ex_Spi_MasterRxDataBuffer[4*i+1]&0xff; } else if(ID_DPWM2L_REGISTER==index) { bd18397_mult_device_DPWM2L[i].biDPWM2L=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x03; } else if(ID_DCDCSET1_REGISTER==index) { bd18397_mult_device_DCDCSET1[i].biTON1 = Ex_Spi_MasterRxDataBuffer[4*i+1]&0x3f; bd18397_mult_device_DCDCSET1[i].biGM1 =(Ex_Spi_MasterRxDataBuffer[4*i+1]>>6)&0x03; } else if(ID_DCDCSET2_REGISTER==index) { bd18397_mult_device_DCDCSET2[i].biTON2 =Ex_Spi_MasterRxDataBuffer[4*i+1]&0x3f; bd18397_mult_device_DCDCSET2[i].biGM2 =(Ex_Spi_MasterRxDataBuffer[4*i+1]>>6)&0x03; } else if(ID_DCDCSET4_REGISTER==index) { bd18397_mult_device_DCDCSET4[i].biSSCG=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x07; bd18397_mult_device_DCDCSET4[i].biRESERVED3=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>3)&0x01; bd18397_mult_device_DCDCSET4[i].biVMODE1=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>4)&0x10; bd18397_mult_device_DCDCSET4[i].biVMODE2=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>5)&0x20; bd18397_mult_device_DCDCSET4[i].biVMODE3=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>6)&0x40; bd18397_mult_device_DCDCSET4[i].biRESERVED7=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>7)&0x01; } else if(ID_CHEN_REGISTER==index) { bd18397_mult_device_CHEN[i].biCHON1=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x01; bd18397_mult_device_CHEN[i].biCHON2=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>1)&0x01; bd18397_mult_device_CHEN[i].biCHON3=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>2)&0x01; bd18397_mult_device_CHEN[i].biRESERVED3=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>3)&0x01; bd18397_mult_device_CHEN[i].biPWMDIM1=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>4)&0x01; bd18397_mult_device_CHEN[i].biPWMDIM2=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>5)&0x01; bd18397_mult_device_CHEN[i].biPWMDIM3=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>6)&0x01; bd18397_mult_device_CHEN[i].biRESERVED7=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>7)&0x01; } else if(ID_ADSEL_REGISTER==index) { bd18397_mult_device_ADSEL[i].biVMONSEL=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x0f; bd18397_mult_device_ADSEL[i].biADMODE=Ex_Spi_MasterRxDataBuffer[4*i+1]>>4&0x01; bd18397_mult_device_ADSEL[i].biRESERVED5=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>5)&0x01; bd18397_mult_device_ADSEL[i].biRESERVED6=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>6)&0x01; bd18397_mult_device_ADSEL[i].biADTRG=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>7)&0x01; } else if(ID_VMONH_REGISTER==index) { bd18397_mult_device_VMONH[i].biVMONH=Ex_Spi_MasterRxDataBuffer[4*i+1]&0xff; } else if(ID_VMONL_REGISTER==index) { bd18397_mult_device_VMONL[i].biVMONL=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x03; } else if(ID_ERRSTALL_REGISTER==index) { bd18397_mult_device_ERRSTALL[i].biERRDET1=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x01; bd18397_mult_device_ERRSTALL[i].biERRDET2=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>1)&0x01; bd18397_mult_device_ERRSTALL[i].biERRDET3=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>2)&0x01; bd18397_mult_device_ERRSTALL[i].biRESERVED3=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>3)&0x01; bd18397_mult_device_ERRSTALL[i].biUVLO=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>4)&0x01; bd18397_mult_device_ERRSTALL[i].biPINUVLO=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>5)&0x01; bd18397_mult_device_ERRSTALL[i].biCRCERR=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>6)&0x01; bd18397_mult_device_ERRSTALL[i].biWDTERR=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>7)&0x01; } else if(ID_ERRST1_REGISTER==index) { bd18397_mult_device_ERRST1[i].biLSD1=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x01; bd18397_mult_device_ERRST1[i].biLOD1=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>1)&0x01; bd18397_mult_device_ERRST1[i].biSWOCPERR1=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>2)&0x01; bd18397_mult_device_ERRST1[i].biLEDOCPERR1=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>3)&0x01; bd18397_mult_device_ERRST1[i].RESERVED4=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>4)&0x0f; } else if(ID_ERRST2_REGISTER==index) { bd18397_mult_device_ERRST2[i].biLSD2=Ex_Spi_MasterRxDataBuffer[4*i+1]&0x01; bd18397_mult_device_ERRST2[i].biLOD2=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>1)&0x01; bd18397_mult_device_ERRST2[i].biSWOCPERR2=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>2)&0x01; bd18397_mult_device_ERRST2[i].biLEDOCPERR2=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>3)&0x01; bd18397_mult_device_ERRST2[i].RESERVED4=(Ex_Spi_MasterRxDataBuffer[4*i+1]>>4)&0x0f; } } } /******************************************************************************* * Function bd18397_crc8 ****************************************************************************//** * * This function will calc 8bits data crc * * \param data pointer input 8 bits data * * \param length input bytes number * * \return t_crc use get after calc crc8 result * This IC has a CRC (cyclic redundancy check) function for detecting errors in the SPI communication. CRC for write command is calculated using RW bit, 7-bit register address and 8-bit register data and is calculated MSB first. Read output is calculated the same. CRC formula is x8+x5+x4+1? which is translated as the circuit as shown in. Initial value of CRC is 0x00. Poly 0011 0001 0x31 *******************************************************************************/ static uint8 bd18397_crc8(uint8 *data, uint32 length) { unsigned char t_crc; int i, j; t_crc = 0x00; for (i = 0; i < length; i++) { t_crc ^= data[i]; for (j = 0; j < 8; j++) { if(t_crc & 0x80) { t_crc <<= 1; t_crc ^= 0x31; } else { t_crc <<= 1; } } } return t_crc; } /******************************************************************************* * Function API_CDDBD18397RUV_SPI_Transfor_Data ****************************************************************************//** * * This function will program 24bits data to spi in BD18397RUV device * * \param mode of BD18397RUV use transfor data mode is CDDBD18397RUV_READ_MODE read and mode is CDDBD18397RUV_WRITE_MODE write * * \param regaddr to data to be written or to be read from regaddr * * \param value to data to be written ,if read mode cmd fill 0xff * * \param data_buf pointer to be read from data after cal crc8 * *******************************************************************************/ static void API_CDDBD18397RUV_SPI_Transfor_Data(uint8 mode,uint8 regaddr,uint8 value,uint32 *data_buf) { uint8 crc_value; uint8 crc_data_buf[2]; if(CDDBD18397RUV_READ_MODE==mode) { crc_data_buf[0]=regaddr&CDDBD18397RUV_ReadCmdBit; } else { crc_data_buf[0]=regaddr|CDDBD18397RUV_WriteCmdBit_Tx; } crc_data_buf[1]=value; crc_value=bd18397_crc8(crc_data_buf,2); *data_buf=(((crc_data_buf[0]<<16)|(value<<8)|crc_value)); } /******************************************************************************* * Function SPI_Daisy_device_transfor_data ****************************************************************************//** * This function will program 4 devices of BD18397RUV so need to 4*24bits data to spi bus * * \param mode of BD18397RUV use transfor data mode is CDDBD18397RUV_READ_MODE read and mode is CDDBD18397RUV_WRITE_MODE write * * \param regaddr to data to be written or to be read from regaddr * * \param value pointer to data to be written ,can write 4 values to different devices for BD18397RUV * * \param data_buf pointer to be get all device data that you want to operation * *******************************************************************************/ void SPI_Daisy_device_transfor_data(uint8 mode,uint8 regaddr,uint8 *value,uint8 *data_buf) { uint8 i=0; uint32 read_buf[CDDBD18397RUV_Cfg_NbOfDevices]; for(i=0;i>8; data_buf[4*i+2] = (read_buf[i]&0xFF0000)>>16; data_buf[4*i+3] = 0x00; } } /******************************************************************************* * Function CDDBD18397RUV_Daisy_Device_init ****************************************************************************//** * * This function will write 16 control registors default value * *******************************************************************************/ void CDDBD18397RUV_Daisy_Device_init(void) { int i; for(i =0;i= 1)&&(ulChnIdx <= 2))// device_id 0 { data_position_id=3; } else if ((ulChnIdx >= 3)&&(ulChnIdx <= 4)) //device_id 1 { data_position_id=2; } else if((ulChnIdx >= 5)&&(ulChnIdx <= 6)) //device_id 2 { data_position_id=1; } else if((ulChnIdx >= 7)&&(ulChnIdx <= 8)) //device_id 3 { data_position_id=0; } if(ulChnIdx%2!=0) //ch1 { bd18397_mult_device_ISET1H[data_position_id].biISET1H = (unCurrent>>2)&0xff; iset_reg_value[0]=bd18397_mult_device_ISET1H[0].biISET1H; iset_reg_value[1]=bd18397_mult_device_ISET1H[1].biISET1H; iset_reg_value[2]=bd18397_mult_device_ISET1H[2].biISET1H; iset_reg_value[3]=bd18397_mult_device_ISET1H[3].biISET1H; BD18397_RUV_set_registor_value(ID_ISET1H_REGISTER,iset_reg_value); bd18397_mult_device_ISET1L[data_position_id].biISET1L = unCurrent&0x03; iset_reg_value[0]=bd18397_mult_device_ISET1L[0].biISET1L; iset_reg_value[1]=bd18397_mult_device_ISET1L[1].biISET1L; iset_reg_value[2]=bd18397_mult_device_ISET1L[2].biISET1L; iset_reg_value[3]=bd18397_mult_device_ISET1L[3].biISET1L; BD18397_RUV_set_registor_value(ID_ISET1L_REGISTER,iset_reg_value); } else //ch2 { bd18397_mult_device_ISET2H[data_position_id].biISET2H = (unCurrent>>2)&0xff; iset_reg_value[0]=bd18397_mult_device_ISET2H[0].biISET2H; iset_reg_value[1]=bd18397_mult_device_ISET2H[1].biISET2H; iset_reg_value[2]=bd18397_mult_device_ISET2H[2].biISET2H; iset_reg_value[3]=bd18397_mult_device_ISET2H[3].biISET2H; BD18397_RUV_set_registor_value(ID_ISET2H_REGISTER,iset_reg_value); bd18397_mult_device_ISET2L[data_position_id].biISET2L = unCurrent&0x03; iset_reg_value[0]=bd18397_mult_device_ISET2L[0].biISET2L; iset_reg_value[1]=bd18397_mult_device_ISET2L[1].biISET2L; iset_reg_value[2]=bd18397_mult_device_ISET2L[2].biISET2L; iset_reg_value[3]=bd18397_mult_device_ISET2L[3].biISET2L; BD18397_RUV_set_registor_value(ID_ISET2L_REGISTER,iset_reg_value); } } } void Cdd_bd18397_SPI_PWM_Dimming (const uint32 ulChnIdx, const uint16 value) { uint8 data_position_id =0; uint8 pwm_reg_value[4]={0x00,0x00,0x00,0x00}; if (ulChnIdx < CDDBD18397RUV_CFG_NUMBER_OF_CHANNELS) { if((ulChnIdx >= 1)&&(ulChnIdx <= 2))// device_id 0 { data_position_id=3; } else if ((ulChnIdx >= 3)&&(ulChnIdx <= 4)) //device_id 1 { data_position_id=2; } else if((ulChnIdx >= 5)&&(ulChnIdx <= 6)) //device_id 2 { data_position_id=1; } else if((ulChnIdx >= 7)&&(ulChnIdx <= 8)) //device_id 3 { data_position_id=0; } if(ulChnIdx%2!=0) //ch1 { bd18397_mult_device_DPWM1H[data_position_id].biDPWM1H = (value>>2)&0xff; pwm_reg_value[0]=bd18397_mult_device_DPWM1H[0].biDPWM1H; pwm_reg_value[1]=bd18397_mult_device_DPWM1H[1].biDPWM1H; pwm_reg_value[2]=bd18397_mult_device_DPWM1H[2].biDPWM1H; pwm_reg_value[3]=bd18397_mult_device_DPWM1H[3].biDPWM1H; BD18397_RUV_set_registor_value(ID_DPWM1H_REGISTER,pwm_reg_value); bd18397_mult_device_DPWM1L[data_position_id].biDPWM1L = value&0x03; pwm_reg_value[0]=bd18397_mult_device_DPWM1L[0].biDPWM1L; pwm_reg_value[1]=bd18397_mult_device_DPWM1L[1].biDPWM1L; pwm_reg_value[2]=bd18397_mult_device_DPWM1L[2].biDPWM1L; pwm_reg_value[3]=bd18397_mult_device_DPWM1L[3].biDPWM1L; BD18397_RUV_set_registor_value(ID_DPWM1L_REGISTER,pwm_reg_value); } else //ch2 { bd18397_mult_device_DPWM2H[data_position_id].biDPWM2H = (value>>2)&0xff; pwm_reg_value[0]=bd18397_mult_device_DPWM2H[0].biDPWM2H; pwm_reg_value[1]=bd18397_mult_device_DPWM2H[1].biDPWM2H; pwm_reg_value[2]=bd18397_mult_device_DPWM2H[2].biDPWM2H; pwm_reg_value[3]=bd18397_mult_device_DPWM2H[3].biDPWM2H; BD18397_RUV_set_registor_value(ID_DPWM2H_REGISTER,pwm_reg_value); bd18397_mult_device_DPWM2L[data_position_id].biDPWM2L = value&0x03; pwm_reg_value[0]=bd18397_mult_device_DPWM2L[0].biDPWM2L; pwm_reg_value[1]=bd18397_mult_device_DPWM2L[1].biDPWM2L; pwm_reg_value[2]=bd18397_mult_device_DPWM2L[2].biDPWM2L; pwm_reg_value[3]=bd18397_mult_device_DPWM2L[3].biDPWM2L; BD18397_RUV_set_registor_value(ID_DPWM2L_REGISTER,pwm_reg_value); } } }