D:/SourceTree/EOL1/Build/VS/../Bin/F1Pb27_App_default/F1Pb27_App_default.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 00000200 10000000 10000000 00000140 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .BMG_INFO 00000050 10000200 10000200 00000340 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 2 .text 000044e4 10000250 10000250 00000390 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 3 .romdata 00000164 10004734 10004734 00004874 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 4 .rodata 0000220c 10004898 10004898 000049d8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .SHA_DATA 00000004 08000804 08000804 00000000 2**2 ALLOC 6 .bss 00000cac 08000a00 08000a00 00000000 2**2 ALLOC 7 .data 00000164 080016ac 080016ac 00004874 2**2 ALLOC 8 .tls.cond.data 00000000 08001810 08001810 00000000 2**0 ALLOC, READONLY 9 /DISCARD/ 00000000 00000000 00000000 00000000 2**0 CONTENTS, READONLY 10 .debug_info 00090dda 00000000 00000000 00006be4 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_abbrev 00003393 00000000 00000000 000979be 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_line 0003855d 00000000 00000000 0009ad51 2**0 CONTENTS, READONLY, DEBUGGING 13 .debug_macinfo 00022720 00000000 00000000 000d32ae 2**0 CONTENTS, READONLY, DEBUGGING 14 .debug_frame 00002a48 00000000 00000000 000f59ce 2**0 CONTENTS, READONLY, DEBUGGING 15 .nosec 00000000 00000000 00000000 00000000 2**0 CONTENTS, READONLY 16 .linfix 00000000 00000000 00000000 00000000 2**2 CONTENTS, READONLY 17 .gstackfix 00000000 00000000 00000000 00000000 2**2 CONTENTS, READONLY Disassembly of section .text: 10000250 : void AL_Helper_Dummy(const uint32 ulDummyParam) { (void) ulDummyParam; return; 10000250: 4770 bx lr 10000252 <_Xtime_get_ticks>: // Consider line 305, ff. in install_dir/src/libsys/ind_thrd11.c. // Return the current system time in microseconds. // long long _Xtime_get_ticks(void) { ... } long long _Xtime_get_ticks(void) { 10000252: b500 push {lr} return (long long) Gpt_GetTimeElapsed(0U); 10000254: 2000 movs r0, #0 10000256: f001 fc30 bl 10001aba 1000025a: 2100 movs r1, #0 1000025c: bd00 pop {pc} 1000025e <__ghs_eofn__Xtime_get_ticks>: ... 10000260 <__HalCpuNop__57__INTERNAL_34_SysStart_Startup_C__Completion_cpp_a4d2b7d3Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_CCompletion_inf>: #if defined(__cplusplus) extern "C" { #endif static inline void HalCpuNop(void) { __ASM("nop"); } 10000260: bf00 nop 10000262 <..lin.2628a297..25a4c483.0_1>: 10000262: 4770 bx lr 10000264 <__nw__FUi>: void operator delete(void*, unsigned int) NOTHROW; void* operator new(std::size_t size) NOTHROW; void* operator new(std::size_t size) NOTHROW { 10000264: 4601 mov r1, r0 10000266: 4a23 ldr r2, [pc, #140] ; (100002f4 <__ghs_eofn_SysStartup_CppCompletionDummy+0x2>) // no sensible momory management or reaction to buffer overflow. static volatile std::uint8_t buffer[8U]; static volatile std::uint8_t* get_ptr = buffer; // Get the newly allocated pointer. volatile std::uint8_t* p = get_ptr; 10000268: 6810 ldr r0, [r2, #0] // Does this allocation overflow the top of the buffer? const bool is_overflow = ((get_ptr + size) >= (buffer + buffer_size)); // Increment the pointer for next time. // But only do this if the buffer does *not* overflow. if(is_overflow) 1000026a: 1843 adds r3, r0, r1 1000026c: 4922 ldr r1, [pc, #136] ; (100002f8 <__ghs_eofn_SysStartup_CppCompletionDummy+0x6>) 1000026e: 3108 adds r1, #8 10000270: 428b cmp r3, r1 10000272: d200 bcs.n 10000276 <..lin.2628a297..8c0dc4a.0_2+0x2> 10000274 <..lin.2628a297..8c0dc4a.0_2>: { // TBD: Is any sensible error reaction possible here? } else { get_ptr += size; 10000274: 6013 str r3, [r2, #0] } return static_cast(const_cast(p)); 10000276: 4770 bx lr 10000278 <__dl__FPv>: } void operator delete(void*) NOTHROW { } 10000278: 4770 bx lr 1000027a <__dl__FPvUi>: void operator delete(void*, unsigned int) NOTHROW { } 1000027a: 4770 bx lr 1000027c : char* __cxa_demangle (const char*, char*, size_t*, int*); void __cxa_call_terminate(_Unwind_Exception*); // Implementations of patched functions. void abort () NOTHROW { for(;;) { HalCpuNop(); } } 1000027c: b500 push {lr} 1000027e: b084 sub sp, #16 10000280: f7ff ffee bl 10000260 <__HalCpuNop__57__INTERNAL_34_SysStart_Startup_C__Completion_cpp_a4d2b7d3Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_CCompletion_inf> 10000284: e7fc b.n 10000280 10000286 : int atexit (void (*)()) NOTHROW { return 0; } 10000286: 2000 movs r0, #0 10000288: 4770 bx lr 1000028a : int at_quick_exit (void (*)()) NOTHROW { return 0; } 1000028a: 2000 movs r0, #0 1000028c: 4770 bx lr 1000028e <_Exit>: void _Exit (int) NOTHROW { for(;;) { HalCpuNop(); } } 1000028e: b500 push {lr} 10000290: b084 sub sp, #16 10000292: f7ff ffe5 bl 10000260 <__HalCpuNop__57__INTERNAL_34_SysStart_Startup_C__Completion_cpp_a4d2b7d3Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_CCompletion_inf> 10000296: e7fc b.n 10000292 <_Exit+0x4> 10000298 : void exit (int) { for(;;) { HalCpuNop(); } } 10000298: b500 push {lr} 1000029a: b084 sub sp, #16 1000029c: f7ff ffe0 bl 10000260 <__HalCpuNop__57__INTERNAL_34_SysStart_Startup_C__Completion_cpp_a4d2b7d3Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_CCompletion_inf> 100002a0: e7fc b.n 1000029c 100002a2 : void quick_exit (int) { ::_Exit(0); } 100002a2: b500 push {lr} 100002a4: b084 sub sp, #16 100002a6: f7ff ffdb bl 10000260 <__HalCpuNop__57__INTERNAL_34_SysStart_Startup_C__Completion_cpp_a4d2b7d3Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_CCompletion_inf> 100002aa: e7fc b.n 100002a6 100002ac <_exit>: int _exit (int) { return -1; } 100002ac: 2000 movs r0, #0 100002ae: 43c0 mvns r0, r0 100002b0: 4770 bx lr 100002b2 <_isatty>: int _isatty (int) { return 1; } 100002b2: 2001 movs r0, #1 100002b4: 4770 bx lr 100002b6 <_lseek>: int _lseek (int, int, int) { return 0; } 100002b6: 2000 movs r0, #0 100002b8: 4770 bx lr 100002ba <_open>: int _open (const char*, int, int) { return -1; } 100002ba: 2000 movs r0, #0 100002bc: 43c0 mvns r0, r0 100002be: 4770 bx lr 100002c0 <_close>: int _close (int) { return -1; } 100002c0: 2000 movs r0, #0 100002c2: 43c0 mvns r0, r0 100002c4: 4770 bx lr 100002c6 <_read>: int _read (int, char*, int) { return 0; } 100002c6: 2000 movs r0, #0 100002c8: 4770 bx lr 100002ca <_write>: int _write (int, char*, int) { return 0; } 100002ca: 2000 movs r0, #0 100002cc: 4770 bx lr 100002ce <_fstat>: int _fstat (int, void*) { return 0; } 100002ce: 2000 movs r0, #0 100002d0: 4770 bx lr 100002d2 <_sbrk>: const void* _sbrk (int) { return nullptr; } 100002d2: 2000 movs r0, #0 100002d4: 4770 bx lr 100002d6 <_getpid>: int _getpid () { return 1; } 100002d6: 2001 movs r0, #1 100002d8: 4770 bx lr 100002da <_kill>: int _kill (int, int) { return -1; } 100002da: 2000 movs r0, #0 100002dc: 43c0 mvns r0, r0 100002de: 4770 bx lr 100002e0 <__cxa_pure_virtual>: void __cxa_pure_virtual () { } 100002e0: 4770 bx lr 100002e2 <__cxa_demangle>: char* __cxa_demangle (const char*, char*, size_t*, int*) { return nullptr; } 100002e2: 2000 movs r0, #0 100002e4: 4770 bx lr 100002e6 <__cxa_call_terminate>: void __cxa_call_terminate(_Unwind_Exception*) { } 100002e6: 4770 bx lr 100002e8 <__errno>: // Provide some patched data values. const char* const __env[1U] = { nullptr }; const char** const environ = { nullptr }; int* __errno(void); int* __errno(void) { return nullptr; } 100002e8: 2000 movs r0, #0 100002ea: 4770 bx lr 100002ec <__dotsyscall>: void* __dotsyscall(void); void* __dotsyscall() { return nullptr; } 100002ec: 2000 movs r0, #0 100002ee: 4770 bx lr 100002f0 : void SysStartup_CppCompletionDummy(void) { static_cast(__env); static_cast(environ); } 100002f0: 4770 bx lr 100002f2 <__ghs_eofn_SysStartup_CppCompletionDummy>: 100002f2: bf00 nop 100002f4: 16ac asrs r4, r5, #26 100002f6: 0800 lsrs r0, r0, #32 100002f8: 0a00 lsrs r0, r0, #8 100002fa: 0800 lsrs r0, r0, #32 100002fc <__my_startup>: extern "C" void __my_startup() __attribute__((used, noinline, noreturn)); void __my_startup() { 100002fc: b500 push {lr} 100002fe: b084 sub sp, #16 // Load the stack pointer with the address from the linker definition file. __ASM("ldr r0, =__initial_stack_pointer"); 10000300: 4821 ldr r0, [pc, #132] ; (10000388 <__ghs_eofn___my_startup+0x2>) 10000302 <..lin.6c96780f..1e345f5b.0_1>: __ASM("mov sp, r0"); 10000302: 4685 mov sp, r0 10000304 <..lin.6c96780f..1e345f5b.0_2>: // Chip init: Watchdog and oscillator. ::Mcu_Init(&Mcu_ConfigData); 10000304: 4817 ldr r0, [pc, #92] ; (10000364 <..lin.6c96780f..1e345f5b.0_3+0x2>) 10000306: f001 fc22 bl 10001b4e ::Mcu_InitClock(0U); 1000030a: 2000 movs r0, #0 1000030c: f001 fc56 bl 10001bbc ::Port_Init(nullptr); 10000310: 2000 movs r0, #0 10000312: f002 f812 bl 1000233a ::Wdg_Init (nullptr); 10000316: 2000 movs r0, #0 10000318: f002 fb0a bl 10002930 ::Wdg_Trigger(); 1000031c: f002 fb24 bl 10002968 // Initialize statics from ROM to RAM. // Zero-clear default-initialized static RAM. crt::init_ram(); 10000320: f000 f836 bl 10000390 ::Wdg_Trigger(); 10000324: f002 fb20 bl 10002968 // Call all ctor initializations. crt::init_ctors(); 10000328: f000 f87a bl 10000420 ::Wdg_Trigger(); 1000032c: f002 fb1c bl 10002968 const uint8_t u8Irq1Index = (uint8_t)(0x44 / 4); uint32_t * const pu32RamTable = (uint32_t *)0x08006900; uint32_t * const pu32SromTable = (uint32_t *)nullptr; // Use IRQ0 and IRQ1 handlers from SROM vector table pu32RamTable[u8Irq0Index] = pu32SromTable[u8Irq0Index]; 10000330: 2240 movs r2, #64 ; 0x40 10000332: 6810 ldr r0, [r2, #0] 10000334: 4a0c ldr r2, [pc, #48] ; (10000368 <..lin.6c96780f..1e345f5b.0_3+0x6>) 10000336: 6010 str r0, [r2, #0] pu32RamTable[u8Irq1Index] = pu32SromTable[u8Irq1Index]; 10000338: 2244 movs r2, #68 ; 0x44 1000033a: 6810 ldr r0, [r2, #0] 1000033c: 4a0b ldr r2, [pc, #44] ; (1000036c <..lin.6c96780f..1e345f5b.0_3+0xa>) 1000033e: 6010 str r0, [r2, #0] NVIC_SetPriority(CPUIntIdx0_IRQn, 1); 10000340: 4a0b ldr r2, [pc, #44] ; (10000370 <..lin.6c96780f..1e345f5b.0_3+0xe>) 10000342: 6810 ldr r0, [r2, #0] 10000344: 0a00 lsrs r0, r0, #8 10000346: 0200 lsls r0, r0, #8 10000348: 2140 movs r1, #64 ; 0x40 1000034a: 4308 orrs r0, r1 1000034c: 6010 str r0, [r2, #0] NVIC_SetPriority(CPUIntIdx1_IRQn, 0); 1000034e: 4909 ldr r1, [pc, #36] ; (10000374 <..lin.6c96780f..1e345f5b.0_3+0x12>) 10000350: 6810 ldr r0, [r2, #0] 10000352: 4008 ands r0, r1 10000354: 6010 str r0, [r2, #0] NVIC_EnableIRQ(CPUIntIdx0_IRQn); 10000356: 4a08 ldr r2, [pc, #32] ; (10000378 <..lin.6c96780f..1e345f5b.0_3+0x16>) 10000358: 2001 movs r0, #1 1000035a: 6010 str r0, [r2, #0] NVIC_EnableIRQ(CPUIntIdx1_IRQn); 1000035c: 2002 movs r0, #2 1000035e: 6010 str r0, [r2, #0] 10000360: e00c b.n 1000037c <..lin.6c96780f..1e345f5b.0_4> 10000362 <..lin.6c96780f..1e345f5b.0_3>: 10000362: bf00 nop 10000364: 4a78 ldr r2, [pc, #480] ; (10000548 <..lin.2f823331..bdd69f1b.0_3+0x40>) 10000366: 1000 asrs r0, r0, #32 10000368: 6940 ldr r0, [r0, #20] 1000036a: 0800 lsrs r0, r0, #32 1000036c: 6944 ldr r4, [r0, #20] 1000036e: 0800 lsrs r0, r0, #32 10000370: e400 b.n ffffb74 <__initial_stack_pointer+0x7ff7b75> 10000372: e000 b.n 10000376 <..lin.6c96780f..1e345f5b.0_3+0x14> 10000374: 00ff lsls r7, r7, #3 10000376: ffff e100 vaddw.u q15, , d0 1000037a: e000 b.n 1000037e <..lin.6c96780f..1e345f5b.0_5> 1000037c <..lin.6c96780f..1e345f5b.0_4>: // Jump to main (and never return). __ASM("ldr r0, =main"); 1000037c: 4803 ldr r0, [pc, #12] ; (1000038c <__ghs_eofn___my_startup+0x6>) 1000037e <..lin.6c96780f..1e345f5b.0_5>: __ASM("blx r0"); 1000037e: 4780 blx r0 10000380 <..lin.6c96780f..1e345f5b.0_6>: // Catch an unexpected return from main. for(;;) { // Replace with a loud error if desired. ::Wdg_Trigger(); 10000380: f002 faf2 bl 10002968 for(;;) 10000384: e7fc b.n 10000380 <..lin.6c96780f..1e345f5b.0_6> 10000386 <__ghs_eofn___my_startup>: 10000386: bf00 nop 10000388: 7fff ldrb r7, [r7, #31] 1000038a: 0800 lsrs r0, r0, #32 1000038c: 047f lsls r7, r7, #17 1000038e: 1000 asrs r0, r0, #32 10000390 : { void init_ram(); } void crt::init_ram() { 10000390: b5f0 push {r4, r5, r6, r7, lr} 10000392: b081 sub sp, #4 // // Here, we see that both bss as well as data begin on 4 byte // boundaries but have sizes that are not multiples of 4. // Calculate the size of the data section in byte. const std::uint32_t local_data_size = 10000394: 4f1d ldr r7, [pc, #116] ; (1000040c <__ghs_eofn_init_ram__3crtFv+0x2>) 10000396: 481e ldr r0, [pc, #120] ; (10000410 <__ghs_eofn_init_ram__3crtFv+0x6>) 10000398: 4c1e ldr r4, [pc, #120] ; (10000414 <__ghs_eofn_init_ram__3crtFv+0xa>) std::uint32_t( static_cast(static_cast(&_data_end)) - static_cast(static_cast(&_data_begin))); // Calculate the size of the bss section in byte. const std::uint32_t local_bss__size = 1000039a: 1bc6 subs r6, r0, r7 1000039c: 481e ldr r0, [pc, #120] ; (10000418 <__ghs_eofn_init_ram__3crtFv+0xe>) 1000039e: 4d1f ldr r5, [pc, #124] ; (1000041c <__ghs_eofn_init_ram__3crtFv+0x12>) 100003a0: 1b03 subs r3, r0, r4 std::uint32_t( static_cast(static_cast(&_bss_end)) - static_cast(static_cast(&_bss_begin))); // Copy the data segment initializers from ROM to RAM. // Handle chunks of 4 bytes. std::copy(static_cast(static_cast(&_rom_data_begin)), 100003a2: 9300 str r3, [sp, #0] 100003a4: 4629 mov r1, r5 100003a6: 08b0 lsrs r0, r6, #2 100003a8: 0082 lsls r2, r0, #2 100003aa: 4638 mov r0, r7 100003ac: f000 f8a5 bl 100004fa static_cast(static_cast(&_rom_data_begin)) + std::size_t(local_data_size / 4U), static_cast< std::uint32_t*>(static_cast< void*>(&_data_begin))); // Copy the data segment initializers from ROM to RAM. // Handle the remaining chunk of mod-4 bytes. std::copy(static_cast(static_cast(&_rom_data_begin)) + std::size_t(local_data_size - std::size_t(local_data_size % 4U)), 100003b0: 08b0 lsrs r0, r6, #2 100003b2: 0080 lsls r0, r0, #2 100003b4: 1941 adds r1, r0, r5 100003b6: 1972 adds r2, r6, r5 100003b8: 1a52 subs r2, r2, r1 100003ba: 19c0 adds r0, r0, r7 100003bc: f000 f89d bl 100004fa static_cast(static_cast(&_rom_data_begin)) + std::size_t(local_data_size), static_cast< std::uint8_t*>(static_cast< void*>(&_data_begin)) + std::size_t(local_data_size - std::size_t(local_data_size % 4U))); // Clear the bss segment. // Handle chunks of 4 bytes. std::fill(static_cast(static_cast(&_bss_begin)), 100003c0: 9b00 ldr r3, [sp, #0] 100003c2: 0898 lsrs r0, r3, #2 100003c4: 0080 lsls r0, r0, #2 100003c6: 1821 adds r1, r4, r0 100003c8: 4620 mov r0, r4 100003ca: 428c cmp r4, r1 100003cc: d012 beq.n 100003f4 <..lin.571acc03..96c832ce.0_1> 100003ce: 1b0a subs r2, r1, r4 100003d0: 3a01 subs r2, #1 100003d2: 0892 lsrs r2, r2, #2 100003d4: 3201 adds r2, #1 100003d6: 08d3 lsrs r3, r2, #3 100003d8: d009 beq.n 100003ee 100003da: 2200 movs r2, #0 100003dc: 4615 mov r5, r2 100003de: 4617 mov r7, r2 100003e0: 4616 mov r6, r2 100003e2: c0e4 stmia r0!, {r2, r5, r6, r7} 100003e4: c0e4 stmia r0!, {r2, r5, r6, r7} 100003e6: 3b01 subs r3, #1 100003e8: d1fb bne.n 100003e2 100003ea: 4288 cmp r0, r1 100003ec: d002 beq.n 100003f4 <..lin.571acc03..96c832ce.0_1> 100003ee: c008 stmia r0!, {r3} 100003f0: 4288 cmp r0, r1 100003f2: d1fc bne.n 100003ee 100003f4 <..lin.571acc03..96c832ce.0_1>: static_cast(static_cast(&_bss_begin)) + std::size_t(local_bss__size / 4U), static_cast(0U)); // Clear the bss segment. // Handle the remaining chunk of mod-4 bytes. std::fill(static_cast(static_cast(&_bss_begin)) + std::size_t(local_bss__size - std::size_t(local_bss__size % 4U)), 100003f4: 9b00 ldr r3, [sp, #0] 100003f6: 0898 lsrs r0, r3, #2 100003f8: 0080 lsls r0, r0, #2 100003fa: 1900 adds r0, r0, r4 100003fc: 1919 adds r1, r3, r4 100003fe: 1a0a subs r2, r1, r0 10000400: 2100 movs r1, #0 10000402: f000 f841 bl 10000488 static_cast(static_cast(&_bss_begin)) + std::size_t(local_bss__size), static_cast(0U)); } 10000406: b001 add sp, #4 10000408: bdf0 pop {r4, r5, r6, r7, pc} 1000040a <__ghs_eofn_init_ram__3crtFv>: 1000040a: bf00 nop 1000040c: 16ac asrs r4, r5, #26 1000040e: 0800 lsrs r0, r0, #32 10000410: 1810 adds r0, r2, r0 10000412: 0800 lsrs r0, r0, #32 10000414: 0a00 lsrs r0, r0, #8 10000416: 0800 lsrs r0, r0, #32 10000418: 16ac asrs r4, r5, #26 1000041a: 0800 lsrs r0, r0, #32 1000041c: 4734 bxns r6 1000041e: 1000 asrs r0, r0, #32 10000420 : { void init_ctors(); } void crt::init_ctors() { 10000420: b510 push {r4, lr} std::uint32_t ulCtorIndex = 0U; if(&_ctors[ulCtorIndex] != nullptr) 10000422: 4c06 ldr r4, [pc, #24] ; (1000043c <__ghs_eofn_init_ctors__3crtFv+0x2>) 10000424: 2c00 cmp r4, #0 10000426: d007 beq.n 10000438 <..lin.6c967810..a9b0a719.0_2> 10000428: 6820 ldr r0, [r4, #0] 1000042a: 2800 cmp r0, #0 1000042c: d004 beq.n 10000438 <..lin.6c967810..a9b0a719.0_2> 1000042e <..lin.6c967810..a9b0a719.0_1>: { while(_ctors[ulCtorIndex] != nullptr) { (_ctors[ulCtorIndex])(); 1000042e: 4780 blx r0 while(_ctors[ulCtorIndex] != nullptr) 10000430: 6860 ldr r0, [r4, #4] 10000432: 3404 adds r4, #4 10000434: 2800 cmp r0, #0 10000436: d1fa bne.n 1000042e <..lin.6c967810..a9b0a719.0_1> 10000438 <..lin.6c967810..a9b0a719.0_2>: ++ulCtorIndex; } } } 10000438: bd10 pop {r4, pc} 1000043a <__ghs_eofn_init_ctors__3crtFv>: 1000043a: bf00 nop 1000043c: 0000 movs r0, r0 ... 10000440 <__HalCpuNop__51__INTERNAL_28_SysStart_Startup_IntVect_cpp_3be74f63Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_IntVect_inf>: 10000440: bf00 nop 10000442 <..lin.334b0cf3..c629be3b.0_1>: 10000442: 4770 bx lr 10000444 <__nmi_handler>: extern "C" void __pend_sv_handler () __attribute__((used, noinline)); extern "C" void __ipc_cryptolib_handler() __attribute__((used, noinline, weak)); extern "C" void __vector_unused_irq () __attribute__((used, noinline)); extern "C" void __nmi_handler () { for(;;) { HalCpuNop(); } } 10000444: b500 push {lr} 10000446: b084 sub sp, #16 10000448: f7ff fffa bl 10000440 <__HalCpuNop__51__INTERNAL_28_SysStart_Startup_IntVect_cpp_3be74f63Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_IntVect_inf> 1000044c: e7fc b.n 10000448 <__nmi_handler+0x4> 1000044e <__hard_fault_handler>: extern "C" void __hard_fault_handler () { for(;;) { HalCpuNop(); } } 1000044e: b500 push {lr} 10000450: b084 sub sp, #16 10000452: f7ff fff5 bl 10000440 <__HalCpuNop__51__INTERNAL_28_SysStart_Startup_IntVect_cpp_3be74f63Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_IntVect_inf> 10000456: e7fc b.n 10000452 <__hard_fault_handler+0x4> 10000458 <__svc_handler>: extern "C" void __svc_handler () { for(;;) { HalCpuNop(); } } 10000458: b500 push {lr} 1000045a: b084 sub sp, #16 1000045c: f7ff fff0 bl 10000440 <__HalCpuNop__51__INTERNAL_28_SysStart_Startup_IntVect_cpp_3be74f63Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_IntVect_inf> 10000460: e7fc b.n 1000045c <__svc_handler+0x4> 10000462 <__pend_sv_handler>: extern "C" void __pend_sv_handler () { for(;;) { HalCpuNop(); } } 10000462: b500 push {lr} 10000464: b084 sub sp, #16 10000466: f7ff ffeb bl 10000440 <__HalCpuNop__51__INTERNAL_28_SysStart_Startup_IntVect_cpp_3be74f63Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_IntVect_inf> 1000046a: e7fc b.n 10000466 <__pend_sv_handler+0x4> 1000046c <__vector_unused_irq>: extern "C" void __vector_unused_irq () { for(;;) { HalCpuNop(); } } 1000046c: b500 push {lr} 1000046e: b084 sub sp, #16 10000470: f7ff ffe6 bl 10000440 <__HalCpuNop__51__INTERNAL_28_SysStart_Startup_IntVect_cpp_3be74f63Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_IntVect_inf> 10000474: e7fc b.n 10000470 <__vector_unused_irq+0x4> 10000476 <__ipc_cryptolib_handler>: extern "C" void __ipc_cryptolib_handler() { HalCpuNop(); } 10000476: b500 push {lr} 10000478: f7ff ffe2 bl 10000440 <__HalCpuNop__51__INTERNAL_28_SysStart_Startup_IntVect_cpp_3be74f63Fv_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSysStart_Startup_IntVect_inf> 1000047c: bd00 pop {pc} 1000047e
: #include #include int main(void) { 1000047e: b500 push {lr} // Initialize the ECU manager. // Here we will call Gpt_Init() and Dio_Init(). EcuM_Init(); 10000480: f002 fc1d bl 10002cbe // Start the task scheduler. // This is done in EcuM_Init(). return 0; 10000484: 2000 movs r0, #0 10000486: bd00 pop {pc} 10000488 : //============================================================================= // Public functions definitions //============================================================================= extern "C" void* memset(void* dst, int c, size_t n) { 10000488: b510 push {r4, lr} std::uint8_t* the_dst = reinterpret_cast(dst); 1000048a: 4603 mov r3, r0 for( ; n > static_cast(0U); --n) 1000048c: 08d4 lsrs r4, r2, #3 1000048e: d00a beq.n 100004a6 10000490: 7019 strb r1, [r3, #0] 10000492: 7059 strb r1, [r3, #1] 10000494: 7099 strb r1, [r3, #2] 10000496: 70d9 strb r1, [r3, #3] 10000498: 7119 strb r1, [r3, #4] 1000049a: 7159 strb r1, [r3, #5] 1000049c: 7199 strb r1, [r3, #6] 1000049e: 71d9 strb r1, [r3, #7] 100004a0: 3308 adds r3, #8 100004a2: 3c01 subs r4, #1 100004a4: d1f4 bne.n 10000490 100004a6: 0752 lsls r2, r2, #29 100004a8: 0f52 lsrs r2, r2, #29 100004aa: d003 beq.n 100004b4 <..lin.2f823331..d82b830.0_1> 100004ac: 7019 strb r1, [r3, #0] 100004ae: 3301 adds r3, #1 100004b0: 3a01 subs r2, #1 100004b2: d1fb bne.n 100004ac 100004b4 <..lin.2f823331..d82b830.0_1>: { *the_dst = static_cast(c); ++the_dst; } return dst; 100004b4: bd10 pop {r4, pc} 100004b6 : } extern "C" void* memcpy(void* dst, const void* src, size_t n) { 100004b6: b530 push {r4, r5, lr} std::uint8_t* the_dst = reinterpret_cast< std::uint8_t*>(dst); 100004b8: 4603 mov r3, r0 const std::uint8_t* the_src = reinterpret_cast(src); for( ; n > static_cast(0U); --n) 100004ba: 08d4 lsrs r4, r2, #3 100004bc: d013 beq.n 100004e6 100004be: 780d ldrb r5, [r1, #0] 100004c0: 701d strb r5, [r3, #0] 100004c2: 784d ldrb r5, [r1, #1] 100004c4: 705d strb r5, [r3, #1] 100004c6: 788d ldrb r5, [r1, #2] 100004c8: 709d strb r5, [r3, #2] 100004ca: 78cd ldrb r5, [r1, #3] 100004cc: 70dd strb r5, [r3, #3] 100004ce: 790d ldrb r5, [r1, #4] 100004d0: 711d strb r5, [r3, #4] 100004d2: 794d ldrb r5, [r1, #5] 100004d4: 715d strb r5, [r3, #5] 100004d6: 798d ldrb r5, [r1, #6] 100004d8: 719d strb r5, [r3, #6] 100004da: 79cd ldrb r5, [r1, #7] 100004dc: 71dd strb r5, [r3, #7] 100004de: 3108 adds r1, #8 100004e0: 3308 adds r3, #8 100004e2: 3c01 subs r4, #1 100004e4: d1eb bne.n 100004be 100004e6: 0752 lsls r2, r2, #29 100004e8: 0f52 lsrs r2, r2, #29 100004ea: d005 beq.n 100004f8 <..lin.2f823331..d827590.0_2> 100004ec: 780c ldrb r4, [r1, #0] 100004ee: 701c strb r4, [r3, #0] 100004f0: 3101 adds r1, #1 100004f2: 3301 adds r3, #1 100004f4: 3a01 subs r2, #1 100004f6: d1f9 bne.n 100004ec 100004f8 <..lin.2f823331..d827590.0_2>: *the_dst = *the_src; ++the_dst; ++the_src; } return dst; 100004f8: bd30 pop {r4, r5, pc} 100004fa : } extern "C" void* memmove(void* dst, const void* src, size_t n) { 100004fa: b570 push {r4, r5, r6, lr} // The function memmove *does* work properly even when its operands overlap. std::uint8_t* the_dst = static_cast< std::uint8_t*>(dst); 100004fc: 4603 mov r3, r0 const std::uint8_t* the_src = static_cast(src); // Check for a range overlap. if((the_src < the_dst) && (the_dst < (the_src + n))) 100004fe: 4281 cmp r1, r0 10000500: d230 bcs.n 10000564 <..lin.2f823331..bdd69f1b.0_4+0x8> 10000502: 188c adds r4, r1, r2 10000504: 42a0 cmp r0, r4 10000506: d22d bcs.n 10000564 <..lin.2f823331..bdd69f1b.0_4+0x8> 10000508 <..lin.2f823331..bdd69f1b.0_3>: { the_dst += n; 10000508: 1883 adds r3, r0, r2 the_src += n; 1000050a: 4621 mov r1, r4 for( ; n > static_cast(0U); --n) 1000050c: 08d4 lsrs r4, r2, #3 1000050e: d01b beq.n 10000548 <..lin.2f823331..bdd69f1b.0_3+0x40> 10000510: 1e5d subs r5, r3, #1 10000512: 1e4e subs r6, r1, #1 10000514: 7836 ldrb r6, [r6, #0] 10000516: 702e strb r6, [r5, #0] 10000518: 1feb subs r3, r5, #7 1000051a: 1e8e subs r6, r1, #2 1000051c: 7836 ldrb r6, [r6, #0] 1000051e: 719e strb r6, [r3, #6] 10000520: 1ece subs r6, r1, #3 10000522: 7836 ldrb r6, [r6, #0] 10000524: 715e strb r6, [r3, #5] 10000526: 1f0e subs r6, r1, #4 10000528: 7836 ldrb r6, [r6, #0] 1000052a: 711e strb r6, [r3, #4] 1000052c: 1f4e subs r6, r1, #5 1000052e: 7836 ldrb r6, [r6, #0] 10000530: 70de strb r6, [r3, #3] 10000532: 1f8e subs r6, r1, #6 10000534: 7836 ldrb r6, [r6, #0] 10000536: 709e strb r6, [r3, #2] 10000538: 1fce subs r6, r1, #7 1000053a: 7836 ldrb r6, [r6, #0] 1000053c: 3908 subs r1, #8 1000053e: 705e strb r6, [r3, #1] 10000540: 780d ldrb r5, [r1, #0] 10000542: 701d strb r5, [r3, #0] 10000544: 3c01 subs r4, #1 10000546: d1e3 bne.n 10000510 <..lin.2f823331..bdd69f1b.0_3+0x8> 10000548: 0752 lsls r2, r2, #29 1000054a: 0f52 lsrs r2, r2, #29 1000054c: d00c beq.n 10000568 <..lin.2f823331..bdd69f1b.0_5> 1000054e: 3b01 subs r3, #1 10000550: 3901 subs r1, #1 10000552: 780c ldrb r4, [r1, #0] 10000554: 701c strb r4, [r3, #0] 10000556: 3a01 subs r2, #1 10000558: d1f9 bne.n 1000054e <..lin.2f823331..bdd69f1b.0_3+0x46> 1000055a: e005 b.n 10000568 <..lin.2f823331..bdd69f1b.0_5> 1000055c <..lin.2f823331..bdd69f1b.0_4>: else { for( ; n > static_cast(0U); --n) { // Perform a forwards copy. *the_dst = *the_src; 1000055c: 780c ldrb r4, [r1, #0] 1000055e: 701c strb r4, [r3, #0] ++the_dst; 10000560: 3301 adds r3, #1 ++the_src; 10000562: 3101 adds r1, #1 for( ; n > static_cast(0U); --n) 10000564: 3a01 subs r2, #1 10000566: d2f9 bcs.n 1000055c <..lin.2f823331..bdd69f1b.0_4> 10000568 <..lin.2f823331..bdd69f1b.0_5>: } } return dst; 10000568: bd70 pop {r4, r5, r6, pc} 1000056a : // // \return ucRet - error code //----------------------------------------------------------------------------- uint8 cdd::sbc::read_write_reg(teCddSbcSpiReqType SpiRequest, uint8 *pucAddr, uint8 *pucTxData, uint16 *punRxData) { 1000056a: b500 push {lr} return cdd::sbc::tle9471::read_write_reg(SpiRequest, pucAddr, pucTxData, punRxData); 1000056c: f000 f802 bl 10000574 10000570: bd00 pop {pc} 10000572 : void cdd::sbc::init() { #ifdef CDDSBC_TLE9741 cdd::scb::tle9471::Init(); #endif } 10000572: 4770 bx lr 10000574 : // punRxData - pinter to received data over SPI // // \return ucRet - error code //----------------------------------------------------------------------------- uint8 cdd::sbc::tle9471::read_write_reg(teCddSbcSpiReqType SpiRequest, uint8 *pucAddr, uint8 *pucTxData, uint16 *punRxData) { 10000574: b500 push {lr} 10000576: b081 sub sp, #4 uint8 unRet = 0; uint16 unSpiTx; if (SpiRequest == 0U) 10000578: 7809 ldrb r1, [r1, #0] 1000057a: 2800 cmp r0, #0 1000057c: d102 bne.n 10000584 <..lin.1abb6634..1407ac6a.0_2> 1000057e <..lin.1abb6634..1407ac6a.0_1>: { unSpiTx = SPI_SBC_READ_FRAME(*pucAddr); 1000057e: 4668 mov r0, sp 10000580: 8041 strh r1, [r0, #2] 10000582: e007 b.n 10000594 <..lin.1abb6634..1407ac6a.0_2+0x10> 10000584 <..lin.1abb6634..1407ac6a.0_2>: spi_transmit(e_active_config_SBC, &unSpiTx, punRxData, 1U); } else { //Prepare SPI frame unSpiTx = SPI_SBC_WRITE_FRAME(*pucAddr, *pucTxData); 10000584: 7810 ldrb r0, [r2, #0] 10000586: 0200 lsls r0, r0, #8 10000588: 4308 orrs r0, r1 1000058a: 2180 movs r1, #128 ; 0x80 1000058c: 466a mov r2, sp // PRQA S 303 1 // correct usage (comes from the definition of SCB) spi_transmit(e_active_config_SBC, &unSpiTx, punRxData, 1U); } return unRet; 1000058e: 4308 orrs r0, r1 10000590: 8050 strh r0, [r2, #2] 10000592: 4610 mov r0, r2 10000594: 1c81 adds r1, r0, #2 10000596: 461a mov r2, r3 10000598: 2301 movs r3, #1 1000059a: 4618 mov r0, r3 1000059c: f001 fdad bl 100020fa 100005a0: 2000 movs r0, #0 100005a2: b001 add sp, #4 100005a4: bd00 pop {pc} 100005a6 : { 100005a6: b500 push {lr} 100005a8: b081 sub sp, #4 uint16 u16RxData = 0U; 100005aa: 4669 mov r1, sp 100005ac: 2000 movs r0, #0 100005ae: 8008 strh r0, [r1, #0] cdd::sbc::tle9471::read_write_reg(eCddSbc_WriteReg, &sbc_reg_init[index].reg_addr, &sbc_reg_init[index].reg_data, &u16RxData); 100005b0: 4808 ldr r0, [pc, #32] ; (100005d4 <__ghs_eofn_set_params__Q3_3cdd3sbc7tle9471FUcT1>) 100005b2: 466a mov r2, sp 100005b4: 7841 ldrb r1, [r0, #1] 100005b6: 7800 ldrb r0, [r0, #0] 100005b8: 0209 lsls r1, r1, #8 100005ba: 4308 orrs r0, r1 100005bc: 2180 movs r1, #128 ; 0x80 for (uint8 index = 0; index < TLE9471_INIT_REG; index++) 100005be: 4308 orrs r0, r1 100005c0: 8050 strh r0, [r2, #2] 100005c2: 1c91 adds r1, r2, #2 100005c4: 2301 movs r3, #1 100005c6: 4618 mov r0, r3 100005c8: f001 fd97 bl 100020fa } 100005cc: b001 add sp, #4 100005ce: bd00 pop {pc} 100005d0 : { (void)SpiId; (void)status; uint8 ucRet = 0xff; return ucRet; 100005d0: 20ff movs r0, #255 ; 0xff 100005d2: 4770 bx lr 100005d4 <__ghs_eofn_set_params__Q3_3cdd3sbc7tle9471FUcT1>: 100005d4: 16b0 asrs r0, r6, #26 100005d6: 0800 lsrs r0, r0, #32 100005d8 : // \return - //----------------------------------------------------------------------------- void Adc_Init(const Adc_ConfigType* ConfigPtr) { (void) ConfigPtr; } 100005d8: 4770 bx lr 100005da <__Adc_SubInit_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjAdc_inf>: //============================================================================= // Private functions definition //============================================================================= static void Adc_SubInit(volatile stc_PASS_SAR_t * baseAddr) { 100005da: b081 sub sp, #4 un_PASS_SAR_CTL_t unSarCtl = { 0 }; 100005dc: 4b99 ldr r3, [pc, #612] ; (10000844 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x2>) 100005de: 6901 ldr r1, [r0, #16] 100005e0: 220f movs r2, #15 baseAddr->unPRECOND_CTL.stcField.u4PRECOND_TIME = 0U; // Number ADC clock cycles that Preconditioning is done before the sample window starts 100005e2: 681b ldr r3, [r3, #0] 100005e4: 4391 bics r1, r2 100005e6: 6101 str r1, [r0, #16] 100005e8: 9300 str r3, [sp, #0] unSarCtl.stcField.u8PWRUP_TIME = 0U; // Number of cycles to wait to power up after IDLE_PWRDWN 100005ea: 0ad9 lsrs r1, r3, #11 100005ec: 02c9 lsls r1, r1, #11 unSarCtl.stcField.u1IDLE_PWRDWN = 0U; // When idle do not automatically power down the analog unSarCtl.stcField.u1MSB_STRETCH = 0U; // Use one cycle for Most Significant Bit unSarCtl.stcField.u1HALF_LSB = 0U; // Disable half LSB conversion unSarCtl.stcField.u1SARMUX_EN = 1U; // Enable SARMUX 100005ee: 2207 movs r2, #7 100005f0: 0752 lsls r2, r2, #29 100005f2: 4311 orrs r1, r2 unSarCtl.stcField.u1ADC_EN = 1U; // Enable ADC unSarCtl.stcField.u1ENABLED = 1U; // SAR IP enabled baseAddr->unCTL.u32Register = unSarCtl.u32Register; 100005f4: 6001 str r1, [r0, #0] } 100005f6: b001 add sp, #4 100005f8: 4770 bx lr 100005fa <__Adc_ChannelInit_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjAdc_inf>: /// Adc_ReadSingleHwPin_ForUnInitializedAdc. /// /// \return - //----------------------------------------------------------------------------- static void Adc_ChannelInit(volatile stc_PASS_SAR_CH_t* baseAddr, Adc_PinAddressType en_pinAddress) { 100005fa: b5f0 push {r4, r5, r6, r7, lr} 100005fc: b086 sub sp, #24 un_PASS_SAR_CH_SAMPLE_CTL_t unSampleCtl = { 0U }; 100005fe: 4b92 ldr r3, [pc, #584] ; (10000848 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x6>) 10000600: 681a ldr r2, [r3, #0] 10000602: 4b92 ldr r3, [pc, #584] ; (1000084c <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0xa>) un_PASS_SAR_CH_RANGE_CTL_t unRangeCtl = { 0U }; 10000604: 9200 str r2, [sp, #0] 10000606: 681a ldr r2, [r3, #0] 10000608: 4b91 ldr r3, [pc, #580] ; (10000850 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0xe>) un_PASS_SAR_CH_INTR_MASK_t unMask = { 0U }; 1000060a: 9201 str r2, [sp, #4] 1000060c: 681f ldr r7, [r3, #0] 1000060e: 4b91 ldr r3, [pc, #580] ; (10000854 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x12>) un_PASS_SAR_CH_TR_CTL_t unTrCtl = { 0U }; 10000610: 9702 str r7, [sp, #8] 10000612: 681e ldr r6, [r3, #0] 10000614: 4b90 ldr r3, [pc, #576] ; (10000858 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x16>) un_PASS_SAR_CH_POST_CTL_t unPostCtl = { 0U }; 10000616: 9603 str r6, [sp, #12] 10000618: 681d ldr r5, [r3, #0] 1000061a: 4b90 ldr r3, [pc, #576] ; (1000085c <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x1a>) un_PASS_SAR_CH_INTR_t unIntr = { 0U }; 1000061c: 9504 str r5, [sp, #16] 1000061e: 681a ldr r2, [r3, #0] unIntr.stcField.u1CH_OVERFLOW = 1U; // Clear channel overflow interrupt flag 10000620: 2307 movs r3, #7 10000622: 021b lsls r3, r3, #8 10000624: 431a orrs r2, r3 unIntr.stcField.u1CH_PULSE = 1U; // Clear channel pulse detect interrupt flag unIntr.stcField.u1CH_RANGE = 1U; // Clear range detect interrupt flag unIntr.stcField.u1GRP_CANCELLED = 1U; // Clear group canceled interrupt flag 10000626: 2407 movs r4, #7 10000628: 4322 orrs r2, r4 1000062a: 2377 movs r3, #119 ; 0x77 unIntr.stcField.u1GRP_DONE = 1U; // Clear group done interrupt unIntr.stcField.u1GRP_OVERFLOW = 1U; // Clear group overflow interrupt baseAddr->unINTR.u32Register = unIntr.u32Register; // Write to interrupt request register 1000062c: 439e bics r6, r3 unTrCtl.stcField.u3SEL = 0U; // No trigger selected (software trigger) unTrCtl.stcField.u3PRIO = 0U; // Highest priority for this channel 1000062e: 230b movs r3, #11 10000630: 021b lsls r3, r3, #8 unTrCtl.stcField.u2PREEMPT_TYPE = 3U; // Complete ongoing acquisition (including averaging), up on return Resume group from next channel unTrCtl.stcField.u1GROUP_END = 1U; // Last channel of the group 10000632: 431e orrs r6, r3 10000634: 2301 movs r3, #1 10000636: 07db lsls r3, r3, #31 unTrCtl.stcField.u1DONE_LEVEL = 1U; // Done flag is kept until the result register is read 10000638: 9205 str r2, [sp, #20] 1000063a: 6102 str r2, [r0, #16] 1000063c: 431e orrs r6, r3 1000063e: 0689 lsls r1, r1, #26 baseAddr->unTR_CTL.u32Register = unTrCtl.u32Register; // Write to trigger control register 10000640: 0e89 lsrs r1, r1, #26 unSampleCtl.stcField.u6PIN_ADDR = (uint32)en_pinAddress; // Address of the analog signal (pin) to be sampled by this channel 10000642: 2201 movs r2, #1 10000644: 02d2 lsls r2, r2, #11 10000646: 4311 orrs r1, r2 10000648: 2303 movs r3, #3 1000064a: 04db lsls r3, r3, #19 1000064c: 430b orrs r3, r1 1000064e: 9900 ldr r1, [sp, #0] 10000650: 9603 str r6, [sp, #12] 10000652: 0f09 lsrs r1, r1, #28 10000654: 0709 lsls r1, r1, #28 10000656: 4319 orrs r1, r3 10000658: 2201 movs r2, #1 unSampleCtl.stcField.u3EXT_MUX_SEL = 0U; // No external analog multiplexer selected because it is not used unSampleCtl.stcField.u1EXT_MUX_EN = 1U; // External analog multiplexer is disabled unSampleCtl.stcField.u2PRECOND_MODE = 0U; // No preconditioning unSampleCtl.stcField.u2OVERLAP_DIAG = 0U; // No overlap of SARMUX Diagnostics unSampleCtl.stcField.u12SAMPLE_TIME = 24U; // Set sampling time to 1.2 microseconds unSampleCtl.stcField.u1ALT_CAL = 0U; // Use regular calibration values 1000065a: 07d2 lsls r2, r2, #31 1000065c: 4391 bics r1, r2 1000065e: 6006 str r6, [r0, #0] 10000660: 6041 str r1, [r0, #4] baseAddr->unSAMPLE_CTL.u32Register = unSampleCtl.u32Register; // Write to sample control register 10000662: 9100 str r1, [sp, #0] unPostCtl.stcField.u3POST_PROC = 0U; // No post-processing 10000664: 497e ldr r1, [pc, #504] ; (10000860 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x1e>) unPostCtl.stcField.u1LEFT_ALIGN = 0U; // The data is right aligned 10000666: 4a7f ldr r2, [pc, #508] ; (10000864 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x22>) 10000668: 9101 str r1, [sp, #4] unPostCtl.stcField.u1SIGN_EXT = 0U; // Result data is unsigned (zero extended if needed) unPostCtl.stcField.u8AVG_CNT = 0U; // No averaging is used unPostCtl.stcField.u5SHIFT_R = 0U; // The result is not shifted unPostCtl.stcField.u2RANGE_MODE = 1U; // Inside range is used 1000066a: 43a5 bics r5, r4 1000066c: 4395 bics r5, r2 1000066e: 2203 movs r2, #3 10000670: 0592 lsls r2, r2, #22 10000672: 4395 bics r5, r2 10000674: 2201 movs r2, #1 10000676: 0592 lsls r2, r2, #22 baseAddr->unPOST_CTL.u32Register = unPostCtl.u32Register; // Write to post processing control register 10000678: 4315 orrs r5, r2 unRangeCtl.stcField.u16RANGE_LO = 0U; // low threshold is 0 1000067a: 6085 str r5, [r0, #8] 1000067c: 60c1 str r1, [r0, #12] unRangeCtl.stcField.u16RANGE_HI = 0x0FFFU; // high threshold is maximum (12 bit) TODO: to be modified if needed. baseAddr->unRANGE_CTL.u32Register = unRangeCtl.u32Register; 1000067e: 0222 lsls r2, r4, #8 unMask.stcField.u1CH_OVERFLOW_MASK = 0U; // No channel overflow interrupt 10000680: 4397 bics r7, r2 10000682: 08f9 lsrs r1, r7, #3 unMask.stcField.u1CH_PULSE_MASK = 0U; // No channel pulse interrupt unMask.stcField.u1CH_RANGE_MASK = 0U; // No channel range interrupt unMask.stcField.u1GRP_CANCELLED_MASK = 0U; // No group cancel interrupt 10000684: 00c9 lsls r1, r1, #3 10000686: 2401 movs r4, #1 10000688: 4321 orrs r1, r4 1000068a: 9102 str r1, [sp, #8] 1000068c: 6181 str r1, [r0, #24] unMask.stcField.u1GRP_DONE_MASK = 1U; // Group done interrupt mask enabled unMask.stcField.u1GRP_OVERFLOW_MASK = 0U; // No group overflow interrupt baseAddr->unINTR_MASK.u32Register = unMask.u32Register; // Write to interrupt mask register 1000068e: 6b81 ldr r1, [r0, #56] ; 0x38 baseAddr->unENABLE.stcField.u1CHAN_EN = 1U; // Enable channel 10000690: 9504 str r5, [sp, #16] 10000692: 4321 orrs r1, r4 10000694: 6381 str r1, [r0, #56] ; 0x38 while (baseAddr->unENABLE.stcField.u1CHAN_EN != 1U) {} // Wait for channel to enable 10000696: 6b81 ldr r1, [r0, #56] ; 0x38 10000698: 07c9 lsls r1, r1, #31 1000069a: d5fc bpl.n 10000696 <__Adc_ChannelInit_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjAdc_inf+0x9c> 1000069c <..lin.bedcd000..b899ee3f.0_1>: } 1000069c: b006 add sp, #24 1000069e: bdf0 pop {r4, r5, r6, r7, pc} 100006a0 : { 100006a0: b5f0 push {r4, r5, r6, r7, lr} 100006a2: b083 sub sp, #12 100006a4: 4615 mov r5, r2 100006a6: 461c mov r4, r3 if (channel == ADC_CH_0) 100006a8: 4a66 ldr r2, [pc, #408] ; (10000844 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x2>) 100006aa: 2900 cmp r1, #0 100006ac: 6812 ldr r2, [r2, #0] 100006ae: d11a bne.n 100006e6 <..lin.bedcd000..e089ba77.0_3> 100006b0 <..lin.bedcd000..e089ba77.0_2>: baseAddr = PASS0_SAR0_CH0; 100006b0: 4b6d ldr r3, [pc, #436] ; (10000868 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x26>) Adc_SubInit(&PASS0->SAR[0]); 100006b2: 9200 str r2, [sp, #0] 100006b4: 220f movs r2, #15 100006b6: 6819 ldr r1, [r3, #0] 100006b8: 4391 bics r1, r2 100006ba: 6019 str r1, [r3, #0] 100006bc: 9900 ldr r1, [sp, #0] 100006be: 4e6b ldr r6, [pc, #428] ; (1000086c <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x2a>) 100006c0: 0ac9 lsrs r1, r1, #11 100006c2: 02c9 lsls r1, r1, #11 100006c4: 2207 movs r2, #7 100006c6: 4b6a ldr r3, [pc, #424] ; (10000870 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x2e>) 100006c8: 0752 lsls r2, r2, #29 100006ca: 4311 orrs r1, r2 100006cc: 9100 str r1, [sp, #0] 100006ce: 6019 str r1, [r3, #0] 100006d0: 4601 mov r1, r0 100006d2: 4630 mov r0, r6 100006d4: f7ff ff91 bl 100005fa <__Adc_ChannelInit_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjAdc_inf> 100006d8: 2000 movs r0, #0 100006da: 4621 mov r1, r4 100006dc: 08e4 lsrs r4, r4, #3 100006de: 4b65 ldr r3, [pc, #404] ; (10000874 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x32>) 100006e0: d100 bne.n 100006e4 <..lin.bedcd000..e089ba77.0_2+0x34> 100006e2: e097 b.n 10000814 <..lin.bedcd000..e089ba77.0_5+0xf6> 100006e4: e034 b.n 10000750 <..lin.bedcd000..e089ba77.0_5+0x32> 100006e6 <..lin.bedcd000..e089ba77.0_3>: else if (channel == ADC_CH_1) 100006e6: 2901 cmp r1, #1 100006e8: d119 bne.n 1000071e <..lin.bedcd000..e089ba77.0_5> 100006ea <..lin.bedcd000..e089ba77.0_4>: baseAddr = PASS0_SAR1_CH0; 100006ea: 4b63 ldr r3, [pc, #396] ; (10000878 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x36>) Adc_SubInit(&PASS0->SAR[1]); 100006ec: 9201 str r2, [sp, #4] 100006ee: 220f movs r2, #15 100006f0: 6819 ldr r1, [r3, #0] 100006f2: 4391 bics r1, r2 100006f4: 6019 str r1, [r3, #0] 100006f6: 9901 ldr r1, [sp, #4] 100006f8: 4e60 ldr r6, [pc, #384] ; (1000087c <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x3a>) 100006fa: 0ac9 lsrs r1, r1, #11 100006fc: 02c9 lsls r1, r1, #11 100006fe: 2207 movs r2, #7 10000700: 4b5f ldr r3, [pc, #380] ; (10000880 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x3e>) 10000702: 0752 lsls r2, r2, #29 10000704: 4311 orrs r1, r2 10000706: 9101 str r1, [sp, #4] 10000708: 6019 str r1, [r3, #0] 1000070a: 4601 mov r1, r0 1000070c: 4630 mov r0, r6 1000070e: f7ff ff74 bl 100005fa <__Adc_ChannelInit_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjAdc_inf> 10000712: 2000 movs r0, #0 10000714: 4621 mov r1, r4 10000716: 08e4 lsrs r4, r4, #3 10000718: 4b56 ldr r3, [pc, #344] ; (10000874 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x32>) 1000071a: d07b beq.n 10000814 <..lin.bedcd000..e089ba77.0_5+0xf6> 1000071c: e018 b.n 10000750 <..lin.bedcd000..e089ba77.0_5+0x32> 1000071e <..lin.bedcd000..e089ba77.0_5>: baseAddr = PASS0_SAR2_CH0; 1000071e: 4b59 ldr r3, [pc, #356] ; (10000884 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x42>) Adc_SubInit(&PASS0->SAR[2]); 10000720: 9202 str r2, [sp, #8] 10000722: 220f movs r2, #15 10000724: 6819 ldr r1, [r3, #0] 10000726: 4391 bics r1, r2 10000728: 6019 str r1, [r3, #0] 1000072a: 9902 ldr r1, [sp, #8] 1000072c: 4e56 ldr r6, [pc, #344] ; (10000888 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x46>) 1000072e: 0ac9 lsrs r1, r1, #11 10000730: 02c9 lsls r1, r1, #11 10000732: 2207 movs r2, #7 10000734: 4b55 ldr r3, [pc, #340] ; (1000088c <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x4a>) 10000736: 0752 lsls r2, r2, #29 10000738: 4311 orrs r1, r2 1000073a: 9102 str r1, [sp, #8] 1000073c: 6019 str r1, [r3, #0] Adc_ChannelInit(baseAddr, en_pinAddress); 1000073e: 4601 mov r1, r0 10000740: 4630 mov r0, r6 10000742: f7ff ff5a bl 100005fa <__Adc_ChannelInit_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjAdc_inf> for (uint8 u8__NumberOfReads = 0; u8__NumberOfReads < u8__ResultArraySize_NumberOfReads; u8__NumberOfReads++) 10000746: 2000 movs r0, #0 10000748: 4621 mov r1, r4 1000074a: 08e4 lsrs r4, r4, #3 1000074c: 4b49 ldr r3, [pc, #292] ; (10000874 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc+0x32>) 1000074e: d061 beq.n 10000814 <..lin.bedcd000..e089ba77.0_5+0xf6> 10000750: 6bf2 ldr r2, [r6, #60] ; 0x3c 10000752: 2701 movs r7, #1 10000754: 433a orrs r2, r7 10000756: 63f2 str r2, [r6, #60] ; 0x3c 10000758: 6932 ldr r2, [r6, #16] 1000075a: 07d2 lsls r2, r2, #31 1000075c: d5fc bpl.n 10000758 <..lin.bedcd000..e089ba77.0_5+0x3a> 1000075e: 6a72 ldr r2, [r6, #36] ; 0x24 10000760: 401a ands r2, r3 10000762: 0047 lsls r7, r0, #1 10000764: 537a strh r2, [r7, r5] 10000766: 6bf2 ldr r2, [r6, #60] ; 0x3c 10000768: 2701 movs r7, #1 1000076a: 433a orrs r2, r7 1000076c: 63f2 str r2, [r6, #60] ; 0x3c 1000076e: 6932 ldr r2, [r6, #16] 10000770: 07d2 lsls r2, r2, #31 10000772: d5fc bpl.n 1000076e <..lin.bedcd000..e089ba77.0_5+0x50> 10000774: 6a72 ldr r2, [r6, #36] ; 0x24 10000776: 401a ands r2, r3 10000778: 1c47 adds r7, r0, #1 1000077a: 007f lsls r7, r7, #1 1000077c: 537a strh r2, [r7, r5] 1000077e: 6bf2 ldr r2, [r6, #60] ; 0x3c 10000780: 2701 movs r7, #1 10000782: 433a orrs r2, r7 10000784: 63f2 str r2, [r6, #60] ; 0x3c 10000786: 6932 ldr r2, [r6, #16] 10000788: 07d2 lsls r2, r2, #31 1000078a: d5fc bpl.n 10000786 <..lin.bedcd000..e089ba77.0_5+0x68> 1000078c: 6a72 ldr r2, [r6, #36] ; 0x24 1000078e: 401a ands r2, r3 10000790: 1c87 adds r7, r0, #2 10000792: 007f lsls r7, r7, #1 10000794: 537a strh r2, [r7, r5] 10000796: 6bf2 ldr r2, [r6, #60] ; 0x3c 10000798: 2701 movs r7, #1 1000079a: 433a orrs r2, r7 1000079c: 63f2 str r2, [r6, #60] ; 0x3c 1000079e: 6932 ldr r2, [r6, #16] 100007a0: 07d2 lsls r2, r2, #31 100007a2: d5fc bpl.n 1000079e <..lin.bedcd000..e089ba77.0_5+0x80> 100007a4: 6a72 ldr r2, [r6, #36] ; 0x24 100007a6: 401a ands r2, r3 100007a8: 1cc7 adds r7, r0, #3 100007aa: 007f lsls r7, r7, #1 100007ac: 537a strh r2, [r7, r5] 100007ae: 6bf2 ldr r2, [r6, #60] ; 0x3c 100007b0: 2701 movs r7, #1 100007b2: 433a orrs r2, r7 100007b4: 63f2 str r2, [r6, #60] ; 0x3c 100007b6: 6932 ldr r2, [r6, #16] 100007b8: 07d2 lsls r2, r2, #31 100007ba: d5fc bpl.n 100007b6 <..lin.bedcd000..e089ba77.0_5+0x98> 100007bc: 6a72 ldr r2, [r6, #36] ; 0x24 100007be: 401a ands r2, r3 100007c0: 1d07 adds r7, r0, #4 100007c2: 007f lsls r7, r7, #1 100007c4: 537a strh r2, [r7, r5] 100007c6: 6bf2 ldr r2, [r6, #60] ; 0x3c 100007c8: 2701 movs r7, #1 100007ca: 433a orrs r2, r7 100007cc: 63f2 str r2, [r6, #60] ; 0x3c 100007ce: 6932 ldr r2, [r6, #16] 100007d0: 07d2 lsls r2, r2, #31 100007d2: d5fc bpl.n 100007ce <..lin.bedcd000..e089ba77.0_5+0xb0> 100007d4: 6a72 ldr r2, [r6, #36] ; 0x24 100007d6: 401a ands r2, r3 100007d8: 1d47 adds r7, r0, #5 100007da: 007f lsls r7, r7, #1 100007dc: 537a strh r2, [r7, r5] 100007de: 6bf2 ldr r2, [r6, #60] ; 0x3c 100007e0: 2701 movs r7, #1 100007e2: 433a orrs r2, r7 100007e4: 63f2 str r2, [r6, #60] ; 0x3c 100007e6: 6932 ldr r2, [r6, #16] 100007e8: 07d2 lsls r2, r2, #31 100007ea: d5fc bpl.n 100007e6 <..lin.bedcd000..e089ba77.0_5+0xc8> 100007ec: 6a72 ldr r2, [r6, #36] ; 0x24 100007ee: 401a ands r2, r3 100007f0: 1d87 adds r7, r0, #6 100007f2: 007f lsls r7, r7, #1 100007f4: 537a strh r2, [r7, r5] 100007f6: 6bf2 ldr r2, [r6, #60] ; 0x3c 100007f8: 2701 movs r7, #1 100007fa: 433a orrs r2, r7 100007fc: 63f2 str r2, [r6, #60] ; 0x3c 100007fe: 6932 ldr r2, [r6, #16] 10000800: 07d2 lsls r2, r2, #31 10000802: d5fc bpl.n 100007fe <..lin.bedcd000..e089ba77.0_5+0xe0> 10000804: 6a72 ldr r2, [r6, #36] ; 0x24 10000806: 401a ands r2, r3 10000808: 1dc7 adds r7, r0, #7 1000080a: 007f lsls r7, r7, #1 1000080c: 537a strh r2, [r7, r5] 1000080e: 3008 adds r0, #8 10000810: 3c01 subs r4, #1 10000812: d19d bne.n 10000750 <..lin.bedcd000..e089ba77.0_5+0x32> 10000814: 0749 lsls r1, r1, #29 10000816: 0f49 lsrs r1, r1, #29 10000818: d00d beq.n 10000836 <..lin.bedcd000..e089ba77.0_6> 1000081a: 6bf2 ldr r2, [r6, #60] ; 0x3c 1000081c: 2401 movs r4, #1 1000081e: 4322 orrs r2, r4 10000820: 63f2 str r2, [r6, #60] ; 0x3c 10000822: 6932 ldr r2, [r6, #16] 10000824: 07d2 lsls r2, r2, #31 10000826: d5fc bpl.n 10000822 <..lin.bedcd000..e089ba77.0_5+0x104> 10000828: 6a72 ldr r2, [r6, #36] ; 0x24 1000082a: 401a ands r2, r3 1000082c: 0044 lsls r4, r0, #1 1000082e: 5362 strh r2, [r4, r5] 10000830: 3001 adds r0, #1 10000832: 3901 subs r1, #1 10000834: d1f1 bne.n 1000081a <..lin.bedcd000..e089ba77.0_5+0xfc> 10000836 <..lin.bedcd000..e089ba77.0_6>: baseAddr->unENABLE.stcField.u1CHAN_EN = 0U; // Disable channel 10000836: 6bb0 ldr r0, [r6, #56] ; 0x38 10000838: 2101 movs r1, #1 1000083a: 4388 bics r0, r1 1000083c: 63b0 str r0, [r6, #56] ; 0x38 } 1000083e: b003 add sp, #12 10000840: bdf0 pop {r4, r5, r6, r7, pc} 10000842 <__ghs_eofn_Adc_ReadSingleHwPin_ForUnInitializedAdc>: 10000842: bf00 nop 10000844: 4a7c ldr r2, [pc, #496] ; (10000a38 <..lin.bedd124c..1dbb5c0c.0_5+0x3a>) 10000846: 1000 asrs r0, r0, #32 10000848: 4a80 ldr r2, [pc, #512] ; (10000a4c <..lin.bedd124c..a7cb1eea.0_7>) 1000084a: 1000 asrs r0, r0, #32 1000084c: 4a84 ldr r2, [pc, #528] ; (10000a60 <..lin.bedd124c..a7cb1eea.0_8>) 1000084e: 1000 asrs r0, r0, #32 10000850: 4a88 ldr r2, [pc, #544] ; (10000a74 ) 10000852: 1000 asrs r0, r0, #32 10000854: 4a8c ldr r2, [pc, #560] ; (10000a88 ) 10000856: 1000 asrs r0, r0, #32 10000858: 4a90 ldr r2, [pc, #576] ; (10000a9c ) 1000085a: 1000 asrs r0, r0, #32 1000085c: 4a94 ldr r2, [pc, #592] ; (10000ab0 ) 1000085e: 1000 asrs r0, r0, #32 10000860: 0000 movs r0, r0 10000862: 0fff lsrs r7, r7, #31 10000864: ffc0 001f vmov.i32 d16, #143 ; 0x0000008f 10000868: 0010 movs r0, r2 1000086a: 4090 lsls r0, r2 1000086c: 0800 lsrs r0, r0, #32 1000086e: 4090 lsls r0, r2 10000870: 0000 movs r0, r0 10000872: 4090 lsls r0, r2 10000874: 0fff lsrs r7, r7, #31 10000876: 0000 movs r0, r0 10000878: 1010 asrs r0, r2, #32 1000087a: 4090 lsls r0, r2 1000087c: 1800 adds r0, r0, r0 1000087e: 4090 lsls r0, r2 10000880: 1000 asrs r0, r0, #32 10000882: 4090 lsls r0, r2 10000884: 2010 movs r0, #16 10000886: 4090 lsls r0, r2 10000888: 2800 cmp r0, #0 1000088a: 4090 lsls r0, r2 1000088c: 2000 movs r0, #0 1000088e: 4090 lsls r0, r2 10000890 : // \return void //----------------------------------------------------------------------------- void Pwm_EnableChannel(Pwm_ChannelHandleType handle) { // Enable channel asPwmChannelConfig[handle].pwmChBaseAddr->unCTRL.stcField.u1ENABLED = 1U; 10000890: 49b4 ldr r1, [pc, #720] ; (10000b64 <__ghs_eofn_Pwm_StopSynchronizedChannels+0x2>) 10000892: 2301 movs r3, #1 10000894: 6848 ldr r0, [r1, #4] 10000896: 07db lsls r3, r3, #31 10000898: 6802 ldr r2, [r0, #0] 1000089a: 431a orrs r2, r3 1000089c: 6002 str r2, [r0, #0] // Set counter value to start from offset value (initial phase-shift) asPwmChannelConfig[handle].pwmChBaseAddr->unCOUNTER.u32Register = asPwmChannelConfig[handle].offset; 1000089e: 694a ldr r2, [r1, #20] 100008a0: 7e09 ldrb r1, [r1, #24] if (asPwmChannelConfig[handle].synchronized == TRUE) 100008a2: 6082 str r2, [r0, #8] 100008a4: 2901 cmp r1, #1 100008a6: d112 bne.n 100008ce <..lin.bedd124c..854a3238.0_2> 100008a8 <..lin.bedd124c..854a3238.0_1>: { // Select synchronized stop of the channel asPwmChannelConfig[handle].pwmChBaseAddr->unCTRL.stcField.u1PWM_SYNC_KILL = 1U; 100008a8: 6801 ldr r1, [r0, #0] 100008aa: 2201 movs r2, #1 100008ac: 0292 lsls r2, r2, #10 100008ae: 4311 orrs r1, r2 100008b0: 6001 str r1, [r0, #0] // Select start trigger for starting the channels synchronously - id corresponding to TRIG_OUT_MUX_4_TCPWM_ALL_CNT_TR_IN0 asPwmChannelConfig[handle].pwmChBaseAddr->unTR_IN_SEL1.stcField.u8START_SEL = 5U; 100008b2: 6c81 ldr r1, [r0, #72] ; 0x48 100008b4: 22ff movs r2, #255 ; 0xff 100008b6: 4391 bics r1, r2 100008b8: 2305 movs r3, #5 100008ba: 4319 orrs r1, r3 100008bc: 6481 str r1, [r0, #72] ; 0x48 // Select stop trigger for stopping the channels synchronously - id corresponding to TRIG_OUT_MUX_4_TCPWM_ALL_CNT_TR_IN1 asPwmChannelConfig[handle].pwmChBaseAddr->unTR_IN_SEL0.stcField.u8STOP_SEL = 6U; 100008be: 6c41 ldr r1, [r0, #68] ; 0x44 100008c0: 0612 lsls r2, r2, #24 100008c2: 4391 bics r1, r2 100008c4: 2203 movs r2, #3 100008c6: 0652 lsls r2, r2, #25 100008c8: 4311 orrs r1, r2 100008ca: 6441 str r1, [r0, #68] ; 0x44 100008cc: e003 b.n 100008d6 <..lin.bedd124c..854a3238.0_2+0x8> 100008ce <..lin.bedd124c..854a3238.0_2>: } else { // Software start trigger asPwmChannelConfig[handle].pwmChBaseAddr->unTR_CMD.stcField.u1START = 1U; 100008ce: 6c01 ldr r1, [r0, #64] ; 0x40 100008d0: 2210 movs r2, #16 100008d2: 4311 orrs r1, r2 100008d4: 6401 str r1, [r0, #64] ; 0x40 } } 100008d6: 4770 bx lr 100008d8 : { 100008d8: b530 push {r4, r5, lr} asPwmChannelConfig[unIdx].pwmChBaseAddr->unCTRL.stcField.u1ONE_SHOT = 0U; // Counter runs forever 100008da: 49a2 ldr r1, [pc, #648] ; (10000b64 <__ghs_eofn_Pwm_StopSynchronizedChannels+0x2>) 100008dc: 2301 movs r3, #1 100008de: 6848 ldr r0, [r1, #4] 100008e0: 049b lsls r3, r3, #18 100008e2: 6802 ldr r2, [r0, #0] 100008e4: 439a bics r2, r3 100008e6: 6002 str r2, [r0, #0] asPwmChannelConfig[unIdx].pwmChBaseAddr->unCTRL.stcField.u2UP_DOWN_MODE = (uint32)asPwmChannelConfig[unIdx].countDir; // Count direction 100008e8: 7c4a ldrb r2, [r1, #17] 100008ea: 6804 ldr r4, [r0, #0] 100008ec: 2303 movs r3, #3 100008ee: 041b lsls r3, r3, #16 100008f0: 439c bics r4, r3 100008f2: 0793 lsls r3, r2, #30 100008f4: 0b9b lsrs r3, r3, #14 100008f6: 431c orrs r4, r3 100008f8: 6004 str r4, [r0, #0] asPwmChannelConfig[unIdx].pwmChBaseAddr->unCTRL.stcField.u3MODE = 4U; // Standard PWM mode 100008fa: 6803 ldr r3, [r0, #0] 100008fc: 2407 movs r4, #7 100008fe: 0624 lsls r4, r4, #24 10000900: 43a3 bics r3, r4 10000902: 2401 movs r4, #1 10000904: 06a4 lsls r4, r4, #26 10000906: 4323 orrs r3, r4 10000908: 6003 str r3, [r0, #0] asPwmChannelConfig[unIdx].pwmChBaseAddr->unCTRL.stcField.u1DBG_FREEZE_EN = 0U; // The counter operation continues in debug mode 1000090a: 6803 ldr r3, [r0, #0] 1000090c: 2401 movs r4, #1 1000090e: 07a4 lsls r4, r4, #30 10000910: 43a3 bics r3, r4 10000912: 6003 str r3, [r0, #0] asPwmChannelConfig[unIdx].pwmChBaseAddr->unCTRL.stcField.u1AUTO_RELOAD_CC0 = 0U; // Switching of the CC0 and buffered CC0 values is disabled 10000914: 6803 ldr r3, [r0, #0] 10000916: 2501 movs r5, #1 10000918: 43ab bics r3, r5 1000091a: 6003 str r3, [r0, #0] asPwmChannelConfig[unIdx].pwmChBaseAddr->unCTRL.stcField.u1AUTO_RELOAD_PERIOD = 0U; // Switching of the PERIOD and buffered PERIOD values is disabled 1000091c: 6803 ldr r3, [r0, #0] 1000091e: 2504 movs r5, #4 10000920: 43ab bics r3, r5 10000922: 6003 str r3, [r0, #0] asPwmChannelConfig[unIdx].pwmChBaseAddr->unCTRL.stcField.u1AUTO_RELOAD_LINE_SEL = 0U; // Switching of the LINE_SEL and buffered LINE_BUFF_SEL values is disabled 10000924: 6803 ldr r3, [r0, #0] 10000926: 2408 movs r4, #8 10000928: 43a3 bics r3, r4 1000092a: 6003 str r3, [r0, #0] asPwmChannelConfig[unIdx].pwmChBaseAddr->unCTRL.stcField.u1PWM_STOP_ON_KILL = 1U; // Kill event stops counter 1000092c: 6803 ldr r3, [r0, #0] 1000092e: 2401 movs r4, #1 10000930: 0264 lsls r4, r4, #9 10000932: 4323 orrs r3, r4 10000934: 6003 str r3, [r0, #0] asPwmChannelConfig[unIdx].pwmChBaseAddr->unCTRL.stcField.u2PWM_DISABLE_MODE = 1U; // When PWM is disabled the line will be retained 10000936: 6803 ldr r3, [r0, #0] 10000938: 2403 movs r4, #3 1000093a: 0324 lsls r4, r4, #12 1000093c: 43a3 bics r3, r4 1000093e: 2401 movs r4, #1 10000940: 0324 lsls r4, r4, #12 10000942: 4323 orrs r3, r4 10000944: 6003 str r3, [r0, #0] asPwmChannelConfig[unIdx].pwmChBaseAddr->unDT.stcField.u8DT_LINE_OUT_L = (uint32)asPwmClockConfig[unIdx].prescaler; // Selected clock prescaler 10000946: 6b03 ldr r3, [r0, #48] ; 0x30 10000948: 24ff movs r4, #255 ; 0xff 1000094a: 43a3 bics r3, r4 1000094c: 2501 movs r5, #1 1000094e: 432b orrs r3, r5 10000950: 6303 str r3, [r0, #48] ; 0x30 asPwmChannelConfig[unIdx].pwmChBaseAddr->unCOUNTER.u32Register = 0U; // Initial counter value 10000952: 2300 movs r3, #0 10000954: 6083 str r3, [r0, #8] asPwmChannelConfig[unIdx].pwmChBaseAddr->unCC0.u32Register = asPwmChannelConfig[unIdx].compare; // Compare value for toggling the line 10000956: 68cb ldr r3, [r1, #12] 10000958: 6103 str r3, [r0, #16] asPwmChannelConfig[unIdx].pwmChBaseAddr->unPERIOD.u32Register = asPwmChannelConfig[unIdx].period - 1U; // Period of the PWM channel 1000095a: 688b ldr r3, [r1, #8] 1000095c: 3b01 subs r3, #1 1000095e: 6203 str r3, [r0, #32] asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_IN_SEL0.stcField.u8CAPTURE0_SEL = 0U; // Input trigger 0 10000960: 6c43 ldr r3, [r0, #68] ; 0x44 10000962: 43a3 bics r3, r4 10000964: 6443 str r3, [r0, #68] ; 0x44 asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_IN_SEL0.stcField.u8RELOAD_SEL = 0U; // Input trigger 0 as reload trigger 10000966: 6c43 ldr r3, [r0, #68] ; 0x44 10000968: 0424 lsls r4, r4, #16 1000096a: 43a3 bics r3, r4 1000096c: 6443 str r3, [r0, #68] ; 0x44 asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_IN_SEL0.stcField.u8STOP_SEL = 0U; // Input trigger 0 as stop trigger 1000096e: 6c43 ldr r3, [r0, #68] ; 0x44 10000970: 24ff movs r4, #255 ; 0xff 10000972: 0624 lsls r4, r4, #24 10000974: 43a3 bics r3, r4 10000976: 6443 str r3, [r0, #68] ; 0x44 asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_IN_SEL0.stcField.u8COUNT_SEL = 1U; // Input trigger 1 as count trigger 10000978: 6c43 ldr r3, [r0, #68] ; 0x44 1000097a: 24ff movs r4, #255 ; 0xff 1000097c: 0224 lsls r4, r4, #8 1000097e: 43a3 bics r3, r4 10000980: 35ff adds r5, #255 ; 0xff 10000982: 432b orrs r3, r5 10000984: 6443 str r3, [r0, #68] ; 0x44 asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_IN_SEL1.stcField.u8START_SEL = 0U; // Input trigger 0 as start trigger 10000986: 6c83 ldr r3, [r0, #72] ; 0x48 10000988: 24ff movs r4, #255 ; 0xff 1000098a: 43a3 bics r3, r4 1000098c: 6483 str r3, [r0, #72] ; 0x48 asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_IN_EDGE_SEL.stcField.u2CAPTURE0_EDGE = 3U; // No edge detection, use trigger as it is. 1000098e: 6cc3 ldr r3, [r0, #76] ; 0x4c 10000990: 2503 movs r5, #3 10000992: 432b orrs r3, r5 10000994: 64c3 str r3, [r0, #76] ; 0x4c asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_IN_EDGE_SEL.stcField.u2RELOAD_EDGE = 3U; // No edge detection, use trigger as it is. 10000996: 6cc3 ldr r3, [r0, #76] ; 0x4c 10000998: 2430 movs r4, #48 ; 0x30 1000099a: 4323 orrs r3, r4 1000099c: 64c3 str r3, [r0, #76] ; 0x4c asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_IN_EDGE_SEL.stcField.u2START_EDGE = 3U; // No edge detection, use trigger as it is. 1000099e: 6cc3 ldr r3, [r0, #76] ; 0x4c 100009a0: 022c lsls r4, r5, #8 100009a2: 4323 orrs r3, r4 100009a4: 64c3 str r3, [r0, #76] ; 0x4c asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_IN_EDGE_SEL.stcField.u2STOP_EDGE = 3U; // No edge detection, use trigger as it is. 100009a6: 6cc3 ldr r3, [r0, #76] ; 0x4c 100009a8: 24c0 movs r4, #192 ; 0xc0 100009aa: 4323 orrs r3, r4 100009ac: 64c3 str r3, [r0, #76] ; 0x4c asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_IN_EDGE_SEL.stcField.u2COUNT_EDGE = 3U; // No edge detection, use trigger as it is. 100009ae: 6cc3 ldr r3, [r0, #76] ; 0x4c 100009b0: 240c movs r4, #12 100009b2: 4323 orrs r3, r4 100009b4: 64c3 str r3, [r0, #76] ; 0x4c asPwmChannelConfig[unIdx].pwmChBaseAddr->unINTR_MASK.u32Register = 0U; // No interrupts 100009b6: 2300 movs r3, #0 100009b8: 6783 str r3, [r0, #120] ; 0x78 if (asPwmChannelConfig[unIdx].countDir == PWM_COUNT_UP) 100009ba: 6d03 ldr r3, [r0, #80] ; 0x50 100009bc: 2a00 cmp r2, #0 100009be: d110 bne.n 100009e2 <..lin.bedd124c..1dbb5c0c.0_4> 100009c0 <..lin.bedd124c..1dbb5c0c.0_3>: asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_PWM_CTRL.stcField.u2CC0_MATCH_MODE = 1U; // Clear for CC0 match 100009c0: 089a lsrs r2, r3, #2 100009c2: 0092 lsls r2, r2, #2 100009c4: 2301 movs r3, #1 100009c6: 431a orrs r2, r3 100009c8: 6502 str r2, [r0, #80] ; 0x50 asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_PWM_CTRL.stcField.u2OVERFLOW_MODE = 0U; // Set to 1 for overflow mode 100009ca: 6d02 ldr r2, [r0, #80] ; 0x50 100009cc: 43a2 bics r2, r4 asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_PWM_CTRL.stcField.u2UNDERFLOW_MODE = 3U; // No change for underflow mode 100009ce: 6502 str r2, [r0, #80] ; 0x50 100009d0: 6d03 ldr r3, [r0, #80] ; 0x50 100009d2: 2230 movs r2, #48 ; 0x30 100009d4: 4393 bics r3, r2 100009d6: 4313 orrs r3, r2 100009d8: 6503 str r3, [r0, #80] ; 0x50 100009da: 7c0a ldrb r2, [r1, #16] 100009dc: 2a01 cmp r2, #1 100009de: d12e bne.n 10000a3e <..lin.bedd124c..1dbb5c0c.0_6> 100009e0: e00d b.n 100009fe <..lin.bedd124c..1dbb5c0c.0_5> 100009e2 <..lin.bedd124c..1dbb5c0c.0_4>: asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_PWM_CTRL.stcField.u2CC0_MATCH_MODE = 0U; // Set to 1 for CC0 match 100009e2: 43ab bics r3, r5 100009e4: 6503 str r3, [r0, #80] ; 0x50 asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_PWM_CTRL.stcField.u2OVERFLOW_MODE = 3U; // No change for overflow mode 100009e6: 6d02 ldr r2, [r0, #80] ; 0x50 100009e8: 4322 orrs r2, r4 asPwmChannelConfig[unIdx].pwmChBaseAddr->unTR_PWM_CTRL.stcField.u2UNDERFLOW_MODE = 1U; // Set to 0 for underflow mode 100009ea: 6502 str r2, [r0, #80] ; 0x50 if (asPwmChannelConfig[unIdx].runAtStartup == TRUE) 100009ec: 6d03 ldr r3, [r0, #80] ; 0x50 100009ee: 2230 movs r2, #48 ; 0x30 100009f0: 4393 bics r3, r2 100009f2: 2210 movs r2, #16 100009f4: 4313 orrs r3, r2 100009f6: 6503 str r3, [r0, #80] ; 0x50 100009f8: 7c0a ldrb r2, [r1, #16] 100009fa: 2a01 cmp r2, #1 100009fc: d11f bne.n 10000a3e <..lin.bedd124c..1dbb5c0c.0_6> 100009fe <..lin.bedd124c..1dbb5c0c.0_5>: Pwm_EnableChannel(asPwmChannelConfig[unIdx].handle); 100009fe: 6802 ldr r2, [r0, #0] 10000a00: 2301 movs r3, #1 10000a02: 07db lsls r3, r3, #31 10000a04: 431a orrs r2, r3 10000a06: 6002 str r2, [r0, #0] 10000a08: 694a ldr r2, [r1, #20] 10000a0a: 6082 str r2, [r0, #8] 10000a0c: 7e09 ldrb r1, [r1, #24] 10000a0e: 2901 cmp r1, #1 10000a10: d111 bne.n 10000a36 <..lin.bedd124c..1dbb5c0c.0_5+0x38> 10000a12: 6801 ldr r1, [r0, #0] 10000a14: 2201 movs r2, #1 10000a16: 0292 lsls r2, r2, #10 10000a18: 4311 orrs r1, r2 10000a1a: 6001 str r1, [r0, #0] 10000a1c: 6c81 ldr r1, [r0, #72] ; 0x48 10000a1e: 22ff movs r2, #255 ; 0xff 10000a20: 4391 bics r1, r2 10000a22: 2305 movs r3, #5 10000a24: 4319 orrs r1, r3 10000a26: 6481 str r1, [r0, #72] ; 0x48 10000a28: 6c41 ldr r1, [r0, #68] ; 0x44 10000a2a: 0612 lsls r2, r2, #24 10000a2c: 4391 bics r1, r2 10000a2e: 066a lsls r2, r5, #25 10000a30: 4311 orrs r1, r2 10000a32: 6441 str r1, [r0, #68] ; 0x44 10000a34: e003 b.n 10000a3e <..lin.bedd124c..1dbb5c0c.0_6> 10000a36: 6c01 ldr r1, [r0, #64] ; 0x40 10000a38: 2210 movs r2, #16 10000a3a: 4311 orrs r1, r2 10000a3c: 6401 str r1, [r0, #64] ; 0x40 10000a3e <..lin.bedd124c..1dbb5c0c.0_6>: } 10000a3e: bd30 pop {r4, r5, pc} 10000a40 : { 10000a40: b510 push {r4, lr} if (dutyCyclePercent == MIN_DUTY_CYCLE) 10000a42: 4c48 ldr r4, [pc, #288] ; (10000b64 <__ghs_eofn_Pwm_StopSynchronizedChannels+0x2>) 10000a44: 2900 cmp r1, #0 10000a46: d103 bne.n 10000a50 <..lin.bedd124c..a7cb1eea.0_7+0x4> 10000a48: 6860 ldr r0, [r4, #4] 10000a4a: 6101 str r1, [r0, #16] 10000a4c <..lin.bedd124c..a7cb1eea.0_7>: asPwmChannelConfig[handle].compare = 0U; 10000a4c: 4608 mov r0, r1 10000a4e: e00f b.n 10000a70 <..lin.bedd124c..a7cb1eea.0_9+0xe> 10000a50: 227d movs r2, #125 ; 0x7d 10000a52: 00d2 lsls r2, r2, #3 10000a54: 68a0 ldr r0, [r4, #8] 10000a56: 4291 cmp r1, r2 10000a58: d103 bne.n 10000a62 <..lin.bedd124c..a7cb1eea.0_9> 10000a5a: 6861 ldr r1, [r4, #4] 10000a5c: 1c42 adds r2, r0, #1 10000a5e: 610a str r2, [r1, #16] 10000a60 <..lin.bedd124c..a7cb1eea.0_8>: asPwmChannelConfig[handle].compare = asPwmChannelConfig[handle].period; 10000a60: e006 b.n 10000a70 <..lin.bedd124c..a7cb1eea.0_9+0xe> 10000a62 <..lin.bedd124c..a7cb1eea.0_9>: 10000a62: 4341 muls r1, r0 10000a64: 4610 mov r0, r2 10000a66: f003 fe41 bl 100046ec <__udiv_32_32> 10000a6a: 6861 ldr r1, [r4, #4] asPwmChannelConfig[handle].pwmChBaseAddr->unCC0.u32Register = compareValue; 10000a6c: b280 uxth r0, r0 asPwmChannelConfig[handle].compare = compareValue; 10000a6e: 6108 str r0, [r1, #16] 10000a70: 60e0 str r0, [r4, #12] } 10000a72: bd10 pop {r4, pc} 10000a74 : // // \return void //----------------------------------------------------------------------------- void Pwm_DisableChannel(Pwm_ChannelHandleType handle) { asPwmChannelConfig[handle].pwmChBaseAddr->unCTRL.stcField.u1ENABLED = 0x0U; 10000a74: 4b3b ldr r3, [pc, #236] ; (10000b64 <__ghs_eofn_Pwm_StopSynchronizedChannels+0x2>) 10000a76: 2201 movs r2, #1 10000a78: 6859 ldr r1, [r3, #4] 10000a7a: 07d2 lsls r2, r2, #31 10000a7c: 6808 ldr r0, [r1, #0] 10000a7e: 4390 bics r0, r2 10000a80: 6008 str r0, [r1, #0] } 10000a82: 4770 bx lr 10000a84 : // \param freq selected frequency in Hz // // \return void //----------------------------------------------------------------------------- void Pwm_SetFreq(Pwm_ChannelHandleType handle, uint32 freq) { 10000a84: b500 push {lr} // Compute PWM channel clock prescaler uint16 prescaler = (uint16)1U << ((uint16)asPwmClockConfig[handle].prescaler); // Compute PWM channel frequency in Hz uint32 pwmClkFreq = asPwmClockConfig[handle].clockSourceFreq / prescaler; // Compute period of the PWM channel (clock frequency/selected frequency) uint32 selectedCC0 = pwmClkFreq / freq; 10000a86: 4608 mov r0, r1 10000a88: 4937 ldr r1, [pc, #220] ; (10000b68 <__ghs_eofn_Pwm_StopSynchronizedChannels+0x6>) 10000a8a: f003 fe2f bl 100046ec <__udiv_32_32> // Set the corresponding period to register asPwmChannelConfig[handle].pwmChBaseAddr->unPERIOD.u32Register = (selectedCC0 - 1U); 10000a8e: 4935 ldr r1, [pc, #212] ; (10000b64 <__ghs_eofn_Pwm_StopSynchronizedChannels+0x2>) 10000a90: 1e43 subs r3, r0, #1 10000a92: 684a ldr r2, [r1, #4] 10000a94: 6088 str r0, [r1, #8] // Save locally the selected period asPwmChannelConfig[handle].period = selectedCC0; 10000a96: 6213 str r3, [r2, #32] } 10000a98: bd00 pop {pc} 10000a9a : // \param phase selected phase // // \return void //----------------------------------------------------------------------------- void Pwm_SetPhase(Pwm_ChannelHandleType handle, uint16 phase) { 10000a9a: b510 push {r4, lr} 10000a9c: 460a mov r2, r1 // Compute the offset value from the phase-shift uint32 result = (180U + asPwmChannelConfig[handle].period * phase) / 360U; asPwmChannelConfig[handle].offset = result; 10000a9e: 4c31 ldr r4, [pc, #196] ; (10000b64 <__ghs_eofn_Pwm_StopSynchronizedChannels+0x2>) 10000aa0: 68a1 ldr r1, [r4, #8] 10000aa2: 4351 muls r1, r2 10000aa4: 31b4 adds r1, #180 ; 0xb4 10000aa6: 2069 movs r0, #105 ; 0x69 10000aa8: 30ff adds r0, #255 ; 0xff 10000aaa: f003 fe1f bl 100046ec <__udiv_32_32> 10000aae: 6160 str r0, [r4, #20] } 10000ab0: bd10 pop {r4, pc} 10000ab2 : { uint16 i; for (i = 0U; i < (uint16)PwmChannel_LAST; i++) { if (asPwmChannelConfig[i].synchronized == TRUE) 10000ab2: 482c ldr r0, [pc, #176] ; (10000b64 <__ghs_eofn_Pwm_StopSynchronizedChannels+0x2>) 10000ab4: 7e01 ldrb r1, [r0, #24] 10000ab6: 2901 cmp r1, #1 10000ab8: d102 bne.n 10000ac0 <..lin.bedd124c..478491f2.0_10+0x6> 10000aba <..lin.bedd124c..478491f2.0_10>: { // Set the offset for the channels to be synchronized asPwmChannelConfig[i].pwmChBaseAddr->unCOUNTER.u32Register = asPwmChannelConfig[i].offset; 10000aba: 6841 ldr r1, [r0, #4] 10000abc: 6940 ldr r0, [r0, #20] 10000abe: 6088 str r0, [r1, #8] } } // Activate a start trigger only if the PWM channels are stopped if (PERI->unTR_CMD.stcField.u1ACTIVATE == 0UL && pwmChannelsStopped == TRUE) 10000ac0: 492a ldr r1, [pc, #168] ; (10000b6c <__ghs_eofn_Pwm_StopSynchronizedChannels+0xa>) 10000ac2: 6808 ldr r0, [r1, #0] 10000ac4: 2800 cmp r0, #0 10000ac6: d421 bmi.n 10000b0c <..lin.bedd124c..478491f2.0_11+0x3c> 10000ac8: 4829 ldr r0, [pc, #164] ; (10000b70 <__ghs_eofn_Pwm_StopSynchronizedChannels+0xe>) 10000aca: 7801 ldrb r1, [r0, #0] 10000acc: 2901 cmp r1, #1 10000ace: d11d bne.n 10000b0c <..lin.bedd124c..478491f2.0_11+0x3c> 10000ad0 <..lin.bedd124c..478491f2.0_11>: { PERI->unTR_CMD.stcField.u8TR_SEL = ((uint32)TRIG_OUT_MUX_4_TCPWM_ALL_CNT_TR_IN0 & TR_MASK) >> TR_SHIFT; 10000ad0: 4b26 ldr r3, [pc, #152] ; (10000b6c <__ghs_eofn_Pwm_StopSynchronizedChannels+0xa>) 10000ad2: 22ff movs r2, #255 ; 0xff 10000ad4: 6819 ldr r1, [r3, #0] 10000ad6: 4391 bics r1, r2 10000ad8: 6019 str r1, [r3, #0] PERI->unTR_CMD.stcField.u5GROUP_SEL = ((uint32)TRIG_OUT_MUX_4_TCPWM_ALL_CNT_TR_IN0 & TR_GROUP_MASK) >> TR_GROUP_SHIFT; 10000ada: 6819 ldr r1, [r3, #0] 10000adc: 221f movs r2, #31 10000ade: 0212 lsls r2, r2, #8 10000ae0: 4391 bics r1, r2 10000ae2: 2201 movs r2, #1 10000ae4: 0292 lsls r2, r2, #10 10000ae6: 4311 orrs r1, r2 10000ae8: 6019 str r1, [r3, #0] PERI->unTR_CMD.stcField.u1TR_EDGE = (uint32)TRIGGER_TYPE_LEVEL; 10000aea: 6819 ldr r1, [r3, #0] 10000aec: 2201 movs r2, #1 10000aee: 0752 lsls r2, r2, #29 10000af0: 4391 bics r1, r2 10000af2: 6019 str r1, [r3, #0] PERI->unTR_CMD.stcField.u1OUT_SEL = 1; 10000af4: 6819 ldr r1, [r3, #0] 10000af6: 2201 movs r2, #1 10000af8: 0792 lsls r2, r2, #30 10000afa: 4311 orrs r1, r2 10000afc: 6019 str r1, [r3, #0] PERI->unTR_CMD.stcField.u1ACTIVATE = 1; 10000afe: 6819 ldr r1, [r3, #0] 10000b00: 2201 movs r2, #1 10000b02: 07d2 lsls r2, r2, #31 10000b04: 4311 orrs r1, r2 10000b06: 6019 str r1, [r3, #0] pwmChannelsStopped = FALSE; 10000b08: 2100 movs r1, #0 10000b0a: 7001 strb r1, [r0, #0] } } 10000b0c: 4770 bx lr 10000b0e : // \return void //----------------------------------------------------------------------------- void Pwm_StopSynchronizedChannels(void) { // Activate a stop trigger only if the channels are running if ((PERI->unTR_CMD.stcField.u1ACTIVATE == 0UL) && (pwmChannelsStopped == FALSE)) 10000b0e: 4917 ldr r1, [pc, #92] ; (10000b6c <__ghs_eofn_Pwm_StopSynchronizedChannels+0xa>) 10000b10: 6808 ldr r0, [r1, #0] 10000b12: 2800 cmp r0, #0 10000b14: d424 bmi.n 10000b60 <..lin.bedd124c..58cf850a.0_12+0x42> 10000b16: 4816 ldr r0, [pc, #88] ; (10000b70 <__ghs_eofn_Pwm_StopSynchronizedChannels+0xe>) 10000b18: 7801 ldrb r1, [r0, #0] 10000b1a: 2900 cmp r1, #0 10000b1c: d120 bne.n 10000b60 <..lin.bedd124c..58cf850a.0_12+0x42> 10000b1e <..lin.bedd124c..58cf850a.0_12>: { PERI->unTR_CMD.stcField.u8TR_SEL = ((uint32)TRIG_OUT_MUX_4_TCPWM_ALL_CNT_TR_IN1 & TR_MASK) >> TR_SHIFT; 10000b1e: 4b13 ldr r3, [pc, #76] ; (10000b6c <__ghs_eofn_Pwm_StopSynchronizedChannels+0xa>) 10000b20: 22ff movs r2, #255 ; 0xff 10000b22: 6819 ldr r1, [r3, #0] 10000b24: 4391 bics r1, r2 10000b26: 2301 movs r3, #1 10000b28: 4319 orrs r1, r3 10000b2a: 4b10 ldr r3, [pc, #64] ; (10000b6c <__ghs_eofn_Pwm_StopSynchronizedChannels+0xa>) 10000b2c: 221f movs r2, #31 PERI->unTR_CMD.stcField.u5GROUP_SEL = ((uint32)TRIG_OUT_MUX_4_TCPWM_ALL_CNT_TR_IN1 & TR_GROUP_MASK) >> TR_GROUP_SHIFT; 10000b2e: 0212 lsls r2, r2, #8 10000b30: 6019 str r1, [r3, #0] 10000b32: 6819 ldr r1, [r3, #0] 10000b34: 4391 bics r1, r2 10000b36: 2201 movs r2, #1 10000b38: 0292 lsls r2, r2, #10 10000b3a: 4311 orrs r1, r2 10000b3c: 6019 str r1, [r3, #0] PERI->unTR_CMD.stcField.u1TR_EDGE = (uint32)TRIGGER_TYPE_LEVEL; 10000b3e: 6819 ldr r1, [r3, #0] 10000b40: 2201 movs r2, #1 10000b42: 0752 lsls r2, r2, #29 10000b44: 4391 bics r1, r2 10000b46: 6019 str r1, [r3, #0] PERI->unTR_CMD.stcField.u1OUT_SEL = 1; 10000b48: 6819 ldr r1, [r3, #0] 10000b4a: 2201 movs r2, #1 10000b4c: 0792 lsls r2, r2, #30 10000b4e: 4311 orrs r1, r2 10000b50: 6019 str r1, [r3, #0] PERI->unTR_CMD.stcField.u1ACTIVATE = 1; 10000b52: 6819 ldr r1, [r3, #0] 10000b54: 2201 movs r2, #1 10000b56: 07d2 lsls r2, r2, #31 10000b58: 4311 orrs r1, r2 10000b5a: 6019 str r1, [r3, #0] pwmChannelsStopped = TRUE; 10000b5c: 2101 movs r1, #1 10000b5e: 7001 strb r1, [r0, #0] } } 10000b60: 4770 bx lr 10000b62 <__ghs_eofn_Pwm_StopSynchronizedChannels>: 10000b62: bf00 nop 10000b64: 16b8 asrs r0, r7, #26 10000b66: 0800 lsrs r0, r0, #32 10000b68: 2d00 cmp r5, #0 10000b6a: 0131 lsls r1, r6, #4 10000b6c: 0220 lsls r0, r4, #8 10000b6e: 4000 ands r0, r0 10000b70: 16b4 asrs r4, r6, #26 10000b72: 0800 lsrs r0, r0, #32 10000b74 : /// /// \return void //----------------------------------------------------------------------------- // PRQA S 3408 1 // It is actually being declared using macros void Can_RxBptCallback1(can_handle_type rx_handle, const uint8* data, uint8 dlc) { 10000b74: b500 push {lr} 10000b76: b082 sub sp, #8 (void) rx_handle; (void) dlc; // Copy data into pduinfo structure // PRQA S 311 1 // cast intended pduinfo.SduDataPtr = (SduDataPtrType)(data); 10000b78: ab01 add r3, sp, #4 pduinfo.SduLength = dlc; 10000b7a: 9100 str r1, [sp, #0] 10000b7c: 801a strh r2, [r3, #0] CanTp_RxIndication(0U, &pduinfo); 10000b7e: 4669 mov r1, sp 10000b80: 2000 movs r0, #0 10000b82: f002 fb1f bl 100031c4 } 10000b86: b002 add sp, #8 10000b88: bd00 pop {pc} 10000b8a <__Can_CalcTxBufAdrs_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: /// /// \return pu32Adrs Message buffer address corresponding to the index. /// Can be NULL if the index is invalid. //----------------------------------------------------------------------------- static uint32* Can_CalcTxBufAdrs(cy_pstc_canfd_type_t pstcCanFD, uint8 u8MsgBuf) { 10000b8a: b510 push {r4, lr} uint32* pu32Adrs = NULL_PTR; 10000b8c: 2200 movs r2, #0 if (u8MsgBuf > 31U) 10000b8e: 291f cmp r1, #31 10000b90: d814 bhi.n 10000bbc <..lin.bedcd82a..bd85f04c.0_1+0x2a> 10000b92 <..lin.bedcd82a..bd85f04c.0_1>: } else { // Set the message buffer address to the return value if the index is available pu32Adrs = (uint32*)(((uint32)pstcCanFD & 0xFFFF0000UL) + (uint32)CY_CANFD_MSGRAM_START); 10000b92: 0c02 lsrs r2, r0, #16 10000b94: 0412 lsls r2, r2, #16 10000b96: 2301 movs r3, #1 10000b98: 041b lsls r3, r3, #16 10000b9a: 18d2 adds r2, r2, r3 pu32Adrs += pstcCanFD->M_TTCAN.unTXBC.stcField.u14TBSA; 10000b9c: 24c0 movs r4, #192 ; 0xc0 10000b9e: 5823 ldr r3, [r4, r0] 10000ba0: 041b lsls r3, r3, #16 10000ba2: 0c9b lsrs r3, r3, #18 10000ba4: 009b lsls r3, r3, #2 10000ba6: 18d2 adds r2, r2, r3 pu32Adrs += u8MsgBuf * (2U + dataBufferSizeInWord[pstcCanFD->M_TTCAN.unTXESC.stcField.u3TBDS]); 10000ba8: 30c8 adds r0, #200 ; 0xc8 10000baa: 6800 ldr r0, [r0, #0] 10000bac: 0740 lsls r0, r0, #29 10000bae: 4bbe ldr r3, [pc, #760] ; (10000ea8 <..lin.bedcd82a..dd75ebe1.0_24+0x4>) 10000bb0: 0f40 lsrs r0, r0, #29 10000bb2: 5c18 ldrb r0, [r3, r0] 10000bb4: 3002 adds r0, #2 10000bb6: 4348 muls r0, r1 10000bb8: 0080 lsls r0, r0, #2 10000bba: 1812 adds r2, r2, r0 } return pu32Adrs; 10000bbc: 4610 mov r0, r2 10000bbe: bd10 pop {r4, pc} 10000bc0 : { 10000bc0: b5f0 push {r4, r5, r6, r7, lr} 10000bc2: b081 sub sp, #4 10000bc4: 4602 mov r2, r0 boolean retVal = TRUE; 10000bc6: 4fb9 ldr r7, [pc, #740] ; (10000eac <..lin.bedcd82a..dd75ebe1.0_24+0x8>) uint32 idx = Can_TxHandleToIndex(tx_handle); 10000bc8: 2001 movs r0, #1 10000bca: 4db9 ldr r5, [pc, #740] ; (10000eb0 <..lin.bedcd82a..dd75ebe1.0_24+0xc>) 10000bcc: 683b ldr r3, [r7, #0] 10000bce: 00de lsls r6, r3, #3 10000bd0: 1af4 subs r4, r6, r3 10000bd2: 00a4 lsls r4, r4, #2 10000bd4: 5966 ldr r6, [r4, r5] 10000bd6: 1964 adds r4, r4, r5 10000bd8: 2e03 cmp r6, #3 10000bda: d07b beq.n 10000cd4 <..lin.bedcd82a..fd4e3187.0_7> 10000bdc: 2604 movs r6, #4 10000bde: 57a6 ldrsb r6, [r4, r6] 10000be0: 42b2 cmp r2, r6 10000be2: d006 beq.n 10000bf2 <..lin.bedcd82a..fd4e3187.0_2> 10000be4: 69e6 ldr r6, [r4, #28] 10000be6: 3301 adds r3, #1 10000be8: 341c adds r4, #28 10000bea: 2e03 cmp r6, #3 10000bec: d1f6 bne.n 10000bdc 10000bee: 2000 movs r0, #0 10000bf0: e074 b.n 10000cdc <..lin.bedcd82a..fd4e3187.0_8+0x4> 10000bf2 <..lin.bedcd82a..fd4e3187.0_2>: if (idx == CAN_INVALID_INDEX) 10000bf2: 1c5a adds r2, r3, #1 10000bf4: d06e beq.n 10000cd4 <..lin.bedcd82a..fd4e3187.0_7> 10000bf6 <..lin.bedcd82a..fd4e3187.0_3>: channel = can_tx_map[idx].channel; 10000bf6: 00da lsls r2, r3, #3 10000bf8: 1ad3 subs r3, r2, r3 10000bfa: 009b lsls r3, r3, #2 10000bfc: 195c adds r4, r3, r5 10000bfe: 595a ldr r2, [r3, r5] dlc = can_tx_map[idx].dlc; 10000c00: 6923 ldr r3, [r4, #16] 10000c02: 9300 str r3, [sp, #0] id = can_tx_map[idx].id; 10000c04: 7b25 ldrb r5, [r4, #12] txBuffer = can_tx_map[idx].buffer; 10000c06: 68a3 ldr r3, [r4, #8] if (txBuffer > 31U) 10000c08: 2d1f cmp r5, #31 10000c0a: d863 bhi.n 10000cd4 <..lin.bedcd82a..fd4e3187.0_7> 10000c0c <..lin.bedcd82a..fd4e3187.0_4>: pstcCanFDTxBuffer = (cy_stc_canfd_tx_buffer_t*)Can_CalcTxBufAdrs(ChannelsConfig[channel], txBuffer); 10000c0c: 4ca9 ldr r4, [pc, #676] ; (10000eb4 <..lin.bedcd82a..dd75ebe1.0_24+0x10>) 10000c0e: 0252 lsls r2, r2, #9 10000c10: 1914 adds r4, r2, r4 10000c12: 0c22 lsrs r2, r4, #16 10000c14: 0412 lsls r2, r2, #16 10000c16: 0406 lsls r6, r0, #16 10000c18: 1992 adds r2, r2, r6 10000c1a: 26c0 movs r6, #192 ; 0xc0 10000c1c: 5936 ldr r6, [r6, r4] 10000c1e: 0436 lsls r6, r6, #16 10000c20: 0cb6 lsrs r6, r6, #18 10000c22: 00b6 lsls r6, r6, #2 10000c24: 1992 adds r2, r2, r6 10000c26: 26c8 movs r6, #200 ; 0xc8 10000c28: 5936 ldr r6, [r6, r4] 10000c2a: 0776 lsls r6, r6, #29 10000c2c: 4f9e ldr r7, [pc, #632] ; (10000ea8 <..lin.bedcd82a..dd75ebe1.0_24+0x4>) 10000c2e: 0f76 lsrs r6, r6, #29 10000c30: 5dbe ldrb r6, [r7, r6] 10000c32: 3602 adds r6, #2 10000c34: 436e muls r6, r5 10000c36: 00b6 lsls r6, r6, #2 10000c38: 1992 adds r2, r2, r6 if (pstcCanFDTxBuffer == NULL) 10000c3a: d04b beq.n 10000cd4 <..lin.bedcd82a..fd4e3187.0_7> 10000c3c <..lin.bedcd82a..fd4e3187.0_5>: pstcCanFDTxBuffer->t0_f.rtr = 0; 10000c3c: 6816 ldr r6, [r2, #0] 10000c3e: 0747 lsls r7, r0, #29 10000c40: 43be bics r6, r7 10000c42: 6016 str r6, [r2, #0] pstcCanFDTxBuffer->t0_f.xtd = ((id & CAN_MSG_ID_EXT) == TRUE) ? 1UL : 0UL; 10000c44: 6816 ldr r6, [r2, #0] 10000c46: 0787 lsls r7, r0, #30 10000c48: 43be bics r6, r7 10000c4a: 6016 str r6, [r2, #0] pstcCanFDTxBuffer->t0_f.id = (pstcCanFDTxBuffer->t0_f.xtd == 0U) ? 10000c4c: 6816 ldr r6, [r2, #0] 10000c4e: 0076 lsls r6, r6, #1 10000c50: d400 bmi.n 10000c54 <..lin.bedcd82a..fd4e3187.0_5+0x18> 10000c52: 049b lsls r3, r3, #18 10000c54: 6816 ldr r6, [r2, #0] 10000c56: 0f76 lsrs r6, r6, #29 10000c58: 0776 lsls r6, r6, #29 10000c5a: 00db lsls r3, r3, #3 10000c5c: 08db lsrs r3, r3, #3 10000c5e: 431e orrs r6, r3 10000c60: 6016 str r6, [r2, #0] 10000c62 <..lin.bedcd82a..fd4e3187.0_6>: pstcCanFDTxBuffer->t1_f.efc = 0; // Tx Event FIFO not used. TODO: check if needed 10000c62: 6853 ldr r3, [r2, #4] 10000c64: 05c6 lsls r6, r0, #23 10000c66: 43b3 bics r3, r6 10000c68: 6053 str r3, [r2, #4] pstcCanFDTxBuffer->t1_f.mm = 0; // Not used. TODO: check if needed 10000c6a: 6853 ldr r3, [r2, #4] 10000c6c: 26ff movs r6, #255 ; 0xff 10000c6e: 0636 lsls r6, r6, #24 10000c70: 43b3 bics r3, r6 10000c72: 6053 str r3, [r2, #4] pstcCanFDTxBuffer->t1_f.dlc = dlc; // Set DLC 10000c74: 6856 ldr r6, [r2, #4] 10000c76: 230f movs r3, #15 10000c78: 041b lsls r3, r3, #16 10000c7a: 439e bics r6, r3 10000c7c: 9b00 ldr r3, [sp, #0] 10000c7e: 071b lsls r3, r3, #28 10000c80: 0b1b lsrs r3, r3, #12 10000c82: 431e orrs r6, r3 10000c84: 6056 str r6, [r2, #4] pstcCanFDTxBuffer->t1_f.fdf = 0; // Classical can frame 10000c86: 6853 ldr r3, [r2, #4] 10000c88: 0546 lsls r6, r0, #21 10000c8a: 43b3 bics r3, r6 10000c8c: 6053 str r3, [r2, #4] pstcCanFDTxBuffer->t1_f.brs = 0; // No bit rate switch 10000c8e: 6853 ldr r3, [r2, #4] 10000c90: 0506 lsls r6, r0, #20 10000c92: 43b3 bics r3, r6 10000c94: 6053 str r3, [r2, #4] u16convertedData[0U] = CAN_MAKEWORD(data[0U], data[1U]); 10000c96: 784b ldrb r3, [r1, #1] 10000c98: 780e ldrb r6, [r1, #0] 10000c9a: 021b lsls r3, r3, #8 10000c9c: 4333 orrs r3, r6 u16convertedData[1U] = CAN_MAKEWORD(data[2U], data[3U]); 10000c9e: 78ce ldrb r6, [r1, #3] 10000ca0: 788f ldrb r7, [r1, #2] 10000ca2: 0236 lsls r6, r6, #8 10000ca4: 433e orrs r6, r7 u32convertedData[0U] = CAN_MAKELONG(u16convertedData[0U], u16convertedData[1U]); 10000ca6: 0436 lsls r6, r6, #16 10000ca8: 431e orrs r6, r3 u16convertedData[0U] = CAN_MAKEWORD(data[4U], data[5U]); 10000caa: 794b ldrb r3, [r1, #5] 10000cac: 790f ldrb r7, [r1, #4] 10000cae: 021b lsls r3, r3, #8 10000cb0: 433b orrs r3, r7 u16convertedData[1U] = CAN_MAKEWORD(data[6U], data[7U]); 10000cb2: 79cf ldrb r7, [r1, #7] 10000cb4: 7989 ldrb r1, [r1, #6] 10000cb6: 023f lsls r7, r7, #8 10000cb8: 4339 orrs r1, r7 u32convertedData[1U] = CAN_MAKELONG(u16convertedData[0U], u16convertedData[1U]); 10000cba: 0409 lsls r1, r1, #16 10000cbc: 4319 orrs r1, r3 for (u16Count = 0U; u16Count < u8DataLengthWord; u16Count++) 10000cbe: 60d1 str r1, [r2, #12] 10000cc0: 69a1 ldr r1, [r4, #24] if ((ChannelsConfig[channel]->M_TTCAN.unCCCR.stcField.u1INIT != 0U) || 10000cc2: 6096 str r6, [r2, #8] 10000cc4: 07c9 lsls r1, r1, #31 10000cc6: d405 bmi.n 10000cd4 <..lin.bedcd82a..fd4e3187.0_7> 10000cc8: 4601 mov r1, r0 10000cca: 40a9 lsls r1, r5 10000ccc: 23cc movs r3, #204 ; 0xcc 10000cce: 591a ldr r2, [r3, r4] 10000cd0: 400a ands r2, r1 10000cd2: d001 beq.n 10000cd8 <..lin.bedcd82a..fd4e3187.0_8> 10000cd4 <..lin.bedcd82a..fd4e3187.0_7>: retVal = FALSE; 10000cd4: 2000 movs r0, #0 10000cd6: e001 b.n 10000cdc <..lin.bedcd82a..fd4e3187.0_8+0x4> 10000cd8 <..lin.bedcd82a..fd4e3187.0_8>: ChannelsConfig[channel]->M_TTCAN.unTXBAR.u32Register = 1UL << txBuffer; 10000cd8: 22d0 movs r2, #208 ; 0xd0 } 10000cda: 5111 str r1, [r2, r4] return retVal; 10000cdc: b001 add sp, #4 10000cde: bdf0 pop {r4, r5, r6, r7, pc} 10000ce0 : { 10000ce0: b510 push {r4, lr} for (uint8 i = 0U; (i < dlc) && (i < 8U); i++) 10000ce2: 4875 ldr r0, [pc, #468] ; (10000eb8 <..lin.bedcd82a..dd75ebe1.0_24+0x14>) 10000ce4: 2300 movs r3, #0 10000ce6: 4293 cmp r3, r2 10000ce8: d208 bcs.n 10000cfc <..lin.bedcd82a..30f4fa51.0_10> 10000cea: e005 b.n 10000cf8 <..lin.bedcd82a..30f4fa51.0_9+0xc> 10000cec <..lin.bedcd82a..30f4fa51.0_9>: Can2Data[i] = data[i]; 10000cec: 5ccc ldrb r4, [r1, r3] 10000cee: 54c4 strb r4, [r0, r3] for (uint8 i = 0U; (i < dlc) && (i < 8U); i++) 10000cf0: 3301 adds r3, #1 10000cf2: b2db uxtb r3, r3 10000cf4: 4293 cmp r3, r2 10000cf6: d201 bcs.n 10000cfc <..lin.bedcd82a..30f4fa51.0_10> 10000cf8: 2b08 cmp r3, #8 10000cfa: d3f7 bcc.n 10000cec <..lin.bedcd82a..30f4fa51.0_9> 10000cfc <..lin.bedcd82a..30f4fa51.0_10>: if (dlc == 8U && data[0U] == 0x43U && data[1U] == 0x06U && data[2U] == 0xBBU && data[3U] == 0x28U) 10000cfc: 2a08 cmp r2, #8 10000cfe: d10f bne.n 10000d20 <..lin.bedcd82a..30f4fa51.0_11+0x8> 10000d00: 780a ldrb r2, [r1, #0] 10000d02: 2a43 cmp r2, #67 ; 0x43 10000d04: d10c bne.n 10000d20 <..lin.bedcd82a..30f4fa51.0_11+0x8> 10000d06: 784a ldrb r2, [r1, #1] 10000d08: 2a06 cmp r2, #6 10000d0a: d109 bne.n 10000d20 <..lin.bedcd82a..30f4fa51.0_11+0x8> 10000d0c: 788a ldrb r2, [r1, #2] 10000d0e: 2abb cmp r2, #187 ; 0xbb 10000d10: d106 bne.n 10000d20 <..lin.bedcd82a..30f4fa51.0_11+0x8> 10000d12: 78c9 ldrb r1, [r1, #3] 10000d14: 2928 cmp r1, #40 ; 0x28 10000d16: d103 bne.n 10000d20 <..lin.bedcd82a..30f4fa51.0_11+0x8> 10000d18 <..lin.bedcd82a..30f4fa51.0_11>: (void)Can_SendMsg(CAN_TX_DIAG_MSG, Can2Data); 10000d18: 4601 mov r1, r0 10000d1a: 2001 movs r0, #1 10000d1c: f7ff ff50 bl 10000bc0 } 10000d20: bd10 pop {r4, pc} 10000d22 : { 10000d22: b510 push {r4, lr} for (uint8 i = 0U; (i < dlc) && (i < 8U); i++) 10000d24: 4865 ldr r0, [pc, #404] ; (10000ebc <..lin.bedcd82a..dd75ebe1.0_24+0x18>) 10000d26: 2300 movs r3, #0 10000d28: 4293 cmp r3, r2 10000d2a: d208 bcs.n 10000d3e <..lin.bedcd82a..a5716b52.0_13> 10000d2c: e005 b.n 10000d3a <..lin.bedcd82a..a5716b52.0_12+0xc> 10000d2e <..lin.bedcd82a..a5716b52.0_12>: Can3Data[i] = data[i]; 10000d2e: 5ccc ldrb r4, [r1, r3] 10000d30: 54c4 strb r4, [r0, r3] for (uint8 i = 0U; (i < dlc) && (i < 8U); i++) 10000d32: 3301 adds r3, #1 10000d34: b2db uxtb r3, r3 10000d36: 4293 cmp r3, r2 10000d38: d201 bcs.n 10000d3e <..lin.bedcd82a..a5716b52.0_13> 10000d3a: 2b08 cmp r3, #8 10000d3c: d3f7 bcc.n 10000d2e <..lin.bedcd82a..a5716b52.0_12> 10000d3e <..lin.bedcd82a..a5716b52.0_13>: if (dlc == 8U && data[0U] == 0x43U && data[1U] == 0x06U && data[2U] == 0xBBU && data[3U] == 0x28U) 10000d3e: 2a08 cmp r2, #8 10000d40: d10f bne.n 10000d62 <..lin.bedcd82a..a5716b52.0_14+0x8> 10000d42: 780a ldrb r2, [r1, #0] 10000d44: 2a43 cmp r2, #67 ; 0x43 10000d46: d10c bne.n 10000d62 <..lin.bedcd82a..a5716b52.0_14+0x8> 10000d48: 784a ldrb r2, [r1, #1] 10000d4a: 2a06 cmp r2, #6 10000d4c: d109 bne.n 10000d62 <..lin.bedcd82a..a5716b52.0_14+0x8> 10000d4e: 788a ldrb r2, [r1, #2] 10000d50: 2abb cmp r2, #187 ; 0xbb 10000d52: d106 bne.n 10000d62 <..lin.bedcd82a..a5716b52.0_14+0x8> 10000d54: 78c9 ldrb r1, [r1, #3] 10000d56: 2928 cmp r1, #40 ; 0x28 10000d58: d103 bne.n 10000d62 <..lin.bedcd82a..a5716b52.0_14+0x8> 10000d5a <..lin.bedcd82a..a5716b52.0_14>: (void)Can_SendMsg(CAN_TX_DIAG_MSG, Can3Data); 10000d5a: 4601 mov r1, r0 10000d5c: 2001 movs r0, #1 10000d5e: f7ff ff2f bl 10000bc0 } 10000d62: bd10 pop {r4, pc} 10000d64 <__Can_Init_Clock_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10000d64: b500 push {lr} 10000d66: b081 sub sp, #4 un_CANFD_CH_NBTP_t unNBTP = { 0 }; 10000d68: 4a55 ldr r2, [pc, #340] ; (10000ec0 <..lin.bedcd82a..dd75ebe1.0_24+0x1c>) 10000d6a: 2800 cmp r0, #0 10000d6c: 6811 ldr r1, [r2, #0] { 10000d6e: 9100 str r1, [sp, #0] uint32 nbrp = CAN_CLOCK_FCAN / ((1U + can_timing[idx].tseg1 + can_timing[idx].tseg2) * (speed == 0U ? can_timing[idx].speed : speed)); 10000d70: d100 bne.n 10000d74 <..lin.bedcd82a..e14d0f85.0_15> 10000d72: 4854 ldr r0, [pc, #336] ; (10000ec4 <..lin.bedcd82a..dd75ebe1.0_24+0x20>) 10000d74 <..lin.bedcd82a..e14d0f85.0_15>: unNBTP.stcField.u9NBRP = nbrp - 1U; // Set Nominal Bit Rate Prescaler 10000d74: 4954 ldr r1, [pc, #336] ; (10000ec8 <..lin.bedcd82a..dd75ebe1.0_24+0x24>) 10000d76: 00c0 lsls r0, r0, #3 10000d78: f003 fcb8 bl 100046ec <__udiv_32_32> 10000d7c: 3801 subs r0, #1 10000d7e: 0200 lsls r0, r0, #8 10000d80: 2304 movs r3, #4 10000d82: 4318 orrs r0, r3 10000d84: 03c0 lsls r0, r0, #15 10000d86: 0bc0 lsrs r0, r0, #15 10000d88: 2201 movs r2, #1 10000d8a: 0452 lsls r2, r2, #17 10000d8c: 4302 orrs r2, r0 10000d8e: 9800 ldr r0, [sp, #0] 10000d90: 21ff movs r1, #255 ; 0xff 10000d92: 43c9 mvns r1, r1 10000d94: 4388 bics r0, r1 10000d96: 0211 lsls r1, r2, #8 10000d98: 4308 orrs r0, r1 unNBTP.stcField.u7NTSEG2 = can_timing[idx].tseg2 - 1U; // Set Nominal Time Segment after sample point 10000d9a: 217f movs r1, #127 ; 0x7f 10000d9c: 4388 bics r0, r1 10000d9e: 2301 movs r3, #1 10000da0: 4318 orrs r0, r3 ChannelsConfig[can_timing[idx].channel]->M_TTCAN.unNBTP.u32Register = unNBTP.u32Register; 10000da2: 4b4a ldr r3, [pc, #296] ; (10000ecc <..lin.bedcd82a..dd75ebe1.0_24+0x28>) 10000da4: 6018 str r0, [r3, #0] } 10000da6: b001 add sp, #4 10000da8: bd00 pop {pc} 10000daa <__Can_GetMsgramOffset_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: if (pstcCanFD == CY_CANFD0_0_TYPE) 10000daa: 4a42 ldr r2, [pc, #264] ; (10000eb4 <..lin.bedcd82a..dd75ebe1.0_24+0x10>) 10000dac: 4290 cmp r0, r2 10000dae: d008 beq.n 10000dc2 <..lin.bedcd82a..12397a54.0_19> 10000db0 <..lin.bedcd82a..12397a54.0_16>: else if (pstcCanFD == CY_CANFD0_1_TYPE) 10000db0: 4a47 ldr r2, [pc, #284] ; (10000ed0 <..lin.bedcd82a..dd75ebe1.0_24+0x2c>) 10000db2: 4290 cmp r0, r2 10000db4: d00e beq.n 10000dd4 <..lin.bedcd82a..12397a54.0_21> 10000db6 <..lin.bedcd82a..12397a54.0_17>: else if (pstcCanFD == CY_CANFD0_2_TYPE) 10000db6: 4a47 ldr r2, [pc, #284] ; (10000ed4 <..lin.bedcd82a..dd75ebe1.0_24+0x30>) 10000db8: 4290 cmp r0, r2 10000dba: d013 beq.n 10000de4 <..lin.bedcd82a..12397a54.0_23> 10000dbc <..lin.bedcd82a..12397a54.0_18>: else if (pstcCanFD == CY_CANFD1_0_TYPE) 10000dbc: 4a46 ldr r2, [pc, #280] ; (10000ed8 <..lin.bedcd82a..dd75ebe1.0_24+0x34>) 10000dbe: 4290 cmp r0, r2 10000dc0: d105 bne.n 10000dce <..lin.bedcd82a..12397a54.0_20> 10000dc2 <..lin.bedcd82a..12397a54.0_19>: pstcMsgramConfig->offset = (uint16)CY_CANFD1_0_MSGRAM_OFFSET; 10000dc2: 2200 movs r2, #0 pstcMsgramConfig->size = CY_CANFD1_0_MSGRAM_SIZE; 10000dc4: 2005 movs r0, #5 10000dc6: 02c0 lsls r0, r0, #11 10000dc8: 800a strh r2, [r1, #0] 10000dca: 6048 str r0, [r1, #4] 10000dcc: e010 b.n 10000df0 <..lin.bedcd82a..12397a54.0_23+0xc> 10000dce <..lin.bedcd82a..12397a54.0_20>: else if (pstcCanFD == CY_CANFD1_1_TYPE) 10000dce: 4a43 ldr r2, [pc, #268] ; (10000edc <..lin.bedcd82a..dd75ebe1.0_24+0x38>) 10000dd0: 4290 cmp r0, r2 10000dd2: d104 bne.n 10000dde <..lin.bedcd82a..12397a54.0_22> 10000dd4 <..lin.bedcd82a..12397a54.0_21>: pstcMsgramConfig->offset = (uint16)CY_CANFD1_1_MSGRAM_OFFSET; 10000dd4: 2205 movs r2, #5 10000dd6: 02d2 lsls r2, r2, #11 pstcMsgramConfig->size = CY_CANFD1_1_MSGRAM_SIZE; 10000dd8: 800a strh r2, [r1, #0] 10000dda: 604a str r2, [r1, #4] 10000ddc: e008 b.n 10000df0 <..lin.bedcd82a..12397a54.0_23+0xc> 10000dde <..lin.bedcd82a..12397a54.0_22>: else if (pstcCanFD == CY_CANFD1_2_TYPE) 10000dde: 4a40 ldr r2, [pc, #256] ; (10000ee0 <..lin.bedcd82a..dd75ebe1.0_24+0x3c>) 10000de0: 4290 cmp r0, r2 10000de2: d105 bne.n 10000df0 <..lin.bedcd82a..12397a54.0_23+0xc> 10000de4 <..lin.bedcd82a..12397a54.0_23>: pstcMsgramConfig->offset = (uint16)CY_CANFD1_2_MSGRAM_OFFSET; 10000de4: 2205 movs r2, #5 10000de6: 0312 lsls r2, r2, #12 pstcMsgramConfig->size = CY_CANFD1_2_MSGRAM_SIZE; 10000de8: 800a strh r2, [r1, #0] 10000dea: 2001 movs r0, #1 10000dec: 0300 lsls r0, r0, #12 10000dee: 6048 str r0, [r1, #4] } 10000df0: 4770 bx lr 10000df2 <__Can_ConfigureSIDFiler_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10000df2: b520 push {r5, lr} 10000df4: b081 sub sp, #4 un_CANFD_CH_SIDFC_t unSIDFC = { 0 }; 10000df6: 4a3b ldr r2, [pc, #236] ; (10000ee4 <..lin.bedcd82a..dd75ebe1.0_24+0x40>) 10000df8: 0409 lsls r1, r1, #16 10000dfa: 0c89 lsrs r1, r1, #18 unSIDFC.stcField.u14FLSSA = stcMsgramConfigChn.offset >> 2U; 10000dfc: 6815 ldr r5, [r2, #0] 10000dfe: 039a lsls r2, r3, #14 10000e00: 4311 orrs r1, r2 10000e02: 460b mov r3, r1 10000e04: 4938 ldr r1, [pc, #224] ; (10000ee8 <..lin.bedcd82a..dd75ebe1.0_24+0x44>) 10000e06: 9500 str r5, [sp, #0] 10000e08: 438d bics r5, r1 10000e0a: 0299 lsls r1, r3, #10 10000e0c: 0a09 lsrs r1, r1, #8 10000e0e: 430d orrs r5, r1 ChannelsConfig[channel]->M_TTCAN.unSIDFC.u32Register = unSIDFC.u32Register; 10000e10: 4928 ldr r1, [pc, #160] ; (10000eb4 <..lin.bedcd82a..dd75ebe1.0_24+0x10>) 10000e12: 0240 lsls r0, r0, #9 10000e14: 1840 adds r0, r0, r1 10000e16: 2184 movs r1, #132 ; 0x84 10000e18: 500d str r5, [r1, r0] } 10000e1a: b001 add sp, #4 10000e1c: bd20 pop {r5, pc} 10000e1e <__Can_ConfigureEXTIDFiler_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10000e1e: b530 push {r4, r5, lr} 10000e20: b082 sub sp, #8 un_CANFD_CH_XIDFC_t unXIDFC = { 0 }; 10000e22: 4d32 ldr r5, [pc, #200] ; (10000eec <..lin.bedcd82a..dd75ebe1.0_24+0x48>) 10000e24: 682b ldr r3, [r5, #0] 10000e26: 4d32 ldr r5, [pc, #200] ; (10000ef0 <..lin.bedcd82a..dd75ebe1.0_24+0x4c>) un_CANFD_CH_XIDAM_t unXIDAM = { 0 }; 10000e28: 9300 str r3, [sp, #0] 10000e2a: 682b ldr r3, [r5, #0] 10000e2c: 9301 str r3, [sp, #4] unXIDFC.stcField.u14FLESA = ChannelsConfig[channel]->M_TTCAN.unSIDFC.stcField.u14FLSSA + 10000e2e: 4b21 ldr r3, [pc, #132] ; (10000eb4 <..lin.bedcd82a..dd75ebe1.0_24+0x10>) 10000e30: 0240 lsls r0, r0, #9 10000e32: 18c0 adds r0, r0, r3 10000e34: 2584 movs r5, #132 ; 0x84 10000e36: 582b ldr r3, [r5, r0] 10000e38: 089b lsrs r3, r3, #2 10000e3a: 185c adds r4, r3, r1 10000e3c: 4b2d ldr r3, [pc, #180] ; (10000ef4 <..lin.bedcd82a..dd75ebe1.0_24+0x50>) 10000e3e: 9900 ldr r1, [sp, #0] 10000e40: 4399 bics r1, r3 10000e42: 04a3 lsls r3, r4, #18 10000e44: 0c1b lsrs r3, r3, #16 10000e46: 4319 orrs r1, r3 unXIDFC.stcField.u7LSE = extIdCntChn; 10000e48: 237f movs r3, #127 ; 0x7f 10000e4a: 041b lsls r3, r3, #16 10000e4c: 4399 bics r1, r3 10000e4e: 0653 lsls r3, r2, #25 10000e50: 0a5b lsrs r3, r3, #9 10000e52: 4319 orrs r1, r3 ChannelsConfig[channel]->M_TTCAN.unXIDFC.u32Register = unXIDFC.u32Register; 10000e54: 2588 movs r5, #136 ; 0x88 10000e56: 5029 str r1, [r5, r0] unXIDAM.stcField.u29EIDM = 0x1fffffffU; 10000e58: 4a27 ldr r2, [pc, #156] ; (10000ef8 <..lin.bedcd82a..dd75ebe1.0_24+0x54>) 10000e5a: 9901 ldr r1, [sp, #4] 10000e5c: 4311 orrs r1, r2 ChannelsConfig[channel]->M_TTCAN.unXIDAM.u32Register = unXIDAM.u32Register; 10000e5e: 2590 movs r5, #144 ; 0x90 10000e60: 5029 str r1, [r5, r0] } 10000e62: b002 add sp, #8 10000e64: bd30 pop {r4, r5, pc} 10000e66 <__Can_InitMsgRam_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10000e66: b5f0 push {r4, r5, r6, r7, lr} 10000e68: 1c15 adds r5, r2, #0 pu32Adrs = (uint32 *)(((uint32)ChannelsConfig[channel] & 0xFFFF0000UL) + (uint32)CY_CANFD_MSGRAM_START + stcMsgramConfigChn.offset); 10000e6a: 0409 lsls r1, r1, #16 10000e6c: 4a11 ldr r2, [pc, #68] ; (10000eb4 <..lin.bedcd82a..dd75ebe1.0_24+0x10>) 10000e6e: 0c09 lsrs r1, r1, #16 10000e70: 0240 lsls r0, r0, #9 10000e72: 1880 adds r0, r0, r2 10000e74: 0c00 lsrs r0, r0, #16 10000e76: 0400 lsls r0, r0, #16 10000e78: 1840 adds r0, r0, r1 10000e7a: 2101 movs r1, #1 10000e7c: 0409 lsls r1, r1, #16 10000e7e: 1840 adds r0, r0, r1 for (u32Count = 0; u32Count < u32SizeInWord; u32Count++) 10000e80: 08ab lsrs r3, r5, #2 10000e82: 08da lsrs r2, r3, #3 10000e84: d008 beq.n 10000e98 <__Can_InitMsgRam_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf+0x32> 10000e86: 2100 movs r1, #0 10000e88: 460c mov r4, r1 10000e8a: 460e mov r6, r1 10000e8c: 460d mov r5, r1 10000e8e: 460f mov r7, r1 10000e90: c0f2 stmia r0!, {r1, r4, r5, r6, r7} 10000e92: c032 stmia r0!, {r1, r4, r5} 10000e94: 3a01 subs r2, #1 10000e96: d1fa bne.n 10000e8e <__Can_InitMsgRam_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf+0x28> 10000e98: 0759 lsls r1, r3, #29 10000e9a: 0f49 lsrs r1, r1, #29 10000e9c: d002 beq.n 10000ea4 <..lin.bedcd82a..dd75ebe1.0_24> 10000e9e: c004 stmia r0!, {r2} 10000ea0: 3901 subs r1, #1 10000ea2: d1fc bne.n 10000e9e <__Can_InitMsgRam_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf+0x38> 10000ea4 <..lin.bedcd82a..dd75ebe1.0_24>: } 10000ea4: bdf0 pop {r4, r5, r6, r7, pc} 10000ea6: bf00 nop 10000ea8: 4ef0 ldr r6, [pc, #960] ; (1000126c <..lin.bedcd82a..39964644.0_35+0x3e>) 10000eaa: 1000 asrs r0, r0, #32 10000eac: 0a20 lsrs r0, r4, #8 10000eae: 0800 lsrs r0, r0, #32 10000eb0: 4e90 ldr r6, [pc, #576] ; (100010f4 <..lin.bedcd82a..39964644.0_27+0x18>) 10000eb2: 1000 asrs r0, r0, #32 10000eb4: 0000 movs r0, r0 10000eb6: 4052 eors r2, r2 10000eb8: 0a0c lsrs r4, r1, #8 10000eba: 0800 lsrs r0, r0, #32 10000ebc: 0a14 lsrs r4, r2, #8 10000ebe: 0800 lsrs r0, r0, #32 10000ec0: 4aa0 ldr r2, [pc, #640] ; (10001144 <..lin.bedcd82a..39964644.0_29+0xa>) 10000ec2: 1000 asrs r0, r0, #32 10000ec4: a120 add r1, pc, #128 ; (adr r1, 10000f48 <__Can_ConfigureRxFifos_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf+0x2c>) 10000ec6: 0007 movs r7, r0 10000ec8: 5a00 ldrh r0, [r0, r0] 10000eca: 0262 lsls r2, r4, #9 10000ecc: 001c movs r4, r3 10000ece: 4052 eors r2, r2 10000ed0: 0200 lsls r0, r0, #8 10000ed2: 4052 eors r2, r2 10000ed4: 0400 lsls r0, r0, #16 10000ed6: 4052 eors r2, r2 10000ed8: 0000 movs r0, r0 10000eda: 4054 eors r4, r2 10000edc: 0200 lsls r0, r0, #8 10000ede: 4054 eors r4, r2 10000ee0: 0400 lsls r0, r0, #16 10000ee2: 4054 eors r4, r2 10000ee4: 4aa4 ldr r2, [pc, #656] ; (10001178 <..lin.bedcd82a..39964644.0_31+0x6>) 10000ee6: 1000 asrs r0, r0, #32 10000ee8: fffc 00ff vshr.u64 q8, , #4 10000eec: 4aa8 ldr r2, [pc, #672] ; (10001190 <..lin.bedcd82a..39964644.0_31+0x1e>) 10000eee: 1000 asrs r0, r0, #32 10000ef0: 4aac ldr r2, [pc, #688] ; (100011a4 <..lin.bedcd82a..39964644.0_32+0x6>) 10000ef2: 1000 asrs r0, r0, #32 10000ef4: fffc 0000 vrev64. d16, d0 10000ef8: ffff 1fff ; instruction: 0xffff1fff 10000efc <__Can_ConfigureBufferDataSize_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10000efc: b081 sub sp, #4 un_CANFD_CH_RXESC_t unRXESC = { 0 }; 10000efe: 4bcc ldr r3, [pc, #816] ; (10001230 <..lin.bedcd82a..39964644.0_35+0x2>) 10000f00: 2277 movs r2, #119 ; 0x77 10000f02: 0112 lsls r2, r2, #4 unRXESC.stcField.u3F1DS = (uint32)CY_CANFD_BUFFER_DATA_SIZE_8; // 8 byte data field for Rx FIFO 1 10000f04: 6819 ldr r1, [r3, #0] 10000f06: 9100 str r1, [sp, #0] 10000f08: 4391 bics r1, r2 unRXESC.stcField.u3F0DS = (uint32)CY_CANFD_BUFFER_DATA_SIZE_8; // 8 byte data field for Rx FIFO 0 10000f0a: 08c9 lsrs r1, r1, #3 10000f0c: 4ac9 ldr r2, [pc, #804] ; (10001234 <..lin.bedcd82a..39964644.0_35+0x6>) ChannelsConfig[channel]->M_TTCAN.unRXESC.u32Register = unRXESC.u32Register; 10000f0e: 00c9 lsls r1, r1, #3 10000f10: 0240 lsls r0, r0, #9 10000f12: 1880 adds r0, r0, r2 10000f14: 23bc movs r3, #188 ; 0xbc 10000f16: 5019 str r1, [r3, r0] } 10000f18: b001 add sp, #4 10000f1a: 4770 bx lr 10000f1c <__Can_ConfigureRxFifos_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10000f1c: b570 push {r4, r5, r6, lr} 10000f1e: b084 sub sp, #16 un_CANFD_CH_RXF0C_t unRXF0C = { 0 }; 10000f20: 4ec5 ldr r6, [pc, #788] ; (10001238 <..lin.bedcd82a..39964644.0_35+0xa>) 10000f22: 6834 ldr r4, [r6, #0] 10000f24: 4ec5 ldr r6, [pc, #788] ; (1000123c <..lin.bedcd82a..39964644.0_35+0xe>) un_CANFD_CH_RXF1C_t unRXF1C = { 0 }; 10000f26: 9400 str r4, [sp, #0] 10000f28: 6834 ldr r4, [r6, #0] 10000f2a: 4ec5 ldr r6, [pc, #788] ; (10001240 <..lin.bedcd82a..39964644.0_35+0x12>) un_CANFD_CH_RXFTOP_CTL_t unRXFTOP_CTL = { 0 }; 10000f2c: 9401 str r4, [sp, #4] 10000f2e: 6834 ldr r4, [r6, #0] 10000f30: 4ec4 ldr r6, [pc, #784] ; (10001244 <..lin.bedcd82a..39964644.0_35+0x16>) un_CANFD_CH_RXBC_t unRXBC = { 0 }; 10000f32: 9402 str r4, [sp, #8] 10000f34: 6834 ldr r4, [r6, #0] 10000f36: 9403 str r4, [sp, #12] unRXF0C.stcField.u1F0OM = (uint32)CY_CANFD_FIFO_MODE_BLOCKING; // When an RX FIFO full condition is reached, no further messages are written to the RX FIFO until at least one message is read 10000f38: 466e mov r6, sp 10000f3a: 2420 movs r4, #32 10000f3c: 70f4 strb r4, [r6, #3] unRXF0C.stcField.u7F0S = noOfFifo0ElChn; // Number of elements to be stored in the RX FIFO 0 10000f3e: 9c00 ldr r4, [sp, #0] 10000f40: 257f movs r5, #127 ; 0x7f 10000f42: 042d lsls r5, r5, #16 10000f44: 43ac bics r4, r5 10000f46: 064d lsls r5, r1, #25 10000f48: 0a6d lsrs r5, r5, #9 10000f4a: 432c orrs r4, r5 unRXF0C.stcField.u14F0SA = ChannelsConfig[channel]->M_TTCAN.unXIDFC.stcField.u14FLESA + 10000f4c: 4db9 ldr r5, [pc, #740] ; (10001234 <..lin.bedcd82a..39964644.0_35+0x6>) 10000f4e: 0240 lsls r0, r0, #9 10000f50: 1945 adds r5, r0, r5 10000f52: 0052 lsls r2, r2, #1 10000f54: 2688 movs r6, #136 ; 0x88 10000f56: 5970 ldr r0, [r6, r5] 10000f58: 0880 lsrs r0, r0, #2 10000f5a: 1882 adds r2, r0, r2 10000f5c: 48ba ldr r0, [pc, #744] ; (10001248 <..lin.bedcd82a..39964644.0_35+0x1a>) 10000f5e: 4384 bics r4, r0 10000f60: 0490 lsls r0, r2, #18 10000f62: 0c00 lsrs r0, r0, #16 10000f64: 4304 orrs r4, r0 10000f66: 26a0 movs r6, #160 ; 0xa0 ChannelsConfig[channel]->M_TTCAN.unRXF0C.u32Register = unRXF0C.u32Register; 10000f68: 9400 str r4, [sp, #0] 10000f6a: 5174 str r4, [r6, r5] unRXF1C.stcField.u1F1OM = (uint32)CY_CANFD_FIFO_MODE_BLOCKING; // When an RX FIFO full condition is reached, no further messages are written to the RX FIFO until at least one message is read 10000f6c: ae01 add r6, sp, #4 10000f6e: 2020 movs r0, #32 10000f70: 70f0 strb r0, [r6, #3] unRXF1C.stcField.u7F1S = noOfFifo1ElChn; // Number of elements to be stored in the RX FIFO 1 10000f72: 9801 ldr r0, [sp, #4] 10000f74: 227f movs r2, #127 ; 0x7f 10000f76: 0412 lsls r2, r2, #16 10000f78: 4390 bics r0, r2 10000f7a: 065a lsls r2, r3, #25 10000f7c: 0a52 lsrs r2, r2, #9 10000f7e: 4310 orrs r0, r2 unRXF1C.stcField.u14F1SA = ChannelsConfig[channel]->M_TTCAN.unRXF0C.stcField.u14F0SA + 10000f80: 0089 lsls r1, r1, #2 10000f82: 26a0 movs r6, #160 ; 0xa0 10000f84: 5972 ldr r2, [r6, r5] 10000f86: 0892 lsrs r2, r2, #2 10000f88: 1852 adds r2, r2, r1 10000f8a: 49af ldr r1, [pc, #700] ; (10001248 <..lin.bedcd82a..39964644.0_35+0x1a>) 10000f8c: 4388 bics r0, r1 10000f8e: 0491 lsls r1, r2, #18 10000f90: 0c09 lsrs r1, r1, #16 10000f92: 4308 orrs r0, r1 10000f94: 26b0 movs r6, #176 ; 0xb0 ChannelsConfig[channel]->M_TTCAN.unRXF1C.u32Register = unRXF1C.u32Register; 10000f96: 9001 str r0, [sp, #4] 10000f98: 5170 str r0, [r6, r5] unRXFTOP_CTL.stcField.u1F0TPE = 0U; // Disabled at the moment. TODO: verify if needed 10000f9a: 9802 ldr r0, [sp, #8] 10000f9c: 2603 movs r6, #3 10000f9e: 43b0 bics r0, r6 ChannelsConfig[channel]->unRXFTOP_CTL.u32Register = unRXFTOP_CTL.u32Register; 10000fa0: 2681 movs r6, #129 ; 0x81 10000fa2: 36ff adds r6, #255 ; 0xff 10000fa4: 51a8 str r0, [r5, r6] unRXBC.stcField.u14RBSA = ChannelsConfig[channel]->M_TTCAN.unRXF1C.stcField.u14F1SA + 10000fa6: 009b lsls r3, r3, #2 10000fa8: 26b0 movs r6, #176 ; 0xb0 10000faa: 5970 ldr r0, [r6, r5] 10000fac: 0880 lsrs r0, r0, #2 10000fae: 18c2 adds r2, r0, r3 10000fb0: 48a5 ldr r0, [pc, #660] ; (10001248 <..lin.bedcd82a..39964644.0_35+0x1a>) 10000fb2: 9903 ldr r1, [sp, #12] 10000fb4: 4381 bics r1, r0 10000fb6: 0490 lsls r0, r2, #18 10000fb8: 0c00 lsrs r0, r0, #16 10000fba: 4301 orrs r1, r0 ChannelsConfig[channel]->M_TTCAN.unRXBC.u32Register = unRXBC.u32Register; 10000fbc: 26ac movs r6, #172 ; 0xac 10000fbe: 5171 str r1, [r6, r5] } 10000fc0: b004 add sp, #16 10000fc2: bd70 pop {r4, r5, r6, pc} 10000fc4 <__Can_TxChnConfig_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10000fc4: b530 push {r4, r5, lr} 10000fc6: b083 sub sp, #12 un_CANFD_CH_TXESC_t unTXESC = { 0 }; 10000fc8: 4da0 ldr r5, [pc, #640] ; (1000124c <..lin.bedcd82a..39964644.0_35+0x1e>) 10000fca: 682b ldr r3, [r5, #0] 10000fcc: 4da0 ldr r5, [pc, #640] ; (10001250 <..lin.bedcd82a..39964644.0_35+0x22>) un_CANFD_CH_TXEFC_t unTXEFC = { 0 }; 10000fce: 9300 str r3, [sp, #0] 10000fd0: 682b ldr r3, [r5, #0] 10000fd2: 4da0 ldr r5, [pc, #640] ; (10001254 <..lin.bedcd82a..39964644.0_35+0x26>) un_CANFD_CH_TXBC_t unTXBC = { 0 }; 10000fd4: 9301 str r3, [sp, #4] 10000fd6: 9c00 ldr r4, [sp, #0] 10000fd8: 682b ldr r3, [r5, #0] unTXESC.stcField.u3TBDS = (uint32)CY_CANFD_BUFFER_DATA_SIZE_8; // 8 byte data field for Tx Buffers 10000fda: 9302 str r3, [sp, #8] 10000fdc: 2507 movs r5, #7 10000fde: 4b95 ldr r3, [pc, #596] ; (10001234 <..lin.bedcd82a..39964644.0_35+0x6>) ChannelsConfig[channel]->M_TTCAN.unTXESC.u32Register = unTXESC.u32Register; 10000fe0: 43ac bics r4, r5 10000fe2: 0240 lsls r0, r0, #9 10000fe4: 18c3 adds r3, r0, r3 10000fe6: 25c8 movs r5, #200 ; 0xc8 10000fe8: 50ec str r4, [r5, r3] unTXEFC.stcField.u6EFWM = 0; // Watermark interrupt disabled 10000fea: 9801 ldr r0, [sp, #4] 10000fec: 243f movs r4, #63 ; 0x3f 10000fee: 0624 lsls r4, r4, #24 10000ff0: 43a0 bics r0, r4 unTXEFC.stcField.u6EFS = 0; // Tx Event FIFO disabled. 10000ff2: 243f movs r4, #63 ; 0x3f 10000ff4: 0424 lsls r4, r4, #16 10000ff6: 43a0 bics r0, r4 unTXEFC.stcField.u14EFSA = ChannelsConfig[channel]->M_TTCAN.unRXBC.stcField.u14RBSA + 10000ff8: 008c lsls r4, r1, #2 10000ffa: 25ac movs r5, #172 ; 0xac 10000ffc: 58e9 ldr r1, [r5, r3] 10000ffe: 0889 lsrs r1, r1, #2 10001000: 190c adds r4, r1, r4 10001002: 4991 ldr r1, [pc, #580] ; (10001248 <..lin.bedcd82a..39964644.0_35+0x1a>) 10001004: 4388 bics r0, r1 10001006: 04a1 lsls r1, r4, #18 10001008: 0c09 lsrs r1, r1, #16 1000100a: 4308 orrs r0, r1 1000100c: 25f0 movs r5, #240 ; 0xf0 ChannelsConfig[channel]->M_TTCAN.unTXEFC.u32Register = unTXEFC.u32Register; 1000100e: 9001 str r0, [sp, #4] 10001010: 50e8 str r0, [r5, r3] unTXBC.stcField.u1TFQM = 0; // Tx FIFO operation 10001012: 9802 ldr r0, [sp, #8] 10001014: 217f movs r1, #127 ; 0x7f 10001016: 0609 lsls r1, r1, #24 10001018: 4388 bics r0, r1 unTXBC.stcField.u6NDTB = txMsgCountChn; // Number of Dedicated Tx Buffers 1000101a: 213f movs r1, #63 ; 0x3f 1000101c: 0409 lsls r1, r1, #16 1000101e: 4388 bics r0, r1 10001020: 0691 lsls r1, r2, #26 10001022: 0a89 lsrs r1, r1, #10 10001024: 4308 orrs r0, r1 unTXBC.stcField.u14TBSA = ChannelsConfig[channel]->M_TTCAN.unTXEFC.stcField.u14EFSA + 10001026: 58ea ldr r2, [r5, r3] 10001028: 4987 ldr r1, [pc, #540] ; (10001248 <..lin.bedcd82a..39964644.0_35+0x1a>) 1000102a: 0892 lsrs r2, r2, #2 1000102c: 3214 adds r2, #20 1000102e: 4388 bics r0, r1 10001030: 0491 lsls r1, r2, #18 10001032: 0c09 lsrs r1, r1, #16 10001034: 4308 orrs r0, r1 ChannelsConfig[channel]->M_TTCAN.unTXBC.u32Register = unTXBC.u32Register; 10001036: 25c0 movs r5, #192 ; 0xc0 10001038: 50e8 str r0, [r5, r3] } 1000103a: b003 add sp, #12 1000103c: bd30 pop {r4, r5, pc} 1000103e <__Can_Init_RxRulesAndTxRxBuffers_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 1000103e: b5f0 push {r4, r5, r6, r7, lr} 10001040: 4f85 ldr r7, [pc, #532] ; (10001258 <..lin.bedcd82a..39964644.0_35+0x2a>) 10001042: 44bd add sp, r7 un_CANFD_CH_GFC_t unGFC = { 0 }; 10001044: 4b85 ldr r3, [pc, #532] ; (1000125c <..lin.bedcd82a..39964644.0_35+0x2e>) 10001046: 6818 ldr r0, [r3, #0] 10001048: 4b85 ldr r3, [pc, #532] ; (10001260 <..lin.bedcd82a..39964644.0_35+0x32>) uint32 channel_stid_cnt[CAN_MAX_CHANNELS] = { 0U }; // rules per channel 1000104a: 9001 str r0, [sp, #4] 1000104c: 6818 ldr r0, [r3, #0] 1000104e: 4b85 ldr r3, [pc, #532] ; (10001264 <..lin.bedcd82a..39964644.0_35+0x36>) uint32 channel_extid_cnt[CAN_MAX_CHANNELS] = { 0U }; // rules per channel 10001050: 9002 str r0, [sp, #8] 10001052: 6818 ldr r0, [r3, #0] 10001054: 4b84 ldr r3, [pc, #528] ; (10001268 <..lin.bedcd82a..39964644.0_35+0x3a>) cy_stc_canfd_msgram_config_t stcMsgramConfig[CAN_MAX_CHANNELS] = { 0U }; 10001056: 9003 str r0, [sp, #12] 10001058: cb03 ldmia r3!, {r0, r1} 1000105a: 2201 movs r2, #1 1000105c: 91d5 str r1, [sp, #852] ; 0x354 cy_stc_id_filter_t stIdFilters[CAN_MAX_CHANNELS][64] = { 0U }; 1000105e: 4983 ldr r1, [pc, #524] ; (1000126c <..lin.bedcd82a..39964644.0_35+0x3e>) 10001060: 90d4 str r0, [sp, #848] ; 0x350 10001062: 32ff adds r2, #255 ; 0xff 10001064: a894 add r0, sp, #592 ; 0x250 10001066: f7ff fa26 bl 100004b6 cy_stc_extid_filter_t extIdFilters[CAN_MAX_CHANNELS][64] = { 0U }; 1000106a: 2201 movs r2, #1 1000106c: 4980 ldr r1, [pc, #512] ; (10001270 <..lin.bedcd82a..39964644.0_35+0x42>) 1000106e: 0252 lsls r2, r2, #9 10001070: a814 add r0, sp, #80 ; 0x50 10001072: f7ff fa20 bl 100004b6 uint8 txMsgCount[CAN_MAX_CHANNELS] = { 0U }; 10001076: 4b7f ldr r3, [pc, #508] ; (10001274 <..lin.bedcd82a..39964644.0_35+0x46>) 10001078: 7818 ldrb r0, [r3, #0] 1000107a: 466b mov r3, sp 1000107c: 7018 strb r0, [r3, #0] uint8 noOfFifo0El[CAN_MAX_CHANNELS] = { 0U }; 1000107e: 4b7e ldr r3, [pc, #504] ; (10001278 <..lin.bedcd82a..39964644.0_35+0x4a>) 10001080: 7818 ldrb r0, [r3, #0] 10001082: 466b mov r3, sp 10001084: 7058 strb r0, [r3, #1] uint8 noOfFifo1El[CAN_MAX_CHANNELS] = { 0U }; 10001086: 4b7d ldr r3, [pc, #500] ; (1000127c <..lin.bedcd82a..39964644.0_35+0x4e>) 10001088: 7818 ldrb r0, [r3, #0] 1000108a: 466b mov r3, sp 1000108c: 7098 strb r0, [r3, #2] uint8 noOfRxBuffers[CAN_MAX_CHANNELS] = { 0U }; 1000108e: 4b7c ldr r3, [pc, #496] ; (10001280 <..lin.bedcd82a..39964644.0_35+0x52>) 10001090: 7818 ldrb r0, [r3, #0] 10001092: 466b mov r3, sp 10001094: 70d8 strb r0, [r3, #3] for (rx_map_cnt = can_rx_set_start; can_rx_map[rx_map_cnt].channel != CAN_INVALID_CHANNEL; rx_map_cnt++) 10001096: 4b7b ldr r3, [pc, #492] ; (10001284 <..lin.bedcd82a..39964644.0_35+0x56>) 10001098: 9d03 ldr r5, [sp, #12] 1000109a: 9e02 ldr r6, [sp, #8] 1000109c: 6818 ldr r0, [r3, #0] 1000109e: 00c1 lsls r1, r0, #3 100010a0: 1a08 subs r0, r1, r0 100010a2: 4979 ldr r1, [pc, #484] ; (10001288 <..lin.bedcd82a..39964644.0_35+0x5a>) 100010a4: 466b mov r3, sp 100010a6: 0080 lsls r0, r0, #2 100010a8: 785b ldrb r3, [r3, #1] 100010aa: 180c adds r4, r1, r0 100010ac: 9309 str r3, [sp, #36] ; 0x24 100010ae: 6821 ldr r1, [r4, #0] 100010b0: 466b mov r3, sp 100010b2: 7898 ldrb r0, [r3, #2] 100010b4: 78da ldrb r2, [r3, #3] 100010b6: ab0b add r3, sp, #44 ; 0x2c 100010b8: c365 stmia r3!, {r0, r2, r5, r6} 100010ba: 2903 cmp r1, #3 100010bc: d06f beq.n 1000119e <..lin.bedcd82a..39964644.0_32> 100010be <..lin.bedcd82a..39964644.0_25>: id = can_rx_map[rx_map_cnt].id; // Save the ID 100010be: 68a0 ldr r0, [r4, #8] rxStorageType = can_rx_map[rx_map_cnt].buffer; // Get the storage type (RX buffer, RX FIFO1, RX FIFO2) to be used for this ID 100010c0: 7b25 ldrb r5, [r4, #12] if ((id & CAN_MSG_ID_EXT) != 0U) 100010c2: 0189 lsls r1, r1, #6 100010c4: 2800 cmp r0, #0 100010c6: d538 bpl.n 1000113a <..lin.bedcd82a..39964644.0_29> 100010c8 <..lin.bedcd82a..39964644.0_26>: extid_idx = channel_extid_cnt[channel]; // Get the number of the extended IDs already stored for this channel 100010c8: 9e0d ldr r6, [sp, #52] ; 0x34 100010ca: 960a str r6, [sp, #40] ; 0x28 channel_extid_cnt[channel]++; // Increase the number of extended IDs stored for this channel 100010cc: 1c72 adds r2, r6, #1 100010ce: 920d str r2, [sp, #52] ; 0x34 if (rxStorageType < 64U) 100010d0: af14 add r7, sp, #80 ; 0x50 100010d2: 9708 str r7, [sp, #32] 100010d4: 00c0 lsls r0, r0, #3 100010d6: 08c0 lsrs r0, r0, #3 100010d8: 2d40 cmp r5, #64 ; 0x40 100010da: d216 bcs.n 1000110a <..lin.bedcd82a..39964644.0_28> 100010dc <..lin.bedcd82a..39964644.0_27>: cy_stc_extid_filter_t filter = { 100010dc: 4a6b ldr r2, [pc, #428] ; (1000128c <..lin.bedcd82a..39964644.0_35+0x5e>) 100010de: 6853 ldr r3, [r2, #4] 100010e0: 6812 ldr r2, [r2, #0] 100010e2: 0f52 lsrs r2, r2, #29 100010e4: 0752 lsls r2, r2, #29 100010e6: 4302 orrs r2, r0 100010e8: 0f5b lsrs r3, r3, #29 100010ea: 075b lsls r3, r3, #29 100010ec: 432b orrs r3, r5 extIdFilters[channel][extid_idx] = filter; 100010ee: 1871 adds r1, r6, r1 100010f0: 00c8 lsls r0, r1, #3 100010f2: 51c2 str r2, [r0, r7] 100010f4: 1838 adds r0, r7, r0 100010f6: 6043 str r3, [r0, #4] noOfRxBuffers[channel]++; 100010f8: 980c ldr r0, [sp, #48] ; 0x30 100010fa: 3001 adds r0, #1 100010fc: b2c0 uxtb r0, r0 100010fe: 900c str r0, [sp, #48] ; 0x30 10001100: 69e1 ldr r1, [r4, #28] 10001102: 341c adds r4, #28 10001104: 2903 cmp r1, #3 10001106: d1da bne.n 100010be <..lin.bedcd82a..39964644.0_25> 10001108: e049 b.n 1000119e <..lin.bedcd82a..39964644.0_32> 1000110a <..lin.bedcd82a..39964644.0_28>: cy_stc_extid_filter_t filter = CANFD_CONFIG_EXT_ID_FILTER_CLASSIC(id, id, CY_CANFD_ID_FILTER_ELEMNT_CONFIG_STORE_RXFIFO1); 1000110a: 4f61 ldr r7, [pc, #388] ; (10001290 <..lin.bedcd82a..39964644.0_35+0x62>) 1000110c: 683a ldr r2, [r7, #0] 1000110e: 687b ldr r3, [r7, #4] 10001110: 0f52 lsrs r2, r2, #29 10001112: 0752 lsls r2, r2, #29 10001114: 4302 orrs r2, r0 10001116: 0f5b lsrs r3, r3, #29 10001118: 075b lsls r3, r3, #29 1000111a: 4303 orrs r3, r0 extIdFilters[channel][extid_idx] = filter; 1000111c: 1870 adds r0, r6, r1 1000111e: 9f08 ldr r7, [sp, #32] 10001120: 00c0 lsls r0, r0, #3 10001122: 51c2 str r2, [r0, r7] 10001124: 1838 adds r0, r7, r0 10001126: 9f0b ldr r7, [sp, #44] ; 0x2c noOfFifo1El[channel]++; 10001128: 6043 str r3, [r0, #4] 1000112a: 3701 adds r7, #1 1000112c: b2ff uxtb r7, r7 1000112e: 970b str r7, [sp, #44] ; 0x2c 10001130: 69e1 ldr r1, [r4, #28] 10001132: 341c adds r4, #28 10001134: 2903 cmp r1, #3 10001136: d1c2 bne.n 100010be <..lin.bedcd82a..39964644.0_25> 10001138: e031 b.n 1000119e <..lin.bedcd82a..39964644.0_32> 1000113a <..lin.bedcd82a..39964644.0_29>: stid_idx = channel_stid_cnt[channel]; // Get the number of the standard IDs already stored for this channel 1000113a: 9e0e ldr r6, [sp, #56] ; 0x38 channel_stid_cnt[channel]++; // Increase the number of used standard IDs for this channel 1000113c: 1c72 adds r2, r6, #1 1000113e: 920e str r2, [sp, #56] ; 0x38 if (rxStorageType < 64U) 10001140: af94 add r7, sp, #592 ; 0x250 10001142: 2d40 cmp r5, #64 ; 0x40 10001144: d215 bcs.n 10001172 <..lin.bedcd82a..39964644.0_31> 10001146 <..lin.bedcd82a..39964644.0_30>: cy_stc_id_filter_t filter = CANFD_CONFIG_STD_ID_FILTER_CLASSIC_RXBUFF(id, rxStorageType); 10001146: 4a53 ldr r2, [pc, #332] ; (10001294 <..lin.bedcd82a..39964644.0_35+0x66>) 10001148: 4b53 ldr r3, [pc, #332] ; (10001298 <..lin.bedcd82a..39964644.0_35+0x6a>) 1000114a: 6812 ldr r2, [r2, #0] 1000114c: 0ad2 lsrs r2, r2, #11 1000114e: 02d2 lsls r2, r2, #11 10001150: 432a orrs r2, r5 10001152: 439a bics r2, r3 10001154: 0543 lsls r3, r0, #21 10001156: 095b lsrs r3, r3, #5 10001158: 431a orrs r2, r3 stIdFilters[channel][stid_idx] = filter; 1000115a: 1870 adds r0, r6, r1 1000115c: 0080 lsls r0, r0, #2 1000115e: 51c2 str r2, [r0, r7] noOfRxBuffers[channel]++; 10001160: 980c ldr r0, [sp, #48] ; 0x30 10001162: 3001 adds r0, #1 10001164: b2c0 uxtb r0, r0 10001166: 900c str r0, [sp, #48] ; 0x30 10001168: 69e1 ldr r1, [r4, #28] 1000116a: 341c adds r4, #28 1000116c: 2903 cmp r1, #3 1000116e: d1a6 bne.n 100010be <..lin.bedcd82a..39964644.0_25> 10001170: e015 b.n 1000119e <..lin.bedcd82a..39964644.0_32> 10001172 <..lin.bedcd82a..39964644.0_31>: cy_stc_id_filter_t filter = CANFD_CONFIG_STD_ID_FILTER_CLASSIC(id, id, CY_CANFD_ID_FILTER_ELEMNT_CONFIG_STORE_RXFIFO1); 10001172: 4b4a ldr r3, [pc, #296] ; (1000129c <..lin.bedcd82a..39964644.0_35+0x6e>) 10001174: 9d0b ldr r5, [sp, #44] ; 0x2c 10001176: 681a ldr r2, [r3, #0] 10001178: 0ad2 lsrs r2, r2, #11 1000117a: 02d2 lsls r2, r2, #11 1000117c: 0543 lsls r3, r0, #21 1000117e: 4846 ldr r0, [pc, #280] ; (10001298 <..lin.bedcd82a..39964644.0_35+0x6a>) 10001180: 0d5b lsrs r3, r3, #21 10001182: 431a orrs r2, r3 10001184: 4382 bics r2, r0 10001186: 0418 lsls r0, r3, #16 stIdFilters[channel][stid_idx] = filter; // Save the filter for this ID 10001188: 4302 orrs r2, r0 1000118a: 1870 adds r0, r6, r1 1000118c: 0080 lsls r0, r0, #2 noOfFifo1El[channel]++; 1000118e: 3501 adds r5, #1 10001190: b2ed uxtb r5, r5 10001192: 950b str r5, [sp, #44] ; 0x2c 10001194: 69e1 ldr r1, [r4, #28] 10001196: 51c2 str r2, [r0, r7] 10001198: 341c adds r4, #28 1000119a: 2903 cmp r1, #3 1000119c: d18f bne.n 100010be <..lin.bedcd82a..39964644.0_25> 1000119e <..lin.bedcd82a..39964644.0_32>: for (tx_map_cnt = can_tx_set_start; can_tx_map[tx_map_cnt].channel != CAN_INVALID_CHANNEL; tx_map_cnt++) 1000119e: 4b39 ldr r3, [pc, #228] ; (10001284 <..lin.bedcd82a..39964644.0_35+0x56>) 100011a0: 6858 ldr r0, [r3, #4] 100011a2: 00c1 lsls r1, r0, #3 100011a4: 1a08 subs r0, r1, r0 100011a6: 493e ldr r1, [pc, #248] ; (100012a0 <..lin.bedcd82a..39964644.0_35+0x72>) 100011a8: 0080 lsls r0, r0, #2 100011aa: 1809 adds r1, r1, r0 100011ac: 466b mov r3, sp 100011ae: 680a ldr r2, [r1, #0] 100011b0: 7818 ldrb r0, [r3, #0] 100011b2: 2a03 cmp r2, #3 100011b4: d005 beq.n 100011c2 <..lin.bedcd82a..39964644.0_33+0xc> 100011b6 <..lin.bedcd82a..39964644.0_33>: txMsgCount[can_tx_map[tx_map_cnt].channel]++; 100011b6: 3001 adds r0, #1 100011b8: 69ca ldr r2, [r1, #28] for (tx_map_cnt = can_tx_set_start; can_tx_map[tx_map_cnt].channel != CAN_INVALID_CHANNEL; tx_map_cnt++) 100011ba: b2c0 uxtb r0, r0 100011bc: 311c adds r1, #28 100011be: 2a03 cmp r2, #3 100011c0: d1f9 bne.n 100011b6 <..lin.bedcd82a..39964644.0_33> 100011c2: 900f str r0, [sp, #60] ; 0x3c 100011c4 <..lin.bedcd82a..39964644.0_34>: Can_GetMsgramOffset(ChannelsConfig[channel], &stcMsgramConfig[channel]); 100011c4: 481b ldr r0, [pc, #108] ; (10001234 <..lin.bedcd82a..39964644.0_35+0x6>) 100011c6: a9d4 add r1, sp, #848 ; 0x350 100011c8: 460c mov r4, r1 100011ca: f7ff fdee bl 10000daa <__Can_GetMsgramOffset_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> Can_ConfigureSIDFiler(channel, stcMsgramConfig[channel], channel_stid_cnt[channel]); 100011ce: 8822 ldrh r2, [r4, #0] 100011d0: ac12 add r4, sp, #72 ; 0x48 100011d2: 8022 strh r2, [r4, #0] 100011d4: 4c33 ldr r4, [pc, #204] ; (100012a4 <..lin.bedcd82a..39964644.0_35+0x76>) 100011d6: 6820 ldr r0, [r4, #0] 100011d8: 9c0e ldr r4, [sp, #56] ; 0x38 100011da: 03a3 lsls r3, r4, #14 100011dc: 0891 lsrs r1, r2, #2 100011de: 430b orrs r3, r1 100011e0: 4931 ldr r1, [pc, #196] ; (100012a8 <..lin.bedcd82a..39964644.0_35+0x7a>) 100011e2: 4c32 ldr r4, [pc, #200] ; (100012ac <..lin.bedcd82a..39964644.0_35+0x7e>) 100011e4: 4388 bics r0, r1 100011e6: 0299 lsls r1, r3, #10 100011e8: 0a09 lsrs r1, r1, #8 100011ea: 4308 orrs r0, r1 100011ec: 9004 str r0, [sp, #16] 100011ee: 6020 str r0, [r4, #0] Can_ConfigureEXTIDFiler(channel, channel_stid_cnt[channel], channel_extid_cnt[channel]); 100011f0: 4c2f ldr r4, [pc, #188] ; (100012b0 <..lin.bedcd82a..39964644.0_35+0x82>) 100011f2: 6820 ldr r0, [r4, #0] 100011f4: 4c2f ldr r4, [pc, #188] ; (100012b4 <..lin.bedcd82a..39964644.0_35+0x86>) 100011f6: 9006 str r0, [sp, #24] 100011f8: 6820 ldr r0, [r4, #0] 100011fa: 4c2c ldr r4, [pc, #176] ; (100012ac <..lin.bedcd82a..39964644.0_35+0x7e>) 100011fc: 9005 str r0, [sp, #20] 100011fe: 4912 ldr r1, [pc, #72] ; (10001248 <..lin.bedcd82a..39964644.0_35+0x1a>) 10001200: 6820 ldr r0, [r4, #0] 10001202: 0880 lsrs r0, r0, #2 10001204: 9c0e ldr r4, [sp, #56] ; 0x38 10001206: 1823 adds r3, r4, r0 10001208: 9806 ldr r0, [sp, #24] 1000120a: 4388 bics r0, r1 1000120c: 0499 lsls r1, r3, #18 1000120e: 0c09 lsrs r1, r1, #16 10001210: 4308 orrs r0, r1 10001212: 217f movs r1, #127 ; 0x7f 10001214: 0409 lsls r1, r1, #16 10001216: 9c0d ldr r4, [sp, #52] ; 0x34 10001218: 4388 bics r0, r1 1000121a: 0661 lsls r1, r4, #25 1000121c: 4c26 ldr r4, [pc, #152] ; (100012b8 <..lin.bedcd82a..39964644.0_35+0x8a>) 1000121e: 0a49 lsrs r1, r1, #9 10001220: 4308 orrs r0, r1 10001222: 9006 str r0, [sp, #24] 10001224: 6020 str r0, [r4, #0] 10001226: 4925 ldr r1, [pc, #148] ; (100012bc <..lin.bedcd82a..39964644.0_35+0x8e>) 10001228: 9805 ldr r0, [sp, #20] 1000122a: 4c25 ldr r4, [pc, #148] ; (100012c0 <..lin.bedcd82a..39964644.0_35+0x92>) 1000122c: e04a b.n 100012c4 <..lin.bedcd82a..39964644.0_36> 1000122e <..lin.bedcd82a..39964644.0_35>: 1000122e: bf00 nop 10001230: 4ab0 ldr r2, [pc, #704] ; (100014f4 <__Can_ExtractMsgFromRXBuffer_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf+0x2>) 10001232: 1000 asrs r0, r0, #32 10001234: 0000 movs r0, r0 10001236: 4052 eors r2, r2 10001238: 4ab4 ldr r2, [pc, #720] ; (1000150c <..lin.bedcd82a..69e7f460.0_46+0x2>) 1000123a: 1000 asrs r0, r0, #32 1000123c: 4ab8 ldr r2, [pc, #736] ; (10001520 <..lin.bedcd82a..69e7f460.0_46+0x16>) 1000123e: 1000 asrs r0, r0, #32 10001240: 4abc ldr r2, [pc, #752] ; (10001534 <..lin.bedcd82a..69e7f460.0_47+0x8>) 10001242: 1000 asrs r0, r0, #32 10001244: 4ac0 ldr r2, [pc, #768] ; (10001548 <..lin.bedcd82a..69e7f460.0_47+0x1c>) 10001246: 1000 asrs r0, r0, #32 10001248: fffc 0000 vrev64. d16, d0 1000124c: 4ac4 ldr r2, [pc, #784] ; (10001560 <..lin.bedcd82a..69e7f460.0_47+0x34>) 1000124e: 1000 asrs r0, r0, #32 10001250: 4ac8 ldr r2, [pc, #800] ; (10001574 <..lin.bedcd82a..69e7f460.0_47+0x48>) 10001252: 1000 asrs r0, r0, #32 10001254: 4acc ldr r2, [pc, #816] ; (10001588 <__Can_GetMsgRxBuff_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf+0x6>) 10001256: 1000 asrs r0, r0, #32 10001258: fca8 ffff stc2 15, cr15, [r8], #1020 ; 0x3fc 1000125c: 4af0 ldr r2, [pc, #960] ; (10001620 <..lin.bedcd82a..9716aba.0_53>) 1000125e: 1000 asrs r0, r0, #32 10001260: 4af4 ldr r2, [pc, #976] ; (10001634 <..lin.bedcd82a..9716aba.0_54+0x10>) 10001262: 1000 asrs r0, r0, #32 10001264: 4af8 ldr r2, [pc, #992] ; (10001648 <..lin.bedcd82a..9716aba.0_55+0x10>) 10001266: 1000 asrs r0, r0, #32 10001268: 4ad0 ldr r2, [pc, #832] ; (100015ac <..lin.bedcd82a..9716aba.0_50+0x8>) 1000126a: 1000 asrs r0, r0, #32 1000126c: 4b0c ldr r3, [pc, #48] ; (100012a0 <..lin.bedcd82a..39964644.0_35+0x72>) 1000126e: 1000 asrs r0, r0, #32 10001270: 4c0c ldr r4, [pc, #48] ; (100012a4 <..lin.bedcd82a..39964644.0_35+0x76>) 10001272: 1000 asrs r0, r0, #32 10001274: 4b08 ldr r3, [pc, #32] ; (10001298 <..lin.bedcd82a..39964644.0_35+0x6a>) 10001276: 1000 asrs r0, r0, #32 10001278: 4b09 ldr r3, [pc, #36] ; (100012a0 <..lin.bedcd82a..39964644.0_35+0x72>) 1000127a: 1000 asrs r0, r0, #32 1000127c: 4b0a ldr r3, [pc, #40] ; (100012a8 <..lin.bedcd82a..39964644.0_35+0x7a>) 1000127e: 1000 asrs r0, r0, #32 10001280: 4b0b ldr r3, [pc, #44] ; (100012b0 <..lin.bedcd82a..39964644.0_35+0x82>) 10001282: 1000 asrs r0, r0, #32 10001284: 0a1c lsrs r4, r3, #8 10001286: 0800 lsrs r0, r0, #32 10001288: 4e3c ldr r6, [pc, #240] ; (1000137c <..lin.bedcd82a..39964644.0_38+0x1e>) 1000128a: 1000 asrs r0, r0, #32 1000128c: 4ad8 ldr r2, [pc, #864] ; (100015f0 <..lin.bedcd82a..9716aba.0_52+0x8>) 1000128e: 1000 asrs r0, r0, #32 10001290: 4ae8 ldr r2, [pc, #928] ; (10001634 <..lin.bedcd82a..9716aba.0_54+0x10>) 10001292: 1000 asrs r0, r0, #32 10001294: 4afc ldr r2, [pc, #1008] ; (10001688 <..lin.bedcd82a..9716aba.0_57+0x10>) 10001296: 1000 asrs r0, r0, #32 10001298: 0000 movs r0, r0 1000129a: 07ff lsls r7, r7, #31 1000129c: 4b04 ldr r3, [pc, #16] ; (100012b0 <..lin.bedcd82a..39964644.0_35+0x82>) 1000129e: 1000 asrs r0, r0, #32 100012a0: 4e90 ldr r6, [pc, #576] ; (100014e4 <..lin.bedcd82a..1b8666ca.0_43+0x20>) 100012a2: 1000 asrs r0, r0, #32 100012a4: 4aa4 ldr r2, [pc, #656] ; (10001538 <..lin.bedcd82a..69e7f460.0_47+0xc>) 100012a6: 1000 asrs r0, r0, #32 100012a8: fffc 00ff vshr.u64 q8, , #4 100012ac: 0084 lsls r4, r0, #2 100012ae: 4052 eors r2, r2 100012b0: 4aa8 ldr r2, [pc, #672] ; (10001554 <..lin.bedcd82a..69e7f460.0_47+0x28>) 100012b2: 1000 asrs r0, r0, #32 100012b4: 4aac ldr r2, [pc, #688] ; (10001568 <..lin.bedcd82a..69e7f460.0_47+0x3c>) 100012b6: 1000 asrs r0, r0, #32 100012b8: 0088 lsls r0, r1, #2 100012ba: 4052 eors r2, r2 100012bc: ffff 1fff ; instruction: 0xffff1fff 100012c0: 0090 lsls r0, r2, #2 100012c2: 4052 eors r2, r2 100012c4 <..lin.bedcd82a..39964644.0_36>: 100012c4: 4308 orrs r0, r1 100012c6: 9005 str r0, [sp, #20] 100012c8: 6020 str r0, [r4, #0] Can_InitMsgRam(channel, stcMsgramConfig[channel]); 100012ca: ac10 add r4, sp, #64 ; 0x40 100012cc: 8022 strh r2, [r4, #0] 100012ce: 48c6 ldr r0, [pc, #792] ; (100015e8 <..lin.bedcd82a..9716aba.0_52>) 100012d0: 99d5 ldr r1, [sp, #852] ; 0x354 100012d2: 9111 str r1, [sp, #68] ; 0x44 100012d4: 1810 adds r0, r2, r0 100012d6: 088b lsrs r3, r1, #2 100012d8: 08da lsrs r2, r3, #3 100012da: d008 beq.n 100012ee <..lin.bedcd82a..39964644.0_36+0x2a> 100012dc: 2100 movs r1, #0 100012de: 460c mov r4, r1 100012e0: 460e mov r6, r1 100012e2: 460d mov r5, r1 100012e4: 460f mov r7, r1 100012e6: c0f2 stmia r0!, {r1, r4, r5, r6, r7} 100012e8: c032 stmia r0!, {r1, r4, r5} 100012ea: 3a01 subs r2, #1 100012ec: d1fa bne.n 100012e4 <..lin.bedcd82a..39964644.0_36+0x20> 100012ee: 0759 lsls r1, r3, #29 100012f0: 0f49 lsrs r1, r1, #29 100012f2: d002 beq.n 100012fa <..lin.bedcd82a..39964644.0_37> 100012f4: c004 stmia r0!, {r2} 100012f6: 3901 subs r1, #1 100012f8: d1fc bne.n 100012f4 <..lin.bedcd82a..39964644.0_36+0x30> 100012fa <..lin.bedcd82a..39964644.0_37>: unGFC.stcField.u2ANFS = (uint32)CY_CANFD_REJECT_NON_MATCHING; // Reject all non-matching standard IDs 100012fa: 9801 ldr r0, [sp, #4] 100012fc: 213f movs r1, #63 ; 0x3f 100012fe: 4388 bics r0, r1 10001300: 4bba ldr r3, [pc, #744] ; (100015ec <..lin.bedcd82a..9716aba.0_52+0x4>) 10001302: 2128 movs r1, #40 ; 0x28 10001304: 4308 orrs r0, r1 ChannelsConfig[channel]->M_TTCAN.unGFC.u32Register = unGFC.u32Register; 10001306: 9001 str r0, [sp, #4] 10001308: 6018 str r0, [r3, #0] for (u32Count = 0; u32Count < channel_stid_cnt[channel]; u32Count++) 1000130a: 6859 ldr r1, [r3, #4] 1000130c: a894 add r0, sp, #592 ; 0x250 1000130e: 0409 lsls r1, r1, #16 10001310: 0c89 lsrs r1, r1, #18 10001312: 4ab5 ldr r2, [pc, #724] ; (100015e8 <..lin.bedcd82a..9716aba.0_52>) 10001314: 0089 lsls r1, r1, #2 10001316: 9c0e ldr r4, [sp, #56] ; 0x38 10001318: 1889 adds r1, r1, r2 1000131a: 1c22 adds r2, r4, #0 1000131c: d100 bne.n 10001320 <..lin.bedcd82a..39964644.0_37+0x26> 1000131e: 4614 mov r4, r2 10001320: 08e2 lsrs r2, r4, #3 10001322: d013 beq.n 1000134c <..lin.bedcd82a..39964644.0_37+0x52> 10001324: 6803 ldr r3, [r0, #0] 10001326: 600b str r3, [r1, #0] 10001328: 6843 ldr r3, [r0, #4] 1000132a: 604b str r3, [r1, #4] 1000132c: 6883 ldr r3, [r0, #8] 1000132e: 608b str r3, [r1, #8] 10001330: 68c3 ldr r3, [r0, #12] 10001332: 60cb str r3, [r1, #12] 10001334: 6903 ldr r3, [r0, #16] 10001336: 610b str r3, [r1, #16] 10001338: 6943 ldr r3, [r0, #20] 1000133a: 614b str r3, [r1, #20] 1000133c: 6983 ldr r3, [r0, #24] 1000133e: 618b str r3, [r1, #24] 10001340: 69c3 ldr r3, [r0, #28] 10001342: 61cb str r3, [r1, #28] 10001344: 3120 adds r1, #32 10001346: 3020 adds r0, #32 10001348: 3a01 subs r2, #1 1000134a: d1eb bne.n 10001324 <..lin.bedcd82a..39964644.0_37+0x2a> 1000134c: 0762 lsls r2, r4, #29 1000134e: 0f52 lsrs r2, r2, #29 10001350: d005 beq.n 1000135e <..lin.bedcd82a..39964644.0_38> 10001352: 6803 ldr r3, [r0, #0] 10001354: 600b str r3, [r1, #0] 10001356: 3104 adds r1, #4 10001358: 3004 adds r0, #4 1000135a: 3a01 subs r2, #1 1000135c: d1f9 bne.n 10001352 <..lin.bedcd82a..39964644.0_37+0x58> 1000135e <..lin.bedcd82a..39964644.0_38>: for (u32Count = 0; u32Count < channel_extid_cnt[channel]; u32Count++) 1000135e: 4ba4 ldr r3, [pc, #656] ; (100015f0 <..lin.bedcd82a..9716aba.0_52+0x8>) 10001360: 4aa1 ldr r2, [pc, #644] ; (100015e8 <..lin.bedcd82a..9716aba.0_52>) 10001362: a814 add r0, sp, #80 ; 0x50 10001364: 6819 ldr r1, [r3, #0] 10001366: 0409 lsls r1, r1, #16 10001368: 0c89 lsrs r1, r1, #18 1000136a: 0089 lsls r1, r1, #2 1000136c: 1889 adds r1, r1, r2 1000136e: 9a0d ldr r2, [sp, #52] ; 0x34 10001370: 920e str r2, [sp, #56] ; 0x38 10001372: 08d2 lsrs r2, r2, #3 10001374: 920a str r2, [sp, #40] ; 0x28 10001376: d036 beq.n 100013e6 <..lin.bedcd82a..39964644.0_38+0x88> 10001378: 4602 mov r2, r0 1000137a: 3228 adds r2, #40 ; 0x28 1000137c: 4614 mov r4, r2 1000137e: 3410 adds r4, #16 10001380: 460b mov r3, r1 10001382: 3328 adds r3, #40 ; 0x28 10001384: 461d mov r5, r3 10001386: 3510 adds r5, #16 10001388: 6806 ldr r6, [r0, #0] 1000138a: 6847 ldr r7, [r0, #4] 1000138c: 600e str r6, [r1, #0] 1000138e: 604f str r7, [r1, #4] 10001390: 6886 ldr r6, [r0, #8] 10001392: 68c7 ldr r7, [r0, #12] 10001394: 608e str r6, [r1, #8] 10001396: 60cf str r7, [r1, #12] 10001398: 6906 ldr r6, [r0, #16] 1000139a: 6947 ldr r7, [r0, #20] 1000139c: 610e str r6, [r1, #16] 1000139e: 614f str r7, [r1, #20] 100013a0: 6986 ldr r6, [r0, #24] 100013a2: 69c7 ldr r7, [r0, #28] 100013a4: 618e str r6, [r1, #24] 100013a6: 61cf str r7, [r1, #28] 100013a8: 6a06 ldr r6, [r0, #32] 100013aa: 6a40 ldr r0, [r0, #36] ; 0x24 100013ac: 620e str r6, [r1, #32] 100013ae: 6248 str r0, [r1, #36] ; 0x24 100013b0: 6810 ldr r0, [r2, #0] 100013b2: 6851 ldr r1, [r2, #4] 100013b4: 6018 str r0, [r3, #0] 100013b6: 6059 str r1, [r3, #4] 100013b8: 6890 ldr r0, [r2, #8] 100013ba: 68d1 ldr r1, [r2, #12] 100013bc: 6098 str r0, [r3, #8] 100013be: 60d9 str r1, [r3, #12] 100013c0: 6820 ldr r0, [r4, #0] 100013c2: 6861 ldr r1, [r4, #4] 100013c4: 6028 str r0, [r5, #0] 100013c6: 6069 str r1, [r5, #4] 100013c8: 3540 adds r5, #64 ; 0x40 100013ca: 3440 adds r4, #64 ; 0x40 100013cc: 4619 mov r1, r3 100013ce: 3118 adds r1, #24 100013d0: 4610 mov r0, r2 100013d2: 9a0a ldr r2, [sp, #40] ; 0x28 100013d4: 3018 adds r0, #24 100013d6: 3a01 subs r2, #1 100013d8: 920a str r2, [sp, #40] ; 0x28 100013da: d004 beq.n 100013e6 <..lin.bedcd82a..39964644.0_38+0x88> 100013dc: 4602 mov r2, r0 100013de: 3228 adds r2, #40 ; 0x28 100013e0: 460b mov r3, r1 100013e2: 3328 adds r3, #40 ; 0x28 100013e4: e7d0 b.n 10001388 <..lin.bedcd82a..39964644.0_38+0x2a> 100013e6: 9b0e ldr r3, [sp, #56] ; 0x38 100013e8: 075a lsls r2, r3, #29 100013ea: 0f52 lsrs r2, r2, #29 100013ec: d007 beq.n 100013fe <..lin.bedcd82a..39964644.0_39> 100013ee: 6803 ldr r3, [r0, #0] 100013f0: 6844 ldr r4, [r0, #4] 100013f2: 600b str r3, [r1, #0] 100013f4: 604c str r4, [r1, #4] 100013f6: 3108 adds r1, #8 100013f8: 3008 adds r0, #8 100013fa: 3a01 subs r2, #1 100013fc: d1f7 bne.n 100013ee <..lin.bedcd82a..39964644.0_38+0x90> 100013fe <..lin.bedcd82a..39964644.0_39>: Can_ConfigureBufferDataSize(channel); 100013fe: 497d ldr r1, [pc, #500] ; (100015f4 <..lin.bedcd82a..9716aba.0_52+0xc>) 10001400: 4c7d ldr r4, [pc, #500] ; (100015f8 <..lin.bedcd82a..9716aba.0_52+0x10>) 10001402: 6808 ldr r0, [r1, #0] 10001404: 2177 movs r1, #119 ; 0x77 10001406: 0109 lsls r1, r1, #4 10001408: 4388 bics r0, r1 1000140a: 08c0 lsrs r0, r0, #3 1000140c: 00c0 lsls r0, r0, #3 1000140e: 9007 str r0, [sp, #28] 10001410: 6020 str r0, [r4, #0] Can_ConfigureRxFifos(channel, noOfFifo0El[channel], channel_extid_cnt[channel], noOfFifo1El[channel]); 10001412: 9b0b ldr r3, [sp, #44] ; 0x2c 10001414: 9a0d ldr r2, [sp, #52] ; 0x34 10001416: 9909 ldr r1, [sp, #36] ; 0x24 10001418: 2000 movs r0, #0 1000141a: f7ff fd7f bl 10000f1c <__Can_ConfigureRxFifos_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> Can_TxChnConfig(channel, noOfRxBuffers[channel], txMsgCount[channel]); 1000141e: 9a0f ldr r2, [sp, #60] ; 0x3c 10001420: 990c ldr r1, [sp, #48] ; 0x30 10001422: 2000 movs r0, #0 10001424: f7ff fdce bl 10000fc4 <__Can_TxChnConfig_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> } 10001428: 4f74 ldr r7, [pc, #464] ; (100015fc <..lin.bedcd82a..9716aba.0_52+0x14>) 1000142a: 44bd add sp, r7 1000142c: bdf0 pop {r4, r5, r6, r7, pc} 1000142e <__Can_Init_Bus_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 1000142e: b081 sub sp, #4 un_CANFD_CH_CCCR_t unCCCR = { 0 }; 10001430: 4a73 ldr r2, [pc, #460] ; (10001600 <..lin.bedcd82a..9716aba.0_52+0x18>) 10001432: 6810 ldr r0, [r2, #0] 10001434: 9000 str r0, [sp, #0] unCCCR.stcField.u1INIT = 1; // Keep in initialization state 10001436: 2207 movs r2, #7 10001438: 4390 bics r0, r2 1000143a: 2203 movs r2, #3 1000143c: 4310 orrs r0, r2 unCCCR.stcField.u1TXP = 0; // Transmit pause disabled 1000143e: 2101 movs r1, #1 10001440: 0389 lsls r1, r1, #14 10001442: 4388 bics r0, r1 unCCCR.stcField.u1BRSE = 0; // Bit rate switching for transmissions disabled 10001444: 4a6f ldr r2, [pc, #444] ; (10001604 <..lin.bedcd82a..9716aba.0_52+0x1c>) 10001446: 213f movs r1, #63 ; 0x3f 10001448: 0109 lsls r1, r1, #4 ChannelsConfig[channel]->M_TTCAN.unCCCR.u32Register = unCCCR.u32Register; 1000144a: 4388 bics r0, r1 1000144c: 6010 str r0, [r2, #0] } 1000144e: b001 add sp, #4 10001450: 4770 bx lr 10001452 : { 10001452: b500 push {lr} 10001454: 496c ldr r1, [pc, #432] ; (10001608 <..lin.bedcd82a..9716aba.0_52+0x20>) can_tx_set_start = 1U; 10001456: 2201 movs r2, #1 10001458: 4613 mov r3, r2 1000145a: c10c stmia r1!, {r2, r3} ChannelsConfig[channel]->M_TTCAN.unCCCR.u32Register = 0x1U; 1000145c: 4b69 ldr r3, [pc, #420] ; (10001604 <..lin.bedcd82a..9716aba.0_52+0x1c>) 1000145e: 601a str r2, [r3, #0] while (ChannelsConfig[channel]->M_TTCAN.unCCCR.stcField.u1INIT != 1U) 10001460: 4a6a ldr r2, [pc, #424] ; (1000160c <..lin.bedcd82a..9716aba.0_52+0x24>) 10001462: 6991 ldr r1, [r2, #24] 10001464: 07c9 lsls r1, r1, #31 10001466: d5fc bpl.n 10001462 10001468 <..lin.bedcd82a..83377caa.0_40>: ChannelsConfig[channel]->M_TTCAN.unCCCR.u32Register = 0x3U; 10001468: 2103 movs r1, #3 1000146a: 6019 str r1, [r3, #0] Can_Init_Clock(change_speed); 1000146c: f7ff fc7a bl 10000d64 <__Can_Init_Clock_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> Can_Init_RxRulesAndTxRxBuffers(); 10001470: f7ff fde5 bl 1000103e <__Can_Init_RxRulesAndTxRxBuffers_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> Can_Init_Bus(); 10001474: f7ff ffdb bl 1000142e <__Can_Init_Bus_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> } 10001478: bd00 pop {pc} 1000147a : { 1000147a: b081 sub sp, #4 un_CANFD_CH_CCCR_t unCCCR = { 0 }; 1000147c: 4b64 ldr r3, [pc, #400] ; (10001610 <..lin.bedcd82a..9716aba.0_52+0x28>) 1000147e: 4963 ldr r1, [pc, #396] ; (1000160c <..lin.bedcd82a..9716aba.0_52+0x24>) unCCCR.stcField.u1INIT = 0; 10001480: 681a ldr r2, [r3, #0] 10001482: 2301 movs r3, #1 10001484: 439a bics r2, r3 ChannelsConfig[channel]->M_TTCAN.unCCCR.u32Register = unCCCR.u32Register; 10001486: 0240 lsls r0, r0, #9 10001488: 1841 adds r1, r0, r1 1000148a: 9200 str r2, [sp, #0] 1000148c: 618a str r2, [r1, #24] while (ChannelsConfig[channel]->M_TTCAN.unCCCR.stcField.u1INIT != 0U) 1000148e: 6988 ldr r0, [r1, #24] 10001490: 07c0 lsls r0, r0, #31 10001492: d4fc bmi.n 1000148e 10001494 <..lin.bedcd82a..25b00b5d.0_41>: } 10001494: b001 add sp, #4 10001496: 4770 bx lr 10001498 : { 10001498: b500 push {lr} 1000149a: b081 sub sp, #4 Can_Init(CAN_SPEED_500K); 1000149c: 485d ldr r0, [pc, #372] ; (10001614 <..lin.bedcd82a..9716aba.0_52+0x2c>) 1000149e: f7ff ffd8 bl 10001452 Can_Enable(CAN_USED_CAN_CHANNEL); 100014a2: 4a5b ldr r2, [pc, #364] ; (10001610 <..lin.bedcd82a..9716aba.0_52+0x28>) 100014a4: 6810 ldr r0, [r2, #0] 100014a6: 2201 movs r2, #1 100014a8: 4390 bics r0, r2 100014aa: 4a56 ldr r2, [pc, #344] ; (10001604 <..lin.bedcd82a..9716aba.0_52+0x1c>) 100014ac: 9000 str r0, [sp, #0] 100014ae: 4957 ldr r1, [pc, #348] ; (1000160c <..lin.bedcd82a..9716aba.0_52+0x24>) 100014b0: 6010 str r0, [r2, #0] 100014b2: 6988 ldr r0, [r1, #24] 100014b4: 07c0 lsls r0, r0, #31 100014b6: d4fc bmi.n 100014b2 100014b8 <..lin.bedcd82a..df15818c.0_42>: } 100014b8: b001 add sp, #4 100014ba: bd00 pop {pc} 100014bc <__Can_CalcRxBufAdrs_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: /// /// \return pu32Adrs Message buffer address corresponding to the index. /// Can be NULL if the index is invalid. //----------------------------------------------------------------------------- static uint32* Can_CalcRxBufAdrs(cy_pstc_canfd_type_t pstcCanFD, uint8 u8MsgBuf) { 100014bc: b510 push {r4, lr} uint32* pu32Adrs = NULL_PTR; 100014be: 2200 movs r2, #0 if (u8MsgBuf > 63U) 100014c0: 293f cmp r1, #63 ; 0x3f 100014c2: d814 bhi.n 100014ee <..lin.bedcd82a..1b8666ca.0_43+0x2a> 100014c4 <..lin.bedcd82a..1b8666ca.0_43>: pu32Adrs = NULL; } else { // Set the message buffer address to the return value if the index is available pu32Adrs = (uint32*)(((uint32)pstcCanFD & 0xFFFF0000UL) + (uint32)CY_CANFD_MSGRAM_START); 100014c4: 0c02 lsrs r2, r0, #16 100014c6: 0412 lsls r2, r2, #16 100014c8: 2301 movs r3, #1 100014ca: 041b lsls r3, r3, #16 100014cc: 18d2 adds r2, r2, r3 pu32Adrs += pstcCanFD->M_TTCAN.unRXBC.stcField.u14RBSA; 100014ce: 24ac movs r4, #172 ; 0xac 100014d0: 5823 ldr r3, [r4, r0] 100014d2: 041b lsls r3, r3, #16 100014d4: 0c9b lsrs r3, r3, #18 100014d6: 009b lsls r3, r3, #2 100014d8: 18d2 adds r2, r2, r3 pu32Adrs += u8MsgBuf * (2U + dataBufferSizeInWord[pstcCanFD->M_TTCAN.unRXESC.stcField.u3RBDS]); 100014da: 30bc adds r0, #188 ; 0xbc 100014dc: 6800 ldr r0, [r0, #0] 100014de: 0540 lsls r0, r0, #21 100014e0: 4b4d ldr r3, [pc, #308] ; (10001618 <..lin.bedcd82a..9716aba.0_52+0x30>) 100014e2: 0f40 lsrs r0, r0, #29 100014e4: 5c18 ldrb r0, [r3, r0] 100014e6: 3002 adds r0, #2 100014e8: 4348 muls r0, r1 100014ea: 0080 lsls r0, r0, #2 100014ec: 1812 adds r2, r2, r0 } return pu32Adrs; 100014ee: 4610 mov r0, r2 100014f0: bd10 pop {r4, pc} 100014f2 <__Can_ExtractMsgFromRXBuffer_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 100014f2: b5f0 push {r4, r5, r6, r7, lr} if (pstcRxBufferAddr != NULL_PTR) 100014f4: 2800 cmp r0, #0 100014f6: d043 beq.n 10001580 <..lin.bedcd82a..69e7f460.0_48> 100014f8 <..lin.bedcd82a..69e7f460.0_44>: pstcCanFDmsg->idConfig.extended = pstcRxBufferAddr->r0_f.xtd; 100014f8: 6802 ldr r2, [r0, #0] 100014fa: 0052 lsls r2, r2, #1 100014fc: 0fd3 lsrs r3, r2, #31 100014fe: 720b strb r3, [r1, #8] if (pstcCanFDmsg->idConfig.extended == FALSE) 10001500: 6802 ldr r2, [r0, #0] 10001502: d102 bne.n 1000150a <..lin.bedcd82a..69e7f460.0_46> 10001504 <..lin.bedcd82a..69e7f460.0_45>: pstcCanFDmsg->idConfig.identifier = (uint32)((uint32)pstcRxBufferAddr->r0_f.id >> 18U); 10001504: 00d2 lsls r2, r2, #3 10001506: 0d52 lsrs r2, r2, #21 10001508: e002 b.n 10001510 <..lin.bedcd82a..69e7f460.0_46+0x6> 1000150a <..lin.bedcd82a..69e7f460.0_46>: pstcCanFDmsg->idConfig.identifier = pstcRxBufferAddr->r0_f.id; 1000150a: 2307 movs r3, #7 1000150c: 075b lsls r3, r3, #29 1000150e: 439a bics r2, r3 pstcCanFDmsg->canFDFormat = pstcRxBufferAddr->r1_f.fdf; 10001510: 604a str r2, [r1, #4] 10001512: 6842 ldr r2, [r0, #4] 10001514: 0292 lsls r2, r2, #10 10001516: 0fd2 lsrs r2, r2, #31 10001518: 700a strb r2, [r1, #0] pstcCanFDmsg->dataConfig.dataLengthCode = pstcRxBufferAddr->r1_f.dlc; 1000151a: 310c adds r1, #12 1000151c: 6842 ldr r2, [r0, #4] 1000151e: 2340 movs r3, #64 ; 0x40 10001520: 0312 lsls r2, r2, #12 10001522: 0f12 lsrs r2, r2, #28 10001524: 545a strb r2, [r3, r1] if (pstcCanFDmsg->dataConfig.dataLengthCode < 8U) 10001526: 2300 movs r3, #0 10001528: 2a08 cmp r2, #8 1000152a: d301 bcc.n 10001530 <..lin.bedcd82a..69e7f460.0_47+0x4> 1000152c <..lin.bedcd82a..69e7f460.0_47>: u16DlcTemp = (uint16)((uint16)pstcCanFDmsg->dataConfig.dataLengthCode - 8U); 1000152c: 3a08 subs r2, #8 1000152e: b293 uxth r3, r2 for (u16Count = 0U; u16Count < dataBufferSizeInWord[u16DlcTemp]; u16Count++) 10001530: 4c39 ldr r4, [pc, #228] ; (10001618 <..lin.bedcd82a..9716aba.0_52+0x30>) 10001532: 2200 movs r2, #0 10001534: 5ce4 ldrb r4, [r4, r3] 10001536: 08e6 lsrs r6, r4, #3 10001538: d017 beq.n 1000156a <..lin.bedcd82a..69e7f460.0_47+0x3e> 1000153a: 460d mov r5, r1 1000153c: 4603 mov r3, r0 1000153e: 3308 adds r3, #8 10001540: 00f2 lsls r2, r6, #3 10001542: 681f ldr r7, [r3, #0] 10001544: 602f str r7, [r5, #0] 10001546: 685f ldr r7, [r3, #4] 10001548: 606f str r7, [r5, #4] 1000154a: 689f ldr r7, [r3, #8] 1000154c: 60af str r7, [r5, #8] 1000154e: 68df ldr r7, [r3, #12] 10001550: 60ef str r7, [r5, #12] 10001552: 691f ldr r7, [r3, #16] 10001554: 612f str r7, [r5, #16] 10001556: 695f ldr r7, [r3, #20] 10001558: 616f str r7, [r5, #20] 1000155a: 699f ldr r7, [r3, #24] 1000155c: 61af str r7, [r5, #24] 1000155e: 69df ldr r7, [r3, #28] 10001560: 61ef str r7, [r5, #28] 10001562: 3520 adds r5, #32 10001564: 3320 adds r3, #32 10001566: 3e01 subs r6, #1 10001568: d1eb bne.n 10001542 <..lin.bedcd82a..69e7f460.0_47+0x16> 1000156a: 0763 lsls r3, r4, #29 1000156c: 0f5b lsrs r3, r3, #29 1000156e: d007 beq.n 10001580 <..lin.bedcd82a..69e7f460.0_48> 10001570: 3008 adds r0, #8 10001572: 0092 lsls r2, r2, #2 10001574: 1810 adds r0, r2, r0 10001576: 1889 adds r1, r1, r2 10001578: c804 ldmia r0!, {r2} 1000157a: c104 stmia r1!, {r2} 1000157c: 3b01 subs r3, #1 1000157e: d1fb bne.n 10001578 <..lin.bedcd82a..69e7f460.0_47+0x4c> 10001580 <..lin.bedcd82a..69e7f460.0_48>: } 10001580: bdf0 pop {r4, r5, r6, r7, pc} 10001582 <__Can_GetMsgRxBuff_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10001582: b5f0 push {r4, r5, r6, r7, lr} 10001584: b094 sub sp, #80 ; 0x50 uint32* pu32Adrs = NULL_PTR; 10001586: 4a20 ldr r2, [pc, #128] ; (10001608 <..lin.bedcd82a..9716aba.0_52+0x20>) for (idx = can_rx_set_start; can_rx_map[idx].channel != CAN_INVALID_CHANNEL; idx++) 10001588: 2400 movs r4, #0 1000158a: 6810 ldr r0, [r2, #0] 1000158c: 00c1 lsls r1, r0, #3 1000158e: 1a08 subs r0, r1, r0 10001590: 4922 ldr r1, [pc, #136] ; (1000161c <..lin.bedcd82a..9716aba.0_52+0x34>) 10001592: 0080 lsls r0, r0, #2 10001594: 180d adds r5, r1, r0 10001596: 6828 ldr r0, [r5, #0] 10001598: 2803 cmp r0, #3 1000159a: d077 beq.n 1000168c <..lin.bedcd82a..9716aba.0_58> 1000159c: 4e1b ldr r6, [pc, #108] ; (1000160c <..lin.bedcd82a..9716aba.0_52+0x24>) 1000159e <..lin.bedcd82a..9716aba.0_49>: rxStorageType = can_rx_map[idx].buffer; 1000159e: 7b29 ldrb r1, [r5, #12] if (rxStorageType < 32U) 100015a0: 2920 cmp r1, #32 100015a2: d23d bcs.n 10001620 <..lin.bedcd82a..9716aba.0_53> 100015a4 <..lin.bedcd82a..9716aba.0_50>: if ((ChannelsConfig[channel]->M_TTCAN.unNDAT1.u32Register & (1UL << rxStorageType)) != 0U) // Message buffers 0-31 100015a4: 0240 lsls r0, r0, #9 100015a6: 1980 adds r0, r0, r6 100015a8: 2201 movs r2, #1 100015aa: 408a lsls r2, r1 100015ac: 2798 movs r7, #152 ; 0x98 100015ae: 583b ldr r3, [r7, r0] 100015b0: 4013 ands r3, r2 100015b2: d058 beq.n 10001666 <..lin.bedcd82a..9716aba.0_55+0x2e> 100015b4 <..lin.bedcd82a..9716aba.0_51>: pu32Adrs = Can_CalcRxBufAdrs(ChannelsConfig[channel], rxStorageType); 100015b4: 0c03 lsrs r3, r0, #16 100015b6: 041b lsls r3, r3, #16 100015b8: 2401 movs r4, #1 100015ba: 0424 lsls r4, r4, #16 100015bc: 191c adds r4, r3, r4 100015be: 23ac movs r3, #172 ; 0xac 100015c0: 581b ldr r3, [r3, r0] 100015c2: 041b lsls r3, r3, #16 100015c4: 0c9b lsrs r3, r3, #18 100015c6: 009b lsls r3, r3, #2 100015c8: 18e4 adds r4, r4, r3 100015ca: 23bc movs r3, #188 ; 0xbc 100015cc: 581b ldr r3, [r3, r0] 100015ce: 055b lsls r3, r3, #21 100015d0: 4f11 ldr r7, [pc, #68] ; (10001618 <..lin.bedcd82a..9716aba.0_52+0x30>) 100015d2: 0f5b lsrs r3, r3, #29 100015d4: 5cfb ldrb r3, [r7, r3] 100015d6: 3302 adds r3, #2 100015d8: 4359 muls r1, r3 100015da: 0089 lsls r1, r1, #2 100015dc: 1864 adds r4, r4, r1 ChannelsConfig[channel]->M_TTCAN.unNDAT1.u32Register = (1UL << rxStorageType); 100015de: 2198 movs r1, #152 ; 0x98 100015e0: 500a str r2, [r1, r0] 100015e2: 2c00 cmp r4, #0 100015e4: d04e beq.n 10001684 <..lin.bedcd82a..9716aba.0_57+0xc> 100015e6: e040 b.n 1000166a <..lin.bedcd82a..9716aba.0_56> 100015e8 <..lin.bedcd82a..9716aba.0_52>: 100015e8: 0000 movs r0, r0 100015ea: 4053 eors r3, r2 100015ec: 0080 lsls r0, r0, #2 100015ee: 4052 eors r2, r2 100015f0: 0088 lsls r0, r1, #2 100015f2: 4052 eors r2, r2 100015f4: 4ab0 ldr r2, [pc, #704] ; (100018b8 ) 100015f6: 1000 asrs r0, r0, #32 100015f8: 00bc lsls r4, r7, #2 100015fa: 4052 eors r2, r2 100015fc: 0358 lsls r0, r3, #13 100015fe: 0000 movs r0, r0 10001600: 4e0c ldr r6, [pc, #48] ; (10001634 <..lin.bedcd82a..9716aba.0_54+0x10>) 10001602: 1000 asrs r0, r0, #32 10001604: 0018 movs r0, r3 10001606: 4052 eors r2, r2 10001608: 0a1c lsrs r4, r3, #8 1000160a: 0800 lsrs r0, r0, #32 1000160c: 0000 movs r0, r0 1000160e: 4052 eors r2, r2 10001610: 4e10 ldr r6, [pc, #64] ; (10001654 <..lin.bedcd82a..9716aba.0_55+0x1c>) 10001612: 1000 asrs r0, r0, #32 10001614: a120 add r1, pc, #128 ; (adr r1, 10001698 <..lin.bedcd82a..bdb9b931.0_59>) 10001616: 0007 movs r7, r0 10001618: 4ef0 ldr r6, [pc, #960] ; (100019dc <..lin.bedcd82a..7494d54f.0_90+0x12>) 1000161a: 1000 asrs r0, r0, #32 1000161c: 4e3c ldr r6, [pc, #240] ; (10001710 <__Can_ProcessRxFIFOData_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf+0xe>) 1000161e: 1000 asrs r0, r0, #32 10001620 <..lin.bedcd82a..9716aba.0_53>: else if ((rxStorageType >= 32U) && (rxStorageType < 64U)) // Message buffers 32-63 10001620: 2940 cmp r1, #64 ; 0x40 10001622: d220 bcs.n 10001666 <..lin.bedcd82a..9716aba.0_55+0x2e> 10001624 <..lin.bedcd82a..9716aba.0_54>: if ((ChannelsConfig[channel]->M_TTCAN.unNDAT2.u32Register & (1UL << (rxStorageType - 32U))) != 0U) 10001624: 0240 lsls r0, r0, #9 10001626: 1980 adds r0, r0, r6 10001628: 460b mov r3, r1 1000162a: 3b20 subs r3, #32 1000162c: 2201 movs r2, #1 1000162e: 409a lsls r2, r3 10001630: 279c movs r7, #156 ; 0x9c 10001632: 583b ldr r3, [r7, r0] 10001634: 4013 ands r3, r2 10001636: d016 beq.n 10001666 <..lin.bedcd82a..9716aba.0_55+0x2e> 10001638 <..lin.bedcd82a..9716aba.0_55>: pu32Adrs = Can_CalcRxBufAdrs(ChannelsConfig[channel], rxStorageType); 10001638: 0c03 lsrs r3, r0, #16 1000163a: 041b lsls r3, r3, #16 1000163c: 2401 movs r4, #1 1000163e: 0424 lsls r4, r4, #16 10001640: 191c adds r4, r3, r4 10001642: 23ac movs r3, #172 ; 0xac 10001644: 581b ldr r3, [r3, r0] 10001646: 041b lsls r3, r3, #16 10001648: 0c9b lsrs r3, r3, #18 1000164a: 009b lsls r3, r3, #2 1000164c: 18e4 adds r4, r4, r3 1000164e: 23bc movs r3, #188 ; 0xbc 10001650: 581b ldr r3, [r3, r0] 10001652: 055b lsls r3, r3, #21 10001654: 4fbf ldr r7, [pc, #764] ; (10001954 <__ghs_eofn_Can_RxCan2GetData>) 10001656: 0f5b lsrs r3, r3, #29 10001658: 5cfb ldrb r3, [r7, r3] 1000165a: 3302 adds r3, #2 1000165c: 4359 muls r1, r3 1000165e: 0089 lsls r1, r1, #2 10001660: 1864 adds r4, r4, r1 ChannelsConfig[channel]->M_TTCAN.unNDAT2.u32Register = (1UL << (rxStorageType - 32U)); 10001662: 219c movs r1, #156 ; 0x9c 10001664: 500a str r2, [r1, r0] if (pu32Adrs != NULL_PTR) 10001666: 2c00 cmp r4, #0 10001668: d00c beq.n 10001684 <..lin.bedcd82a..9716aba.0_57+0xc> 1000166a <..lin.bedcd82a..9716aba.0_56>: Can_ExtractMsgFromRXBuffer((cy_stc_canfd_rx_buffer_t *)pu32Adrs, &stcCanFDmsg); 1000166a: 4669 mov r1, sp 1000166c: 4620 mov r0, r4 1000166e: f7ff ff40 bl 100014f2 <__Can_ExtractMsgFromRXBuffer_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> if (can_rx_map[idx].callback != NULL) 10001672: 69ab ldr r3, [r5, #24] 10001674: 2b00 cmp r3, #0 10001676: d005 beq.n 10001684 <..lin.bedcd82a..9716aba.0_57+0xc> 10001678 <..lin.bedcd82a..9716aba.0_57>: can_rx_map[idx].callback(can_rx_map[idx].handle, (uint8*)(stcCanFDmsg.dataConfig.data), stcCanFDmsg.dataConfig.dataLengthCode); 10001678: a813 add r0, sp, #76 ; 0x4c 1000167a: 7802 ldrb r2, [r0, #0] 1000167c: 2004 movs r0, #4 1000167e: 5628 ldrsb r0, [r5, r0] 10001680: a903 add r1, sp, #12 10001682: 4798 blx r3 for (idx = can_rx_set_start; can_rx_map[idx].channel != CAN_INVALID_CHANNEL; idx++) 10001684: 69e8 ldr r0, [r5, #28] 10001686: 351c adds r5, #28 10001688: 2803 cmp r0, #3 1000168a: d188 bne.n 1000159e <..lin.bedcd82a..9716aba.0_49> 1000168c <..lin.bedcd82a..9716aba.0_58>: } 1000168c: b014 add sp, #80 ; 0x50 1000168e: bdf0 pop {r4, r5, r6, r7, pc} 10001690 <__Can_CalcRxFifoAdrs_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10001690: b530 push {r4, r5, lr} uint32* pu32Adrs = NULL_PTR; 10001692: 2300 movs r3, #0 if (u8FifoNumber > 1U) 10001694: 2901 cmp r1, #1 10001696: d832 bhi.n 100016fe <..lin.bedcd82a..bdb9b931.0_61> 10001698 <..lin.bedcd82a..bdb9b931.0_59>: pu32Adrs = (uint32*)(((uint32)pstcCanFD & 0xFFFF0000UL) + (uint32)CY_CANFD_MSGRAM_START); 10001698: 0c03 lsrs r3, r0, #16 1000169a: 041b lsls r3, r3, #16 1000169c: 2401 movs r4, #1 1000169e: 0424 lsls r4, r4, #16 100016a0: 191b adds r3, r3, r4 pu32Adrs += (u8FifoNumber == 0U) ? pstcCanFD->M_TTCAN.unRXF0C.stcField.u14F0SA : pstcCanFD->M_TTCAN.unRXF1C.stcField.u14F1SA; 100016a2: 2900 cmp r1, #0 100016a4: d110 bne.n 100016c8 <..lin.bedcd82a..bdb9b931.0_59+0x30> 100016a6: 21a0 movs r1, #160 ; 0xa0 100016a8: 580c ldr r4, [r1, r0] 100016aa: 0424 lsls r4, r4, #16 100016ac: 0ca4 lsrs r4, r4, #18 100016ae: 00a4 lsls r4, r4, #2 100016b0: 191b adds r3, r3, r4 100016b2: 30bc adds r0, #188 ; 0xbc 100016b4: 6800 ldr r0, [r0, #0] 100016b6: 0740 lsls r0, r0, #29 100016b8: 49a6 ldr r1, [pc, #664] ; (10001954 <__ghs_eofn_Can_RxCan2GetData>) 100016ba: 0f40 lsrs r0, r0, #29 100016bc: 5c08 ldrb r0, [r1, r0] 100016be: 3002 adds r0, #2 100016c0: 4350 muls r0, r2 100016c2: 0080 lsls r0, r0, #2 100016c4: 1818 adds r0, r3, r0 100016c6: e01b b.n 10001700 <..lin.bedcd82a..bdb9b931.0_61+0x2> 100016c8: 25b0 movs r5, #176 ; 0xb0 100016ca: 582c ldr r4, [r5, r0] 100016cc: 0424 lsls r4, r4, #16 100016ce: 0ca4 lsrs r4, r4, #18 100016d0: 00a4 lsls r4, r4, #2 100016d2: 191b adds r3, r3, r4 100016d4 <..lin.bedcd82a..bdb9b931.0_60>: pu32Adrs += u32GetIndex * (uint32)(2U + (uint32)dataBufferSizeInWord[(u8FifoNumber == 0U) ? pstcCanFD->M_TTCAN.unRXESC.stcField.u3F0DS : pstcCanFD->M_TTCAN.unRXESC.stcField.u3F1DS]); 100016d4: 30bc adds r0, #188 ; 0xbc 100016d6: 6800 ldr r0, [r0, #0] 100016d8: 2900 cmp r1, #0 100016da: d108 bne.n 100016ee <..lin.bedcd82a..bdb9b931.0_60+0x1a> 100016dc: 0740 lsls r0, r0, #29 100016de: 499d ldr r1, [pc, #628] ; (10001954 <__ghs_eofn_Can_RxCan2GetData>) 100016e0: 0f40 lsrs r0, r0, #29 100016e2: 5c08 ldrb r0, [r1, r0] 100016e4: 3002 adds r0, #2 100016e6: 4350 muls r0, r2 100016e8: 0080 lsls r0, r0, #2 100016ea: 1818 adds r0, r3, r0 100016ec: e008 b.n 10001700 <..lin.bedcd82a..bdb9b931.0_61+0x2> 100016ee: 0640 lsls r0, r0, #25 100016f0: 4998 ldr r1, [pc, #608] ; (10001954 <__ghs_eofn_Can_RxCan2GetData>) 100016f2: 0f40 lsrs r0, r0, #29 100016f4: 5c08 ldrb r0, [r1, r0] 100016f6: 3002 adds r0, #2 100016f8: 4350 muls r0, r2 100016fa: 0080 lsls r0, r0, #2 100016fc: 181b adds r3, r3, r0 100016fe <..lin.bedcd82a..bdb9b931.0_61>: return pu32Adrs; 100016fe: 4618 mov r0, r3 10001700: bd30 pop {r4, r5, pc} 10001702 <__Can_ProcessRxFIFOData_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10001702: b40f push {r0, r1, r2, r3} 10001704: b530 push {r4, r5, lr} 10001706: 9a17 ldr r2, [sp, #92] ; 0x5c for (idx = can_rx_set_start; can_rx_map[idx].channel != CAN_INVALID_CHANNEL; ++idx) 10001708: 4b93 ldr r3, [pc, #588] ; (10001958 <__ghs_eofn_Can_RxCan2GetData+0x4>) 1000170a: 6818 ldr r0, [r3, #0] 1000170c: 00c1 lsls r1, r0, #3 1000170e: 1a08 subs r0, r1, r0 10001710: 4992 ldr r1, [pc, #584] ; (1000195c <__ghs_eofn_Can_RxCan2GetData+0x8>) 10001712: 0080 lsls r0, r0, #2 10001714: 1808 adds r0, r1, r0 10001716: 6801 ldr r1, [r0, #0] 10001718: 2903 cmp r1, #3 1000171a: d015 beq.n 10001748 <..lin.bedcd82a..a93352ed.0_65> 1000171c: a903 add r1, sp, #12 1000171e <..lin.bedcd82a..a93352ed.0_62>: if ((can_rx_map[idx].callback != NULL) && (can_rx_map[idx].id == stcCanFDmsg.idConfig.identifier) && ((can_rx_map[idx].buffer & fifoFilter) != 0UL)) 1000171e: 6983 ldr r3, [r0, #24] 10001720: 2b00 cmp r3, #0 10001722: d00d beq.n 10001740 <..lin.bedcd82a..a93352ed.0_64> 10001724: 6884 ldr r4, [r0, #8] 10001726: 684d ldr r5, [r1, #4] 10001728: 42ac cmp r4, r5 1000172a: d109 bne.n 10001740 <..lin.bedcd82a..a93352ed.0_64> 1000172c: 7b04 ldrb r4, [r0, #12] 1000172e: 4014 ands r4, r2 10001730: d006 beq.n 10001740 <..lin.bedcd82a..a93352ed.0_64> 10001732 <..lin.bedcd82a..a93352ed.0_63>: can_rx_map[idx].callback(can_rx_map[idx].handle, (uint8*)(stcCanFDmsg.dataConfig.data), stcCanFDmsg.dataConfig.dataLengthCode); 10001732: 224c movs r2, #76 ; 0x4c 10001734: 5c52 ldrb r2, [r2, r1] 10001736: 310c adds r1, #12 10001738: 2404 movs r4, #4 1000173a: 5700 ldrsb r0, [r0, r4] 1000173c: 4798 blx r3 break; 1000173e: e003 b.n 10001748 <..lin.bedcd82a..a93352ed.0_65> 10001740 <..lin.bedcd82a..a93352ed.0_64>: for (idx = can_rx_set_start; can_rx_map[idx].channel != CAN_INVALID_CHANNEL; ++idx) 10001740: 69c3 ldr r3, [r0, #28] 10001742: 301c adds r0, #28 10001744: 2b03 cmp r3, #3 10001746: d1ea bne.n 1000171e <..lin.bedcd82a..a93352ed.0_62> 10001748 <..lin.bedcd82a..a93352ed.0_65>: } 10001748: bc30 pop {r4, r5} 1000174a: bc08 pop {r3} 1000174c: b004 add sp, #16 1000174e: 4718 bx r3 10001750 <__Can_GetMsgRxFifo_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 10001750: b530 push {r4, r5, lr} 10001752: b0a7 sub sp, #156 ; 0x9c 10001754: 4982 ldr r1, [pc, #520] ; (10001960 <__ghs_eofn_Can_RxCan2GetData+0xc>) 10001756: 6808 ldr r0, [r1, #0] 10001758: 0640 lsls r0, r0, #25 1000175a: d030 beq.n 100017be <..lin.bedcd82a..2ee15cfb.0_68+0x8> 1000175c <..lin.bedcd82a..2ee15cfb.0_66>: 1000175c: 4c81 ldr r4, [pc, #516] ; (10001964 <__ghs_eofn_Can_RxCan2GetData+0x10>) unRXF0S.u32Register = ChannelsConfig[channel]->M_TTCAN.unRXF0S.u32Register; 1000175e: 23a4 movs r3, #164 ; 0xa4 10001760: 5918 ldr r0, [r3, r4] 10001762: 9011 str r0, [sp, #68] ; 0x44 pu32Adrs = Can_CalcRxFifoAdrs(ChannelsConfig[channel], CY_CANFD_RX_FIFO0, unRXF0S.stcField.u6F0GI); 10001764: 0485 lsls r5, r0, #18 10001766: 0ead lsrs r5, r5, #26 10001768: 462a mov r2, r5 1000176a: 4620 mov r0, r4 1000176c: 2100 movs r1, #0 1000176e: f7ff ff8f bl 10001690 <__Can_CalcRxFifoAdrs_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> if (pu32Adrs != NULL_PTR) 10001772: 2800 cmp r0, #0 10001774: d01f beq.n 100017b6 <..lin.bedcd82a..2ee15cfb.0_68> 10001776 <..lin.bedcd82a..2ee15cfb.0_67>: Can_ExtractMsgFromRXBuffer((cy_stc_canfd_rx_buffer_t *)pu32Adrs, &stcCanFDmsg); 10001776: a913 add r1, sp, #76 ; 0x4c 10001778: f7ff febb bl 100014f2 <__Can_ExtractMsgFromRXBuffer_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> ChannelsConfig[channel]->M_TTCAN.unRXF0A.stcField.u6F0AI = unRXF0S.stcField.u6F0GI; 1000177c: 22a8 movs r2, #168 ; 0xa8 1000177e: 5910 ldr r0, [r2, r4] 10001780: 213f movs r1, #63 ; 0x3f 10001782: 4388 bics r0, r1 10001784: 4328 orrs r0, r5 10001786: 5110 str r0, [r2, r4] Can_ProcessRxFIFOData(stcCanFDmsg, RX_FIFO_0); 10001788: 2001 movs r0, #1 1000178a: 07c0 lsls r0, r0, #31 1000178c: 9010 str r0, [sp, #64] ; 0x40 1000178e: b084 sub sp, #16 10001790: 4669 mov r1, sp 10001792: a817 add r0, sp, #92 ; 0x5c 10001794: 4603 mov r3, r0 10001796: 3350 adds r3, #80 ; 0x50 10001798: 6802 ldr r2, [r0, #0] 1000179a: 600a str r2, [r1, #0] 1000179c: 6842 ldr r2, [r0, #4] 1000179e: 604a str r2, [r1, #4] 100017a0: 6882 ldr r2, [r0, #8] 100017a2: 608a str r2, [r1, #8] 100017a4: 68c2 ldr r2, [r0, #12] 100017a6: 60ca str r2, [r1, #12] 100017a8: 3010 adds r0, #16 100017aa: 3110 adds r1, #16 100017ac: 4283 cmp r3, r0 100017ae: d1f3 bne.n 10001798 <..lin.bedcd82a..2ee15cfb.0_67+0x22> 100017b0: bc0f pop {r0, r1, r2, r3} 100017b2: f7ff ffa6 bl 10001702 <__Can_ProcessRxFIFOData_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> 100017b6 <..lin.bedcd82a..2ee15cfb.0_68>: while (ChannelsConfig[channel]->M_TTCAN.unRXF0S.stcField.u7F0FL > 0U) 100017b6: 21a4 movs r1, #164 ; 0xa4 100017b8: 5908 ldr r0, [r1, r4] 100017ba: 0640 lsls r0, r0, #25 100017bc: d1cf bne.n 1000175e <..lin.bedcd82a..2ee15cfb.0_66+0x2> 100017be: 496a ldr r1, [pc, #424] ; (10001968 <__ghs_eofn_Can_RxCan2GetData+0x14>) 100017c0: 6808 ldr r0, [r1, #0] 100017c2: 0640 lsls r0, r0, #25 100017c4: d030 beq.n 10001828 <..lin.bedcd82a..2ee15cfb.0_72> 100017c6: 4c67 ldr r4, [pc, #412] ; (10001964 <__ghs_eofn_Can_RxCan2GetData+0x10>) 100017c8 <..lin.bedcd82a..2ee15cfb.0_69>: unRXF1S.u32Register = ChannelsConfig[channel]->M_TTCAN.unRXF1S.u32Register; 100017c8: 23b4 movs r3, #180 ; 0xb4 100017ca: 5918 ldr r0, [r3, r4] 100017cc: 9012 str r0, [sp, #72] ; 0x48 pu32Adrs = Can_CalcRxFifoAdrs(ChannelsConfig[channel], CY_CANFD_RX_FIFO1, unRXF1S.stcField.u6F1GI); 100017ce: 0485 lsls r5, r0, #18 100017d0: 0ead lsrs r5, r5, #26 100017d2: 462a mov r2, r5 100017d4: 4620 mov r0, r4 100017d6: 2101 movs r1, #1 100017d8: f7ff ff5a bl 10001690 <__Can_CalcRxFifoAdrs_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> if (pu32Adrs != NULL_PTR) 100017dc: 2800 cmp r0, #0 100017de: d01f beq.n 10001820 <..lin.bedcd82a..2ee15cfb.0_71> 100017e0 <..lin.bedcd82a..2ee15cfb.0_70>: Can_ExtractMsgFromRXBuffer((cy_stc_canfd_rx_buffer_t *)pu32Adrs, &stcCanFDmsg); 100017e0: a913 add r1, sp, #76 ; 0x4c 100017e2: f7ff fe86 bl 100014f2 <__Can_ExtractMsgFromRXBuffer_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> ChannelsConfig[channel]->M_TTCAN.unRXF1A.stcField.u6F1AI = unRXF1S.stcField.u6F1GI; 100017e6: 22b8 movs r2, #184 ; 0xb8 100017e8: 5910 ldr r0, [r2, r4] 100017ea: 213f movs r1, #63 ; 0x3f 100017ec: 4388 bics r0, r1 100017ee: 4328 orrs r0, r5 100017f0: 5110 str r0, [r2, r4] Can_ProcessRxFIFOData(stcCanFDmsg, RX_FIFO_1); 100017f2: 2001 movs r0, #1 100017f4: 0780 lsls r0, r0, #30 100017f6: 9010 str r0, [sp, #64] ; 0x40 100017f8: b084 sub sp, #16 100017fa: 4669 mov r1, sp 100017fc: a817 add r0, sp, #92 ; 0x5c 100017fe: 4603 mov r3, r0 10001800: 3350 adds r3, #80 ; 0x50 10001802: 6802 ldr r2, [r0, #0] 10001804: 600a str r2, [r1, #0] 10001806: 6842 ldr r2, [r0, #4] 10001808: 604a str r2, [r1, #4] 1000180a: 6882 ldr r2, [r0, #8] 1000180c: 608a str r2, [r1, #8] 1000180e: 68c2 ldr r2, [r0, #12] 10001810: 60ca str r2, [r1, #12] 10001812: 3010 adds r0, #16 10001814: 3110 adds r1, #16 10001816: 4283 cmp r3, r0 10001818: d1f3 bne.n 10001802 <..lin.bedcd82a..2ee15cfb.0_70+0x22> 1000181a: bc0f pop {r0, r1, r2, r3} 1000181c: f7ff ff71 bl 10001702 <__Can_ProcessRxFIFOData_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> 10001820 <..lin.bedcd82a..2ee15cfb.0_71>: while (ChannelsConfig[channel]->M_TTCAN.unRXF1S.stcField.u7F1FL > 0U) 10001820: 21b4 movs r1, #180 ; 0xb4 10001822: 5908 ldr r0, [r1, r4] 10001824: 0640 lsls r0, r0, #25 10001826: d1cf bne.n 100017c8 <..lin.bedcd82a..2ee15cfb.0_69> 10001828 <..lin.bedcd82a..2ee15cfb.0_72>: } 10001828: b027 add sp, #156 ; 0x9c 1000182a: bd30 pop {r4, r5, pc} 1000182c <__CanSub_Cycle_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf>: { 1000182c: b570 push {r4, r5, r6, lr} 1000182e: b081 sub sp, #4 10001830: 4c4e ldr r4, [pc, #312] ; (1000196c <__ghs_eofn_Can_RxCan2GetData+0x18>) Can_GetMsgRxBuff(); 10001832: f7ff fea6 bl 10001582 <__Can_GetMsgRxBuff_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> Can_GetMsgRxFifo(); 10001836: f7ff ff8b bl 10001750 <__Can_GetMsgRxFifo_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> for (idx = can_tx_set_start; can_tx_map[idx].channel != CAN_INVALID_CHANNEL; ++idx) 1000183a: 6820 ldr r0, [r4, #0] 1000183c: 00c1 lsls r1, r0, #3 1000183e: 1a08 subs r0, r1, r0 10001840: 494b ldr r1, [pc, #300] ; (10001970 <__ghs_eofn_Can_RxCan2GetData+0x1c>) 10001842: 0080 lsls r0, r0, #2 10001844: 180d adds r5, r1, r0 10001846: 6828 ldr r0, [r5, #0] 10001848: 2803 cmp r0, #3 1000184a: d014 beq.n 10001876 <..lin.bedcd82a..18a37ee0.0_75+0xe> 1000184c: 4e45 ldr r6, [pc, #276] ; (10001964 <__ghs_eofn_Can_RxCan2GetData+0x10>) 1000184e <..lin.bedcd82a..18a37ee0.0_73>: if ((txBuffers & (1UL << can_tx_map[idx].buffer)) == 1U) 1000184e: 0240 lsls r0, r0, #9 10001850: 1981 adds r1, r0, r6 10001852: 7b28 ldrb r0, [r5, #12] 10001854: 2201 movs r2, #1 10001856: 4082 lsls r2, r0 10001858: 23d8 movs r3, #216 ; 0xd8 1000185a: 5858 ldr r0, [r3, r1] 1000185c: 4010 ands r0, r2 1000185e: 2801 cmp r0, #1 10001860: d105 bne.n 1000186e <..lin.bedcd82a..18a37ee0.0_75+0x6> 10001862 <..lin.bedcd82a..18a37ee0.0_74>: if (can_tx_map[idx].callback != NULL) 10001862: 69a9 ldr r1, [r5, #24] 10001864: 2900 cmp r1, #0 10001866: d002 beq.n 1000186e <..lin.bedcd82a..18a37ee0.0_75+0x6> 10001868 <..lin.bedcd82a..18a37ee0.0_75>: can_tx_map[idx].callback(can_tx_map[idx].handle); 10001868: 2004 movs r0, #4 1000186a: 5628 ldrsb r0, [r5, r0] 1000186c: 4788 blx r1 for (idx = can_tx_set_start; can_tx_map[idx].channel != CAN_INVALID_CHANNEL; ++idx) 1000186e: 69e8 ldr r0, [r5, #28] 10001870: 351c adds r5, #28 10001872: 2803 cmp r0, #3 10001874: d1eb bne.n 1000184e <..lin.bedcd82a..18a37ee0.0_73> 10001876: 4a3f ldr r2, [pc, #252] ; (10001974 <__ghs_eofn_Can_RxCan2GetData+0x20>) 10001878 <..lin.bedcd82a..18a37ee0.0_76>: if (Can_SpeedChangeReq != Can_Speed) 10001878: 6860 ldr r0, [r4, #4] 1000187a: 6811 ldr r1, [r2, #0] 1000187c: 4288 cmp r0, r1 1000187e: d012 beq.n 100018a6 <..lin.bedcd82a..18a37ee0.0_79> 10001880 <..lin.bedcd82a..18a37ee0.0_77>: Can_prescaler++; 10001880: 7a21 ldrb r1, [r4, #8] 10001882: 3101 adds r1, #1 10001884: 7221 strb r1, [r4, #8] if (Can_prescaler % 8U == 0U) 10001886: 0749 lsls r1, r1, #29 10001888: d10d bne.n 100018a6 <..lin.bedcd82a..18a37ee0.0_79> 1000188a <..lin.bedcd82a..18a37ee0.0_78>: Can_Speed = Can_SpeedChangeReq; 1000188a: 6010 str r0, [r2, #0] Can_Init(Can_SpeedChangeReq); 1000188c: f7ff fde1 bl 10001452 Can_Enable(CAN_USED_CAN_CHANNEL); 10001890: 4b39 ldr r3, [pc, #228] ; (10001978 <__ghs_eofn_Can_RxCan2GetData+0x24>) 10001892: 6818 ldr r0, [r3, #0] 10001894: 2301 movs r3, #1 10001896: 4398 bics r0, r3 10001898: 4b38 ldr r3, [pc, #224] ; (1000197c <__ghs_eofn_Can_RxCan2GetData+0x28>) 1000189a: 9000 str r0, [sp, #0] 1000189c: 4931 ldr r1, [pc, #196] ; (10001964 <__ghs_eofn_Can_RxCan2GetData+0x10>) 1000189e: 6018 str r0, [r3, #0] 100018a0: 6988 ldr r0, [r1, #24] 100018a2: 07c0 lsls r0, r0, #31 100018a4: d4fc bmi.n 100018a0 <..lin.bedcd82a..18a37ee0.0_78+0x16> 100018a6 <..lin.bedcd82a..18a37ee0.0_79>: } 100018a6: b001 add sp, #4 100018a8: bd70 pop {r4, r5, r6, pc} 100018aa : { 100018aa: b500 push {lr} 100018ac: 4934 ldr r1, [pc, #208] ; (10001980 <__ghs_eofn_Can_RxCan2GetData+0x2c>) ++Can_CyclePrescaler; 100018ae: 7848 ldrb r0, [r1, #1] 100018b0: 3001 adds r0, #1 100018b2: 7048 strb r0, [r1, #1] if(Can_CycleDownloadIsInProgress == (boolean) TRUE) 100018b4: 7889 ldrb r1, [r1, #2] 100018b6: 2901 cmp r1, #1 100018b8: d001 beq.n 100018be <..lin.bedcd82a..df13fac4.0_81> 100018ba <..lin.bedcd82a..df13fac4.0_80>: if((Can_CyclePrescaler % 4U) == 0U) 100018ba: 0780 lsls r0, r0, #30 100018bc: d101 bne.n 100018c2 <..lin.bedcd82a..df13fac4.0_81+0x4> 100018be <..lin.bedcd82a..df13fac4.0_81>: CanSub_Cycle(); 100018be: f7ff ffb5 bl 1000182c <__CanSub_Cycle_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjCan_inf> } 100018c2: bd00 pop {pc} 100018c4 : if (((new_speed == CAN_SPEED_500K) || (new_speed == CAN_SPEED_1M))) 100018c4: 492f ldr r1, [pc, #188] ; (10001984 <__ghs_eofn_Can_RxCan2GetData+0x30>) 100018c6: 4288 cmp r0, r1 100018c8: d002 beq.n 100018d0 <..lin.bedcd82a..2ab5be4d.0_82> 100018ca: 0049 lsls r1, r1, #1 100018cc: 4288 cmp r0, r1 100018ce: d101 bne.n 100018d4 <..lin.bedcd82a..2ab5be4d.0_82+0x4> 100018d0 <..lin.bedcd82a..2ab5be4d.0_82>: Can_SpeedChangeReq = new_speed; 100018d0: 492d ldr r1, [pc, #180] ; (10001988 <__ghs_eofn_Can_RxCan2GetData+0x34>) 100018d2: 6008 str r0, [r1, #0] } 100018d4: 4770 bx lr 100018d6 : } void Can_Cycle_SetDownloadIsInProgress(boolean value) { Can_CycleDownloadIsInProgress = value; 100018d6: 492d ldr r1, [pc, #180] ; (1000198c <__ghs_eofn_Can_RxCan2GetData+0x38>) 100018d8: 7008 strb r0, [r1, #0] } 100018da: 4770 bx lr 100018dc : boolean Can_Cycle_GetDownloadIsInProgress(void) { return Can_CycleDownloadIsInProgress; 100018dc: 492b ldr r1, [pc, #172] ; (1000198c <__ghs_eofn_Can_RxCan2GetData+0x38>) 100018de: 7808 ldrb r0, [r1, #0] 100018e0: 4770 bx lr 100018e2 : /// data: data to be sent /// dlc: data length /// \return - //----------------------------------------------------------------------------- void Can_TxCan2SendData(const uint8* data, uint8 dlc) { 100018e2: b570 push {r4, r5, r6, lr} 100018e4: 4606 mov r6, r0 100018e6: 460d mov r5, r1 if (dlc <= 8U) 100018e8: 2908 cmp r1, #8 100018ea: d80e bhi.n 1000190a <..lin.bedcd82a..a384caaa.0_83+0x1e> 100018ec <..lin.bedcd82a..a384caaa.0_83>: { // fill buffer with dummy (void)memset(Can2Data, 0x55, 8); 100018ec: 4c28 ldr r4, [pc, #160] ; (10001990 <__ghs_eofn_Can_RxCan2GetData+0x3c>) 100018ee: 2208 movs r2, #8 100018f0: 2155 movs r1, #85 ; 0x55 100018f2: 4620 mov r0, r4 100018f4: f7fe fdc8 bl 10000488 // store data in buffer (void)memcpy(Can2Data, data, dlc); 100018f8: 462a mov r2, r5 100018fa: 4631 mov r1, r6 100018fc: 4620 mov r0, r4 100018fe: f7fe fdda bl 100004b6 // send data over CAN2 (void)Can_SendMsg(CAN_TX_SUB_MSG, Can2Data); 10001902: 4621 mov r1, r4 10001904: 2003 movs r0, #3 10001906: f7ff f95b bl 10000bc0 } } 1000190a: bd70 pop {r4, r5, r6, pc} 1000190c : /// data: data to be sent /// dlc: data length /// \return - //----------------------------------------------------------------------------- void Can_TxCan3SendData(const uint8* data, uint8 dlc) { 1000190c: b570 push {r4, r5, r6, lr} 1000190e: 4606 mov r6, r0 10001910: 460d mov r5, r1 if (dlc <= 8U) 10001912: 2908 cmp r1, #8 10001914: d80e bhi.n 10001934 <..lin.bedcd82a..18013bab.0_84+0x1e> 10001916 <..lin.bedcd82a..18013bab.0_84>: { // fill buffer with dummy (void)memset(Can3Data, 0x55, 8); 10001916: 4c1f ldr r4, [pc, #124] ; (10001994 <__ghs_eofn_Can_RxCan2GetData+0x40>) 10001918: 2208 movs r2, #8 1000191a: 2155 movs r1, #85 ; 0x55 1000191c: 4620 mov r0, r4 1000191e: f7fe fdb3 bl 10000488 // store data in buffer (void)memcpy(Can3Data, data, dlc); 10001922: 462a mov r2, r5 10001924: 4631 mov r1, r6 10001926: 4620 mov r0, r4 10001928: f7fe fdc5 bl 100004b6 // send data over CAN2 (void)Can_SendMsg(CAN_TX_CAN3_MSG, Can3Data); 1000192c: 4621 mov r1, r4 1000192e: 2005 movs r0, #5 10001930: f7ff f946 bl 10000bc0 } } 10001934: bd70 pop {r4, r5, r6, pc} 10001936 : /// \param - /// /// \return - //----------------------------------------------------------------------------- void Can_RxCan2GetData(uint8* data, uint8 dlc) { 10001936: b510 push {r4, lr} // store buffer data in message structure for (uint8 i = 0U; (i < dlc) && (i < 8U); i++) 10001938: 4c15 ldr r4, [pc, #84] ; (10001990 <__ghs_eofn_Can_RxCan2GetData+0x3c>) 1000193a: 2200 movs r2, #0 1000193c: 428a cmp r2, r1 1000193e: d208 bcs.n 10001952 <..lin.bedcd82a..f962bdbe.0_86> 10001940: e005 b.n 1000194e <..lin.bedcd82a..f962bdbe.0_85+0xc> 10001942 <..lin.bedcd82a..f962bdbe.0_85>: { data[i] = Can2Data[i]; 10001942: 5ca3 ldrb r3, [r4, r2] 10001944: 5483 strb r3, [r0, r2] for (uint8 i = 0U; (i < dlc) && (i < 8U); i++) 10001946: 3201 adds r2, #1 10001948: b2d2 uxtb r2, r2 1000194a: 428a cmp r2, r1 1000194c: d201 bcs.n 10001952 <..lin.bedcd82a..f962bdbe.0_86> 1000194e: 2a08 cmp r2, #8 10001950: d3f7 bcc.n 10001942 <..lin.bedcd82a..f962bdbe.0_85> 10001952 <..lin.bedcd82a..f962bdbe.0_86>: } } 10001952: bd10 pop {r4, pc} 10001954 <__ghs_eofn_Can_RxCan2GetData>: 10001954: 4ef0 ldr r6, [pc, #960] ; (10001d18 <..lin.bedd02fd..ff18d89.0_10+0x22>) 10001956: 1000 asrs r0, r0, #32 10001958: 0a1c lsrs r4, r3, #8 1000195a: 0800 lsrs r0, r0, #32 1000195c: 4e3c ldr r6, [pc, #240] ; (10001a50 ) 1000195e: 1000 asrs r0, r0, #32 10001960: 00a4 lsls r4, r4, #2 10001962: 4052 eors r2, r2 10001964: 0000 movs r0, r0 10001966: 4052 eors r2, r2 10001968: 00b4 lsls r4, r6, #2 1000196a: 4052 eors r2, r2 1000196c: 0a20 lsrs r0, r4, #8 1000196e: 0800 lsrs r0, r0, #32 10001970: 4e90 ldr r6, [pc, #576] ; (10001bb4 <..lin.bedd02fd..6812635d.0_6+0x4e>) 10001972: 1000 asrs r0, r0, #32 10001974: 16d4 asrs r4, r2, #27 10001976: 0800 lsrs r0, r0, #32 10001978: 4e10 ldr r6, [pc, #64] ; (100019bc <..lin.bedcd82a..7494d54f.0_89>) 1000197a: 1000 asrs r0, r0, #32 1000197c: 0018 movs r0, r3 1000197e: 4052 eors r2, r2 10001980: 0a28 lsrs r0, r5, #8 10001982: 0800 lsrs r0, r0, #32 10001984: a120 add r1, pc, #128 ; (adr r1, 10001a08 ) 10001986: 0007 movs r7, r0 10001988: 0a24 lsrs r4, r4, #8 1000198a: 0800 lsrs r0, r0, #32 1000198c: 0a2a lsrs r2, r5, #8 1000198e: 0800 lsrs r0, r0, #32 10001990: 0a0c lsrs r4, r1, #8 10001992: 0800 lsrs r0, r0, #32 10001994: 0a14 lsrs r4, r2, #8 10001996: 0800 lsrs r0, r0, #32 10001998 : /// \param - /// /// \return - //----------------------------------------------------------------------------- void Can_RxCan3GetData(uint8* data, uint8 dlc) { 10001998: b510 push {r4, lr} // store buffer data in message structure for (uint8 i = 0U; (i < dlc) && (i < 8U); i++) 1000199a: 4c11 ldr r4, [pc, #68] ; (100019e0 <__ghs_eofn_Can_ResetSubCanData>) 1000199c: 2200 movs r2, #0 1000199e: 428a cmp r2, r1 100019a0: d208 bcs.n 100019b4 <..lin.bedcd82a..e5a4929f.0_88> 100019a2: e005 b.n 100019b0 <..lin.bedcd82a..e5a4929f.0_87+0xc> 100019a4 <..lin.bedcd82a..e5a4929f.0_87>: { data[i] = Can3Data[i]; 100019a4: 5ca3 ldrb r3, [r4, r2] 100019a6: 5483 strb r3, [r0, r2] for (uint8 i = 0U; (i < dlc) && (i < 8U); i++) 100019a8: 3201 adds r2, #1 100019aa: b2d2 uxtb r2, r2 100019ac: 428a cmp r2, r1 100019ae: d201 bcs.n 100019b4 <..lin.bedcd82a..e5a4929f.0_88> 100019b0: 2a08 cmp r2, #8 100019b2: d3f7 bcc.n 100019a4 <..lin.bedcd82a..e5a4929f.0_87> 100019b4 <..lin.bedcd82a..e5a4929f.0_88>: } } 100019b4: bd10 pop {r4, pc} 100019b6 : void Can_ResetSubCanData(uint8_t uChannel) { 100019b6: 490b ldr r1, [pc, #44] ; (100019e4 <__ghs_eofn_Can_ResetSubCanData+0x4>) // PRQA S 4558 1 if (!uChannel) 100019b8: 2800 cmp r0, #0 100019ba: d106 bne.n 100019ca <..lin.bedcd82a..7494d54f.0_90> 100019bc <..lin.bedcd82a..7494d54f.0_89>: { for (uint8 i = 0U; i < 8U; i++) 100019bc: 2255 movs r2, #85 ; 0x55 { Can2Data[i] = 0x55U; 100019be: 540a strb r2, [r1, r0] for (uint8 i = 0U; i < 8U; i++) 100019c0: 3001 adds r0, #1 100019c2: b2c0 uxtb r0, r0 100019c4: 2808 cmp r0, #8 100019c6: d3fa bcc.n 100019be <..lin.bedcd82a..7494d54f.0_89+0x2> 100019c8: e009 b.n 100019de <..lin.bedcd82a..7494d54f.0_90+0x14> 100019ca <..lin.bedcd82a..7494d54f.0_90>: } } else { for (uint8 i = 0U; i < 8U; i++) 100019ca: 4608 mov r0, r1 100019cc: 2155 movs r1, #85 ; 0x55 100019ce: 7201 strb r1, [r0, #8] 100019d0: 7241 strb r1, [r0, #9] 100019d2: 7281 strb r1, [r0, #10] 100019d4: 72c1 strb r1, [r0, #11] 100019d6: 7301 strb r1, [r0, #12] 100019d8: 7341 strb r1, [r0, #13] 100019da: 7381 strb r1, [r0, #14] 100019dc: 73c1 strb r1, [r0, #15] { Can3Data[i] = 0x55U; } } } 100019de: 4770 bx lr 100019e0 <__ghs_eofn_Can_ResetSubCanData>: 100019e0: 0a14 lsrs r4, r2, #8 100019e2: 0800 lsrs r0, r0, #32 100019e4: 0a0c lsrs r4, r1, #8 100019e6: 0800 lsrs r0, r0, #32 100019e8 : // // \return - //----------------------------------------------------------------------------- void Gpt_Init(volatile stc_TCPWM_GRP_CNT_t * ptscTCPWM) { ptscTCPWM->unCTRL.stcField.u1ENABLED = 0U; //Disable Timer 100019e8: 6801 ldr r1, [r0, #0] 100019ea: 2201 movs r2, #1 100019ec: 07d2 lsls r2, r2, #31 100019ee: 4391 bics r1, r2 100019f0: 6001 str r1, [r0, #0] ptscTCPWM->unCTRL.stcField.u1ONE_SHOT = 0U; // Counter runs forever 100019f2: 6801 ldr r1, [r0, #0] 100019f4: 2201 movs r2, #1 100019f6: 0492 lsls r2, r2, #18 100019f8: 4391 bics r1, r2 100019fa: 6001 str r1, [r0, #0] ptscTCPWM->unCTRL.stcField.u2UP_DOWN_MODE = 1U; // Count direction - DOWN 100019fc: 6801 ldr r1, [r0, #0] 100019fe: 2203 movs r2, #3 10001a00: 0412 lsls r2, r2, #16 10001a02: 4391 bics r1, r2 10001a04: 2201 movs r2, #1 10001a06: 0412 lsls r2, r2, #16 10001a08: 4311 orrs r1, r2 10001a0a: 6001 str r1, [r0, #0] ptscTCPWM->unCTRL.stcField.u3MODE = 0U; // Timer mode 10001a0c: 6801 ldr r1, [r0, #0] 10001a0e: 2207 movs r2, #7 10001a10: 0612 lsls r2, r2, #24 10001a12: 4391 bics r1, r2 10001a14: 6001 str r1, [r0, #0] ptscTCPWM->unCTRL.stcField.u1DBG_FREEZE_EN = 0U; // The counter operation continues in debug mode 10001a16: 6801 ldr r1, [r0, #0] 10001a18: 2201 movs r2, #1 10001a1a: 0792 lsls r2, r2, #30 10001a1c: 4391 bics r1, r2 10001a1e: 6001 str r1, [r0, #0] ptscTCPWM->unCTRL.stcField.u1AUTO_RELOAD_CC0 = 0U; // Switching off the CC0 and buffered CC0 values is disabled 10001a20: 6801 ldr r1, [r0, #0] 10001a22: 2301 movs r3, #1 10001a24: 4399 bics r1, r3 10001a26: 6001 str r1, [r0, #0] ptscTCPWM->unCTRL.stcField.u1AUTO_RELOAD_PERIOD = 0U; // Switching off the PERIOD and buffered PERIOD values is disabled 10001a28: 6801 ldr r1, [r0, #0] 10001a2a: 2304 movs r3, #4 10001a2c: 4399 bics r1, r3 10001a2e: 6001 str r1, [r0, #0] ptscTCPWM->unCTRL.stcField.u1AUTO_RELOAD_LINE_SEL = 0U; // Switching off the LINE_SEL and buffered LINE_BUFF_SEL values is disabled 10001a30: 6801 ldr r1, [r0, #0] 10001a32: 2208 movs r2, #8 10001a34: 4391 bics r1, r2 10001a36: 6001 str r1, [r0, #0] ptscTCPWM->unDT.stcField.u8DT_LINE_OUT_L = 0U; // Selected clock prescaler 10001a38: 6b01 ldr r1, [r0, #48] ; 0x30 10001a3a: 22ff movs r2, #255 ; 0xff 10001a3c: 4391 bics r1, r2 10001a3e: 6301 str r1, [r0, #48] ; 0x30 ptscTCPWM->unCOUNTER.u32Register = 0xFFFFFFFFU; // Initial counter value 10001a40: 2100 movs r1, #0 10001a42: 43c9 mvns r1, r1 10001a44: 6081 str r1, [r0, #8] ptscTCPWM->unCC0.u32Register = 0xFFFFFFFFU; // Compare value 10001a46: 6101 str r1, [r0, #16] ptscTCPWM->unPERIOD.u32Register = 0xFFFFFFFFU; // Period of the Timer 10001a48: 6201 str r1, [r0, #32] ptscTCPWM->unTR_IN_SEL0.stcField.u8CAPTURE0_SEL = 0U; // Input trigger 0 10001a4a: 6c41 ldr r1, [r0, #68] ; 0x44 10001a4c: 4391 bics r1, r2 10001a4e: 6441 str r1, [r0, #68] ; 0x44 ptscTCPWM->unTR_IN_SEL0.stcField.u8RELOAD_SEL = 0U; // Input trigger 0 as reload trigger 10001a50: 6c41 ldr r1, [r0, #68] ; 0x44 10001a52: 0412 lsls r2, r2, #16 10001a54: 4391 bics r1, r2 10001a56: 6441 str r1, [r0, #68] ; 0x44 ptscTCPWM->unTR_IN_SEL0.stcField.u8STOP_SEL = 0U; // Input trigger 0 as stop trigger 10001a58: 6c41 ldr r1, [r0, #68] ; 0x44 10001a5a: 22ff movs r2, #255 ; 0xff 10001a5c: 0612 lsls r2, r2, #24 10001a5e: 4391 bics r1, r2 10001a60: 6441 str r1, [r0, #68] ; 0x44 ptscTCPWM->unTR_IN_SEL0.stcField.u8COUNT_SEL = 1U; // Input trigger 1 as count trigger 10001a62: 6c41 ldr r1, [r0, #68] ; 0x44 10001a64: 22ff movs r2, #255 ; 0xff 10001a66: 0212 lsls r2, r2, #8 10001a68: 4391 bics r1, r2 10001a6a: 2201 movs r2, #1 10001a6c: 32ff adds r2, #255 ; 0xff 10001a6e: 4311 orrs r1, r2 10001a70: 6441 str r1, [r0, #68] ; 0x44 ptscTCPWM->unTR_IN_SEL1.stcField.u8START_SEL = 0U; // Input trigger 0 as start trigger 10001a72: 6c81 ldr r1, [r0, #72] ; 0x48 10001a74: 22ff movs r2, #255 ; 0xff 10001a76: 4391 bics r1, r2 10001a78: 6481 str r1, [r0, #72] ; 0x48 ptscTCPWM->unTR_IN_EDGE_SEL.stcField.u2CAPTURE0_EDGE = 3U; // No edge detection, use trigger as it is. 10001a7a: 6cc1 ldr r1, [r0, #76] ; 0x4c 10001a7c: 2303 movs r3, #3 10001a7e: 4319 orrs r1, r3 10001a80: 64c1 str r1, [r0, #76] ; 0x4c ptscTCPWM->unTR_IN_EDGE_SEL.stcField.u2RELOAD_EDGE = 3U; // No edge detection, use trigger as it is. 10001a82: 6cc1 ldr r1, [r0, #76] ; 0x4c 10001a84: 2230 movs r2, #48 ; 0x30 10001a86: 4311 orrs r1, r2 10001a88: 64c1 str r1, [r0, #76] ; 0x4c ptscTCPWM->unTR_IN_EDGE_SEL.stcField.u2START_EDGE = 3U; // No edge detection, use trigger as it is. 10001a8a: 6cc1 ldr r1, [r0, #76] ; 0x4c 10001a8c: 021a lsls r2, r3, #8 10001a8e: 4311 orrs r1, r2 10001a90: 64c1 str r1, [r0, #76] ; 0x4c ptscTCPWM->unTR_IN_EDGE_SEL.stcField.u2STOP_EDGE = 3U; // No edge detection, use trigger as it is. 10001a92: 6cc1 ldr r1, [r0, #76] ; 0x4c 10001a94: 22c0 movs r2, #192 ; 0xc0 10001a96: 4311 orrs r1, r2 10001a98: 64c1 str r1, [r0, #76] ; 0x4c ptscTCPWM->unTR_IN_EDGE_SEL.stcField.u2COUNT_EDGE = 3U; // No edge detection, use trigger as it is. 10001a9a: 6cc1 ldr r1, [r0, #76] ; 0x4c 10001a9c: 220c movs r2, #12 10001a9e: 4311 orrs r1, r2 10001aa0: 64c1 str r1, [r0, #76] ; 0x4c ptscTCPWM->unINTR_MASK.u32Register = 0U; // No interrupts 10001aa2: 2100 movs r1, #0 10001aa4: 6781 str r1, [r0, #120] ; 0x78 ptscTCPWM->unCTRL.stcField.u1ENABLED = 1U; //Enable timer 10001aa6: 6801 ldr r1, [r0, #0] 10001aa8: 2201 movs r2, #1 10001aaa: 07d2 lsls r2, r2, #31 10001aac: 4311 orrs r1, r2 10001aae: 6001 str r1, [r0, #0] ptscTCPWM->unTR_CMD.stcField.u1START = 1U; //Trigger timer 10001ab0: 6c01 ldr r1, [r0, #64] ; 0x40 10001ab2: 2210 movs r2, #16 10001ab4: 4311 orrs r1, r2 10001ab6: 6401 str r1, [r0, #64] ; 0x40 } 10001ab8: 4770 bx lr 10001aba : // PRQA S 3112 1 // ChannelId not used at the moment (void) ChannelId; Gpt_ulSystemTick = (uint32) ((uint32) 0xFFFFFFFFUL - TCPWM0_GRP2_CNT0->unCOUNTER.u32Register); return (Gpt_ValueType) Gpt_ulSystemTick; 10001aba: 4902 ldr r1, [pc, #8] ; (10001ac4 <__ghs_eofn_Gpt_GetTimeElapsed+0x2>) 10001abc: 6808 ldr r0, [r1, #0] 10001abe: 43c0 mvns r0, r0 10001ac0: 4770 bx lr 10001ac2 <__ghs_eofn_Gpt_GetTimeElapsed>: 10001ac2: bf00 nop 10001ac4: 0008 movs r0, r1 10001ac6: 4039 ands r1, r7 10001ac8 <__Mcu_PeriphAssignDivider_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjMcu_inf>: //----------------------------------------------------------------------------- static void Mcu_PeriphAssignDivider(en_clk_dst_t ipBlock, Mcu_ClockDividerType dividerType, uint32 dividerNum) { un_PERI_CLOCK_CTL_t tempCLOCK_CTL_RegValue; // PRQA S 303 1 // correct usage (comes from the definition of PERI) tempCLOCK_CTL_RegValue.u32Register = PERI->unCLOCK_CTL[ipBlock].u32Register; 10001ac8: 4b8b ldr r3, [pc, #556] ; (10001cf8 <..lin.bedd02fd..ff18d89.0_10+0x2>) 10001aca: 0080 lsls r0, r0, #2 10001acc: 18c3 adds r3, r0, r3 10001ace: 6818 ldr r0, [r3, #0] tempCLOCK_CTL_RegValue.stcField.u2TYPE_SEL = (uint32)dividerType; 10001ad0: 0209 lsls r1, r1, #8 10001ad2: 0612 lsls r2, r2, #24 10001ad4: 0e12 lsrs r2, r2, #24 10001ad6: 430a orrs r2, r1 10001ad8: 0a80 lsrs r0, r0, #10 10001ada: 0280 lsls r0, r0, #10 10001adc: 0591 lsls r1, r2, #22 10001ade: 0d89 lsrs r1, r1, #22 10001ae0: 4308 orrs r0, r1 tempCLOCK_CTL_RegValue.stcField.u8DIV_SEL = (uint32_t)dividerNum; // PRQA S 303 1 // correct usage (comes from the definition of PERI) PERI->unCLOCK_CTL[ipBlock].u32Register = tempCLOCK_CTL_RegValue.u32Register; 10001ae2: 6018 str r0, [r3, #0] } 10001ae4: 4770 bx lr 10001ae6 <__Mcu_PeriphSetDivider_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjMcu_inf>: /// /// \return - //----------------------------------------------------------------------------- static void Mcu_PeriphSetDivider(Mcu_ClockDividerType dividerType, uint32 dividerNum, uint32 dividerValue) { if (dividerType == CLK_DIV_8_BIT) 10001ae6: 2800 cmp r0, #0 10001ae8: d10d bne.n 10001b06 <..lin.bedd02fd..911e8647.0_3> 10001aea <..lin.bedd02fd..911e8647.0_1>: { if (dividerValue <= (PERI_DIV_8_CTL_INT8_DIV_Msk >> PERI_DIV_8_CTL_INT8_DIV_Pos)) 10001aea: 2aff cmp r2, #255 ; 0xff 10001aec: d81a bhi.n 10001b24 <..lin.bedd02fd..911e8647.0_5+0x14> 10001aee <..lin.bedd02fd..911e8647.0_2>: { // PRQA S 303 1 // correct usage (comes from the definition of PERI) PERI->unDIV_8_CTL[dividerNum].stcField.u8INT8_DIV = dividerValue; 10001aee: 0088 lsls r0, r1, #2 10001af0: 4982 ldr r1, [pc, #520] ; (10001cfc <..lin.bedd02fd..ff18d89.0_10+0x6>) 10001af2: 1843 adds r3, r0, r1 10001af4: 6819 ldr r1, [r3, #0] 10001af6: 20ff movs r0, #255 ; 0xff 10001af8: 0200 lsls r0, r0, #8 10001afa: 4381 bics r1, r0 10001afc: 0610 lsls r0, r2, #24 10001afe: 0c00 lsrs r0, r0, #16 10001b00: 4301 orrs r1, r0 10001b02: 6019 str r1, [r3, #0] 10001b04: e00e b.n 10001b24 <..lin.bedd02fd..911e8647.0_5+0x14> 10001b06 <..lin.bedd02fd..911e8647.0_3>: // divider value not alright // do nothing } } else if (dividerType == CLK_DIV_16_BIT) 10001b06: 2801 cmp r0, #1 10001b08: d10c bne.n 10001b24 <..lin.bedd02fd..911e8647.0_5+0x14> 10001b0a <..lin.bedd02fd..911e8647.0_4>: { if (dividerValue <= (PERI_DIV_16_CTL_INT16_DIV_Msk >> PERI_DIV_16_CTL_INT16_DIV_Pos)) 10001b0a: 487d ldr r0, [pc, #500] ; (10001d00 <..lin.bedd02fd..ff18d89.0_10+0xa>) 10001b0c: 4282 cmp r2, r0 10001b0e: d809 bhi.n 10001b24 <..lin.bedd02fd..911e8647.0_5+0x14> 10001b10 <..lin.bedd02fd..911e8647.0_5>: { // PRQA S 303 1 // correct usage (comes from the definition of PERI) PERI->unDIV_16_CTL[dividerNum].stcField.u16INT16_DIV = dividerValue; 10001b10: 0088 lsls r0, r1, #2 10001b12: 497c ldr r1, [pc, #496] ; (10001d04 <..lin.bedd02fd..ff18d89.0_10+0xe>) 10001b14: 1843 adds r3, r0, r1 10001b16: 487c ldr r0, [pc, #496] ; (10001d08 <..lin.bedd02fd..ff18d89.0_10+0x12>) 10001b18: 6819 ldr r1, [r3, #0] 10001b1a: 4381 bics r1, r0 10001b1c: 0410 lsls r0, r2, #16 10001b1e: 0a00 lsrs r0, r0, #8 10001b20: 4301 orrs r1, r0 10001b22: 6019 str r1, [r3, #0] else { // divider type not alright // do nothing } } 10001b24: 4770 bx lr 10001b26 <__Mcu_PeriphEnableDivider_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjMcu_inf>: /// \param dividerNum - the divider id /// /// \return void //----------------------------------------------------------------------------- static void Mcu_PeriphEnableDivider(Mcu_ClockDividerType dividerType, uint32 dividerNum) { 10001b26: b510 push {r4, lr} // Specify the divider, make the reference = clk_peri, and enable the divider un_PERI_DIV_CMD_t tempDIV_CMD_RegValue; // PRQA S 303 1 // correct usage (comes from the definition of PERI) tempDIV_CMD_RegValue.u32Register = PERI->unDIV_CMD.u32Register; 10001b28: 4c78 ldr r4, [pc, #480] ; (10001d0c <..lin.bedd02fd..ff18d89.0_10+0x16>) 10001b2a: 2301 movs r3, #1 tempDIV_CMD_RegValue.stcField.u1ENABLE = 1U; 10001b2c: 07db lsls r3, r3, #31 10001b2e: 6822 ldr r2, [r4, #0] 10001b30: 431a orrs r2, r3 tempDIV_CMD_RegValue.stcField.u2PA_TYPE_SEL = 3U; 10001b32: 4b77 ldr r3, [pc, #476] ; (10001d10 <..lin.bedd02fd..ff18d89.0_10+0x1a>) 10001b34: 431a orrs r2, r3 tempDIV_CMD_RegValue.stcField.u8PA_DIV_SEL = 0xFFU; tempDIV_CMD_RegValue.stcField.u2TYPE_SEL = (uint32)dividerType; 10001b36: 0200 lsls r0, r0, #8 10001b38: 0609 lsls r1, r1, #24 10001b3a: 0e09 lsrs r1, r1, #24 10001b3c: 4301 orrs r1, r0 10001b3e: 0a92 lsrs r2, r2, #10 10001b40: 0292 lsls r2, r2, #10 10001b42: 0588 lsls r0, r1, #22 10001b44: 0d80 lsrs r0, r0, #22 10001b46: 4302 orrs r2, r0 tempDIV_CMD_RegValue.stcField.u8DIV_SEL = dividerNum; // PRQA S 303 1 // correct usage (comes from the definition of PERI) PERI->unDIV_CMD.u32Register = tempDIV_CMD_RegValue.u32Register; 10001b48: 6022 str r2, [r4, #0] // PRQA S 303 1 // correct usage (comes from the definition of PERI) (void)PERI->unDIV_CMD; // dummy read to handle buffered writes 10001b4a: 6820 ldr r0, [r4, #0] } 10001b4c: bd10 pop {r4, pc} 10001b4e : { 10001b4e: b5f0 push {r4, r5, r6, r7, lr} 10001b50: b085 sub sp, #20 SCB->VTOR = (uint32_t) ((const void*) &_isr_vector_begin); 10001b52: 4a70 ldr r2, [pc, #448] ; (10001d14 <..lin.bedd02fd..ff18d89.0_10+0x1e>) 10001b54: 4970 ldr r1, [pc, #448] ; (10001d18 <..lin.bedd02fd..ff18d89.0_10+0x22>) 10001b56: 6011 str r1, [r2, #0] while (ConfigPtr->clkConfigs[unIndexCounter].ipBlock != PCLK_UNAVAILABLE) 10001b58: 6802 ldr r2, [r0, #0] 10001b5a: 9204 str r2, [sp, #16] 10001b5c: 7813 ldrb r3, [r2, #0] 10001b5e: 2b7c cmp r3, #124 ; 0x7c 10001b60: d02a beq.n 10001bb8 <..lin.bedd02fd..6812635d.0_7> 10001b62: 2500 movs r5, #0 10001b64: 4e69 ldr r6, [pc, #420] ; (10001d0c <..lin.bedd02fd..ff18d89.0_10+0x16>) 10001b66 <..lin.bedd02fd..6812635d.0_6>: divType = ConfigPtr->clkConfigs[unIndexCounter].divType; 10001b66: 7850 ldrb r0, [r2, #1] 10001b68: b401 push {r0} dividerId = ConfigPtr->clkConfigs[unIndexCounter].dividerId; 10001b6a: 4c63 ldr r4, [pc, #396] ; (10001cf8 <..lin.bedd02fd..ff18d89.0_10+0x2>) dividerValue = ConfigPtr->clkConfigs[unIndexCounter].dividerValue; 10001b6c: 6851 ldr r1, [r2, #4] Mcu_PeriphAssignDivider(ipBlock, divType, dividerId); 10001b6e: 009b lsls r3, r3, #2 10001b70: 191f adds r7, r3, r4 10001b72: 6892 ldr r2, [r2, #8] 10001b74: 683b ldr r3, [r7, #0] 10001b76: 0200 lsls r0, r0, #8 10001b78: 060c lsls r4, r1, #24 10001b7a: 0e24 lsrs r4, r4, #24 10001b7c: 4304 orrs r4, r0 10001b7e: 0a9b lsrs r3, r3, #10 10001b80: 029b lsls r3, r3, #10 10001b82: 05a4 lsls r4, r4, #22 10001b84: 0da4 lsrs r4, r4, #22 10001b86: 4323 orrs r3, r4 10001b88: 9301 str r3, [sp, #4] 10001b8a: 603b str r3, [r7, #0] Mcu_PeriphSetDivider(divType, dividerId, dividerValue); 10001b8c: bc01 pop {r0} 10001b8e: f7ff ffaa bl 10001ae6 <__Mcu_PeriphSetDivider_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjMcu_inf> Mcu_PeriphEnableDivider(divType,dividerId); 10001b92: 6830 ldr r0, [r6, #0] 10001b94: 2101 movs r1, #1 10001b96: 07c9 lsls r1, r1, #31 10001b98: 4308 orrs r0, r1 10001b9a: 495d ldr r1, [pc, #372] ; (10001d10 <..lin.bedd02fd..ff18d89.0_10+0x1a>) 10001b9c: 4308 orrs r0, r1 10001b9e: 0a80 lsrs r0, r0, #10 10001ba0: 0280 lsls r0, r0, #10 10001ba2: 4320 orrs r0, r4 10001ba4: 9001 str r0, [sp, #4] 10001ba6: 6030 str r0, [r6, #0] 10001ba8: 6830 ldr r0, [r6, #0] 10001baa: 9002 str r0, [sp, #8] unIndexCounter++; 10001bac: 350c adds r5, #12 while (ConfigPtr->clkConfigs[unIndexCounter].ipBlock != PCLK_UNAVAILABLE) 10001bae: 9804 ldr r0, [sp, #16] 10001bb0: 182a adds r2, r5, r0 10001bb2: 5c2b ldrb r3, [r5, r0] 10001bb4: 2b7c cmp r3, #124 ; 0x7c 10001bb6: d1d6 bne.n 10001b66 <..lin.bedd02fd..6812635d.0_6> 10001bb8 <..lin.bedd02fd..6812635d.0_7>: } 10001bb8: b005 add sp, #20 10001bba: bdf0 pop {r4, r5, r6, r7, pc} 10001bbc : { 10001bbc: b530 push {r4, r5, lr} CPUSS->unROM_CTL.stcField.u2SLOW_WS = (uint32_t)1u; 10001bbe: 4a57 ldr r2, [pc, #348] ; (10001d1c <..lin.bedd02fd..ff18d89.0_10+0x26>) 10001bc0: 6810 ldr r0, [r2, #0] 10001bc2: 2203 movs r2, #3 10001bc4: 4390 bics r0, r2 10001bc6: 2201 movs r2, #1 10001bc8: 4310 orrs r0, r2 10001bca: 4a54 ldr r2, [pc, #336] ; (10001d1c <..lin.bedd02fd..ff18d89.0_10+0x26>) 10001bcc: 2103 movs r1, #3 CPUSS->unROM_CTL.stcField.u2FAST_WS = (uint32_t)0u; 10001bce: 0209 lsls r1, r1, #8 10001bd0: 6010 str r0, [r2, #0] 10001bd2: 6810 ldr r0, [r2, #0] 10001bd4: 4388 bics r0, r1 10001bd6: 6010 str r0, [r2, #0] CPUSS->unRAM0_CTL0.stcField.u2SLOW_WS = (uint32_t)1u; 10001bd8: 4a51 ldr r2, [pc, #324] ; (10001d20 <..lin.bedd02fd..ff18d89.0_10+0x2a>) 10001bda: 6810 ldr r0, [r2, #0] 10001bdc: 2203 movs r2, #3 10001bde: 4390 bics r0, r2 10001be0: 2201 movs r2, #1 10001be2: 4310 orrs r0, r2 10001be4: 4a4e ldr r2, [pc, #312] ; (10001d20 <..lin.bedd02fd..ff18d89.0_10+0x2a>) 10001be6: 6010 str r0, [r2, #0] CPUSS->unRAM0_CTL0.stcField.u2FAST_WS = (uint32_t)0u; 10001be8: 6810 ldr r0, [r2, #0] 10001bea: 4388 bics r0, r1 10001bec: 6010 str r0, [r2, #0] CPUSS->unRAM1_CTL0.stcField.u2SLOW_WS = (uint32_t)1u; 10001bee: 4a4d ldr r2, [pc, #308] ; (10001d24 <..lin.bedd02fd..ff18d89.0_10+0x2e>) 10001bf0: 6810 ldr r0, [r2, #0] 10001bf2: 2203 movs r2, #3 10001bf4: 4390 bics r0, r2 10001bf6: 2201 movs r2, #1 10001bf8: 4310 orrs r0, r2 10001bfa: 4a4a ldr r2, [pc, #296] ; (10001d24 <..lin.bedd02fd..ff18d89.0_10+0x2e>) 10001bfc: 6010 str r0, [r2, #0] CPUSS->unRAM1_CTL0.stcField.u2FAST_WS = (uint32_t)0u; 10001bfe: 6810 ldr r0, [r2, #0] 10001c00: 4388 bics r0, r1 10001c02: 6010 str r0, [r2, #0] FLASHC->unFLASH_CTL.stcField.u4MAIN_WS = (uint32_t)1u; 10001c04: 4a48 ldr r2, [pc, #288] ; (10001d28 <..lin.bedd02fd..ff18d89.0_10+0x32>) 10001c06: 210f movs r1, #15 10001c08: 6810 ldr r0, [r2, #0] 10001c0a: 4388 bics r0, r1 10001c0c: 2201 movs r2, #1 10001c0e: 4310 orrs r0, r2 10001c10: 4a45 ldr r2, [pc, #276] ; (10001d28 <..lin.bedd02fd..ff18d89.0_10+0x32>) 10001c12: 6010 str r0, [r2, #0] SRSS->unCLK_SELECT.stcField.u3LFCLK_SEL = 1u; //CY_SYSCLK_LFCLK_IN_ILO0; 10001c14: 4a45 ldr r2, [pc, #276] ; (10001d2c <..lin.bedd02fd..ff18d89.0_10+0x36>) 10001c16: 6810 ldr r0, [r2, #0] 10001c18: 2207 movs r2, #7 10001c1a: 4390 bics r0, r2 10001c1c: 2201 movs r2, #1 10001c1e: 4310 orrs r0, r2 10001c20: 4a42 ldr r2, [pc, #264] ; (10001d2c <..lin.bedd02fd..ff18d89.0_10+0x36>) 10001c22: 6010 str r0, [r2, #0] SRSS->unCLK_ECO_CONFIG2.stcField.u3WDTRIM = (uint32_t)4u; 10001c24: 4a42 ldr r2, [pc, #264] ; (10001d30 <..lin.bedd02fd..ff18d89.0_10+0x3a>) 10001c26: 6810 ldr r0, [r2, #0] 10001c28: 2207 movs r2, #7 10001c2a: 4390 bics r0, r2 10001c2c: 2204 movs r2, #4 10001c2e: 4310 orrs r0, r2 10001c30: 4a3f ldr r2, [pc, #252] ; (10001d30 <..lin.bedd02fd..ff18d89.0_10+0x3a>) 10001c32: 21f0 movs r1, #240 ; 0xf0 SRSS->unCLK_ECO_CONFIG2.stcField.u4ATRIM = (uint32_t)12u; 10001c34: 6010 str r0, [r2, #0] 10001c36: 6810 ldr r0, [r2, #0] 10001c38: 4388 bics r0, r1 10001c3a: 21c0 movs r1, #192 ; 0xc0 10001c3c: 4308 orrs r0, r1 10001c3e: 6010 str r0, [r2, #0] SRSS->unCLK_ECO_CONFIG2.stcField.u2FTRIM = (uint32_t)3u; 10001c40: 6810 ldr r0, [r2, #0] 10001c42: 2103 movs r1, #3 10001c44: 0209 lsls r1, r1, #8 10001c46: 4308 orrs r0, r1 10001c48: 6010 str r0, [r2, #0] SRSS->unCLK_ECO_CONFIG2.stcField.u2RTRIM = (uint32_t)3u; 10001c4a: 6810 ldr r0, [r2, #0] 10001c4c: 2103 movs r1, #3 10001c4e: 0289 lsls r1, r1, #10 10001c50: 4308 orrs r0, r1 10001c52: 6010 str r0, [r2, #0] SRSS->unCLK_ECO_CONFIG2.stcField.u3GTRIM = (uint32_t)1u; 10001c54: 6810 ldr r0, [r2, #0] 10001c56: 2107 movs r1, #7 10001c58: 0309 lsls r1, r1, #12 10001c5a: 4388 bics r0, r1 10001c5c: 2101 movs r1, #1 10001c5e: 0309 lsls r1, r1, #12 10001c60: 4308 orrs r0, r1 10001c62: 6010 str r0, [r2, #0] SRSS->unCLK_ECO_CONFIG.stcField.u1ECO_EN = (uint32_t)1UL; 10001c64: 4a33 ldr r2, [pc, #204] ; (10001d34 <..lin.bedd02fd..ff18d89.0_10+0x3e>) 10001c66: 2101 movs r1, #1 10001c68: 07c9 lsls r1, r1, #31 10001c6a: 6810 ldr r0, [r2, #0] 10001c6c: 4308 orrs r0, r1 10001c6e: 6010 str r0, [r2, #0] while (SRSS->unCLK_ECO_STATUS.stcField.u1ECO_OK == (uint32_t)0UL) 10001c70: 4931 ldr r1, [pc, #196] ; (10001d38 <..lin.bedd02fd..ff18d89.0_10+0x42>) 10001c72: 6808 ldr r0, [r1, #0] 10001c74: 07c0 lsls r0, r0, #31 10001c76: d5fc bpl.n 10001c72 10001c78 <..lin.bedd02fd..ff18d89.0_8>: while (SRSS->unCLK_ECO_STATUS.stcField.u1ECO_READY == (uint32_t)0UL) 10001c78: 6808 ldr r0, [r1, #0] 10001c7a: 0780 lsls r0, r0, #30 10001c7c: d5fc bpl.n 10001c78 <..lin.bedd02fd..ff18d89.0_8> 10001c7e <..lin.bedd02fd..ff18d89.0_9>: CPUSS->unCM4_CLOCK_CTL.stcField.u8FAST_INT_DIV = (uint32_t)0u; // no division 10001c7e: 4a2f ldr r2, [pc, #188] ; (10001d3c <..lin.bedd02fd..ff18d89.0_10+0x46>) 10001c80: 21ff movs r1, #255 ; 0xff 10001c82: 0209 lsls r1, r1, #8 10001c84: 6810 ldr r0, [r2, #0] 10001c86: 4388 bics r0, r1 10001c88: 6010 str r0, [r2, #0] CPUSS->unCM0_CLOCK_CTL.stcField.u8PERI_INT_DIV = (uint32_t)1u; // divided by 2 10001c8a: 4a2d ldr r2, [pc, #180] ; (10001d40 <..lin.bedd02fd..ff18d89.0_10+0x4a>) 10001c8c: 21ff movs r1, #255 ; 0xff 10001c8e: 0609 lsls r1, r1, #24 10001c90: 6810 ldr r0, [r2, #0] 10001c92: 4388 bics r0, r1 10001c94: 2101 movs r1, #1 10001c96: 0609 lsls r1, r1, #24 10001c98: 4308 orrs r0, r1 10001c9a: 6010 str r0, [r2, #0] CPUSS->unCM0_CLOCK_CTL.stcField.u8SLOW_INT_DIV = (uint32_t)0u; // no division 10001c9c: 6810 ldr r0, [r2, #0] 10001c9e: 4c29 ldr r4, [pc, #164] ; (10001d44 <..lin.bedd02fd..ff18d89.0_10+0x4e>) 10001ca0: 21ff movs r1, #255 ; 0xff 10001ca2: 4d29 ldr r5, [pc, #164] ; (10001d48 <..lin.bedd02fd..ff18d89.0_10+0x52>) 10001ca4: 0209 lsls r1, r1, #8 SRSS->unCLK_PATH_SELECT[1U/*PLL0*/].stcField.u3PATH_MUX = (uint32_t)2u; 10001ca6: 4388 bics r0, r1 10001ca8: 6010 str r0, [r2, #0] 10001caa: 6828 ldr r0, [r5, #0] 10001cac: 2207 movs r2, #7 10001cae: 4390 bics r0, r2 10001cb0: 2202 movs r2, #2 10001cb2: 4310 orrs r0, r2 SRSS->unCLK_PLL_CONFIG[0U].stcField.u5REFERENCE_DIV = (uint32_t)CY_SYSTEM_PLL_CONFIG_REFDIV; 10001cb4: 6028 str r0, [r5, #0] 10001cb6: 6820 ldr r0, [r4, #0] 10001cb8: 211f movs r1, #31 10001cba: 0209 lsls r1, r1, #8 10001cbc: 4388 bics r0, r1 10001cbe: 2101 movs r1, #1 10001cc0: 0249 lsls r1, r1, #9 10001cc2: 4308 orrs r0, r1 10001cc4: 6020 str r0, [r4, #0] SRSS->unCLK_PLL_CONFIG[0U].stcField.u7FEEDBACK_DIV = (uint32_t)CY_SYSTEM_PLL_CONFIG_FEEDBACKDIV; 10001cc6: 6820 ldr r0, [r4, #0] 10001cc8: 217f movs r1, #127 ; 0x7f 10001cca: 4388 bics r0, r1 10001ccc: 2128 movs r1, #40 ; 0x28 10001cce: 4308 orrs r0, r1 10001cd0: 6020 str r0, [r4, #0] SRSS->unCLK_PLL_CONFIG[0U].stcField.u5OUTPUT_DIV = (uint32_t)CY_SYSTEM_PLL_CONFIG_OUTDIV; 10001cd2: 6820 ldr r0, [r4, #0] 10001cd4: 211f movs r1, #31 10001cd6: 0409 lsls r1, r1, #16 10001cd8: 4388 bics r0, r1 10001cda: 2101 movs r1, #1 10001cdc: 0449 lsls r1, r1, #17 10001cde: 4308 orrs r0, r1 10001ce0: 6020 str r0, [r4, #0] SRSS->unCLK_PLL_CONFIG[0U].stcField.u1ENABLE = (uint32_t)1UL; 10001ce2: 6820 ldr r0, [r4, #0] 10001ce4: 2101 movs r1, #1 10001ce6: 07c9 lsls r1, r1, #31 10001ce8: 4308 orrs r0, r1 10001cea: 6020 str r0, [r4, #0] while (SRSS->unCLK_PLL_STATUS[0U].stcField.u1LOCKED == (uint32_t)0UL) 10001cec: 6c20 ldr r0, [r4, #64] ; 0x40 10001cee: 07c0 lsls r0, r0, #31 10001cf0: d430 bmi.n 10001d54 <..lin.bedd02fd..ff18d89.0_13> 10001cf2: 3440 adds r4, #64 ; 0x40 10001cf4: e02a b.n 10001d4c <..lin.bedd02fd..ff18d89.0_11> 10001cf6 <..lin.bedd02fd..ff18d89.0_10>: 10001cf6: bf00 nop 10001cf8: 0c00 lsrs r0, r0, #16 10001cfa: 4000 ands r0, r0 10001cfc: 1000 asrs r0, r0, #32 10001cfe: 4000 ands r0, r0 10001d00: ffff 0000 vaddl.u q8, d15, d0 10001d04: 1400 asrs r0, r0, #16 10001d06: 4000 ands r0, r0 10001d08: ff00 00ff vqadd.u8 q0, q8, 10001d0c: 0400 lsls r0, r0, #16 10001d0e: 4000 ands r0, r0 10001d10: 0000 movs r0, r0 10001d12: 03ff lsls r7, r7, #15 10001d14: ed08 e000 stc 0, cr14, [r8, #-0] 10001d18: 0000 movs r0, r0 10001d1a: 1000 asrs r0, r0, #32 10001d1c: 13c4 asrs r4, r0, #15 10001d1e: 4020 ands r0, r4 10001d20: 1300 asrs r0, r0, #12 10001d22: 4020 ands r0, r4 10001d24: 1380 asrs r0, r0, #14 10001d26: 4020 ands r0, r4 10001d28: 0000 movs r0, r0 10001d2a: 4024 ands r4, r4 10001d2c: 1500 asrs r0, r0, #20 10001d2e: 4026 ands r6, r4 10001d30: 1544 asrs r4, r0, #21 10001d32: 4026 ands r6, r4 10001d34: 151c asrs r4, r3, #20 10001d36: 4026 ands r6, r4 10001d38: 1524 asrs r4, r4, #20 10001d3a: 4026 ands r6, r4 10001d3c: 0008 movs r0, r1 10001d3e: 4020 ands r0, r4 10001d40: 1008 asrs r0, r1, #32 10001d42: 4020 ands r0, r4 10001d44: 1600 asrs r0, r0, #24 10001d46: 4026 ands r6, r4 10001d48: 1204 asrs r4, r0, #8 10001d4a: 4026 ands r6, r4 10001d4c <..lin.bedd02fd..ff18d89.0_11>: HalCpuNop(); 10001d4c: bf00 nop 10001d4e <..lin.bedd02fd..ff18d89.0_12>: while (SRSS->unCLK_PLL_STATUS[0U].stcField.u1LOCKED == (uint32_t)0UL) 10001d4e: 6820 ldr r0, [r4, #0] 10001d50: 07c0 lsls r0, r0, #31 10001d52: d5fb bpl.n 10001d4c <..lin.bedd02fd..ff18d89.0_11> 10001d54 <..lin.bedd02fd..ff18d89.0_13>: SRSS->unCLK_ROOT_SELECT[0U/*clk_hf0*/].stcField.u4ROOT_MUX = (uint32_t)1u; 10001d54: 6be8 ldr r0, [r5, #60] ; 0x3c 10001d56: 210f movs r1, #15 10001d58: 4388 bics r0, r1 10001d5a: 2201 movs r2, #1 10001d5c: 4310 orrs r0, r2 10001d5e: 63e8 str r0, [r5, #60] ; 0x3c SRSS->unCLK_ROOT_SELECT[0U].stcField.u2ROOT_DIV = (uint32_t)0u; /* no div */ 10001d60: 6be8 ldr r0, [r5, #60] ; 0x3c 10001d62: 2130 movs r1, #48 ; 0x30 10001d64: 4388 bics r0, r1 10001d66: 63e8 str r0, [r5, #60] ; 0x3c SRSS->unCLK_ROOT_SELECT[0U].stcField.u1ENABLE = (uint32_t)1u; /* 1 = enable */ 10001d68: 6be8 ldr r0, [r5, #60] ; 0x3c 10001d6a: 07d1 lsls r1, r2, #31 10001d6c: 4308 orrs r0, r1 10001d6e: 63e8 str r0, [r5, #60] ; 0x3c SRSS->unCLK_PATH_SELECT[2U].stcField.u3PATH_MUX = (uint32_t)0u; 10001d70: 6868 ldr r0, [r5, #4] 10001d72: 2207 movs r2, #7 10001d74: 4390 bics r0, r2 10001d76: 4a1e ldr r2, [pc, #120] ; (10001df0 <..lin.bedd02fd..dd975b2.0_15>) SRSS->unCLK_FLL_CONFIG.stcField.u1FLL_ENABLE = (uint32_t)0U; /* 0 = disable */ 10001d78: 6068 str r0, [r5, #4] 10001d7a: 6810 ldr r0, [r2, #0] 10001d7c: 4388 bics r0, r1 10001d7e: 6010 str r0, [r2, #0] SRSS->unCLK_FLL_CONFIG4.stcField.u1CCO_ENABLE = (uint32_t)0U; /* 0 = disable */ 10001d80: 4a1c ldr r2, [pc, #112] ; (10001df4 <..lin.bedd02fd..dd975b2.0_15+0x4>) 10001d82: 6810 ldr r0, [r2, #0] 10001d84: 4388 bics r0, r1 10001d86: 6010 str r0, [r2, #0] SRSS->unCLK_ILO0_CONFIG.stcField.u1ENABLE = (uint32_t)1U; /* 1 = enable */ 10001d88: 4a1b ldr r2, [pc, #108] ; (10001df8 <..lin.bedd02fd..dd975b2.0_15+0x8>) 10001d8a: 6810 ldr r0, [r2, #0] 10001d8c: 4308 orrs r0, r1 10001d8e: 6010 str r0, [r2, #0] SRSS->unCLK_ILO0_CONFIG.stcField.u1ILO0_BACKUP = (uint32_t)1UL; /* Ilo HibernateOn */ 10001d90: 6810 ldr r0, [r2, #0] 10001d92: 2201 movs r2, #1 10001d94: 4310 orrs r0, r2 10001d96: 4a18 ldr r2, [pc, #96] ; (10001df8 <..lin.bedd02fd..dd975b2.0_15+0x8>) 10001d98: 6010 str r0, [r2, #0] return E_OK; 10001d9a: 2000 movs r0, #0 10001d9c: bd30 pop {r4, r5, pc} 10001d9e : { 10001d9e: b407 push {r0, r1, r2} 10001da0: b510 push {r4, lr} const uint32 RamSectionTop = 10001da2: 9802 ldr r0, [sp, #8] 10001da4: 9903 ldr r1, [sp, #12] 10001da6: 1809 adds r1, r1, r0 for(uint32 ulRamAddr = RamSection.McuRamSectionBaseAddress; ulRamAddr < RamSectionTop; ++ulRamAddr) 10001da8: 1a0c subs r4, r1, r0 10001daa: 4288 cmp r0, r1 10001dac: d300 bcc.n 10001db0 10001dae: 2400 movs r4, #0 10001db0: 08e2 lsrs r2, r4, #3 10001db2: d00c beq.n 10001dce 10001db4: ab04 add r3, sp, #16 10001db6: 7819 ldrb r1, [r3, #0] 10001db8: 7001 strb r1, [r0, #0] 10001dba: 7041 strb r1, [r0, #1] 10001dbc: 7081 strb r1, [r0, #2] 10001dbe: 70c1 strb r1, [r0, #3] 10001dc0: 7101 strb r1, [r0, #4] 10001dc2: 7141 strb r1, [r0, #5] 10001dc4: 7181 strb r1, [r0, #6] 10001dc6: 71c1 strb r1, [r0, #7] 10001dc8: 3008 adds r0, #8 10001dca: 3a01 subs r2, #1 10001dcc: d1f4 bne.n 10001db8 10001dce: 0761 lsls r1, r4, #29 10001dd0: 0f49 lsrs r1, r1, #29 10001dd2: d005 beq.n 10001de0 <..lin.bedd02fd..61e48ab2.0_14> 10001dd4: ab04 add r3, sp, #16 10001dd6: 781a ldrb r2, [r3, #0] 10001dd8: 7002 strb r2, [r0, #0] 10001dda: 3001 adds r0, #1 10001ddc: 3901 subs r1, #1 10001dde: d1fb bne.n 10001dd8 10001de0 <..lin.bedd02fd..61e48ab2.0_14>: return E_OK; 10001de0: 4608 mov r0, r1 10001de2: bc10 pop {r4} 10001de4: bc08 pop {r3} 10001de6: b003 add sp, #12 10001de8: 4718 bx r3 10001dea : return MCU_POWER_ON_RESET; 10001dea: 2001 movs r0, #1 10001dec: 4770 bx lr 10001dee <__HalCpuNop_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjMcu_inf>: 10001dee: e005 b.n 10001dfc <..lin.bedd02fd..dd975b2.0_16> 10001df0 <..lin.bedd02fd..dd975b2.0_15>: 10001df0: 1530 asrs r0, r6, #20 10001df2: 4026 ands r6, r4 10001df4: 153c asrs r4, r7, #20 10001df6: 4026 ands r6, r4 10001df8: 1508 asrs r0, r1, #20 10001dfa: 4026 ands r6, r4 10001dfc <..lin.bedd02fd..dd975b2.0_16>: 10001dfc: bf00 nop 10001dfe <..lin.bedd02fd..dd975b2.0_17>: 10001dfe: 4770 bx lr 10001e00 <__spi_init_scb_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSpi_inf>: // \param *base base address of the SBC // // \return - //----------------------------------------------------------------------------- static void spi_init_scb(volatile stc_SCB_t * base) { 10001e00: b081 sub sp, #4 un_SCB_CTRL_t tscbCtrl = { 0 }; 10001e02: 4bd5 ldr r3, [pc, #852] ; (10002158 <..lin.bedd1e24..d097d702.0_9+0x2>) 10001e04: 2206 movs r2, #6 10001e06: 6819 ldr r1, [r3, #0] tscbCtrl.stcField.u4OVS = 9U; /* SPI clk = SCB clock / 10 */ 10001e08: 9100 str r1, [sp, #0] 10001e0a: 4391 bics r1, r2 10001e0c: 2209 movs r2, #9 10001e0e: 4311 orrs r1, r2 tscbCtrl.stcField.u2MEM_WIDTH = 1U; /* halfword - 16 bit FIFO data elements */ 10001e10: 2203 movs r2, #3 10001e12: 0392 lsls r2, r2, #14 10001e14: 4391 bics r1, r2 10001e16: 2201 movs r2, #1 10001e18: 0392 lsls r2, r2, #14 10001e1a: 4311 orrs r1, r2 tscbCtrl.stcField.u2MODE = 1U; /* Set SCB in SPI mode*/ 10001e1c: 2203 movs r2, #3 10001e1e: 0612 lsls r2, r2, #24 10001e20: 4391 bics r1, r2 10001e22: 2201 movs r2, #1 10001e24: 0612 lsls r2, r2, #24 10001e26: 4311 orrs r1, r2 tscbCtrl.stcField.u1EC_AM_MODE = FALSE; 10001e28: 2203 movs r2, #3 10001e2a: 0212 lsls r2, r2, #8 10001e2c: 4391 bics r1, r2 tscbCtrl.stcField.u1EC_OP_MODE = FALSE; base->unCTRL.u32Register = tscbCtrl.u32Register; 10001e2e: 6001 str r1, [r0, #0] } 10001e30: b001 add sp, #4 10001e32: 4770 bx lr 10001e34 <__spi_init_registers_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSpi_inf>: { 10001e34: b510 push {r4, lr} 10001e36: b083 sub sp, #12 un_SCB_SPI_CTRL_t tscbSpiCtrl = { 0 }; 10001e38: 4ac8 ldr r2, [pc, #800] ; (1000215c <..lin.bedd1e24..d097d702.0_9+0x6>) 10001e3a: 6811 ldr r1, [r2, #0] 10001e3c: 4ac8 ldr r2, [pc, #800] ; (10002160 <..lin.bedd1e24..d097d702.0_9+0xa>) un_SCB_TX_CTRL_t tscbTxCtrl = { 0 }; 10001e3e: 9100 str r1, [sp, #0] 10001e40: 6813 ldr r3, [r2, #0] 10001e42: 4ac8 ldr r2, [pc, #800] ; (10002164 <..lin.bedd1e24..d097d702.0_9+0xe>) un_SCB_RX_CTRL_t tscbRxCtrl = { 0 }; 10001e44: 9301 str r3, [sp, #4] 10001e46: 6814 ldr r4, [r2, #0] 10001e48: 223f movs r2, #63 ; 0x3f tscbSpiCtrl.stcField.u1SSEL_CONTINUOUS = (SCB_SPI_cfg.enableTransferSeperation == TRUE) ? 0U:1U; 10001e4a: 4391 bics r1, r2 10001e4c: 2211 movs r2, #17 tscbSpiCtrl.stcField.u1SSEL_CONTINUOUS = (SCB_SPI_cfg.enableTransferSeperation == FALSE) ? 0U:1U; 10001e4e: 4311 orrs r1, r2 10001e50: 220f movs r2, #15 tscbSpiCtrl.stcField.u2SSEL = 0x00U; 10001e52: 9402 str r4, [sp, #8] 10001e54: 0612 lsls r2, r2, #24 10001e56: 4391 bics r1, r2 tscbSpiCtrl.stcField.u1SSEL_POLARITY0 = SCB_SPI_cfg.ssPolarity0; 10001e58: 220f movs r2, #15 10001e5a: 0212 lsls r2, r2, #8 10001e5c: 4391 bics r1, r2 tscbSpiCtrl.stcField.u1LOOPBACK = 0x00U; 10001e5e: 2201 movs r2, #1 10001e60: 0412 lsls r2, r2, #16 10001e62: 4391 bics r1, r2 tscbSpiCtrl.stcField.u1MASTER_MODE = SCB_SPI_cfg.spiMode; 10001e64: 2201 movs r2, #1 10001e66: 07d2 lsls r2, r2, #31 10001e68: 4311 orrs r1, r2 base->unSPI_CTRL.u32Register = tscbSpiCtrl.u32Register; 10001e6a: 2203 movs r2, #3 tscbRxCtrl.stcField.u1MSB_FIRST = !(SCB_SPI_cfg.enableMsbFirst); 10001e6c: 0212 lsls r2, r2, #8 10001e6e: 4394 bics r4, r2 10001e70: 2201 movs r2, #1 10001e72: 32ff adds r2, #255 ; 0xff 10001e74: 4314 orrs r4, r2 10001e76: 461a mov r2, r3 tscbTxCtrl.stcField.u1MSB_FIRST = !(SCB_SPI_cfg.enableMsbFirst); 10001e78: 2301 movs r3, #1 10001e7a: 33ff adds r3, #255 ; 0xff 10001e7c: 431a orrs r2, r3 10001e7e: 231f movs r3, #31 tscbRxCtrl.stcField.u5DATA_WIDTH = (SCB_SPI_cfg.rxDataWidth - 1UL); 10001e80: 439c bics r4, r3 10001e82: 230f movs r3, #15 10001e84: 431c orrs r4, r3 10001e86: 2303 movs r3, #3 base->unRX_CTRL.u32Register = tscbRxCtrl.u32Register; 10001e88: 021b lsls r3, r3, #8 10001e8a: 6201 str r1, [r0, #32] 10001e8c: 50c4 str r4, [r0, r3] base->unRX_FIFO_CTRL.stcField.u8TRIGGER_LEVEL = SCB_SPI_cfg.rxFifoTriggerLevel; 10001e8e: 24c1 movs r4, #193 ; 0xc1 10001e90: 00a4 lsls r4, r4, #2 10001e92: 5901 ldr r1, [r0, r4] 10001e94: 23ff movs r3, #255 ; 0xff 10001e96: 4399 bics r1, r3 10001e98: 5101 str r1, [r0, r4] tscbTxCtrl.stcField.u5DATA_WIDTH = (SCB_SPI_cfg.txDataWidth - 1UL); 10001e9a: 211f movs r1, #31 10001e9c: 438a bics r2, r1 10001e9e: 210f movs r1, #15 10001ea0: 430a orrs r2, r1 base->unTX_CTRL.u32Register = tscbTxCtrl.u32Register; 10001ea2: 2401 movs r4, #1 10001ea4: 0264 lsls r4, r4, #9 10001ea6: 5102 str r2, [r0, r4] base->unTX_FIFO_CTRL.stcField.u8TRIGGER_LEVEL = SCB_SPI_cfg.txFifoTriggerLevel; 10001ea8: 2481 movs r4, #129 ; 0x81 10001eaa: 00a4 lsls r4, r4, #2 10001eac: 5901 ldr r1, [r0, r4] 10001eae: 4399 bics r1, r3 10001eb0: 5101 str r1, [r0, r4] } 10001eb2: b003 add sp, #12 10001eb4: bd10 pop {r4, pc} 10001eb6 <__spi_enable_scb_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSpi_inf>: // \return - //----------------------------------------------------------------------------- static void spi_enable_scb(volatile stc_SCB_t * base, boolean state) { //check received state and enable or disable the SCB. if (state == TRUE) 10001eb6: 6802 ldr r2, [r0, #0] 10001eb8: 2901 cmp r1, #1 10001eba: d102 bne.n 10001ec2 <..lin.bedd1e24..6f5fe678.0_2> 10001ebc <..lin.bedd1e24..6f5fe678.0_1>: { base->unCTRL.u32Register |= 0x80000000U; 10001ebc: 07c9 lsls r1, r1, #31 10001ebe: 430a orrs r2, r1 10001ec0: e001 b.n 10001ec6 <..lin.bedd1e24..6f5fe678.0_2+0x4> 10001ec2 <..lin.bedd1e24..6f5fe678.0_2>: } else { base->unCTRL.u32Register &= 0x7FFFFFFFU; 10001ec2: 0052 lsls r2, r2, #1 10001ec4: 0852 lsrs r2, r2, #1 10001ec6: 6002 str r2, [r0, #0] } } 10001ec8: 4770 bx lr 10001eca : { 10001eca: b530 push {r4, r5, lr} 10001ecc: b081 sub sp, #4 for (idx = 0U; idx < (uint8)SCB_BASES_USED; idx++) 10001ece: 4aa2 ldr r2, [pc, #648] ; (10002158 <..lin.bedd1e24..d097d702.0_9+0x2>) 10001ed0: 4da5 ldr r5, [pc, #660] ; (10002168 <..lin.bedd1e24..d097d702.0_9+0x12>) 10001ed2: 2106 movs r1, #6 10001ed4: 6810 ldr r0, [r2, #0] 10001ed6: 682c ldr r4, [r5, #0] 10001ed8: 4388 bics r0, r1 10001eda: 2109 movs r1, #9 10001edc: 4308 orrs r0, r1 10001ede: 2103 movs r1, #3 10001ee0: 0389 lsls r1, r1, #14 10001ee2: 4388 bics r0, r1 10001ee4: 2101 movs r1, #1 10001ee6: 0389 lsls r1, r1, #14 10001ee8: 4308 orrs r0, r1 10001eea: 2103 movs r1, #3 10001eec: 0609 lsls r1, r1, #24 10001eee: 4388 bics r0, r1 10001ef0: 2101 movs r1, #1 10001ef2: 0609 lsls r1, r1, #24 10001ef4: 4308 orrs r0, r1 10001ef6: 2103 movs r1, #3 10001ef8: 0209 lsls r1, r1, #8 10001efa: 4388 bics r0, r1 10001efc: 9000 str r0, [sp, #0] 10001efe: 6020 str r0, [r4, #0] 10001f00: 4620 mov r0, r4 10001f02: f7ff ff97 bl 10001e34 <__spi_init_registers_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSpi_inf> 10001f06: 6820 ldr r0, [r4, #0] 10001f08: 2101 movs r1, #1 10001f0a: 07c9 lsls r1, r1, #31 10001f0c: 4a92 ldr r2, [pc, #584] ; (10002158 <..lin.bedd1e24..d097d702.0_9+0x2>) 10001f0e: 4308 orrs r0, r1 10001f10: 6020 str r0, [r4, #0] 10001f12: 686c ldr r4, [r5, #4] 10001f14: 6810 ldr r0, [r2, #0] 10001f16: 2106 movs r1, #6 10001f18: 4388 bics r0, r1 10001f1a: 2109 movs r1, #9 10001f1c: 4308 orrs r0, r1 10001f1e: 2103 movs r1, #3 10001f20: 0389 lsls r1, r1, #14 10001f22: 4388 bics r0, r1 10001f24: 2101 movs r1, #1 10001f26: 0389 lsls r1, r1, #14 10001f28: 4308 orrs r0, r1 10001f2a: 2103 movs r1, #3 10001f2c: 0609 lsls r1, r1, #24 10001f2e: 4388 bics r0, r1 10001f30: 2101 movs r1, #1 10001f32: 0609 lsls r1, r1, #24 10001f34: 4308 orrs r0, r1 10001f36: 2103 movs r1, #3 10001f38: 0209 lsls r1, r1, #8 10001f3a: 4388 bics r0, r1 10001f3c: 9000 str r0, [sp, #0] 10001f3e: 6020 str r0, [r4, #0] 10001f40: 4620 mov r0, r4 10001f42: f7ff ff77 bl 10001e34 <__spi_init_registers_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSpi_inf> 10001f46: 6820 ldr r0, [r4, #0] 10001f48: 2101 movs r1, #1 10001f4a: 07c9 lsls r1, r1, #31 10001f4c: 4308 orrs r0, r1 10001f4e: 6020 str r0, [r4, #0] } 10001f50: b001 add sp, #4 10001f52: bd30 pop {r4, r5, pc} 10001f54 : { 10001f54: b510 push {r4, lr} spi_config_t * config = NULL_PTR; 10001f56: 4a85 ldr r2, [pc, #532] ; (1000216c <..lin.bedd1e24..d097d702.0_9+0x16>) for (uint8 idx = 0U; idx < (uint8)SPI_DEVICE_CONFIGS; idx++) 10001f58: 2100 movs r1, #0 10001f5a: 7813 ldrb r3, [r2, #0] 10001f5c: 4283 cmp r3, r0 10001f5e: d100 bne.n 10001f62 10001f60: 4611 mov r1, r2 10001f62: 4613 mov r3, r2 10001f64: 7b14 ldrb r4, [r2, #12] 10001f66: 330c adds r3, #12 10001f68: 4284 cmp r4, r0 10001f6a: d100 bne.n 10001f6e 10001f6c: 4619 mov r1, r3 10001f6e: 4613 mov r3, r2 10001f70: 7e14 ldrb r4, [r2, #24] 10001f72: 3318 adds r3, #24 10001f74: 4284 cmp r4, r0 10001f76: d100 bne.n 10001f7a 10001f78: 4619 mov r1, r3 10001f7a: 4613 mov r3, r2 10001f7c: 3324 adds r3, #36 ; 0x24 10001f7e: 781c ldrb r4, [r3, #0] 10001f80: 4284 cmp r4, r0 10001f82: d100 bne.n 10001f86 10001f84: 4619 mov r1, r3 10001f86: 3230 adds r2, #48 ; 0x30 10001f88: 7813 ldrb r3, [r2, #0] 10001f8a: 4283 cmp r3, r0 10001f8c: d100 bne.n 10001f90 <..lin.bedd1e24..181bf865.0_3> 10001f8e: 4611 mov r1, r2 10001f90 <..lin.bedd1e24..181bf865.0_3>: return config; 10001f90: 4608 mov r0, r1 10001f92: bd10 pop {r4, pc} 10001f94 <__spi_switch_configuration_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSpi_inf>: { 10001f94: b5f0 push {r4, r5, r6, r7, lr} 10001f96: b083 sub sp, #12 if (last_used_config[0U].base == NULL_PTR) 10001f98: 4c75 ldr r4, [pc, #468] ; (10002170 <..lin.bedd1e24..d097d702.0_9+0x1a>) 10001f9a: 6862 ldr r2, [r4, #4] 10001f9c: 2a00 cmp r2, #0 10001f9e: d109 bne.n 10001fb4 <..lin.bedd1e24..f0406283.0_5> 10001fa0 <..lin.bedd1e24..f0406283.0_4>: for (uint8 idx = 0U; idx < (uint8)SCB_BASES_USED; idx++) 10001fa0: 4b71 ldr r3, [pc, #452] ; (10002168 <..lin.bedd1e24..d097d702.0_9+0x12>) last_used_config[idx].base = SCB_BASES[idx]; 10001fa2: 00d1 lsls r1, r2, #3 10001fa4: 1861 adds r1, r4, r1 10001fa6: 0095 lsls r5, r2, #2 10001fa8: 58ed ldr r5, [r5, r3] 10001faa: 604d str r5, [r1, #4] for (uint8 idx = 0U; idx < (uint8)SCB_BASES_USED; idx++) 10001fac: 3201 adds r2, #1 10001fae: b2d2 uxtb r2, r2 10001fb0: 2a02 cmp r2, #2 10001fb2: d3f6 bcc.n 10001fa2 <..lin.bedd1e24..f0406283.0_4+0x2> 10001fb4 <..lin.bedd1e24..f0406283.0_5>: spi_config_t * config = spi_get_config(active_configuration); 10001fb4: f7ff ffce bl 10001f54 if (config->base != NULL_PTR) 10001fb8: 6881 ldr r1, [r0, #8] 10001fba: 2900 cmp r1, #0 10001fbc: d100 bne.n 10001fc0 <..lin.bedd1e24..f0406283.0_6> 10001fbe: e09a b.n 100020f6 <..lin.bedd1e24..f0406283.0_7> 10001fc0 <..lin.bedd1e24..f0406283.0_6>: for (int idx = 0; idx < SCB_BASES_USED; idx++) //search last used configuration for specific base 10001fc0: 6862 ldr r2, [r4, #4] 10001fc2: 4b6c ldr r3, [pc, #432] ; (10002174 <..lin.bedd1e24..d097d702.0_9+0x1e>) 10001fc4: 428a cmp r2, r1 10001fc6: d13f bne.n 10002048 <..lin.bedd1e24..f0406283.0_6+0x88> 10001fc8: 7802 ldrb r2, [r0, #0] 10001fca: 6825 ldr r5, [r4, #0] 10001fcc: 4295 cmp r5, r2 10001fce: d03b beq.n 10002048 <..lin.bedd1e24..f0406283.0_6+0x88> 10001fd0: 6a0d ldr r5, [r1, #32] 10001fd2: 9500 str r5, [sp, #0] 10001fd4: 2503 movs r5, #3 10001fd6: 022d lsls r5, r5, #8 10001fd8: 586d ldr r5, [r5, r1] 10001fda: 9502 str r5, [sp, #8] 10001fdc: 2501 movs r5, #1 10001fde: 026d lsls r5, r5, #9 10001fe0: 586d ldr r5, [r5, r1] 10001fe2: 9501 str r5, [sp, #4] 10001fe4: 680d ldr r5, [r1, #0] 10001fe6: 401d ands r5, r3 10001fe8: 600d str r5, [r1, #0] 10001fea: 9b00 ldr r3, [sp, #0] 10001fec: 2604 movs r6, #4 10001fee: 43b3 bics r3, r6 10001ff0: 7947 ldrb r7, [r0, #5] 10001ff2: 7845 ldrb r5, [r0, #1] 10001ff4: 78c6 ldrb r6, [r0, #3] 10001ff6: 07ed lsls r5, r5, #31 10001ff8: 0f6d lsrs r5, r5, #29 10001ffa: 432b orrs r3, r5 10001ffc: 7885 ldrb r5, [r0, #2] 10001ffe: 085b lsrs r3, r3, #1 10002000: 005b lsls r3, r3, #1 10002002: 07ed lsls r5, r5, #31 10002004: 0fed lsrs r5, r5, #31 10002006: 432b orrs r3, r5 10002008: 2503 movs r5, #3 1000200a: 06ad lsls r5, r5, #26 1000200c: 43ab bics r3, r5 1000200e: 07b5 lsls r5, r6, #30 10002010: 7906 ldrb r6, [r0, #4] 10002012: 092d lsrs r5, r5, #4 10002014: 432b orrs r3, r5 10002016: 9300 str r3, [sp, #0] 10002018: 9d02 ldr r5, [sp, #8] 1000201a: 2301 movs r3, #1 1000201c: 33ff adds r3, #255 ; 0xff 1000201e: 439d bics r5, r3 10002020: 07f3 lsls r3, r6, #31 10002022: 0ddb lsrs r3, r3, #23 10002024: 431d orrs r5, r3 10002026: 9b01 ldr r3, [sp, #4] 10002028: 2601 movs r6, #1 1000202a: 36ff adds r6, #255 ; 0xff 1000202c: 43b3 bics r3, r6 1000202e: 07fe lsls r6, r7, #31 10002030: 7987 ldrb r7, [r0, #6] 10002032: 0df6 lsrs r6, r6, #23 10002034: 4333 orrs r3, r6 10002036: 261f movs r6, #31 10002038: 43b5 bics r5, r6 1000203a: 06fe lsls r6, r7, #27 1000203c: 0ef6 lsrs r6, r6, #27 1000203e: 4335 orrs r5, r6 10002040: 9502 str r5, [sp, #8] 10002042: 79c5 ldrb r5, [r0, #7] 10002044: 6022 str r2, [r4, #0] 10002046: e041 b.n 100020cc <..lin.bedd1e24..f0406283.0_6+0x10c> 10002048: 68e2 ldr r2, [r4, #12] 1000204a: 428a cmp r2, r1 1000204c: d153 bne.n 100020f6 <..lin.bedd1e24..f0406283.0_7> 1000204e: 7802 ldrb r2, [r0, #0] 10002050: 68a5 ldr r5, [r4, #8] 10002052: 4295 cmp r5, r2 10002054: d04f beq.n 100020f6 <..lin.bedd1e24..f0406283.0_7> 10002056: 6a0d ldr r5, [r1, #32] 10002058: 9500 str r5, [sp, #0] 1000205a: 2503 movs r5, #3 1000205c: 022d lsls r5, r5, #8 1000205e: 594d ldr r5, [r1, r5] 10002060: 9502 str r5, [sp, #8] 10002062: 2501 movs r5, #1 10002064: 026d lsls r5, r5, #9 10002066: 594d ldr r5, [r1, r5] 10002068: 9501 str r5, [sp, #4] 1000206a: 680d ldr r5, [r1, #0] 1000206c: 401d ands r5, r3 1000206e: 600d str r5, [r1, #0] 10002070: 9b00 ldr r3, [sp, #0] 10002072: 2604 movs r6, #4 10002074: 43b3 bics r3, r6 10002076: 7947 ldrb r7, [r0, #5] 10002078: 7845 ldrb r5, [r0, #1] 1000207a: 78c6 ldrb r6, [r0, #3] 1000207c: 07ed lsls r5, r5, #31 1000207e: 0f6d lsrs r5, r5, #29 10002080: 432b orrs r3, r5 10002082: 7885 ldrb r5, [r0, #2] 10002084: 085b lsrs r3, r3, #1 10002086: 005b lsls r3, r3, #1 10002088: 07ed lsls r5, r5, #31 1000208a: 0fed lsrs r5, r5, #31 1000208c: 432b orrs r3, r5 1000208e: 2503 movs r5, #3 10002090: 06ad lsls r5, r5, #26 10002092: 43ab bics r3, r5 10002094: 07b5 lsls r5, r6, #30 10002096: 7906 ldrb r6, [r0, #4] 10002098: 092d lsrs r5, r5, #4 1000209a: 432b orrs r3, r5 1000209c: 9300 str r3, [sp, #0] 1000209e: 9d02 ldr r5, [sp, #8] 100020a0: 2301 movs r3, #1 100020a2: 33ff adds r3, #255 ; 0xff 100020a4: 439d bics r5, r3 100020a6: 07f3 lsls r3, r6, #31 100020a8: 0ddb lsrs r3, r3, #23 100020aa: 431d orrs r5, r3 100020ac: 9b01 ldr r3, [sp, #4] 100020ae: 2601 movs r6, #1 100020b0: 36ff adds r6, #255 ; 0xff 100020b2: 43b3 bics r3, r6 100020b4: 07fe lsls r6, r7, #31 100020b6: 7987 ldrb r7, [r0, #6] 100020b8: 0df6 lsrs r6, r6, #23 100020ba: 4333 orrs r3, r6 100020bc: 261f movs r6, #31 100020be: 43b5 bics r5, r6 100020c0: 06fe lsls r6, r7, #27 100020c2: 0ef6 lsrs r6, r6, #27 100020c4: 4335 orrs r5, r6 100020c6: 9502 str r5, [sp, #8] 100020c8: 79c5 ldrb r5, [r0, #7] 100020ca: 60a2 str r2, [r4, #8] 100020cc: 201f movs r0, #31 100020ce: 4383 bics r3, r0 100020d0: 06e8 lsls r0, r5, #27 100020d2: 0ec0 lsrs r0, r0, #27 100020d4: 4303 orrs r3, r0 100020d6: 9800 ldr r0, [sp, #0] 100020d8: 9301 str r3, [sp, #4] 100020da: 6208 str r0, [r1, #32] 100020dc: 9802 ldr r0, [sp, #8] 100020de: 2203 movs r2, #3 100020e0: 0212 lsls r2, r2, #8 100020e2: 5088 str r0, [r1, r2] 100020e4: 9801 ldr r0, [sp, #4] 100020e6: 2201 movs r2, #1 100020e8: 0252 lsls r2, r2, #9 100020ea: 5088 str r0, [r1, r2] 100020ec: 6808 ldr r0, [r1, #0] 100020ee: 2201 movs r2, #1 100020f0: 07d2 lsls r2, r2, #31 100020f2: 4310 orrs r0, r2 100020f4: 6008 str r0, [r1, #0] 100020f6 <..lin.bedd1e24..f0406283.0_7>: } 100020f6: b003 add sp, #12 100020f8: bdf0 pop {r4, r5, r6, r7, pc} 100020fa : { 100020fa: b5f0 push {r4, r5, r6, r7, lr} 100020fc: b081 sub sp, #4 100020fe: 460d mov r5, r1 10002100: 9200 str r2, [sp, #0] 10002102: 461c mov r4, r3 spi_config_t * config = spi_get_config(ic_config); 10002104: 4607 mov r7, r0 10002106: f7ff ff25 bl 10001f54 if (config->base != NULL_PTR) 1000210a: 6886 ldr r6, [r0, #8] 1000210c: 2e00 cmp r6, #0 1000210e: d076 beq.n 100021fe <..lin.bedd1e24..d097d702.0_15> 10002110 <..lin.bedd1e24..d097d702.0_8>: spi_switch_configuration(ic_config); 10002110: 4638 mov r0, r7 10002112: f7ff ff3f bl 10001f94 <__spi_switch_configuration_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjSpi_inf> if (size > 1U) 10002116: 2c01 cmp r4, #1 10002118: d96f bls.n 100021fa <..lin.bedd1e24..d097d702.0_14+0xc> 1000211a: 4629 mov r1, r5 1000211c: 08e5 lsrs r5, r4, #3 1000211e: 2309 movs r3, #9 10002120: 019b lsls r3, r3, #6 10002122: 199b adds r3, r3, r6 10002124: 2d00 cmp r5, #0 10002126: d027 beq.n 10002178 <..lin.bedd1e24..d097d702.0_10> 10002128: 8808 ldrh r0, [r1, #0] 1000212a: 6018 str r0, [r3, #0] 1000212c: 8848 ldrh r0, [r1, #2] 1000212e: 6018 str r0, [r3, #0] 10002130: 8888 ldrh r0, [r1, #4] 10002132: 6018 str r0, [r3, #0] 10002134: 88c8 ldrh r0, [r1, #6] 10002136: 6018 str r0, [r3, #0] 10002138: 8908 ldrh r0, [r1, #8] 1000213a: 6018 str r0, [r3, #0] 1000213c: 8948 ldrh r0, [r1, #10] 1000213e: 6018 str r0, [r3, #0] 10002140: 8988 ldrh r0, [r1, #12] 10002142: 6018 str r0, [r3, #0] 10002144: 89c8 ldrh r0, [r1, #14] 10002146: 6018 str r0, [r3, #0] 10002148: 3110 adds r1, #16 1000214a: 3d01 subs r5, #1 1000214c: d1ec bne.n 10002128 <..lin.bedd1e24..d097d702.0_8+0x18> 1000214e: 0760 lsls r0, r4, #29 10002150: 0f40 lsrs r0, r0, #29 10002152: d017 beq.n 10002184 <..lin.bedd1e24..d097d702.0_10+0xc> 10002154: e011 b.n 1000217a <..lin.bedd1e24..d097d702.0_10+0x2> 10002156 <..lin.bedd1e24..d097d702.0_9>: for (idx = 0UL; idx < size; idx++) 10002156: bf00 nop 10002158: 50dc str r4, [r3, r3] 1000215a: 1000 asrs r0, r0, #32 1000215c: 50e0 str r0, [r4, r3] 1000215e: 1000 asrs r0, r0, #32 10002160: 50e4 str r4, [r4, r3] 10002162: 1000 asrs r0, r0, #32 10002164: 50e8 str r0, [r5, r3] 10002166: 1000 asrs r0, r0, #32 10002168: 16d8 asrs r0, r3, #27 1000216a: 0800 lsrs r0, r0, #32 1000216c: 16e0 asrs r0, r4, #27 1000216e: 0800 lsrs r0, r0, #32 10002170: 0a30 lsrs r0, r6, #8 10002172: 0800 lsrs r0, r0, #32 10002174: ffff 7fff ; instruction: 0xffff7fff 10002178 <..lin.bedd1e24..d097d702.0_10>: 10002178: 4620 mov r0, r4 1000217a: 880a ldrh r2, [r1, #0] 1000217c: 601a str r2, [r3, #0] 1000217e: 3102 adds r1, #2 10002180: 3801 subs r0, #1 10002182: d1fa bne.n 1000217a <..lin.bedd1e24..d097d702.0_10+0x2> 10002184: 2161 movs r1, #97 ; 0x61 10002186: 00c9 lsls r1, r1, #3 10002188: 1989 adds r1, r1, r6 1000218a <..lin.bedd1e24..d097d702.0_11>: while ((spi_get_fifo_rx_status(config->base) & size) != size) { ; } 1000218a: 6808 ldr r0, [r1, #0] 1000218c: 4020 ands r0, r4 1000218e: 42a0 cmp r0, r4 10002190: d1fb bne.n 1000218a <..lin.bedd1e24..d097d702.0_11> 10002192 <..lin.bedd1e24..d097d702.0_12>: for (idx = 0UL; idx < size; idx++) 10002192: 9a00 ldr r2, [sp, #0] 10002194: 08e1 lsrs r1, r4, #3 10002196: 200d movs r0, #13 10002198: 0180 lsls r0, r0, #6 1000219a: 1980 adds r0, r0, r6 1000219c: 2900 cmp r1, #0 1000219e: d015 beq.n 100021cc <..lin.bedd1e24..d097d702.0_12+0x3a> 100021a0: 6803 ldr r3, [r0, #0] 100021a2: 8013 strh r3, [r2, #0] 100021a4: 6803 ldr r3, [r0, #0] 100021a6: 8053 strh r3, [r2, #2] 100021a8: 6803 ldr r3, [r0, #0] 100021aa: 8093 strh r3, [r2, #4] 100021ac: 6803 ldr r3, [r0, #0] 100021ae: 80d3 strh r3, [r2, #6] 100021b0: 6803 ldr r3, [r0, #0] 100021b2: 8113 strh r3, [r2, #8] 100021b4: 6803 ldr r3, [r0, #0] 100021b6: 8153 strh r3, [r2, #10] 100021b8: 6803 ldr r3, [r0, #0] 100021ba: 8193 strh r3, [r2, #12] 100021bc: 6803 ldr r3, [r0, #0] 100021be: 81d3 strh r3, [r2, #14] 100021c0: 3210 adds r2, #16 100021c2: 3901 subs r1, #1 100021c4: d1ec bne.n 100021a0 <..lin.bedd1e24..d097d702.0_12+0xe> 100021c6: 0764 lsls r4, r4, #29 100021c8: 0f64 lsrs r4, r4, #29 100021ca: d018 beq.n 100021fe <..lin.bedd1e24..d097d702.0_15> 100021cc: 6801 ldr r1, [r0, #0] 100021ce: 8011 strh r1, [r2, #0] 100021d0: 3202 adds r2, #2 100021d2: 3c01 subs r4, #1 100021d4: d1fa bne.n 100021cc <..lin.bedd1e24..d097d702.0_12+0x3a> 100021d6: e012 b.n 100021fe <..lin.bedd1e24..d097d702.0_15> 100021d8 <..lin.bedd1e24..d097d702.0_13>: config->base->unTX_FIFO_WR.u32Register = tx_buf[idx]; 100021d8: 2209 movs r2, #9 100021da: 0192 lsls r2, r2, #6 100021dc: 8828 ldrh r0, [r5, #0] 100021de: 50b0 str r0, [r6, r2] while ((spi_get_fifo_rx_status(config->base) & size) != size) { ; } 100021e0: 2161 movs r1, #97 ; 0x61 100021e2: 00c9 lsls r1, r1, #3 100021e4: 1989 adds r1, r1, r6 100021e6: 6808 ldr r0, [r1, #0] 100021e8: 4020 ands r0, r4 100021ea: 42a0 cmp r0, r4 100021ec: d1fb bne.n 100021e6 <..lin.bedd1e24..d097d702.0_13+0xe> 100021ee <..lin.bedd1e24..d097d702.0_14>: rx_buf[idx] = (uint16)(config->base->unRX_FIFO_RD.u32Register); 100021ee: 210d movs r1, #13 100021f0: 0189 lsls r1, r1, #6 100021f2: 5988 ldr r0, [r1, r6] 100021f4: 9900 ldr r1, [sp, #0] 100021f6: 8008 strh r0, [r1, #0] for (idx = 0UL; idx < size; idx++) 100021f8: e001 b.n 100021fe <..lin.bedd1e24..d097d702.0_15> 100021fa: 2c00 cmp r4, #0 100021fc: d1ec bne.n 100021d8 <..lin.bedd1e24..d097d702.0_13> 100021fe <..lin.bedd1e24..d097d702.0_15>: } 100021fe: b001 add sp, #4 10002200: bdf0 pop {r4, r5, r6, r7, pc} 10002202 : { 10002202: b5f0 push {r4, r5, r6, r7, lr} 10002204: b081 sub sp, #4 10002206: 9100 str r1, [sp, #0] uint8 u8frameParity = 0U; 10002208: 2300 movs r3, #0 for (u8idx = 0U; u8idx < SPI_BIT_FRAME_LENGTH; u8idx++) 1000220a: 461c mov r4, r3 1000220c: 8802 ldrh r2, [r0, #0] 1000220e: 2602 movs r6, #2 10002210: 2501 movs r5, #1 10002212: 4617 mov r7, r2 10002214: 4127 asrs r7, r4 10002216: 07ff lsls r7, r7, #31 10002218: d500 bpl.n 1000221c 1000221a: 3b01 subs r3, #1 1000221c: 1c67 adds r7, r4, #1 1000221e: 4611 mov r1, r2 10002220: 4139 asrs r1, r7 10002222: 07c9 lsls r1, r1, #31 10002224: d500 bpl.n 10002228 10002226: 3b01 subs r3, #1 10002228: 1ca7 adds r7, r4, #2 1000222a: 4611 mov r1, r2 1000222c: 4139 asrs r1, r7 1000222e: 07c9 lsls r1, r1, #31 10002230: d500 bpl.n 10002234 10002232: 3b01 subs r3, #1 10002234: 1ce7 adds r7, r4, #3 10002236: 4611 mov r1, r2 10002238: 4139 asrs r1, r7 1000223a: 07c9 lsls r1, r1, #31 1000223c: d500 bpl.n 10002240 1000223e: 3b01 subs r3, #1 10002240: 1d27 adds r7, r4, #4 10002242: 4611 mov r1, r2 10002244: 4139 asrs r1, r7 10002246: 07c9 lsls r1, r1, #31 10002248: d500 bpl.n 1000224c 1000224a: 3b01 subs r3, #1 1000224c: 1d67 adds r7, r4, #5 1000224e: 4611 mov r1, r2 10002250: 4139 asrs r1, r7 10002252: 07c9 lsls r1, r1, #31 10002254: d500 bpl.n 10002258 10002256: 3b01 subs r3, #1 10002258: 1da7 adds r7, r4, #6 1000225a: 4611 mov r1, r2 1000225c: 4139 asrs r1, r7 1000225e: 07c9 lsls r1, r1, #31 10002260: d500 bpl.n 10002264 10002262: 3b01 subs r3, #1 10002264: 1de7 adds r7, r4, #7 10002266: 4611 mov r1, r2 10002268: 4139 asrs r1, r7 1000226a: 07c9 lsls r1, r1, #31 1000226c: d500 bpl.n 10002270 1000226e: 3b01 subs r3, #1 10002270: 3408 adds r4, #8 10002272: 3e01 subs r6, #1 10002274: d1cd bne.n 10002212 10002276 <..lin.bedd1e24..8c53cfb2.0_16>: if ((u8frameParity % 2U) == 0U) 10002276: 07db lsls r3, r3, #31 10002278: d103 bne.n 10002282 <..lin.bedd1e24..8c53cfb2.0_17+0x8> 1000227a <..lin.bedd1e24..8c53cfb2.0_17>: *u16_frame_data |= (uint16)((uint16)1U << u8_parity_bit_position); 1000227a: 9900 ldr r1, [sp, #0] 1000227c: 408d lsls r5, r1 1000227e: 432a orrs r2, r5 10002280: 8002 strh r2, [r0, #0] } 10002282: b001 add sp, #4 10002284: bdf0 pop {r4, r5, r6, r7, pc} 10002286 <__ghs_eofn_spi_set_parity_bit>: ... 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf>: {22U, 3U, 94U, 0U}, {23U, 3U, 95U, 75U} }; static void get_port_and_pin_from_pin_nr(uint8* port, uint8* pin, const uint8 pin_nr) { 10002288: b5f0 push {r4, r5, r6, r7, lr} 1000228a: b082 sub sp, #8 1000228c: 9000 str r0, [sp, #0] 1000228e: 9101 str r1, [sp, #4] uint8 i = 0U; for (i = 0; i < sizeof(port_pin_to_pin_nr_map) / sizeof(port_pin_to_pin_nr_map[0]); ++i) 10002290: 48c2 ldr r0, [pc, #776] ; (1000259c <__ghs_eofn_Port_Read>) 10002292: 2400 movs r4, #0 10002294: 2712 movs r7, #18 10002296: 4bc2 ldr r3, [pc, #776] ; (100025a0 <__ghs_eofn_Port_Read+0x4>) 10002298: 7806 ldrb r6, [r0, #0] 1000229a: 00a5 lsls r5, r4, #2 1000229c: 195d adds r5, r3, r5 1000229e: 2e02 cmp r6, #2 100022a0: d803 bhi.n 100022aa <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x22> 100022a2: 78e9 ldrb r1, [r5, #3] 100022a4: 4291 cmp r1, r2 100022a6: d103 bne.n 100022b0 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x28> 100022a8: e035 b.n 10002316 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x8e> 100022aa: 78a9 ldrb r1, [r5, #2] 100022ac: 4291 cmp r1, r2 100022ae: d032 beq.n 10002316 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x8e> 100022b0: 3401 adds r4, #1 100022b2: 00a5 lsls r5, r4, #2 100022b4: 195d adds r5, r3, r5 100022b6: 2e02 cmp r6, #2 100022b8: d803 bhi.n 100022c2 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x3a> 100022ba: 78e9 ldrb r1, [r5, #3] 100022bc: 4291 cmp r1, r2 100022be: d103 bne.n 100022c8 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x40> 100022c0: e029 b.n 10002316 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x8e> 100022c2: 78a9 ldrb r1, [r5, #2] 100022c4: 4291 cmp r1, r2 100022c6: d026 beq.n 10002316 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x8e> 100022c8: 3401 adds r4, #1 100022ca: 00a5 lsls r5, r4, #2 100022cc: 195d adds r5, r3, r5 100022ce: 2e02 cmp r6, #2 100022d0: d803 bhi.n 100022da <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x52> 100022d2: 78e9 ldrb r1, [r5, #3] 100022d4: 4291 cmp r1, r2 100022d6: d103 bne.n 100022e0 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x58> 100022d8: e01d b.n 10002316 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x8e> 100022da: 78a9 ldrb r1, [r5, #2] 100022dc: 4291 cmp r1, r2 100022de: d01a beq.n 10002316 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x8e> 100022e0: 3401 adds r4, #1 100022e2: 00a5 lsls r5, r4, #2 100022e4: 195d adds r5, r3, r5 100022e6: 2e02 cmp r6, #2 100022e8: d812 bhi.n 10002310 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x88> 100022ea: 78e9 ldrb r1, [r5, #3] 100022ec: 4291 cmp r1, r2 100022ee: d012 beq.n 10002316 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x8e> 100022f0: 3401 adds r4, #1 100022f2: 3f01 subs r7, #1 100022f4: d1d1 bne.n 1000229a <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x12> 100022f6: 2502 movs r5, #2 100022f8: 00a1 lsls r1, r4, #2 100022fa: 185b adds r3, r3, r1 100022fc: 7806 ldrb r6, [r0, #0] 100022fe: 2e02 cmp r6, #2 10002300: d810 bhi.n 10002324 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x9c> 10002302: 78d8 ldrb r0, [r3, #3] 10002304: 4290 cmp r0, r2 10002306: d010 beq.n 1000232a <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0xa2> 10002308: 3304 adds r3, #4 1000230a: 3d01 subs r5, #1 1000230c: d1f7 bne.n 100022fe <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x76> 1000230e: e012 b.n 10002336 <..lin.9a7f3add..49df323c.0_1> 10002310: 78a9 ldrb r1, [r5, #2] 10002312: 4291 cmp r1, r2 10002314: d1ec bne.n 100022f0 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x68> 10002316: 9800 ldr r0, [sp, #0] 10002318: 782a ldrb r2, [r5, #0] 1000231a: 7002 strb r2, [r0, #0] 1000231c: 9801 ldr r0, [sp, #4] 1000231e: 786a ldrb r2, [r5, #1] 10002320: 7002 strb r2, [r0, #0] 10002322: e008 b.n 10002336 <..lin.9a7f3add..49df323c.0_1> 10002324: 7898 ldrb r0, [r3, #2] 10002326: 4290 cmp r0, r2 10002328: d1ee bne.n 10002308 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf+0x80> 1000232a: 9800 ldr r0, [sp, #0] 1000232c: 781a ldrb r2, [r3, #0] 1000232e: 7002 strb r2, [r0, #0] 10002330: 9801 ldr r0, [sp, #4] 10002332: 785a ldrb r2, [r3, #1] 10002334: 7002 strb r2, [r0, #0] 10002336 <..lin.9a7f3add..49df323c.0_1>: *pin = port_pin_to_pin_nr_map[i].pin; break; } } } } 10002336: b002 add sp, #8 10002338: bdf0 pop {r4, r5, r6, r7, pc} 1000233a : /// /// \return void //----------------------------------------------------------------------------- // PRQA S 1503 1 // The function is actually called but QAC does not see it because it is C++ code void Port_Init(const Port_ConfigType* ConfigPtr) { 1000233a: b5f0 push {r4, r5, r6, r7, lr} 1000233c: b083 sub sp, #12 uint32 idx; // PRQA S 3112 1 // ConfigPtr not used at the moment (void) ConfigPtr; for (idx = pinMapStart; idx < (uint32)PORT_PIN_COUNT; idx++) 1000233e: 4b99 ldr r3, [pc, #612] ; (100025a4 <__ghs_eofn_Port_Read+0x8>) 10002340: 2124 movs r1, #36 ; 0x24 10002342: 9102 str r1, [sp, #8] 10002344: 461e mov r6, r3 10002346: 3644 adds r6, #68 ; 0x44 10002348: 6bd8 ldr r0, [r3, #60] ; 0x3c 1000234a: b401 push {r0} 1000234c: 2701 movs r7, #1 1000234e: 4087 lsls r7, r0 10002350: 6b5a ldr r2, [r3, #52] ; 0x34 10002352: 0084 lsls r4, r0, #2 10002354: 200f movs r0, #15 10002356: 6c51 ldr r1, [r2, #68] ; 0x44 10002358: 40a0 lsls r0, r4 1000235a: 4381 bics r1, r0 1000235c: 6858 ldr r0, [r3, #4] 1000235e: 6c1d ldr r5, [r3, #64] ; 0x40 10002360: 0700 lsls r0, r0, #28 10002362: 0f00 lsrs r0, r0, #28 10002364: 40a0 lsls r0, r4 10002366: 4301 orrs r1, r0 10002368: 6451 str r1, [r2, #68] ; 0x44 1000236a: 7a19 ldrb r1, [r3, #8] 1000236c: 9800 ldr r0, [sp, #0] 1000236e: 9102 str r1, [sp, #8] 10002370: 00c4 lsls r4, r0, #3 10002372: 211f movs r1, #31 10002374: 2804 cmp r0, #4 10002376: d20b bcs.n 10002390 10002378: 40a1 lsls r1, r4 1000237a: 4608 mov r0, r1 1000237c: 6829 ldr r1, [r5, #0] 1000237e: 4381 bics r1, r0 10002380: 9802 ldr r0, [sp, #8] 10002382: 06c0 lsls r0, r0, #27 10002384: 0ec0 lsrs r0, r0, #27 10002386: 40a0 lsls r0, r4 10002388: 4301 orrs r1, r0 1000238a: 6029 str r1, [r5, #0] 1000238c: bc01 pop {r0} 1000238e: e00b b.n 100023a8 10002390: 3c20 subs r4, #32 10002392: 40a1 lsls r1, r4 10002394: 4608 mov r0, r1 10002396: 6869 ldr r1, [r5, #4] 10002398: 4381 bics r1, r0 1000239a: 9802 ldr r0, [sp, #8] 1000239c: 06c0 lsls r0, r0, #27 1000239e: 0ec0 lsrs r0, r0, #27 100023a0: 40a0 lsls r0, r4 100023a2: 4301 orrs r1, r0 100023a4: 6069 str r1, [r5, #4] 100023a6: bc01 pop {r0} 100023a8: 4604 mov r4, r0 100023aa: 3410 adds r4, #16 100023ac: 2503 movs r5, #3 100023ae: 40a5 lsls r5, r4 100023b0: 6cd1 ldr r1, [r2, #76] ; 0x4c 100023b2: 433d orrs r5, r7 100023b4: 43a9 bics r1, r5 100023b6: 699d ldr r5, [r3, #24] 100023b8: 07ed lsls r5, r5, #31 100023ba: 0fed lsrs r5, r5, #31 100023bc: 4085 lsls r5, r0 100023be: 69d8 ldr r0, [r3, #28] 100023c0: 0780 lsls r0, r0, #30 100023c2: 0f80 lsrs r0, r0, #30 100023c4: 40a0 lsls r0, r4 100023c6: 4328 orrs r0, r5 100023c8: 4308 orrs r0, r1 100023ca: 64d0 str r0, [r2, #76] ; 0x4c 100023cc: 6819 ldr r1, [r3, #0] 100023ce: 6057 str r7, [r2, #4] 100023d0: 2900 cmp r1, #0 100023d2: d000 beq.n 100023d6 100023d4: 6097 str r7, [r2, #8] 100023d6: 6bf0 ldr r0, [r6, #60] ; 0x3c 100023d8: b401 push {r0} 100023da: 2701 movs r7, #1 100023dc: 4087 lsls r7, r0 100023de: 6b72 ldr r2, [r6, #52] ; 0x34 100023e0: 0084 lsls r4, r0, #2 100023e2: 200f movs r0, #15 100023e4: 6c51 ldr r1, [r2, #68] ; 0x44 100023e6: 40a0 lsls r0, r4 100023e8: 4381 bics r1, r0 100023ea: 6870 ldr r0, [r6, #4] 100023ec: 6c35 ldr r5, [r6, #64] ; 0x40 100023ee: 0700 lsls r0, r0, #28 100023f0: 0f00 lsrs r0, r0, #28 100023f2: 40a0 lsls r0, r4 100023f4: 4301 orrs r1, r0 100023f6: 6451 str r1, [r2, #68] ; 0x44 100023f8: 7a31 ldrb r1, [r6, #8] 100023fa: 9800 ldr r0, [sp, #0] 100023fc: 9102 str r1, [sp, #8] 100023fe: 00c4 lsls r4, r0, #3 10002400: 211f movs r1, #31 10002402: 2804 cmp r0, #4 10002404: d20b bcs.n 1000241e 10002406: 40a1 lsls r1, r4 10002408: 4608 mov r0, r1 1000240a: 6829 ldr r1, [r5, #0] 1000240c: 4381 bics r1, r0 1000240e: 9802 ldr r0, [sp, #8] 10002410: 06c0 lsls r0, r0, #27 10002412: 0ec0 lsrs r0, r0, #27 10002414: 40a0 lsls r0, r4 10002416: 4301 orrs r1, r0 10002418: 6029 str r1, [r5, #0] 1000241a: bc01 pop {r0} 1000241c: e00b b.n 10002436 1000241e: 3c20 subs r4, #32 10002420: 40a1 lsls r1, r4 10002422: 4608 mov r0, r1 10002424: 6869 ldr r1, [r5, #4] 10002426: 4381 bics r1, r0 10002428: 9802 ldr r0, [sp, #8] 1000242a: 06c0 lsls r0, r0, #27 1000242c: 0ec0 lsrs r0, r0, #27 1000242e: 40a0 lsls r0, r4 10002430: 4301 orrs r1, r0 10002432: 6069 str r1, [r5, #4] 10002434: bc01 pop {r0} 10002436: 4604 mov r4, r0 10002438: 3410 adds r4, #16 1000243a: 2503 movs r5, #3 1000243c: 40a5 lsls r5, r4 1000243e: 6cd1 ldr r1, [r2, #76] ; 0x4c 10002440: 433d orrs r5, r7 10002442: 43a9 bics r1, r5 10002444: 69b5 ldr r5, [r6, #24] 10002446: 07ed lsls r5, r5, #31 10002448: 0fed lsrs r5, r5, #31 1000244a: 4085 lsls r5, r0 1000244c: 69f0 ldr r0, [r6, #28] 1000244e: 0780 lsls r0, r0, #30 10002450: 0f80 lsrs r0, r0, #30 10002452: 40a0 lsls r0, r4 10002454: 4328 orrs r0, r5 10002456: 4308 orrs r0, r1 10002458: 64d0 str r0, [r2, #76] ; 0x4c 1000245a: 6831 ldr r1, [r6, #0] 1000245c: 6057 str r7, [r2, #4] 1000245e: 3688 adds r6, #136 ; 0x88 10002460: 3388 adds r3, #136 ; 0x88 10002462: 2900 cmp r1, #0 10002464: d105 bne.n 10002472 10002466: 9902 ldr r1, [sp, #8] 10002468: 3901 subs r1, #1 1000246a: 9102 str r1, [sp, #8] 1000246c: d000 beq.n 10002470 1000246e: e76b b.n 10002348 10002470: e005 b.n 1000247e 10002472: 9902 ldr r1, [sp, #8] 10002474: 6097 str r7, [r2, #8] 10002476: 3901 subs r1, #1 10002478: 9102 str r1, [sp, #8] 1000247a: d000 beq.n 1000247e 1000247c: e764 b.n 10002348 1000247e: 6bd8 ldr r0, [r3, #60] ; 0x3c 10002480: 2701 movs r7, #1 10002482: 4087 lsls r7, r0 10002484: 6b5a ldr r2, [r3, #52] ; 0x34 10002486: 0084 lsls r4, r0, #2 10002488: 260f movs r6, #15 1000248a: 6c51 ldr r1, [r2, #68] ; 0x44 1000248c: 40a6 lsls r6, r4 1000248e: 43b1 bics r1, r6 10002490: 685e ldr r6, [r3, #4] 10002492: 6c1d ldr r5, [r3, #64] ; 0x40 10002494: 0736 lsls r6, r6, #28 10002496: 0f36 lsrs r6, r6, #28 10002498: 40a6 lsls r6, r4 1000249a: 4331 orrs r1, r6 1000249c: 6451 str r1, [r2, #68] ; 0x44 1000249e: 7a19 ldrb r1, [r3, #8] 100024a0: 00c4 lsls r4, r0, #3 100024a2: 06c9 lsls r1, r1, #27 100024a4: 0ec9 lsrs r1, r1, #27 100024a6: 9102 str r1, [sp, #8] 100024a8: 261f movs r6, #31 100024aa: 2804 cmp r0, #4 100024ac: d207 bcs.n 100024be 100024ae: 6829 ldr r1, [r5, #0] 100024b0: 40a6 lsls r6, r4 100024b2: 43b1 bics r1, r6 100024b4: 9e02 ldr r6, [sp, #8] 100024b6: 40a6 lsls r6, r4 100024b8: 4331 orrs r1, r6 100024ba: 6029 str r1, [r5, #0] 100024bc: e007 b.n 100024ce 100024be: 3c20 subs r4, #32 100024c0: 6869 ldr r1, [r5, #4] 100024c2: 40a6 lsls r6, r4 100024c4: 43b1 bics r1, r6 100024c6: 9e02 ldr r6, [sp, #8] 100024c8: 40a6 lsls r6, r4 100024ca: 4331 orrs r1, r6 100024cc: 6069 str r1, [r5, #4] 100024ce: 4604 mov r4, r0 100024d0: 3410 adds r4, #16 100024d2: 2503 movs r5, #3 100024d4: 40a5 lsls r5, r4 100024d6: 6cd1 ldr r1, [r2, #76] ; 0x4c 100024d8: 433d orrs r5, r7 100024da: 43a9 bics r1, r5 100024dc: 69dd ldr r5, [r3, #28] 100024de: 07ad lsls r5, r5, #30 100024e0: 0fad lsrs r5, r5, #30 100024e2: 40a5 lsls r5, r4 100024e4: 699c ldr r4, [r3, #24] 100024e6: 07e4 lsls r4, r4, #31 100024e8: 0fe4 lsrs r4, r4, #31 100024ea: 4084 lsls r4, r0 100024ec: 4325 orrs r5, r4 100024ee: 4329 orrs r1, r5 100024f0: 64d1 str r1, [r2, #76] ; 0x4c 100024f2: 6819 ldr r1, [r3, #0] 100024f4: 6057 str r7, [r2, #4] 100024f6: 2900 cmp r1, #0 100024f8: d000 beq.n 100024fc <..lin.9a7f3add..2671a0dd.0_2> 100024fa: 6097 str r7, [r2, #8] 100024fc <..lin.9a7f3add..2671a0dd.0_2>: else { portBase->unOUT_SET.u32Register = PORT_GPIO_OUT_MASK << pinNb; } } } 100024fc: b003 add sp, #12 100024fe: bdf0 pop {r4, r5, r6, r7, pc} 10002500 : // E_OK : the pin was read successfully //----------------------------------------------------------------------------- // PRQA S 1503 1 // not used at the moment Std_ReturnType Port_Read(uint32 portNb, uint32 pinNb, uint8 *result) { 10002500: b570 push {r4, r5, r6, lr} 10002502: 4603 mov r3, r0 Std_ReturnType retVal = E_NOT_OK; 10002504: 4c27 ldr r4, [pc, #156] ; (100025a4 <__ghs_eofn_Port_Read+0x8>) uint32 idx; uint32 tempReg; uint32 pinLoc; // Iterate over the map of pins for (idx = pinMapStart; idx < (uint32)PORT_PIN_COUNT; idx++) 10002506: 2001 movs r0, #1 10002508: 2512 movs r5, #18 1000250a: 6ba6 ldr r6, [r4, #56] ; 0x38 1000250c: 429e cmp r6, r3 1000250e: d105 bne.n 1000251c 10002510: 6be6 ldr r6, [r4, #60] ; 0x3c 10002512: 428e cmp r6, r1 10002514: d102 bne.n 1000251c 10002516: 7a26 ldrb r6, [r4, #8] 10002518: 2e00 cmp r6, #0 1000251a: d029 beq.n 10002570 1000251c: 6fe6 ldr r6, [r4, #124] ; 0x7c 1000251e: 3444 adds r4, #68 ; 0x44 10002520: 429e cmp r6, r3 10002522: d105 bne.n 10002530 10002524: 6be6 ldr r6, [r4, #60] ; 0x3c 10002526: 428e cmp r6, r1 10002528: d102 bne.n 10002530 1000252a: 7a26 ldrb r6, [r4, #8] 1000252c: 2e00 cmp r6, #0 1000252e: d01f beq.n 10002570 10002530: 6fe6 ldr r6, [r4, #124] ; 0x7c 10002532: 3444 adds r4, #68 ; 0x44 10002534: 429e cmp r6, r3 10002536: d105 bne.n 10002544 10002538: 6be6 ldr r6, [r4, #60] ; 0x3c 1000253a: 428e cmp r6, r1 1000253c: d102 bne.n 10002544 1000253e: 7a26 ldrb r6, [r4, #8] 10002540: 2e00 cmp r6, #0 10002542: d015 beq.n 10002570 10002544: 6fe6 ldr r6, [r4, #124] ; 0x7c 10002546: 3444 adds r4, #68 ; 0x44 10002548: 429e cmp r6, r3 1000254a: d105 bne.n 10002558 1000254c: 6be6 ldr r6, [r4, #60] ; 0x3c 1000254e: 428e cmp r6, r1 10002550: d102 bne.n 10002558 10002552: 7a26 ldrb r6, [r4, #8] 10002554: 2e00 cmp r6, #0 10002556: d00b beq.n 10002570 10002558: 3444 adds r4, #68 ; 0x44 1000255a: 3d01 subs r5, #1 1000255c: d1d5 bne.n 1000250a 1000255e: 6ba5 ldr r5, [r4, #56] ; 0x38 10002560: 429d cmp r5, r3 10002562: d11a bne.n 1000259a <..lin.9a7f3add..267668e5.0_3> 10002564: 6be3 ldr r3, [r4, #60] ; 0x3c 10002566: 428b cmp r3, r1 10002568: d117 bne.n 1000259a <..lin.9a7f3add..267668e5.0_3> 1000256a: 7a23 ldrb r3, [r4, #8] 1000256c: 2b00 cmp r3, #0 1000256e: d114 bne.n 1000259a <..lin.9a7f3add..267668e5.0_3> 10002570: 6b60 ldr r0, [r4, #52] ; 0x34 10002572: 2301 movs r3, #1 10002574: 408b lsls r3, r1 10002576: 6043 str r3, [r0, #4] 10002578: 008b lsls r3, r1, #2 1000257a: 240f movs r4, #15 1000257c: 6c45 ldr r5, [r0, #68] ; 0x44 1000257e: 409c lsls r4, r3 10002580: 43a5 bics r5, r4 10002582: 2408 movs r4, #8 10002584: 409c lsls r4, r3 10002586: 4325 orrs r5, r4 10002588: 6445 str r5, [r0, #68] ; 0x44 1000258a: 2a00 cmp r2, #0 1000258c: d004 beq.n 10002598 1000258e: 6900 ldr r0, [r0, #16] 10002590: 40c8 lsrs r0, r1 10002592: 07c0 lsls r0, r0, #31 10002594: 0fc0 lsrs r0, r0, #31 10002596: 7010 strb r0, [r2, #0] 10002598: 2000 movs r0, #0 1000259a <..lin.9a7f3add..267668e5.0_3>: { // do nothing } } return retVal; 1000259a: bd70 pop {r4, r5, r6, pc} 1000259c <__ghs_eofn_Port_Read>: 1000259c: 171d asrs r5, r3, #28 1000259e: 0800 lsrs r0, r0, #32 100025a0: 648c str r4, [r1, #72] ; 0x48 100025a2: 1000 asrs r0, r0, #32 100025a4: 5128 str r0, [r5, r4] 100025a6: 1000 asrs r0, r0, #32 100025a8 : // E_OK : the pin was written successfully //----------------------------------------------------------------------------- // PRQA S 1503 1 // not used at the moment Std_ReturnType Port_Write(uint32 portNb, uint32 pinNb, uint8 value) { 100025a8: b570 push {r4, r5, r6, lr} 100025aa: 4603 mov r3, r0 Std_ReturnType retVal = E_NOT_OK; 100025ac: 4cc9 ldr r4, [pc, #804] ; (100028d4 <__ghs_eofn_Shortcut_test>) uint32 idx; uint32 tempReg; uint32 pinLoc; // Iterate over the map of pins for (idx = pinMapStart; idx < (uint32)PORT_PIN_COUNT; idx++) 100025ae: 2001 movs r0, #1 100025b0: 2512 movs r5, #18 100025b2: 6ba6 ldr r6, [r4, #56] ; 0x38 100025b4: 429e cmp r6, r3 100025b6: d105 bne.n 100025c4 100025b8: 6be6 ldr r6, [r4, #60] ; 0x3c 100025ba: 428e cmp r6, r1 100025bc: d102 bne.n 100025c4 100025be: 7a26 ldrb r6, [r4, #8] 100025c0: 2e00 cmp r6, #0 100025c2: d029 beq.n 10002618 100025c4: 6fe6 ldr r6, [r4, #124] ; 0x7c 100025c6: 3444 adds r4, #68 ; 0x44 100025c8: 429e cmp r6, r3 100025ca: d105 bne.n 100025d8 100025cc: 6be6 ldr r6, [r4, #60] ; 0x3c 100025ce: 428e cmp r6, r1 100025d0: d102 bne.n 100025d8 100025d2: 7a26 ldrb r6, [r4, #8] 100025d4: 2e00 cmp r6, #0 100025d6: d01f beq.n 10002618 100025d8: 6fe6 ldr r6, [r4, #124] ; 0x7c 100025da: 3444 adds r4, #68 ; 0x44 100025dc: 429e cmp r6, r3 100025de: d105 bne.n 100025ec 100025e0: 6be6 ldr r6, [r4, #60] ; 0x3c 100025e2: 428e cmp r6, r1 100025e4: d102 bne.n 100025ec 100025e6: 7a26 ldrb r6, [r4, #8] 100025e8: 2e00 cmp r6, #0 100025ea: d015 beq.n 10002618 100025ec: 6fe6 ldr r6, [r4, #124] ; 0x7c 100025ee: 3444 adds r4, #68 ; 0x44 100025f0: 429e cmp r6, r3 100025f2: d105 bne.n 10002600 100025f4: 6be6 ldr r6, [r4, #60] ; 0x3c 100025f6: 428e cmp r6, r1 100025f8: d102 bne.n 10002600 100025fa: 7a26 ldrb r6, [r4, #8] 100025fc: 2e00 cmp r6, #0 100025fe: d00b beq.n 10002618 10002600: 3444 adds r4, #68 ; 0x44 10002602: 3d01 subs r5, #1 10002604: d1d5 bne.n 100025b2 10002606: 6ba5 ldr r5, [r4, #56] ; 0x38 10002608: 429d cmp r5, r3 1000260a: d117 bne.n 1000263c <..lin.9a7f3add..f5a54574.0_4> 1000260c: 6be3 ldr r3, [r4, #60] ; 0x3c 1000260e: 428b cmp r3, r1 10002610: d114 bne.n 1000263c <..lin.9a7f3add..f5a54574.0_4> 10002612: 7a23 ldrb r3, [r4, #8] 10002614: 2b00 cmp r3, #0 10002616: d111 bne.n 1000263c <..lin.9a7f3add..f5a54574.0_4> 10002618: 4088 lsls r0, r1 1000261a: 6b63 ldr r3, [r4, #52] ; 0x34 1000261c: 0089 lsls r1, r1, #2 1000261e: 240f movs r4, #15 10002620: 6c5d ldr r5, [r3, #68] ; 0x44 10002622: 408c lsls r4, r1 10002624: 43a5 bics r5, r4 10002626: 240e movs r4, #14 10002628: 408c lsls r4, r1 1000262a: 4325 orrs r5, r4 1000262c: 645d str r5, [r3, #68] ; 0x44 1000262e: 6058 str r0, [r3, #4] 10002630: 2a00 cmp r2, #0 10002632: d101 bne.n 10002638 10002634: 4610 mov r0, r2 10002636: e001 b.n 1000263c <..lin.9a7f3add..f5a54574.0_4> 10002638: 6098 str r0, [r3, #8] 1000263a: 2000 movs r0, #0 1000263c <..lin.9a7f3add..f5a54574.0_4>: else { // do nothing } } return retVal; 1000263c: bd70 pop {r4, r5, r6, pc} 1000263e : // \param pin pin Number // //----------------------------------------------------------------------------- void Port_PullUp_Activate(uint8 pin_nr) { 1000263e: b500 push {lr} 10002640: b081 sub sp, #4 stc_GPIO_PRT_t* portBase; uint8 port; uint8 pin; get_port_and_pin_from_pin_nr(&port, &pin, pin_nr); 10002642: 4602 mov r2, r0 10002644: 4669 mov r1, sp 10002646: 3103 adds r1, #3 10002648: 1e48 subs r0, r1, #1 1000264a: f7ff fe1d bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> portBase = (stc_GPIO_PRT_t*)Port_pinConfig[pin].portBaseAddr; // Set base address of the specific port 1000264e: 466b mov r3, sp 10002650: 78d9 ldrb r1, [r3, #3] 10002652: 010a lsls r2, r1, #4 10002654: 1888 adds r0, r1, r2 10002656: 4a9f ldr r2, [pc, #636] ; (100028d4 <__ghs_eofn_Shortcut_test>) 10002658: 0080 lsls r0, r0, #2 1000265a: 1880 adds r0, r0, r2 1000265c: 6b40 ldr r0, [r0, #52] ; 0x34 portBase->unOUT_CLR.u32Register = PORT_GPIO_OUT_MASK << pin; // Clear output 1000265e: 2201 movs r2, #1 10002660: 408a lsls r2, r1 10002662: 6042 str r2, [r0, #4] // Configuration of pull up mode portBase->unCFG.u32Register &= ~0x07U; // clear bits 0, 1, 2 10002664: 6c42 ldr r2, [r0, #68] ; 0x44 10002666: 08d2 lsrs r2, r2, #3 10002668: 00d2 lsls r2, r2, #3 portBase->unCFG.u32Register |= 0x02U; //setting bit 1 1000266a: 2302 movs r3, #2 1000266c: 431a orrs r2, r3 1000266e: 466b mov r3, sp (void)Port_Write(port, pin, 1U); // write 1 on desired pin 10002670: 6442 str r2, [r0, #68] ; 0x44 10002672: 7898 ldrb r0, [r3, #2] 10002674: 2201 movs r2, #1 10002676: f7ff ff97 bl 100025a8 } 1000267a: b001 add sp, #4 1000267c: bd00 pop {pc} 1000267e : // \param pin pin Number // //----------------------------------------------------------------------------- void Port_PullDown_Activate(uint8 pin_nr) { 1000267e: b500 push {lr} 10002680: b081 sub sp, #4 stc_GPIO_PRT_t* portBase; uint8 port; uint8 pin; get_port_and_pin_from_pin_nr(&port, &pin, pin_nr); 10002682: 4602 mov r2, r0 10002684: 4669 mov r1, sp 10002686: 3103 adds r1, #3 10002688: 1e48 subs r0, r1, #1 1000268a: f7ff fdfd bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> portBase = (stc_GPIO_PRT_t*)Port_pinConfig[pin].portBaseAddr; // Set base address of the specific port 1000268e: 466b mov r3, sp 10002690: 78d9 ldrb r1, [r3, #3] 10002692: 010a lsls r2, r1, #4 10002694: 1888 adds r0, r1, r2 10002696: 4a8f ldr r2, [pc, #572] ; (100028d4 <__ghs_eofn_Shortcut_test>) 10002698: 0080 lsls r0, r0, #2 1000269a: 1880 adds r0, r0, r2 1000269c: 6b40 ldr r0, [r0, #52] ; 0x34 portBase->unOUT_CLR.u32Register = PORT_GPIO_OUT_MASK << pin; // Clear output 1000269e: 2201 movs r2, #1 100026a0: 408a lsls r2, r1 100026a2: 6042 str r2, [r0, #4] // Configuration of pull down mode portBase->unCFG.u32Register &= ~0x07U; // clear bits 0, 1, 2 100026a4: 6c42 ldr r2, [r0, #68] ; 0x44 100026a6: 08d2 lsrs r2, r2, #3 100026a8: 00d2 lsls r2, r2, #3 portBase->unCFG.u32Register |= 0x03U; //setting bits 1 and 0 100026aa: 2303 movs r3, #3 100026ac: 431a orrs r2, r3 100026ae: 466b mov r3, sp (void)Port_Write(port, pin, 0U); // write 0 on desired pin 100026b0: 6442 str r2, [r0, #68] ; 0x44 100026b2: 7898 ldrb r0, [r3, #2] 100026b4: 2200 movs r2, #0 100026b6: f7ff ff77 bl 100025a8 } 100026ba: b001 add sp, #4 100026bc: bd00 pop {pc} 100026be : // \param pin pin Number // //----------------------------------------------------------------------------- Std_ReturnType Port_Read_bypin(uint32 pin_nr, uint8 *result) { 100026be: b510 push {r4, lr} 100026c0: b081 sub sp, #4 100026c2: 460c mov r4, r1 uint8 port; uint8 pin; get_port_and_pin_from_pin_nr(&port, &pin, pin_nr); 100026c4: b2c2 uxtb r2, r0 100026c6: 4669 mov r1, sp 100026c8: 3103 adds r1, #3 100026ca: 1e48 subs r0, r1, #1 100026cc: f7ff fddc bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> Std_ReturnType retVal = E_NOT_OK; retVal = Port_Read(port, pin, result); 100026d0: 466b mov r3, sp 100026d2: 7898 ldrb r0, [r3, #2] 100026d4: 78d9 ldrb r1, [r3, #3] 100026d6: 4622 mov r2, r4 100026d8: f7ff ff12 bl 10002500 return retVal; 100026dc: b001 add sp, #4 100026de: bd10 pop {r4, pc} 100026e0 : // \param pin pin Number // //----------------------------------------------------------------------------- Std_ReturnType Port_Write_bypin(uint32 pin_nr, uint8 value) { 100026e0: b510 push {r4, lr} 100026e2: b081 sub sp, #4 100026e4: 460c mov r4, r1 uint8 port; uint8 pin; get_port_and_pin_from_pin_nr(&port, &pin, pin_nr); 100026e6: b2c2 uxtb r2, r0 100026e8: 4669 mov r1, sp 100026ea: 3103 adds r1, #3 100026ec: 1e48 subs r0, r1, #1 100026ee: f7ff fdcb bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> Std_ReturnType retVal = E_NOT_OK; retVal = Port_Write(port, pin, value); 100026f2: 466b mov r3, sp 100026f4: 7898 ldrb r0, [r3, #2] 100026f6: 78d9 ldrb r1, [r3, #3] 100026f8: 4622 mov r2, r4 100026fa: f7ff ff55 bl 100025a8 return retVal; 100026fe: b001 add sp, #4 10002700: bd10 pop {r4, pc} 10002702 : // \return retVal E_NOT_OK ->shortcut detected // E_OK ->shortcut free //----------------------------------------------------------------------------- Std_ReturnType Shortcut_test(uint8 pinLeft, uint8 pinMiddle, uint8 pinRight) { 10002702: b5f0 push {r4, r5, r6, r7, lr} 10002704: b08b sub sp, #44 ; 0x2c 10002706: 4604 mov r4, r0 10002708: 460e mov r6, r1 1000270a: 4617 mov r7, r2 Std_ReturnType retVal = E_OK; 1000270c: 460a mov r2, r1 1000270e: 4669 mov r1, sp uint8 new_status_pin_left = 0U; 10002710: 2300 movs r3, #0 10002712: 708b strb r3, [r1, #2] 10002714: 70cb strb r3, [r1, #3] uint8 old_status_pin_left = 0U; 10002716: a901 add r1, sp, #4 uint8 new_status_pin_right = 0U; 10002718: 9309 str r3, [sp, #36] ; 0x24 1000271a: 700b strb r3, [r1, #0] uint8 old_status_pin_right = 0U; 1000271c: 704b strb r3, [r1, #1] if (pinRight != 255U) // check if we have 1 or 2 neighbors 1000271e: 2fff cmp r7, #255 ; 0xff 10002720: d100 bne.n 10002724 <..lin.9a7f3add..1555b6a0.0_5> 10002722: e080 b.n 10002826 <..lin.9a7f3add..1555b6a0.0_7> 10002724 <..lin.9a7f3add..1555b6a0.0_5>: { //initial write (void)Port_Write_bypin(pinMiddle, 0U); 10002724: 3102 adds r1, #2 10002726: 1c48 adds r0, r1, #1 10002728: f7ff fdae bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 1000272c: ab01 add r3, sp, #4 1000272e: 7899 ldrb r1, [r3, #2] 10002730: 78d8 ldrb r0, [r3, #3] 10002732: 2200 movs r2, #0 10002734: f7ff ff38 bl 100025a8 //read initial state (void)Port_Read_bypin(pinLeft, &old_status_pin_left); 10002738: 4622 mov r2, r4 1000273a: a902 add r1, sp, #8 1000273c: 1c48 adds r0, r1, #1 1000273e: f7ff fda3 bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 10002742: 466a mov r2, sp 10002744: 7a11 ldrb r1, [r2, #8] 10002746: 7a50 ldrb r0, [r2, #9] 10002748: 3203 adds r2, #3 1000274a: f7ff fed9 bl 10002500 (void)Port_Read_bypin(pinRight, &old_status_pin_right); 1000274e: 463a mov r2, r7 10002750: a902 add r1, sp, #8 10002752: 3102 adds r1, #2 10002754: 1c48 adds r0, r1, #1 10002756: f7ff fd97 bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 1000275a: aa01 add r2, sp, #4 1000275c: 7991 ldrb r1, [r2, #6] 1000275e: 79d0 ldrb r0, [r2, #7] 10002760: 3201 adds r2, #1 10002762: f7ff fecd bl 10002500 //modify value of test pin (void)Port_Write_bypin(pinMiddle, 1U); 10002766: 4632 mov r2, r6 10002768: a903 add r1, sp, #12 1000276a: 1c48 adds r0, r1, #1 1000276c: f7ff fd8c bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 10002770: ab03 add r3, sp, #12 10002772: 7819 ldrb r1, [r3, #0] 10002774: 7858 ldrb r0, [r3, #1] 10002776: 2201 movs r2, #1 10002778: f7ff ff16 bl 100025a8 //read state after write (void)Port_Read_bypin(pinLeft, &new_status_pin_left); 1000277c: 4622 mov r2, r4 1000277e: a903 add r1, sp, #12 10002780: 3102 adds r1, #2 10002782: 1c48 adds r0, r1, #1 10002784: f7ff fd80 bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 10002788: ab03 add r3, sp, #12 1000278a: 466a mov r2, sp 1000278c: 78d8 ldrb r0, [r3, #3] 1000278e: 7899 ldrb r1, [r3, #2] 10002790: 3202 adds r2, #2 10002792: f7ff feb5 bl 10002500 (void)Port_Read_bypin(pinRight, &new_status_pin_right); 10002796: 463a mov r2, r7 10002798: a904 add r1, sp, #16 1000279a: 1c48 adds r0, r1, #1 1000279c: f7ff fd74 bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 100027a0: ab04 add r3, sp, #16 100027a2: 7858 ldrb r0, [r3, #1] 100027a4: 7819 ldrb r1, [r3, #0] 100027a6: aa01 add r2, sp, #4 100027a8: f7ff feaa bl 10002500 if (new_status_pin_left != old_status_pin_left || new_status_pin_right != old_status_pin_right) 100027ac: 466b mov r3, sp 100027ae: 789d ldrb r5, [r3, #2] 100027b0: ab01 add r3, sp, #4 100027b2: 7818 ldrb r0, [r3, #0] 100027b4: 466b mov r3, sp 100027b6: 78d9 ldrb r1, [r3, #3] 100027b8: 428d cmp r5, r1 100027ba: d103 bne.n 100027c4 <..lin.9a7f3add..1555b6a0.0_6> 100027bc: aa01 add r2, sp, #4 100027be: 7851 ldrb r1, [r2, #1] 100027c0: 4288 cmp r0, r1 100027c2: d001 beq.n 100027c8 <..lin.9a7f3add..1555b6a0.0_6+0x4> 100027c4 <..lin.9a7f3add..1555b6a0.0_6>: { retVal = E_NOT_OK; 100027c4: 2201 movs r2, #1 100027c6: 9209 str r2, [sp, #36] ; 0x24 } //change old value to new value old_status_pin_left = new_status_pin_left; old_status_pin_right = new_status_pin_right; 100027c8: 4632 mov r2, r6 //modify value of test pin (void)Port_Write_bypin(pinMiddle, 0U); 100027ca: 900a str r0, [sp, #40] ; 0x28 100027cc: a904 add r1, sp, #16 100027ce: 3102 adds r1, #2 100027d0: 1c48 adds r0, r1, #1 100027d2: f7ff fd59 bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 100027d6: ab04 add r3, sp, #16 100027d8: 7899 ldrb r1, [r3, #2] 100027da: 78d8 ldrb r0, [r3, #3] 100027dc: 2200 movs r2, #0 100027de: f7ff fee3 bl 100025a8 //read state after write (void)Port_Read_bypin(pinLeft, &new_status_pin_left); 100027e2: 4622 mov r2, r4 100027e4: a905 add r1, sp, #20 100027e6: 1c48 adds r0, r1, #1 100027e8: f7ff fd4e bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 100027ec: ab05 add r3, sp, #20 100027ee: 466a mov r2, sp 100027f0: 7858 ldrb r0, [r3, #1] 100027f2: 7819 ldrb r1, [r3, #0] 100027f4: 3202 adds r2, #2 100027f6: f7ff fe83 bl 10002500 (void)Port_Read_bypin(pinRight, &new_status_pin_right); 100027fa: 463a mov r2, r7 100027fc: a905 add r1, sp, #20 100027fe: 3102 adds r1, #2 10002800: 1c48 adds r0, r1, #1 10002802: f7ff fd41 bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 10002806: ab05 add r3, sp, #20 10002808: 78d8 ldrb r0, [r3, #3] 1000280a: 7899 ldrb r1, [r3, #2] 1000280c: aa01 add r2, sp, #4 1000280e: f7ff fe77 bl 10002500 if (new_status_pin_left != old_status_pin_left || new_status_pin_right != old_status_pin_right) 10002812: 466b mov r3, sp 10002814: 7898 ldrb r0, [r3, #2] 10002816: 42a8 cmp r0, r5 10002818: d157 bne.n 100028ca <..lin.9a7f3add..1555b6a0.0_9> 1000281a: a901 add r1, sp, #4 1000281c: 7808 ldrb r0, [r1, #0] 1000281e: 990a ldr r1, [sp, #40] ; 0x28 10002820: 4288 cmp r0, r1 10002822: d054 beq.n 100028ce <..lin.9a7f3add..1555b6a0.0_9+0x4> 10002824: e051 b.n 100028ca <..lin.9a7f3add..1555b6a0.0_9> 10002826 <..lin.9a7f3add..1555b6a0.0_7>: } } else { //initial write (void)Port_Write_bypin(pinMiddle, 0U); 10002826: a906 add r1, sp, #24 10002828: 1c48 adds r0, r1, #1 1000282a: f7ff fd2d bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 1000282e: ab06 add r3, sp, #24 10002830: 7819 ldrb r1, [r3, #0] 10002832: 7858 ldrb r0, [r3, #1] 10002834: 2200 movs r2, #0 10002836: f7ff feb7 bl 100025a8 //read initial state (void)Port_Read_bypin(pinLeft, &old_status_pin_left); 1000283a: 4622 mov r2, r4 1000283c: a906 add r1, sp, #24 1000283e: 3102 adds r1, #2 10002840: 1c48 adds r0, r1, #1 10002842: f7ff fd21 bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 10002846: ab06 add r3, sp, #24 10002848: 466a mov r2, sp 1000284a: 78d8 ldrb r0, [r3, #3] 1000284c: 7899 ldrb r1, [r3, #2] 1000284e: 3203 adds r2, #3 10002850: f7ff fe56 bl 10002500 //modify value of test pin (void)Port_Write_bypin(pinMiddle, 1U); 10002854: 4632 mov r2, r6 10002856: a907 add r1, sp, #28 10002858: 1c48 adds r0, r1, #1 1000285a: f7ff fd15 bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 1000285e: ab07 add r3, sp, #28 10002860: 7819 ldrb r1, [r3, #0] 10002862: 7858 ldrb r0, [r3, #1] 10002864: 2201 movs r2, #1 10002866: f7ff fe9f bl 100025a8 //read state after write (void)Port_Read_bypin(pinLeft, &new_status_pin_left); 1000286a: 4622 mov r2, r4 1000286c: a907 add r1, sp, #28 1000286e: 3102 adds r1, #2 10002870: 1c48 adds r0, r1, #1 10002872: f7ff fd09 bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 10002876: ab07 add r3, sp, #28 10002878: 466a mov r2, sp 1000287a: 78d8 ldrb r0, [r3, #3] 1000287c: 7899 ldrb r1, [r3, #2] 1000287e: 3202 adds r2, #2 10002880: f7ff fe3e bl 10002500 if (new_status_pin_left != old_status_pin_left) 10002884: 466b mov r3, sp 10002886: 789d ldrb r5, [r3, #2] 10002888: 78d8 ldrb r0, [r3, #3] 1000288a: 4285 cmp r5, r0 1000288c: d001 beq.n 10002892 <..lin.9a7f3add..1555b6a0.0_8+0x4> 1000288e <..lin.9a7f3add..1555b6a0.0_8>: { retVal = E_NOT_OK; 1000288e: 2101 movs r1, #1 10002890: 9109 str r1, [sp, #36] ; 0x24 //change old value to new value old_status_pin_left = new_status_pin_left; //modify value of test pin (void)Port_Write_bypin(pinMiddle, 0U); 10002892: 4632 mov r2, r6 10002894: a908 add r1, sp, #32 10002896: 1c48 adds r0, r1, #1 10002898: f7ff fcf6 bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 1000289c: ab08 add r3, sp, #32 1000289e: 7819 ldrb r1, [r3, #0] 100028a0: 7858 ldrb r0, [r3, #1] 100028a2: 2200 movs r2, #0 100028a4: f7ff fe80 bl 100025a8 //read state after write (void)Port_Read_bypin(pinLeft, &new_status_pin_left); 100028a8: 4622 mov r2, r4 100028aa: a908 add r1, sp, #32 100028ac: 3102 adds r1, #2 100028ae: 1c48 adds r0, r1, #1 100028b0: f7ff fcea bl 10002288 <__get_port_and_pin_from_pin_nr_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjPort_inf> 100028b4: ab08 add r3, sp, #32 100028b6: 466a mov r2, sp 100028b8: 78d8 ldrb r0, [r3, #3] 100028ba: 7899 ldrb r1, [r3, #2] 100028bc: 3202 adds r2, #2 100028be: f7ff fe1f bl 10002500 if (new_status_pin_left != old_status_pin_left) 100028c2: 466b mov r3, sp 100028c4: 7898 ldrb r0, [r3, #2] 100028c6: 42a8 cmp r0, r5 100028c8: d001 beq.n 100028ce <..lin.9a7f3add..1555b6a0.0_9+0x4> 100028ca <..lin.9a7f3add..1555b6a0.0_9>: { retVal = E_NOT_OK; 100028ca: 2101 movs r1, #1 100028cc: 9109 str r1, [sp, #36] ; 0x24 } } return retVal; 100028ce: 9809 ldr r0, [sp, #36] ; 0x24 100028d0: b00b add sp, #44 ; 0x2c 100028d2: bdf0 pop {r4, r5, r6, r7, pc} 100028d4 <__ghs_eofn_Shortcut_test>: 100028d4: 5128 str r0, [r5, r4] 100028d6: 1000 asrs r0, r0, #32 100028d8 <__Cy_WDT_Unlock_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjWdg_inf>: // \return - //----------------------------------------------------------------------------- static void Cy_WDT_Unlock(void) { /* The WDT lock is to be removed by two writes */ WDT->unLOCK.stcField.u2WDT_LOCK = 1U; 100028d8: 492e ldr r1, [pc, #184] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 100028da: 6808 ldr r0, [r1, #0] 100028dc: 2103 movs r1, #3 100028de: 4388 bics r0, r1 100028e0: 2101 movs r1, #1 100028e2: 4308 orrs r0, r1 100028e4: 492b ldr r1, [pc, #172] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 100028e6: 6008 str r0, [r1, #0] WDT->unLOCK.stcField.u2WDT_LOCK = 2U; 100028e8: 6808 ldr r0, [r1, #0] 100028ea: 2103 movs r1, #3 100028ec: 4388 bics r0, r1 100028ee: 2102 movs r1, #2 100028f0: 4308 orrs r0, r1 100028f2: 4928 ldr r1, [pc, #160] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 100028f4: 6008 str r0, [r1, #0] } 100028f6: 4770 bx lr 100028f8 <__Cy_WDT_Disable_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjWdg_inf>: Cy_WDT_Unlock(); 100028f8: 4a26 ldr r2, [pc, #152] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 100028fa: 6810 ldr r0, [r2, #0] 100028fc: 2203 movs r2, #3 100028fe: 4390 bics r0, r2 10002900: 2201 movs r2, #1 10002902: 4310 orrs r0, r2 10002904: 4a23 ldr r2, [pc, #140] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 10002906: 6010 str r0, [r2, #0] 10002908: 6810 ldr r0, [r2, #0] 1000290a: 2203 movs r2, #3 1000290c: 4390 bics r0, r2 1000290e: 2202 movs r2, #2 10002910: 4310 orrs r0, r2 10002912: 4a20 ldr r2, [pc, #128] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 10002914: 2101 movs r1, #1 WDT->unCTL.stcField.u1ENABLE = 0U; 10002916: 6010 str r0, [r2, #0] 10002918: 4a1f ldr r2, [pc, #124] ; (10002998 <__ghs_eofn_Wdg_SetMode+0x4>) 1000291a: 07c9 lsls r1, r1, #31 1000291c: 6810 ldr r0, [r2, #0] 1000291e: 4388 bics r0, r1 10002920: 6010 str r0, [r2, #0] Cy_WDT_Lock(); 10002922: 4a1c ldr r2, [pc, #112] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 10002924: 6810 ldr r0, [r2, #0] 10002926: 2203 movs r2, #3 10002928: 4310 orrs r0, r2 1000292a: 4a1a ldr r2, [pc, #104] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 1000292c: 6010 str r0, [r2, #0] } 1000292e: 4770 bx lr 10002930 : Cy_WDT_Disable(); 10002930: 4a18 ldr r2, [pc, #96] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 10002932: 6810 ldr r0, [r2, #0] 10002934: 2203 movs r2, #3 10002936: 4390 bics r0, r2 10002938: 2201 movs r2, #1 1000293a: 4310 orrs r0, r2 1000293c: 4a15 ldr r2, [pc, #84] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 1000293e: 6010 str r0, [r2, #0] 10002940: 6810 ldr r0, [r2, #0] 10002942: 2203 movs r2, #3 10002944: 4390 bics r0, r2 10002946: 2202 movs r2, #2 10002948: 4310 orrs r0, r2 1000294a: 4a12 ldr r2, [pc, #72] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 1000294c: 2101 movs r1, #1 1000294e: 6010 str r0, [r2, #0] 10002950: 4a11 ldr r2, [pc, #68] ; (10002998 <__ghs_eofn_Wdg_SetMode+0x4>) 10002952: 07c9 lsls r1, r1, #31 10002954: 6810 ldr r0, [r2, #0] 10002956: 4388 bics r0, r1 10002958: 6010 str r0, [r2, #0] 1000295a: 4a0e ldr r2, [pc, #56] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 1000295c: 6810 ldr r0, [r2, #0] 1000295e: 2203 movs r2, #3 10002960: 4310 orrs r0, r2 10002962: 4a0c ldr r2, [pc, #48] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 10002964: 6010 str r0, [r2, #0] } 10002966: 4770 bx lr 10002968 : } 10002968: 4770 bx lr 1000296a : switch(Mode) 1000296a: 490a ldr r1, [pc, #40] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 1000296c: 2800 cmp r0, #0 1000296e: 6808 ldr r0, [r1, #0] 10002970: d00a beq.n 10002988 <..lin.bedd2d9a..45a57bf7.0_2> 10002972 <..lin.bedd2d9a..45a57bf7.0_1>: Cy_WDT_Unlock(); 10002972: 2103 movs r1, #3 10002974: 4388 bics r0, r1 10002976: 2101 movs r1, #1 10002978: 4308 orrs r0, r1 1000297a: 4906 ldr r1, [pc, #24] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 1000297c: 6008 str r0, [r1, #0] 1000297e: 6808 ldr r0, [r1, #0] 10002980: 0880 lsrs r0, r0, #2 10002982: 0080 lsls r0, r0, #2 10002984: 2102 movs r1, #2 10002986: e000 b.n 1000298a <..lin.bedd2d9a..45a57bf7.0_2+0x2> 10002988 <..lin.bedd2d9a..45a57bf7.0_2>: Cy_WDT_Lock(); 10002988: 2103 movs r1, #3 return E_OK; 1000298a: 4308 orrs r0, r1 1000298c: 4901 ldr r1, [pc, #4] ; (10002994 <__ghs_eofn_Wdg_SetMode>) 1000298e: 6008 str r0, [r1, #0] 10002990: 2000 movs r0, #0 10002992: 4770 bx lr 10002994 <__ghs_eofn_Wdg_SetMode>: 10002994: c040 stmia r0!, {r6} 10002996: 4026 ands r6, r4 10002998: c000 stmia r0!, {} 1000299a: 4026 ands r6, r4 1000299c : void Cy_WDT_Unlock(void) { /* The WDT lock is to be removed by two writes */ // PRQA S 303 2 // correct cast -comes from macro definition WDT->unLOCK.stcField.u2WDT_LOCK = 1; 1000299c: 4919 ldr r1, [pc, #100] ; (10002a04 <__ghs_eofn_Cy_WDT_Disable+0x2>) 1000299e: 6808 ldr r0, [r1, #0] 100029a0: 2103 movs r1, #3 100029a2: 4388 bics r0, r1 100029a4: 2101 movs r1, #1 100029a6: 4308 orrs r0, r1 100029a8: 4916 ldr r1, [pc, #88] ; (10002a04 <__ghs_eofn_Cy_WDT_Disable+0x2>) 100029aa: 6008 str r0, [r1, #0] WDT->unLOCK.stcField.u2WDT_LOCK = 2; 100029ac: 6808 ldr r0, [r1, #0] 100029ae: 2103 movs r1, #3 100029b0: 4388 bics r0, r1 100029b2: 2102 movs r1, #2 100029b4: 4308 orrs r0, r1 100029b6: 4913 ldr r1, [pc, #76] ; (10002a04 <__ghs_eofn_Cy_WDT_Disable+0x2>) 100029b8: 6008 str r0, [r1, #0] } 100029ba: 4770 bx lr 100029bc : WDT->unLOCK.stcField.u2WDT_LOCK = 3; 100029bc: 4911 ldr r1, [pc, #68] ; (10002a04 <__ghs_eofn_Cy_WDT_Disable+0x2>) 100029be: 6808 ldr r0, [r1, #0] 100029c0: 2103 movs r1, #3 100029c2: 4308 orrs r0, r1 100029c4: 490f ldr r1, [pc, #60] ; (10002a04 <__ghs_eofn_Cy_WDT_Disable+0x2>) 100029c6: 6008 str r0, [r1, #0] } 100029c8: 4770 bx lr 100029ca : Cy_WDT_Unlock(); 100029ca: 4a0e ldr r2, [pc, #56] ; (10002a04 <__ghs_eofn_Cy_WDT_Disable+0x2>) 100029cc: 6810 ldr r0, [r2, #0] 100029ce: 2203 movs r2, #3 100029d0: 4390 bics r0, r2 100029d2: 2201 movs r2, #1 100029d4: 4310 orrs r0, r2 100029d6: 4a0b ldr r2, [pc, #44] ; (10002a04 <__ghs_eofn_Cy_WDT_Disable+0x2>) 100029d8: 6010 str r0, [r2, #0] 100029da: 6810 ldr r0, [r2, #0] 100029dc: 2203 movs r2, #3 100029de: 4390 bics r0, r2 100029e0: 2202 movs r2, #2 100029e2: 4310 orrs r0, r2 100029e4: 4a07 ldr r2, [pc, #28] ; (10002a04 <__ghs_eofn_Cy_WDT_Disable+0x2>) 100029e6: 2101 movs r1, #1 WDT->unCTL.stcField.u1ENABLE = 0; 100029e8: 6010 str r0, [r2, #0] 100029ea: 4a07 ldr r2, [pc, #28] ; (10002a08 <__ghs_eofn_Cy_WDT_Disable+0x6>) 100029ec: 07c9 lsls r1, r1, #31 100029ee: 6810 ldr r0, [r2, #0] 100029f0: 4388 bics r0, r1 100029f2: 6010 str r0, [r2, #0] Cy_WDT_Lock(); 100029f4: 4a03 ldr r2, [pc, #12] ; (10002a04 <__ghs_eofn_Cy_WDT_Disable+0x2>) 100029f6: 6810 ldr r0, [r2, #0] 100029f8: 2203 movs r2, #3 100029fa: 4310 orrs r0, r2 100029fc: 4a01 ldr r2, [pc, #4] ; (10002a04 <__ghs_eofn_Cy_WDT_Disable+0x2>) 100029fe: 6010 str r0, [r2, #0] } 10002a00: 4770 bx lr 10002a02 <__ghs_eofn_Cy_WDT_Disable>: 10002a02: bf00 nop 10002a04: c040 stmia r0!, {r6} 10002a06: 4026 ands r6, r4 10002a08: c000 stmia r0!, {} 10002a0a: 4026 ands r6, r4 10002a0c : //============================================================================= // Public functions definitions //============================================================================= void SystemInit(void) { 10002a0c: b530 push {r4, r5, lr} // Set wait states for boot ROM. CPUSS->unROM_CTL.stcField.u2SLOW_WS = 1u; 10002a0e: 4a4e ldr r2, [pc, #312] ; (10002b48 <..lin.213a04c1..8a59defe.0_3+0x2>) 10002a10: 6810 ldr r0, [r2, #0] 10002a12: 2203 movs r2, #3 10002a14: 4390 bics r0, r2 10002a16: 2201 movs r2, #1 10002a18: 4310 orrs r0, r2 10002a1a: 4a4b ldr r2, [pc, #300] ; (10002b48 <..lin.213a04c1..8a59defe.0_3+0x2>) 10002a1c: 2103 movs r1, #3 CPUSS->unROM_CTL.stcField.u2FAST_WS = 0u; 10002a1e: 0209 lsls r1, r1, #8 10002a20: 6010 str r0, [r2, #0] 10002a22: 6810 ldr r0, [r2, #0] 10002a24: 4388 bics r0, r1 10002a26: 6010 str r0, [r2, #0] // Set wait states for RAM. CPUSS->unRAM0_CTL0.stcField.u2SLOW_WS = 1u; 10002a28: 4a48 ldr r2, [pc, #288] ; (10002b4c <..lin.213a04c1..8a59defe.0_3+0x6>) 10002a2a: 6810 ldr r0, [r2, #0] 10002a2c: 2203 movs r2, #3 10002a2e: 4390 bics r0, r2 10002a30: 2201 movs r2, #1 10002a32: 4310 orrs r0, r2 10002a34: 4a45 ldr r2, [pc, #276] ; (10002b4c <..lin.213a04c1..8a59defe.0_3+0x6>) 10002a36: 6010 str r0, [r2, #0] CPUSS->unRAM0_CTL0.stcField.u2FAST_WS = 0u; 10002a38: 6810 ldr r0, [r2, #0] 10002a3a: 4388 bics r0, r1 10002a3c: 6010 str r0, [r2, #0] CPUSS->unRAM1_CTL0.stcField.u2SLOW_WS = 1u; 10002a3e: 4a44 ldr r2, [pc, #272] ; (10002b50 <..lin.213a04c1..8a59defe.0_3+0xa>) 10002a40: 6810 ldr r0, [r2, #0] 10002a42: 2203 movs r2, #3 10002a44: 4390 bics r0, r2 10002a46: 2201 movs r2, #1 10002a48: 4310 orrs r0, r2 10002a4a: 4a41 ldr r2, [pc, #260] ; (10002b50 <..lin.213a04c1..8a59defe.0_3+0xa>) 10002a4c: 6010 str r0, [r2, #0] CPUSS->unRAM1_CTL0.stcField.u2FAST_WS = 0u; 10002a4e: 6810 ldr r0, [r2, #0] 10002a50: 4388 bics r0, r1 10002a52: 6010 str r0, [r2, #0] // Set wait states for program flash. FLASHC->unFLASH_CTL.stcField.u4MAIN_WS = 1u; 10002a54: 4a3f ldr r2, [pc, #252] ; (10002b54 <..lin.213a04c1..8a59defe.0_3+0xe>) 10002a56: 210f movs r1, #15 10002a58: 6810 ldr r0, [r2, #0] 10002a5a: 4388 bics r0, r1 10002a5c: 2201 movs r2, #1 10002a5e: 4310 orrs r0, r2 10002a60: 4a3c ldr r2, [pc, #240] ; (10002b54 <..lin.213a04c1..8a59defe.0_3+0xe>) 10002a62: 6010 str r0, [r2, #0] // Set the clock LF source. SRSS->unCLK_SELECT.stcField.u3LFCLK_SEL = CY_SYSCLK_LFCLK_IN_WCO; //CY_SYSCLK_LFCLK_IN_ILO0; 10002a64: 4a3c ldr r2, [pc, #240] ; (10002b58 <..lin.213a04c1..8a59defe.0_3+0x12>) 10002a66: 6810 ldr r0, [r2, #0] 10002a68: 2207 movs r2, #7 10002a6a: 4390 bics r0, r2 10002a6c: 2201 movs r2, #1 10002a6e: 4310 orrs r0, r2 10002a70: 4a39 ldr r2, [pc, #228] ; (10002b58 <..lin.213a04c1..8a59defe.0_3+0x12>) 10002a72: 6010 str r0, [r2, #0] /*** ECO setting and enabling ***/ // These values need to be confirmed SRSS->unCLK_ECO_CONFIG2.stcField.u3WDTRIM = 4u; 10002a74: 4a39 ldr r2, [pc, #228] ; (10002b5c <..lin.213a04c1..8a59defe.0_3+0x16>) 10002a76: 6810 ldr r0, [r2, #0] 10002a78: 2207 movs r2, #7 10002a7a: 4390 bics r0, r2 10002a7c: 2204 movs r2, #4 10002a7e: 4310 orrs r0, r2 10002a80: 4a36 ldr r2, [pc, #216] ; (10002b5c <..lin.213a04c1..8a59defe.0_3+0x16>) 10002a82: 21f0 movs r1, #240 ; 0xf0 SRSS->unCLK_ECO_CONFIG2.stcField.u4ATRIM = 12u; 10002a84: 6010 str r0, [r2, #0] 10002a86: 6810 ldr r0, [r2, #0] 10002a88: 4388 bics r0, r1 10002a8a: 21c0 movs r1, #192 ; 0xc0 10002a8c: 4308 orrs r0, r1 10002a8e: 6010 str r0, [r2, #0] SRSS->unCLK_ECO_CONFIG2.stcField.u2FTRIM = 3u; 10002a90: 6810 ldr r0, [r2, #0] 10002a92: 2103 movs r1, #3 10002a94: 0209 lsls r1, r1, #8 10002a96: 4308 orrs r0, r1 10002a98: 6010 str r0, [r2, #0] SRSS->unCLK_ECO_CONFIG2.stcField.u2RTRIM = 3u; 10002a9a: 6810 ldr r0, [r2, #0] 10002a9c: 2103 movs r1, #3 10002a9e: 0289 lsls r1, r1, #10 10002aa0: 4308 orrs r0, r1 10002aa2: 6010 str r0, [r2, #0] SRSS->unCLK_ECO_CONFIG2.stcField.u3GTRIM = 1u; 10002aa4: 6810 ldr r0, [r2, #0] 10002aa6: 2107 movs r1, #7 10002aa8: 0309 lsls r1, r1, #12 10002aaa: 4388 bics r0, r1 10002aac: 2101 movs r1, #1 10002aae: 0309 lsls r1, r1, #12 10002ab0: 4308 orrs r0, r1 10002ab2: 6010 str r0, [r2, #0] SRSS->unCLK_ECO_CONFIG.stcField.u1ECO_EN = 1ul; 10002ab4: 4a2a ldr r2, [pc, #168] ; (10002b60 <..lin.213a04c1..8a59defe.0_3+0x1a>) 10002ab6: 2101 movs r1, #1 10002ab8: 07c9 lsls r1, r1, #31 10002aba: 6810 ldr r0, [r2, #0] 10002abc: 4308 orrs r0, r1 10002abe: 6010 str r0, [r2, #0] while (SRSS->unCLK_ECO_STATUS.stcField.u1ECO_OK == 0ul); 10002ac0: 4928 ldr r1, [pc, #160] ; (10002b64 <..lin.213a04c1..8a59defe.0_3+0x1e>) 10002ac2: 6808 ldr r0, [r1, #0] 10002ac4: 07c0 lsls r0, r0, #31 10002ac6: d5fc bpl.n 10002ac2 10002ac8 <..lin.213a04c1..8a59defe.0_1>: while (SRSS->unCLK_ECO_STATUS.stcField.u1ECO_READY == 0ul); 10002ac8: 6808 ldr r0, [r1, #0] 10002aca: 0780 lsls r0, r0, #30 10002acc: d5fc bpl.n 10002ac8 <..lin.213a04c1..8a59defe.0_1> 10002ace <..lin.213a04c1..8a59defe.0_2>: // Set the CPUSS dividers as required. // FAST = 160,000,000; PERI and SLOW = FAST / 2; CPUSS->unCM4_CLOCK_CTL.stcField.u8FAST_INT_DIV = 0u; // no division 10002ace: 4a26 ldr r2, [pc, #152] ; (10002b68 <..lin.213a04c1..8a59defe.0_3+0x22>) 10002ad0: 21ff movs r1, #255 ; 0xff 10002ad2: 0209 lsls r1, r1, #8 10002ad4: 6810 ldr r0, [r2, #0] 10002ad6: 4388 bics r0, r1 10002ad8: 6010 str r0, [r2, #0] CPUSS->unCM0_CLOCK_CTL.stcField.u8PERI_INT_DIV = 1u; // divided by 2 10002ada: 4a24 ldr r2, [pc, #144] ; (10002b6c <..lin.213a04c1..8a59defe.0_3+0x26>) 10002adc: 21ff movs r1, #255 ; 0xff 10002ade: 0609 lsls r1, r1, #24 10002ae0: 6810 ldr r0, [r2, #0] 10002ae2: 4388 bics r0, r1 10002ae4: 2101 movs r1, #1 10002ae6: 0609 lsls r1, r1, #24 10002ae8: 4308 orrs r0, r1 10002aea: 6010 str r0, [r2, #0] CPUSS->unCM0_CLOCK_CTL.stcField.u8SLOW_INT_DIV = 0u; // no division 10002aec: 6810 ldr r0, [r2, #0] 10002aee: 4c20 ldr r4, [pc, #128] ; (10002b70 <..lin.213a04c1..8a59defe.0_3+0x2a>) 10002af0: 21ff movs r1, #255 ; 0xff 10002af2: 4d20 ldr r5, [pc, #128] ; (10002b74 <..lin.213a04c1..8a59defe.0_3+0x2e>) 10002af4: 0209 lsls r1, r1, #8 // Set and enable the PLL. SRSS->unCLK_PATH_SELECT[1/*PLL0*/].stcField.u3PATH_MUX = CY_SYSTEM_PLL_INPUT_SOURCE; 10002af6: 4388 bics r0, r1 10002af8: 6010 str r0, [r2, #0] 10002afa: 6828 ldr r0, [r5, #0] 10002afc: 2207 movs r2, #7 10002afe: 4390 bics r0, r2 10002b00: 2202 movs r2, #2 10002b02: 4310 orrs r0, r2 SRSS->unCLK_PLL_CONFIG[0].stcField.u5REFERENCE_DIV = CY_SYSTEM_PLL_CONFIG_REFDIV; 10002b04: 6028 str r0, [r5, #0] 10002b06: 6820 ldr r0, [r4, #0] 10002b08: 211f movs r1, #31 10002b0a: 0209 lsls r1, r1, #8 10002b0c: 4388 bics r0, r1 10002b0e: 2101 movs r1, #1 10002b10: 0249 lsls r1, r1, #9 10002b12: 4308 orrs r0, r1 10002b14: 6020 str r0, [r4, #0] SRSS->unCLK_PLL_CONFIG[0].stcField.u7FEEDBACK_DIV = CY_SYSTEM_PLL_CONFIG_FEEDBACKDIV; 10002b16: 6820 ldr r0, [r4, #0] 10002b18: 217f movs r1, #127 ; 0x7f 10002b1a: 4388 bics r0, r1 10002b1c: 2128 movs r1, #40 ; 0x28 10002b1e: 4308 orrs r0, r1 10002b20: 6020 str r0, [r4, #0] SRSS->unCLK_PLL_CONFIG[0].stcField.u5OUTPUT_DIV = CY_SYSTEM_PLL_CONFIG_OUTDIV; 10002b22: 6820 ldr r0, [r4, #0] 10002b24: 211f movs r1, #31 10002b26: 0409 lsls r1, r1, #16 10002b28: 4388 bics r0, r1 10002b2a: 2101 movs r1, #1 10002b2c: 0449 lsls r1, r1, #17 10002b2e: 4308 orrs r0, r1 10002b30: 6020 str r0, [r4, #0] SRSS->unCLK_PLL_CONFIG[0].stcField.u1ENABLE = 1ul; 10002b32: 6820 ldr r0, [r4, #0] 10002b34: 2101 movs r1, #1 10002b36: 07c9 lsls r1, r1, #31 10002b38: 4308 orrs r0, r1 10002b3a: 6020 str r0, [r4, #0] // Wait for the PLL to lock. while (SRSS->unCLK_PLL_STATUS[0].stcField.u1LOCKED == 0ul) 10002b3c: 6c20 ldr r0, [r4, #64] ; 0x40 10002b3e: 07c0 lsls r0, r0, #31 10002b40: d41e bmi.n 10002b80 <..lin.213a04c1..8a59defe.0_6> 10002b42: 3440 adds r4, #64 ; 0x40 10002b44: e018 b.n 10002b78 <..lin.213a04c1..8a59defe.0_4> 10002b46 <..lin.213a04c1..8a59defe.0_3>: 10002b46: bf00 nop 10002b48: 13c4 asrs r4, r0, #15 10002b4a: 4020 ands r0, r4 10002b4c: 1300 asrs r0, r0, #12 10002b4e: 4020 ands r0, r4 10002b50: 1380 asrs r0, r0, #14 10002b52: 4020 ands r0, r4 10002b54: 0000 movs r0, r0 10002b56: 4024 ands r4, r4 10002b58: 1500 asrs r0, r0, #20 10002b5a: 4026 ands r6, r4 10002b5c: 1544 asrs r4, r0, #21 10002b5e: 4026 ands r6, r4 10002b60: 151c asrs r4, r3, #20 10002b62: 4026 ands r6, r4 10002b64: 1524 asrs r4, r4, #20 10002b66: 4026 ands r6, r4 10002b68: 0008 movs r0, r1 10002b6a: 4020 ands r0, r4 10002b6c: 1008 asrs r0, r1, #32 10002b6e: 4020 ands r0, r4 10002b70: 1600 asrs r0, r0, #24 10002b72: 4026 ands r6, r4 10002b74: 1204 asrs r4, r0, #8 10002b76: 4026 ands r6, r4 10002b78 <..lin.213a04c1..8a59defe.0_4>: { HalCpuNop(); 10002b78: bf00 nop 10002b7a <..lin.213a04c1..8a59defe.0_5>: while (SRSS->unCLK_PLL_STATUS[0].stcField.u1LOCKED == 0ul) 10002b7a: 6820 ldr r0, [r4, #0] 10002b7c: 07c0 lsls r0, r0, #31 10002b7e: d5fb bpl.n 10002b78 <..lin.213a04c1..8a59defe.0_4> 10002b80 <..lin.213a04c1..8a59defe.0_6>: } // Assign PLL0 as the source of clk_hf0. // Select the source of clk_hf0. // Set the HF source, divider, enable. SRSS->unCLK_ROOT_SELECT[0/*clk_hf0*/].stcField.u4ROOT_MUX = CY_SYSCLK_HFCLK_IN_CLKPATH1; 10002b80: 6be8 ldr r0, [r5, #60] ; 0x3c 10002b82: 210f movs r1, #15 10002b84: 4388 bics r0, r1 10002b86: 2201 movs r2, #1 10002b88: 4310 orrs r0, r2 10002b8a: 63e8 str r0, [r5, #60] ; 0x3c SRSS->unCLK_ROOT_SELECT[0].stcField.u2ROOT_DIV = 0u; /* no div */ 10002b8c: 6be8 ldr r0, [r5, #60] ; 0x3c 10002b8e: 2130 movs r1, #48 ; 0x30 10002b90: 4388 bics r0, r1 10002b92: 63e8 str r0, [r5, #60] ; 0x3c SRSS->unCLK_ROOT_SELECT[0].stcField.u1ENABLE = 1u; /* 1 = enable */ 10002b94: 6be8 ldr r0, [r5, #60] ; 0x3c 10002b96: 07d1 lsls r1, r2, #31 10002b98: 4308 orrs r0, r1 10002b9a: 63e8 str r0, [r5, #60] ; 0x3c // Set the PATH2 source. SRSS->unCLK_PATH_SELECT[2].stcField.u3PATH_MUX = CY_SYSCLK_CLKPATH_IN_IMO; 10002b9c: 6868 ldr r0, [r5, #4] 10002b9e: 2207 movs r2, #7 10002ba0: 4390 bics r0, r2 10002ba2: 4a0d ldr r2, [pc, #52] ; (10002bd8 <..lin.213a04c1..8ff05ff6.0_7+0x2>) // Disable FLL. SRSS->unCLK_FLL_CONFIG.stcField.u1FLL_ENABLE = 0; /* 0 = disable */ 10002ba4: 6068 str r0, [r5, #4] 10002ba6: 6810 ldr r0, [r2, #0] 10002ba8: 4388 bics r0, r1 10002baa: 6010 str r0, [r2, #0] SRSS->unCLK_FLL_CONFIG4.stcField.u1CCO_ENABLE = 0; /* 0 = disable */ 10002bac: 4a0b ldr r2, [pc, #44] ; (10002bdc <..lin.213a04c1..8ff05ff6.0_7+0x6>) 10002bae: 6810 ldr r0, [r2, #0] 10002bb0: 4388 bics r0, r1 10002bb2: 6010 str r0, [r2, #0] // Enable ILO0. Cy_WDT_Unlock(); 10002bb4: f7ff fef2 bl 1000299c SRSS->unCLK_ILO0_CONFIG.stcField.u1ENABLE = 1; /* 1 = enable */ 10002bb8: 4a09 ldr r2, [pc, #36] ; (10002be0 <..lin.213a04c1..8ff05ff6.0_7+0xa>) 10002bba: 2101 movs r1, #1 10002bbc: 07c9 lsls r1, r1, #31 10002bbe: 6810 ldr r0, [r2, #0] 10002bc0: 4308 orrs r0, r1 10002bc2: 6010 str r0, [r2, #0] SRSS->unCLK_ILO0_CONFIG.stcField.u1ILO0_BACKUP = 1ul; /* Ilo HibernateOn */ 10002bc4: 6810 ldr r0, [r2, #0] 10002bc6: 2201 movs r2, #1 10002bc8: 4310 orrs r0, r2 10002bca: 4a05 ldr r2, [pc, #20] ; (10002be0 <..lin.213a04c1..8ff05ff6.0_7+0xa>) 10002bcc: 6010 str r0, [r2, #0] Cy_WDT_Lock(); 10002bce: f7ff fef5 bl 100029bc } 10002bd2: bd30 pop {r4, r5, pc} 10002bd4 <__HalCpuNop_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjsystem_tviibe2m_cm0plus_inf>: 10002bd4: e006 b.n 10002be4 <..lin.213a04c1..8ff05ff6.0_8> 10002bd6 <..lin.213a04c1..8ff05ff6.0_7>: 10002bd6: bf00 nop 10002bd8: 1530 asrs r0, r6, #20 10002bda: 4026 ands r6, r4 10002bdc: 153c asrs r4, r7, #20 10002bde: 4026 ands r6, r4 10002be0: 1508 asrs r0, r1, #20 10002be2: 4026 ands r6, r4 10002be4 <..lin.213a04c1..8ff05ff6.0_8>: 10002be4: bf00 nop 10002be6 <..lin.213a04c1..8ff05ff6.0_9>: 10002be6: 4770 bx lr 10002be8 : // Public functions definitions //============================================================================= void OsStartupHook(void) { return; 10002be8: 4770 bx lr 10002bea : } // PRQA S 1505 1 // not used at the moment beside EcuM module void EcuM_SBC_min_Init(void) { 10002bea: b530 push {r4, r5, lr} 10002bec: b088 sub sp, #32 uint16 unSpiRxData[7]; //SBC config unSpiTxData[0] = SPI_SBC_WRITE_FRAME (0x04U, 0x03U); 10002bee: 466a mov r2, sp 10002bf0: ac04 add r4, sp, #16 10002bf2: 4621 mov r1, r4 10002bf4: 20e1 movs r0, #225 ; 0xe1 //Write BUS_CTRL_0 register. Set CAN to 011 (normal mode). // PRQA S 303 1 // correct cast -comes from macro definition spi_transmit(e_active_config_SBC, &unSpiTxData[0], &unSpiRxData[0], 1U); 10002bf6: 0080 lsls r0, r0, #2 10002bf8: 8020 strh r0, [r4, #0] 10002bfa: 2301 movs r3, #1 10002bfc: 4618 mov r0, r3 10002bfe: f7ff fa7c bl 100020fa unSpiTxData[0] = SPI_SBC_WRITE_FRAME (0x02U, 0x04U); 10002c02: 4830 ldr r0, [pc, #192] ; (10002cc4 <..lin.9a78ffe2..9df85102.0_1+0x2>) 10002c04: 466a mov r2, sp //Write HW_CTRL_0 register. Set CP_EN to 1. // PRQA S 303 1 // correct cast -comes from macro definition spi_transmit(e_active_config_SBC, &unSpiTxData[0], &unSpiRxData[0], 1U); 10002c06: 4621 mov r1, r4 10002c08: 8020 strh r0, [r4, #0] 10002c0a: 2301 movs r3, #1 10002c0c: 4618 mov r0, r3 10002c0e: f7ff fa74 bl 100020fa unSpiTxData[0] = SPI_SBC_WRITE_FRAME(0x03U, 0x44U); 10002c12: 482d ldr r0, [pc, #180] ; (10002cc8 <..lin.9a78ffe2..9df85102.0_1+0x6>) 10002c14: 466a mov r2, sp //Write HW_CTRL_0 register. Set CP_EN to 1. // PRQA S 303 1 // correct cast -comes from macro definition spi_transmit(e_active_config_SBC, &unSpiTxData[0], &unSpiRxData[0], 1U); 10002c16: 4621 mov r1, r4 10002c18: 8020 strh r0, [r4, #0] 10002c1a: 2301 movs r3, #1 10002c1c: 4618 mov r0, r3 10002c1e: f7ff fa6c bl 100020fa //disable watchdog for all drivers for (idx = 0U; idx < 7U; idx++) 10002c22: 466a mov r2, sp 10002c24: 4621 mov r1, r4 10002c26: 2001 movs r0, #1 10002c28: 03c0 lsls r0, r0, #15 10002c2a: 8020 strh r0, [r4, #0] 10002c2c: ad05 add r5, sp, #20 10002c2e: 8060 strh r0, [r4, #2] 10002c30: 8028 strh r0, [r5, #0] 10002c32: 8068 strh r0, [r5, #2] 10002c34: 80a8 strh r0, [r5, #4] { unSpiTxData[idx] = SPI_BUCK_1_14_WRITE_FRAME(0x00U, 0x00U); } // PRQA S 303 1 // correct usage (comes from the definition of SCB) spi_transmit(e_active_config_BUCK, &unSpiTxData[0], &unSpiRxData[0], 7U); 10002c36: 80e8 strh r0, [r5, #6] 10002c38: 8128 strh r0, [r5, #8] 10002c3a: 2307 movs r3, #7 10002c3c: 2005 movs r0, #5 10002c3e: f7ff fa5c bl 100020fa //fill all registers with read status3 register request. for (idx = 0U; idx < 7U; idx++) 10002c42: 2005 movs r0, #5 10002c44: 0240 lsls r0, r0, #9 10002c46: 8020 strh r0, [r4, #0] 10002c48: 2108 movs r1, #8 10002c4a: 4620 mov r0, r4 10002c4c: f7ff fad9 bl 10002202 10002c50: 2005 movs r0, #5 10002c52: 0240 lsls r0, r0, #9 10002c54: 8060 strh r0, [r4, #2] 10002c56: 2108 movs r1, #8 10002c58: 1ca0 adds r0, r4, #2 10002c5a: f7ff fad2 bl 10002202 10002c5e: 2005 movs r0, #5 10002c60: 0240 lsls r0, r0, #9 10002c62: 8028 strh r0, [r5, #0] 10002c64: 2108 movs r1, #8 10002c66: 1d20 adds r0, r4, #4 10002c68: f7ff facb bl 10002202 10002c6c: 2005 movs r0, #5 10002c6e: 0240 lsls r0, r0, #9 10002c70: 8068 strh r0, [r5, #2] 10002c72: 2108 movs r1, #8 10002c74: 1da0 adds r0, r4, #6 10002c76: f7ff fac4 bl 10002202 10002c7a: 2005 movs r0, #5 10002c7c: ad06 add r5, sp, #24 10002c7e: 0240 lsls r0, r0, #9 10002c80: 8028 strh r0, [r5, #0] 10002c82: 2108 movs r1, #8 10002c84: 4620 mov r0, r4 10002c86: 3008 adds r0, #8 10002c88: f7ff fabb bl 10002202 10002c8c: 2005 movs r0, #5 10002c8e: 0240 lsls r0, r0, #9 10002c90: 8068 strh r0, [r5, #2] 10002c92: 2108 movs r1, #8 10002c94: 4620 mov r0, r4 10002c96: 300a adds r0, #10 10002c98: f7ff fab3 bl 10002202 10002c9c: 2005 movs r0, #5 10002c9e: ad07 add r5, sp, #28 10002ca0: 0240 lsls r0, r0, #9 10002ca2: 8028 strh r0, [r5, #0] 10002ca4: 2108 movs r1, #8 10002ca6: 4620 mov r0, r4 10002ca8: 300c adds r0, #12 10002caa: f7ff faaa bl 10002202 { unSpiTxData[idx] = SPI_BUCK_1_14_READ_FRAME(0x05); spi_set_parity_bit(&unSpiTxData[idx], 8U); } // PRQA S 303 1 // correct usage (comes from the definition of SCB) spi_transmit(e_active_config_BUCK, &unSpiTxData[0], &unSpiRxData[0], 7U); 10002cae: 466a mov r2, sp 10002cb0: 4621 mov r1, r4 10002cb2: 2307 movs r3, #7 10002cb4: 2005 movs r0, #5 10002cb6: f7ff fa20 bl 100020fa } 10002cba: b008 add sp, #32 10002cbc: bd30 pop {r4, r5, pc} 10002cbe : void EcuM_Init(void) { 10002cbe: b500 push {lr} // Already called from the startup code: // * Mcu_Init (), including Mcu_InitClock and Mcu_DistributePllClock // * Port_Init() is called from startup code. // * Wdg_Init () is called from startup code. HalIrqEnableAll(); 10002cc0: e004 b.n 10002ccc <..lin.9a78ffe2..9df85102.0_2> 10002cc2 <..lin.9a78ffe2..9df85102.0_1>: 10002cc2: bf00 nop 10002cc4: 0482 lsls r2, r0, #18 10002cc6: 0000 movs r0, r0 10002cc8: 4483 add fp, r0 ... 10002ccc <..lin.9a78ffe2..9df85102.0_2>: 10002ccc: b662 cpsie i 10002cce <..lin.9a78ffe2..9df85102.0_3>: // It should have 32-bit or 64-bit resolution running // at a frequency of 1MHz. The value of this counter // is to be returned from Gpt_GetTimeElapsed(). // PRQA S 303 1 // correct cast - comes from macro definition Gpt_Init(TCPWM0_GRP2_CNT0); 10002cce: 4807 ldr r0, [pc, #28] ; (10002cec <..lin.9a78ffe2..3151c14e.0_4+0x2>) 10002cd0: f7fe fe8a bl 100019e8 Adc_Init(NULL_PTR); 10002cd4: 2000 movs r0, #0 10002cd6: f7fd fc7f bl 100005d8 spi_init(); 10002cda: f7ff f8f6 bl 10001eca EcuM_SBC_min_Init(); 10002cde: f7ff ff84 bl 10002bea // Start the task scheduler. Appl_BmgRun(); 10002ce2: f000 f84f bl 10002d84 } 10002ce6: bd00 pop {pc} 10002ce8 <__HalIrqEnableAll_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjEcuM_inf>: #if defined(__cplusplus) extern "C" { #endif static inline void HalIrqEnableAll (void) { __ASM("cpsie i"); } 10002ce8: e002 b.n 10002cf0 <..lin.9a78ffe2..3151c14e.0_5> 10002cea <..lin.9a78ffe2..3151c14e.0_4>: 10002cea: bf00 nop 10002cec: 0000 movs r0, r0 10002cee: 4039 ands r1, r7 10002cf0 <..lin.9a78ffe2..3151c14e.0_5>: 10002cf0: b662 cpsie i 10002cf2 <..lin.9a78ffe2..3151c14e.0_6>: 10002cf2: 4770 bx lr 10002cf4 : static volatile uint8_t SBC_WD_TRIGGER = 1U; // PRQA S 1505 2 // not used at the moment // PRQA S 3408 1 // It is actually being declared using macros void Appl_BmgJumpToApplication(void) { 10002cf4: b500 push {lr} //Chage value of CM0P_SCS_VTOR //PRQA S 306 1 //used as an adress uint32* CM0P_SCS_VTOR = (uint32*) ((uint32) 0xE000ED08UL); *CM0P_SCS_VTOR = BMG_INTVECT_START_ADDR; 10002cf6: 490d ldr r1, [pc, #52] ; (10002d2c <..lin.9a770525..2a2cf4c1.0_2+0x2>) 10002cf8: 480d ldr r0, [pc, #52] ; (10002d30 <..lin.9a770525..2a2cf4c1.0_2+0x6>) 10002cfa: 6008 str r0, [r1, #0] //lint -e611 Suspicious cast... //lint -e740 Unusual pointer cast (incompatible indirect types)... //Jump to startup code starting address. LSB must be set to b1 to signal the ARM CortexM0+ core we are using the thumb instruction set. ((function_type) (BMG_START_ADDR | 0x1U))(); // PRQA S 305 1 // Cast from uint32 to function pointer type is required. 10002cfc: 480d ldr r0, [pc, #52] ; (10002d34 <..lin.9a770525..2a2cf4c1.0_2+0xa>) 10002cfe: 4780 blx r0 } 10002d00: bd00 pop {pc} 10002d02 <__set_listen_window_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjAppl_inf>: // PRQA S 5324 1 // architecture } static void set_listen_window(void) { 10002d02: b5f0 push {r4, r5, r6, r7, lr} 10002d04: 4f0c ldr r7, [pc, #48] ; (10002d38 <..lin.9a770525..2a2cf4c1.0_2+0xe>) 10002d06: 44bd add sp, r7 uint32_t Opcode = 0x05000100; // Write Row: Opcode[31:24] 0x05; 10002d08: 24f9 movs r4, #249 ; 0xf9 // PRQA S 4440 1 bool status = TRUE; /*Prepare the TOC2 area copy in SRAM, 512 bytes*/ const int32_t TOC2_FLAGS_IDX = 126; /* An index for TOC2_FLAGS in toc2buf[] */ uint32_t TOC2_ADDR = 0x17007C00; /* TOC2 Area Start Address */ 10002d0a: 34ff adds r4, #255 ; 0xff uint32_t toc2buf[512 / 4]; // PRQA S 306 1 (void)memcpy((void *)toc2buf, (const void *)TOC2_ADDR, 512); 10002d0c: 4e0b ldr r6, [pc, #44] ; (10002d3c <..lin.9a770525..2a2cf4c1.0_2+0x12>) 10002d0e: 2201 movs r2, #1 10002d10: 0252 lsls r2, r2, #9 10002d12: 4631 mov r1, r6 10002d14: a804 add r0, sp, #16 10002d16: f7fd fbce bl 100004b6 10002d1a: 4a09 ldr r2, [pc, #36] ; (10002d40 <..lin.9a770525..2a2cf4c1.0_2+0x16>) if (toc2buf[TOC2_FLAGS_IDX] != toc2_data) 10002d1c: 4d09 ldr r5, [pc, #36] ; (10002d44 <..lin.9a770525..2a2cf4c1.0_2+0x1a>) 10002d1e: 9982 ldr r1, [sp, #520] ; 0x208 10002d20: a804 add r0, sp, #16 10002d22: 4291 cmp r1, r2 10002d24: d02b beq.n 10002d7e <..lin.9a770525..2a2cf4c1.0_5+0xc> 10002d26 <..lin.9a770525..2a2cf4c1.0_1>: { toc2buf[TOC2_FLAGS_IDX] = toc2_data; /* 0x000002CE */ 10002d26: 5102 str r2, [r0, r4] 10002d28: e00e b.n 10002d48 <..lin.9a770525..2a2cf4c1.0_3> 10002d2a <..lin.9a770525..2a2cf4c1.0_2>: 10002d2a: bf00 nop 10002d2c: ed08 e000 stc 0, cr14, [r8, #-0] 10002d30: 0000 movs r0, r0 10002d32: 1001 asrs r1, r0, #32 10002d34: e641 b.n 100029ba 10002d36: 1020 asrs r0, r4, #32 10002d38: fdf0 ffff ldc2l 15, cr15, [r0, #1020]! ; 0x3fc 10002d3c: 7c00 ldrb r0, [r0, #16] 10002d3e: 1700 asrs r0, r0, #28 10002d40: 02ce lsls r6, r1, #11 10002d42: 0000 movs r0, r0 10002d44: 0100 lsls r0, r0, #4 10002d46: 0500 lsls r0, r0, #20 10002d48 <..lin.9a770525..2a2cf4c1.0_3>: uint32_t scratch_buffer[4]; //scratch_buffer __enable_irq(); /* Enable global interrupts. */ 10002d48: b662 cpsie i 10002d4a <..lin.9a770525..2a2cf4c1.0_4>: scratch_buffer[0] = Opcode; 10002d4a: 9500 str r5, [sp, #0] scratch_buffer[1] = 0; 10002d4c: 2100 movs r1, #0 scratch_buffer[2] = TOC2_ADDR; // PRQA S 306 1 scratch_buffer[3] = (uint32_t)&toc2buf[0]; 10002d4e: a801 add r0, sp, #4 10002d50: af04 add r7, sp, #16 10002d52: c0c2 stmia r0!, {r1, r6, r7} // PRQA S 303 1 FLASHC_FM_CTL_ECT->unMAIN_FLASH_SAFETY.stcField.u1MAINFLASHWRITEENABLE = 0x1U; // Enable Main Flash Write 10002d54: 4a57 ldr r2, [pc, #348] ; (10002eb4 <__ghs_eofn_SBC_disable_watchdog>) 10002d56: 6810 ldr r0, [r2, #0] 10002d58: 2201 movs r2, #1 10002d5a: 4310 orrs r0, r2 10002d5c: 4a55 ldr r2, [pc, #340] ; (10002eb4 <__ghs_eofn_SBC_disable_watchdog>) 10002d5e: 2101 movs r1, #1 // PRQA S 306 1 (void)Cy_IPC_Drv_SendMsgWord(Cy_IPC_Drv_GetIpcBaseAddress(USED_IPC_CHANNEL), ((uint32_t)1U << IPC_NOTIFY_INT_NUMBER), (uint32_t)&scratch_buffer[0U]); 10002d60: 6010 str r0, [r2, #0] 10002d62: 4855 ldr r0, [pc, #340] ; (10002eb8 <__ghs_eofn_SBC_disable_watchdog+0x4>) 10002d64: 466a mov r2, sp 10002d66: f001 fc60 bl 1000462a /* Wait until the CM0+ executes the System API and release the lock. */ do 10002d6a: 4953 ldr r1, [pc, #332] ; (10002eb8 <__ghs_eofn_SBC_disable_watchdog+0x4>) { status = Cy_IPC_Drv_IsLockAcquired(Cy_IPC_Drv_GetIpcBaseAddress(USED_IPC_CHANNEL)); } while (status); 10002d6c: 69c8 ldr r0, [r1, #28] 10002d6e: 2800 cmp r0, #0 10002d70: d4fc bmi.n 10002d6c <..lin.9a770525..2a2cf4c1.0_4+0x22> 10002d72 <..lin.9a770525..2a2cf4c1.0_5>: // PRQA S 303 1 FLASHC_FM_CTL_ECT->unMAIN_FLASH_SAFETY.stcField.u1MAINFLASHWRITEENABLE = 0x0U; // Disable Main Flash Write 10002d72: 4950 ldr r1, [pc, #320] ; (10002eb4 <__ghs_eofn_SBC_disable_watchdog>) 10002d74: 6808 ldr r0, [r1, #0] 10002d76: 2101 movs r1, #1 10002d78: 4388 bics r0, r1 10002d7a: 494e ldr r1, [pc, #312] ; (10002eb4 <__ghs_eofn_SBC_disable_watchdog>) 10002d7c: 6008 str r0, [r1, #0] } } 10002d7e: 4f4f ldr r7, [pc, #316] ; (10002ebc <__ghs_eofn_SBC_disable_watchdog+0x8>) 10002d80: 44bd add sp, r7 10002d82: bdf0 pop {r4, r5, r6, r7, pc} 10002d84 : { 10002d84: b510 push {r4, lr} 10002d86: b083 sub sp, #12 set_listen_window(); 10002d88: f7ff ffbb bl 10002d02 <__set_listen_window_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjAppl_inf> ShaData.MountingSide = EcuMountingSide_UNKNOWN.Code; 10002d8c: 494c ldr r1, [pc, #304] ; (10002ec0 <__ghs_eofn_SBC_disable_watchdog+0xc>) 10002d8e: 680c ldr r4, [r1, #0] 10002d90: 494c ldr r1, [pc, #304] ; (10002ec4 <__ghs_eofn_SBC_disable_watchdog+0x10>) 10002d92: 600c str r4, [r1, #0] Bmg_BootStatus_detection(); 10002d94: f000 fdde bl 10003954 if (Bmg_BootStatus_isVbatValid() != 0u) 10002d98: f000 ff4a bl 10003c30 10002d9c: 2800 cmp r0, #0 10002d9e: d00e beq.n 10002dbe <..lin.9a770525..6189e69c.0_8+0x4> 10002da0 <..lin.9a770525..6189e69c.0_6>: if (Bmg_BootStatus_isMountingSideLeft() != 0u) 10002da0: f000 ff4e bl 10003c40 10002da4: 2800 cmp r0, #0 10002da6: d011 beq.n 10002dcc <..lin.9a770525..6189e69c.0_10> 10002da8 <..lin.9a770525..6189e69c.0_7>: ShaData.MountingSide = EcuMountingSide_LEFT.Code; 10002da8: 4947 ldr r1, [pc, #284] ; (10002ec8 <__ghs_eofn_SBC_disable_watchdog+0x14>) 10002daa: 6808 ldr r0, [r1, #0] 10002dac: 4945 ldr r1, [pc, #276] ; (10002ec4 <__ghs_eofn_SBC_disable_watchdog+0x10>) 10002dae: 6008 str r0, [r1, #0] 10002db0: f000 ff56 bl 10003c60 10002db4: 2800 cmp r0, #0 10002db6: d015 beq.n 10002de4 <..lin.9a770525..6189e69c.0_12> 10002db8: e005 b.n 10002dc6 <..lin.9a770525..6189e69c.0_9> 10002dba <..lin.9a770525..6189e69c.0_8>: ShaData.MountingSide = EcuMountingSide_UNKNOWN.Code; 10002dba: 4942 ldr r1, [pc, #264] ; (10002ec4 <__ghs_eofn_SBC_disable_watchdog+0x10>) 10002dbc: 600c str r4, [r1, #0] if (Bmg_BootStatus_waitForRAMAppl() != 0u) 10002dbe: f000 ff4f bl 10003c60 10002dc2: 2800 cmp r0, #0 10002dc4: d00e beq.n 10002de4 <..lin.9a770525..6189e69c.0_12> 10002dc6 <..lin.9a770525..6189e69c.0_9>: OsStartOs(); 10002dc6: f001 fb7f bl 100044c8 } 10002dca: e7fe b.n 10002dca <..lin.9a770525..6189e69c.0_9+0x4> 10002dcc <..lin.9a770525..6189e69c.0_10>: else if (Bmg_BootStatus_isMountingSideRight() != 0u) 10002dcc: f000 ff40 bl 10003c50 10002dd0: 2800 cmp r0, #0 10002dd2: d0f2 beq.n 10002dba <..lin.9a770525..6189e69c.0_8> 10002dd4 <..lin.9a770525..6189e69c.0_11>: ShaData.MountingSide = EcuMountingSide_RIGHT.Code; 10002dd4: 493d ldr r1, [pc, #244] ; (10002ecc <__ghs_eofn_SBC_disable_watchdog+0x18>) 10002dd6: 6808 ldr r0, [r1, #0] 10002dd8: 493a ldr r1, [pc, #232] ; (10002ec4 <__ghs_eofn_SBC_disable_watchdog+0x10>) 10002dda: 6008 str r0, [r1, #0] 10002ddc: f000 ff40 bl 10003c60 10002de0: 2800 cmp r0, #0 10002de2: d1f0 bne.n 10002dc6 <..lin.9a770525..6189e69c.0_9> 10002de4 <..lin.9a770525..6189e69c.0_12>: Appl_BmgJumpToApplication(); 10002de4: 493a ldr r1, [pc, #232] ; (10002ed0 <__ghs_eofn_SBC_disable_watchdog+0x1c>) 10002de6: 483b ldr r0, [pc, #236] ; (10002ed4 <__ghs_eofn_SBC_disable_watchdog+0x20>) 10002de8: 6008 str r0, [r1, #0] 10002dea: 483b ldr r0, [pc, #236] ; (10002ed8 <__ghs_eofn_SBC_disable_watchdog+0x24>) 10002dec: 4780 blx r0 while(1) {;} 10002dee: e7fe b.n 10002dee <..lin.9a770525..6189e69c.0_12+0xa> 10002df0 : } 10002df0: 4770 bx lr 10002df2 : { 10002df2: b500 push {lr} 10002df4: b082 sub sp, #8 10002df6: 4839 ldr r0, [pc, #228] ; (10002edc <__ghs_eofn_SBC_disable_watchdog+0x28>) SBC_WD_TRIGGER = (1U - SBC_WD_TRIGGER); 10002df8: 2301 movs r3, #1 10002dfa: aa01 add r2, sp, #4 10002dfc: 7801 ldrb r1, [r0, #0] 10002dfe: 1a59 subs r1, r3, r1 unSpiTxData[0] = SPI_SBC_WRITE_FRAME (0x03U, 0x44U); 10002e00: 7001 strb r1, [r0, #0] 10002e02: 4837 ldr r0, [pc, #220] ; (10002ee0 <__ghs_eofn_SBC_disable_watchdog+0x2c>) 10002e04: 4669 mov r1, sp spi_transmit(e_active_config_SBC, &unSpiTxData[0], &unSpiRxData[0], 1U); 10002e06: 8008 strh r0, [r1, #0] 10002e08: 4618 mov r0, r3 10002e0a: f7ff f976 bl 100020fa } 10002e0e: b002 add sp, #8 10002e10: bd00 pop {pc} 10002e12 : { 10002e12: b500 push {lr} Appl_WaitForLoginService = TimerStart(APPL_WAIT_FOR_LOGIN_SERVICE); 10002e14: 2000 movs r0, #0 10002e16: f7fe fe50 bl 10001aba 10002e1a: 4932 ldr r1, [pc, #200] ; (10002ee4 <__ghs_eofn_SBC_disable_watchdog+0x30>) 10002e1c: 4a32 ldr r2, [pc, #200] ; (10002ee8 <__ghs_eofn_SBC_disable_watchdog+0x34>) 10002e1e: 1840 adds r0, r0, r1 10002e20: 6010 str r0, [r2, #0] } 10002e22: bd00 pop {pc} 10002e24 : { 10002e24: b500 push {lr} 10002e26: b085 sub sp, #20 if( ComBuf_RxRequestReceived( APPL_USED_COMBUF_ID ) == TRUE ) 10002e28: 2000 movs r0, #0 10002e2a: f000 f8e5 bl 10002ff8 10002e2e: 2801 cmp r0, #1 10002e30: d118 bne.n 10002e64 <..lin.9a770525..3e1df0f0.0_15+0x10> 10002e32 <..lin.9a770525..3e1df0f0.0_14>: ComBuf_TxReset( APPL_USED_COMBUF_ID ); 10002e32: 2000 movs r0, #0 10002e34: f000 f948 bl 100030c8 ComBuf_GetMsgContext (APPL_USED_COMBUF_ID, 0U, &ucSID, &MsgContext ); 10002e38: ab01 add r3, sp, #4 10002e3a: 1e5a subs r2, r3, #1 10002e3c: 2100 movs r1, #0 10002e3e: 4608 mov r0, r1 10002e40: f000 f966 bl 10003110 ResponseCode = AppCmd_Execute(ucSID, 0U, &MsgContext); 10002e44: 4669 mov r1, sp 10002e46: 78c8 ldrb r0, [r1, #3] 10002e48: aa01 add r2, sp, #4 10002e4a: 2100 movs r1, #0 10002e4c: f000 ff1a bl 10003c84 if( ResponseCode != 0u ) 10002e50: 1e02 subs r2, r0, #0 10002e52: d004 beq.n 10002e5e <..lin.9a770525..3e1df0f0.0_15+0xa> 10002e54 <..lin.9a770525..3e1df0f0.0_15>: ComBuf_TxNegResp( APPL_USED_COMBUF_ID, ucSID, ResponseCode ); 10002e54: 466b mov r3, sp 10002e56: 78d9 ldrb r1, [r3, #3] 10002e58: 2000 movs r0, #0 10002e5a: f000 f8d4 bl 10003006 ComBuf_TxSend( APPL_USED_COMBUF_ID ); 10002e5e: 2000 movs r0, #0 10002e60: f000 f948 bl 100030f4 if ((boLoginActivated == FALSE) && (TimerTimeout(Appl_WaitForLoginService) == 0u)) 10002e64: 4921 ldr r1, [pc, #132] ; (10002eec <__ghs_eofn_SBC_disable_watchdog+0x38>) 10002e66: 7808 ldrb r0, [r1, #0] 10002e68: 2800 cmp r0, #0 10002e6a: d101 bne.n 10002e70 <..lin.9a770525..3e1df0f0.0_16> 10002e6c: f7fe fe25 bl 10001aba 10002e70 <..lin.9a770525..3e1df0f0.0_16>: } 10002e70: b005 add sp, #20 10002e72: bd00 pop {pc} 10002e74 : void SBC_disable_watchdog(void) { 10002e74: b510 push {r4, lr} 10002e76: b082 sub sp, #8 uint16 unSpiTxData[2]; uint16 unSpiRxData[2]; OsDisableTask(TASK_SBCWdTrigger_INDEX); 10002e78: 2003 movs r0, #3 10002e7a: f001 fbaf bl 100045dc //Write WK_CTRL_0 register. Set WD_STM_EN_1 to 1. // PRQA S 303 1 // correct cast -comes from macro definition unSpiTxData[0] = SPI_SBC_WRITE_FRAME (0x06U, 0x04U); 10002e7e: aa01 add r2, sp, #4 10002e80: 481b ldr r0, [pc, #108] ; (10002ef0 <__ghs_eofn_SBC_disable_watchdog+0x3c>) 10002e82: 466c mov r4, sp spi_transmit(e_active_config_SBC, &unSpiTxData[0], &unSpiRxData[0], 1U); 10002e84: 4621 mov r1, r4 10002e86: 8020 strh r0, [r4, #0] 10002e88: 2301 movs r3, #1 10002e8a: 4618 mov r0, r3 10002e8c: f7ff f935 bl 100020fa //Write WD_CTRL register. Set WD_STM_EN_0 to 1, WD_EN_WK_BUS to 0, WD_TIMER to 100 (200ms) . // PRQA S 303 1 // correct cast -comes from macro definition unSpiTxData[0] = SPI_SBC_WRITE_FRAME (0x03U, 0x44U); 10002e90: 4813 ldr r0, [pc, #76] ; (10002ee0 <__ghs_eofn_SBC_disable_watchdog+0x2c>) 10002e92: aa01 add r2, sp, #4 spi_transmit(e_active_config_SBC, &unSpiTxData[0], &unSpiRxData[0], 1U); 10002e94: 4669 mov r1, sp 10002e96: 8020 strh r0, [r4, #0] 10002e98: 2301 movs r3, #1 10002e9a: 4618 mov r0, r3 10002e9c: f7ff f92d bl 100020fa //Write M_S_CTRL register. Change SBC to Stop Mode // PRQA S 303 1 // correct cast -comes from macro definition unSpiTxData[0] = SPI_SBC_WRITE_FRAME (0x01U, 0x80U); 10002ea0: 4814 ldr r0, [pc, #80] ; (10002ef4 <__ghs_eofn_SBC_disable_watchdog+0x40>) 10002ea2: aa01 add r2, sp, #4 spi_transmit(e_active_config_SBC, &unSpiTxData[0], &unSpiRxData[0], 1U); 10002ea4: 4669 mov r1, sp 10002ea6: 8020 strh r0, [r4, #0] 10002ea8: 2301 movs r3, #1 10002eaa: 4618 mov r0, r3 10002eac: f7ff f925 bl 100020fa // clear dev stat //unSpiTxData[0] = SPI_SBC_WRITE_FRAME (0x43U, 0x00U); //spi_transmit(e_active_config_SBC, &unSpiTxData[0], &unSpiRxData[0], 1U); } 10002eb0: b002 add sp, #8 10002eb2: bd10 pop {r4, pc} 10002eb4 <__ghs_eofn_SBC_disable_watchdog>: 10002eb4: f400 4024 and.w r0, r0, #41984 ; 0xa400 10002eb8: 0000 movs r0, r0 10002eba: 4022 ands r2, r4 10002ebc: 0210 lsls r0, r2, #8 10002ebe: 0000 movs r0, r0 10002ec0: 662c str r4, [r5, #96] ; 0x60 10002ec2: 1000 asrs r0, r0, #32 10002ec4: 0804 lsrs r4, r0, #32 10002ec6: 0800 lsrs r0, r0, #32 10002ec8: 6624 str r4, [r4, #96] ; 0x60 10002eca: 1000 asrs r0, r0, #32 10002ecc: 6628 str r0, [r5, #96] ; 0x60 10002ece: 1000 asrs r0, r0, #32 10002ed0: ed08 e000 stc 0, cr14, [r8, #-0] 10002ed4: 0000 movs r0, r0 10002ed6: 1001 asrs r1, r0, #32 10002ed8: e641 b.n 10002b5e <..lin.213a04c1..8a59defe.0_3+0x18> 10002eda: 1020 asrs r0, r4, #32 10002edc: 171c asrs r4, r3, #28 10002ede: 0800 lsrs r0, r0, #32 10002ee0: 4483 add fp, r0 10002ee2: 0000 movs r0, r0 10002ee4: 0d40 lsrs r0, r0, #21 10002ee6: 0003 movs r3, r0 10002ee8: 0a5c lsrs r4, r3, #9 10002eea: 0800 lsrs r0, r0, #32 10002eec: 174c asrs r4, r1, #29 10002eee: 0800 lsrs r0, r0, #32 10002ef0: 0486 lsls r6, r0, #18 10002ef2: 0000 movs r0, r0 10002ef4: 8081 strh r1, [r0, #4] ... 10002ef8 : // PRQA S 3408 1 // It is actually being declared using macros uint32 ApplCmd_AlFlasher_Crc32_Vector_AUTOSAR(const uint8* Crc_DataPtr, uint32 Crc_Length, uint32 Crc_StartValue32, boolean Crc_IsFirstCall) { 10002ef8: b530 push {r4, r5, lr} 0xBAD03605uL, 0xCDD70693uL, 0x54DE5729uL, 0x23D967BFuL, 0xB3667A2EuL, 0xC4614AB8uL, 0x5D681B02uL, 0x2A6F2B94uL, 0xB40BBE37uL, 0xC30C8EA1uL, 0x5A05DF1BuL, 0x2D02EF8DuL }; uint32 Crc_Value = ((Crc_IsFirstCall == TRUE) ? CRC_INITIAL_VALUE32 10002efa: 2b01 cmp r3, #1 10002efc: d003 beq.n 10002f06 10002efe: 43d4 mvns r4, r2 10002f00: 08cb lsrs r3, r1, #3 10002f02: d040 beq.n 10002f86 <..lin.6d648589..1915db63.0_1+0x7c> 10002f04: e003 b.n 10002f0e <..lin.6d648589..1915db63.0_1+0x4> 10002f06: 2400 movs r4, #0 10002f08: 43e4 mvns r4, r4 10002f0a <..lin.6d648589..1915db63.0_1>: : (CRC_FINAL_XOR_CRC32 ^ Crc_StartValue32)); for(uint32 Crc_LoopCounter = 0U; Crc_LoopCounter < Crc_Length; ++Crc_LoopCounter) 10002f0a: 08cb lsrs r3, r1, #3 10002f0c: d03b beq.n 10002f86 <..lin.6d648589..1915db63.0_1+0x7c> 10002f0e: 4a26 ldr r2, [pc, #152] ; (10002fa8 <__ghs_eofn_ApplCmd_SignalRunRamApplication>) 10002f10: 7805 ldrb r5, [r0, #0] 10002f12: 406c eors r4, r5 10002f14: 0a25 lsrs r5, r4, #8 10002f16: b2e4 uxtb r4, r4 10002f18: 00a4 lsls r4, r4, #2 10002f1a: 58a4 ldr r4, [r4, r2] 10002f1c: 406c eors r4, r5 10002f1e: 7845 ldrb r5, [r0, #1] 10002f20: 406c eors r4, r5 10002f22: 0a25 lsrs r5, r4, #8 10002f24: b2e4 uxtb r4, r4 10002f26: 00a4 lsls r4, r4, #2 10002f28: 58a4 ldr r4, [r4, r2] 10002f2a: 406c eors r4, r5 10002f2c: 7885 ldrb r5, [r0, #2] 10002f2e: 406c eors r4, r5 10002f30: 0a25 lsrs r5, r4, #8 10002f32: b2e4 uxtb r4, r4 10002f34: 00a4 lsls r4, r4, #2 10002f36: 58a4 ldr r4, [r4, r2] 10002f38: 406c eors r4, r5 10002f3a: 78c5 ldrb r5, [r0, #3] 10002f3c: 406c eors r4, r5 10002f3e: 0a25 lsrs r5, r4, #8 10002f40: b2e4 uxtb r4, r4 10002f42: 00a4 lsls r4, r4, #2 10002f44: 58a4 ldr r4, [r4, r2] 10002f46: 406c eors r4, r5 10002f48: 7905 ldrb r5, [r0, #4] 10002f4a: 406c eors r4, r5 10002f4c: 0a25 lsrs r5, r4, #8 10002f4e: b2e4 uxtb r4, r4 10002f50: 00a4 lsls r4, r4, #2 10002f52: 58a4 ldr r4, [r4, r2] 10002f54: 406c eors r4, r5 10002f56: 7945 ldrb r5, [r0, #5] 10002f58: 406c eors r4, r5 10002f5a: 0a25 lsrs r5, r4, #8 10002f5c: b2e4 uxtb r4, r4 10002f5e: 00a4 lsls r4, r4, #2 10002f60: 58a4 ldr r4, [r4, r2] 10002f62: 406c eors r4, r5 10002f64: 7985 ldrb r5, [r0, #6] 10002f66: 406c eors r4, r5 10002f68: 0a25 lsrs r5, r4, #8 10002f6a: b2e4 uxtb r4, r4 10002f6c: 00a4 lsls r4, r4, #2 10002f6e: 58a4 ldr r4, [r4, r2] 10002f70: 406c eors r4, r5 10002f72: 79c5 ldrb r5, [r0, #7] 10002f74: 406c eors r4, r5 10002f76: 0a25 lsrs r5, r4, #8 10002f78: b2e4 uxtb r4, r4 10002f7a: 00a4 lsls r4, r4, #2 10002f7c: 58a4 ldr r4, [r4, r2] 10002f7e: 406c eors r4, r5 10002f80: 3008 adds r0, #8 10002f82: 3b01 subs r3, #1 10002f84: d1c4 bne.n 10002f10 <..lin.6d648589..1915db63.0_1+0x6> 10002f86: 0749 lsls r1, r1, #29 10002f88: 0f49 lsrs r1, r1, #29 10002f8a: d00a beq.n 10002fa2 <..lin.6d648589..1915db63.0_2> 10002f8c: 4b06 ldr r3, [pc, #24] ; (10002fa8 <__ghs_eofn_ApplCmd_SignalRunRamApplication>) 10002f8e: 7802 ldrb r2, [r0, #0] 10002f90: 4054 eors r4, r2 10002f92: 0a22 lsrs r2, r4, #8 10002f94: b2e4 uxtb r4, r4 10002f96: 00a4 lsls r4, r4, #2 10002f98: 58e4 ldr r4, [r4, r3] 10002f9a: 4054 eors r4, r2 10002f9c: 3001 adds r0, #1 10002f9e: 3901 subs r1, #1 10002fa0: d1f5 bne.n 10002f8e <..lin.6d648589..1915db63.0_1+0x84> 10002fa2 <..lin.6d648589..1915db63.0_2>: Crc_Value ^= 0xFFuL & (uint32) Crc_DataPtr[Crc_LoopCounter]; Crc_Value = ( Crc_Value >> 8u ) ^ ( Crc_Table32 [(uint8)(Crc_Value )]); } /* #40 Final CRC value is XORed */ return Crc_Value ^ CRC_FINAL_XOR_CRC32; 10002fa2: 43e0 mvns r0, r4 10002fa4: bd30 pop {r4, r5, pc} 10002fa6 : // PRQA S 3408 1 // It is actually being declared using macros void ApplCmd_SignalRunRamApplication(void) { // PRQA S 5334 1 // no implementation needed at the moment } 10002fa6: 4770 bx lr 10002fa8 <__ghs_eofn_ApplCmd_SignalRunRamApplication>: 10002fa8: 6630 str r0, [r6, #96] ; 0x60 10002faa: 1000 asrs r0, r0, #32 10002fac : uint8_t Cmd_Pb21Dummy(MsgContextType * const pMsgContext) { // PRQA S 3112 1 // parameter not used at the moment (void) pMsgContext; return 0U; 10002fac: 2000 movs r0, #0 10002fae: 4770 bx lr 10002fb0 : } // PRQA S 3408 1 uint8_t Cmd_0x50_ChangeCanSpeed(MsgContextType * const pMsgContext) { 10002fb0: b510 push {r4, lr} 10002fb2: 4604 mov r4, r0 if (pMsgContext->reqData[0] == 0U) 10002fb4: 6801 ldr r1, [r0, #0] 10002fb6: 7809 ldrb r1, [r1, #0] 10002fb8: 2900 cmp r1, #0 10002fba: d104 bne.n 10002fc6 <..lin.f190a457..18c86ced.0_1+0xa> 10002fbc <..lin.f190a457..18c86ced.0_1>: { Can_ChangeSpeed(CAN_SPEED_500K); 10002fbc: 4805 ldr r0, [pc, #20] ; (10002fd4 <__ghs_eofn_Cmd_0x50_ChangeCanSpeed>) 10002fbe: f7fe fc81 bl 100018c4 10002fc2: 6821 ldr r1, [r4, #0] 10002fc4: 7809 ldrb r1, [r1, #0] } if (pMsgContext->reqData[0] == 1U) 10002fc6: 2901 cmp r1, #1 10002fc8: d102 bne.n 10002fd0 <..lin.f190a457..18c86ced.0_2+0x6> 10002fca <..lin.f190a457..18c86ced.0_2>: { Can_ChangeSpeed(CAN_SPEED_1M); 10002fca: 4803 ldr r0, [pc, #12] ; (10002fd8 <__ghs_eofn_Cmd_0x50_ChangeCanSpeed+0x4>) 10002fcc: f7fe fc7a bl 100018c4 } return 0U; 10002fd0: 2000 movs r0, #0 10002fd2: bd10 pop {r4, pc} 10002fd4 <__ghs_eofn_Cmd_0x50_ChangeCanSpeed>: 10002fd4: a120 add r1, pc, #128 ; (adr r1, 10003058 <..lin.18e2d2d4..44975ccc.0_4+0x4>) 10002fd6: 0007 movs r7, r0 10002fd8: 4240 negs r0, r0 10002fda: 000f movs r7, r1 10002fdc : /// \return void //----------------------------------------------------------------------------- // PRQA S 3408 1 // It is actually being declared using macros void* DiagR_GetVirtData_OsSystemCounter(uint32* pulSize) { 10002fdc: b530 push {r4, r5, lr} 10002fde: 4605 mov r5, r0 10002fe0: 4c04 ldr r4, [pc, #16] ; (10002ff4 <__ghs_eofn_DiagR_GetVirtData_OsSystemCounter+0x2>) Gpt_tySystemTick = Gpt_GetTimeElapsed(0U); 10002fe2: 2000 movs r0, #0 10002fe4: f7fe fd69 bl 10001aba 10002fe8: 6020 str r0, [r4, #0] *pulSize = sizeof(Gpt_tySystemTick); 10002fea: 2004 movs r0, #4 10002fec: 6028 str r0, [r5, #0] //PRQA S 312 1 return (void*)(&Gpt_tySystemTick); 10002fee: 4620 mov r0, r4 10002ff0: bd30 pop {r4, r5, pc} 10002ff2 <__ghs_eofn_DiagR_GetVirtData_OsSystemCounter>: 10002ff2: bf00 nop 10002ff4: 0a60 lsrs r0, r4, #9 10002ff6: 0800 lsrs r0, r0, #32 10002ff8 : /// /// \return boolean //----------------------------------------------------------------------------- boolean ComBuf_RxRequestReceived(ComBufID bufID ) { boolean ret = comBuf[bufID].requestReceived; 10002ff8: 4971 ldr r1, [pc, #452] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 10002ffa: 7808 ldrb r0, [r1, #0] if ( ret == TRUE) 10002ffc: 2801 cmp r0, #1 10002ffe: d101 bne.n 10003004 <..lin.18e2d2d4..32678fba.0_1+0x4> 10003000 <..lin.18e2d2d4..32678fba.0_1>: { comBuf[bufID].requestReceived = FALSE; 10003000: 2200 movs r2, #0 10003002: 700a strb r2, [r1, #0] } return ret; 10003004: 4770 bx lr 10003006 : /// \param NegCode /// /// \return void //----------------------------------------------------------------------------- void ComBuf_TxNegResp( ComBufID bufID, uint8 ucSID, uint8 NegCode ) { 10003006: b510 push {r4, lr} comBuf[bufID].pduTxMessage.SduLength = 3u; 10003008: 486d ldr r0, [pc, #436] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 1000300a: 2303 movs r3, #3 1000300c: 8103 strh r3, [r0, #8] comBuf[bufID].pduTxMessage.SduDataPtr[0] = 0x7Fu; 1000300e: 6843 ldr r3, [r0, #4] 10003010: 247f movs r4, #127 ; 0x7f 10003012: 701c strb r4, [r3, #0] comBuf[bufID].pduTxMessage.SduDataPtr[1] = ucSID; 10003014: 6843 ldr r3, [r0, #4] 10003016: 7059 strb r1, [r3, #1] comBuf[bufID].pduTxMessage.SduDataPtr[2] = NegCode; 10003018: 6840 ldr r0, [r0, #4] 1000301a: 7082 strb r2, [r0, #2] } 1000301c: bd10 pop {r4, pc} 1000301e : //----------------------------------------------------------------------------- void ComBuf_TxPosResp( ComBufID bufID, uint8_t cmdLevel, uint8 ucSID, MsgContextType *pMsgContext ) { // PRQA S 3112 1 // parameter not used at the moment (void) ucSID; if (cmdLevel == 0U) 1000301e: 4a68 ldr r2, [pc, #416] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 10003020: 2900 cmp r1, #0 10003022: d002 beq.n 1000302a 10003024: 8910 ldrh r0, [r2, #8] 10003026: 3001 adds r0, #1 10003028: e007 b.n 1000303a <..lin.18e2d2d4..7fbbeab8.0_2+0x8> 1000302a: 6851 ldr r1, [r2, #4] 1000302c: 7808 ldrb r0, [r1, #0] 1000302e: 3040 adds r0, #64 ; 0x40 10003030: 7008 strb r0, [r1, #0] 10003032 <..lin.18e2d2d4..7fbbeab8.0_2>: { comBuf[bufID].pduTxMessage.SduDataPtr[cmdLevel] +=0x40U; comBuf[bufID].pduTxMessage.SduLength += pMsgContext->resDataLen ; 10003032: 8910 ldrh r0, [r2, #8] 10003034: 8999 ldrh r1, [r3, #12] 10003036: 1840 adds r0, r0, r1 } comBuf[bufID].pduTxMessage.SduLength += 1U; 10003038: 3001 adds r0, #1 } 1000303a: 8110 strh r0, [r2, #8] 1000303c: 4770 bx lr 1000303e : /// \return void //----------------------------------------------------------------------------- void ComBuf_RxIndication( ComBufID bufID, NotifResultType Result ) { /*if the request has failed, stop processing and free resources*/ if (Result != NTFRSLT_OK) 1000303e: 4860 ldr r0, [pc, #384] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 10003040: 2900 cmp r1, #0 10003042: 7e82 ldrb r2, [r0, #26] 10003044: d004 beq.n 10003050 <..lin.18e2d2d4..44975ccc.0_3+0x6> 10003046: 2a00 cmp r2, #0 10003048: d007 beq.n 1000305a <..lin.18e2d2d4..44975ccc.0_4+0x6> 1000304a <..lin.18e2d2d4..44975ccc.0_3>: { /* >> GAN:2008-02-06 In case any concurrent message is received here, block it*/ if (comBuf[bufID].rxBufferState != NO_CONCURRENT_REQUEST ) { comBuf[bufID].rxBufferState = NO_CONCURRENT_REQUEST; 1000304a: 2100 movs r1, #0 1000304c: 7681 strb r1, [r0, #26] 1000304e: e004 b.n 1000305a <..lin.18e2d2d4..44975ccc.0_4+0x6> 10003050: 2a01 cmp r2, #1 10003052: d100 bne.n 10003056 <..lin.18e2d2d4..44975ccc.0_4+0x2> 10003054 <..lin.18e2d2d4..44975ccc.0_4>: } else { if(comBuf[bufID].rxBufferState == CONCURRENT_REQUEST ) { comBuf[bufID].rxBufferState = NO_CONCURRENT_REQUEST; 10003054: 7681 strb r1, [r0, #26] } comBuf[bufID].requestReceived = TRUE; // Command received 10003056: 2101 movs r1, #1 10003058: 7001 strb r1, [r0, #0] } } 1000305a: 4770 bx lr 1000305c : //============================================================================= void ComBuf_TxConfirmation( ComBufID bufID, NotifResultType Result ) { // PRQA S 3112 1 // parameter not used at the moment (void)Result; comBuf[bufID].txBufferState = NO_CONCURRENT_REQUEST; // free the Tx-buffer (Dcm_PduTxMessage) 1000305c: 4958 ldr r1, [pc, #352] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 1000305e: 2000 movs r0, #0 10003060: 7388 strb r0, [r1, #14] } 10003062: 4770 bx lr 10003064 : /// /// \return BufReq_ReturnType //----------------------------------------------------------------------------- // PRQA S 1503 1 // not used at the moment BufReq_ReturnType ComBuf_TxProvide(ComBufID bufID, PduInfoTypeComBufPtr* PduInfoPtr) { 10003064: b530 push {r4, r5, lr} 10003066: 4605 mov r5, r0 BufReq_ReturnType ret = BUFREQ_E_NOT_OK; 10003068: 4b55 ldr r3, [pc, #340] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) if( comBuf[bufID].txBufferState == NO_CONCURRENT_REQUEST ) 1000306a: 2001 movs r0, #1 1000306c: 7b9c ldrb r4, [r3, #14] 1000306e: 2c00 cmp r4, #0 10003070: d109 bne.n 10003086 <..lin.18e2d2d4..8686cf45.0_5+0x14> 10003072 <..lin.18e2d2d4..8686cf45.0_5>: { comBuf[bufID].txBufferState = CONCURRENT_REQUEST; 10003072: 7398 strb r0, [r3, #14] comBuf[bufID].pduTxMessage.SduLength = comBuf[bufID].txBufferSize; 10003074: 8998 ldrh r0, [r3, #12] 10003076: 8118 strh r0, [r3, #8] *PduInfoPtr = &comBuf[bufID].pduTxMessage; 10003078: 00ea lsls r2, r5, #3 1000307a: 1b50 subs r0, r2, r5 1000307c: 0080 lsls r0, r0, #2 1000307e: 1818 adds r0, r3, r0 10003080: 3004 adds r0, #4 10003082: 6008 str r0, [r1, #0] ret = BUFREQ_OK; 10003084: 4620 mov r0, r4 } return ret; 10003086: bd30 pop {r4, r5, pc} 10003088 : /// \param PduInfoPtr /// /// \return BufReq_ReturnType //----------------------------------------------------------------------------- BufReq_ReturnType ComBuf_RxProvide( ComBufID bufID, PduInfoTypeComBufPtr* PduInfoPtr ) { 10003088: b530 push {r4, r5, lr} 1000308a: 4605 mov r5, r0 BufReq_ReturnType ret = BUFREQ_E_NOT_OK; 1000308c: 4b4c ldr r3, [pc, #304] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) if( comBuf[bufID].rxBufferState == NO_CONCURRENT_REQUEST) 1000308e: 2001 movs r0, #1 10003090: 7e9c ldrb r4, [r3, #26] 10003092: 2c00 cmp r4, #0 10003094: d109 bne.n 100030aa <..lin.18e2d2d4..9d8ded43.0_6+0x14> 10003096 <..lin.18e2d2d4..9d8ded43.0_6>: { comBuf[bufID].rxBufferState = CONCURRENT_REQUEST; 10003096: 7698 strb r0, [r3, #26] comBuf[bufID].pduRxMessage.SduLength = comBuf[bufID].rxBufferSize; 10003098: 8b18 ldrh r0, [r3, #24] 1000309a: 8298 strh r0, [r3, #20] *PduInfoPtr = &comBuf[bufID].pduRxMessage; 1000309c: 00ea lsls r2, r5, #3 1000309e: 1b50 subs r0, r2, r5 100030a0: 0080 lsls r0, r0, #2 100030a2: 1818 adds r0, r3, r0 100030a4: 3010 adds r0, #16 100030a6: 6008 str r0, [r1, #0] ret = BUFREQ_OK; 100030a8: 4620 mov r0, r4 } return ret; 100030aa: bd30 pop {r4, r5, pc} 100030ac : /// \return PduInfoTypeComBufPtr //----------------------------------------------------------------------------- // PRQA S 1503 1 // not used at the moment PduInfoTypeComBufPtr ComBuf_RxGetBuffer( ComBufID bufID ) { return &comBuf[bufID].pduRxMessage; 100030ac: 00c1 lsls r1, r0, #3 100030ae: 1a08 subs r0, r1, r0 100030b0: 4943 ldr r1, [pc, #268] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 100030b2: 0080 lsls r0, r0, #2 100030b4: 1808 adds r0, r1, r0 100030b6: 3010 adds r0, #16 100030b8: 4770 bx lr 100030ba : /// \return PduInfoTypeComBufPtr //----------------------------------------------------------------------------- // PRQA S 1503 1 // not used at the moment PduInfoTypeComBufPtr ComBuf_TxGetBuffer( ComBufID bufID ) { return &comBuf[bufID].pduTxMessage; 100030ba: 00c1 lsls r1, r0, #3 100030bc: 1a08 subs r0, r1, r0 100030be: 4940 ldr r1, [pc, #256] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 100030c0: 0080 lsls r0, r0, #2 100030c2: 1808 adds r0, r1, r0 100030c4: 3004 adds r0, #4 100030c6: 4770 bx lr 100030c8 : // Public functions definition //============================================================================= void ComBuf_TxReset( ComBufID bufID ) { comBuf[bufID].pduTxMessage.SduLength = 0; 100030c8: 493d ldr r1, [pc, #244] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 100030ca: 2000 movs r0, #0 100030cc: 8108 strh r0, [r1, #8] } 100030ce: 4770 bx lr 100030d0 : /// \return uint8_t //----------------------------------------------------------------------------- // PRQA S 1503 1 // not used at the moment uint16 ComBuf_TxAdd (ComBufID bufID, const uint8_t data ) { if (comBuf[bufID].pduTxMessage.SduLength < comBuf[bufID].txBufferSize) 100030d0: 4a3b ldr r2, [pc, #236] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 100030d2: 8993 ldrh r3, [r2, #12] 100030d4: 8910 ldrh r0, [r2, #8] 100030d6: 4298 cmp r0, r3 100030d8: d205 bcs.n 100030e6 <..lin.18e2d2d4..45b34675.0_7+0xc> 100030da <..lin.18e2d2d4..45b34675.0_7>: { comBuf[bufID].pduTxMessage.SduDataPtr[comBuf[bufID].pduTxMessage.SduLength] = data; 100030da: 6853 ldr r3, [r2, #4] 100030dc: 5419 strb r1, [r3, r0] comBuf[bufID].pduTxMessage.SduLength++; 100030de: 8910 ldrh r0, [r2, #8] 100030e0: 3001 adds r0, #1 100030e2: 8110 strh r0, [r2, #8] 100030e4: b280 uxth r0, r0 } return comBuf[bufID].pduTxMessage.SduLength; 100030e6: 4770 bx lr 100030e8 : /// \return uint16_t //----------------------------------------------------------------------------- // PRQA S 1503 1 // not used at the moment uint16 ComBuf_TxGetBufferSize (ComBufID bufID) { return comBuf[bufID].txBufferSize; 100030e8: 4935 ldr r1, [pc, #212] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 100030ea: 8988 ldrh r0, [r1, #12] 100030ec: 4770 bx lr 100030ee : /// \return uint16_t //----------------------------------------------------------------------------- // PRQA S 1503 1 // not used at the moment uint16 ComBuf_RxGetBufferSize (ComBufID bufID) { return comBuf[bufID].rxBufferSize; 100030ee: 4934 ldr r1, [pc, #208] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 100030f0: 8b08 ldrh r0, [r1, #24] 100030f2: 4770 bx lr 100030f4 : /// \param bufID /// /// \return void //----------------------------------------------------------------------------- void ComBuf_TxSend( ComBufID bufID ) { 100030f4: b510 push {r4, lr} Std_ReturnType rslt; // send response rslt = CanTp_Transmit( &comBuf[bufID].pduTxMessage ); 100030f6: 4c32 ldr r4, [pc, #200] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 100030f8: 00c1 lsls r1, r0, #3 100030fa: 1a08 subs r0, r1, r0 100030fc: 0080 lsls r0, r0, #2 100030fe: 1820 adds r0, r4, r0 10003100: 3004 adds r0, #4 10003102: f000 f866 bl 100031d2 if( rslt != E_OK ) 10003106: 2800 cmp r0, #0 10003108: d001 beq.n 1000310e <..lin.18e2d2d4..fc25f9d6.0_8+0x4> 1000310a <..lin.18e2d2d4..fc25f9d6.0_8>: { /*sending was not possible */ ComBuf_TxConfirmation(bufID, NTFRSLT_E_NOT_OK ); 1000310a: 2000 movs r0, #0 1000310c: 73a0 strb r0, [r4, #14] } } 1000310e: bd10 pop {r4, pc} 10003110 : /// \param pMsgContext /// /// \return void //----------------------------------------------------------------------------- void ComBuf_GetMsgContext ( ComBufID bufID, uint8_t cmdLevel, uint8_t *ucSID, MsgContextType *pMsgContext ) { 10003110: b5f0 push {r4, r5, r6, r7, lr} pMsgContext->reqData = &(comBuf[bufID].pduRxMessage.SduDataPtr[cmdLevel + 1U]); 10003112: 482b ldr r0, [pc, #172] ; (100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>) 10003114: 8a86 ldrh r6, [r0, #20] 10003116: 6905 ldr r5, [r0, #16] 10003118: 186c adds r4, r5, r1 1000311a: 3401 adds r4, #1 pMsgContext->reqDataLen = comBuf[bufID].pduRxMessage.SduLength - ((uint16)cmdLevel + 1U); 1000311c: 601c str r4, [r3, #0] 1000311e: 1c4c adds r4, r1, #1 10003120: 1b36 subs r6, r6, r4 10003122: 809e strh r6, [r3, #4] pMsgContext->reqDataSize = comBuf[bufID].rxBufferSize - ((uint16)cmdLevel + 1U); 10003124: 8b06 ldrh r6, [r0, #24] 10003126: 1b36 subs r6, r6, r4 10003128: 80de strh r6, [r3, #6] pMsgContext->resData = &(comBuf[bufID].pduTxMessage.SduDataPtr[cmdLevel + 1U]); 1000312a: 6846 ldr r6, [r0, #4] 1000312c: 1877 adds r7, r6, r1 1000312e: 3701 adds r7, #1 10003130: 609f str r7, [r3, #8] pMsgContext->resDataLen = 0; 10003132: 2700 movs r7, #0 10003134: 819f strh r7, [r3, #12] pMsgContext->resDataSize = comBuf[bufID].txBufferSize - ((uint16)cmdLevel + 1U); 10003136: 8987 ldrh r7, [r0, #12] 10003138: 1b3c subs r4, r7, r4 1000313a: 81dc strh r4, [r3, #14] comBuf[bufID].pduTxMessage.SduDataPtr[cmdLevel] = comBuf[bufID].pduRxMessage.SduDataPtr[cmdLevel]; 1000313c: 5c6b ldrb r3, [r5, r1] 1000313e: 5473 strb r3, [r6, r1] *ucSID = comBuf[bufID].pduRxMessage.SduDataPtr[cmdLevel]; 10003140: 6900 ldr r0, [r0, #16] 10003142: 5c40 ldrb r0, [r0, r1] 10003144: 7010 strb r0, [r2, #0] } 10003146: bdf0 pop {r4, r5, r6, r7, pc} 10003148 : /// \return uint16 //----------------------------------------------------------------------------- // PRQA S 1503 1 // not used at the moment uint16 ComBuf_AddToMsgContext (MsgContextType *pMsgContext, const uint8_t data ) { if (pMsgContext->resDataLen < pMsgContext->resDataSize) //size guard 10003148: 8982 ldrh r2, [r0, #12] 1000314a: 89c3 ldrh r3, [r0, #14] 1000314c: 429a cmp r2, r3 1000314e: d205 bcs.n 1000315c <..lin.18e2d2d4..1ed7ad58.0_9+0xc> 10003150 <..lin.18e2d2d4..1ed7ad58.0_9>: { pMsgContext->resData[pMsgContext->resDataLen] = data; 10003150: 6883 ldr r3, [r0, #8] 10003152: 5499 strb r1, [r3, r2] pMsgContext->resDataLen++; 10003154: 8982 ldrh r2, [r0, #12] 10003156: 3201 adds r2, #1 10003158: 8182 strh r2, [r0, #12] 1000315a: b292 uxth r2, r2 } return pMsgContext->resDataLen; 1000315c: 4610 mov r0, r2 1000315e: 4770 bx lr 10003160 : /// /// \return uint16 //----------------------------------------------------------------------------- // PRQA S 1503 1 // not used at the moment uint16 ComBuf_AddToMsgContextMultiByte (MsgContextType *pMsgContext, const uint8_t *pData, uint16 unLen, boolean boMotorolaByteOrder) { 10003160: b5f0 push {r4, r5, r6, r7, lr} uint16 unIdx; uint8 ucByte; if ((pMsgContext->resDataLen + unLen) < pMsgContext->resDataSize) //size guard 10003162: 8984 ldrh r4, [r0, #12] 10003164: 89c6 ldrh r6, [r0, #14] 10003166: 18a5 adds r5, r4, r2 10003168: 42b5 cmp r5, r6 1000316a: da27 bge.n 100031bc <..lin.18e2d2d4..dbaad2d7.0_12> 1000316c <..lin.18e2d2d4..dbaad2d7.0_10>: { for(unIdx = 0u; unIdx< unLen; unIdx++) 1000316c: 2500 movs r5, #0 1000316e: 4295 cmp r5, r2 10003170: d224 bcs.n 100031bc <..lin.18e2d2d4..dbaad2d7.0_12> 10003172: 2b01 cmp r3, #1 10003174: d10d bne.n 10003192 <..lin.18e2d2d4..dbaad2d7.0_10+0x26> 10003176: 1e56 subs r6, r2, #1 10003178: 1b73 subs r3, r6, r5 1000317a: 6887 ldr r7, [r0, #8] 1000317c: 5ccb ldrb r3, [r1, r3] 1000317e: 553b strb r3, [r7, r4] 10003180: 8984 ldrh r4, [r0, #12] 10003182: 3401 adds r4, #1 10003184: 8184 strh r4, [r0, #12] 10003186: b2a4 uxth r4, r4 10003188: 3501 adds r5, #1 1000318a: b2ad uxth r5, r5 1000318c: 4295 cmp r5, r2 1000318e: d3f3 bcc.n 10003178 <..lin.18e2d2d4..dbaad2d7.0_10+0xc> 10003190: e014 b.n 100031bc <..lin.18e2d2d4..dbaad2d7.0_12> 10003192: 6886 ldr r6, [r0, #8] 10003194: 5d4b ldrb r3, [r1, r5] 10003196: 5533 strb r3, [r6, r4] 10003198: 8984 ldrh r4, [r0, #12] 1000319a: 3401 adds r4, #1 1000319c: 8184 strh r4, [r0, #12] 1000319e: b2a4 uxth r4, r4 100031a0: 2501 movs r5, #1 100031a2: 4295 cmp r5, r2 100031a4: d20a bcs.n 100031bc <..lin.18e2d2d4..dbaad2d7.0_12> 100031a6 <..lin.18e2d2d4..dbaad2d7.0_11>: { ucByte = pData[unLen - 1u - unIdx]; } else { ucByte = pData[unIdx]; 100031a6: 6886 ldr r6, [r0, #8] } pMsgContext->resData[pMsgContext->resDataLen] = ucByte; 100031a8: 5d4b ldrb r3, [r1, r5] 100031aa: 5533 strb r3, [r6, r4] pMsgContext->resDataLen++; 100031ac: 8984 ldrh r4, [r0, #12] 100031ae: 3401 adds r4, #1 100031b0: 8184 strh r4, [r0, #12] 100031b2: b2a4 uxth r4, r4 for(unIdx = 0u; unIdx< unLen; unIdx++) 100031b4: 3501 adds r5, #1 100031b6: b2ad uxth r5, r5 100031b8: 4295 cmp r5, r2 100031ba: d3f4 bcc.n 100031a6 <..lin.18e2d2d4..dbaad2d7.0_11> 100031bc <..lin.18e2d2d4..dbaad2d7.0_12>: } } return pMsgContext->resDataLen; 100031bc: 4620 mov r0, r4 100031be: bdf0 pop {r4, r5, r6, r7, pc} 100031c0 <__ghs_eofn_ComBuf_AddToMsgContextMultiByte>: 100031c0: 1720 asrs r0, r4, #28 100031c2: 0800 lsrs r0, r0, #32 100031c4 : //============================================================================= // Public functions definition //============================================================================= void CanTp_RxIndication(PduIdType CanTpRxPduId, const PduInfoType* pData) { 100031c4: b500 push {lr} 100031c6: 460a mov r2, r1 // PRQA S 3112 1 // parameter not used at the moment (void)CanTpRxPduId; ISO15765Receive((uint8*)pData->SduDataPtr, (uint16)pData->SduLength); 100031c8: 8889 ldrh r1, [r1, #4] 100031ca: 6810 ldr r0, [r2, #0] 100031cc: f000 f9f3 bl 100035b6 } 100031d0: bd00 pop {pc} 100031d2 : /// /// \return Std_ReturnType //----------------------------------------------------------------------------- // this is called by the upper layer to transmit data Std_ReturnType CanTp_Transmit(const PduInfoType* pData) { 100031d2: b500 push {lr} return (ISO15765Send((uint8*)pData->SduDataPtr, (uint16)pData->SduLength) == TRUE) ? NTFRSLT_OK : NTFRSLT_E_NOT_OK; 100031d4: 8881 ldrh r1, [r0, #4] 100031d6: 6800 ldr r0, [r0, #0] 100031d8: f000 f890 bl 100032fc 100031dc: 3801 subs r0, #1 100031de: d000 beq.n 100031e2 <..lin.e97395ee..2257710c.0_1> 100031e0: 2001 movs r0, #1 100031e2 <..lin.e97395ee..2257710c.0_1>: 100031e2: bd00 pop {pc} 100031e4 : ------------------------------------------------------------------------------------------------ Misc : **************************************************************************************************/ // PRQA S 3408 1 // It is actually being declared using macros void TaskCanTp_Init(void) { 100031e4: b500 push {lr} ISO15765Init(); 100031e6: f000 f805 bl 100031f4 } 100031ea: bd00 pop {pc} 100031ec : ------------------------------------------------------------------------------------------------ Misc : **************************************************************************************************/ // PRQA S 3408 1 // It is actually being declared using macros void TaskCanTp_Func(void) { 100031ec: b500 push {lr} #if (CFG_OPT_SYSLOAD & (CFG_SysLoad_ISRLoad | CFG_SysLoad_TaskLoad | CFG_SysLoad_SystemLoad)) SYS_LOAD_RTA_TASK_BEGIN(TaskId_rpCanTp_Func) #endif ISO15765TimerService(); 100031ee: f000 fb27 bl 10003840 #if (CFG_OPT_SYSLOAD & (CFG_SysLoad_ISRLoad | CFG_SysLoad_TaskLoad | CFG_SysLoad_SystemLoad)) SYS_LOAD_RTA_TASK_END(TaskId_rpCanTp_Func) #endif } 100031f2: bd00 pop {pc} 100031f4 : /// \param - /// /// \return void //----------------------------------------------------------------------------- void ISO15765Init(void) { 100031f4: b500 push {lr} 100031f6: 48dd ldr r0, [pc, #884] ; (1000356c <..lin.b3bcf38b..e317d5cc.0_12+0x1c>) uCF_DL = 0; 100031f8: 2100 movs r1, #0 100031fa: 7241 strb r1, [r0, #9] uCF_STmin = STmin; 100031fc: 7281 strb r1, [r0, #10] uCF_BS = BS; 100031fe: 8001 strh r1, [r0, #0] // init timer (void)memset(arTimers, 0, sizeof(TTIMER) * MAX_TIMERS); 10003200: 48db ldr r0, [pc, #876] ; (10003570 <..lin.b3bcf38b..e317d5cc.0_12+0x20>) 10003202: 2109 movs r1, #9 10003204: f001 fa5e bl 100046c4 <__gh_memclr32> } 10003208: bd00 pop {pc} 1000320a <__LowerSend_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: /// \param - /// /// \return boolean //----------------------------------------------------------------------------- static boolean LowerSend(uint8* data, uint16 length) { 1000320a: b530 push {r4, r5, lr} 1000320c: b082 sub sp, #8 1000320e: 4604 mov r4, r0 10003210: 460d mov r5, r1 uint8 buf[BUFFER_SIZE] = { 0 }; 10003212: 4bd8 ldr r3, [pc, #864] ; (10003574 <..lin.b3bcf38b..e317d5cc.0_12+0x24>) 10003214: cb03 ldmia r3!, {r0, r1} 10003216: 2208 movs r2, #8 10003218: 9101 str r1, [sp, #4] #ifdef PADDING // clear buffer (void)memset(buf, (int)PADDING_BYTE, BUFFER_SIZE); 1000321a: 9000 str r0, [sp, #0] 1000321c: 2155 movs r1, #85 ; 0x55 1000321e: 4668 mov r0, sp 10003220: f7fd f932 bl 10000488 #endif #if defined(EXT_ADR) // use extended addressing buf[0] = EXT_ADR_TRG; 10003224: 462a mov r2, r5 10003226: 466b mov r3, sp 10003228: 20f1 movs r0, #241 ; 0xf1 (void)memcpy(&buf[1], data, length); 1000322a: 7018 strb r0, [r3, #0] 1000322c: 4621 mov r1, r4 1000322e: 1c58 adds r0, r3, #1 10003230: f7fd f941 bl 100004b6 #else // normal addressing (void)memcpy(buf, data, length); #endif SEND_OVER_COMMUNICATION_BUS(buf); 10003234: 4669 mov r1, sp 10003236: 2001 movs r0, #1 10003238: f7fd fcc2 bl 10000bc0 return TRUE; 1000323c: 2001 movs r0, #1 1000323e: b002 add sp, #8 10003240: bd30 pop {r4, r5, pc} 10003242 <__ISO15765TimerStart_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: { 10003242: b5f0 push {r4, r5, r6, r7, lr} 10003244: 4605 mov r5, r0 10003246: 460e mov r6, r1 boolean boRet = FALSE; 10003248: 4cc9 ldr r4, [pc, #804] ; (10003570 <..lin.b3bcf38b..e317d5cc.0_12+0x20>) for (i = 0; i < MAX_TIMERS; i++) 1000324a: 2000 movs r0, #0 1000324c: 8823 ldrh r3, [r4, #0] 1000324e: 42ab cmp r3, r5 10003250: d10a bne.n 10003268 <__ISO15765TimerStart_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf+0x26> 10003252: f7fe fc32 bl 10001aba 10003256: 00b1 lsls r1, r6, #2 10003258: 1a76 subs r6, r6, r1 1000325a: 0149 lsls r1, r1, #5 1000325c: 1876 adds r6, r6, r1 1000325e: 00f6 lsls r6, r6, #3 10003260: 1830 adds r0, r6, r0 10003262: 6060 str r0, [r4, #4] 10003264: 2001 movs r0, #1 10003266: e048 b.n 100032fa <..lin.b3bcf38b..d518a458.0_2+0x2> 10003268: 89a1 ldrh r1, [r4, #12] 1000326a: 42a9 cmp r1, r5 1000326c: d10a bne.n 10003284 <__ISO15765TimerStart_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf+0x42> 1000326e: f7fe fc24 bl 10001aba 10003272: 00b1 lsls r1, r6, #2 10003274: 1a76 subs r6, r6, r1 10003276: 0149 lsls r1, r1, #5 10003278: 1876 adds r6, r6, r1 1000327a: 00f6 lsls r6, r6, #3 1000327c: 1830 adds r0, r6, r0 1000327e: 6120 str r0, [r4, #16] 10003280: 2001 movs r0, #1 10003282: e03a b.n 100032fa <..lin.b3bcf38b..d518a458.0_2+0x2> 10003284: 4617 mov r7, r2 10003286: 8b22 ldrh r2, [r4, #24] 10003288: 42aa cmp r2, r5 1000328a: d10a bne.n 100032a2 <..lin.b3bcf38b..d518a458.0_1> 1000328c: f7fe fc15 bl 10001aba 10003290: 00b1 lsls r1, r6, #2 10003292: 1a76 subs r6, r6, r1 10003294: 0149 lsls r1, r1, #5 10003296: 1876 adds r6, r6, r1 10003298: 00f6 lsls r6, r6, #3 1000329a: 1830 adds r0, r6, r0 1000329c: 61e0 str r0, [r4, #28] 1000329e: 2001 movs r0, #1 100032a0: e02b b.n 100032fa <..lin.b3bcf38b..d518a458.0_2+0x2> 100032a2 <..lin.b3bcf38b..d518a458.0_1>: for (i = 0; i < MAX_TIMERS; i++) 100032a2: 2b00 cmp r3, #0 100032a4: d10c bne.n 100032c0 <..lin.b3bcf38b..d518a458.0_1+0x1e> 100032a6: f7fe fc08 bl 10001aba 100032aa: 00b1 lsls r1, r6, #2 100032ac: 1a76 subs r6, r6, r1 100032ae: 0149 lsls r1, r1, #5 100032b0: 1876 adds r6, r6, r1 100032b2: 00f6 lsls r6, r6, #3 100032b4: 1830 adds r0, r6, r0 100032b6: 6060 str r0, [r4, #4] 100032b8: 60a7 str r7, [r4, #8] 100032ba: 8025 strh r5, [r4, #0] 100032bc: 2001 movs r0, #1 100032be: e01c b.n 100032fa <..lin.b3bcf38b..d518a458.0_2+0x2> 100032c0: 2900 cmp r1, #0 100032c2: d10c bne.n 100032de <..lin.b3bcf38b..d518a458.0_1+0x3c> 100032c4: f7fe fbf9 bl 10001aba 100032c8: 00b1 lsls r1, r6, #2 100032ca: 1a76 subs r6, r6, r1 100032cc: 0149 lsls r1, r1, #5 100032ce: 1876 adds r6, r6, r1 100032d0: 00f6 lsls r6, r6, #3 100032d2: 1830 adds r0, r6, r0 100032d4: 6120 str r0, [r4, #16] 100032d6: 6167 str r7, [r4, #20] 100032d8: 81a5 strh r5, [r4, #12] 100032da: 2001 movs r0, #1 100032dc: e00d b.n 100032fa <..lin.b3bcf38b..d518a458.0_2+0x2> 100032de: 2a00 cmp r2, #0 100032e0: d10b bne.n 100032fa <..lin.b3bcf38b..d518a458.0_2+0x2> 100032e2: f7fe fbea bl 10001aba 100032e6: 6227 str r7, [r4, #32] 100032e8: 00b1 lsls r1, r6, #2 100032ea: 1a76 subs r6, r6, r1 100032ec: 0149 lsls r1, r1, #5 100032ee: 1876 adds r6, r6, r1 100032f0: 00f6 lsls r6, r6, #3 100032f2: 1830 adds r0, r6, r0 100032f4: 61e0 str r0, [r4, #28] 100032f6: 8325 strh r5, [r4, #24] 100032f8 <..lin.b3bcf38b..d518a458.0_2>: 100032f8: 2001 movs r0, #1 return boRet; 100032fa: bdf0 pop {r4, r5, r6, r7, pc} 100032fc : { 100032fc: b5f0 push {r4, r5, r6, r7, lr} 100032fe: b086 sub sp, #24 10003300: 4607 mov r7, r0 if (length > 4095U) 10003302: 489d ldr r0, [pc, #628] ; (10003578 <..lin.b3bcf38b..e317d5cc.0_12+0x28>) 10003304: 4281 cmp r1, r0 10003306: d901 bls.n 1000330c <..lin.b3bcf38b..b749802.0_3+0x4> 10003308 <..lin.b3bcf38b..b749802.0_3>: boRet = FALSE; 10003308: 2000 movs r0, #0 1000330a: e072 b.n 100033f2 <..lin.b3bcf38b..b749802.0_6+0x84> 1000330c: 460e mov r6, r1 1000330e <..lin.b3bcf38b..b749802.0_4>: else if (length <= SF_DATALENGTH) 1000330e: 2e06 cmp r6, #6 10003310: 4639 mov r1, r7 10003312: d82c bhi.n 1000336e <..lin.b3bcf38b..b749802.0_6> 10003314 <..lin.b3bcf38b..b749802.0_5>: arCF_Frame[0] = (NPCI_SINGLE_FRAME | ((uint8)length & 0x0FU)); 10003314: 4d99 ldr r5, [pc, #612] ; (1000357c <..lin.b3bcf38b..e317d5cc.0_12+0x2c>) 10003316: 0730 lsls r0, r6, #28 10003318: 0f00 lsrs r0, r0, #28 1000331a: 7028 strb r0, [r5, #0] (void)memcpy(&arCF_Frame[1], data, length); 1000331c: 4632 mov r2, r6 1000331e: 1c68 adds r0, r5, #1 10003320: f7fd f8c9 bl 100004b6 boRet = LOWER_TRANSMIT(arCF_Frame, length + 1U); 10003324: 4993 ldr r1, [pc, #588] ; (10003574 <..lin.b3bcf38b..e317d5cc.0_12+0x24>) 10003326: ac04 add r4, sp, #16 10003328: 2208 movs r2, #8 1000332a: 7808 ldrb r0, [r1, #0] 1000332c: 7020 strb r0, [r4, #0] 1000332e: 7848 ldrb r0, [r1, #1] 10003330: 7060 strb r0, [r4, #1] 10003332: 7888 ldrb r0, [r1, #2] 10003334: 70a0 strb r0, [r4, #2] 10003336: 78c8 ldrb r0, [r1, #3] 10003338: 70e0 strb r0, [r4, #3] 1000333a: 7908 ldrb r0, [r1, #4] 1000333c: 7120 strb r0, [r4, #4] 1000333e: 7948 ldrb r0, [r1, #5] 10003340: 7160 strb r0, [r4, #5] 10003342: 7988 ldrb r0, [r1, #6] 10003344: 71a0 strb r0, [r4, #6] 10003346: 79c8 ldrb r0, [r1, #7] 10003348: 71e0 strb r0, [r4, #7] 1000334a: 2155 movs r1, #85 ; 0x55 1000334c: 4620 mov r0, r4 1000334e: f7fd f89b bl 10000488 10003352: 20f1 movs r0, #241 ; 0xf1 10003354: 1c72 adds r2, r6, #1 10003356: b292 uxth r2, r2 10003358: 7020 strb r0, [r4, #0] 1000335a: 4629 mov r1, r5 1000335c: 1c60 adds r0, r4, #1 1000335e: f7fd f8aa bl 100004b6 10003362: 4621 mov r1, r4 10003364: 2001 movs r0, #1 10003366: f7fd fc2b bl 10000bc0 1000336a: 2001 movs r0, #1 1000336c: e041 b.n 100033f2 <..lin.b3bcf38b..b749802.0_6+0x84> 1000336e <..lin.b3bcf38b..b749802.0_6>: { 1000336e: 4d7f ldr r5, [pc, #508] ; (1000356c <..lin.b3bcf38b..e317d5cc.0_12+0x1c>) buf[0] = (NPCI_FIRST_FRAME | ((uint8)(length >> 8U) & 0x0FU)); 10003370: 0530 lsls r0, r6, #20 10003372: 0f00 lsrs r0, r0, #28 10003374: 2210 movs r2, #16 10003376: ac02 add r4, sp, #8 10003378: 4310 orrs r0, r2 1000337a: 7020 strb r0, [r4, #0] buf[1] = (uint8)length; 1000337c: 7066 strb r6, [r4, #1] (void)memcpy(&buf[2], data, FF_DATALENGTH); 1000337e: 1ca0 adds r0, r4, #2 10003380: 2205 movs r2, #5 10003382: f7fd f898 bl 100004b6 (void)memcpy(&arCF_Frame[0], data, length); 10003386: 487d ldr r0, [pc, #500] ; (1000357c <..lin.b3bcf38b..e317d5cc.0_12+0x2c>) 10003388: 4632 mov r2, r6 1000338a: 4639 mov r1, r7 1000338c: f7fd f893 bl 100004b6 uCF_SN = 1U; // init sequence number 10003390: 2001 movs r0, #1 10003392: 7128 strb r0, [r5, #4] uCF_DL = FF_DATALENGTH; // FF data length 10003394: 2005 movs r0, #5 10003396: 8028 strh r0, [r5, #0] uCF_BScnt = 0U; // init block counter 10003398: 2000 movs r0, #0 1000339a: 7168 strb r0, [r5, #5] uCF_Size = length; // init length 1000339c: 806e strh r6, [r5, #2] if ((LOWER_TRANSMIT(buf, FF_DATALENGTH + 2U)) == TRUE) 1000339e: 4975 ldr r1, [pc, #468] ; (10003574 <..lin.b3bcf38b..e317d5cc.0_12+0x24>) 100033a0: 466d mov r5, sp 100033a2: 2208 movs r2, #8 100033a4: 7808 ldrb r0, [r1, #0] 100033a6: 7028 strb r0, [r5, #0] 100033a8: 7848 ldrb r0, [r1, #1] 100033aa: 7068 strb r0, [r5, #1] 100033ac: 7888 ldrb r0, [r1, #2] 100033ae: 70a8 strb r0, [r5, #2] 100033b0: 78c8 ldrb r0, [r1, #3] 100033b2: 70e8 strb r0, [r5, #3] 100033b4: 7908 ldrb r0, [r1, #4] 100033b6: 7128 strb r0, [r5, #4] 100033b8: 7948 ldrb r0, [r1, #5] 100033ba: 7168 strb r0, [r5, #5] 100033bc: 7988 ldrb r0, [r1, #6] 100033be: 71a8 strb r0, [r5, #6] 100033c0: 79c8 ldrb r0, [r1, #7] 100033c2: 71e8 strb r0, [r5, #7] 100033c4: 2155 movs r1, #85 ; 0x55 100033c6: 4628 mov r0, r5 100033c8: f7fd f85e bl 10000488 100033cc: 466b mov r3, sp 100033ce: 20f1 movs r0, #241 ; 0xf1 100033d0: 7018 strb r0, [r3, #0] 100033d2: 4621 mov r1, r4 100033d4: 1c68 adds r0, r5, #1 100033d6: 2207 movs r2, #7 100033d8: f7fd f86d bl 100004b6 100033dc: 4669 mov r1, sp 100033de: 2001 movs r0, #1 100033e0: f7fd fbee bl 10000bc0 (void)ISO15765TimerStart(TX_FC, N_Bs, ISO15765TimerTX_FC); 100033e4: 4a66 ldr r2, [pc, #408] ; (10003580 <..lin.b3bcf38b..e317d5cc.0_12+0x30>) 100033e6: 217d movs r1, #125 ; 0x7d 100033e8: 00c9 lsls r1, r1, #3 100033ea: 2002 movs r0, #2 100033ec: f7ff ff29 bl 10003242 <__ISO15765TimerStart_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf> } 100033f0: 2001 movs r0, #1 return boRet; 100033f2: b006 add sp, #24 100033f4: bdf0 pop {r4, r5, r6, r7, pc} 100033f6 <__UpperError_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: /// \param - /// /// \return void //----------------------------------------------------------------------------- static void UpperError(uint8 error) { 100033f6: b500 push {lr} // PRQA S 3112 1 // parameter not used at the moment (void) error; // not used ComBuf_RxIndication(ISO15765_USED_COMBUF_ID, NTFRSLT_E_NOT_OK); 100033f8: 2101 movs r1, #1 100033fa: 2000 movs r0, #0 100033fc: f7ff fe1f bl 1000303e } 10003400: bd00 pop {pc} 10003402 <__ISO15765SendCF_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: { 10003402: b570 push {r4, r5, r6, lr} 10003404: b084 sub sp, #16 10003406: 4e59 ldr r6, [pc, #356] ; (1000356c <..lin.b3bcf38b..e317d5cc.0_12+0x1c>) buf[0] = (NPCI_CONSECUTIVE_FRAME | (uCF_SN++ & 0x0FU)); 10003408: ab02 add r3, sp, #8 1000340a: 7931 ldrb r1, [r6, #4] 1000340c: 1c4a adds r2, r1, #1 1000340e: 7132 strb r2, [r6, #4] 10003410: 0708 lsls r0, r1, #28 10003412: 0f00 lsrs r0, r0, #28 10003414: 2120 movs r1, #32 10003416: 4308 orrs r0, r1 10003418: 7018 strb r0, [r3, #0] (void)memcpy(&buf[1], &arCF_Frame[uCF_DL], CF_DATALENGTH); 1000341a: 4858 ldr r0, [pc, #352] ; (1000357c <..lin.b3bcf38b..e317d5cc.0_12+0x2c>) 1000341c: 8834 ldrh r4, [r6, #0] 1000341e: 1821 adds r1, r4, r0 10003420: 1c58 adds r0, r3, #1 10003422: 2206 movs r2, #6 10003424: f7fd f847 bl 100004b6 const uint16 unTransmitSize = 10003428: 8871 ldrh r1, [r6, #2] 1000342a: 2507 movs r5, #7 1000342c: 1b08 subs r0, r1, r4 1000342e: b280 uxth r0, r0 10003430: 2806 cmp r0, #6 10003432: d202 bcs.n 1000343a <..lin.b3bcf38b..fb90fc7c.0_7> 10003434: 1c48 adds r0, r1, #1 10003436: 1b05 subs r5, r0, r4 10003438: b2ad uxth r5, r5 1000343a <..lin.b3bcf38b..fb90fc7c.0_7>: if ((LOWER_TRANSMIT(buf, unTransmitSize)) == TRUE) 1000343a: 484e ldr r0, [pc, #312] ; (10003574 <..lin.b3bcf38b..e317d5cc.0_12+0x24>) 1000343c: 466c mov r4, sp 1000343e: 2208 movs r2, #8 10003440: 7801 ldrb r1, [r0, #0] 10003442: 7021 strb r1, [r4, #0] 10003444: 7841 ldrb r1, [r0, #1] 10003446: 7061 strb r1, [r4, #1] 10003448: 7881 ldrb r1, [r0, #2] 1000344a: 70a1 strb r1, [r4, #2] 1000344c: 78c1 ldrb r1, [r0, #3] 1000344e: 70e1 strb r1, [r4, #3] 10003450: 7901 ldrb r1, [r0, #4] 10003452: 7121 strb r1, [r4, #4] 10003454: 7941 ldrb r1, [r0, #5] 10003456: 7161 strb r1, [r4, #5] 10003458: 7981 ldrb r1, [r0, #6] 1000345a: 71a1 strb r1, [r4, #6] 1000345c: 79c0 ldrb r0, [r0, #7] 1000345e: 71e0 strb r0, [r4, #7] 10003460: 2155 movs r1, #85 ; 0x55 10003462: 4620 mov r0, r4 10003464: f7fd f810 bl 10000488 10003468: 462a mov r2, r5 1000346a: 466b mov r3, sp 1000346c: 20f1 movs r0, #241 ; 0xf1 1000346e: 7018 strb r0, [r3, #0] 10003470: a902 add r1, sp, #8 10003472: 1c60 adds r0, r4, #1 10003474: f7fd f81f bl 100004b6 10003478: 4669 mov r1, sp 1000347a: 2001 movs r0, #1 1000347c: f7fd fba0 bl 10000bc0 uCF_DL += CF_DATALENGTH; 10003480: 8834 ldrh r4, [r6, #0] 10003482: 3406 adds r4, #6 10003484: 8870 ldrh r0, [r6, #2] if (uCF_DL >= uCF_Size) 10003486: b2a4 uxth r4, r4 10003488: 4284 cmp r4, r0 1000348a: d302 bcc.n 10003492 <..lin.b3bcf38b..fb90fc7c.0_8+0x6> 1000348c <..lin.b3bcf38b..fb90fc7c.0_8>: uCF_DL = 0; 1000348c: 2000 movs r0, #0 1000348e: 8030 strh r0, [r6, #0] 10003490: e014 b.n 100034bc <..lin.b3bcf38b..fb90fc7c.0_11+0xa> 10003492: 7972 ldrb r2, [r6, #5] 10003494 <..lin.b3bcf38b..fb90fc7c.0_9>: if ((uCF_BScnt++ >= uFC_BS) && (uFC_BS != 0U)) 10003494: 1c50 adds r0, r2, #1 10003496: 7170 strb r0, [r6, #5] 10003498: 79b0 ldrb r0, [r6, #6] 1000349a: 8034 strh r4, [r6, #0] 1000349c: 4282 cmp r2, r0 1000349e: d308 bcc.n 100034b2 <..lin.b3bcf38b..fb90fc7c.0_11> 100034a0: 2800 cmp r0, #0 100034a2: d006 beq.n 100034b2 <..lin.b3bcf38b..fb90fc7c.0_11> 100034a4 <..lin.b3bcf38b..fb90fc7c.0_10>: (void)ISO15765TimerStart(TX_FC, N_Bs, ISO15765TimerTX_FC); 100034a4: 4a36 ldr r2, [pc, #216] ; (10003580 <..lin.b3bcf38b..e317d5cc.0_12+0x30>) 100034a6: 217d movs r1, #125 ; 0x7d 100034a8: 00c9 lsls r1, r1, #3 100034aa: 2002 movs r0, #2 100034ac: f7ff fec9 bl 10003242 <__ISO15765TimerStart_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf> 100034b0: e004 b.n 100034bc <..lin.b3bcf38b..fb90fc7c.0_11+0xa> 100034b2 <..lin.b3bcf38b..fb90fc7c.0_11>: (void)ISO15765TimerStart(TX_CF, uFC_STmin, ISO15765TimerTX_CF); 100034b2: 4a34 ldr r2, [pc, #208] ; (10003584 <..lin.b3bcf38b..e317d5cc.0_12+0x34>) 100034b4: 79f1 ldrb r1, [r6, #7] 100034b6: 2001 movs r0, #1 100034b8: f7ff fec3 bl 10003242 <__ISO15765TimerStart_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf> return boRet; 100034bc: 2001 movs r0, #1 100034be: b004 add sp, #16 100034c0: bd70 pop {r4, r5, r6, pc} 100034c2 <__ISO15765SendCFAbort_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: { 100034c2: b500 push {lr} uCF_DL = 0; 100034c4: 4a29 ldr r2, [pc, #164] ; (1000356c <..lin.b3bcf38b..e317d5cc.0_12+0x1c>) 100034c6: 2000 movs r0, #0 100034c8: 2101 movs r1, #1 UPPER_ERROR(ERROR_TX); 100034ca: 8010 strh r0, [r2, #0] 100034cc: f7ff fdb7 bl 1000303e } 100034d0: bd00 pop {pc} 100034d2 <__ISO15765SendFC_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: { 100034d2: b510 push {r4, lr} 100034d4: b083 sub sp, #12 100034d6: 492c ldr r1, [pc, #176] ; (10003588 <..lin.b3bcf38b..e317d5cc.0_12+0x38>) data[0] = (NPCI_FLOW_CONTROL | (FS & 0x0FU)); 100034d8: 0700 lsls r0, r0, #28 100034da: 0f00 lsrs r0, r0, #28 100034dc: 2230 movs r2, #48 ; 0x30 100034de: 466b mov r3, sp 100034e0: 4310 orrs r0, r2 100034e2: 7058 strb r0, [r3, #1] data[1] = uCF_BS; 100034e4: 7848 ldrb r0, [r1, #1] 100034e6: 7098 strb r0, [r3, #2] data[2] = uCF_STmin; 100034e8: 7888 ldrb r0, [r1, #2] 100034ea: 70d8 strb r0, [r3, #3] return LOWER_TRANSMIT(data, 3); 100034ec: 4821 ldr r0, [pc, #132] ; (10003574 <..lin.b3bcf38b..e317d5cc.0_12+0x24>) 100034ee: ac01 add r4, sp, #4 100034f0: 7801 ldrb r1, [r0, #0] 100034f2: 7021 strb r1, [r4, #0] 100034f4: 7841 ldrb r1, [r0, #1] 100034f6: 7061 strb r1, [r4, #1] 100034f8: 7881 ldrb r1, [r0, #2] 100034fa: 70a1 strb r1, [r4, #2] 100034fc: 78c1 ldrb r1, [r0, #3] 100034fe: 70e1 strb r1, [r4, #3] 10003500: 7901 ldrb r1, [r0, #4] 10003502: 7121 strb r1, [r4, #4] 10003504: 7941 ldrb r1, [r0, #5] 10003506: 7161 strb r1, [r4, #5] 10003508: 7981 ldrb r1, [r0, #6] 1000350a: 71a1 strb r1, [r4, #6] 1000350c: 79c0 ldrb r0, [r0, #7] 1000350e: 2208 movs r2, #8 10003510: 71e0 strb r0, [r4, #7] 10003512: 2155 movs r1, #85 ; 0x55 10003514: 4620 mov r0, r4 10003516: f7fc ffb7 bl 10000488 1000351a: 20f1 movs r0, #241 ; 0xf1 1000351c: 7020 strb r0, [r4, #0] 1000351e: 4669 mov r1, sp 10003520: 3101 adds r1, #1 10003522: 1c60 adds r0, r4, #1 10003524: 2203 movs r2, #3 10003526: f7fc ffc6 bl 100004b6 1000352a: 4621 mov r1, r4 1000352c: 2001 movs r0, #1 1000352e: f7fd fb47 bl 10000bc0 10003532: 2001 movs r0, #1 10003534: b003 add sp, #12 10003536: bd10 pop {r4, pc} 10003538 <__UpperSend_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: { 10003538: b530 push {r4, r5, lr} 1000353a: b081 sub sp, #4 1000353c: 4605 mov r5, r0 1000353e: 460c mov r4, r1 (void)ComBuf_RxProvide(ISO15765_USED_COMBUF_ID, &PduInfoPtr); 10003540: 4669 mov r1, sp 10003542: 2000 movs r0, #0 10003544: f7ff fda0 bl 10003088 if (PduInfoPtr->SduLength >= length) 10003548: 9b00 ldr r3, [sp, #0] 1000354a: 8898 ldrh r0, [r3, #4] 1000354c: 42a0 cmp r0, r4 1000354e: d306 bcc.n 1000355e <..lin.b3bcf38b..e317d5cc.0_12+0xe> 10003550 <..lin.b3bcf38b..e317d5cc.0_12>: (void)memcpy(PduInfoPtr->SduDataPtr, data, length); 10003550: 4622 mov r2, r4 10003552: 6818 ldr r0, [r3, #0] 10003554: 4629 mov r1, r5 10003556: f7fc ffae bl 100004b6 PduInfoPtr->SduLength = length; 1000355a: 9800 ldr r0, [sp, #0] 1000355c: 8084 strh r4, [r0, #4] ComBuf_RxIndication(ISO15765_USED_COMBUF_ID, NTFRSLT_OK); 1000355e: 2100 movs r1, #0 10003560: 4608 mov r0, r1 10003562: f7ff fd6c bl 1000303e return TRUE; 10003566: 2001 movs r0, #1 10003568: b001 add sp, #4 1000356a: bd30 pop {r4, r5, pc} 1000356c: 1264 asrs r4, r4, #9 1000356e: 0800 lsrs r0, r0, #32 10003570: 1670 asrs r0, r6, #25 10003572: 0800 lsrs r0, r0, #32 10003574: 6a30 ldr r0, [r6, #32] 10003576: 1000 asrs r0, r0, #32 10003578: 0fff lsrs r7, r7, #31 1000357a: 0000 movs r0, r0 1000357c: 1270 asrs r0, r6, #9 1000357e: 0800 lsrs r0, r0, #32 10003580: 3811 subs r0, #17 10003582: 1000 asrs r0, r0, #32 10003584: 3809 subs r0, #9 10003586: 1000 asrs r0, r0, #32 10003588: 126c asrs r4, r5, #9 1000358a: 0800 lsrs r0, r0, #32 1000358c <__ISO15765TimerStop_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: { 1000358c: 4601 mov r1, r0 boolean boRet = FALSE; 1000358e: 4ac5 ldr r2, [pc, #788] ; (100038a4 <__ghs_eofn_ISO15765TimerService+0x2>) for (i = 0; i < MAX_TIMERS; i++) 10003590: 2000 movs r0, #0 10003592: 8813 ldrh r3, [r2, #0] 10003594: 428b cmp r3, r1 10003596: d102 bne.n 1000359e <__ISO15765TimerStop_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf+0x12> 10003598: 8010 strh r0, [r2, #0] 1000359a: 2001 movs r0, #1 1000359c: e00a b.n 100035b4 <..lin.b3bcf38b..c72f6890.0_13> 1000359e: 8993 ldrh r3, [r2, #12] 100035a0: 428b cmp r3, r1 100035a2: d102 bne.n 100035aa <__ISO15765TimerStop_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf+0x1e> 100035a4: 8190 strh r0, [r2, #12] 100035a6: 2001 movs r0, #1 100035a8: e004 b.n 100035b4 <..lin.b3bcf38b..c72f6890.0_13> 100035aa: 8b13 ldrh r3, [r2, #24] 100035ac: 428b cmp r3, r1 100035ae: d101 bne.n 100035b4 <..lin.b3bcf38b..c72f6890.0_13> 100035b0: 8310 strh r0, [r2, #24] 100035b2: 2001 movs r0, #1 100035b4 <..lin.b3bcf38b..c72f6890.0_13>: return boRet; 100035b4: 4770 bx lr 100035b6 : { 100035b6: b5f0 push {r4, r5, r6, r7, lr} 100035b8: b089 sub sp, #36 ; 0x24 100035ba: 4605 mov r5, r0 100035bc: 460f mov r7, r1 if (data[N_SA] != (uint8)EXT_ADR_SRC) 100035be: 7800 ldrb r0, [r0, #0] 100035c0: 2843 cmp r0, #67 ; 0x43 100035c2: d000 beq.n 100035c6 100035c4: e11e b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100035c6: 4cb8 ldr r4, [pc, #736] ; (100038a8 <__ghs_eofn_ISO15765TimerService+0x6>) 100035c8 <..lin.b3bcf38b..cc8fc11b.0_14>: switch(data[EXT_STARTBYTE] & 0xF0U) 100035c8: 7868 ldrb r0, [r5, #1] 100035ca: 21f0 movs r1, #240 ; 0xf0 100035cc: 4001 ands r1, r0 100035ce: d007 beq.n 100035e0 <..lin.b3bcf38b..cc8fc11b.0_15> 100035d0: 2910 cmp r1, #16 100035d2: d023 beq.n 1000361c <..lin.b3bcf38b..cc8fc11b.0_17> 100035d4: 2920 cmp r1, #32 100035d6: d067 beq.n 100036a8 <..lin.b3bcf38b..cc8fc11b.0_20> 100035d8: 2930 cmp r1, #48 ; 0x30 100035da: d100 bne.n 100035de <..lin.b3bcf38b..cc8fc11b.0_14+0x16> 100035dc: e0f9 b.n 100037d2 <..lin.b3bcf38b..cc8fc11b.0_32> 100035de: e111 b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100035e0 <..lin.b3bcf38b..cc8fc11b.0_15>: uint8 SF_DL = data[EXT_STARTBYTE] & 0x0FU; 100035e0: 0700 lsls r0, r0, #28 100035e2: 0f00 lsrs r0, r0, #28 uCF_DL = 0; 100035e4: 8021 strh r1, [r4, #0] if ((SF_DL > SF_DATALENGTH) || (length <= SF_DL)) 100035e6: 2806 cmp r0, #6 100035e8: d900 bls.n 100035ec <..lin.b3bcf38b..cc8fc11b.0_15+0xc> 100035ea: e10b b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100035ec: 4287 cmp r7, r0 100035ee: d800 bhi.n 100035f2 <..lin.b3bcf38b..cc8fc11b.0_16> 100035f0: e108 b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100035f2 <..lin.b3bcf38b..cc8fc11b.0_16>: (void)UPPER_TRANSMIT(&data[EXT_STARTBYTE + 1U], SF_DL); // strip NPCI 100035f2: 4669 mov r1, sp 100035f4: 4604 mov r4, r0 100035f6: 2000 movs r0, #0 100035f8: f7ff fd46 bl 10003088 100035fc: 9800 ldr r0, [sp, #0] 100035fe: 8881 ldrh r1, [r0, #4] 10003600: 42a1 cmp r1, r4 10003602: d306 bcc.n 10003612 <..lin.b3bcf38b..cc8fc11b.0_16+0x20> 10003604: 4622 mov r2, r4 10003606: 6800 ldr r0, [r0, #0] 10003608: 1ca9 adds r1, r5, #2 1000360a: f7fc ff54 bl 100004b6 1000360e: 9800 ldr r0, [sp, #0] 10003610: 8084 strh r4, [r0, #4] 10003612: 2100 movs r1, #0 10003614: 4608 mov r0, r1 10003616: f7ff fd12 bl 1000303e 1000361a: e0f3 b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 1000361c <..lin.b3bcf38b..cc8fc11b.0_17>: uCF_DL = (uint16)(((uint16)data[EXT_STARTBYTE] & 0x0FU) << 8U) + (uint16)(data[EXT_STARTBYTE + 1U]); 1000361c: 0700 lsls r0, r0, #28 1000361e: 78a9 ldrb r1, [r5, #2] 10003620: 0d00 lsrs r0, r0, #20 10003622: 1840 adds r0, r0, r1 if ((uCF_DL < (SF_DATALENGTH + 1U))) { 10003624: 2807 cmp r0, #7 10003626: d202 bcs.n 1000362e <..lin.b3bcf38b..cc8fc11b.0_18+0x6> 10003628 <..lin.b3bcf38b..cc8fc11b.0_18>: uCF_DL = 0; 10003628: 2000 movs r0, #0 1000362a: 8020 strh r0, [r4, #0] break; 1000362c: e0ea b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 1000362e: 8020 strh r0, [r4, #0] 10003630 <..lin.b3bcf38b..cc8fc11b.0_19>: (void)memcpy(arCF_Frame, &data[EXT_STARTBYTE + 2U], FF_DATALENGTH); // strip NPCI 10003630: 489e ldr r0, [pc, #632] ; (100038ac <__ghs_eofn_ISO15765TimerService+0xa>) 10003632: 1ce9 adds r1, r5, #3 10003634: 2205 movs r2, #5 10003636: f7fc ff3e bl 100004b6 uCF_Size = FF_DATALENGTH; // init size 1000363a: 2005 movs r0, #5 1000363c: 8060 strh r0, [r4, #2] uCF_SN = 1; // init SN (next expected seq number) 1000363e: 2001 movs r0, #1 10003640: 7120 strb r0, [r4, #4] uCF_BScnt = 0; // init block counter 10003642: 2000 movs r0, #0 10003644: 7160 strb r0, [r4, #5] (void)ISO15765SendFC(0U); 10003646: ab01 add r3, sp, #4 10003648: 2030 movs r0, #48 ; 0x30 1000364a: 7058 strb r0, [r3, #1] 1000364c: 7a60 ldrb r0, [r4, #9] 1000364e: 7098 strb r0, [r3, #2] 10003650: 7aa0 ldrb r0, [r4, #10] 10003652: 70d8 strb r0, [r3, #3] 10003654: 4896 ldr r0, [pc, #600] ; (100038b0 <__ghs_eofn_ISO15765TimerService+0xe>) 10003656: ac07 add r4, sp, #28 10003658: 2208 movs r2, #8 1000365a: 7801 ldrb r1, [r0, #0] 1000365c: 7021 strb r1, [r4, #0] 1000365e: 7841 ldrb r1, [r0, #1] 10003660: 7061 strb r1, [r4, #1] 10003662: 7881 ldrb r1, [r0, #2] 10003664: 70a1 strb r1, [r4, #2] 10003666: 78c1 ldrb r1, [r0, #3] 10003668: 70e1 strb r1, [r4, #3] 1000366a: 7901 ldrb r1, [r0, #4] 1000366c: 7121 strb r1, [r4, #4] 1000366e: 7941 ldrb r1, [r0, #5] 10003670: 7161 strb r1, [r4, #5] 10003672: 7981 ldrb r1, [r0, #6] 10003674: 71a1 strb r1, [r4, #6] 10003676: 79c0 ldrb r0, [r0, #7] 10003678: 71e0 strb r0, [r4, #7] 1000367a: 2155 movs r1, #85 ; 0x55 1000367c: 4620 mov r0, r4 1000367e: f7fc ff03 bl 10000488 10003682: 20f1 movs r0, #241 ; 0xf1 10003684: 7020 strb r0, [r4, #0] 10003686: a901 add r1, sp, #4 10003688: 3101 adds r1, #1 1000368a: 1c60 adds r0, r4, #1 1000368c: 2203 movs r2, #3 1000368e: f7fc ff12 bl 100004b6 10003692: 4621 mov r1, r4 10003694: 2001 movs r0, #1 10003696: f7fd fa93 bl 10000bc0 (void)ISO15765TimerStart(RX_CF, N_Cr, ISO15765TimerRX_CF); 1000369a: 4a86 ldr r2, [pc, #536] ; (100038b4 <__ghs_eofn_ISO15765TimerService+0x12>) 1000369c: 217d movs r1, #125 ; 0x7d 1000369e: 00c9 lsls r1, r1, #3 100036a0: 2003 movs r0, #3 100036a2: f7ff fdce bl 10003242 <__ISO15765TimerStart_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf> break; 100036a6: e0ad b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100036a8 <..lin.b3bcf38b..cc8fc11b.0_20>: (void)ISO15765TimerStop(RX_CF); 100036a8: 2003 movs r0, #3 100036aa: f7ff ff6f bl 1000358c <__ISO15765TimerStop_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf> if (uCF_DL == 0U) 100036ae: 8821 ldrh r1, [r4, #0] 100036b0: 9104 str r1, [sp, #16] 100036b2: 2900 cmp r1, #0 100036b4: d100 bne.n 100036b8 <..lin.b3bcf38b..cc8fc11b.0_21> 100036b6: e0a5 b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100036b8 <..lin.b3bcf38b..cc8fc11b.0_21>: if (SN != uCF_SN) 100036b8: 7869 ldrb r1, [r5, #1] 100036ba: 7920 ldrb r0, [r4, #4] 100036bc: 0709 lsls r1, r1, #28 100036be: 0f09 lsrs r1, r1, #28 100036c0: 4281 cmp r1, r0 100036c2: d005 beq.n 100036d0 <..lin.b3bcf38b..cc8fc11b.0_23> 100036c4 <..lin.b3bcf38b..cc8fc11b.0_22>: uCF_DL = 0U; 100036c4: 2000 movs r0, #0 100036c6: 8020 strh r0, [r4, #0] UPPER_ERROR(ERROR_RX); 100036c8: 2101 movs r1, #1 100036ca: f7ff fcb8 bl 1000303e 100036ce: e099 b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100036d0 <..lin.b3bcf38b..cc8fc11b.0_23>: uCF_SN = ((uCF_SN+1U) & 0x0FU); //++uCF_SN & 0x0FU; 100036d0: 3001 adds r0, #1 100036d2: 0700 lsls r0, r0, #28 100036d4: 0f00 lsrs r0, r0, #28 100036d6: 7120 strb r0, [r4, #4] if (uCF_Size + length < CF_MAX_FRAME_SIZE) 100036d8: 8866 ldrh r6, [r4, #2] 100036da: 19f0 adds r0, r6, r7 100036dc: 2101 movs r1, #1 100036de: 0289 lsls r1, r1, #10 100036e0: 4288 cmp r0, r1 100036e2: d224 bcs.n 1000372e <..lin.b3bcf38b..cc8fc11b.0_28> 100036e4 <..lin.b3bcf38b..cc8fc11b.0_24>: (void)memcpy(&arCF_Frame[uCF_Size], &data[EXT_STARTBYTE + 1U], length < CF_DATALENGTH ? length : CF_DATALENGTH); // strip NPCI 100036e4: 2f06 cmp r7, #6 100036e6: 4871 ldr r0, [pc, #452] ; (100038ac <__ghs_eofn_ISO15765TimerService+0xa>) 100036e8: d901 bls.n 100036ee <..lin.b3bcf38b..cc8fc11b.0_24+0xa> 100036ea: 2206 movs r2, #6 100036ec: e000 b.n 100036f0 <..lin.b3bcf38b..cc8fc11b.0_24+0xc> 100036ee: 1c3a adds r2, r7, #0 100036f0: 1ca9 adds r1, r5, #2 100036f2: 1830 adds r0, r6, r0 100036f4: f7fc fedf bl 100004b6 100036f8 <..lin.b3bcf38b..cc8fc11b.0_25>: uCF_Size += (length < CF_DATALENGTH ? length : CF_DATALENGTH); 100036f8: 2006 movs r0, #6 100036fa: 2f06 cmp r7, #6 100036fc: d200 bcs.n 10003700 <..lin.b3bcf38b..cc8fc11b.0_25+0x8> 100036fe: 4638 mov r0, r7 10003700: 1836 adds r6, r6, r0 10003702: 8066 strh r6, [r4, #2] 10003704: 9804 ldr r0, [sp, #16] 10003706: b2b6 uxth r6, r6 10003708: 4286 cmp r6, r0 1000370a: d219 bcs.n 10003740 <..lin.b3bcf38b..cc8fc11b.0_29> 1000370c <..lin.b3bcf38b..cc8fc11b.0_26>: if (uFC_BS != 0U) 1000370c: 79a0 ldrb r0, [r4, #6] 1000370e: 2800 cmp r0, #0 10003710: d058 beq.n 100037c4 <..lin.b3bcf38b..cc8fc11b.0_31+0x56> 10003712 <..lin.b3bcf38b..cc8fc11b.0_27>: if (++uCF_BScnt >= uCF_BS) 10003712: 7960 ldrb r0, [r4, #5] 10003714: 3001 adds r0, #1 10003716: 7a61 ldrb r1, [r4, #9] 10003718: b2c0 uxtb r0, r0 1000371a: 4288 cmp r0, r1 1000371c: d227 bcs.n 1000376e <..lin.b3bcf38b..cc8fc11b.0_31> 1000371e: 7160 strb r0, [r4, #5] 10003720: 4a64 ldr r2, [pc, #400] ; (100038b4 <__ghs_eofn_ISO15765TimerService+0x12>) 10003722: 217d movs r1, #125 ; 0x7d 10003724: 00c9 lsls r1, r1, #3 10003726: 2003 movs r0, #3 10003728: f7ff fd8b bl 10003242 <__ISO15765TimerStart_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf> 1000372c: e06a b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 1000372e <..lin.b3bcf38b..cc8fc11b.0_28>: UPPER_ERROR(ERROR_OVERFLOW); 1000372e: 2101 movs r1, #1 10003730: 2000 movs r0, #0 10003732: f7ff fc84 bl 1000303e 10003736: 8822 ldrh r2, [r4, #0] 10003738: 8860 ldrh r0, [r4, #2] 1000373a: 9204 str r2, [sp, #16] if (uCF_Size >= uCF_DL) 1000373c: 4290 cmp r0, r2 1000373e: d3e5 bcc.n 1000370c <..lin.b3bcf38b..cc8fc11b.0_26> 10003740 <..lin.b3bcf38b..cc8fc11b.0_29>: (void)UPPER_TRANSMIT(arCF_Frame, uCF_DL); 10003740: 9d04 ldr r5, [sp, #16] 10003742: a902 add r1, sp, #8 10003744: 2000 movs r0, #0 10003746: f7ff fc9f bl 10003088 1000374a: 9802 ldr r0, [sp, #8] 1000374c: 8881 ldrh r1, [r0, #4] 1000374e: 42a9 cmp r1, r5 10003750: d306 bcc.n 10003760 <..lin.b3bcf38b..cc8fc11b.0_29+0x20> 10003752: 4956 ldr r1, [pc, #344] ; (100038ac <__ghs_eofn_ISO15765TimerService+0xa>) 10003754: 6800 ldr r0, [r0, #0] 10003756: 462a mov r2, r5 10003758: f7fc fead bl 100004b6 1000375c: 9802 ldr r0, [sp, #8] 1000375e: 8085 strh r5, [r0, #4] 10003760: 2100 movs r1, #0 10003762: 4608 mov r0, r1 10003764: f7ff fc6b bl 1000303e 10003768 <..lin.b3bcf38b..cc8fc11b.0_30>: uCF_DL = 0; 10003768: 2000 movs r0, #0 1000376a: 8020 strh r0, [r4, #0] 1000376c: e04a b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 1000376e <..lin.b3bcf38b..cc8fc11b.0_31>: uCF_BScnt = 0; 1000376e: 2000 movs r0, #0 10003770: 7160 strb r0, [r4, #5] (void)ISO15765SendFC(0U); 10003772: ab03 add r3, sp, #12 10003774: 2030 movs r0, #48 ; 0x30 10003776: 7058 strb r0, [r3, #1] 10003778: 7099 strb r1, [r3, #2] 1000377a: 7aa0 ldrb r0, [r4, #10] 1000377c: 70d8 strb r0, [r3, #3] 1000377e: 484c ldr r0, [pc, #304] ; (100038b0 <__ghs_eofn_ISO15765TimerService+0xe>) 10003780: ac05 add r4, sp, #20 10003782: 2208 movs r2, #8 10003784: 7801 ldrb r1, [r0, #0] 10003786: 7021 strb r1, [r4, #0] 10003788: 7841 ldrb r1, [r0, #1] 1000378a: 7061 strb r1, [r4, #1] 1000378c: 7881 ldrb r1, [r0, #2] 1000378e: 70a1 strb r1, [r4, #2] 10003790: 78c1 ldrb r1, [r0, #3] 10003792: 70e1 strb r1, [r4, #3] 10003794: 7901 ldrb r1, [r0, #4] 10003796: 7121 strb r1, [r4, #4] 10003798: 7941 ldrb r1, [r0, #5] 1000379a: 7161 strb r1, [r4, #5] 1000379c: 7981 ldrb r1, [r0, #6] 1000379e: 71a1 strb r1, [r4, #6] 100037a0: 79c0 ldrb r0, [r0, #7] 100037a2: 71e0 strb r0, [r4, #7] 100037a4: 2155 movs r1, #85 ; 0x55 100037a6: 4620 mov r0, r4 100037a8: f7fc fe6e bl 10000488 100037ac: 20f1 movs r0, #241 ; 0xf1 100037ae: 7020 strb r0, [r4, #0] 100037b0: a903 add r1, sp, #12 100037b2: 3101 adds r1, #1 100037b4: 1c60 adds r0, r4, #1 100037b6: 2203 movs r2, #3 100037b8: f7fc fe7d bl 100004b6 100037bc: 4621 mov r1, r4 100037be: 2001 movs r0, #1 100037c0: f7fd f9fe bl 10000bc0 (void)ISO15765TimerStart(RX_CF, N_Cr, ISO15765TimerRX_CF); 100037c4: 4a3b ldr r2, [pc, #236] ; (100038b4 <__ghs_eofn_ISO15765TimerService+0x12>) 100037c6: 217d movs r1, #125 ; 0x7d 100037c8: 00c9 lsls r1, r1, #3 100037ca: 2003 movs r0, #3 100037cc: f7ff fd39 bl 10003242 <__ISO15765TimerStart_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf> 100037d0: e018 b.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100037d2 <..lin.b3bcf38b..cc8fc11b.0_32>: (void)ISO15765TimerStop(TX_FC); 100037d2: 2002 movs r0, #2 100037d4: f7ff feda bl 1000358c <__ISO15765TimerStop_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf> if ((length < FC_DATALENGTH) || ((data[EXT_STARTBYTE + 0U] & 0x0FU) > 1U)) 100037d8: 2f03 cmp r7, #3 100037da: d313 bcc.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100037dc: 7868 ldrb r0, [r5, #1] 100037de: 0701 lsls r1, r0, #28 100037e0: 0f09 lsrs r1, r1, #28 100037e2: 2901 cmp r1, #1 100037e4: d80e bhi.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100037e6 <..lin.b3bcf38b..cc8fc11b.0_33>: uFC_FS = data[EXT_STARTBYTE + 0U] & 0x01U; // 0 = CTS (ContinueToSend), 1 = WT (Wait) 100037e6: 07c0 lsls r0, r0, #31 100037e8: 0fc0 lsrs r0, r0, #31 100037ea: 7220 strb r0, [r4, #8] uFC_BS = data[EXT_STARTBYTE + 1U]; 100037ec: 78a9 ldrb r1, [r5, #2] 100037ee: 71a1 strb r1, [r4, #6] uFC_STmin = data[EXT_STARTBYTE + 2U]; 100037f0: 78e9 ldrb r1, [r5, #3] 100037f2: 71e1 strb r1, [r4, #7] uCF_BScnt = 0U; // reset block counter 100037f4: 2200 movs r2, #0 100037f6: 7162 strb r2, [r4, #5] if (uFC_FS == 0U) 100037f8: 2800 cmp r0, #0 100037fa: d103 bne.n 10003804 <..lin.b3bcf38b..cc8fc11b.0_34+0x8> 100037fc <..lin.b3bcf38b..cc8fc11b.0_34>: (void)ISO15765TimerStart(TX_CF, uFC_STmin, ISO15765TimerTX_CF); 100037fc: 4a2e ldr r2, [pc, #184] ; (100038b8 <__ghs_eofn_ISO15765TimerService+0x16>) 100037fe: 2001 movs r0, #1 10003800: f7ff fd1f bl 10003242 <__ISO15765TimerStart_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf> } 10003804: b009 add sp, #36 ; 0x24 10003806: bdf0 pop {r4, r5, r6, r7, pc} 10003808 <__ISO15765TimerTX_CF_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: { 10003808: b500 push {lr} (void) ISO15765SendCF(); 1000380a: f7ff fdfa bl 10003402 <__ISO15765SendCF_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf> } 1000380e: bd00 pop {pc} 10003810 <__ISO15765TimerTX_FC_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: { 10003810: b500 push {lr} UPPER_ERROR(ERROR_TX); 10003812: 2101 movs r1, #1 10003814: 2000 movs r0, #0 10003816: f7ff fc12 bl 1000303e ISO15765SendCFAbort(); 1000381a: 4a23 ldr r2, [pc, #140] ; (100038a8 <__ghs_eofn_ISO15765TimerService+0x6>) 1000381c: 2000 movs r0, #0 1000381e: 2101 movs r1, #1 10003820: 8010 strh r0, [r2, #0] 10003822: f7ff fc0c bl 1000303e } 10003826: bd00 pop {pc} 10003828 <__ISO15765TimerRX_CF_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjISO15765_inf>: { 10003828: b500 push {lr} UPPER_ERROR(ERROR_RX); 1000382a: 2101 movs r1, #1 1000382c: 2000 movs r0, #0 1000382e: f7ff fc06 bl 1000303e ISO15765SendCFAbort(); 10003832: 4a1d ldr r2, [pc, #116] ; (100038a8 <__ghs_eofn_ISO15765TimerService+0x6>) 10003834: 2000 movs r0, #0 10003836: 2101 movs r1, #1 10003838: 8010 strh r0, [r2, #0] 1000383a: f7ff fc00 bl 1000303e } 1000383e: bd00 pop {pc} 10003840 : { 10003840: b530 push {r4, r5, lr} for (i = 0; i < MAX_TIMERS; i++) 10003842: 4c18 ldr r4, [pc, #96] ; (100038a4 <__ghs_eofn_ISO15765TimerService+0x2>) 10003844: 2500 movs r5, #0 10003846: 8820 ldrh r0, [r4, #0] 10003848: 2800 cmp r0, #0 1000384a: d00b beq.n 10003864 1000384c: 4628 mov r0, r5 1000384e: f7fe f934 bl 10001aba 10003852: 6861 ldr r1, [r4, #4] 10003854: 1a40 subs r0, r0, r1 10003856: 0fc0 lsrs r0, r0, #31 10003858: 2201 movs r2, #1 1000385a: 4050 eors r0, r2 1000385c: d002 beq.n 10003864 1000385e: 8025 strh r5, [r4, #0] 10003860: 68a0 ldr r0, [r4, #8] 10003862: 4780 blx r0 10003864: 89a0 ldrh r0, [r4, #12] 10003866: 2800 cmp r0, #0 10003868: d00b beq.n 10003882 1000386a: 4628 mov r0, r5 1000386c: f7fe f925 bl 10001aba 10003870: 6921 ldr r1, [r4, #16] 10003872: 1a40 subs r0, r0, r1 10003874: 0fc0 lsrs r0, r0, #31 10003876: 2201 movs r2, #1 10003878: 4050 eors r0, r2 1000387a: d002 beq.n 10003882 1000387c: 81a5 strh r5, [r4, #12] 1000387e: 6960 ldr r0, [r4, #20] 10003880: 4780 blx r0 10003882: 8b20 ldrh r0, [r4, #24] 10003884: 2800 cmp r0, #0 10003886: d00b beq.n 100038a0 <..lin.b3bcf38b..e0ba7c8a.0_35> 10003888: 4628 mov r0, r5 1000388a: f7fe f916 bl 10001aba 1000388e: 69e1 ldr r1, [r4, #28] 10003890: 1a40 subs r0, r0, r1 10003892: 0fc0 lsrs r0, r0, #31 10003894: 2201 movs r2, #1 10003896: 4050 eors r0, r2 10003898: d002 beq.n 100038a0 <..lin.b3bcf38b..e0ba7c8a.0_35> 1000389a: 8325 strh r5, [r4, #24] 1000389c: 6a20 ldr r0, [r4, #32] 1000389e: 4780 blx r0 100038a0 <..lin.b3bcf38b..e0ba7c8a.0_35>: } 100038a0: bd30 pop {r4, r5, pc} 100038a2 <__ghs_eofn_ISO15765TimerService>: 100038a2: bf00 nop 100038a4: 1670 asrs r0, r6, #25 100038a6: 0800 lsrs r0, r0, #32 100038a8: 1264 asrs r4, r4, #9 100038aa: 0800 lsrs r0, r0, #32 100038ac: 1270 asrs r0, r6, #9 100038ae: 0800 lsrs r0, r0, #32 100038b0: 6a30 ldr r0, [r6, #32] 100038b2: 1000 asrs r0, r0, #32 100038b4: 3829 subs r0, #41 ; 0x29 100038b6: 1000 asrs r0, r0, #32 100038b8: 3809 subs r0, #9 100038ba: 1000 asrs r0, r0, #32 100038bc <__Bmg_CheckVbatLevel_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjBmg_inf>: #ifdef BMG_DETECT_VBAT_LEVEL // --------------------------------------------------------------------------- static void Bmg_CheckVbatLevel(uint16 adcRawVal) { 100038bc: b500 push {lr} //check if VBAT is in range if (BMG_IS_VBAT_INSIDE(adcRawVal)) 100038be: 49d3 ldr r1, [pc, #844] ; (10003c0c <__ghs_eofn_Bmg_BootStatus_detection>) 100038c0: 4341 muls r1, r0 100038c2: 48d3 ldr r0, [pc, #844] ; (10003c10 <__ghs_eofn_Bmg_BootStatus_detection+0x4>) 100038c4: f000 ff12 bl 100046ec <__udiv_32_32> 100038c8: 49d2 ldr r1, [pc, #840] ; (10003c14 <__ghs_eofn_Bmg_BootStatus_detection+0x8>) 100038ca: 1a40 subs r0, r0, r1 100038cc: 49d2 ldr r1, [pc, #840] ; (10003c18 <__ghs_eofn_Bmg_BootStatus_detection+0xc>) 100038ce: 4288 cmp r0, r1 100038d0: d203 bcs.n 100038da <..lin.bedcd56e..50a67f71.0_1+0x8> 100038d2 <..lin.bedcd56e..50a67f71.0_1>: { Bmg_VbatLevelCounter++; 100038d2: 48d2 ldr r0, [pc, #840] ; (10003c1c <__ghs_eofn_Bmg_BootStatus_detection+0x10>) 100038d4: 7801 ldrb r1, [r0, #0] 100038d6: 3101 adds r1, #1 100038d8: 7001 strb r1, [r0, #0] } } 100038da: bd00 pop {pc} 100038dc <__Bmg_CheckMountingSide_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjBmg_inf>: #endif #ifdef BMG_DETECT_MOUNTING_SIDE // --------------------------------------------------------------------------- static void Bmg_CheckMountingSide(uint16 adcRawVal, uint16 adcRawValKl30) { 100038dc: b510 push {r4, lr} 100038de: 4cd0 ldr r4, [pc, #832] ; (10003c20 <__ghs_eofn_Bmg_BootStatus_detection+0x14>) // if value under the detection threshold left side is detected if( BMG_IS_MOUNTING_SIDE_LEFT(adcRawVal)) 100038e0: 49ca ldr r1, [pc, #808] ; (10003c0c <__ghs_eofn_Bmg_BootStatus_detection>) 100038e2: 4341 muls r1, r0 100038e4: 48ca ldr r0, [pc, #808] ; (10003c10 <__ghs_eofn_Bmg_BootStatus_detection+0x4>) 100038e6: f000 ff01 bl 100046ec <__udiv_32_32> 100038ea: 21e1 movs r1, #225 ; 0xe1 100038ec: 0089 lsls r1, r1, #2 100038ee: 4288 cmp r0, r1 100038f0: d801 bhi.n 100038f6 <..lin.bedcd56e..dc6b7e62.0_3> 100038f2 <..lin.bedcd56e..dc6b7e62.0_2>: { Bmg_MountingSideLeftCounter++; 100038f2: 1ca0 adds r0, r4, #2 100038f4: e006 b.n 10003904 <..lin.bedcd56e..dc6b7e62.0_5+0x2> 100038f6 <..lin.bedcd56e..dc6b7e62.0_3>: } else if(BMG_IS_MOUNTING_SIDE_RIGHT(adcRawVal)) 100038f6: 21af movs r1, #175 ; 0xaf 100038f8: 0149 lsls r1, r1, #5 100038fa: 4288 cmp r0, r1 100038fc: d801 bhi.n 10003902 <..lin.bedcd56e..dc6b7e62.0_5> 100038fe <..lin.bedcd56e..dc6b7e62.0_4>: { Bmg_MountingSideRightCounter++; 100038fe: 4620 mov r0, r4 10003900: e000 b.n 10003904 <..lin.bedcd56e..dc6b7e62.0_5+0x2> 10003902 <..lin.bedcd56e..dc6b7e62.0_5>: } else { Bmg_MountingSideUnknown++; 10003902: 1c60 adds r0, r4, #1 10003904: 7801 ldrb r1, [r0, #0] 10003906: 3101 adds r1, #1 10003908: 7001 strb r1, [r0, #0] } (void)adcRawValKl30; // parameter is unused, avoid any warnings } 1000390a: bd10 pop {r4, pc} 1000390c <__Bmg_CheckWaitForRAMAppl_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjBmg_inf>: #endif #ifdef BMG_DETECT_ENTRY_CONDITION // --------------------------------------------------------------------------- static void Bmg_CheckWaitForRAMAppl(uint16 adcRawVal1, uint16 adcRawVal2, uint16 adcRawVal3) { 1000390c: b5f0 push {r4, r5, r6, r7, lr} 1000390e: 460e mov r6, r1 10003910: 4617 mov r7, r2 // all three defined condition must match to detect the entry condititon if ( ( BMG_IS_ENTRY_COND_VAL1( adcRawVal1 ) ) 10003912: 4cc4 ldr r4, [pc, #784] ; (10003c24 <__ghs_eofn_Bmg_BootStatus_detection+0x18>) 10003914: 4dbe ldr r5, [pc, #760] ; (10003c10 <__ghs_eofn_Bmg_BootStatus_detection+0x4>) 10003916: 4621 mov r1, r4 10003918: 4341 muls r1, r0 1000391a: 4628 mov r0, r5 1000391c: f000 fee6 bl 100046ec <__udiv_32_32> 10003920: 21f5 movs r1, #245 ; 0xf5 10003922: 31ff adds r1, #255 ; 0xff 10003924: 4288 cmp r0, r1 10003926: d214 bcs.n 10003952 <..lin.bedcd56e..1ee73f95.0_6+0x8> 10003928: 4621 mov r1, r4 1000392a: 4371 muls r1, r6 1000392c: 4628 mov r0, r5 1000392e: f000 fedd bl 100046ec <__udiv_32_32> 10003932: 49bd ldr r1, [pc, #756] ; (10003c28 <__ghs_eofn_Bmg_BootStatus_detection+0x1c>) 10003934: 4288 cmp r0, r1 10003936: d90c bls.n 10003952 <..lin.bedcd56e..1ee73f95.0_6+0x8> 10003938: 4621 mov r1, r4 1000393a: 4379 muls r1, r7 1000393c: 4628 mov r0, r5 1000393e: f000 fed5 bl 100046ec <__udiv_32_32> 10003942: 21f5 movs r1, #245 ; 0xf5 10003944: 31ff adds r1, #255 ; 0xff 10003946: 4288 cmp r0, r1 10003948: d203 bcs.n 10003952 <..lin.bedcd56e..1ee73f95.0_6+0x8> 1000394a <..lin.bedcd56e..1ee73f95.0_6>: && ( BMG_IS_ENTRY_COND_VAL2( adcRawVal2 ) ) && ( BMG_IS_ENTRY_COND_VAL3( adcRawVal3 ) ) ) { Bmg_WaitForRAMApplCounter++; 1000394a: 48b8 ldr r0, [pc, #736] ; (10003c2c <__ghs_eofn_Bmg_BootStatus_detection+0x20>) 1000394c: 7801 ldrb r1, [r0, #0] 1000394e: 3101 adds r1, #1 10003950: 7001 strb r1, [r0, #0] } } 10003952: bdf0 pop {r4, r5, r6, r7, pc} 10003954 : { 10003954: b5f0 push {r4, r5, r6, r7, lr} 10003956: b087 sub sp, #28 10003958: 4cb0 ldr r4, [pc, #704] ; (10003c1c <__ghs_eofn_Bmg_BootStatus_detection+0x10>) uint16 u16_RawMoutingSide = 0U; 1000395a: 4669 mov r1, sp 1000395c: 2000 movs r0, #0 1000395e: 8048 strh r0, [r1, #2] uint16 u16_RawVbatLevel = 0U; 10003960: a901 add r1, sp, #4 10003962: 4dab ldr r5, [pc, #684] ; (10003c10 <__ghs_eofn_Bmg_BootStatus_detection+0x4>) uint16 u16_RawEntryCondVal1 = 0U; 10003964: 8008 strh r0, [r1, #0] uint16 u16_RawEntryCondVal2 = 0U; 10003966: 8048 strh r0, [r1, #2] uint16 u16_RawEntryCondVal3 = 0U; 10003968: 8088 strh r0, [r1, #4] Bmg_VbatLevelCounter = 0U; 1000396a: 80c8 strh r0, [r1, #6] 1000396c: 7260 strb r0, [r4, #9] Bmg_MountingSideLeftCounter = 0U; 1000396e: 9404 str r4, [sp, #16] Bmg_MountingSideRightCounter = 0U; 10003970: 7020 strb r0, [r4, #0] Bmg_MountingSideUnknown = 0U; 10003972: 72a0 strb r0, [r4, #10] Bmg_WaitForRAMApplCounter = 0U; 10003974: 7220 strb r0, [r4, #8] 10003976: 4eab ldr r6, [pc, #684] ; (10003c24 <__ghs_eofn_Bmg_BootStatus_detection+0x18>) 10003978: 340b adds r4, #11 for( u8_Index = (uint8)0; u8_Index < BMG_NR_SAMPES; u8_Index++ ) 1000397a: 9403 str r4, [sp, #12] 1000397c: 2203 movs r2, #3 1000397e: 9206 str r2, [sp, #24] 10003980: 7020 strb r0, [r4, #0] 10003982: 1fe2 subs r2, r4, #7 10003984: 4614 mov r4, r2 10003986: 2000 movs r0, #0 10003988: f7fe f897 bl 10001aba 1000398c: aa01 add r2, sp, #4 1000398e: 4621 mov r1, r4 10003990: 30c8 adds r0, #200 ; 0xc8 10003992: 6008 str r0, [r1, #0] 10003994: 2301 movs r3, #1 10003996: 2102 movs r1, #2 10003998: 2000 movs r0, #0 1000399a: f7fc fe81 bl 100006a0 1000399e: 466a mov r2, sp 100039a0: 3202 adds r2, #2 100039a2: 2301 movs r3, #1 100039a4: 2102 movs r1, #2 100039a6: 4618 mov r0, r3 100039a8: f7fc fe7a bl 100006a0 100039ac: aa01 add r2, sp, #4 100039ae: 3202 adds r2, #2 100039b0: 2301 movs r3, #1 100039b2: 2102 movs r1, #2 100039b4: 4608 mov r0, r1 100039b6: f7fc fe73 bl 100006a0 100039ba: aa02 add r2, sp, #8 100039bc: 2301 movs r3, #1 100039be: 2102 movs r1, #2 100039c0: 2003 movs r0, #3 100039c2: f7fc fe6d bl 100006a0 100039c6: aa02 add r2, sp, #8 100039c8: 3202 adds r2, #2 100039ca: 2301 movs r3, #1 100039cc: 2102 movs r1, #2 100039ce: 2004 movs r0, #4 100039d0: f7fc fe66 bl 100006a0 100039d4: a801 add r0, sp, #4 100039d6: 8807 ldrh r7, [r0, #0] 100039d8: 498c ldr r1, [pc, #560] ; (10003c0c <__ghs_eofn_Bmg_BootStatus_detection>) 100039da: 4628 mov r0, r5 100039dc: 4379 muls r1, r7 100039de: f000 fe85 bl 100046ec <__udiv_32_32> 100039e2: 4601 mov r1, r0 100039e4: 488b ldr r0, [pc, #556] ; (10003c14 <__ghs_eofn_Bmg_BootStatus_detection+0x8>) 100039e6: 1a08 subs r0, r1, r0 100039e8: 498b ldr r1, [pc, #556] ; (10003c18 <__ghs_eofn_Bmg_BootStatus_detection+0xc>) 100039ea: 4288 cmp r0, r1 100039ec: d203 bcs.n 100039f6 100039ee: 9904 ldr r1, [sp, #16] 100039f0: 7808 ldrb r0, [r1, #0] 100039f2: 3001 adds r0, #1 100039f4: 7008 strb r0, [r1, #0] 100039f6: 466a mov r2, sp 100039f8: 8850 ldrh r0, [r2, #2] 100039fa: 4639 mov r1, r7 100039fc: f7ff ff6e bl 100038dc <__Bmg_CheckMountingSide_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjBmg_inf> 10003a00: aa01 add r2, sp, #4 10003a02: 8850 ldrh r0, [r2, #2] 10003a04: 4631 mov r1, r6 10003a06: 4341 muls r1, r0 10003a08: 4628 mov r0, r5 10003a0a: f000 fe6f bl 100046ec <__udiv_32_32> 10003a0e: 22f5 movs r2, #245 ; 0xf5 10003a10: 32ff adds r2, #255 ; 0xff 10003a12: 4290 cmp r0, r2 10003a14: d218 bcs.n 10003a48 10003a16: aa02 add r2, sp, #8 10003a18: 8810 ldrh r0, [r2, #0] 10003a1a: 4631 mov r1, r6 10003a1c: 4341 muls r1, r0 10003a1e: 4628 mov r0, r5 10003a20: f000 fe64 bl 100046ec <__udiv_32_32> 10003a24: 4980 ldr r1, [pc, #512] ; (10003c28 <__ghs_eofn_Bmg_BootStatus_detection+0x1c>) 10003a26: 4288 cmp r0, r1 10003a28: d90e bls.n 10003a48 10003a2a: aa02 add r2, sp, #8 10003a2c: 8850 ldrh r0, [r2, #2] 10003a2e: 4631 mov r1, r6 10003a30: 4341 muls r1, r0 10003a32: 4628 mov r0, r5 10003a34: f000 fe5a bl 100046ec <__udiv_32_32> 10003a38: 22f5 movs r2, #245 ; 0xf5 10003a3a: 32ff adds r2, #255 ; 0xff 10003a3c: 4290 cmp r0, r2 10003a3e: d203 bcs.n 10003a48 10003a40: 9903 ldr r1, [sp, #12] 10003a42: 7808 ldrb r0, [r1, #0] 10003a44: 3001 adds r0, #1 10003a46: 7008 strb r0, [r1, #0] 10003a48: 2000 movs r0, #0 10003a4a: f7fe f836 bl 10001aba 10003a4e: 6821 ldr r1, [r4, #0] 10003a50: 1a40 subs r0, r0, r1 10003a52: 0fc0 lsrs r0, r0, #31 10003a54: 2201 movs r2, #1 10003a56: 4050 eors r0, r2 10003a58: d0f6 beq.n 10003a48 10003a5a: 2000 movs r0, #0 10003a5c: f7fe f82d bl 10001aba 10003a60: aa01 add r2, sp, #4 10003a62: 30c8 adds r0, #200 ; 0xc8 10003a64: 6020 str r0, [r4, #0] 10003a66: 2301 movs r3, #1 10003a68: 2102 movs r1, #2 10003a6a: 2000 movs r0, #0 10003a6c: f7fc fe18 bl 100006a0 10003a70: 466a mov r2, sp 10003a72: 3202 adds r2, #2 10003a74: 2301 movs r3, #1 10003a76: 2102 movs r1, #2 10003a78: 4618 mov r0, r3 10003a7a: f7fc fe11 bl 100006a0 10003a7e: aa01 add r2, sp, #4 10003a80: 3202 adds r2, #2 10003a82: 2301 movs r3, #1 10003a84: 2102 movs r1, #2 10003a86: 4608 mov r0, r1 10003a88: f7fc fe0a bl 100006a0 10003a8c: aa02 add r2, sp, #8 10003a8e: 2301 movs r3, #1 10003a90: 2102 movs r1, #2 10003a92: 2003 movs r0, #3 10003a94: f7fc fe04 bl 100006a0 10003a98: aa02 add r2, sp, #8 10003a9a: 3202 adds r2, #2 10003a9c: 2301 movs r3, #1 10003a9e: 2102 movs r1, #2 10003aa0: 2004 movs r0, #4 10003aa2: f7fc fdfd bl 100006a0 10003aa6: a801 add r0, sp, #4 10003aa8: 8807 ldrh r7, [r0, #0] 10003aaa: 4958 ldr r1, [pc, #352] ; (10003c0c <__ghs_eofn_Bmg_BootStatus_detection>) 10003aac: 4628 mov r0, r5 10003aae: 4379 muls r1, r7 10003ab0: f000 fe1c bl 100046ec <__udiv_32_32> 10003ab4: 4601 mov r1, r0 10003ab6: 4857 ldr r0, [pc, #348] ; (10003c14 <__ghs_eofn_Bmg_BootStatus_detection+0x8>) 10003ab8: 1a08 subs r0, r1, r0 10003aba: 4957 ldr r1, [pc, #348] ; (10003c18 <__ghs_eofn_Bmg_BootStatus_detection+0xc>) 10003abc: 4288 cmp r0, r1 10003abe: d203 bcs.n 10003ac8 10003ac0: 9904 ldr r1, [sp, #16] 10003ac2: 7808 ldrb r0, [r1, #0] 10003ac4: 3001 adds r0, #1 10003ac6: 7008 strb r0, [r1, #0] 10003ac8: 466a mov r2, sp 10003aca: 8850 ldrh r0, [r2, #2] 10003acc: 4639 mov r1, r7 10003ace: f7ff ff05 bl 100038dc <__Bmg_CheckMountingSide_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjBmg_inf> 10003ad2: aa01 add r2, sp, #4 10003ad4: 8850 ldrh r0, [r2, #2] 10003ad6: 4631 mov r1, r6 10003ad8: 4341 muls r1, r0 10003ada: 4628 mov r0, r5 10003adc: f000 fe06 bl 100046ec <__udiv_32_32> 10003ae0: 22f5 movs r2, #245 ; 0xf5 10003ae2: 32ff adds r2, #255 ; 0xff 10003ae4: 4290 cmp r0, r2 10003ae6: d218 bcs.n 10003b1a 10003ae8: aa02 add r2, sp, #8 10003aea: 8810 ldrh r0, [r2, #0] 10003aec: 4631 mov r1, r6 10003aee: 4341 muls r1, r0 10003af0: 4628 mov r0, r5 10003af2: f000 fdfb bl 100046ec <__udiv_32_32> 10003af6: 494c ldr r1, [pc, #304] ; (10003c28 <__ghs_eofn_Bmg_BootStatus_detection+0x1c>) 10003af8: 4288 cmp r0, r1 10003afa: d90e bls.n 10003b1a 10003afc: aa02 add r2, sp, #8 10003afe: 8850 ldrh r0, [r2, #2] 10003b00: 4631 mov r1, r6 10003b02: 4341 muls r1, r0 10003b04: 4628 mov r0, r5 10003b06: f000 fdf1 bl 100046ec <__udiv_32_32> 10003b0a: 22f5 movs r2, #245 ; 0xf5 10003b0c: 32ff adds r2, #255 ; 0xff 10003b0e: 4290 cmp r0, r2 10003b10: d203 bcs.n 10003b1a 10003b12: 9903 ldr r1, [sp, #12] 10003b14: 7808 ldrb r0, [r1, #0] 10003b16: 3001 adds r0, #1 10003b18: 7008 strb r0, [r1, #0] 10003b1a: 2000 movs r0, #0 10003b1c: f7fd ffcd bl 10001aba 10003b20: 6821 ldr r1, [r4, #0] 10003b22: 1a40 subs r0, r0, r1 10003b24: 0fc0 lsrs r0, r0, #31 10003b26: 2201 movs r2, #1 10003b28: 4050 eors r0, r2 10003b2a: d0f6 beq.n 10003b1a 10003b2c: 2000 movs r0, #0 10003b2e: f7fd ffc4 bl 10001aba 10003b32: aa01 add r2, sp, #4 10003b34: 30c8 adds r0, #200 ; 0xc8 10003b36: 6020 str r0, [r4, #0] 10003b38: 2301 movs r3, #1 10003b3a: 2102 movs r1, #2 10003b3c: 2000 movs r0, #0 10003b3e: f7fc fdaf bl 100006a0 10003b42: 466a mov r2, sp 10003b44: 3202 adds r2, #2 10003b46: 2301 movs r3, #1 10003b48: 2102 movs r1, #2 10003b4a: 4618 mov r0, r3 10003b4c: f7fc fda8 bl 100006a0 10003b50: aa01 add r2, sp, #4 10003b52: 3202 adds r2, #2 10003b54: 2301 movs r3, #1 10003b56: 2102 movs r1, #2 10003b58: 4608 mov r0, r1 10003b5a: f7fc fda1 bl 100006a0 10003b5e: aa02 add r2, sp, #8 10003b60: 2301 movs r3, #1 10003b62: 2102 movs r1, #2 10003b64: 2003 movs r0, #3 10003b66: f7fc fd9b bl 100006a0 10003b6a: aa02 add r2, sp, #8 10003b6c: 3202 adds r2, #2 10003b6e: 2301 movs r3, #1 10003b70: 2102 movs r1, #2 10003b72: 2004 movs r0, #4 10003b74: f7fc fd94 bl 100006a0 10003b78: a801 add r0, sp, #4 10003b7a: 8807 ldrh r7, [r0, #0] 10003b7c: 4923 ldr r1, [pc, #140] ; (10003c0c <__ghs_eofn_Bmg_BootStatus_detection>) 10003b7e: 4628 mov r0, r5 10003b80: 4379 muls r1, r7 10003b82: f000 fdb3 bl 100046ec <__udiv_32_32> 10003b86: 4923 ldr r1, [pc, #140] ; (10003c14 <__ghs_eofn_Bmg_BootStatus_detection+0x8>) 10003b88: 1a40 subs r0, r0, r1 10003b8a: 4923 ldr r1, [pc, #140] ; (10003c18 <__ghs_eofn_Bmg_BootStatus_detection+0xc>) 10003b8c: 4288 cmp r0, r1 10003b8e: d203 bcs.n 10003b98 10003b90: 9904 ldr r1, [sp, #16] 10003b92: 7808 ldrb r0, [r1, #0] 10003b94: 3001 adds r0, #1 10003b96: 7008 strb r0, [r1, #0] 10003b98: 466a mov r2, sp 10003b9a: 8850 ldrh r0, [r2, #2] 10003b9c: 4639 mov r1, r7 10003b9e: f7ff fe9d bl 100038dc <__Bmg_CheckMountingSide_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjBmg_inf> 10003ba2: aa01 add r2, sp, #4 10003ba4: 8850 ldrh r0, [r2, #2] 10003ba6: 4631 mov r1, r6 10003ba8: 4341 muls r1, r0 10003baa: 4628 mov r0, r5 10003bac: f000 fd9e bl 100046ec <__udiv_32_32> 10003bb0: 22f5 movs r2, #245 ; 0xf5 10003bb2: 32ff adds r2, #255 ; 0xff 10003bb4: 4290 cmp r0, r2 10003bb6: d218 bcs.n 10003bea 10003bb8: aa02 add r2, sp, #8 10003bba: 8810 ldrh r0, [r2, #0] 10003bbc: 4631 mov r1, r6 10003bbe: 4341 muls r1, r0 10003bc0: 4628 mov r0, r5 10003bc2: f000 fd93 bl 100046ec <__udiv_32_32> 10003bc6: 4918 ldr r1, [pc, #96] ; (10003c28 <__ghs_eofn_Bmg_BootStatus_detection+0x1c>) 10003bc8: 4288 cmp r0, r1 10003bca: d90e bls.n 10003bea 10003bcc: aa02 add r2, sp, #8 10003bce: 8850 ldrh r0, [r2, #2] 10003bd0: 4631 mov r1, r6 10003bd2: 4341 muls r1, r0 10003bd4: 4628 mov r0, r5 10003bd6: f000 fd89 bl 100046ec <__udiv_32_32> 10003bda: 22f5 movs r2, #245 ; 0xf5 10003bdc: 32ff adds r2, #255 ; 0xff 10003bde: 4290 cmp r0, r2 10003be0: d203 bcs.n 10003bea 10003be2: 9903 ldr r1, [sp, #12] 10003be4: 7808 ldrb r0, [r1, #0] 10003be6: 3001 adds r0, #1 10003be8: 7008 strb r0, [r1, #0] 10003bea: 2000 movs r0, #0 10003bec: f7fd ff65 bl 10001aba 10003bf0: 4622 mov r2, r4 10003bf2: 6811 ldr r1, [r2, #0] 10003bf4: 1a40 subs r0, r0, r1 10003bf6: 0fc0 lsrs r0, r0, #31 10003bf8: 2201 movs r2, #1 10003bfa: 4050 eors r0, r2 10003bfc: d0f5 beq.n 10003bea 10003bfe: 9806 ldr r0, [sp, #24] 10003c00: 3801 subs r0, #1 10003c02: 9006 str r0, [sp, #24] 10003c04: d000 beq.n 10003c08 <..lin.bedcd56e..ef2d1ed0.0_7> 10003c06: e6be b.n 10003986 10003c08 <..lin.bedcd56e..ef2d1ed0.0_7>: } 10003c08: b007 add sp, #28 10003c0a: bdf0 pop {r4, r5, r6, r7, pc} 10003c0c <__ghs_eofn_Bmg_BootStatus_detection>: 10003c0c: eb12 0000 adds.w r0, r2, r0 10003c10: 2710 movs r7, #16 10003c12: 0000 movs r0, r0 10003c14: 1b59 subs r1, r3, r5 10003c16: 0000 movs r0, r0 10003c18: 2edf cmp r6, #223 ; 0xdf 10003c1a: 0000 movs r0, r0 10003c1c: 1694 asrs r4, r2, #26 10003c1e: 0800 lsrs r0, r0, #32 10003c20: 169c asrs r4, r3, #26 10003c22: 0800 lsrs r0, r0, #32 10003c24: 3bdb subs r3, #219 ; 0xdb 10003c26: 0000 movs r0, r0 10003c28: 13ec asrs r4, r5, #15 10003c2a: 0000 movs r0, r0 10003c2c: 169f asrs r7, r3, #26 10003c2e: 0800 lsrs r0, r0, #32 10003c30 : return ( (Bmg_VbatLevelCounter > BMG_MAJORITY_OF_COUNTS_CHECKS) ? TRUE : FALSE ); 10003c30: 490f ldr r1, [pc, #60] ; (10003c70 <__ghs_eofn_Bmg_BootStatus_waitForRAMAppl>) 10003c32: 7808 ldrb r0, [r1, #0] 10003c34: 2804 cmp r0, #4 10003c36: d801 bhi.n 10003c3c 10003c38: 2000 movs r0, #0 10003c3a: e000 b.n 10003c3e <..lin.bedcd56e..3ba4dd2a.0_8> 10003c3c: 2001 movs r0, #1 10003c3e <..lin.bedcd56e..3ba4dd2a.0_8>: 10003c3e: 4770 bx lr 10003c40 : return ( (Bmg_MountingSideLeftCounter > BMG_MAJORITY_OF_COUNTS_CHECKS) ? TRUE : FALSE ); 10003c40: 490c ldr r1, [pc, #48] ; (10003c74 <__ghs_eofn_Bmg_BootStatus_waitForRAMAppl+0x4>) 10003c42: 7808 ldrb r0, [r1, #0] 10003c44: 2804 cmp r0, #4 10003c46: d801 bhi.n 10003c4c 10003c48: 2000 movs r0, #0 10003c4a: e000 b.n 10003c4e <..lin.bedcd56e..4da1450e.0_9> 10003c4c: 2001 movs r0, #1 10003c4e <..lin.bedcd56e..4da1450e.0_9>: 10003c4e: 4770 bx lr 10003c50 : return ( (Bmg_MountingSideRightCounter > BMG_MAJORITY_OF_COUNTS_CHECKS) ? TRUE : FALSE ); 10003c50: 4909 ldr r1, [pc, #36] ; (10003c78 <__ghs_eofn_Bmg_BootStatus_waitForRAMAppl+0x8>) 10003c52: 7808 ldrb r0, [r1, #0] 10003c54: 2804 cmp r0, #4 10003c56: d801 bhi.n 10003c5c 10003c58: 2000 movs r0, #0 10003c5a: e000 b.n 10003c5e <..lin.bedcd56e..238ae81.0_10> 10003c5c: 2001 movs r0, #1 10003c5e <..lin.bedcd56e..238ae81.0_10>: 10003c5e: 4770 bx lr 10003c60 : // --------------------------------------------------------------------------- boolean Bmg_BootStatus_waitForRAMAppl(void) { //if most of the samples match the condition returns true return ( (Bmg_WaitForRAMApplCounter > BMG_MAJORITY_OF_COUNTS_CHECKS) ? TRUE : FALSE ); 10003c60: 4906 ldr r1, [pc, #24] ; (10003c7c <__ghs_eofn_Bmg_BootStatus_waitForRAMAppl+0xc>) 10003c62: 7808 ldrb r0, [r1, #0] 10003c64: 2804 cmp r0, #4 10003c66: d801 bhi.n 10003c6c 10003c68: 2000 movs r0, #0 10003c6a: e000 b.n 10003c6e <..lin.bedcd56e..a8785c1a.0_11> 10003c6c: 2001 movs r0, #1 10003c6e <..lin.bedcd56e..a8785c1a.0_11>: 10003c6e: 4770 bx lr 10003c70 <__ghs_eofn_Bmg_BootStatus_waitForRAMAppl>: 10003c70: 1694 asrs r4, r2, #26 10003c72: 0800 lsrs r0, r0, #32 10003c74: 169e asrs r6, r3, #26 10003c76: 0800 lsrs r0, r0, #32 10003c78: 169c asrs r4, r3, #26 10003c7a: 0800 lsrs r0, r0, #32 10003c7c: 169f asrs r7, r3, #26 10003c7e: 0800 lsrs r0, r0, #32 10003c80 : uint8 ApplCmd_Change_Level( MsgContextType *const pMsgContext ) { // PRQA S 3112 1 // parameter not used at the moment (void) pMsgContext; return 0U; 10003c80: 2000 movs r0, #0 10003c82: 4770 bx lr 10003c84 : /// /// \return uint8 //----------------------------------------------------------------------------- // PRQA S 5336 L_STMIF // Program architecture and readability uint8 AppCmd_Execute(uint8_t cmdID, uint8_t cmdList, MsgContextType *const pMsgContext) { 10003c84: b5f0 push {r4, r5, r6, r7, lr} 10003c86: b084 sub sp, #16 10003c88: 466b mov r3, sp 10003c8a: 70d8 strb r0, [r3, #3] 10003c8c: 9103 str r1, [sp, #12] 10003c8e: 9202 str r2, [sp, #8] 10003c90: 4d32 ldr r5, [pc, #200] ; (10003d5c <__ghs_eofn_AppCmd_Execute>) static uint16_t cmdLevelCounter = 0U; uint8 ResponseCode = 0x11u ;/*service not supported*/ 10003c92: 2711 movs r7, #17 uint16 Idx; uint16 IdxMax = Cmd_LevelRange[cmdList]; 10003c94: 004b lsls r3, r1, #1 10003c96: 462c mov r4, r5 10003c98: 340c adds r4, #12 10003c9a: 5b1e ldrh r6, [r3, r4] tApplCmd *usedLevel = fctCmd_Level[cmdList]; 10003c9c: 008c lsls r4, r1, #2 10003c9e: 1d28 adds r0, r5, #4 10003ca0: 8829 ldrh r1, [r5, #0] if (cmdLevelCounter < ((uint16)eMaxCmdLevel)) 10003ca2: 5824 ldr r4, [r4, r0] 10003ca4: 2902 cmp r1, #2 10003ca6: d256 bcs.n 10003d56 <..lin.9dea5a79..e7485e6c.0_3+0xe> 10003ca8 <..lin.9dea5a79..e7485e6c.0_1>: { cmdLevelCounter++; 10003ca8: 3101 adds r1, #1 for (Idx = 0; Idx < IdxMax; Idx++) 10003caa: 08b2 lsrs r2, r6, #2 10003cac: d013 beq.n 10003cd6 <..lin.9dea5a79..e7485e6c.0_1+0x2e> 10003cae: 4668 mov r0, sp 10003cb0: 78c3 ldrb r3, [r0, #3] 10003cb2: 6820 ldr r0, [r4, #0] 10003cb4: 4298 cmp r0, r3 10003cb6: d016 beq.n 10003ce6 <..lin.9dea5a79..e7485e6c.0_1+0x3e> 10003cb8: 68e0 ldr r0, [r4, #12] 10003cba: 340c adds r4, #12 10003cbc: 4298 cmp r0, r3 10003cbe: d012 beq.n 10003ce6 <..lin.9dea5a79..e7485e6c.0_1+0x3e> 10003cc0: 68e0 ldr r0, [r4, #12] 10003cc2: 340c adds r4, #12 10003cc4: 4298 cmp r0, r3 10003cc6: d00e beq.n 10003ce6 <..lin.9dea5a79..e7485e6c.0_1+0x3e> 10003cc8: 68e0 ldr r0, [r4, #12] 10003cca: 340c adds r4, #12 10003ccc: 4298 cmp r0, r3 10003cce: d00a beq.n 10003ce6 <..lin.9dea5a79..e7485e6c.0_1+0x3e> 10003cd0: 340c adds r4, #12 10003cd2: 3a01 subs r2, #1 10003cd4: d1ed bne.n 10003cb2 <..lin.9dea5a79..e7485e6c.0_1+0xa> 10003cd6: 07b2 lsls r2, r6, #30 10003cd8: 0f92 lsrs r2, r2, #30 10003cda: d019 beq.n 10003d10 <..lin.9dea5a79..e7485e6c.0_2> 10003cdc: 4668 mov r0, sp 10003cde: 78c3 ldrb r3, [r0, #3] 10003ce0: 6820 ldr r0, [r4, #0] 10003ce2: 4298 cmp r0, r3 10003ce4: d111 bne.n 10003d0a <..lin.9dea5a79..e7485e6c.0_1+0x62> 10003ce6: 7963 ldrb r3, [r4, #5] 10003ce8: 2b01 cmp r3, #1 10003cea: d114 bne.n 10003d16 <..lin.9dea5a79..e7485e6c.0_2+0x6> 10003cec: 7c2b ldrb r3, [r5, #16] 10003cee: 2b00 cmp r3, #0 10003cf0: d111 bne.n 10003d16 <..lin.9dea5a79..e7485e6c.0_2+0x6> 10003cf2: 277f movs r7, #127 ; 0x7f 10003cf4: 3901 subs r1, #1 10003cf6: 8029 strh r1, [r5, #0] 10003cf8: e02d b.n 10003d56 <..lin.9dea5a79..e7485e6c.0_3+0xe> 10003cfa: 68a3 ldr r3, [r4, #8] 10003cfc: 4798 blx r3 10003cfe: 8829 ldrh r1, [r5, #0] 10003d00: 3901 subs r1, #1 10003d02: 8029 strh r1, [r5, #0] 10003d04: 1e07 subs r7, r0, #0 10003d06: d126 bne.n 10003d56 <..lin.9dea5a79..e7485e6c.0_3+0xe> 10003d08: e01e b.n 10003d48 <..lin.9dea5a79..e7485e6c.0_3> 10003d0a: 340c adds r4, #12 10003d0c: 3a01 subs r2, #1 10003d0e: d1e7 bne.n 10003ce0 <..lin.9dea5a79..e7485e6c.0_1+0x38> 10003d10 <..lin.9dea5a79..e7485e6c.0_2>: } break; } usedLevel++; } cmdLevelCounter--; 10003d10: 3901 subs r1, #1 10003d12: 8029 strh r1, [r5, #0] if (ResponseCode == 0U) 10003d14: e01f b.n 10003d56 <..lin.9dea5a79..e7485e6c.0_3+0xe> 10003d16: 9803 ldr r0, [sp, #12] 10003d18: 7923 ldrb r3, [r4, #4] 10003d1a: 8029 strh r1, [r5, #0] 10003d1c: 4298 cmp r0, r3 10003d1e: 9802 ldr r0, [sp, #8] 10003d20: d0eb beq.n 10003cfa <..lin.9dea5a79..e7485e6c.0_1+0x52> 10003d22: b2c9 uxtb r1, r1 10003d24: 4606 mov r6, r0 10003d26: 4603 mov r3, r0 10003d28: 466a mov r2, sp 10003d2a: 3203 adds r2, #3 10003d2c: 2000 movs r0, #0 10003d2e: f7ff f9ef bl 10003110 10003d32: 4668 mov r0, sp 10003d34: 78c0 ldrb r0, [r0, #3] 10003d36: 7921 ldrb r1, [r4, #4] 10003d38: 4632 mov r2, r6 10003d3a: f7ff ffa3 bl 10003c84 10003d3e: 8829 ldrh r1, [r5, #0] 10003d40: 3901 subs r1, #1 10003d42: 8029 strh r1, [r5, #0] 10003d44: 1e07 subs r7, r0, #0 10003d46: d106 bne.n 10003d56 <..lin.9dea5a79..e7485e6c.0_3+0xe> 10003d48 <..lin.9dea5a79..e7485e6c.0_3>: { ComBuf_TxPosResp(APPL_USED_COMBUF_ID, (uint8) cmdLevelCounter, cmdID, pMsgContext); 10003d48: 4668 mov r0, sp 10003d4a: 9b02 ldr r3, [sp, #8] 10003d4c: 78c2 ldrb r2, [r0, #3] 10003d4e: b2c9 uxtb r1, r1 10003d50: 4638 mov r0, r7 10003d52: f7ff f964 bl 1000301e } } return ResponseCode; 10003d56: 4638 mov r0, r7 10003d58: b004 add sp, #16 10003d5a: bdf0 pop {r4, r5, r6, r7, pc} 10003d5c <__ghs_eofn_AppCmd_Execute>: 10003d5c: 173c asrs r4, r7, #28 10003d5e: 0800 lsrs r0, r0, #32 10003d60 : /// \return uint8 //----------------------------------------------------------------------------- // PRQA S 1503 2 // not used at the moment // PRQA S 3408 1 // It is actually being declared using macros uint8 ApplCmd_AlFlasher_CheckKey( MsgContextType *const pMsgContext ) { 10003d60: b510 push {r4, lr} uint8 ret = 0x31u; /*DCM_E_REQUESTOUTOFRANGE*/ 10003d62: 2431 movs r4, #49 ; 0x31 static const uint8 Key[16U] = { 0x61U, 0x78U, 0x6CU, 0x6DU, 0x63U, 0x68U, 0x61U, 0x6EU, 0x67U, 0x65U, 0x64U, 0x74U, 0x68U, 0x69U, 0x73U, 0x13U }; if( memcmp( pMsgContext->reqData, Key, (uint8)sizeof(Key) ) == (int)0 ) 10003d64: 498b ldr r1, [pc, #556] ; (10003f94 <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl+0x2>) 10003d66: 6800 ldr r0, [r0, #0] 10003d68: 2210 movs r2, #16 10003d6a: f000 fc9d bl 100046a8 10003d6e: 2800 cmp r0, #0 10003d70: d108 bne.n 10003d84 <..lin.f9b4c22a..c5bc7a9d.0_1+0x12> 10003d72 <..lin.f9b4c22a..c5bc7a9d.0_1>: { boLoginActivated = TRUE; 10003d72: 4989 ldr r1, [pc, #548] ; (10003f98 <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl+0x6>) 10003d74: 2001 movs r0, #1 10003d76: 2400 movs r4, #0 ret = 0x00u; 10003d78: 7008 strb r0, [r1, #0] SBC_disable_watchdog(); 10003d7a: f7ff f87b bl 10002e74 Can_Cycle_SetDownloadIsInProgress(TRUE); 10003d7e: 2001 movs r0, #1 10003d80: f7fd fda9 bl 100018d6 } return ret; 10003d84: 4620 mov r0, r4 10003d86: bd10 pop {r4, pc} 10003d88 <__ApplCmd_Uint32ToByteArray_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjApplCmd_AlFlasher_inf>: //============================================================================= // Private functions declaration //============================================================================= static uint8 ApplCmd_Uint32ToByteArray ( uint8* dest, const uint32 src, boolean LSBfirst) { 10003d88: b530 push {r4, r5, lr} if (LSBfirst == TRUE) 10003d8a: 0e0b lsrs r3, r1, #24 10003d8c: 0c0c lsrs r4, r1, #16 10003d8e: 0a0d lsrs r5, r1, #8 10003d90: 2a01 cmp r2, #1 10003d92: d102 bne.n 10003d9a <..lin.f9b4c22a..f14cb230.0_3> 10003d94 <..lin.f9b4c22a..f14cb230.0_2>: { dest[3] = (uint8)( src >> 24u ); dest[2] = (uint8)( src >> 16u ); dest[1] = (uint8)( src >> 8u ); 10003d94: 7045 strb r5, [r0, #1] dest[0] = (uint8)( src ); 10003d96: 7001 strb r1, [r0, #0] 10003d98: e003 b.n 10003da2 <..lin.f9b4c22a..f14cb230.0_3+0x8> 10003d9a <..lin.f9b4c22a..f14cb230.0_3>: } else { dest[0] = (uint8)( src >> 24u ); 10003d9a: 7003 strb r3, [r0, #0] dest[1] = (uint8)( src >> 16u ); 10003d9c: 7044 strb r4, [r0, #1] dest[2] = (uint8)( src >> 8u ); dest[3] = (uint8)( src ); 10003d9e: 460b mov r3, r1 10003da0: 462c mov r4, r5 } return 4u; 10003da2: 70c3 strb r3, [r0, #3] 10003da4: 7084 strb r4, [r0, #2] 10003da6: 2004 movs r0, #4 10003da8: bd30 pop {r4, r5, pc} 10003daa : if( pMsgContext->reqDataLen != 0u ) 10003daa: 8881 ldrh r1, [r0, #4] 10003dac: 2900 cmp r1, #0 10003dae: d001 beq.n 10003db4 <..lin.f9b4c22a..4f6b8e1f.0_5> 10003db0 <..lin.f9b4c22a..4f6b8e1f.0_4>: ret = 0x13u ;/*DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT*/ 10003db0: 2013 movs r0, #19 10003db2: e00c b.n 10003dce <..lin.f9b4c22a..4f6b8e1f.0_5+0x1a> 10003db4 <..lin.f9b4c22a..4f6b8e1f.0_5>: pMsgContext->resDataLen = ApplCmd_Uint32ToByteArray( &pMsgContext->resData[0], EftEcuInformation, FALSE); 10003db4: 4b79 ldr r3, [pc, #484] ; (10003f9c <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl+0xa>) 10003db6: 6881 ldr r1, [r0, #8] 10003db8: 681a ldr r2, [r3, #0] 10003dba: 0e13 lsrs r3, r2, #24 10003dbc: 700b strb r3, [r1, #0] 10003dbe: 0c13 lsrs r3, r2, #16 10003dc0: 704b strb r3, [r1, #1] 10003dc2: 0a13 lsrs r3, r2, #8 10003dc4: 708b strb r3, [r1, #2] 10003dc6: 70ca strb r2, [r1, #3] 10003dc8: 2104 movs r1, #4 10003dca: 8181 strh r1, [r0, #12] ret = 0; 10003dcc: 2000 movs r0, #0 return ret; 10003dce: 4770 bx lr 10003dd0 <__ApplCmd_ByteArrayToUint32_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjApplCmd_AlFlasher_inf>: /// \param LSBfirst /// /// \return uint32 //----------------------------------------------------------------------------- static uint32 ApplCmd_ByteArrayToUint32 (const uint8* data, boolean LSBfirst) { 10003dd0: b510 push {r4, lr} uint32 ulValue32; if (LSBfirst == TRUE) 10003dd2: 7802 ldrb r2, [r0, #0] 10003dd4: 7843 ldrb r3, [r0, #1] 10003dd6: 7884 ldrb r4, [r0, #2] 10003dd8: 78c0 ldrb r0, [r0, #3] 10003dda: 2901 cmp r1, #1 10003ddc: d105 bne.n 10003dea <..lin.f9b4c22a..dc489530.0_7> 10003dde <..lin.f9b4c22a..dc489530.0_6>: { ulValue32 = ( ((uint32)data[3] << 24u) 10003dde: 0600 lsls r0, r0, #24 10003de0: 0421 lsls r1, r4, #16 10003de2: 4308 orrs r0, r1 10003de4: 0219 lsls r1, r3, #8 10003de6: 4308 orrs r0, r1 10003de8: e004 b.n 10003df4 <..lin.f9b4c22a..dc489530.0_7+0xa> 10003dea <..lin.f9b4c22a..dc489530.0_7>: | ((uint32)data[0] ) ); } else { ulValue32 = ( ((uint32)data[0] << 24u) 10003dea: 0611 lsls r1, r2, #24 10003dec: 041a lsls r2, r3, #16 10003dee: 4311 orrs r1, r2 10003df0: 0222 lsls r2, r4, #8 10003df2: 430a orrs r2, r1 | ((uint32)data[1] << 16u) | ((uint32)data[2] << 8u) | ((uint32)data[3] ) ); } return ulValue32; 10003df4: 4310 orrs r0, r2 10003df6: bd10 pop {r4, pc} 10003df8 : if( pMsgContext->reqDataLen != 4u ) 10003df8: 8881 ldrh r1, [r0, #4] 10003dfa: 2904 cmp r1, #4 10003dfc: d001 beq.n 10003e02 <..lin.f9b4c22a..7fea5bab.0_9> 10003dfe <..lin.f9b4c22a..7fea5bab.0_8>: ret = 0x13u ;/*DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT*/ 10003dfe: 2013 movs r0, #19 10003e00: e00d b.n 10003e1e <..lin.f9b4c22a..7fea5bab.0_9+0x1c> 10003e02 <..lin.f9b4c22a..7fea5bab.0_9>: EftEcuInformation = ApplCmd_ByteArrayToUint32(&pMsgContext->reqData[0], FALSE); 10003e02: 6800 ldr r0, [r0, #0] 10003e04: 7842 ldrb r2, [r0, #1] 10003e06: 7801 ldrb r1, [r0, #0] 10003e08: 0609 lsls r1, r1, #24 10003e0a: 0412 lsls r2, r2, #16 10003e0c: 4311 orrs r1, r2 10003e0e: 7882 ldrb r2, [r0, #2] 10003e10: 0212 lsls r2, r2, #8 10003e12: 78c0 ldrb r0, [r0, #3] 10003e14: 4311 orrs r1, r2 10003e16: 4308 orrs r0, r1 10003e18: 4960 ldr r1, [pc, #384] ; (10003f9c <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl+0xa>) 10003e1a: 6008 str r0, [r1, #0] ret = 0; 10003e1c: 2000 movs r0, #0 return ret; 10003e1e: 4770 bx lr 10003e20 : { 10003e20: b510 push {r4, lr} 10003e22: 4b5e ldr r3, [pc, #376] ; (10003f9c <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl+0xa>) switch( pMsgContext->reqData[0] ) 10003e24: 6802 ldr r2, [r0, #0] 10003e26: 7814 ldrb r4, [r2, #0] 10003e28: 2cfe cmp r4, #254 ; 0xfe 10003e2a: d010 beq.n 10003e4e <..lin.f9b4c22a..fdda1f6b.0_11> 10003e2c: 4601 mov r1, r0 10003e2e: 2031 movs r0, #49 ; 0x31 10003e30: 2cff cmp r4, #255 ; 0xff 10003e32: d11d bne.n 10003e70 <..lin.f9b4c22a..fdda1f6b.0_13+0x18> 10003e34 <..lin.f9b4c22a..fdda1f6b.0_10>: pMsgContext->resDataLen = ApplCmd_Uint32ToByteArray( &pMsgContext->resData[0], EftEcuInformation, FALSE); 10003e34: 6888 ldr r0, [r1, #8] 10003e36: 681a ldr r2, [r3, #0] 10003e38: 0e13 lsrs r3, r2, #24 10003e3a: 7003 strb r3, [r0, #0] 10003e3c: 0c13 lsrs r3, r2, #16 10003e3e: 7043 strb r3, [r0, #1] 10003e40: 0a13 lsrs r3, r2, #8 10003e42: 7083 strb r3, [r0, #2] 10003e44: 70c2 strb r2, [r0, #3] 10003e46: 2004 movs r0, #4 10003e48: 8188 strh r0, [r1, #12] ret = 0; 10003e4a: 2000 movs r0, #0 return ret; 10003e4c: e010 b.n 10003e70 <..lin.f9b4c22a..fdda1f6b.0_13+0x18> 10003e4e <..lin.f9b4c22a..fdda1f6b.0_11>: if( pMsgContext->reqDataLen != 5u ) 10003e4e: 8880 ldrh r0, [r0, #4] 10003e50: 2805 cmp r0, #5 10003e52: d001 beq.n 10003e58 <..lin.f9b4c22a..fdda1f6b.0_13> 10003e54 <..lin.f9b4c22a..fdda1f6b.0_12>: ret = 0x13u ;/*DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT*/ 10003e54: 2013 movs r0, #19 10003e56: e00b b.n 10003e70 <..lin.f9b4c22a..fdda1f6b.0_13+0x18> 10003e58 <..lin.f9b4c22a..fdda1f6b.0_13>: EftEcuInformation = ApplCmd_ByteArrayToUint32(&pMsgContext->reqData[1], FALSE); 10003e58: 7850 ldrb r0, [r2, #1] 10003e5a: 7891 ldrb r1, [r2, #2] 10003e5c: 0600 lsls r0, r0, #24 10003e5e: 0409 lsls r1, r1, #16 10003e60: 4308 orrs r0, r1 10003e62: 78d1 ldrb r1, [r2, #3] 10003e64: 0209 lsls r1, r1, #8 10003e66: 4308 orrs r0, r1 10003e68: 7911 ldrb r1, [r2, #4] 10003e6a: 4308 orrs r0, r1 10003e6c: 6018 str r0, [r3, #0] ret = 0; 10003e6e: 2000 movs r0, #0 10003e70: bd10 pop {r4, pc} 10003e72 : { 10003e72: b570 push {r4, r5, r6, lr} const uint32 Dest = ApplCmd_ByteArrayToUint32(&pMsgContext->reqData[0], FALSE); 10003e74: 6801 ldr r1, [r0, #0] 10003e76: 6885 ldr r5, [r0, #8] 10003e78: 784b ldrb r3, [r1, #1] 10003e7a: 780a ldrb r2, [r1, #0] 10003e7c: 0612 lsls r2, r2, #24 10003e7e: 041b lsls r3, r3, #16 10003e80: 431a orrs r2, r3 10003e82: 788b ldrb r3, [r1, #2] 10003e84: 021b lsls r3, r3, #8 10003e86: 431a orrs r2, r3 10003e88: 78cb ldrb r3, [r1, #3] const uint32 Source = (uint32) &pMsgContext->reqData[APPLCMD_0xBD_DATA_OFFSET]; 10003e8a: 4313 orrs r3, r2 const uint16 unNumOfBytes = pMsgContext->reqDataLen - APPLCMD_0xBD_DATA_OFFSET; 10003e8c: 8882 ldrh r2, [r0, #4] 10003e8e: 3104 adds r1, #4 10003e90: 3a04 subs r2, #4 pMsgContext->resData[0] = 0u; 10003e92: b292 uxth r2, r2 10003e94: 2600 movs r6, #0 10003e96: 702e strb r6, [r5, #0] pMsgContext->resDataLen = 0u; 10003e98: 8186 strh r6, [r0, #12] 10003e9a: 4d41 ldr r5, [pc, #260] ; (10003fa0 <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl+0xe>) if( ((uint32) (Dest + unNumOfBytes) <= (uint32) (APPLCMD_ALFLASHER_DOWNLOAD2RAM_END)) 10003e9c: 2031 movs r0, #49 ; 0x31 10003e9e: 18d4 adds r4, r2, r3 10003ea0: 42ac cmp r4, r5 10003ea2: d806 bhi.n 10003eb2 <..lin.f9b4c22a..40d9a171.0_14+0x8> 10003ea4: 4c3f ldr r4, [pc, #252] ; (10003fa4 <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl+0x12>) 10003ea6: 42a3 cmp r3, r4 10003ea8: d303 bcc.n 10003eb2 <..lin.f9b4c22a..40d9a171.0_14+0x8> 10003eaa <..lin.f9b4c22a..40d9a171.0_14>: (void)memcpy((void*)Dest, (const void*)Source, (size_t)unNumOfBytes); 10003eaa: 4618 mov r0, r3 10003eac: f7fc fb03 bl 100004b6 ret = 0x0; 10003eb0: 4630 mov r0, r6 return ret; 10003eb2: bd70 pop {r4, r5, r6, pc} 10003eb4 : { 10003eb4: b570 push {r4, r5, r6, lr} 10003eb6: 4605 mov r5, r0 uint8 ret = 0x31u;/*DCM_E_REQUESTOUTOFRANGE*/ 10003eb8: 8880 ldrh r0, [r0, #4] if( pMsgContext->reqDataLen == 8u ) 10003eba: 2431 movs r4, #49 ; 0x31 10003ebc: 2808 cmp r0, #8 10003ebe: d13a bne.n 10003f36 <..lin.f9b4c22a..3201ad1c.0_16+0xe> 10003ec0 <..lin.f9b4c22a..3201ad1c.0_15>: const uint32 unStartAddr = ApplCmd_ByteArrayToUint32(&pMsgContext->reqData[0], FALSE); 10003ec0: 6828 ldr r0, [r5, #0] 10003ec2: 79c6 ldrb r6, [r0, #7] 10003ec4: 7842 ldrb r2, [r0, #1] 10003ec6: 7801 ldrb r1, [r0, #0] 10003ec8: 060c lsls r4, r1, #24 10003eca: 0412 lsls r2, r2, #16 10003ecc: 4314 orrs r4, r2 10003ece: 7882 ldrb r2, [r0, #2] 10003ed0: 0212 lsls r2, r2, #8 10003ed2: 4314 orrs r4, r2 10003ed4: 78c2 ldrb r2, [r0, #3] const uint32 Length = ApplCmd_ByteArrayToUint32(&pMsgContext->reqData[4], FALSE); 10003ed6: 4314 orrs r4, r2 10003ed8: 7901 ldrb r1, [r0, #4] 10003eda: 7942 ldrb r2, [r0, #5] 10003edc: 0609 lsls r1, r1, #24 10003ede: 0412 lsls r2, r2, #16 10003ee0: 4311 orrs r1, r2 10003ee2: 7982 ldrb r2, [r0, #6] 10003ee4: 0212 lsls r2, r2, #8 10003ee6: 4311 orrs r1, r2 10003ee8: 430e orrs r6, r1 uint32 crc32 = ApplCmd_AlFlasher_Crc32_Vector_AUTOSAR( (uint8 *)unStartAddr, Length, 0xFFFFFFFFuL, TRUE ); 10003eea: 4631 mov r1, r6 10003eec: 4620 mov r0, r4 10003eee: 2200 movs r2, #0 10003ef0: 43d2 mvns r2, r2 10003ef2: 2301 movs r3, #1 10003ef4: f7ff f800 bl 10002ef8 pMsgContext->resDataLen = ApplCmd_Uint32ToByteArray( &pMsgContext->resData[0], crc32, TRUE); 10003ef8: 68a9 ldr r1, [r5, #8] 10003efa: 0e02 lsrs r2, r0, #24 10003efc: 70ca strb r2, [r1, #3] 10003efe: 0c02 lsrs r2, r0, #16 10003f00: 708a strb r2, [r1, #2] 10003f02: 0a02 lsrs r2, r0, #8 10003f04: 7008 strb r0, [r1, #0] 10003f06: 704a strb r2, [r1, #1] 10003f08: 2004 movs r0, #4 10003f0a: 81a8 strh r0, [r5, #12] crc32 = ApplCmd_ByteArrayToUint32(&pMsgContext->resData[0], FALSE); 10003f0c: 68a8 ldr r0, [r5, #8] 10003f0e: 7842 ldrb r2, [r0, #1] 10003f10: 7801 ldrb r1, [r0, #0] 10003f12: 0609 lsls r1, r1, #24 10003f14: 0412 lsls r2, r2, #16 10003f16: 4311 orrs r1, r2 10003f18: 7882 ldrb r2, [r0, #2] 10003f1a: 0212 lsls r2, r2, #8 10003f1c: 78c0 ldrb r0, [r0, #3] 10003f1e: 4311 orrs r1, r2 10003f20: 4308 orrs r0, r1 if( crc32 == ( *(uint32*)( unStartAddr + Length ) ) ) 10003f22: 59a1 ldr r1, [r4, r6] 10003f24: 4288 cmp r0, r1 10003f26: d102 bne.n 10003f2e <..lin.f9b4c22a..3201ad1c.0_16+0x6> 10003f28 <..lin.f9b4c22a..3201ad1c.0_16>: boCrcOk = TRUE; 10003f28: 491f ldr r1, [pc, #124] ; (10003fa8 <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl+0x16>) 10003f2a: 2001 movs r0, #1 10003f2c: 7008 strb r0, [r1, #0] ret = 0x00u; 10003f2e: 2400 movs r4, #0 Can_Cycle_SetDownloadIsInProgress(FALSE); 10003f30: 4620 mov r0, r4 10003f32: f7fd fcd0 bl 100018d6 return ret; 10003f36: 4620 mov r0, r4 10003f38: bd70 pop {r4, r5, r6, pc} 10003f3a : { 10003f3a: b530 push {r4, r5, lr} if( boCrcOk == FALSE ) 10003f3c: 4a1a ldr r2, [pc, #104] ; (10003fa8 <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl+0x16>) 10003f3e: 7811 ldrb r1, [r2, #0] 10003f40: 2900 cmp r1, #0 10003f42: d101 bne.n 10003f48 <..lin.f9b4c22a..8bac93b1.0_17+0x4> 10003f44 <..lin.f9b4c22a..8bac93b1.0_17>: ret = 0x10u;/*DCM_E_GENERALREJECT*/ 10003f44: 2010 movs r0, #16 10003f46: e023 b.n 10003f90 <..lin.f9b4c22a..8bac93b1.0_19+0x3c> 10003f48: 4604 mov r4, r0 10003f4a <..lin.f9b4c22a..8bac93b1.0_18>: else if( pMsgContext->reqData[0] == 0x1U ) // PAV mode 10003f4a: 6821 ldr r1, [r4, #0] 10003f4c: 2031 movs r0, #49 ; 0x31 10003f4e: 780a ldrb r2, [r1, #0] 10003f50: 2a01 cmp r2, #1 10003f52: d11d bne.n 10003f90 <..lin.f9b4c22a..8bac93b1.0_19+0x3c> 10003f54 <..lin.f9b4c22a..8bac93b1.0_19>: uint32 * u32StartupCodeStartingAddress = (uint32 *) (4U + ApplCmd_ByteArrayToUint32(&pMsgContext->reqData[1], FALSE)); 10003f54: 7848 ldrb r0, [r1, #1] 10003f56: 788a ldrb r2, [r1, #2] 10003f58: 0605 lsls r5, r0, #24 10003f5a: 0412 lsls r2, r2, #16 10003f5c: 4315 orrs r5, r2 10003f5e: 78ca ldrb r2, [r1, #3] 10003f60: 0212 lsls r2, r2, #8 10003f62: 7909 ldrb r1, [r1, #4] 10003f64: 4315 orrs r5, r2 10003f66: 430d orrs r5, r1 ApplCmd_SignalRunRamApplication( ); 10003f68: f7ff f81d bl 10002fa6 const uint32 u32JumpAddr = (uint32)*u32StartupCodeStartingAddress; 10003f6c: 6821 ldr r1, [r4, #0] *CM0P_SCS_VTOR = ApplCmd_ByteArrayToUint32(&pMsgContext->reqData[1], FALSE); 10003f6e: 788b ldrb r3, [r1, #2] 10003f70: 784a ldrb r2, [r1, #1] 10003f72: 0612 lsls r2, r2, #24 10003f74: 041b lsls r3, r3, #16 10003f76: 431a orrs r2, r3 10003f78: 78cb ldrb r3, [r1, #3] 10003f7a: 021b lsls r3, r3, #8 10003f7c: 7909 ldrb r1, [r1, #4] 10003f7e: 431a orrs r2, r3 10003f80: 4311 orrs r1, r2 10003f82: 4a0a ldr r2, [pc, #40] ; (10003fac <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl+0x1a>) 10003f84: 6868 ldr r0, [r5, #4] 10003f86: 6011 str r1, [r2, #0] ((function_type) (u32JumpAddr | 0x1U))(); // PRQA S 305 1 // Cast from uint32 to function pointer type is required. 10003f88: 2201 movs r2, #1 10003f8a: 4310 orrs r0, r2 10003f8c: 4780 blx r0 ret = 0x0; 10003f8e: 2000 movs r0, #0 return ret; 10003f90: bd30 pop {r4, r5, pc} 10003f92 <__ghs_eofn_ApplCmd_AlFlasher_Jump2RamAppl>: 10003f92: bf00 nop 10003f94: 6a38 ldr r0, [r7, #32] 10003f96: 1000 asrs r0, r0, #32 10003f98: 174c asrs r4, r1, #29 10003f9a: 0800 lsrs r0, r0, #32 10003f9c: 16a0 asrs r0, r4, #26 10003f9e: 0800 lsrs r0, r0, #32 10003fa0: ffff 0801 vtbl.8 d16, {d15}, d1 10003fa4: 8000 strh r0, [r0, #0] 10003fa6: 0800 lsrs r0, r0, #32 10003fa8: 16a4 asrs r4, r4, #26 10003faa: 0800 lsrs r0, r0, #32 10003fac: ed08 e000 stc 0, cr14, [r8, #-0] 10003fb0 <__DiagR_CalcSrcAddressForVirtID_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjApplCmd_Rdm_inf>: static uint8 DiagR_CalcSrcAddressForVirtID(uint8** ppSrc, const tpfnGetVirtData* pfnGetVirtData, uint32 ulAdr, uint32 ulNumOfBytes, uint8 ucMaxTableEntries) { 10003fb0: b5f0 push {r4, r5, r6, r7, lr} 10003fb2: b081 sub sp, #4 10003fb4: 4607 mov r7, r0 10003fb6: 461e mov r6, r3 uint8 ResponseCode = 0x22; 10003fb8: 2422 movs r4, #34 ; 0x22 uint8 ucVirtID = (uint8)((ulAdr >> RDM_BITPOS_VIRT_ID) & RDM_VIRT_ID_MASK); 10003fba: 03d0 lsls r0, r2, #15 10003fbc: 0ec0 lsrs r0, r0, #27 uint16 ulAddressOffset = (uint16)(ulAdr & RDM_ADDROFFSET_MASK); 10003fbe: ab06 add r3, sp, #24 10003fc0: 0515 lsls r5, r2, #20 /* ID is in range? */ if(ucVirtID < ucMaxTableEntries) 10003fc2: 781b ldrb r3, [r3, #0] 10003fc4: 0d2d lsrs r5, r5, #20 10003fc6: 4298 cmp r0, r3 10003fc8: d210 bcs.n 10003fec <..lin.e84a711b..39b2a006.0_3+0x6> 10003fca <..lin.e84a711b..39b2a006.0_1>: { uint32 ulSize = 0; 10003fca: 2200 movs r2, #0 10003fcc: 0080 lsls r0, r0, #2 uint8* pucStartAddress = (uint8*)0; /* Check if entry exists in table. Reserved entries have NULL as value. */ if (pfnGetVirtData[ucVirtID] != NULL_PTR) 10003fce: 5841 ldr r1, [r0, r1] 10003fd0: 9200 str r2, [sp, #0] 10003fd2: 2900 cmp r1, #0 10003fd4: d00a beq.n 10003fec <..lin.e84a711b..39b2a006.0_3+0x6> 10003fd6 <..lin.e84a711b..39b2a006.0_2>: { /* Get the start address. */ pucStartAddress = (uint8*)(pfnGetVirtData[ucVirtID])(&ulSize); 10003fd6: 4668 mov r0, sp 10003fd8: 4788 blx r1 } /* Verify address and length. */ if ( (pucStartAddress != (uint8*)0) && 10003fda: 2800 cmp r0, #0 10003fdc: d006 beq.n 10003fec <..lin.e84a711b..39b2a006.0_3+0x6> 10003fde: 9a00 ldr r2, [sp, #0] 10003fe0: 19a9 adds r1, r5, r6 10003fe2: 4291 cmp r1, r2 10003fe4: d802 bhi.n 10003fec <..lin.e84a711b..39b2a006.0_3+0x6> 10003fe6 <..lin.e84a711b..39b2a006.0_3>: ( (ulAddressOffset + ulNumOfBytes) <= ulSize) ) { *ppSrc = (uint8*)&pucStartAddress[ulAddressOffset]; 10003fe6: 1828 adds r0, r5, r0 10003fe8: 6038 str r0, [r7, #0] ResponseCode = 0; 10003fea: 2400 movs r4, #0 } } return ResponseCode; 10003fec: 4620 mov r0, r4 10003fee: b001 add sp, #4 10003ff0: bdf0 pop {r4, r5, r6, r7, pc} 10003ff2 : { 10003ff2: b5f0 push {r4, r5, r6, r7, lr} 10003ff4: b084 sub sp, #16 10003ff6: 9003 str r0, [sp, #12] const uint8 *pucReqData = pMsgContext->reqData; 10003ff8: 8882 ldrh r2, [r0, #4] const uint16 unReqDataLen = pMsgContext->reqDataLen; 10003ffa: 6801 ldr r1, [r0, #0] 10003ffc: 9202 str r2, [sp, #8] uint8 *pucResData = pMsgContext->resData; 10003ffe: 6884 ldr r4, [r0, #8] 10004000: 780a ldrb r2, [r1, #0] uint8 ucNumberOfBytesForAdr = pucReqData[0u + APPLCMD_RDM_MESSAGE_OFFSET] & 0x0fu; 10004002: 2000 movs r0, #0 10004004: 0716 lsls r6, r2, #28 10004006: 0f36 lsrs r6, r6, #28 const uint8 ucNumberOfBytesForLen = (pucReqData[0U + APPLCMD_RDM_MESSAGE_OFFSET] >> 4U); 10004008: 1117 asrs r7, r2, #4 const uint8 *const pucLenInfo = &pucReqData[1U + APPLCMD_RDM_MESSAGE_OFFSET] + ucNumberOfBytesForAdr; 1000400a: 1872 adds r2, r6, r1 1000400c: 1c53 adds r3, r2, #1 uint8* pReadAddress = (uint8*) 0u; 1000400e: 9001 str r0, [sp, #4] ulAdr = (ucNumberOfBytesForAdr == 1U) ? ((uint32)pucReqData[1U]<< 0U) : 10004010: 2e01 cmp r6, #1 10004012: d103 bne.n 1000401c 10004014: 784a ldrb r2, [r1, #1] 10004016: 2f01 cmp r7, #1 10004018: d123 bne.n 10004062 1000401a: e02f b.n 1000407c <..lin.e84a711b..598cf6b8.0_4+0x4> 1000401c: 2e02 cmp r6, #2 1000401e: d106 bne.n 1000402e 10004020: 784a ldrb r2, [r1, #1] 10004022: 7889 ldrb r1, [r1, #2] 10004024: 0212 lsls r2, r2, #8 10004026: 430a orrs r2, r1 10004028: 2f01 cmp r7, #1 1000402a: d11a bne.n 10004062 1000402c: e026 b.n 1000407c <..lin.e84a711b..598cf6b8.0_4+0x4> 1000402e: 2e03 cmp r6, #3 10004030: d109 bne.n 10004046 10004032: 784a ldrb r2, [r1, #1] 10004034: 788d ldrb r5, [r1, #2] 10004036: 0412 lsls r2, r2, #16 10004038: 022d lsls r5, r5, #8 1000403a: 78c9 ldrb r1, [r1, #3] 1000403c: 432a orrs r2, r5 1000403e: 430a orrs r2, r1 10004040: 2f01 cmp r7, #1 10004042: d10e bne.n 10004062 10004044: e01a b.n 1000407c <..lin.e84a711b..598cf6b8.0_4+0x4> 10004046: 2e04 cmp r6, #4 10004048: d115 bne.n 10004076 1000404a: 784a ldrb r2, [r1, #1] 1000404c: 788d ldrb r5, [r1, #2] 1000404e: 0612 lsls r2, r2, #24 10004050: 042d lsls r5, r5, #16 10004052: 432a orrs r2, r5 10004054: 78cd ldrb r5, [r1, #3] 10004056: 022d lsls r5, r5, #8 10004058: 7909 ldrb r1, [r1, #4] 1000405a: 432a orrs r2, r5 1000405c: 430a orrs r2, r1 1000405e: 2f01 cmp r7, #1 10004060: d00c beq.n 1000407c <..lin.e84a711b..598cf6b8.0_4+0x4> 10004062: 2f02 cmp r7, #2 10004064: d10f bne.n 10004086 <..lin.e84a711b..598cf6b8.0_4+0xe> 10004066: 7819 ldrb r1, [r3, #0] 10004068: 785b ldrb r3, [r3, #1] 1000406a: 020d lsls r5, r1, #8 1000406c: 431d orrs r5, r3 1000406e: 43c1 mvns r1, r0 10004070: 1c53 adds r3, r2, #1 10004072: d129 bne.n 100040c8 <..lin.e84a711b..598cf6b8.0_5+0x6> 10004074: e02a b.n 100040cc <..lin.e84a711b..598cf6b8.0_6> 10004076: 43c2 mvns r2, r0 10004078 <..lin.e84a711b..598cf6b8.0_4>: ulNumOfBytes = (ucNumberOfBytesForLen == 1U) ? ((uint32)pucLenInfo[0U] << 0U) : 10004078: 2f01 cmp r7, #1 1000407a: d1f2 bne.n 10004062 1000407c: 781d ldrb r5, [r3, #0] 1000407e: 43c1 mvns r1, r0 10004080: 1c53 adds r3, r2, #1 10004082: d121 bne.n 100040c8 <..lin.e84a711b..598cf6b8.0_5+0x6> 10004084: e022 b.n 100040cc <..lin.e84a711b..598cf6b8.0_6> 10004086: 2f03 cmp r7, #3 10004088: d10a bne.n 100040a0 <..lin.e84a711b..598cf6b8.0_4+0x28> 1000408a: 7819 ldrb r1, [r3, #0] 1000408c: 785d ldrb r5, [r3, #1] 1000408e: 0409 lsls r1, r1, #16 10004090: 022d lsls r5, r5, #8 10004092: 789b ldrb r3, [r3, #2] 10004094: 430d orrs r5, r1 10004096: 431d orrs r5, r3 10004098: 43c1 mvns r1, r0 1000409a: 1c53 adds r3, r2, #1 1000409c: d114 bne.n 100040c8 <..lin.e84a711b..598cf6b8.0_5+0x6> 1000409e: e015 b.n 100040cc <..lin.e84a711b..598cf6b8.0_6> 100040a0: 2f04 cmp r7, #4 100040a2: d10d bne.n 100040c0 <..lin.e84a711b..598cf6b8.0_4+0x48> 100040a4: 7819 ldrb r1, [r3, #0] 100040a6: 785d ldrb r5, [r3, #1] 100040a8: 0609 lsls r1, r1, #24 100040aa: 042d lsls r5, r5, #16 100040ac: 4329 orrs r1, r5 100040ae: 789d ldrb r5, [r3, #2] 100040b0: 022d lsls r5, r5, #8 100040b2: 78db ldrb r3, [r3, #3] 100040b4: 430d orrs r5, r1 100040b6: 431d orrs r5, r3 100040b8: 43c1 mvns r1, r0 100040ba: 1c53 adds r3, r2, #1 100040bc: d104 bne.n 100040c8 <..lin.e84a711b..598cf6b8.0_5+0x6> 100040be: e005 b.n 100040cc <..lin.e84a711b..598cf6b8.0_6> 100040c0: 43c5 mvns r5, r0 100040c2 <..lin.e84a711b..598cf6b8.0_5>: if ( (ulAdr == (uint32)0xffffffffu) || (ulNumOfBytes == (uint32)0xffffffffu) ) 100040c2: 4629 mov r1, r5 100040c4: 1c53 adds r3, r2, #1 100040c6: d001 beq.n 100040cc <..lin.e84a711b..598cf6b8.0_6> 100040c8: 428d cmp r5, r1 100040ca: d101 bne.n 100040d0 <..lin.e84a711b..598cf6b8.0_7> 100040cc <..lin.e84a711b..598cf6b8.0_6>: ResponseCode = 0x31u; //DCM_E_REQUESTOUTOFRANGE; 100040cc: 2031 movs r0, #49 ; 0x31 100040ce: e075 b.n 100041bc <..lin.e84a711b..598cf6b8.0_17> 100040d0 <..lin.e84a711b..598cf6b8.0_7>: else if (unReqDataLen != (uint16)(1U + (uint16)ucNumberOfBytesForAdr + (uint16)ucNumberOfBytesForLen)) 100040d0: 19b9 adds r1, r7, r6 100040d2: 9b02 ldr r3, [sp, #8] 100040d4: 3101 adds r1, #1 100040d6: 428b cmp r3, r1 100040d8: d001 beq.n 100040de <..lin.e84a711b..598cf6b8.0_9> 100040da <..lin.e84a711b..598cf6b8.0_8>: ResponseCode = 0x13u; //DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT; 100040da: 2013 movs r0, #19 100040dc: e06e b.n 100041bc <..lin.e84a711b..598cf6b8.0_17> 100040de <..lin.e84a711b..598cf6b8.0_9>: const boolean boAddressIsInRam = (boolean) ((( RDM_RAM_BEGIN <= ulAdr ) && ( ulAdr < RDM_RAM_END )) ? TRUE : FALSE); 100040de: 4603 mov r3, r0 100040e0: 2101 movs r1, #1 100040e2: 4eb4 ldr r6, [pc, #720] ; (100043b4 <__ghs_eofn_ApplCmd_Rdm_SecurityAccess>) 100040e4: 06c9 lsls r1, r1, #27 100040e6: 1a51 subs r1, r2, r1 100040e8: 42b1 cmp r1, r6 100040ea: d200 bcs.n 100040ee <..lin.e84a711b..598cf6b8.0_10> 100040ec: 2301 movs r3, #1 100040ee <..lin.e84a711b..598cf6b8.0_10>: const boolean boAddressIsInReg = (boolean) ((( RDM_REG_BEGIN <= ulAdr ) && ( ulAdr < RDM_REG_END )) ? TRUE : FALSE); 100040ee: 4606 mov r6, r0 100040f0: 2101 movs r1, #1 100040f2: 4fb1 ldr r7, [pc, #708] ; (100043b8 <__ghs_eofn_ApplCmd_Rdm_SecurityAccess+0x4>) 100040f4: 0789 lsls r1, r1, #30 100040f6: 1a51 subs r1, r2, r1 100040f8: 42b9 cmp r1, r7 100040fa: d200 bcs.n 100040fe <..lin.e84a711b..598cf6b8.0_10+0x10> 100040fc: 2601 movs r6, #1 100040fe: b401 push {r0} 10004100 <..lin.e84a711b..598cf6b8.0_11>: const boolean boAddressIsInRom = (boolean) ((( RDM_ROM_BEGIN <= ulAdr ) && ( ulAdr < RDM_ROM_END )) ? TRUE : FALSE); 10004100: 2701 movs r7, #1 10004102: 49ae ldr r1, [pc, #696] ; (100043bc <__ghs_eofn_ApplCmd_Rdm_SecurityAccess+0x8>) 10004104: 073f lsls r7, r7, #28 10004106: 1bd7 subs r7, r2, r7 10004108: 428f cmp r7, r1 1000410a: bc02 pop {r1} 1000410c: d200 bcs.n 10004110 <..lin.e84a711b..598cf6b8.0_12> 1000410e: 2101 movs r1, #1 10004110 <..lin.e84a711b..598cf6b8.0_12>: if ( (boAddressIsInRam == TRUE) // RAM area 10004110: 2b01 cmp r3, #1 10004112: d003 beq.n 1000411c <..lin.e84a711b..598cf6b8.0_13> 10004114: 2901 cmp r1, #1 10004116: d001 beq.n 1000411c <..lin.e84a711b..598cf6b8.0_13> 10004118: 2e01 cmp r6, #1 1000411a: d103 bne.n 10004124 <..lin.e84a711b..598cf6b8.0_14> 1000411c <..lin.e84a711b..598cf6b8.0_13>: pReadAddress = (uint8*)(ulAdr); 1000411c: 9201 str r2, [sp, #4] 1000411e: 2a00 cmp r2, #0 10004120: d04c beq.n 100041bc <..lin.e84a711b..598cf6b8.0_17> 10004122: e011 b.n 10004148 <..lin.e84a711b..598cf6b8.0_16> 10004124 <..lin.e84a711b..598cf6b8.0_14>: if ( ( RDM_VIRT_ID_BEGIN <= ulAdr ) && ( ulAdr < (RDM_VIRT_ID_END) )) 10004124: 2022 movs r0, #34 ; 0x22 10004126: 213f movs r1, #63 ; 0x3f 10004128: 0489 lsls r1, r1, #18 1000412a: 1a51 subs r1, r2, r1 1000412c: 2301 movs r3, #1 1000412e: 045b lsls r3, r3, #17 10004130: 4299 cmp r1, r3 10004132: d243 bcs.n 100041bc <..lin.e84a711b..598cf6b8.0_17> 10004134 <..lin.e84a711b..598cf6b8.0_15>: ResponseCode = DiagR_CalcSrcAddressForVirtID(&pReadAddress, apfnGetVirtDataUserStructs, ulAdr, ulNumOfBytes, (uint8)eMaxCmdRdmList); 10004134: 2101 movs r1, #1 10004136: 9100 str r1, [sp, #0] 10004138: 49a1 ldr r1, [pc, #644] ; (100043c0 <__ghs_eofn_ApplCmd_Rdm_SecurityAccess+0xc>) 1000413a: 462b mov r3, r5 1000413c: a801 add r0, sp, #4 1000413e: f7ff ff37 bl 10003fb0 <__DiagR_CalcSrcAddressForVirtID_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjApplCmd_Rdm_inf> 10004142: 9a01 ldr r2, [sp, #4] if (pReadAddress != (uint8*) 0) 10004144: 2a00 cmp r2, #0 10004146: d039 beq.n 100041bc <..lin.e84a711b..598cf6b8.0_17> 10004148 <..lin.e84a711b..598cf6b8.0_16>: pMsgContext->resDataLen = (uint16)ulNumOfBytes; 10004148: 9b03 ldr r3, [sp, #12] 1000414a: 08e9 lsrs r1, r5, #3 while (ulNumOfBytes-- != 0U) 1000414c: 819d strh r5, [r3, #12] 1000414e: d02a beq.n 100041a6 <..lin.e84a711b..598cf6b8.0_16+0x5e> 10004150: 7812 ldrb r2, [r2, #0] 10004152: 7022 strb r2, [r4, #0] 10004154: 9a01 ldr r2, [sp, #4] 10004156: 3201 adds r2, #1 10004158: 9201 str r2, [sp, #4] 1000415a: 7812 ldrb r2, [r2, #0] 1000415c: 7062 strb r2, [r4, #1] 1000415e: 9a01 ldr r2, [sp, #4] 10004160: 3201 adds r2, #1 10004162: 9201 str r2, [sp, #4] 10004164: 7812 ldrb r2, [r2, #0] 10004166: 70a2 strb r2, [r4, #2] 10004168: 9a01 ldr r2, [sp, #4] 1000416a: 3201 adds r2, #1 1000416c: 9201 str r2, [sp, #4] 1000416e: 7812 ldrb r2, [r2, #0] 10004170: 70e2 strb r2, [r4, #3] 10004172: 9a01 ldr r2, [sp, #4] 10004174: 3201 adds r2, #1 10004176: 9201 str r2, [sp, #4] 10004178: 7812 ldrb r2, [r2, #0] 1000417a: 7122 strb r2, [r4, #4] 1000417c: 9a01 ldr r2, [sp, #4] 1000417e: 3201 adds r2, #1 10004180: 9201 str r2, [sp, #4] 10004182: 7812 ldrb r2, [r2, #0] 10004184: 7162 strb r2, [r4, #5] 10004186: 9a01 ldr r2, [sp, #4] 10004188: 3201 adds r2, #1 1000418a: 9201 str r2, [sp, #4] 1000418c: 7812 ldrb r2, [r2, #0] 1000418e: 71a2 strb r2, [r4, #6] 10004190: 9a01 ldr r2, [sp, #4] 10004192: 3201 adds r2, #1 10004194: 9201 str r2, [sp, #4] 10004196: 7812 ldrb r2, [r2, #0] 10004198: 71e2 strb r2, [r4, #7] 1000419a: 9a01 ldr r2, [sp, #4] 1000419c: 3201 adds r2, #1 1000419e: 9201 str r2, [sp, #4] 100041a0: 3408 adds r4, #8 100041a2: 3901 subs r1, #1 100041a4: d1d4 bne.n 10004150 <..lin.e84a711b..598cf6b8.0_16+0x8> 100041a6: 0769 lsls r1, r5, #29 100041a8: 0f49 lsrs r1, r1, #29 100041aa: d007 beq.n 100041bc <..lin.e84a711b..598cf6b8.0_17> 100041ac: 7812 ldrb r2, [r2, #0] 100041ae: 7022 strb r2, [r4, #0] 100041b0: 9a01 ldr r2, [sp, #4] 100041b2: 3201 adds r2, #1 100041b4: 9201 str r2, [sp, #4] 100041b6: 3401 adds r4, #1 100041b8: 3901 subs r1, #1 100041ba: d1f7 bne.n 100041ac <..lin.e84a711b..598cf6b8.0_16+0x64> 100041bc <..lin.e84a711b..598cf6b8.0_17>: return ResponseCode; 100041bc: b004 add sp, #16 100041be: bdf0 pop {r4, r5, r6, r7, pc} 100041c0 : { 100041c0: b5f0 push {r4, r5, r6, r7, lr} 100041c2: b084 sub sp, #16 100041c4: 9003 str r0, [sp, #12] const uint8 *pucReqData = pMsgContext->reqData; 100041c6: 4604 mov r4, r0 100041c8: 6801 ldr r1, [r0, #0] const uint16 unReqDataLen = pMsgContext->reqDataLen; 100041ca: 88a4 ldrh r4, [r4, #4] 100041cc: 9402 str r4, [sp, #8] { 100041ce: 780a ldrb r2, [r1, #0] const uint8 ucNumberOfBytesForLen = pucReqData[0U + APPLCMD_RDM_MESSAGE_OFFSET] >> 4U; 100041d0: 2000 movs r0, #0 100041d2: 1116 asrs r6, r2, #4 const uint8 ucNumberOfBytesForAdr = pucReqData[0U + APPLCMD_RDM_MESSAGE_OFFSET] & 0x0fU; 100041d4: 0715 lsls r5, r2, #28 100041d6: 0f2d lsrs r5, r5, #28 const uint8 *const pucLenInfo = &pucReqData[1U + APPLCMD_RDM_MESSAGE_OFFSET] + ucNumberOfBytesForAdr; 100041d8: 186a adds r2, r5, r1 100041da: 1c53 adds r3, r2, #1 ulAdr = (ucNumberOfBytesForAdr == 1U) ? ((uint32)pucReqData[1U + APPLCMD_RDM_MESSAGE_OFFSET]<< 0U) : 100041dc: 2d01 cmp r5, #1 100041de: d103 bne.n 100041e8 100041e0: 784a ldrb r2, [r1, #1] 100041e2: 2e01 cmp r6, #1 100041e4: d123 bne.n 1000422e 100041e6: e02f b.n 10004248 <..lin.e84a711b..1d89a7e7.0_18+0x4> 100041e8: 2d02 cmp r5, #2 100041ea: d106 bne.n 100041fa 100041ec: 784a ldrb r2, [r1, #1] 100041ee: 788c ldrb r4, [r1, #2] 100041f0: 0212 lsls r2, r2, #8 100041f2: 4322 orrs r2, r4 100041f4: 2e01 cmp r6, #1 100041f6: d11a bne.n 1000422e 100041f8: e026 b.n 10004248 <..lin.e84a711b..1d89a7e7.0_18+0x4> 100041fa: 2d03 cmp r5, #3 100041fc: d109 bne.n 10004212 100041fe: 784a ldrb r2, [r1, #1] 10004200: 788c ldrb r4, [r1, #2] 10004202: 0412 lsls r2, r2, #16 10004204: 0224 lsls r4, r4, #8 10004206: 4322 orrs r2, r4 10004208: 78cc ldrb r4, [r1, #3] 1000420a: 4322 orrs r2, r4 1000420c: 2e01 cmp r6, #1 1000420e: d10e bne.n 1000422e 10004210: e01a b.n 10004248 <..lin.e84a711b..1d89a7e7.0_18+0x4> 10004212: 2d04 cmp r5, #4 10004214: d115 bne.n 10004242 10004216: 784a ldrb r2, [r1, #1] 10004218: 788c ldrb r4, [r1, #2] 1000421a: 0612 lsls r2, r2, #24 1000421c: 0424 lsls r4, r4, #16 1000421e: 4322 orrs r2, r4 10004220: 78cc ldrb r4, [r1, #3] 10004222: 0224 lsls r4, r4, #8 10004224: 4322 orrs r2, r4 10004226: 790c ldrb r4, [r1, #4] 10004228: 4322 orrs r2, r4 1000422a: 2e01 cmp r6, #1 1000422c: d00c beq.n 10004248 <..lin.e84a711b..1d89a7e7.0_18+0x4> 1000422e: 2e02 cmp r6, #2 10004230: d10f bne.n 10004252 <..lin.e84a711b..1d89a7e7.0_18+0xe> 10004232: 781c ldrb r4, [r3, #0] 10004234: 785b ldrb r3, [r3, #1] 10004236: 0224 lsls r4, r4, #8 10004238: 431c orrs r4, r3 1000423a: 43c3 mvns r3, r0 1000423c: 1c57 adds r7, r2, #1 1000423e: d129 bne.n 10004294 <..lin.e84a711b..1d89a7e7.0_19+0x6> 10004240: e02a b.n 10004298 <..lin.e84a711b..1d89a7e7.0_20> 10004242: 43c2 mvns r2, r0 10004244 <..lin.e84a711b..1d89a7e7.0_18>: ulNumOfBytes = (ucNumberOfBytesForLen == 1U) ? ((uint32)pucLenInfo[0U] << 0U) : 10004244: 2e01 cmp r6, #1 10004246: d1f2 bne.n 1000422e 10004248: 781c ldrb r4, [r3, #0] 1000424a: 43c3 mvns r3, r0 1000424c: 1c57 adds r7, r2, #1 1000424e: d121 bne.n 10004294 <..lin.e84a711b..1d89a7e7.0_19+0x6> 10004250: e022 b.n 10004298 <..lin.e84a711b..1d89a7e7.0_20> 10004252: 2e03 cmp r6, #3 10004254: d10a bne.n 1000426c <..lin.e84a711b..1d89a7e7.0_18+0x28> 10004256: 781c ldrb r4, [r3, #0] 10004258: 785f ldrb r7, [r3, #1] 1000425a: 0424 lsls r4, r4, #16 1000425c: 023f lsls r7, r7, #8 1000425e: 789b ldrb r3, [r3, #2] 10004260: 433c orrs r4, r7 10004262: 431c orrs r4, r3 10004264: 43c3 mvns r3, r0 10004266: 1c57 adds r7, r2, #1 10004268: d114 bne.n 10004294 <..lin.e84a711b..1d89a7e7.0_19+0x6> 1000426a: e015 b.n 10004298 <..lin.e84a711b..1d89a7e7.0_20> 1000426c: 2e04 cmp r6, #4 1000426e: d10d bne.n 1000428c <..lin.e84a711b..1d89a7e7.0_18+0x48> 10004270: 781c ldrb r4, [r3, #0] 10004272: 785f ldrb r7, [r3, #1] 10004274: 0624 lsls r4, r4, #24 10004276: 043f lsls r7, r7, #16 10004278: 433c orrs r4, r7 1000427a: 789f ldrb r7, [r3, #2] 1000427c: 023f lsls r7, r7, #8 1000427e: 78db ldrb r3, [r3, #3] 10004280: 433c orrs r4, r7 10004282: 431c orrs r4, r3 10004284: 43c3 mvns r3, r0 10004286: 1c57 adds r7, r2, #1 10004288: d104 bne.n 10004294 <..lin.e84a711b..1d89a7e7.0_19+0x6> 1000428a: e005 b.n 10004298 <..lin.e84a711b..1d89a7e7.0_20> 1000428c: 43c4 mvns r4, r0 1000428e <..lin.e84a711b..1d89a7e7.0_19>: if ( (ulAdr == (uint32)0xffffffffU) || (ulNumOfBytes == (uint32)0xffffffffU) ) 1000428e: 4623 mov r3, r4 10004290: 1c57 adds r7, r2, #1 10004292: d001 beq.n 10004298 <..lin.e84a711b..1d89a7e7.0_20> 10004294: 429c cmp r4, r3 10004296: d101 bne.n 1000429c <..lin.e84a711b..1d89a7e7.0_21> 10004298 <..lin.e84a711b..1d89a7e7.0_20>: ResponseCode = 0x31u /*DCM_E_REQUESTOUTOFRANGE*/; 10004298: 2031 movs r0, #49 ; 0x31 1000429a: e063 b.n 10004364 <..lin.e84a711b..1d89a7e7.0_28> 1000429c <..lin.e84a711b..1d89a7e7.0_21>: else if (unReqDataLen != (uint16)(1U + (uint16)ucNumberOfBytesForAdr + (uint16)ucNumberOfBytesForLen + (uint16)ulNumOfBytes)) 1000429c: 1973 adds r3, r6, r5 1000429e: 18e3 adds r3, r4, r3 100042a0: 3301 adds r3, #1 100042a2: 9f02 ldr r7, [sp, #8] 100042a4: b29b uxth r3, r3 100042a6: 429f cmp r7, r3 100042a8: d001 beq.n 100042ae <..lin.e84a711b..1d89a7e7.0_23> 100042aa <..lin.e84a711b..1d89a7e7.0_22>: ResponseCode = 0x13u /*DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT*/; 100042aa: 2013 movs r0, #19 100042ac: e05a b.n 10004364 <..lin.e84a711b..1d89a7e7.0_28> 100042ae <..lin.e84a711b..1d89a7e7.0_23>: const uint8 *pSrc = &pucReqData[1] + ucNumberOfBytesForLen + ucNumberOfBytesForAdr; 100042ae: 1871 adds r1, r6, r1 100042b0: 1869 adds r1, r5, r1 100042b2: 1c4d adds r5, r1, #1 if( ( RDM_RAM_BEGIN <= ulAdr ) && ( ulAdr < RDM_RAM_END ) ) // RAM area 100042b4: 2301 movs r3, #1 100042b6: 4e3f ldr r6, [pc, #252] ; (100043b4 <__ghs_eofn_ApplCmd_Rdm_SecurityAccess>) 100042b8: 06db lsls r3, r3, #27 100042ba: 1ad3 subs r3, r2, r3 100042bc: 42b3 cmp r3, r6 100042be: d203 bcs.n 100042c8 <..lin.e84a711b..1d89a7e7.0_24+0x8> 100042c0 <..lin.e84a711b..1d89a7e7.0_24>: pDest = (uint8*)(ulAdr); 100042c0: 9201 str r2, [sp, #4] 100042c2: 2a00 cmp r2, #0 100042c4: d04e beq.n 10004364 <..lin.e84a711b..1d89a7e7.0_28> 100042c6: e012 b.n 100042ee <..lin.e84a711b..1d89a7e7.0_27> 100042c8: 9001 str r0, [sp, #4] 100042ca <..lin.e84a711b..1d89a7e7.0_25>: if ( ( RDM_VIRT_ID_BEGIN <= ulAdr ) && ( ulAdr < RDM_VIRT_ID_END )) 100042ca: 2022 movs r0, #34 ; 0x22 100042cc: 213f movs r1, #63 ; 0x3f 100042ce: 0489 lsls r1, r1, #18 100042d0: 1a51 subs r1, r2, r1 100042d2: 2301 movs r3, #1 100042d4: 045b lsls r3, r3, #17 100042d6: 4299 cmp r1, r3 100042d8: d244 bcs.n 10004364 <..lin.e84a711b..1d89a7e7.0_28> 100042da <..lin.e84a711b..1d89a7e7.0_26>: ResponseCode = DiagR_CalcSrcAddressForVirtID(&pDest, apfnGetVirtDataUserStructs, ulAdr, ulNumOfBytes, (uint8)eMaxCmdRdmList); 100042da: 2101 movs r1, #1 100042dc: 9100 str r1, [sp, #0] 100042de: 4938 ldr r1, [pc, #224] ; (100043c0 <__ghs_eofn_ApplCmd_Rdm_SecurityAccess+0xc>) 100042e0: 4623 mov r3, r4 100042e2: a801 add r0, sp, #4 100042e4: f7ff fe64 bl 10003fb0 <__DiagR_CalcSrcAddressForVirtID_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjApplCmd_Rdm_inf> 100042e8: 9a01 ldr r2, [sp, #4] if (pDest != NULL_PTR) 100042ea: 2a00 cmp r2, #0 100042ec: d03a beq.n 10004364 <..lin.e84a711b..1d89a7e7.0_28> 100042ee <..lin.e84a711b..1d89a7e7.0_27>: pMsgContext->resDataLen = (uint16)0; 100042ee: 9b03 ldr r3, [sp, #12] 100042f0: 2100 movs r1, #0 100042f2: 8199 strh r1, [r3, #12] while (ulNumOfBytes-- != 0U) 100042f4: 08e1 lsrs r1, r4, #3 100042f6: d02a beq.n 1000434e <..lin.e84a711b..1d89a7e7.0_27+0x60> 100042f8: 782b ldrb r3, [r5, #0] 100042fa: 7013 strb r3, [r2, #0] 100042fc: 9a01 ldr r2, [sp, #4] 100042fe: 3201 adds r2, #1 10004300: 9201 str r2, [sp, #4] 10004302: 786b ldrb r3, [r5, #1] 10004304: 7013 strb r3, [r2, #0] 10004306: 9a01 ldr r2, [sp, #4] 10004308: 3201 adds r2, #1 1000430a: 9201 str r2, [sp, #4] 1000430c: 78ab ldrb r3, [r5, #2] 1000430e: 7013 strb r3, [r2, #0] 10004310: 9a01 ldr r2, [sp, #4] 10004312: 3201 adds r2, #1 10004314: 9201 str r2, [sp, #4] 10004316: 78eb ldrb r3, [r5, #3] 10004318: 7013 strb r3, [r2, #0] 1000431a: 9a01 ldr r2, [sp, #4] 1000431c: 3201 adds r2, #1 1000431e: 9201 str r2, [sp, #4] 10004320: 792b ldrb r3, [r5, #4] 10004322: 7013 strb r3, [r2, #0] 10004324: 9a01 ldr r2, [sp, #4] 10004326: 3201 adds r2, #1 10004328: 9201 str r2, [sp, #4] 1000432a: 796b ldrb r3, [r5, #5] 1000432c: 7013 strb r3, [r2, #0] 1000432e: 9a01 ldr r2, [sp, #4] 10004330: 3201 adds r2, #1 10004332: 9201 str r2, [sp, #4] 10004334: 79ab ldrb r3, [r5, #6] 10004336: 7013 strb r3, [r2, #0] 10004338: 9a01 ldr r2, [sp, #4] 1000433a: 3201 adds r2, #1 1000433c: 9201 str r2, [sp, #4] 1000433e: 79eb ldrb r3, [r5, #7] 10004340: 7013 strb r3, [r2, #0] 10004342: 9a01 ldr r2, [sp, #4] 10004344: 3201 adds r2, #1 10004346: 9201 str r2, [sp, #4] 10004348: 3508 adds r5, #8 1000434a: 3901 subs r1, #1 1000434c: d1d4 bne.n 100042f8 <..lin.e84a711b..1d89a7e7.0_27+0xa> 1000434e: 0761 lsls r1, r4, #29 10004350: 0f49 lsrs r1, r1, #29 10004352: d007 beq.n 10004364 <..lin.e84a711b..1d89a7e7.0_28> 10004354: 782b ldrb r3, [r5, #0] 10004356: 7013 strb r3, [r2, #0] 10004358: 9a01 ldr r2, [sp, #4] 1000435a: 3201 adds r2, #1 1000435c: 9201 str r2, [sp, #4] 1000435e: 3501 adds r5, #1 10004360: 3901 subs r1, #1 10004362: d1f7 bne.n 10004354 <..lin.e84a711b..1d89a7e7.0_27+0x66> 10004364 <..lin.e84a711b..1d89a7e7.0_28>: return ResponseCode; 10004364: b004 add sp, #16 10004366: bdf0 pop {r4, r5, r6, r7, pc} 10004368 : // Public functions definition //============================================================================= // PRQA S 3408 1 // It is actually being declared using macros uint8 ApplCmd_Rdm_StartSession( MsgContextType *const pMsgContext ) { 10004368: b510 push {r4, lr} uint8 cnt = 0U; pMsgContext->resData[cnt++] = pMsgContext->reqData[0]; 1000436a: 6804 ldr r4, [r0, #0] 1000436c: 6883 ldr r3, [r0, #8] 1000436e: 7824 ldrb r4, [r4, #0] 10004370: 701c strb r4, [r3, #0] pMsgContext->resData[cnt++] = 0xFFu; // P2SERVER_MAX MSB 10004372: 6884 ldr r4, [r0, #8] 10004374: 21ff movs r1, #255 ; 0xff 10004376: 7061 strb r1, [r4, #1] pMsgContext->resData[cnt++] = 0xFFu; // P2SERVER_MAX LSB 10004378: 6884 ldr r4, [r0, #8] 1000437a: 70a1 strb r1, [r4, #2] pMsgContext->resData[cnt++] = 0xFFu; // P2STRSERVER_MAX/10 MSB 1000437c: 6883 ldr r3, [r0, #8] 1000437e: 70d9 strb r1, [r3, #3] pMsgContext->resData[cnt++] = 0xFFu; // P2STRSERVER_MAX/10 LSB 10004380: 6882 ldr r2, [r0, #8] 10004382: 7111 strb r1, [r2, #4] pMsgContext->resDataLen = cnt; 10004384: 2105 movs r1, #5 10004386: 8181 strh r1, [r0, #12] return 0U; 10004388: 2000 movs r0, #0 1000438a: bd10 pop {r4, pc} 1000438c : /// /// \return void //----------------------------------------------------------------------------- // PRQA S 3408 1 // It is actually being declared using macros uint8 ApplCmd_Rdm_SecurityAccess( MsgContextType *const pMsgContext ) { 1000438c: b530 push {r4, r5, lr} uint8 cnt = 0U; pMsgContext->resData[cnt++] = pMsgContext->reqData[0U + APPLCMD_RDM_MESSAGE_OFFSET]; 1000438e: 6804 ldr r4, [r0, #0] 10004390: 6883 ldr r3, [r0, #8] 10004392: 7824 ldrb r4, [r4, #0] 10004394: 701c strb r4, [r3, #0] pMsgContext->resData[cnt++] = pMsgContext->reqData[1U + APPLCMD_RDM_MESSAGE_OFFSET]; 10004396: 6805 ldr r5, [r0, #0] 10004398: 6884 ldr r4, [r0, #8] 1000439a: 786d ldrb r5, [r5, #1] 1000439c: 7065 strb r5, [r4, #1] pMsgContext->resData[cnt++] = pMsgContext->reqData[2U + APPLCMD_RDM_MESSAGE_OFFSET]; 1000439e: 6804 ldr r4, [r0, #0] 100043a0: 6882 ldr r2, [r0, #8] 100043a2: 78a4 ldrb r4, [r4, #2] 100043a4: 7094 strb r4, [r2, #2] pMsgContext->resData[cnt++] = 0U; // Result code 0: No Erro 100043a6: 6882 ldr r2, [r0, #8] 100043a8: 2300 movs r3, #0 100043aa: 70d3 strb r3, [r2, #3] pMsgContext->resDataLen = cnt; 100043ac: 2104 movs r1, #4 100043ae: 8181 strh r1, [r0, #12] return 0U; 100043b0: 4618 mov r0, r3 100043b2: bd30 pop {r4, r5, pc} 100043b4 <__ghs_eofn_ApplCmd_Rdm_SecurityAccess>: 100043b4: ffff 0000 vaddl.u q8, d15, d0 100043b8: 29ff cmp r1, #255 ; 0xff 100043ba: 0090 lsls r0, r2, #2 100043bc: fffc 0000 vrev64. d16, d0 100043c0: 6a48 ldr r0, [r1, #36] ; 0x24 100043c2: 1000 asrs r0, r0, #32 100043c4 : //============================================================================= // Public functions definitions //============================================================================= void SysIdle_OsIdleTask(void) { 100043c4: b500 push {lr} Wdg_Trigger(); 100043c6: f7fe facf bl 10002968 } 100043ca: bd00 pop {pc} 100043cc : #include #include SysTimer_TimerType SysTimer_TimerStart(const SysTimer_TimerType tiDelta) { 100043cc: b510 push {r4, lr} 100043ce: 4604 mov r4, r0 const SysTimer_TimerType tiCurrentTime = 100043d0: 2000 movs r0, #0 100043d2: f7fd fb72 bl 10001aba (SysTimer_TimerType) Gpt_GetTimeElapsed((Gpt_ChannelType) 0U); return ((SysTimer_TimerType) (tiCurrentTime + tiDelta)); 100043d6: 1900 adds r0, r0, r4 100043d8: bd10 pop {r4, pc} 100043da : } boolean SysTimer_TimerTimeout(const SysTimer_TimerType tiTimer) { 100043da: b510 push {r4, lr} 100043dc: 4604 mov r4, r0 const SysTimer_TimerType tiCurrentTime = 100043de: 2000 movs r0, #0 100043e0: f7fd fb6b bl 10001aba (SysTimer_TimerType) (tiCurrentTime - tiTimer); const boolean boIsTimeout = ((boolean) (((SysTimer_TimerType) (tiRemaining & (SysTimer_TimerType) 0x80000000UL) == (SysTimer_TimerType) 0U) ? TRUE : FALSE)); return boIsTimeout; 100043e4: 1b00 subs r0, r0, r4 100043e6: 0fc0 lsrs r0, r0, #31 100043e8: 2101 movs r1, #1 100043ea: 4048 eors r0, r1 100043ec: bd10 pop {r4, pc} 100043ee : (SysTimer_TimerType) (tiTimerCustomTick - tiTimer); const boolean boIsTimeout = ((boolean) (((SysTimer_TimerType) (tiRemaining & (SysTimer_TimerType) 0x80000000UL) == (SysTimer_TimerType) 0U) ? TRUE : FALSE)); return boIsTimeout; 100043ee: 1a08 subs r0, r1, r0 100043f0: 0fc0 lsrs r0, r0, #31 100043f2: 2201 movs r2, #1 100043f4: 4050 eors r0, r2 100043f6: 4770 bx lr 100043f8 : /// /// \brief Sets the value of the event for the task with /// the task ID tID. /// --------------------------------------------------------------------------- Std_ReturnType OsSetEvent(OsTaskIdType TaskIndex, OsEventMaskType TaskEvent) { 100043f8: b530 push {r4, r5, lr} Std_ReturnType tyStatusResult; if(TaskIndex < OsTaskMax_ID) 100043fa: 2804 cmp r0, #4 100043fc: d211 bcs.n 10004422 <..lin.ee82d1da..d4a2ddb5.0_6> 100043fe: 4604 mov r4, r0 10004400: 460d mov r5, r1 10004402 <..lin.ee82d1da..d4a2ddb5.0_1>: { HalIrqDisableAll(); 10004402: b672 cpsid i 10004404 <..lin.ee82d1da..d4a2ddb5.0_2>: Os_aTcbVariableRamPart[(uint8_least) TaskIndex].event |= TaskEvent; 10004404: 00a1 lsls r1, r4, #2 10004406: 1b08 subs r0, r1, r4 10004408: 4903 ldr r1, [pc, #12] ; (10004418 <..lin.ee82d1da..d4a2ddb5.0_3+0x2>) 1000440a: 0080 lsls r0, r0, #2 1000440c: 1841 adds r1, r0, r1 1000440e: 6848 ldr r0, [r1, #4] 10004410: 4328 orrs r0, r5 10004412: 6048 str r0, [r1, #4] 10004414: e002 b.n 1000441c <..lin.ee82d1da..d4a2ddb5.0_4> 10004416 <..lin.ee82d1da..d4a2ddb5.0_3>: 10004416: bf00 nop 10004418: 17d4 asrs r4, r2, #31 1000441a: 0800 lsrs r0, r0, #32 1000441c <..lin.ee82d1da..d4a2ddb5.0_4>: HalIrqEnableAll(); 1000441c: b662 cpsie i 1000441e <..lin.ee82d1da..d4a2ddb5.0_5>: tyStatusResult = E_OK; 1000441e: 2000 movs r0, #0 10004420: e000 b.n 10004424 <..lin.ee82d1da..d4a2ddb5.0_6+0x2> 10004422 <..lin.ee82d1da..d4a2ddb5.0_6>: } else { tyStatusResult = E_NOT_OK; 10004422: 2001 movs r0, #1 } return tyStatusResult; 10004424: bd30 pop {r4, r5, pc} 10004426 : /// \brief Clears the value of the event for the task within /// the function is called. The main calculation work is done /// outside of the disable interrupt region. /// --------------------------------------------------------------------------- Std_ReturnType OsClearEvent(OsEventMaskType TaskEvent) { 10004426: b530 push {r4, r5, lr} 10004428: 4d02 ldr r5, [pc, #8] ; (10004434 <..lin.ee82d1da..ff7ecf10.0_8>) Std_ReturnType tyStatusResult; if(Os_ucTaskIndex < (uint8_least) OsTaskMax_ID) 1000442a: 6829 ldr r1, [r5, #0] 1000442c: 2904 cmp r1, #4 1000442e: d214 bcs.n 1000445a <..lin.ee82d1da..ff7ecf10.0_14> 10004430 <..lin.ee82d1da..ff7ecf10.0_7>: { OsEventMaskType MyClearMask = (OsEventMaskType) ~TaskEvent; 10004430: 43c4 mvns r4, r0 10004432: e001 b.n 10004438 <..lin.ee82d1da..ff7ecf10.0_9> 10004434 <..lin.ee82d1da..ff7ecf10.0_8>: 10004434: 16a8 asrs r0, r5, #26 10004436: 0800 lsrs r0, r0, #32 10004438 <..lin.ee82d1da..ff7ecf10.0_9>: HalIrqDisableAll(); 10004438: b672 cpsid i 1000443a <..lin.ee82d1da..ff7ecf10.0_10>: Os_aTcbVariableRamPart[Os_ucTaskIndex].event &= MyClearMask; 1000443a: 6828 ldr r0, [r5, #0] 1000443c: 0081 lsls r1, r0, #2 1000443e: 1a08 subs r0, r1, r0 10004440: 4903 ldr r1, [pc, #12] ; (10004450 <..lin.ee82d1da..ff7ecf10.0_11+0x2>) 10004442: 0080 lsls r0, r0, #2 10004444: 1841 adds r1, r0, r1 10004446: 6848 ldr r0, [r1, #4] 10004448: 4020 ands r0, r4 1000444a: 6048 str r0, [r1, #4] 1000444c: e002 b.n 10004454 <..lin.ee82d1da..ff7ecf10.0_12> 1000444e <..lin.ee82d1da..ff7ecf10.0_11>: 1000444e: bf00 nop 10004450: 17d4 asrs r4, r2, #31 10004452: 0800 lsrs r0, r0, #32 10004454 <..lin.ee82d1da..ff7ecf10.0_12>: HalIrqEnableAll(); 10004454: b662 cpsie i 10004456 <..lin.ee82d1da..ff7ecf10.0_13>: tyStatusResult = E_OK; 10004456: 2000 movs r0, #0 10004458: e000 b.n 1000445c <..lin.ee82d1da..ff7ecf10.0_14+0x2> 1000445a <..lin.ee82d1da..ff7ecf10.0_14>: } else { tyStatusResult = E_NOT_OK; 1000445a: 2001 movs r0, #1 } return tyStatusResult; 1000445c: bd30 pop {r4, r5, pc} 1000445e : /// --------------------------------------------------------------------------- Std_ReturnType OsGetEvent(OsTaskIdType TaskIndex, OsEventMaskRefType TaskEventReference) { Std_ReturnType tyStatusResult; if(TaskIndex < OsTaskMax_ID) 1000445e: 2804 cmp r0, #4 10004460: d207 bcs.n 10004472 <..lin.ee82d1da..c18ce329.0_16> 10004462 <..lin.ee82d1da..c18ce329.0_15>: { *TaskEventReference = Os_aTcbVariableRamPart[(uint8_least) TaskIndex].event; 10004462: 0082 lsls r2, r0, #2 10004464: 1a10 subs r0, r2, r0 10004466: 4a0b ldr r2, [pc, #44] ; (10004494 <..lin.ee82d1da..b25fd377.0_17+0x2>) 10004468: 0080 lsls r0, r0, #2 1000446a: 1880 adds r0, r0, r2 1000446c: 6842 ldr r2, [r0, #4] tyStatusResult = E_OK; 1000446e: 2000 movs r0, #0 10004470: e001 b.n 10004476 <..lin.ee82d1da..c18ce329.0_16+0x4> 10004472 <..lin.ee82d1da..c18ce329.0_16>: } else { *TaskEventReference = (OsEventMaskType) 0U; 10004472: 2200 movs r2, #0 tyStatusResult = E_NOT_OK; 10004474: 2001 movs r0, #1 } return tyStatusResult; 10004476: 600a str r2, [r1, #0] 10004478: 4770 bx lr 1000447a <__OsTaskInit_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjOs_inf>: /// /// \brief Call the init-function of each task /// /// --------------------------------------------------------------------------- static void OsTaskInit(void) { 1000447a: b500 push {lr} uint8_least TaskIndex; for(TaskIndex = (uint8_least) 0U; TaskIndex < (uint8_least) OsTaskMax_ID; TaskIndex++) 1000447c: f7fd f80c bl 10001498 10004480: f7fe feb0 bl 100031e4 10004484: f7fe fcc5 bl 10002e12 10004488: f7fe fcb2 bl 10002df0 { Os_aTcbConstRomPart[TaskIndex].initfunc(); } } 1000448c: bd00 pop {pc} 1000448e <__OsTaskSync_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjOs_inf>: /// to the current value of the tick. /// This ensures that the first call time of each task will take place /// according to the initialized value of the start offset. /// --------------------------------------------------------------------------- static void OsTaskSync(void) { 1000448e: b500 push {lr} uint8_least TaskIndex; HalIrqDisableAll(); 10004490: e002 b.n 10004498 <..lin.ee82d1da..b25fd377.0_18> 10004492 <..lin.ee82d1da..b25fd377.0_17>: 10004492: bf00 nop 10004494: 17d4 asrs r4, r2, #31 10004496: 0800 lsrs r0, r0, #32 10004498 <..lin.ee82d1da..b25fd377.0_18>: 10004498: b672 cpsid i 1000449a <..lin.ee82d1da..b25fd377.0_19>: const OsTimerType tySynchronizationTimeNow = (OsTimerType) SysTimer_TimerStart(0U); 1000449a: 2000 movs r0, #0 1000449c: f7ff ff96 bl 100043cc for(TaskIndex = (uint8_least) 0U; TaskIndex < (uint8_least) OsTaskMax_ID; TaskIndex++) 100044a0: 4906 ldr r1, [pc, #24] ; (100044bc <..lin.ee82d1da..b25fd377.0_20+0x2>) 100044a2: 4602 mov r2, r0 100044a4: 3261 adds r2, #97 ; 0x61 100044a6: 60ca str r2, [r1, #12] 100044a8: 4602 mov r2, r0 100044aa: 323a adds r2, #58 ; 0x3a 100044ac: 32ff adds r2, #255 ; 0xff 100044ae: 618a str r2, [r1, #24] 100044b0: 4a03 ldr r2, [pc, #12] ; (100044c0 <..lin.ee82d1da..b25fd377.0_20+0x6>) 100044b2: 6008 str r0, [r1, #0] 100044b4: 1880 adds r0, r0, r2 100044b6: 6248 str r0, [r1, #36] ; 0x24 100044b8: e004 b.n 100044c4 <..lin.ee82d1da..b25fd377.0_21> 100044ba <..lin.ee82d1da..b25fd377.0_20>: 100044ba: bf00 nop 100044bc: 17d4 asrs r4, r2, #31 100044be: 0800 lsrs r0, r0, #32 100044c0: 02b3 lsls r3, r6, #10 ... 100044c4 <..lin.ee82d1da..b25fd377.0_21>: { Os_aTcbVariableRamPart[TaskIndex].timer = tySynchronizationTimeNow + Os_aTcbConstRomPart[TaskIndex].offset; } HalIrqEnableAll(); 100044c4: b662 cpsie i 100044c6 <..lin.ee82d1da..b25fd377.0_22>: } 100044c6: bd00 pop {pc} 100044c8 : /// /// \brief Start the function table multitasking and run it forever /// /// --------------------------------------------------------------------------- void OsStartOs(void) { 100044c8: b5f0 push {r4, r5, r6, r7, lr} 100044ca: b083 sub sp, #12 OsStartupHook(); 100044cc: f7fe fb8c bl 10002be8 OsTaskInit(); 100044d0: f7fc ffe2 bl 10001498 100044d4: f7fe fe86 bl 100031e4 100044d8: f7fe fc9b bl 10002e12 100044dc: f7fe fc88 bl 10002df0 OsTaskSync(); 100044e0: b672 cpsid i 100044e2: 2000 movs r0, #0 100044e4: f7ff ff72 bl 100043cc 100044e8: 4a06 ldr r2, [pc, #24] ; (10004504 <..lin.ee82d1da..10e9eab7.0_23+0x2>) 100044ea: 4601 mov r1, r0 100044ec: 3161 adds r1, #97 ; 0x61 100044ee: 60d1 str r1, [r2, #12] 100044f0: 213a movs r1, #58 ; 0x3a 100044f2: 1809 adds r1, r1, r0 100044f4: 31ff adds r1, #255 ; 0xff 100044f6: 6191 str r1, [r2, #24] 100044f8: 4903 ldr r1, [pc, #12] ; (10004508 <..lin.ee82d1da..10e9eab7.0_23+0x6>) 100044fa: 6010 str r0, [r2, #0] 100044fc: 1840 adds r0, r0, r1 100044fe: 6250 str r0, [r2, #36] ; 0x24 10004500: e004 b.n 1000450c <..lin.ee82d1da..10e9eab7.0_24> 10004502 <..lin.ee82d1da..10e9eab7.0_23>: 10004502: bf00 nop 10004504: 17d4 asrs r4, r2, #31 10004506: 0800 lsrs r0, r0, #32 10004508: 02b3 lsls r3, r6, #10 ... 1000450c <..lin.ee82d1da..10e9eab7.0_24>: 1000450c: b662 cpsie i 1000450e <..lin.ee82d1da..10e9eab7.0_25>: 1000450e: 4c2e ldr r4, [pc, #184] ; (100045c8 <..lin.ee82d1da..6808ee07.0_33>) 10004510: 4f2e ldr r7, [pc, #184] ; (100045cc <..lin.ee82d1da..6808ee07.0_33+0x4>) // Run the the multitasking scheduler forever. for(;;) { 10004512: 2000 movs r0, #0 boolean boAnyTaskIsReady = FALSE; 10004514: 9001 str r0, [sp, #4] 10004516: 4d2e ldr r5, [pc, #184] ; (100045d0 <..lin.ee82d1da..6808ee07.0_33+0x8>) // Get a snapshot of a single time-point to be used for all // task-timeout checks in the inner loop of the scheduler. const OsTimerType tyTimeoutCheckTimeNow = (OsTimerType) SysTimer_TimerStart(0U); 10004518: f7ff ff58 bl 100043cc 1000451c: 9002 str r0, [sp, #8] // PRQA S 2461 1 // Program architecture for(Os_ucTaskIndex = (uint8_least) 0U; (boAnyTaskIsReady == (boolean) FALSE) && (Os_ucTaskIndex < (uint8_least) OsTaskMax_ID); ++Os_ucTaskIndex) 1000451e: 2000 movs r0, #0 { // Check for a task event. const boolean boTaskHasEvent = (boolean) ((Os_aTcbVariableRamPart[Os_ucTaskIndex].event != (OsEventMaskType) 0U) ? TRUE : FALSE); 10004520: 0082 lsls r2, r0, #2 10004522: 1a11 subs r1, r2, r0 10004524: 0089 lsls r1, r1, #2 10004526: 190a adds r2, r1, r4 10004528: 6853 ldr r3, [r2, #4] 1000452a: 1c19 adds r1, r3, #0 1000452c: d000 beq.n 10004530 <..lin.ee82d1da..10e9eab7.0_25+0x22> 1000452e: 2101 movs r1, #1 10004530: 0103 lsls r3, r0, #4 10004532 <..lin.ee82d1da..10e9eab7.0_26>: const boolean boTaskCycleTimeIsZero = (boolean) ((Os_aTcbConstRomPart[Os_ucTaskIndex].cycle == (OsTimerType) 0U) ? (boolean) TRUE : (boolean) FALSE); const boolean boTaskHasTimeout = 10004532: 18fb adds r3, r7, r3 10004534: 689b ldr r3, [r3, #8] 10004536: 9100 str r1, [sp, #0] 10004538: 1c1e adds r6, r3, #0 1000453a: d109 bne.n 10004550 <..lin.ee82d1da..10e9eab7.0_26+0x1e> 1000453c: 1d11 adds r1, r2, #4 1000453e: 9a00 ldr r2, [sp, #0] 10004540: 2a00 cmp r2, #0 10004542: d028 beq.n 10004596 <..lin.ee82d1da..10e9eab7.0_30+0x16> 10004544: 2204 movs r2, #4 10004546: 6028 str r0, [r5, #0] 10004548: 5689 ldrsb r1, [r1, r2] 1000454a: 2900 cmp r1, #0 1000454c: d016 beq.n 1000457c <..lin.ee82d1da..10e9eab7.0_29+0x8> 1000454e: e011 b.n 10004574 <..lin.ee82d1da..10e9eab7.0_29> 10004550: 6028 str r0, [r5, #0] 10004552: 9902 ldr r1, [sp, #8] 10004554: 6810 ldr r0, [r2, #0] 10004556: f7ff ff4a bl 100043ee 1000455a: 4606 mov r6, r0 1000455c <..lin.ee82d1da..10e9eab7.0_27>: ? (boolean) FALSE : SysTimer_TimerTimeoutOfCustomTick(Os_aTcbVariableRamPart[Os_ucTaskIndex].timer, tyTimeoutCheckTimeNow)); // Task can be either cyclic, or event-driven, or a combination of both. const boolean boHasEventOrTimeout = 1000455c: 9b00 ldr r3, [sp, #0] 1000455e: 6828 ldr r0, [r5, #0] 10004560: 4333 orrs r3, r6 10004562: d018 beq.n 10004596 <..lin.ee82d1da..10e9eab7.0_30+0x16> 10004564: 0082 lsls r2, r0, #2 10004566: 1a11 subs r1, r2, r0 10004568: 0089 lsls r1, r1, #2 1000456a: 190a adds r2, r1, r4 1000456c: 2108 movs r1, #8 1000456e <..lin.ee82d1da..10e9eab7.0_28>: || (boTaskHasTimeout != (boolean) FALSE)) ? (boolean) TRUE : (boolean) FALSE); if(boHasEventOrTimeout != (boolean) FALSE) { // Call task because of a timeout, an event or both. if (Os_aTcbVariableRamPart[Os_ucTaskIndex].active) 1000456e: 5651 ldrsb r1, [r2, r1] 10004570: 2900 cmp r1, #0 10004572: d003 beq.n 1000457c <..lin.ee82d1da..10e9eab7.0_29+0x8> 10004574 <..lin.ee82d1da..10e9eab7.0_29>: { Os_aTcbConstRomPart[Os_ucTaskIndex].function(); 10004574: 0100 lsls r0, r0, #4 10004576: 59c0 ldr r0, [r0, r7] 10004578: 4780 blx r0 1000457a: 6828 ldr r0, [r5, #0] } if(boTaskHasTimeout != (boolean) FALSE) 1000457c: 2e00 cmp r6, #0 1000457e: d008 beq.n 10004592 <..lin.ee82d1da..10e9eab7.0_30+0x12> 10004580 <..lin.ee82d1da..10e9eab7.0_30>: { Os_aTcbVariableRamPart[Os_ucTaskIndex].timer += Os_aTcbConstRomPart[Os_ucTaskIndex].cycle; 10004580: 0082 lsls r2, r0, #2 10004582: 1a11 subs r1, r2, r0 10004584: 0089 lsls r1, r1, #2 10004586: 0102 lsls r2, r0, #4 10004588: 18bb adds r3, r7, r2 1000458a: 5862 ldr r2, [r4, r1] 1000458c: 689b ldr r3, [r3, #8] 1000458e: 18d2 adds r2, r2, r3 10004590: 5062 str r2, [r4, r1] } // Priority mechanism. boAnyTaskIsReady = (boolean) TRUE; 10004592: 2201 movs r2, #1 10004594: 9201 str r2, [sp, #4] for(Os_ucTaskIndex = (uint8_least) 0U; (boAnyTaskIsReady == (boolean) FALSE) && (Os_ucTaskIndex < (uint8_least) OsTaskMax_ID); ++Os_ucTaskIndex) 10004596: 9901 ldr r1, [sp, #4] 10004598: 3001 adds r0, #1 1000459a: 2900 cmp r1, #0 1000459c: d007 beq.n 100045ae <..lin.ee82d1da..10e9eab7.0_30+0x2e> 1000459e: 6028 str r0, [r5, #0] 100045a0: 2000 movs r0, #0 100045a2: 9001 str r0, [sp, #4] 100045a4: f7ff ff12 bl 100043cc 100045a8: 9002 str r0, [sp, #8] 100045aa: 2000 movs r0, #0 100045ac: e7b8 b.n 10004520 <..lin.ee82d1da..10e9eab7.0_25+0x12> 100045ae: 2804 cmp r0, #4 100045b0: d3b6 bcc.n 10004520 <..lin.ee82d1da..10e9eab7.0_25+0x12> 100045b2: 6028 str r0, [r5, #0] 100045b4 <..lin.ee82d1da..10e9eab7.0_31>: if(boAnyTaskIsReady == (boolean) FALSE) { // No ready task has been found. // Service the idle task. OS_TASK_IDLE(); 100045b4: f7ff ff06 bl 100043c4 100045b8: 2000 movs r0, #0 100045ba: 9001 str r0, [sp, #4] 100045bc: f7ff ff06 bl 100043cc 100045c0: 9002 str r0, [sp, #8] 100045c2: 2000 movs r0, #0 100045c4: e7ac b.n 10004520 <..lin.ee82d1da..10e9eab7.0_25+0x12> 100045c6 : /// \func void OsEnableAllInterrupts (void) /// /// \brief Enable all interrupts /// /// --------------------------------------------------------------------------- void OsEnableAllInterrupts (void) { HalIrqEnableAll(); } 100045c6: e005 b.n 100045d4 <..lin.ee82d1da..6808ee07.0_34> 100045c8 <..lin.ee82d1da..6808ee07.0_33>: 100045c8: 17d4 asrs r4, r2, #31 100045ca: 0800 lsrs r0, r0, #32 100045cc: 6a4c ldr r4, [r1, #36] ; 0x24 100045ce: 1000 asrs r0, r0, #32 100045d0: 16a8 asrs r0, r5, #26 100045d2: 0800 lsrs r0, r0, #32 100045d4 <..lin.ee82d1da..6808ee07.0_34>: 100045d4: b662 cpsie i 100045d6 <..lin.ee82d1da..6808ee07.0_35>: 100045d6: 4770 bx lr 100045d8 : /// \func void OsDisableAllInterrupts(void) /// /// \brief Disable all interrupts /// /// --------------------------------------------------------------------------- void OsDisableAllInterrupts(void) { HalIrqDisableAll(); } 100045d8: b672 cpsid i 100045da <..lin.ee82d1da..2a8ffc74.0_36>: 100045da: 4770 bx lr 100045dc : /// \brief Disable a specific task /// /// --------------------------------------------------------------------------- void OsDisableTask(uint8 index) { Os_aTcbVariableRamPart[index].active = 0; 100045dc: 0081 lsls r1, r0, #2 100045de: 1a08 subs r0, r1, r0 100045e0: 4903 ldr r1, [pc, #12] ; (100045f0 <..lin.ee82d1da..65b4346.0_37+0x2>) 100045e2: 0080 lsls r0, r0, #2 100045e4: 1840 adds r0, r0, r1 100045e6: 2100 movs r1, #0 100045e8: 7201 strb r1, [r0, #8] } 100045ea: 4770 bx lr 100045ec <__HalIrqEnableAll_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjOs_inf>: 100045ec: e002 b.n 100045f4 <..lin.ee82d1da..65b4346.0_38> 100045ee <..lin.ee82d1da..65b4346.0_37>: 100045ee: bf00 nop 100045f0: 17d4 asrs r4, r2, #31 100045f2: 0800 lsrs r0, r0, #32 100045f4 <..lin.ee82d1da..65b4346.0_38>: 100045f4: b662 cpsie i 100045f6 <..lin.ee82d1da..65b4346.0_39>: 100045f6: 4770 bx lr 100045f8 <__HalIrqDisableAll_static_in_DSourceTreeEOL1BuildTmpF1Pb27_App_defaultobjOs_inf>: static inline void HalIrqDisableAll(void) { __ASM("cpsid i"); } 100045f8: b672 cpsid i 100045fa <..lin.ee82d1da..fbf51c33.0_40>: 100045fa: 4770 bx lr 100045fc : *******************************************************************************/ cy_en_ipcdrv_status_t Cy_IPC_Drv_LockAcquire (volatile stc_IPC_STRUCT_t const * base) { cy_en_ipcdrv_status_t retStatus; if( 0ul != base->unACQUIRE.stcField.u1SUCCESS ) 100045fc: 6801 ldr r1, [r0, #0] 100045fe: 2900 cmp r1, #0 10004600: d501 bpl.n 10004606 <..lin.720203fa..4fed4939.0_1+0x4> 10004602 <..lin.720203fa..4fed4939.0_1>: { retStatus = CY_IPC_DRV_SUCCESS; 10004602: 2000 movs r0, #0 10004604: e000 b.n 10004608 <..lin.720203fa..4fed4939.0_2> 10004606: 4825 ldr r0, [pc, #148] ; (1000469c <__ghs_eofn_Cy_IPC_Drv_ReadMsgWord_2+0x2>) 10004608 <..lin.720203fa..4fed4939.0_2>: } else { retStatus = CY_IPC_DRV_ERROR; } return(retStatus); 10004608: 4770 bx lr 1000460a : * \retval CY_IPC_DRV_ERROR: The IPC channel was not acquired before the * function call. * *******************************************************************************/ cy_en_ipcdrv_status_t Cy_IPC_Drv_LockRelease (volatile stc_IPC_STRUCT_t* base, uint32_t releaseEventIntr) { 1000460a: b081 sub sp, #4 cy_en_ipcdrv_status_t retStatus; /* Check to make sure the IPC is Acquired */ if( Cy_IPC_Drv_IsLockAcquired(base) ) 1000460c: 69c2 ldr r2, [r0, #28] 1000460e: 2a00 cmp r2, #0 10004610: d508 bpl.n 10004624 <..lin.720203fa..70d240d0.0_4> 10004612 <..lin.720203fa..70d240d0.0_3>: { /* The IPC was acquired, release the IPC channel */ Cy_IPC_Drv_ReleaseNotify(base, releaseEventIntr); 10004612: 4b23 ldr r3, [pc, #140] ; (100046a0 <__ghs_eofn_Cy_IPC_Drv_ReadMsgWord_2+0x6>) 10004614: 681a ldr r2, [r3, #0] 10004616: 466b mov r3, sp 10004618: 9200 str r2, [sp, #0] 1000461a: 8019 strh r1, [r3, #0] 1000461c: 9900 ldr r1, [sp, #0] 1000461e: 6041 str r1, [r0, #4] retStatus = CY_IPC_DRV_SUCCESS; 10004620: 2000 movs r0, #0 10004622: e000 b.n 10004626 <..lin.720203fa..70d240d0.0_4+0x2> 10004624 <..lin.720203fa..70d240d0.0_4>: } else /* The IPC channel was already released (not acquired) */ { retStatus = CY_IPC_DRV_ERROR; 10004624: 481d ldr r0, [pc, #116] ; (1000469c <__ghs_eofn_Cy_IPC_Drv_ReadMsgWord_2+0x2>) } return(retStatus); 10004626: b001 add sp, #4 10004628: 4770 bx lr 1000462a : * \retval CY_IPC_DRV_SUCCESS: The send operation was successful. * \retval CY_IPC_DRV_ERROR: The IPC channel is unavailable because it is already locked. * *******************************************************************************/ cy_en_ipcdrv_status_t Cy_IPC_Drv_SendMsgWord (volatile stc_IPC_STRUCT_t* base, uint32_t notifyEventIntr, uint32_t message) { 1000462a: b081 sub sp, #4 cy_en_ipcdrv_status_t retStatus; if( CY_IPC_DRV_SUCCESS == Cy_IPC_Drv_LockAcquire(base) ) 1000462c: 6803 ldr r3, [r0, #0] 1000462e: 2b00 cmp r3, #0 10004630: d509 bpl.n 10004646 <..lin.720203fa..18e0afd3.0_6> 10004632 <..lin.720203fa..18e0afd3.0_5>: { /* If the channel was acquired, send the message. */ Cy_IPC_Drv_WriteDataValue(base, message); 10004632: 4b1c ldr r3, [pc, #112] ; (100046a4 <__ghs_eofn_Cy_IPC_Drv_ReadMsgWord_2+0xa>) Cy_IPC_Drv_AcquireNotify(base, notifyEventIntr); 10004634: 60c2 str r2, [r0, #12] 10004636: 681a ldr r2, [r3, #0] 10004638: 466b mov r3, sp 1000463a: 9200 str r2, [sp, #0] 1000463c: 8019 strh r1, [r3, #0] 1000463e: 9900 ldr r1, [sp, #0] 10004640: 6081 str r1, [r0, #8] retStatus = CY_IPC_DRV_SUCCESS; 10004642: 2000 movs r0, #0 10004644: e000 b.n 10004648 <..lin.720203fa..18e0afd3.0_6+0x2> 10004646 <..lin.720203fa..18e0afd3.0_6>: } else { /* Channel was already acquired, return Error */ retStatus = CY_IPC_DRV_ERROR; 10004646: 4815 ldr r0, [pc, #84] ; (1000469c <__ghs_eofn_Cy_IPC_Drv_ReadMsgWord_2+0x2>) } return(retStatus); 10004648: b001 add sp, #4 1000464a: 4770 bx lr 1000464c : * \retval CY_IPC_DRV_SUCCESS: The send operation was successful. * \retval CY_IPC_DRV_ERROR: The IPC channel is unavailable because it is already locked. * *******************************************************************************/ cy_en_ipcdrv_status_t Cy_IPC_Drv_SendMsgWord_2 (volatile stc_IPC_STRUCT_t* base, uint32_t notifyEventIntr, uint32_t message, uint32_t message2) { 1000464c: b510 push {r4, lr} 1000464e: b081 sub sp, #4 cy_en_ipcdrv_status_t retStatus; if( CY_IPC_DRV_SUCCESS == Cy_IPC_Drv_LockAcquire(base) ) 10004650: 6804 ldr r4, [r0, #0] 10004652: 2c00 cmp r4, #0 10004654: d50a bpl.n 1000466c <..lin.720203fa..d3cbfd04.0_8> 10004656 <..lin.720203fa..d3cbfd04.0_7>: { /* If the channel was acquired, send the message. */ Cy_IPC_Drv_WriteDataValue(base, message); 10004656: 60c2 str r2, [r0, #12] Cy_IPC_Drv_WriteData1Value(base, message2); 10004658: 6103 str r3, [r0, #16] Cy_IPC_Drv_AcquireNotify(base, notifyEventIntr); 1000465a: 4b12 ldr r3, [pc, #72] ; (100046a4 <__ghs_eofn_Cy_IPC_Drv_ReadMsgWord_2+0xa>) 1000465c: 681a ldr r2, [r3, #0] 1000465e: 466b mov r3, sp 10004660: 9200 str r2, [sp, #0] 10004662: 8019 strh r1, [r3, #0] 10004664: 9900 ldr r1, [sp, #0] 10004666: 6081 str r1, [r0, #8] retStatus = CY_IPC_DRV_SUCCESS; 10004668: 2000 movs r0, #0 1000466a: e000 b.n 1000466e <..lin.720203fa..d3cbfd04.0_8+0x2> 1000466c <..lin.720203fa..d3cbfd04.0_8>: } else { /* Channel was already acquired, return Error */ retStatus = CY_IPC_DRV_ERROR; 1000466c: 480b ldr r0, [pc, #44] ; (1000469c <__ghs_eofn_Cy_IPC_Drv_ReadMsgWord_2+0x2>) } return(retStatus); 1000466e: b001 add sp, #4 10004670: bd10 pop {r4, pc} 10004672 : *******************************************************************************/ cy_en_ipcdrv_status_t Cy_IPC_Drv_ReadMsgWord (volatile stc_IPC_STRUCT_t const * base, uint32_t * message) { cy_en_ipcdrv_status_t retStatus; if ( Cy_IPC_Drv_IsLockAcquired(base) ) 10004672: 69c2 ldr r2, [r0, #28] 10004674: 2a00 cmp r2, #0 10004676: d503 bpl.n 10004680 <..lin.720203fa..a9323d85.0_10> 10004678 <..lin.720203fa..a9323d85.0_9>: { /* The channel is locked; message is valid. */ *message = Cy_IPC_Drv_ReadDataValue(base); 10004678: 68c0 ldr r0, [r0, #12] 1000467a: 6008 str r0, [r1, #0] retStatus = CY_IPC_DRV_SUCCESS; 1000467c: 2000 movs r0, #0 1000467e: e000 b.n 10004682 <..lin.720203fa..a9323d85.0_10+0x2> 10004680 <..lin.720203fa..a9323d85.0_10>: } else { /* The channel is not locked so channel is invalid. */ retStatus = CY_IPC_DRV_ERROR; 10004680: 4806 ldr r0, [pc, #24] ; (1000469c <__ghs_eofn_Cy_IPC_Drv_ReadMsgWord_2+0x2>) } return(retStatus); 10004682: 4770 bx lr 10004684 : *******************************************************************************/ cy_en_ipcdrv_status_t Cy_IPC_Drv_ReadMsgWord_2 (volatile stc_IPC_STRUCT_t const * base, uint32_t * message, uint32_t* message2) { cy_en_ipcdrv_status_t retStatus; if ( Cy_IPC_Drv_IsLockAcquired(base) ) 10004684: 69c3 ldr r3, [r0, #28] 10004686: 2b00 cmp r3, #0 10004688: d505 bpl.n 10004696 <..lin.720203fa..beb7bf36.0_12> 1000468a <..lin.720203fa..beb7bf36.0_11>: { /* The channel is locked; message is valid. */ *message = Cy_IPC_Drv_ReadDataValue(base); 1000468a: 68c3 ldr r3, [r0, #12] 1000468c: 600b str r3, [r1, #0] *message2 = Cy_IPC_Drv_ReadData1Value(base); 1000468e: 6900 ldr r0, [r0, #16] 10004690: 6010 str r0, [r2, #0] retStatus = CY_IPC_DRV_SUCCESS; 10004692: 2000 movs r0, #0 10004694: e000 b.n 10004698 <..lin.720203fa..beb7bf36.0_12+0x2> 10004696 <..lin.720203fa..beb7bf36.0_12>: } else { /* The channel is not locked so channel is invalid. */ retStatus = CY_IPC_DRV_ERROR; 10004696: 4801 ldr r0, [pc, #4] ; (1000469c <__ghs_eofn_Cy_IPC_Drv_ReadMsgWord_2+0x2>) } return(retStatus); 10004698: 4770 bx lr 1000469a <__ghs_eofn_Cy_IPC_Drv_ReadMsgWord_2>: 1000469a: bf00 nop 1000469c: 0001 movs r1, r0 1000469e: 008a lsls r2, r1, #2 100046a0: 6aa0 ldr r0, [r4, #40] ; 0x28 100046a2: 1000 asrs r0, r0, #32 100046a4: 6a9c ldr r4, [r3, #40] ; 0x28 100046a6: 1000 asrs r0, r0, #32 100046a8 : 100046a8: b520 push {r5, lr} 100046aa: 2300 movs r3, #0 100046ac: 2a00 cmp r2, #0 100046ae: e006 b.n 100046be 100046b0: 7803 ldrb r3, [r0, #0] 100046b2: 3001 adds r0, #1 100046b4: 780d ldrb r5, [r1, #0] 100046b6: 3101 adds r1, #1 100046b8: 1b5b subs r3, r3, r5 100046ba: d101 bne.n 100046c0 100046bc: 3a01 subs r2, #1 100046be: d1f7 bne.n 100046b0 100046c0: 1c18 adds r0, r3, #0 100046c2: bd20 pop {r5, pc} 100046c4 <__gh_memclr32>: 100046c4: b5e0 push {r5, r6, r7, lr} 100046c6: 08ca lsrs r2, r1, #3 100046c8: 0749 lsls r1, r1, #29 100046ca: 0f49 lsrs r1, r1, #29 100046cc: 2300 movs r3, #0 100046ce: 2a00 cmp r2, #0 100046d0: d006 beq.n 100046e0 <__gh_memclr32+0x1c> 100046d2: 1c1d adds r5, r3, #0 100046d4: 1c1e adds r6, r3, #0 100046d6: 1c1f adds r7, r3, #0 100046d8: c0e8 stmia r0!, {r3, r5, r6, r7} 100046da: c0e8 stmia r0!, {r3, r5, r6, r7} 100046dc: 3a01 subs r2, #1 100046de: d1f8 bne.n 100046d2 <__gh_memclr32+0xe> 100046e0: 2900 cmp r1, #0 100046e2: d002 beq.n 100046ea <__gh_memclr32+0x26> 100046e4: c008 stmia r0!, {r3} 100046e6: 3901 subs r1, #1 100046e8: d1fc bne.n 100046e4 <__gh_memclr32+0x20> 100046ea: bde0 pop {r5, r6, r7, pc} 100046ec <__udiv_32_32>: 100046ec: b460 push {r5, r6} 100046ee: 2300 movs r3, #0 100046f0: 2501 movs r5, #1 100046f2: 1c02 adds r2, r0, #0 100046f4: d104 bne.n 10004700 <__udiv_32_32+0x14> 100046f6: 4a0e ldr r2, [pc, #56] ; (10004730 <__umod_32_32+0xc>) 100046f8: 2a00 cmp r2, #0 100046fa: d010 beq.n 1000471e <__udiv_32_32+0x32> 100046fc: bc60 pop {r5, r6} 100046fe: 4710 bx r2 10004700: 4291 cmp r1, r2 10004702: d307 bcc.n 10004714 <__udiv_32_32+0x28> 10004704: 1a89 subs r1, r1, r2 10004706: 195b adds r3, r3, r5 10004708: 084e lsrs r6, r1, #1 1000470a: 42b2 cmp r2, r6 1000470c: d2f8 bcs.n 10004700 <__udiv_32_32+0x14> 1000470e: 0052 lsls r2, r2, #1 10004710: 006d lsls r5, r5, #1 10004712: e7f5 b.n 10004700 <__udiv_32_32+0x14> 10004714: 2d01 cmp r5, #1 10004716: d002 beq.n 1000471e <__udiv_32_32+0x32> 10004718: 0852 lsrs r2, r2, #1 1000471a: 086d lsrs r5, r5, #1 1000471c: e7f0 b.n 10004700 <__udiv_32_32+0x14> 1000471e: 1c18 adds r0, r3, #0 10004720: bc60 pop {r5, r6} 10004722: 4770 bx lr 10004724 <__umod_32_32>: 10004724: b500 push {lr} 10004726: f7ff ffe1 bl 100046ec <__udiv_32_32> 1000472a: 1c08 adds r0, r1, #0 1000472c: bc08 pop {r3} 1000472e: 4718 bx r3 10004730: 0000 movs r0, r0 ...