//***************************************************************************** // (C) Automotive Lighting Reutlingen GmbH // Tuebinger Strasse 123, 72762 Reutlingen, Germany // // Automotive Lighting Reutlingen GmbH owns all the rights to this work. // This work shall not be copied, reproduced, used, modified, transferred // or its information shall not be disclosed without the prior written // authorization of Automotive Lighting Reutlingen GmbH. //***************************************************************************** //----------------------------------------------------------------------------- /// \file CddTps92520_Com.c /// /// \brief Code for TPS92520 SPI communication /// /// \author OTT, Peter ALDE-RT/EES6 //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Includes //----------------------------------------------------------------------------- // standard includes #include #include // module API (include path) #include #include // module includes (relative to API) #include <../Cfg/CddTps92520_Cfg.h> #include <../Cfg/CddTps92520_RoutCfg.h> #include <../Gen/CddTps92520_Com.h> #include <../Gen/CddTps92520_Types.h> #include <../Gen/CddTps92520_Sched.h> //----------------------------------------------------------------------------- // Defines and Typedef //----------------------------------------------------------------------------- // #define CDDTPS92520_UseActions // to be activated if needed #if (CDDTPS92520_Cfg_NbOfDevices == 1) #define CDDTPS92520_INIT(x) { x } #elif (CDDTPS92520_Cfg_NbOfDevices == 2) #define CDDTPS92520_INIT(x) { x, x } #elif (CDDTPS92520_Cfg_NbOfDevices == 3) #define CDDTPS92520_INIT(x) { x, x, x } #elif (CDDTPS92520_Cfg_NbOfDevices == 4) #define CDDTPS92520_INIT(x) { x, x, x, x } #elif (CDDTPS92520_Cfg_NbOfDevices == 5) #define CDDTPS92520_INIT(x) { x, x, x, x, x } #elif (CDDTPS92520_Cfg_NbOfDevices == 6) #define CDDTPS92520_INIT(x) { x, x, x, x, x, x } #elif (CDDTPS92520_Cfg_NbOfDevices == 7) #define CDDTPS92520_INIT(x) { x, x, x, x, x, x, x } #endif //(CDDTPS92520_Cfg_NbOfDevices = nb of TPS92520 configured) #define TPS92520_unDummyZeroReg {.unRaw=0u} #define CDDTPS92520_SYSCFG1_Init {.Bit={.biCH1EN=0u, .biCH1INTPWM=CDDTPS92520_Cfg_CH1INTPWM, .biCH2EN=0u, .biCH2INTPWM=CDDTPS92520_Cfg_CH2INTPWM, .biCMWEN=0u, .biLHSW=0u, .u1PWMPH=CDDTPS92520_Cfg_PWMPH, .biFPINRST=0u}} #define CDDTPS92520_SYSCFG2_Init {.Bit={.biCH1LSILIMFL=0u, .biCH1HSILIMFL=0u, .biCH1TSFL=CDDTPS92520_Cfg_CH1TSFL, .biCH2LSILIMFL=0u, .biCH2HSILIMFL=0u, .biCH2TSFL=CDDTPS92520_Cfg_CH2TSFL, .bi2IFT=CDDTPS92520_Cfg_IFT}} #define CDDTPS92520_CMWTAP_Init {.Bit={.bi4CMWTAP=CDDTPS92520_CMWTAP_ComWatchdogPerdiod_1670ms, .bi4RESERVED=0u}} #define CDDTPS92520_TWLMT_Init {.Byte={(uint8)CDDTPS92520_Cfg_TWLMT}} #define CDDTPS92520_SLEEP_Init {.Bit={.bi2SLEEP=0u}} #define CDDTPS92520_PWMDIV_Init {.Bit={.bi3PWMDIV=CDDTPS92520_Cfg_PWMDIV}} #define CDDTPS92520_CH1TON_Init {.Bit={.bi6CHxTON=CDDTPS92520_Cfg_CH1TON}} #define CDDTPS92520_CH2TON_Init {.Bit={.bi6CHxTON=CDDTPS92520_Cfg_CH2TON}} #define CDDTPS92520_LHCFG1_Init {.Bit={.biLH1EN=0u, .biLH1INTPWM=CDDTPS92520_Cfg_LH1INTPM, .biLH1100D=0u, .biLH2EN=0u, .biLH2INTPWM=CDDTPS92520_Cfg_LH2INTPM, .biLH2100D=0, .biLHEXTIADJ=CDDTPS92520_Cfg_LHEXTIADJ, .u1LHPWMPH=CDDTPS92520_Cfg_LHPWMPH}} #define CDDTPS92520_LH1TON_Init {.Bit={.bi6LHxTON=CDDTPS92520_Cfg_LH1TON}} #define CDDTPS92520_LH2TON_Init {.Bit={.bi6LHxTON=CDDTPS92520_Cfg_LH2TON}} #define CDDTPS92520_LHCFG2_Init {.Bit={.bi2LHIFT=CDDTPS92520_Cfg_LHIFT}} #define CDDTPS92520_RESET_Init {.Byte={CDDTPS92520_RESET}} // Initialization values of Data Mirror of TPS92520 registers #define CDDTPS92520_DataMirror_Init \ { \ { /* CtrlTx */ \ CDDTPS92520_INIT(CDDTPS92520_SYSCFG1_Init), \ CDDTPS92520_INIT(CDDTPS92520_SYSCFG2_Init), \ CDDTPS92520_INIT(CDDTPS92520_CMWTAP_Init), \ CDDTPS92520_INIT(CDDTPS92520_TWLMT_Init), \ CDDTPS92520_INIT(CDDTPS92520_SLEEP_Init), \ { /*aCHxIADJL*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aCHxIADJH*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ CDDTPS92520_INIT(CDDTPS92520_PWMDIV_Init), \ { /*aCHxPWML*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aCHxPWMH*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aCHxTON*/ \ CDDTPS92520_INIT(CDDTPS92520_CH1TON_Init), \ CDDTPS92520_INIT(CDDTPS92520_CH2TON_Init) \ }, \ CDDTPS92520_INIT(CDDTPS92520_LHCFG1_Init), \ CDDTPS92520_INIT(CDDTPS92520_LHCFG2_Init), \ { /*aLHxIADJL*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aLHxIADJH*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aLHCHxPWML*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aLHCHxPWMH*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aLHxTON*/ \ CDDTPS92520_INIT(CDDTPS92520_LH1TON_Init), \ CDDTPS92520_INIT(CDDTPS92520_LH2TON_Init) \ }, /*aRESET*/ \ CDDTPS92520_INIT(CDDTPS92520_RESET_Init) \ }, \ { /*CtrlRx */ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ { /*aCHxIADJL*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aCHxIADH*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ { /*aCHxPWML*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aCHxPWMH*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aCHxTON*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ { /*aLHxIADJL*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aLHxIADJH*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aLHCHxPWML*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aLHCHxPWMH*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aLHxTON*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, /*aRESET*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /* StatRx */ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ { /*aCHxVIN*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aCHxVLED*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aCHxVLEDON*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ { /*aCHxVLEDOFF*/ \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ }, \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg), \ CDDTPS92520_INIT(TPS92520_unDummyZeroReg) \ } \ } #define CDDTPS92520_SYSCFG1_Tx &CddTps92520_DataMirror.CtrlTx.aSYSCFG1[0].unRaw #define CDDTPS92520_SYSCFG2_Tx &CddTps92520_DataMirror.CtrlTx.aSYSCFG2[0].unRaw #define CDDTPS92520_CMWTAP_Tx &CddTps92520_DataMirror.CtrlTx.aCMWTAP[0].unRaw #define CDDTPS92520_TWLMT_Tx &CddTps92520_DataMirror.CtrlTx.aTWLMT[0].unRaw #define CDDTPS92520_SLEEP_Tx &CddTps92520_DataMirror.CtrlTx.aSLEEP[0].unRaw #define CDDTPS92520_CH1IADJL_Tx &CddTps92520_DataMirror.CtrlTx.aCHxIADJL[0][0].unRaw #define CDDTPS92520_CH2IADJL_Tx &CddTps92520_DataMirror.CtrlTx.aCHxIADJL[1][0].unRaw #define CDDTPS92520_CH1IADJH_Tx &CddTps92520_DataMirror.CtrlTx.aCHxIADJH[0][0].unRaw #define CDDTPS92520_CH2IADJH_Tx &CddTps92520_DataMirror.CtrlTx.aCHxIADJH[1][0].unRaw #define CDDTPS92520_PMWDIV_Tx &CddTps92520_DataMirror.CtrlTx.aPWMDIV[0].unRaw #define CDDTPS92520_CH1PWML_Tx &CddTps92520_DataMirror.CtrlTx.aCHxPWML[0][0].unRaw #define CDDTPS92520_CH2PWML_Tx &CddTps92520_DataMirror.CtrlTx.aCHxPWML[1][0].unRaw #define CDDTPS92520_CH1PWMH_Tx &CddTps92520_DataMirror.CtrlTx.aCHxPWMH[0][0].unRaw #define CDDTPS92520_CH2PWMH_Tx &CddTps92520_DataMirror.CtrlTx.aCHxPWMH[1][0].unRaw #define CDDTPS92520_CH1TON_Tx &CddTps92520_DataMirror.CtrlTx.aCHxTON[0][0].unRaw #define CDDTPS92520_CH2TON_Tx &CddTps92520_DataMirror.CtrlTx.aCHxTON[1][0].unRaw #define CDDTPS92520_LHCFG1_Tx &CddTps92520_DataMirror.CtrlTx.aLHCFG1[0].unRaw #define CDDTPS92520_LHCFG2_Tx &CddTps92520_DataMirror.CtrlTx.aLHCFG2[0].unRaw #define CDDTPS92520_LH1IADJL_Tx &CddTps92520_DataMirror.CtrlTx.aLHxIADJL[0][0].unRaw #define CDDTPS92520_LH2IADJL_Tx &CddTps92520_DataMirror.CtrlTx.aLHxIADJL[1][0].unRaw #define CDDTPS92520_LH1IADJH_Tx &CddTps92520_DataMirror.CtrlTx.aLHxIADJH[0][0].unRaw #define CDDTPS92520_LH2IADJH_Tx &CddTps92520_DataMirror.CtrlTx.aLHxIADJH[1][0].unRaw #define CDDTPS92520_LHCH1PWML_Tx &CddTps92520_DataMirror.CtrlTx.aLHCHxPWML[0][0].unRaw #define CDDTPS92520_LHCH2PWML_Tx &CddTps92520_DataMirror.CtrlTx.aLHCHxPWML[1][0].unRaw #define CDDTPS92520_LHCH1PWMH_Tx &CddTps92520_DataMirror.CtrlTx.aLHCHxPWMH[0][0].unRaw #define CDDTPS92520_LHCH2PWMH_Tx &CddTps92520_DataMirror.CtrlTx.aLHCHxPWMH[1][0].unRaw #define CDDTPS92520_LH1TON_Tx &CddTps92520_DataMirror.CtrlTx.aLHxTON[0][0].unRaw #define CDDTPS92520_LH2TON_Tx &CddTps92520_DataMirror.CtrlTx.aLHxTON[1][0].unRaw #define CDDTPS92520_RESET_Tx &CddTps92520_DataMirror.CtrlTx.aRESET[0].unRaw #define CDDTPS92520_SYSCFG1_Rx &CddTps92520_DataMirror.CtrlRx.aSYSCFG1[0].unRaw #define CDDTPS92520_SYSCFG2_Rx &CddTps92520_DataMirror.CtrlRx.aSYSCFG2[0].unRaw #define CDDTPS92520_CMWTAP_Rx &CddTps92520_DataMirror.CtrlRx.aCMWTAP[0].unRaw #define CDDTPS92520_TWLMT_Rx &CddTps92520_DataMirror.CtrlRx.aTWLMT[0].unRaw #define CDDTPS92520_SLEEP_Rx &CddTps92520_DataMirror.CtrlRx.aSLEEP[0].unRaw #define CDDTPS92520_CH1IADJL_Rx &CddTps92520_DataMirror.CtrlRx.aCHxIADJL[0][0].unRaw #define CDDTPS92520_CH1IADJH_Rx &CddTps92520_DataMirror.CtrlRx.aCHxIADJH[0][0].unRaw #define CDDTPS92520_CH2IADJL_Rx &CddTps92520_DataMirror.CtrlRx.aCHxIADJL[1][0].unRaw #define CDDTPS92520_CH2IADJH_Rx &CddTps92520_DataMirror.CtrlRx.aCHxIADJH[1][0].unRaw #define CDDTPS92520_PMWDIV_Rx &CddTps92520_DataMirror.CtrlRx.aPWMDIV[0].unRaw #define CDDTPS92520_CH1PWML_Rx &CddTps92520_DataMirror.CtrlRx.aCHxPWML[0][0].unRaw #define CDDTPS92520_CH2PWML_Rx &CddTps92520_DataMirror.CtrlRx.aCHxPWML[1][0].unRaw #define CDDTPS92520_CH1PWMH_Rx &CddTps92520_DataMirror.CtrlRx.aCHxPWMH[0][0].unRaw #define CDDTPS92520_CH2PWMH_Rx &CddTps92520_DataMirror.CtrlRx.aCHxPWMH[1][0].unRaw #define CDDTPS92520_CH1TON_Rx &CddTps92520_DataMirror.CtrlRx.aCHxTON[0][0].unRaw #define CDDTPS92520_CH2TON_Rx &CddTps92520_DataMirror.CtrlRx.aCHxTON[1][0].unRaw #define CDDTPS92520_LHCFG1_Rx &CddTps92520_DataMirror.CtrlRx.aLHCFG1[0].unRaw #define CDDTPS92520_LHCFG2_Rx &CddTps92520_DataMirror.CtrlRx.aLHCFG2[0].unRaw #define CDDTPS92520_LHIL_Rx &CddTps92520_DataMirror.StatRx.aLHIL[0].unRaw #define CDDTPS92520_LHIH_Rx &CddTps92520_DataMirror.StatRx.aLHIH[0].unRaw #define CDDTPS92520_LHIFILTL_Rx &CddTps92520_DataMirror.StatRx.aLHIFILTL[0].unRaw #define CDDTPS92520_LHIFILTH_Rx &CddTps92520_DataMirror.StatRx.aLHIFILTH[0].unRaw #define CDDTPS92520_LH1IADJL_Rx &CddTps92520_DataMirror.CtrlRx.aLHxIADJL[0][0].unRaw #define CDDTPS92520_LH2IADJL_Rx &CddTps92520_DataMirror.CtrlRx.aLHxIADJL[1][0].unRaw #define CDDTPS92520_LH1IADJH_Rx &CddTps92520_DataMirror.CtrlRx.aLHxIADJH[0][0].unRaw #define CDDTPS92520_LH2IADJH_Rx &CddTps92520_DataMirror.CtrlRx.aLHxIADJH[1][0].unRaw #define CDDTPS92520_LHCH1PWML_Rx &CddTps92520_DataMirror.CtrlRx.aLHCHxPWML[0][0].unRaw #define CDDTPS92520_LHCH2PWML_Rx &CddTps92520_DataMirror.CtrlRx.aLHCHxPWML[1][0].unRaw #define CDDTPS92520_LHCH1PWMH_Rx &CddTps92520_DataMirror.CtrlRx.aLHCHxPWMH[0][0].unRaw #define CDDTPS92520_LHCH2PWMH_Rx &CddTps92520_DataMirror.CtrlRx.aLHCHxPWMH[1][0].unRaw #define CDDTPS92520_LH1TON_Rx &CddTps92520_DataMirror.CtrlRx.aLHxTON[0][0].unRaw #define CDDTPS92520_LH2TON_Rx &CddTps92520_DataMirror.CtrlRx.aLHxTON[1][0].unRaw #define CDDTPS92520_STATUS1_Rx &CddTps92520_DataMirror.StatRx.aSTATUS1[0].unRaw #define CDDTPS92520_STATUS2_Rx &CddTps92520_DataMirror.StatRx.aSTATUS2[0].unRaw #define CDDTPS92520_STATUS3_Rx &CddTps92520_DataMirror.StatRx.aSTATUS3[0].unRaw #define CDDTPS92520_CH1VIN_Rx &CddTps92520_DataMirror.StatRx.aCHxVIN[0][0].unRaw #define CDDTPS92520_CH1VLED_Rx &CddTps92520_DataMirror.StatRx.aCHxVLED[0][0].unRaw #define CDDTPS92520_CH1VLEDON_Rx &CddTps92520_DataMirror.StatRx.aCHxVLEDON[0][0].unRaw #define CDDTPS92520_CH1VLEDOFF_Rx &CddTps92520_DataMirror.StatRx.aCHxVLEDOFF[0][0].unRaw #define CDDTPS92520_CH2VIN_Rx &CddTps92520_DataMirror.StatRx.aCHxVIN[1][0].unRaw #define CDDTPS92520_CH2VLED_Rx &CddTps92520_DataMirror.StatRx.aCHxVLED[1][0].unRaw #define CDDTPS92520_CH2VLEDON_Rx &CddTps92520_DataMirror.StatRx.aCHxVLEDON[1][0].unRaw #define CDDTPS92520_CH2VLEDOFF_Rx &CddTps92520_DataMirror.StatRx.aCHxVLEDOFF[1][0].unRaw #define CDDTPS92520_TEMPL_Rx &CddTps92520_DataMirror.StatRx.aTEMPL[0].unRaw #define CDDTPS92520_TEMPH_Rx &CddTps92520_DataMirror.StatRx.aTEMPH[0].unRaw #define CDDTPS92520_V5D_Rx &CddTps92520_DataMirror.StatRx.aV5D[0].unRaw #define CDDTPS92520_Zero_Tx &CddTps92520_aunZero[0] #define CDDTPS92520_Dummy_Rx &CddTps92520_aunDummy[0] // SPI schedule table entry datatype typedef struct tCddTps92520_SpiSchedTable { uint8 ucNextEntry; // index of next schedule table entry uint8 ucAction; // index of action function done after Rx --> TODO change as function pointer ? uint16 unCmd; // Read/Write Command to send uint16 unAddr; // SPI address (combination of low and high nibble) const uint16* punTx; // SPI control register data for transmission - offset related to 1st address of stuct uint16* punRx; // SPI status register data for reception - offset related to 1st address of stuct } tCddTps92520_SpiSchedTable; //----------------------------------------------------------------------------- // Start definitions of initialized 16 bit variables //----------------------------------------------------------------------------- #define ctadCddLed_START_SEC_VAR_INIT_16 #include <../Cfg/CddTps92520_MemMap.h> STATIC_AL uint16 CddTps92520_ucSchedIx_Tx = 0u; // Index for TX pointer of schedule table STATIC_AL uint16 CddTps92520_ucSchedIx_Rx = 0u; // index for RX pointer of schedule table #define ctadCddLed_STOP_SEC_VAR_INIT_16 #include <../Cfg/CddTps92520_MemMap.h> //----------------------------------------------------------------------------- // End definitions of initialized 16 bit variables //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Start definitions of non initialized structures and unions or arrays variables //----------------------------------------------------------------------------- #define ctadCddLed_START_SEC_VAR_NO_INIT_UNSPECIFIED #include <../Cfg/CddTps92520_MemMap.h> STATIC_AL uint16 CddTps92520_aunDummy[CDDTPS92520_Cfg_NbOfDevices]; // for dummy recieve Spi Frames STATIC_AL tCddTps92520_DataMirror CddTps92520_DataMirror = CDDTPS92520_DataMirror_Init; // mirror of TPS92520 registers #define ctadCddLed_STOP_SEC_VAR_NO_INIT_UNSPECIFIED #include <../Cfg/CddTps92520_MemMap.h> //----------------------------------------------------------------------------- // End definitions of non initialized structures and unions or arrays variables //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Start definitions of const structures and unions or arrays variables //----------------------------------------------------------------------------- /*#define ctadCddLed_START_SEC_CONST_ROM_UNSPECIFIED*/ #define ctadCddLed_START_SEC_CONST_UNSPECIFIED //for UAP BSW #include <../Cfg/CddTps92520_MemMap.h> STATIC_AL CONST_AL uint16 CddTps92520_aunZero [CDDTPS92520_Cfg_NbOfDevices] = { 0u }; STATIC_AL CONST_AL tCddTps92520_SpiSchedTable aCddTps92520_SpiSchedTable[CDDTPS92520_Cfg_SpiSchedTableLen] = CDDTPS92520_Cfg_SpiSchedTable_Init; /*#define ctadCddLed_STOP_SEC_CONST_ROM_UNSPECIFIED*/ #define ctadCddLed_STOP_SEC_CONST_UNSPECIFIED //for UAP BSW #include <../Cfg/CddTps92520_MemMap.h> //----------------------------------------------------------------------------- // End definitions of const structures and unions or arrays variables //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Start declaration or definitions of functions //----------------------------------------------------------------------------- #define ctadCddLed_START_SEC_CODE #include <../Cfg/CddTps92520_MemMap.h> //----------------------------------------------------------------------------- // Function prototypes //----------------------------------------------------------------------------- STATIC_AL uint16 CddTps92520_CalcAndAddParity(const uint16 unCmd, const uint16 unAddr, const uint16 unData); #ifdef CDDTPS92520_UseActions STATIC_AL boolean CddTps92520_StAction(const uint8 ucAction); #endif //----------------------------------------------------------------------------- // Function definitions //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- /// \brief get content of status register STATUS1 /// /// \descr /// /// \param ulChnIdx : channel index /// \param pSTATUS1 : content of status register STATUS1 /// /// \return boolean: TRUE - data are valid /// FALSE - data shall be discard //----------------------------------------------------------------------------- boolean CddTps92520_GetSTATUS1(const uint32 ulChnIdx, tCddTps92520_STATUS1* pSTATUS1) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; if ((ulDevice < CDDTPS92520_Cfg_NbOfDevices) && (pSTATUS1 != NULL_PTR)) { *pSTATUS1 = CddTps92520_DataMirror.StatRx.aSTATUS1[ulDevice]; } // return SPI Error bit status return ((CddTps92520_DataMirror.StatRx.aSTATUS1[ulDevice].unRaw & CDDTPS92520_SPE) != CDDTPS92520_SPE) ? TRUE : FALSE; } //----------------------------------------------------------------------------- /// \brief get content of status register STATUS2 /// /// \descr /// /// \param ulChnIdx : channel index /// \param pSTATUS2 : content of status register STATUS2 /// /// \return boolean: TRUE - data are valid /// FALSE - data shall be discard //----------------------------------------------------------------------------- boolean CddTps92520_GetSTATUS2(const uint32 ulChnIdx, tCddTps92520_STATUS2* pSTATUS2) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; if ((ulDevice < CDDTPS92520_Cfg_NbOfDevices) && (pSTATUS2 != NULL_PTR)) { *pSTATUS2 = CddTps92520_DataMirror.StatRx.aSTATUS2[ulDevice]; } // return SPI Error status bit return ((CddTps92520_DataMirror.StatRx.aSTATUS2[ulDevice].unRaw & CDDTPS92520_SPE) != CDDTPS92520_SPE) ? TRUE : FALSE; } //----------------------------------------------------------------------------- /// \brief Get content of status register STATUS3 /// /// \descr /// /// \param ulChnIdx : channel index /// \param pSTATUS3 : content of status register STATUS3 /// /// \return boolean: TRUE - data are valid /// FALSE - data shall be discard //----------------------------------------------------------------------------- boolean CddTps92520_GetSTATUS3(const uint32 ulChnIdx, tCddTps92520_STATUS3* pSTATUS3) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; if ((ulDevice < CDDTPS92520_Cfg_NbOfDevices) && (pSTATUS3 != NULL_PTR)) { *pSTATUS3 = CddTps92520_DataMirror.StatRx.aSTATUS3[ulDevice]; } // return SPI Error status bit return ((CddTps92520_DataMirror.StatRx.aSTATUS3[ulDevice].unRaw & CDDTPS92520_SPE) != CDDTPS92520_SPE) ? TRUE : FALSE; } //----------------------------------------------------------------------------- /// \brief Get the CHxVIN measurement /// /// \descr Get the CHxVIN measurement register field /// /// \param ulChnIdx /// \param pucCHxVIN /// /// \return boolean: TRUE - data are valid /// FALSE - data shall be discard //----------------------------------------------------------------------------- boolean CddTps92520_GetCHxVIN(const uint32 ulChnIdx, uint8* pucCHxVIN) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; const uint32 ulChannel = ulChnIdx % CDDTPS92520_NbOfChannel; if ((ulDevice < CDDTPS92520_Cfg_NbOfDevices) && (pucCHxVIN != NULL_PTR)) { *pucCHxVIN = CddTps92520_DataMirror.StatRx.aCHxVIN[ulChannel][ulDevice].Byte.ucCHxVIN; } // return SPI Error status bit return ((CddTps92520_DataMirror.StatRx.aCHxVIN[ulChannel][ulDevice].unRaw & CDDTPS92520_SPE) != CDDTPS92520_SPE) ? TRUE : FALSE; } //----------------------------------------------------------------------------- /// \brief Get the CHxVLED measurement /// /// \descr Get the CHxVLED measurement register field /// /// \param ulChnIdx /// \param pucCHxVLED /// /// \return boolean: TRUE - data are valid /// FALSE - data shall be discard //----------------------------------------------------------------------------- boolean CddTps92520_GetCHxVLED(const uint32 ulChnIdx, uint8* pucCHxVLED) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; const uint32 ulChannel = ulChnIdx % CDDTPS92520_NbOfChannel; if ((ulDevice < CDDTPS92520_Cfg_NbOfDevices) && (pucCHxVLED != NULL_PTR)) { *pucCHxVLED = CddTps92520_DataMirror.StatRx.aCHxVLED[ulChannel][ulDevice].Byte.ucCHxVLED; } // return SPI Error status bit return ((CddTps92520_DataMirror.StatRx.aCHxVLED[ulChannel][ulDevice].unRaw & CDDTPS92520_SPE) != CDDTPS92520_SPE) ? TRUE : FALSE; } //----------------------------------------------------------------------------- /// \brief Get the CHxVLEDON measurement /// /// \descr Get the CHxVLEDON measurement /// /// \param ulChnIdx /// \param pucCHxVLEDON /// /// \return boolean: TRUE - data are valid /// FALSE - data shall be discard //----------------------------------------------------------------------------- boolean CddTps92520_GetCHxVLEDON(const uint32 ulChnIdx, uint8* pucCHxVLEDON) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; const uint32 ulChannel = ulChnIdx % CDDTPS92520_NbOfChannel; if ((ulDevice < CDDTPS92520_Cfg_NbOfDevices) && (pucCHxVLEDON != NULL_PTR)) { *pucCHxVLEDON = CddTps92520_DataMirror.StatRx.aCHxVLEDON[ulChannel][ulDevice].Byte.ucCHxVLEDON; } // return SPI Error status bit return ((CddTps92520_DataMirror.StatRx.aCHxVLEDON[ulChannel][ulDevice].unRaw & CDDTPS92520_SPE) != CDDTPS92520_SPE) ? TRUE : FALSE; } //----------------------------------------------------------------------------- /// \brief Get the CHxVLEDOFF measurement /// /// \descr /// /// \param ulChnIdx /// \param pucCHxVLEDOFF /// /// \return boolean: TRUE - data are valid /// FALSE - data shall be discarded //----------------------------------------------------------------------------- boolean CddTps92520_GetCHxVLEDOFF(const uint32 ulChnIdx, uint8* pucCHxVLEDOFF) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; const uint32 ulChannel = ulChnIdx % CDDTPS92520_NbOfChannel; if ((ulDevice < CDDTPS92520_Cfg_NbOfDevices) && (pucCHxVLEDOFF != NULL_PTR)) { *pucCHxVLEDOFF = CddTps92520_DataMirror.StatRx.aCHxVLEDOFF[ulChannel][ulDevice].Byte.ucCHxVLEDOFF; } // return SPI Error status bit return ((CddTps92520_DataMirror.StatRx.aCHxVLEDOFF[ulChannel][ulDevice].unRaw & CDDTPS92520_SPE) != CDDTPS92520_SPE) ? TRUE : FALSE; } //----------------------------------------------------------------------------- /// \brief Read the CHxIADJL register (LSB) /// /// \descr Read the CHxIADJL 2 bits LSBs /// /// \param ulChnIdx : Channel index /// \param CHxIADJL*: 2 bits LSBs of 10 bits DAC analog current command /// /// \return boolean: TRUE - data are valid /// FALSE - data shall be discarded //----------------------------------------------------------------------------- boolean CddTps92520_GetCHxIADJL(const uint32 ulChnIdx, uint8* pucCHxIADJL) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; const uint32 ulChannel = ulChnIdx % CDDTPS92520_NbOfChannel; if ((ulDevice < CDDTPS92520_Cfg_NbOfDevices) && (pucCHxIADJL != NULL_PTR)) { *pucCHxIADJL = CddTps92520_DataMirror.CtrlRx.aCHxIADJL[ulChannel][ulDevice].Bit.bi2CHxIADJ; } // return SPI Error status bit return ((CddTps92520_DataMirror.CtrlRx.aCHxIADJL[ulChannel][ulDevice].unRaw & CDDTPS92520_SPE) != CDDTPS92520_SPE) ? TRUE : FALSE; } //----------------------------------------------------------------------------- /// \brief Read the CHxIADJH register (MSB) /// /// \descr Read the CHxIADJH 8 bits MSBs /// /// \param ulChnIdx : Channel index /// \param ucCHxIADJH*: 8 bits MSBs of 10 bits DAC analog current command /// /// \return boolean: TRUE - data are valid /// FALSE - data shall be discarded //----------------------------------------------------------------------------- boolean CddTps92520_GetCHxIADJH(const uint32 ulChnIdx, uint8* pucCHxIADJH) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; const uint32 ulChannel = ulChnIdx % CDDTPS92520_NbOfChannel; if ((ulDevice < CDDTPS92520_Cfg_NbOfDevices) && (pucCHxIADJH != NULL_PTR)) { *pucCHxIADJH = CddTps92520_DataMirror.CtrlRx.aCHxIADJH[ulChannel][ulDevice].Byte.ucCHxIADJ; } // return SPI Error status bit return ((CddTps92520_DataMirror.CtrlRx.aCHxIADJH[ulChannel][ulDevice].unRaw & CDDTPS92520_SPE) != CDDTPS92520_SPE) ? TRUE : FALSE; } //----------------------------------------------------------------------------- /// \brief Set the CHxIADJL Analog current command (LSB) /// /// \descr Set the CHxIADJL 2 bits LSBs /// /// \param ulChnIdx : Channel index /// \param CHxIADJL : 2 bits LSBs of 10 bits DAC analog current command /// /// \return void //----------------------------------------------------------------------------- void CddTps92520_SetCHxIADJL(const uint32 ulChnIdx, const tCddTps92520_CHxIADJL CHxIADJL) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; const uint32 ulChannel = ulChnIdx % CDDTPS92520_NbOfChannel; CddTps92520_DataMirror.CtrlTx.aCHxIADJL[ulChannel][ulDevice] = CHxIADJL; } //----------------------------------------------------------------------------- /// \brief Set the CHxIADJH Analog current command (MSB) /// /// \descr Set the CHxIADJH 8 bits MSBs /// /// \param ulChnIdx : Channel index /// \param ucCHxIADJH: 8 bits MSBs of 10 bits DAC analog current command /// /// \return void //----------------------------------------------------------------------------- void CddTps92520_SetCHxIADJH(const uint32 ulChnIdx, const uint8 ucCHxIDJH) { const uint32 ulDevice = ulChnIdx / CDDTPS92520_NbOfChannel; const uint32 ulChannel = ulChnIdx % CDDTPS92520_NbOfChannel; CddTps92520_DataMirror.CtrlTx.aCHxIADJH[ulChannel][ulDevice].Byte.ucCHxIADJ = ucCHxIDJH; } //----------------------------------------------------------------------------- /// \brief Enable / Disable buck by CHxEN bit in SYSCFG1 register /// /// \descr /// /// \param ulChIdx : Channel index /// \param boEn : Enable / Disable /// /// \return void //----------------------------------------------------------------------------- void CddTps92520_EnableChannel(const uint32 ulChIdx, const boolean boEn) { uint32 ulDeviceIdx = ulChIdx / CDDTPS92520_NbOfChannel; // Get TPS92520 device index uint32 ulDeviceCh = ulChIdx % CDDTPS92520_NbOfChannel; // Get Channel index 0 or 1 of the device uint16 unEnable = (boEn != FALSE) ? CDDTPS92520_CH_x_ENABLE : CDDTPS92520_CH_x_DISABLE; if (ulDeviceCh == 0u) // 1st channel { CddTps92520_DataMirror.CtrlTx.aSYSCFG1[ulDeviceIdx].Bit.biCH1EN = unEnable; } else // (ulDeviceCh == CDDLED92520_CH_2_INDEX) { CddTps92520_DataMirror.CtrlTx.aSYSCFG1[ulDeviceIdx].Bit.biCH2EN = unEnable; } } //----------------------------------------------------------------------------- /// \brief Perfom specific actions synchronuously to SPI schedule table /// /// \descr Perform specific actions at the end of Spi_Rx reception before /// switching next entry in schedule table. /// /// not planned but prepared for future use /// /// \param ucAction /// /// \return boolean: TRUE: schedule table must be restarted /// FALSE: schedule table can continue with the next entry. //----------------------------------------------------------------------------- #ifdef CDDTPS92520_UseActions STATIC_AL boolean CddTps92520_StAction(const uint8 ucAction) { boolean boRestart = FALSE; switch (ucAction) { case CDDTPS92520_ST_CHECK_START: // check Ubat break; default: //Do nothing break; } return boRestart; } #endif //----------------------------------------------------------------------------- /// \brief Calculate odd parity bit based on 15 bits (Cmd, Addr, Data) and /// add it to bit position 8 /// /// \descr Concatenate Command bit, Address register and Data /// Calculate parity bit based on Cmd, Addr and data /// Add parity bit in order to have an odd parity on SPI Tx frame /// /// \param unCmd : Read or Write command bit shifted at the bit15 /// \param unAddr : Register address shifted at the bit position 9 /// \param unData : Data shifted at the bit position 0 /// /// \return uint16 : complete SPI command frame (Cmd, Addr, Parity Bit, Data) //----------------------------------------------------------------------------- STATIC_AL uint16 CddTps92520_CalcAndAddParity(const uint16 unCmd, const uint16 unAddr, const uint16 unData) { uint16 unSPITxFrame = 0x0000u; //Initialize polarity bit with '0' uint8 ucNbOfBits = 0x00u; uint16 ucCmdAddrData = (unCmd | unAddr | unData); // Concat Command bit, Address register and Data unSPITxFrame = ucCmdAddrData; // Save concatenation of SPI Tx frame without parity bit for (uint8 i = 0u; i < CDDTPS92520_NbOfBit_SPIFrame; i++) { // Check if LSB bit is '1' if ((ucCmdAddrData & 0x01u) == 1u) { ucNbOfBits++; } else { // Do nothing } // Shift Data to 1bit right ucCmdAddrData = ucCmdAddrData >> 1u; } // If an even number of bits '1' has been counted if (ucNbOfBits % 2u == 0u) { // Set parity bit to 1 in order to have an odd parity in SPI frame unSPITxFrame = unSPITxFrame | CDDTPS92520_ParityBit; } else { // Do nothing. Parity bit already intialized with '0' } return unSPITxFrame; } //----------------------------------------------------------------------------- /// \brief Called before transmission of SPI telegram /// /// \descr The function reads the content of CddTps92520_DataMirror /// and adds the odd parity bit. /// /// \param unDevIdx : index of TP92520 chip /// /// \return uint32 : Tx data (16 LSB are valid) //----------------------------------------------------------------------------- uint32 CddTps92520_SpiTx(const uint16 unDevIdx) { uint32 ulTxData = 0u; // calculate pointer to actual schedule table entry const tCddTps92520_SpiSchedTable* pTabEntry = &aCddTps92520_SpiSchedTable[CddTps92520_ucSchedIx_Tx]; if(unDevIdx == 0u) // is last instance. Spi Tx callbacks called from 6,5,.. 0. Restriction Buck index 0 must be always mounted. { // switch to next schedule table entry for next transmission CddTps92520_ucSchedIx_Tx = pTabEntry->ucNextEntry; } // get SPI command (read or write), register address and contents of control register for next SPI frame // update parity bit according to control register data ulTxData = CddTps92520_CalcAndAddParity(pTabEntry->unCmd, pTabEntry->unAddr, pTabEntry->punTx[unDevIdx]); return ulTxData; } //----------------------------------------------------------------------------- /// \brief Called after reception of a SPI frame /// /// \descr The function reads the content of SPI Rx data provided by SPI and /// store data in CddTps92520_DataMirror. /// /// \param unDevIdx : Device index /// \param ulData : SPI Rx data (only 16 LSB valid) /// /// \return void //----------------------------------------------------------------------------- void CddTps92520_SpiRx(const uint16 unDevIdx, const uint32 ulData) { // calculate pointer to actual schedule table entry const tCddTps92520_SpiSchedTable* pTabEntry = &aCddTps92520_SpiSchedTable[CddTps92520_ucSchedIx_Rx]; pTabEntry->punRx[unDevIdx] = (uint16) ulData; // store RX data (only 16 LSB are relevant) if(unDevIdx == 0u) // is last instance. Spi Tx callbacks called from 6,5,.. 0. Restriction Buck index 0 must be always mounted. { // set index to next schedule table entry CddTps92520_ucSchedIx_Rx = pTabEntry->ucNextEntry; CddTps92520_ucSchedIx_Tx = pTabEntry->ucNextEntry; // make copy to ensure synchronism of RX and TX // calculate pointer to actual schedule table entry (read next TX entry to check action) pTabEntry = &aCddTps92520_SpiSchedTable[CddTps92520_ucSchedIx_Tx]; #ifdef CDDTPS92520_UseActions // not planned but prepared for future use if (pTabEntry->ucAction != CDDTPS92520_NO_ACT) { boolean boSchTableRestart = CddTps92520_StAction(pTabEntry->ucAction); if (boSchTableRestart != FALSE) { CddTps92520_ucSchedIx_Rx = 0u; CddTps92520_ucSchedIx_Tx = 0u; } } #endif } } //----------------------------------------------------------------------------- /// \brief CddTps92520_SpiGetConfig /// /// \descr Provides device population footprint to CddSpi /// to handle transmissions with bucks /// /// \param punData: Data pointer to provide footprint /// /// \return boolean /// TRUE : Footprint data valid /// FALSE: Footprint data invalid /// //----------------------------------------------------------------------------- boolean CddTps92520_SpiGetConfig(uint16* punData) { boolean boRetVal = FALSE; *punData = 0u; if (CDDTPS92520_EftDataValid() != FALSE) // end of line data available { for (uint32 ulDevice = 0u; ulDevice < CDDTPS92520_Cfg_NbOfDevices; ulDevice++) { uint32 ulMask = (CDDTPS92520_ECUVARCFG_ucDrvType(ulDevice) != 0u) ? 1u : 0u; *punData |= (uint16)(ulMask << ulDevice); } boRetVal = TRUE; } return boRetVal; } #define ctadCddLed_STOP_SEC_CODE #include <../Cfg/CddTps92520_MemMap.h> //----------------------------------------------------------------------------- // End declaration or definitions of functions //-----------------------------------------------------------------------------