/********************************************************************************************************************** * COPYRIGHT * ------------------------------------------------------------------------------------------------------------------- * \verbatim * * This software is copyright protected and proprietary to Vector Informatik GmbH. * Vector Informatik GmbH grants to you only those rights as set out in the license conditions. * All other rights remain with Vector Informatik GmbH. * \endverbatim * ------------------------------------------------------------------------------------------------------------------- * LICENSE * ------------------------------------------------------------------------------------------------------------------- * Module: NvM * Program: MSR_Vector_SLP4 * Customer: Marelli Automotive Components (Wuhu) Co., Ltd. * Expiry Date: Not restricted * Ordered Derivat.: TC377TP * License Scope : The usage is restricted to CBD2201205_D03 * * ------------------------------------------------------------------------------------------------------------------- * FILE DESCRIPTION * ------------------------------------------------------------------------------------------------------------------- * File: NvM_Cfg.c * Generation Time: 2023-10-23 09:18:11 * Project: CBD2200592_D00_demo - Version 1.0 * Delivery: CBD2201205_D03 * Tool Version: DaVinci Configurator Classic 5.26.35 SP2 * * *********************************************************************************************************************/ /* PRQA S 5087 MemMap */ /* MD_MSR_MemMap */ /********************************************************************************************************************** * MODULE SWITCH *********************************************************************************************************************/ /* this switch enables the header file(s) to hide some parts. */ #define NVM_CFG_SOURCE /* multiple inclusion protection */ #define NVM_H_ /* Required for RTE ROM block definitions */ #define RTE_MICROSAR_PIM_EXPORT /********************************************************************************************************************** * INCLUDES *********************************************************************************************************************/ #include "Std_Types.h" /* This tag will only be replaced, if one or more callbacks via Service Ports had been configured */ /********************************************************************************************************************** * MODULE HEADER INCLUDES *********************************************************************************************************************/ /* only includes the public part of config */ #include "NvM_Cfg.h" #include "NvM_PrivateCfg.h" #include "BswM_NvM.h" /********************************************************************************************************************** * VERSION CHECKS *********************************************************************************************************************/ #if ((NVM_CFG_MAJOR_VERSION != (9u)) \ || (NVM_CFG_MINOR_VERSION != (2u))) # error "Version numbers of NvM_Cfg.c and NvM_Cfg.h are inconsistent!" #endif /* include list of the callback definitions */ #include "Dem_Cbk.h" #include "vFotaH_Services.h" #include "Appl_vSwUpdM_Nvm.h" /* include configured file declaring or defining resource (un)locking service(s) */ #include "SchM_NvM.h" /********************************************************************************************************************** * PUBLIC CONSTANTS *********************************************************************************************************************/ #define NVM_START_SEC_CONST_16 #include "NvM_MemMap.h" /* maximum number of bytes to be processed in one crc calculation step */ CONST(uint16, NVM_CONFIG_CONST) NvM_NoOfCrcBytes_u16 = 64u; /* constant holding Crc queue size value */ CONST(uint16, NVM_PRIVATE_CONST) NvM_CrcQueueSize_u16 = NVM_TOTAL_NUM_OF_NVRAM_BLOCKS; #define NVM_STOP_SEC_CONST_16 #include "NvM_MemMap.h" /* 8Bit Data section containing the data integrity buffers */ #define NVM_START_SEC_VAR_NO_INIT_8 #include "NvM_MemMap.h" static VAR(uint8, NVM_PRIVATE_DATA) NvMConfigBlock_RamBlock_au8[4u]; #if ((NVM_DATA_INTEGRITY_INT_BUFFER == STD_ON) || (NVM_REPAIR_REDUNDANT_BLOCKS_API == STD_ON)) static VAR(uint8, NVM_PRIVATE_DATA) ctaaAvacNbnCalibrationZeroLevel_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) ctaaSysMonNbnEcuResetSourceCode_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) ctaaDiagM_NbnProgrammingDate_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) ctaaDiagM_NbnVIN_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) vSwUpdM_Appl_RegionEraseAddresses_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) vSwUpdM_Appl_RegionProgrammingAttempts_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) vSwUpdM_Appl_RegionStates_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) vSwUpdM_Appl_ResumeInfo_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) vSwUpdM_Appl_SegmentAttributes_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) vSwUpdM_Appl_SegmentCount_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) vSwUpdM_Appl_SegmentWriteAddress_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) ctaaDiagM_NbnSWIN_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) ctaaCLamp2LightNbn_IDCM_ISDEnduranceMileagePromptEn_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) ctaaCLamp2LightNbn_IDCM_ISDLockStateRemainderEn_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) ctaaCLamp2LightNbn_IDCM_LightShowTheme_Set_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) ctaaCLamp2LightNbn_IDCM_SmrtAcsTheme_Req_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) ctaaVehicleHubNbn_CSM_ADBSwitch_St_Crc[2u]; static VAR(uint8, NVM_PRIVATE_DATA) ctaaDiagM_NbnFingerprintDataidentifier_Crc[2u]; #endif #define NVM_STOP_SEC_VAR_NO_INIT_8 #include "NvM_MemMap.h" /* Data section containing the internal buffers. If job forwarding from application to memory core is enabled the buffer must be placed in the shared memory. */ #define NVM_START_SEC_VAR_INTERNAL_BUFFER #include "NvM_MemMap.h" #if ((NVM_DATA_INTEGRITY_INT_BUFFER == STD_ON) || (NVM_REPAIR_REDUNDANT_BLOCKS_API == STD_ON) \ || (NVM_JOB_FORWARDING_TO_MEMORY_CORE == STD_ON) || (NVM_SET_RAM_BLOCK_STATUS_API == STD_ON)) /* create the internal buffer of size NVM_INTERNAL_BUFFER_LENGTH */ VAR(uint8, NVM_PRIVATE_DATA) NvM_InternalBuffer_au8[NVM_INTERNAL_BUFFER_LENGTH]; /* PRQA S 1533 */ /* MD_NvM_Cfg_8.9_InternalBuffer */ /* create the internal immediate prio buffer of size NVM_INTERNAL_IMMEDIATE_DATA_BUFFER_LENGTH */ VAR(uint8, NVM_PRIVATE_DATA) NvM_InternalImmediateDataBuffer[NVM_INTERNAL_IMMEDIATE_DATA_BUFFER_LENGTH]; /* PRQA S 1533 */ /* MD_NvM_Cfg_8.9_InternalBuffer */ #endif #define NVM_STOP_SEC_VAR_INTERNAL_BUFFER #include "NvM_MemMap.h" #define NVM_START_SEC_CONST_UNSPECIFIED #include "NvM_MemMap.h" CONST(NvM_BlockIdType, NVM_PUBLIC_CONST) NvM_NoOfBlockIds_t = NVM_TOTAL_NUM_OF_NVRAM_BLOCKS; CONST(NvM_CompiledConfigIdType, NVM_PUBLIC_CONST) NvM_CompiledConfigId_t = {(uint16)NVM_COMPILED_CONFIG_ID}; /* PRQA S 0759 */ /* MD_MSR_Union */ /* block descriptor table that holds the static configuration parameters of the RAM, ROM and NVBlocks. * This table has to be adjusted according to the configuration of the NVManager. */ CONST(NvM_BlockDescriptorType, NVM_CONFIG_CONST) NvM_BlockDescriptorTable_at[NVM_TOTAL_NUM_OF_NVRAM_BLOCKS] = { { /* MultiBlockRequest */ NULL_PTR /* NvMRamBlockDataAddress */ , NULL_PTR /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { 0u } /* Flags */ , 0x0001u /* NV block Base number (defined by FEE/EA) */ , 0U /* NvMNvBlockLength */ , 0U /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 0u /* NvBlockCount */ , 255u /* NvMBlockJobPriority */ , 0u /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* NvMConfigBlock */ (NvM_RamAddressType)NvMConfigBlock_RamBlock_au8 /* NvMRamBlockDataAddress */ , NULL_PTR /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_OFF, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0020u /* NV block Base number (defined by FEE/EA) */ , 2u /* NvMNvBlockLength */ , 2u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 2u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_REDUNDANT /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* DemAdminDataBlock */ (NvM_RamAddressType)&Dem_Cfg_AdminData /* NvMRamBlockDataAddress */ , NULL_PTR /* NvMRomBlockDataAddress */ , Dem_NvM_InitAdminData /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0360u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_AdminData) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_AdminData) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemStatusDataBlock */ (NvM_RamAddressType)&Dem_Cfg_StatusData /* NvMRamBlockDataAddress */ , NULL_PTR /* NvMRomBlockDataAddress */ , Dem_NvM_InitStatusData /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x01C0u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_StatusData) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_StatusData) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock0 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_0 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0040u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_0) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_0) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock1 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_1 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x01E0u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_1) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_1) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock2 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_2 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x01A0u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_2) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_2) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock3 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_3 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0060u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_3) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_3) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock4 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_4 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0220u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_4) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_4) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock5 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_5 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0080u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_5) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_5) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock6 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_6 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0240u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_6) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_6) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock7 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_7 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x00A0u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_7) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_7) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock8 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_8 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0260u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_8) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_8) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock9 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_9 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x00C0u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_9) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_9) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock10 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_10 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0280u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_10) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_10) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock11 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_11 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x00E0u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_11) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_11) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock12 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_12 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x02A0u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_12) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_12) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock13 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_13 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0100u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_13) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_13) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock14 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_14 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x02C0u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_14) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_14) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock15 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_15 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0120u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_15) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_15) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock16 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_16 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x02E0u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_16) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_16) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock17 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_17 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0140u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_17) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_17) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock18 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_18 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0300u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_18) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_18) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock19 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_19 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0160u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_19) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_19) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock20 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_20 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0320u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_20) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_20) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock21 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_21 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0180u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_21) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_21) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock22 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_22 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0340u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_22) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_22) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* DemPrimaryDataBlock23 */ (NvM_RamAddressType)&Dem_Cfg_PrimaryEntry_23 /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Dem_Cfg_MemoryEntryInit /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , Dem_NvM_JobFinished /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_ON, NVM_INVOKE_CALLBACKS_FOR_READALL_ON, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_ON, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0200u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_23) /* NvMNvBlockLength */ , (uint16)sizeof(Dem_Cfg_PrimaryEntry_23) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* ctaaAvacNbnCalibrationZeroLevel */ (NvM_RamAddressType)&Rte_ctaaAvac_PimCalibrationZeroLevel /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaAvac_CpCalibrationZeroLevel /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaAvacNbnCalibrationZeroLevel_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0030u /* NV block Base number (defined by FEE/EA) */ , 4u /* NvMNvBlockLength */ , 4u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* ctaaSysMonNbnEcuResetSourceCode */ (NvM_RamAddressType)&Rte_ctaaSysMon_PimEcuResetSourceCode /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaSysMon_CpEcuResetSourceCode /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaSysMonNbnEcuResetSourceCode_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0098u /* NV block Base number (defined by FEE/EA) */ , 35u /* NvMNvBlockLength */ , 35u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* ctaaDiagM_NbnProgrammingDate */ (NvM_RamAddressType)&Rte_ctaaDiagM_PimProgrammingDate /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaDiagM_CpProgrammingDate /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaDiagM_NbnProgrammingDate_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0130u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Rte_ctaaDiagM_PimProgrammingDate) /* NvMNvBlockLength */ , (uint16)sizeof(Rte_ctaaDiagM_PimProgrammingDate) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* ctaaDiagM_NbnVIN */ (NvM_RamAddressType)&Rte_ctaaDiagM_PimVIN /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaDiagM_CpVIN /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaDiagM_NbnVIN_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0198u /* NV block Base number (defined by FEE/EA) */ , (uint16)sizeof(Rte_ctaaDiagM_PimVIN) /* NvMNvBlockLength */ , (uint16)sizeof(Rte_ctaaDiagM_PimVIN) /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* vFotaH_NvMModuleInfo */ (NvM_RamAddressType)&vFotaH_NvMInfoBlock /* NvMRamBlockDataAddress */ , NULL_PTR /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_OFF, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x01D0u /* NV block Base number (defined by FEE/EA) */ , 40u /* NvMNvBlockLength */ , 40u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_PartitionStates */ (NvM_RamAddressType)&vSwUpdM_Appl_PartitionStates /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultPartitionStates /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x03D0u /* NV block Base number (defined by FEE/EA) */ , 2u /* NvMNvBlockLength */ , 2u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_PartitionValidities */ (NvM_RamAddressType)&vSwUpdM_Appl_PartitionValidities /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultPartitionValidities /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x03E0u /* NV block Base number (defined by FEE/EA) */ , 2u /* NvMNvBlockLength */ , 2u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_PartitionRevisions */ (NvM_RamAddressType)&vSwUpdM_Appl_PartitionRevisions /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultPartitionRevisions /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x03F0u /* NV block Base number (defined by FEE/EA) */ , 8u /* NvMNvBlockLength */ , 8u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_ModuleStates */ (NvM_RamAddressType)&vSwUpdM_Appl_ModuleStates /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultModuleStates /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x03B0u /* NV block Base number (defined by FEE/EA) */ , 4u /* NvMNvBlockLength */ , 4u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_ModuleValidities */ (NvM_RamAddressType)&vSwUpdM_Appl_ModuleValidities /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultModuleValidities /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x03C0u /* NV block Base number (defined by FEE/EA) */ , 4u /* NvMNvBlockLength */ , 4u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_ModuleRevisions */ (NvM_RamAddressType)&vSwUpdM_Appl_ModuleRevisions /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultModuleRevisions /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x03A0u /* NV block Base number (defined by FEE/EA) */ , 16u /* NvMNvBlockLength */ , 16u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_RegionEraseAddresses */ (NvM_RamAddressType)&vSwUpdM_Appl_RegionEraseAddresses /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultRegionEraseAddresses /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , vSwUpdM_Appl_RegionEraseAddresses_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0218u /* NV block Base number (defined by FEE/EA) */ , 8u /* NvMNvBlockLength */ , 8u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_RegionProgrammingAttempts */ (NvM_RamAddressType)&vSwUpdM_Appl_RegionProgrammingAttempts /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultRegionProgrammingAttempts /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , vSwUpdM_Appl_RegionProgrammingAttempts_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0228u /* NV block Base number (defined by FEE/EA) */ , 16u /* NvMNvBlockLength */ , 16u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_RegionStates */ (NvM_RamAddressType)&vSwUpdM_Appl_RegionStates /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultRegionStates /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , vSwUpdM_Appl_RegionStates_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x01E8u /* NV block Base number (defined by FEE/EA) */ , 4u /* NvMNvBlockLength */ , 4u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_UpdateState */ (NvM_RamAddressType)&vSwUpdM_Appl_UpdateState /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultUpdateState /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0400u /* NV block Base number (defined by FEE/EA) */ , 1u /* NvMNvBlockLength */ , 1u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_ModuleProgrammingAttempts */ (NvM_RamAddressType)&vSwUpdM_Appl_ModuleProgrammingAttempts /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultModuleProgrammingAttempts /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0390u /* NV block Base number (defined by FEE/EA) */ , 16u /* NvMNvBlockLength */ , 16u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_ResumeInfo */ (NvM_RamAddressType)&vSwUpdM_Appl_ResumeInfo /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultResumeInfo /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , vSwUpdM_Appl_ResumeInfo_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0248u /* NV block Base number (defined by FEE/EA) */ , 16u /* NvMNvBlockLength */ , 16u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_SegmentAttributes */ (NvM_RamAddressType)&vSwUpdM_Appl_SegmentAttributes /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultSegmentAttributes /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , vSwUpdM_Appl_SegmentAttributes_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0250u /* NV block Base number (defined by FEE/EA) */ , 320u /* NvMNvBlockLength */ , 320u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_SegmentCount */ (NvM_RamAddressType)&vSwUpdM_Appl_SegmentCount /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultSegmentCount /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , vSwUpdM_Appl_SegmentCount_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0258u /* NV block Base number (defined by FEE/EA) */ , 16u /* NvMNvBlockLength */ , 16u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* vSwUpdM_Appl_SegmentWriteAddress */ (NvM_RamAddressType)&vSwUpdM_Appl_SegmentWriteAddresses /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&vSwUpdM_Appl_DefaultSegmentWriteAddresses /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , vSwUpdM_Appl_SegmentWriteAddress_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0238u /* NV block Base number (defined by FEE/EA) */ , 80u /* NvMNvBlockLength */ , 80u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* NvM_FblGeneral */ NULL_PTR /* NvMRamBlockDataAddress */ , NULL_PTR /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_OFF, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_OFF, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0370u /* NV block Base number (defined by FEE/EA) */ , 8u /* NvMNvBlockLength */ , 8u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* NvM_FblMetaData */ NULL_PTR /* NvMRamBlockDataAddress */ , NULL_PTR /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , NULL_PTR /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_OFF, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_OFF, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0380u /* NV block Base number (defined by FEE/EA) */ , 25u /* NvMNvBlockLength */ , 25u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 2u /* NvBlockCount */ , 0u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_DATASET /* NvMBlockManagementType */ , NVM_BLOCK_DATA_INTEGRITY_OFF /* NvMBlockDataIntegrityType */ }, { /* ctaaDiagM_NbnSWIN */ (NvM_RamAddressType)&Rte_ctaaDiagM_PimSWIN /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaDiagM_CpSWIN /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaDiagM_NbnSWIN_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0210u /* NV block Base number (defined by FEE/EA) */ , 64u /* NvMNvBlockLength */ , 64u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* ctaaCLamp2LightNbn_IDCM_ISDEnduranceMileagePromptEn */ (NvM_RamAddressType)&Rte_ctaaCLamp2Light_Pim_IDCM_ISDEnduranceMileagePromptEn /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaCLamp2Light_Cp_IDCM_ISDEnduranceMileagePromptEn /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaCLamp2LightNbn_IDCM_ISDEnduranceMileagePromptEn_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0268u /* NV block Base number (defined by FEE/EA) */ , 1u /* NvMNvBlockLength */ , 1u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* ctaaCLamp2LightNbn_IDCM_ISDLockStateRemainderEn */ (NvM_RamAddressType)&Rte_ctaaCLamp2Light_Pim_IDCM_ISDLockStateRemainderEn /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaCLamp2Light_Cp_IDCM_ISDLockStateRemainderEn /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaCLamp2LightNbn_IDCM_ISDLockStateRemainderEn_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0270u /* NV block Base number (defined by FEE/EA) */ , 1u /* NvMNvBlockLength */ , 1u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* ctaaCLamp2LightNbn_IDCM_LightShowTheme_Set */ (NvM_RamAddressType)&Rte_ctaaCLamp2Light_Pim_IDCM_LightShowTheme_Set /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaCLamp2Light_Cp_IDCM_LightShowTheme_Set /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaCLamp2LightNbn_IDCM_LightShowTheme_Set_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0278u /* NV block Base number (defined by FEE/EA) */ , 1u /* NvMNvBlockLength */ , 1u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* ctaaCLamp2LightNbn_IDCM_SmrtAcsTheme_Req */ (NvM_RamAddressType)&Rte_ctaaCLamp2Light_Pim_IDCM_SmrtAcsTheme_Req /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaCLamp2Light_Cp_IDCM_SmrtAcsTheme_Req /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaCLamp2LightNbn_IDCM_SmrtAcsTheme_Req_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0288u /* NV block Base number (defined by FEE/EA) */ , 1u /* NvMNvBlockLength */ , 1u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* ctaaVehicleHubNbn_CSM_ADBSwitch_St */ (NvM_RamAddressType)&Rte_ctaaVehicleHub_Pim_CSM_ADBSwitch_St /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaVehicleHub_Cp_CSM_ADBSwitch_St /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaVehicleHubNbn_CSM_ADBSwitch_St_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0290u /* NV block Base number (defined by FEE/EA) */ , 1u /* NvMNvBlockLength */ , 1u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ }, { /* ctaaDiagM_NbnFingerprintDataidentifier */ (NvM_RamAddressType)&Rte_ctaaDiagM_PimFingerprintDataidentifier /* NvMRamBlockDataAddress */ , (NvM_RomAddressType)&Rte_ctaaDiagM_CpFingerprintDataidentifier /* NvMRomBlockDataAddress */ , NULL_PTR /* NvMInitBlockCallback */ , NULL_PTR /* NvMInitBlockCallback (extended) */ , NULL_PTR /* NvMSingleBlockCallback */ , NULL_PTR /* NvMSingleBlockCallback (extended) */ , NULL_PTR /* NvMReadRamBlockFromNvCallback */ , NULL_PTR /* NvMWriteRamBlockToNvCallback */ , NULL_PTR /* NvMBlockPreWriteTransformCallback */ , NULL_PTR /* NvMBlockPostReadTransformCallback */ , ctaaDiagM_NbnFingerprintDataidentifier_Crc /* RamBlockDataIntegrity data buffer (defined by NvM) */ , NULL_PTR /* CRCCompMechanism CRC data (defined by NvM) */ , { NVM_CALC_RAM_BLOCK_CRC_OFF, NVM_BLOCK_WRITE_PROT_OFF, NVM_BLOCK_WRITE_BLOCK_ONCE_OFF, NVM_RESISTANT_TO_CHANGED_SW_ON, NVM_SELECT_BLOCK_FOR_READALL_ON, NVM_SELECT_BLOCK_FOR_PRE_READALL_OFF, NVM_SELECT_BLOCK_FOR_WRITEALL_OFF, NVM_INVOKE_CALLBACKS_FOR_READALL_OFF, NVM_INVOKE_CALLBACKS_FOR_WRITEALL_OFF, NVM_BLOCK_USE_SET_RAM_BLOCK_STATUS_ON, NVM_BLOCK_CHECK_LOSS_OF_REDUNDANCY_OFF, NVM_BLOCK_NOTIFY_BSWM_OFF } /* Flags */ , 0x0190u /* NV block Base number (defined by FEE/EA) */ , 20u /* NvMNvBlockLength */ , 20u /* NvMNvBlockNVRAMDataLength */ , 0u /* NvCryptoReference */ , 0u /* NvMacSize */ , 0u /* NvMacReference */ , 1u /* NvBlockCount */ , 127u /* NvMBlockJobPriority */ , MEMIF_Fee /* Device Id (defined by MemIf) */ , NVM_BLOCK_NATIVE /* NvMBlockManagementType */ , NVM_BLOCK_CRC_16_ON /* NvMBlockDataIntegrityType */ } }; /* Permanent RAM and ROM block length checks - compile time (only available for blocks with enabled length check */ /* PRQA S 3494, 3213, 1755 BlockLengthChecks */ /* MD_NvM_Cfg_14.3, MD_NvM_Cfg_2.4 */ /* How does it work: * data length = sizeof(ramBlock - CrcLength * - CRC internal buffer enabled: CRC length == 0, RAM blocks store only data, CRC is handles internally * - CRC internal buffer disabled: CRC length is the number of CRC bytes, for blocks without CRC the length == 0 * - for ROM blocks the CRC does not matter * Data length has to be > or < or == to configured NvM block length, depending on configuration (see above). * In case the lengths do not match a bitfield with length -1 will be created and shall cause a compiler error. * The compiler error shall mark the line with invalid bitfield (bitfield length == -1) - the line includes all required information: * - Block_ + NvM block name * - length error description * - RAM block name, CRC length and configured NvM block length */ typedef unsigned int NvM_LengthCheck; /* Block Length Check and Automatic Block Length enabled: error if sizeof RAM block is greater than the configured block length */ #define SizeOfRamBlockGreaterThanConfiguredLength(ramBlock, crcLength, blockLength) (((sizeof(ramBlock) - (crcLength)) > (blockLength)) ? -1 : 1) /* PRQA S 3453 */ /* MD_MSR_FctLikeMacro */ /* Block Length Check and Strict Length Check enabled: error if the sizeof RAM block does not match the configured block length */ #define SizeOfRamBlockDoesNotMatchConfiguredLength(ramBlock, crcLength, blockLength) (((sizeof(ramBlock) - (crcLength)) != (blockLength)) ? -1 : 1) /* PRQA S 3453 */ /* MD_MSR_FctLikeMacro */ /* Block Length Check enabled and Strict Length Check disabled: error if the sizeof RAM block is less than the configured block length */ #define SizeOfRamBlockLessThanConfiguredLength(ramBlock, crcLength, blockLength) (((sizeof(ramBlock) - (crcLength)) < (blockLength)) ? -1 : 1) /* PRQA S 3453 */ /* MD_MSR_FctLikeMacro */ /* RAM block length checks */ /* Block Length Check and Automatic Block Length enabled: error if sizeof ROM block is less than sizeof RAM block */ #define SizeOfRomBlockLessThanSizeOfRamBlock(romBlock, ramBlock) ((sizeof(romBlock) < sizeof(ramBlock)) ? -1 : 1) /* PRQA S 3453 */ /* MD_MSR_FctLikeMacro */ /* Block Length Check and Strict Length Check enabled: error if the sizeof ROM block does not match the configured block length */ #define SizeOfRomBlockDoesNotMatchConfiguredLength(romBlock, blockLength) ((sizeof(romBlock) != (blockLength)) ? -1 : 1) /* PRQA S 3453 */ /* MD_MSR_FctLikeMacro */ /* Block Length Check enabled, Strict Length disabled: error if the sizeof ROM block is less than the configured block length */ #define SizeOfRomBlockLessThanConfiguredLength(romBlock, blockLength) ((sizeof(romBlock) < (blockLength)) ? -1 : 1) /* PRQA S 3453 */ /* MD_MSR_FctLikeMacro */ /* ROM block length checks */ /* PRQA L:BlockLengthChecks */ /* Permanent RAM and ROM block length checks - END */ #define NVM_STOP_SEC_CONST_UNSPECIFIED #include "NvM_MemMap.h" #define NVM_START_SEC_VAR_NO_INIT_UNSPECIFIED #include "NvM_MemMap.h" #if(NVM_API_CONFIG_CLASS != NVM_API_CONFIG_CLASS_1) /* Job Queue used for normal and immediate prio jobs */ VAR(NvM_QueueEntryType, NVM_PRIVATE_DATA) NvM_JobQueue_at[NVM_SIZE_STANDARD_JOB_QUEUE + NVM_SIZE_IMMEDIATE_JOB_QUEUE]; #endif #define NVM_STOP_SEC_VAR_NO_INIT_UNSPECIFIED #include "NvM_MemMap.h" #define NVM_START_SEC_CODE #include "NvM_MemMap.h" /********************************************************************************************************************** * NvM_EnterCriticalSection **********************************************************************************************************************/ /*! * \internal * - #10 enter SchM exclusive area for NvM * \endinternal */ FUNC(void, NVM_PRIVATE_CODE) NvM_EnterCriticalSection(void) { /* do what ever was defined to do for locking the resources */ SchM_Enter_NvM_NVM_EXCLUSIVE_AREA_0(); } /********************************************************************************************************************** * NvM_ExitCriticalSection **********************************************************************************************************************/ /*! * \internal * - #10 exit SchM exclusive area for NvM * \endinternal */ FUNC(void, NVM_PRIVATE_CODE) NvM_ExitCriticalSection(void) { /* do what ever was defined to do for unlocking the resources */ SchM_Exit_NvM_NVM_EXCLUSIVE_AREA_0(); } /* PRQA S 3453 1 */ /* MD_MSR_FctLikeMacro */ #define NvM_invokeMultiBlockMode(serv, res) BswM_NvM_CurrentJobMode((serv),(res)) /* if NvMBswMMultiBlockJobStatusInformation is TRUE */ /* PRQA S 3453 1 */ /* MD_MSR_FctLikeMacro */ #define NvM_invokeMultiCbk(serv, res) /* if Multi Block Callback is configured */ /* PRQA S 3453 1 */ /* MD_MSR_FctLikeMacro */ #define NvM_invokeDetectedLossOfRedundancyCallback(blockId) NVM_DUMMY_STATEMENT((blockId)) /********************************************************************************************************************** * NvM_MultiBlockCbk **********************************************************************************************************************/ /*! * \internal * - #10 invoke the BSWM notification if any is configured * - #20 in case the given job result isn't set to pending, invoke the multi block job end notification * \endinternal */ /* PRQA S 3206 1 */ /* MD_NvM_Cfg_2.7 */ FUNC(void, NVM_PRIVATE_CODE) NvM_MultiBlockCbk(NvM_ServiceIdType ServiceId, NvM_RequestResultType JobResult) { /* The complete function body is designed to be optimized away by the compiler, if it is not needed * * If the used macro is empty, the compiler may decide to remove code because it would contain * * empty execution blocks (it does not matter whether conditions were TRUE or FALSE */ NvM_invokeMultiBlockMode(ServiceId, JobResult); if(JobResult != NVM_REQ_PENDING) { NvM_invokeMultiCbk(ServiceId, JobResult); } } /********************************************************************************************************************** * NvM_NotifyLossOfRedundancy **********************************************************************************************************************/ /*! * \internal * - invoke the notification callback if any is configured * \endinternal */ /* PRQA S 3206 1 */ /* MD_NvM_Cfg_2.7 */ FUNC(void, NVM_PRIVATE_CODE) NvM_NotifyLossOfRedundancy(NvM_BlockIdType BlockId) { NvM_invokeDetectedLossOfRedundancyCallback(BlockId); } #define NVM_STOP_SEC_CODE #include "NvM_MemMap.h" /* PRQA L:MemMap */ /* Justification for module specific MISRA deviations: MD_NvM_Cfg_2.4 Reason: NvM provides compile time block length checks via structures with bitfields with positive or negative length - the negative length lead to compiler errors. It is possible to use == or even >= check, if only one is used, the other one will never be used. The macros are always available. The created structures will never be used by NvM. Risk: No risk. Prevention: No prevention. MD_NvM_Cfg_2.7: Reason: The function NvM_MultiBlockCbk gets all needed parameters to invoke the BSWM and multi block job end callback. If both are disabled, the function is empty and does nothing - the passed parameters remain unused. Risk: No risk. Prevention: No prevention. MD_NvM_Cfg_8.9_InternalBuffer: Reason: NvM uses an internal buffer for explicit synchronization, in internal CRC buffer use case and for repair redundant blocks. Depending on configuration all, one or even none of the uses is enabled - therefore sometimes the internal buffer is used only once. Risk: No risk. Prevention: No prevention. MD_NvM_Cfg_8.11: Reason: Array of unknown size is used in order to reduce dependencies. Risk: In case the array size shall be determined it would be incorrect. Prevention: No prevention. MD_NvM_Cfg_14.3: Reason: NvM provides compile time block length checks via bitfields with positive or negative length - the negative length lead to compiler errors. With valid configuration (all block length are configured correctly), all checks are false. Risk: No risk. Prevention: No prevention. If needed the compile time checks can be disabled via configuration. */ /********************************************************************************************************************** * END OF FILE: NvM_Cfg.c *********************************************************************************************************************/