#line 1 "SC92F8003_Lib\src\sc92f8003_ssi.c" /0
 
 
 
 
 
 
 
 
 
 
 
  
#line 1 ".\SC92F8003_Lib\Inc\sc92f8003_ssi.h" /0
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  
#line 1 "\1.Project\git\SinWave\SC92F8003_Lib\Inc\sc92f8003.h" /0
 
 
 
  
#line 1 "\1.Project\git\SinWave\SC92F8003_Lib\Inc\SC92F8003_C.H" /0









 
 
 
 
 
 
 sfr   ACC	  = 0xE0;		 
 sfr   B	      = 0xF0;		 
 sfr   PSW	  = 0xD0;		 
 sfr   DPH	  = 0x83;		 
 sfr   DPL	  = 0x82;		 
 sfr   SP	  = 0x81;		 
 
 
 
 sfr   PCON    = 0x87;		 
 
 
 sfr   IP1     = 0XB9;        
 sfr   IP	  = 0xB8;		 
 sfr   IE	  = 0xA8;		 
 sfr   IE1     = 0XA9;  	     
 
 
 sfr   P2PH	  = 0xA2;		 
 sfr	  P2CON	  = 0xA1;		 
 sfr   P2	  = 0xA0;		 
 sfr   P1PH    = 0x92;		 
 sfr	  P1CON	  = 0x91;		 
 sfr   P1	  = 0x90;		 
 sfr	  P0PH	  = 0x9B;		 
 sfr	  P0CON	  = 0x9A;		 
 sfr   P0	  = 0x80;		 
 
 
 sfr   TMCON	  = 0x8E;		 
 sfr   TH1	  = 0x8D;		 
 sfr   TH0	  = 0x8C;		 
 sfr   TL1	  = 0x8B;		 
 sfr   TL0	  = 0x8A;		 
 sfr   TMOD	  = 0x89;		 
 sfr   TCON	  = 0x88;		 
 sfr   T2CON   = 0xC8;        
 sfr   T2MOD   = 0xC9; 	     
 sfr   RCAP2L  = 0xCA;        
 sfr   RCAP2H  = 0xCB;        
 sfr   TL2     = 0xCC;        
 sfr   TH2     = 0xCD;        
 
 
 
 sfr	  ADCCFG1 = 0xAA;		 
 sfr	  ADCCFG0 = 0xAB;		 
 sfr   ADCCON  = 0XAD;        
 sfr   ADCVL	  = 0xAE;		 
 sfr   ADCVH	  = 0xAF;		 
 
 
 sfr   PWMCFG  = 0xD1;		 
 sfr   PWMCON0 = 0xD2;		 
 sfr   PWMPRD  = 0xD3;		 
 sfr   PWMDTYA = 0xD4;		 
 sfr   PWMDTY0 = 0xD5;		 
 sfr   PWMDTY1 = 0xD6;		 
 sfr   PWMDTY2 = 0xD7;		 
 sfr   PWMCON1 = 0xDA;		 
 sfr   PWMDTYB = 0xDB;		 
 sfr   PWMDTY3 = 0xDC;		 
 sfr   PWMDTY4 = 0xDD;		 
 sfr   PWMDTY5 = 0xDE;		 
 sfr   PWMDTY6 = 0xDF;		 
 
 
 
 
 sfr	  BTMCON  = 0XCE;        
 sfr   WDTCON  = 0xCF;		 
 
 
 sfr   OTCON   = 0X8F;		 
 
 
 sfr   INT0F   = 0XBA; 	     
 sfr   INT0R   = 0XBB; 	     
 sfr   INT1F   = 0XBC; 	     
 sfr   INT1R   = 0XBD; 	     
 sfr   INT2F   = 0XC6; 	     
 sfr   INT2R   = 0XC7; 	     
 
 
 sfr   IAPCTL  = 0xF6;		 
 sfr   IAPDAT  = 0xF5;		 
 sfr   IAPADE  = 0xF4;        
 sfr   IAPADH  = 0xF3;		 
 sfr   IAPADL  = 0xF2;		 
 sfr   IAPKEY  = 0xF1;		 
 
 
 sfr   SCON    = 0X98;        
 sfr   SBUF    = 0X99;        
 
 
 sfr   SSCON0  = 0X9D;        
 sfr   SSCON1  = 0X9E;        
 sfr   SSCON2  = 0X95;        
 sfr   SSDAT   = 0X9F;        
 
 sfr   OPINX   = 0XFE; 
 sfr   OPREG   = 0XFF;
 
 
 sfr   CHKSUML = 0XFC;        
 sfr   CHKSUMH = 0XFD;	     
 
 sfr   OPERCON = 0xEF;        
 
 
 
 sbit 	CY	  = PSW^7;	     
 sbit 	AC	  = PSW^6;	     
 sbit 	F0	  = PSW^5;	     
 sbit 	RS1	  = PSW^4;	     
 sbit 	RS0	  = PSW^3;	     
 sbit 	OV	  = PSW^2;	     
 sbit 	F1	  = PSW^1;	     
 sbit 	P	  = PSW^0;	     
 
 
 sbit  TF2     = T2CON^7;
 sbit  EXF2	  = T2CON^6;
 sbit  RCLK    = T2CON^5;
 sbit  TCLK	  = T2CON^4;
 sbit  EXEN2	  = T2CON^3;
 sbit  TR2	  = T2CON^2;
 sbit  T2      = T2CON^1;
 sbit  CP	  = T2CON^0;
 
 
 
 sbit  IPADC   = IP^6;		 
 sbit  IPT2    = IP^5;		 
 sbit  IPUART  = IP^4;		 
 sbit  IPT1	  = IP^3;		 
 sbit  IPINT1  = IP^2;		 
 sbit  IPT0	  = IP^1;		 
 sbit  IPINT0  = IP^0;
 
 
 sbit  EA	  = IE^7;		 
 sbit  EADC    = IE^6;		 
 sbit  ET2     = IE^5;		 
 sbit  EUART   = IE^4;		 
 sbit  ET1     = IE^3;		 
 sbit  EINT1   = IE^2;		 
 sbit  ET0	  = IE^1;		 
 sbit  EINT0   = IE^0;		 
 
 
 sbit  TF1	  = TCON^7;	     
 sbit  TR1	  = TCON^6;	     
 sbit  TF0	  = TCON^5;	     
 sbit  TR0	  = TCON^4;	     
 
 
 sbit  SM0	  = SCON^7;
 sbit  SM1	  = SCON^6;
 sbit  SM2	  = SCON^5;
 sbit  REN	  = SCON^4;
 sbit  TB8	  = SCON^3;
 sbit  RB8	  = SCON^2;
 sbit  TI	  = SCON^1;
 sbit  RI	  = SCON^0;
 
 
 sbit  P01	  = P0^1;
 sbit  P00	  = P0^0;
 
 
 sbit  P17	  = P1^7;
 sbit  P16	  = P1^6;
 sbit  P15	  = P1^5;
 sbit  P14	  = P1^4;
 sbit  P13	  = P1^3;
 sbit  P12	  = P1^2;
 sbit  P11	  = P1^1;
 sbit  P10	  = P1^0;
 
 
 sbit  P27	  = P2^7;
 sbit  P26	  = P2^6;
 sbit  P25	  = P2^5;
 sbit  P24	  = P2^4;
 sbit  P23	  = P2^3;
 sbit  P22	  = P2^2;
 sbit  P21	  = P2^1;
 sbit  P20	  = P2^0;
 
 
#line 4 "\1.Project\git\SinWave\SC92F8003_Lib\Inc\sc92f8003.h" /0
 
 
 
 
 
 
 
 
 
 
 typedef   signed char     int8_t;
 typedef   signed short    int16_t;
 typedef   signed long     int32_t;
 
 
 typedef unsigned char     uint8_t;
 typedef unsigned short    uint16_t;
 typedef unsigned long     uint32_t;
 
 typedef int32_t  s32;
 typedef int16_t  s16;
 typedef int8_t   s8;
 
 typedef uint32_t  u32;
 typedef uint16_t  u16;
 typedef uint8_t   u8;
 
 
 typedef enum {FALSE = 0, TRUE = !FALSE} bool;
 
 typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus, BitStatus;
 
 typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
 
 typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
 
 typedef enum {LOW = 0, HIGH = !LOW} PriorityStatus;
 
 
#line 15 ".\SC92F8003_Lib\Inc\sc92f8003_ssi.h" /0
 
 
 typedef enum {
 SSI_PinSelection_P10P27P26 = (uint8_t)0x00, 		    
 SSI_PinSelection_P21P22P23 = (uint8_t)0x20  		    
 } SSI_PinSelection_TypeDef;
 
 typedef enum {
 SPI_FIRSTBIT_MSB = (uint8_t)0x00,			 
 SPI_FIRSTBIT_LSB = (uint8_t)0x04			 
 } SPI_FirstBit_TypeDef;
 
 typedef enum {
 SPI_BAUDRATEPRESCALER_4   = (uint8_t)0x00,	 
 SPI_BAUDRATEPRESCALER_8   = (uint8_t)0x01,	 
 SPI_BAUDRATEPRESCALER_16  = (uint8_t)0x02,	 
 SPI_BAUDRATEPRESCALER_32  = (uint8_t)0x03,	 
 SPI_BAUDRATEPRESCALER_64  = (uint8_t)0x04,	 
 SPI_BAUDRATEPRESCALER_128 = (uint8_t)0x05,	 
 SPI_BAUDRATEPRESCALER_256 = (uint8_t)0x06,	 
 SPI_BAUDRATEPRESCALER_512 = (uint8_t)0x07 	 
 } SPI_BaudRatePrescaler_TypeDef;
 
 typedef enum {
 SPI_MODE_MASTER = (uint8_t)0x20,			 
 SPI_MODE_SLAVE  = (uint8_t)0x00				 
 } SPI_Mode_TypeDef;
 
 typedef enum {
 SPI_CLOCKPOLARITY_LOW  = (uint8_t)0x00,		 
 SPI_CLOCKPOLARITY_HIGH = (uint8_t)0x10  	 
 } SPI_ClockPolarity_TypeDef;
 
 typedef enum {
 SPI_CLOCKPHASE_1EDGE = (uint8_t)0x00,		 
 SPI_CLOCKPHASE_2EDGE = (uint8_t)0x08		 
 } SPI_ClockPhase_TypeDef;
 
 typedef enum {
 SPI_TXE_DISINT = (uint8_t)0x00, 			 
 SPI_TXE_ENINT  = (uint8_t)0x01  			 
 } SPI_TXE_INT_TypeDef;
 
 
 typedef enum { 
 UART1_Mode_10B  = 0X00,						 
 UART1_Mode_11B  = 0X80						 
 } UART1_Mode_TypeDef;
 
 typedef enum {
 UART1_RX_ENABLE  = 0X10,					 
 UART1_RX_DISABLE = 0X00						 
 } UART1_RX_TypeDef;
 
 typedef enum {
 SPI_FLAG_SPIF    = (uint8_t)0x80,				 
 SPI_FLAG_WCOL    = (uint8_t)0x40, 			 
 SPI_FLAG_TXE     = (uint8_t)0x08,  			 
 TWI_FLAG_TWIF    = (uint8_t)0x40,				 
 TWI_FLAG_GCA	   = (uint8_t)0x10,				 
 UART1_FLAG_TI	   = (uint8_t)0x02,				 
 UART1_FLAG_RI	   = (uint8_t)0x01				 
 } SSI_Flag_TypeDef;
 
 void SSI_DeInit(void);
 void SSI_PinSelection(SSI_PinSelection_TypeDef PinSeletion);
 void SSI_SPI_Init(SPI_FirstBit_TypeDef FirstBit,SPI_BaudRatePrescaler_TypeDef BaudRatePrescaler,SPI_Mode_TypeDef Mode,SPI_ClockPolarity_TypeDef ClockPolarity,SPI_ClockPhase_TypeDef ClockPhase,SPI_TXE_INT_TypeDef SPI_TXE_INT);
 void SSI_SPI_Cmd(FunctionalState NewState);
 void SSI_SPI_SendData(uint8_t Data);
 uint8_t SSI_SPI_ReceiveData(void);
 void SSI_TWI_Init(uint8_t TWI_Address);
 void SSI_TWI_AcknowledgeConfig(FunctionalState NewState);
 void SSI_TWI_GeneralCallCmd(FunctionalState NewState);
 void SSI_TWI_Cmd(FunctionalState NewState);
 void SSI_TWI_SendData(uint8_t Data);
 uint8_t SSI_TWI_ReceiveData(void);
 void SSI_UART1_Init(uint32_t UART1Fsys, uint32_t BaudRate, UART1_Mode_TypeDef Mode, UART1_RX_TypeDef RxMode); 
 void SSI_UART1_SendData8(uint8_t Data);
 uint8_t SSI_UART1_ReceiveData8(void);
 void SSI_UART1_SendData9(uint16_t Data);
 uint16_t SSI_UART1_ReceiveData9(void);
 void SSI_ITConfig(FunctionalState NewState, PriorityStatus Priority);
 FlagStatus SSI_GetFlagStatus(SSI_Flag_TypeDef SSI_FLAG);
 void SSI_ClearFlag(SSI_Flag_TypeDef SSI_FLAG);
 
 
 
 
#line 12 "SC92F8003_Lib\src\sc92f8003_ssi.c" /0
 
 





 
 void SSI_DeInit(void)
 {
 OTCON &= 0X1F;
 SSCON0 = 0X00;
 SSCON1 = 0X00;
 SSCON2 = 0X00;
 SSDAT = 0X00;
 IE1 &= (~0X01);
 IP1 &= (~0X01);			
 }
 





 
 void SSI_PinSelection(SSI_PinSelection_TypeDef PinSeletion)
 {
 OTCON = OTCON & 0XDF | PinSeletion;	
 }
 











 
 void SSI_SPI_Init(SPI_FirstBit_TypeDef FirstBit,
 SPI_BaudRatePrescaler_TypeDef BaudRatePrescaler,
 SPI_Mode_TypeDef Mode,
 SPI_ClockPolarity_TypeDef ClockPolarity,
 SPI_ClockPhase_TypeDef ClockPhase,
 SPI_TXE_INT_TypeDef SPI_TXE_INT)
 {
 OTCON = (OTCON & 0X3F) | 0X40;
 SSCON1 = SSCON1 & (~0X05) | FirstBit | SPI_TXE_INT;
 SSCON0 = SSCON0 & 0X80 | BaudRatePrescaler | Mode | ClockPolarity | ClockPhase;
 }
 





 
 void SSI_SPI_Cmd(FunctionalState NewState)
 {
 if(NewState != DISABLE)
 {
 SSCON0 |= 0X80;
 }	
 else
 {
 SSCON0 &= (~0X80);
 }	
 }
 





 
 void SSI_SPI_SendData(uint8_t Data)
 {
 SSDAT = Data;
 }
 





 
 uint8_t SSI_SPI_ReceiveData(void)
 {
 return SSDAT;		
 }
 





 
 void SSI_TWI_Init(uint8_t TWI_Address)
 {
 OTCON = OTCON & 0X3F | 0X80;
 SSCON1 = TWI_Address & 0XFE;		
 }
 





 
 void SSI_TWI_AcknowledgeConfig(FunctionalState NewState)
 {
 if (NewState != DISABLE)
 {
 SSCON0 |= 0X08;	
 }
 else
 {
 SSCON0 &= 0XF7;
 }
 }
 





 
 void SSI_TWI_GeneralCallCmd(FunctionalState NewState)
 {
 if (NewState != DISABLE)
 {
 SSCON1 |= 0X01;	
 }
 else
 {
 SSCON1 &= 0XFE;
 }	
 }
 





 
 void SSI_TWI_Cmd(FunctionalState NewState)
 {
 if(NewState != DISABLE)
 {
 SSCON0 |= 0X80;	
 }
 else
 {
 SSCON0 &= (~0X80);
 }
 }
 





 
 void SSI_TWI_SendData(uint8_t Data)
 {
 SSDAT = Data;	
 }
 





 
 uint8_t SSI_TWI_ReceiveData(void)
 {
 return SSDAT;
 }
 








 
 void SSI_UART1_Init(uint32_t UART1Fsys, uint32_t BaudRate, UART1_Mode_TypeDef Mode, UART1_RX_TypeDef RxMode) 
 {
 OTCON |= 0xC0;
 SSCON0 = SSCON0 & 0X0F | Mode | RxMode;
 SSCON2 = UART1Fsys / BaudRate / 256;
 SSCON1 = UART1Fsys / BaudRate % 256;	
 }
 





 
 void SSI_UART1_SendData8(uint8_t Data)
 {
 SSDAT = Data;
 }
 





 
 uint8_t SSI_UART1_ReceiveData8(void)
 {
 return SSDAT;
 }
 





 
 void SSI_UART1_SendData9(uint16_t Data)
 {
 uint8_t Data_9Bit;
 Data_9Bit = (Data>>8);
 if(Data_9Bit)
 {
 SSCON0	|= 0x08;
 }
 else
 {
 SSCON0	&= 0xf7;
 }
 
 SSDAT = (uint8_t)Data;
 }
 





 
 uint16_t SSI_UART1_ReceiveData9(void)
 {
 uint16_t Data9;
 Data9 =  SSDAT + ((uint16_t)(SSCON0&0X04)<<6);
 SSCON0 &= 0XFB;
 return Data9;
 }
 






 
 void SSI_ITConfig(FunctionalState NewState, PriorityStatus Priority)
 {
 
 if(NewState != DISABLE)
 {
 IE1 |= 0x01;
 }
 else
 {
 IE1 &= 0xFE;
 }
 
 if(Priority != LOW)
 {
 IP1 |= 0x01;
 }
 else
 {
 IP1 &= 0xFE;
 }
 }
 





 
 FlagStatus SSI_GetFlagStatus(SSI_Flag_TypeDef SSI_FLAG)
 {
 FlagStatus bitstatus = RESET;
 
 if((SSI_FLAG==SPI_FLAG_SPIF) || (SSI_FLAG==SPI_FLAG_WCOL) || (SSI_FLAG==SPI_FLAG_TXE))
 {
 if((SSI_FLAG & SSCON1) != (uint8_t)RESET)
 {
 bitstatus = SET; 			
 }
 else
 {	
 bitstatus = RESET;
 }
 }
 else
 {
 if((SSI_FLAG & SSCON0) != (uint8_t)RESET)
 {
 bitstatus = SET; 			
 }
 else
 {	
 bitstatus = RESET;
 }
 }
 
 return bitstatus;
 }
 





 
 void SSI_ClearFlag(SSI_Flag_TypeDef SSI_FLAG)
 {
 if((SSI_FLAG==SPI_FLAG_SPIF) || (SSI_FLAG==SPI_FLAG_WCOL) || (SSI_FLAG==SPI_FLAG_TXE))
 {
 SSCON1 &= (~SSI_FLAG);
 }
 else
 {
 SSCON0 &= (~SSI_FLAG);
 }
 }