#line 1 "SC92F8003_Lib\src\sc92f8003_option.c" /0 #line 1 ".\SC92F8003_Lib\Inc\sc92f8003_option.h" /0 #line 1 "\1.Project\git\SinWave-bak\SC92F8003_Lib\Inc\sc92f8003.h" /0 #line 1 "\1.Project\git\SinWave-bak\SC92F8003_Lib\Inc\SC92F8003_C.H" /0 sfr ACC = 0xE0; sfr B = 0xF0; sfr PSW = 0xD0; sfr DPH = 0x83; sfr DPL = 0x82; sfr SP = 0x81; sfr PCON = 0x87; sfr IP1 = 0XB9; sfr IP = 0xB8; sfr IE = 0xA8; sfr IE1 = 0XA9; sfr P2PH = 0xA2; sfr P2CON = 0xA1; sfr P2 = 0xA0; sfr P1PH = 0x92; sfr P1CON = 0x91; sfr P1 = 0x90; sfr P0PH = 0x9B; sfr P0CON = 0x9A; sfr P0 = 0x80; sfr TMCON = 0x8E; sfr TH1 = 0x8D; sfr TH0 = 0x8C; sfr TL1 = 0x8B; sfr TL0 = 0x8A; sfr TMOD = 0x89; sfr TCON = 0x88; sfr T2CON = 0xC8; sfr T2MOD = 0xC9; sfr RCAP2L = 0xCA; sfr RCAP2H = 0xCB; sfr TL2 = 0xCC; sfr TH2 = 0xCD; sfr ADCCFG1 = 0xAA; sfr ADCCFG0 = 0xAB; sfr ADCCON = 0XAD; sfr ADCVL = 0xAE; sfr ADCVH = 0xAF; sfr PWMCFG = 0xD1; sfr PWMCON0 = 0xD2; sfr PWMPRD = 0xD3; sfr PWMDTYA = 0xD4; sfr PWMDTY0 = 0xD5; sfr PWMDTY1 = 0xD6; sfr PWMDTY2 = 0xD7; sfr PWMCON1 = 0xDA; sfr PWMDTYB = 0xDB; sfr PWMDTY3 = 0xDC; sfr PWMDTY4 = 0xDD; sfr PWMDTY5 = 0xDE; sfr PWMDTY6 = 0xDF; sfr BTMCON = 0XCE; sfr WDTCON = 0xCF; sfr OTCON = 0X8F; sfr INT0F = 0XBA; sfr INT0R = 0XBB; sfr INT1F = 0XBC; sfr INT1R = 0XBD; sfr INT2F = 0XC6; sfr INT2R = 0XC7; sfr IAPCTL = 0xF6; sfr IAPDAT = 0xF5; sfr IAPADE = 0xF4; sfr IAPADH = 0xF3; sfr IAPADL = 0xF2; sfr IAPKEY = 0xF1; sfr SCON = 0X98; sfr SBUF = 0X99; sfr SSCON0 = 0X9D; sfr SSCON1 = 0X9E; sfr SSCON2 = 0X95; sfr SSDAT = 0X9F; sfr OPINX = 0XFE; sfr OPREG = 0XFF; sfr CHKSUML = 0XFC; sfr CHKSUMH = 0XFD; sfr OPERCON = 0xEF; sbit CY = PSW^7; sbit AC = PSW^6; sbit F0 = PSW^5; sbit RS1 = PSW^4; sbit RS0 = PSW^3; sbit OV = PSW^2; sbit F1 = PSW^1; sbit P = PSW^0; sbit TF2 = T2CON^7; sbit EXF2 = T2CON^6; sbit RCLK = T2CON^5; sbit TCLK = T2CON^4; sbit EXEN2 = T2CON^3; sbit TR2 = T2CON^2; sbit T2 = T2CON^1; sbit CP = T2CON^0; sbit IPADC = IP^6; sbit IPT2 = IP^5; sbit IPUART = IP^4; sbit IPT1 = IP^3; sbit IPINT1 = IP^2; sbit IPT0 = IP^1; sbit IPINT0 = IP^0; sbit EA = IE^7; sbit EADC = IE^6; sbit ET2 = IE^5; sbit EUART = IE^4; sbit ET1 = IE^3; sbit EINT1 = IE^2; sbit ET0 = IE^1; sbit EINT0 = IE^0; sbit TF1 = TCON^7; sbit TR1 = TCON^6; sbit TF0 = TCON^5; sbit TR0 = TCON^4; sbit SM0 = SCON^7; sbit SM1 = SCON^6; sbit SM2 = SCON^5; sbit REN = SCON^4; sbit TB8 = SCON^3; sbit RB8 = SCON^2; sbit TI = SCON^1; sbit RI = SCON^0; sbit P01 = P0^1; sbit P00 = P0^0; sbit P17 = P1^7; sbit P16 = P1^6; sbit P15 = P1^5; sbit P14 = P1^4; sbit P13 = P1^3; sbit P12 = P1^2; sbit P11 = P1^1; sbit P10 = P1^0; sbit P27 = P2^7; sbit P26 = P2^6; sbit P25 = P2^5; sbit P24 = P2^4; sbit P23 = P2^3; sbit P22 = P2^2; sbit P21 = P2^1; sbit P20 = P2^0; #line 4 "\1.Project\git\SinWave-bak\SC92F8003_Lib\Inc\sc92f8003.h" /0 typedef signed char int8_t; typedef signed short int16_t; typedef signed long int32_t; typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned long uint32_t; typedef int32_t s32; typedef int16_t s16; typedef int8_t s8; typedef uint32_t u32; typedef uint16_t u16; typedef uint8_t u8; typedef enum {FALSE = 0, TRUE = !FALSE} bool; typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus, BitStatus; typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; typedef enum {LOW = 0, HIGH = !LOW} PriorityStatus; #line 15 ".\SC92F8003_Lib\Inc\sc92f8003_option.h" /0 typedef enum { SYSCLK_PRESSEL_FOSC_D1 = (uint8_t)0x00, SYSCLK_PRESSEL_FOSC_D2 = (uint8_t)0x10, SYSCLK_PRESSEL_FOSC_D4 = (uint8_t)0x20, SYSCLK_PRESSEL_FOSC_D12 = (uint8_t)0x30 } SYSCLK_PresSel_TypeDef; typedef enum { LVR_INVALID = (uint8_t)0x04, LVR_2_3V = (uint8_t)0x00, LVR_2_9V = (uint8_t)0x01, LVR_3_7V = (uint8_t)0x02, LVR_4_3V = (uint8_t)0x03 } LVR_Config_TypeDef; typedef enum { IAP_OPERATERANGE_ONLY_EEPROM = (uint8_t)0x00, IAP_OPERATERANGE__LAST_0_5K_CODEREGION = (uint8_t)0x04, IAP_OPERATERANGE__LAST_1K_CODEREGION = (uint8_t)0x08, IAP_OPERATERANGE__ALL_CODEREGION = (uint8_t)0x0c } IAP_OperateRange_TypeDef; typedef enum { XTIPLL_HIGHER_THAN_12M = (uint8_t)0x40, XTIPLL_UNDER_12M = (uint8_t)0x00 } XTIPLL_Range_TypeDef; typedef enum { ADC_VREF_VDD = 0x00, ADC_VREF_2_4V = 0x80 } ADC_Vref_TypeDef; void OPTION_WDT_Cmd(FunctionalState NewState); void OPTION_XTIPLL_Cmd(FunctionalState NewState); void OPTION_XTIPLL_SetRange(XTIPLL_Range_TypeDef XTIPLL_Range); void OPTION_SYSCLK_Init(SYSCLK_PresSel_TypeDef SYSCLK_PresSel); void OPTION_RST_PIN_Cmd(FunctionalState NewState); void OPTION_LVR_Init(LVR_Config_TypeDef LVR_Config); void OPTION_ADC_VrefConfig(ADC_Vref_TypeDef ADC_Vref); void OPTION_IAP_SetOperateRange(IAP_OperateRange_TypeDef IAP_OperateRange); #line 12 "SC92F8003_Lib\src\sc92f8003_option.c" /0 void OPTION_WDT_Cmd(FunctionalState NewState) { OPINX = 0XC1; if(NewState == DISABLE) { OPREG &= 0X7F; } else { OPREG |= 0X80; } } void OPTION_XTIPLL_Cmd(FunctionalState NewState) { OPINX = 0XC1; if(NewState == DISABLE) { OPREG &= 0XBF; } else { OPREG |= 0X40; } } void OPTION_XTIPLL_SetRange(XTIPLL_Range_TypeDef XTIPLL_Range) { OPINX = 0XC2; OPREG = OPREG & 0XBF | XTIPLL_Range; } void OPTION_SYSCLK_Init(SYSCLK_PresSel_TypeDef SYSCLK_PresSel) { OPINX = 0XC1; OPREG = OPREG & 0XCF | SYSCLK_PresSel; } void OPTION_RST_PIN_Cmd(FunctionalState NewState) { OPINX = 0XC1; if(NewState == DISABLE) { OPREG |= 0X08; } else { OPREG &= 0XF7; } } void OPTION_LVR_Init(LVR_Config_TypeDef LVR_Config) { OPINX = 0XC1; OPREG = OPREG & 0XF8 | LVR_Config; } void OPTION_ADC_VrefConfig(ADC_Vref_TypeDef ADC_Vref) { OPINX = 0xC2; OPREG = OPREG & 0X7F | ADC_Vref; } void OPTION_IAP_SetOperateRange(IAP_OperateRange_TypeDef IAP_OperateRange) { OPINX = 0xC2; OPREG = (OPREG & 0xF3) | IAP_OperateRange; }