C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 1 C51 COMPILER V9.60.7.0, COMPILATION OF MODULE SC92F8003_GPIO OBJECT MODULE PLACED IN .\Objects\sc92f8003_gpio.obj COMPILER INVOKED BY: d:\Keil\C51\BIN\C51.EXE SC92F8003_Lib\src\sc92f8003_gpio.c OMF2 OPTIMIZE(8,SPEED) BROWSE INCDIR(.\S -rc;.\Task;.\Task\cpu_port\S92F8003A;.\Task\cfg;.\Task\pt_thread;.\SC92F8003_Lib\Inc) DEBUG CODE LISTINCLUDE SYMBOLS PRIN -T(.\Listings\sc92f8003_gpio.lst) PREPRINT(.\Listings\sc92f8003_gpio.i) OBJECT(.\Objects\sc92f8003_gpio.obj) line level source 1 //************************************************************ 2 // Copyright (c) ÉîÛÚÊÐÈüԪ΢µç×ÓÓÐÏÞ¹«Ë¾ 3 // ÎļþÃû³Æ : sc92f8003_gpio.c 4 // ×÷Õß : 5 // Ä£¿é¹¦ÄÜ : GPIO¹Ì¼þ¿âº¯ÊýCÎļþ 6 // ¾Ö²¿º¯ÊýÁбí: 7 // ×îºó¸üÕýÈÕÆÚ: 2018/9/4 8 // °æ±¾ : V1.0 9 // ˵Ã÷ £º 10 //************************************************************* 11 12 #include "sc92f8003_gpio.h" 1 =1 //************************************************************ 2 =1 // Copyright (c) ÉîÛÚÊÐÈüԪ΢µç×ÓÓÐÏÞ¹«Ë¾ 3 =1 // ÎļþÃû³Æ : sc92f8003_gpio.h 4 =1 // ×÷Õß : 5 =1 // Ä£¿é¹¦ÄÜ : GPIO¹Ì¼þ¿âº¯ÊýÍ·Îļþ 6 =1 // ¾Ö²¿º¯ÊýÁбí: 7 =1 // ×îºó¸üÕýÈÕÆÚ: 2018/9/4 8 =1 // °æ±¾ : V1.0 9 =1 // ˵Ã÷ £º 10 =1 //************************************************************* 11 =1 #ifndef _SC92F8003_GPIO_H_ 12 =1 #define _SC92F8003_GPIO_H_ 13 =1 14 =1 #include "sc92f8003.h" 1 =2 #ifndef _SC92F8003_H 2 =2 #define _SC92F8003_H 3 =2 4 =2 #include "SC92F8003_C.H" 1 =3 /*-------------------------------------------------------------------------- 2 =3 SC92F8003_C.H 3 =3 4 =3 C Header file for SC92F8003 microcontroller. 5 =3 Copyright (c) 2018 Shenzhen SinOne Chip Electronic CO., Ltd. 6 =3 All rights reserved. 7 =3 ÉîÛÚÊÐÈüԪ΢µç×ÓÓÐÏÞ¹«Ë¾ 8 =3 °æ±¾ºÅ: V1.0 9 =3 ÈÕÆÚ: 2018.05.02 10 =3 --------------------------------------------------------------------------*/ 11 =3 #ifndef _SC92F8003_H_ 12 =3 #define _SC92F8003_H_ 13 =3 14 =3 /* ------------------- ×ֽڼĴæÆ÷-------------------- */ 15 =3 ///*CPU*/ 16 =3 sfr ACC = 0xE0; //ÀÛ¼ÓÆ÷£Á 17 =3 sfr B = 0xF0; //ͨÓüĴæÆ÷B 18 =3 sfr PSW = 0xD0; //³ÌÐò״̬×Ö 19 =3 sfr DPH = 0x83; //Êý¾ÝÖ¸Õë¸ß8λ 20 =3 sfr DPL = 0x82; //Êý¾ÝÖ¸ÕëµÍ8λ 21 =3 sfr SP = 0x81; //¶ÑÕ»Ö¸Õë 22 =3 23 =3 C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 2 24 =3 /*system*/ 25 =3 sfr PCON = 0x87; //µçÔ´¹ÜÀí¿ØÖƼĴæÆ÷ 26 =3 27 =3 /*interrupt*/ 28 =3 sfr IP1 = 0XB9; //ÖжÏÓÅÏȼ¶¿ØÖƼĴæÆ÷1 29 =3 sfr IP = 0xB8; //ÖжÏÓÅÏÈȨ¿ØÖƼĴæÆ÷ 30 =3 sfr IE = 0xA8; //ÖжϿØÖƼĴæÆ÷ 31 =3 sfr IE1 = 0XA9; //ÖжϿØÖƼĴæÆ÷1 32 =3 33 =3 /*PORT*/ 34 =3 sfr P2PH = 0xA2; //P2¿Úģʽ¿ØÖƼĴæÆ÷ 35 =3 sfr P2CON = 0xA1; //P2¿Úģʽ¿ØÖƼĴæÆ÷ 36 =3 sfr P2 = 0xA0; //P2¿ÚÊý¾Ý¼Ä´æÆ÷ 37 =3 sfr P1PH = 0x92; //P1¿Úģʽ¿ØÖƼĴæÆ÷ 38 =3 sfr P1CON = 0x91; //P1¿Úģʽ¿ØÖƼĴæÆ÷ 39 =3 sfr P1 = 0x90; //P1¿ÚÊý¾Ý¼Ä´æÆ÷ 40 =3 sfr P0PH = 0x9B; //P0¿Úģʽ¿ØÖƼĴæÆ÷ 41 =3 sfr P0CON = 0x9A; //P0¿Úģʽ¿ØÖƼĴæÆ÷ 42 =3 sfr P0 = 0x80; //P0¿ÚÊý¾Ý¼Ä´æÆ÷ 43 =3 44 =3 /*TIMER*/ 45 =3 sfr TMCON = 0x8E; //¶¨Ê±Æ÷ƵÂÊ¿ØÖƼĴæÆ÷ 46 =3 sfr TH1 = 0x8D; //¶¨Ê±Æ÷1¸ß8λ 47 =3 sfr TH0 = 0x8C; //¶¨Ê±Æ÷0¸ß8λ 48 =3 sfr TL1 = 0x8B; //¶¨Ê±Æ÷1µÍ8λ 49 =3 sfr TL0 = 0x8A; //¶¨Ê±Æ÷0µÍ8λ 50 =3 sfr TMOD = 0x89; //¶¨Ê±Æ÷¹¤×÷ģʽ¼Ä´æÆ÷ 51 =3 sfr TCON = 0x88; //¶¨Ê±Æ÷¿ØÖƼĴæÆ÷ 52 =3 sfr T2CON = 0xC8; //¶¨Ê±Æ÷2¿ØÖƼĴæÆ÷ 53 =3 sfr T2MOD = 0xC9; //¶¨Ê±Æ÷2¹¤×÷ģʽ¼Ä´æÆ÷ 54 =3 sfr RCAP2L = 0xCA; //¶¨Ê±Æ÷2ÖØÔØ/²¶×½µÍ8λ 55 =3 sfr RCAP2H = 0xCB; //¶¨Ê±Æ÷2ÖØÔØ/²¶×½¸ß8λ 56 =3 sfr TL2 = 0xCC; //¶¨Ê±Æ÷2µÍ8λ 57 =3 sfr TH2 = 0xCD; //¶¨Ê±Æ÷2¸ß8λ 58 =3 59 =3 60 =3 /*ADC*/ 61 =3 sfr ADCCFG1 = 0xAA; //ADC¹¦ÄÜÅäÖüĴæÆ÷0 62 =3 sfr ADCCFG0 = 0xAB; //ADC¹¦ÄÜÅäÖüĴæÆ÷1 63 =3 sfr ADCCON = 0XAD; //ADC¿ØÖƼĴæÆ÷ 64 =3 sfr ADCVL = 0xAE; //ADC ½á¹û¼Ä´æÆ÷ 65 =3 sfr ADCVH = 0xAF; //ADC ½á¹û¼Ä´æÆ÷ 66 =3 67 =3 /*PWM*/ 68 =3 sfr PWMCFG = 0xD1; //PWMÉèÖüĴæÆ÷ 69 =3 sfr PWMCON0 = 0xD2; //PWM¿ØÖƼĴæÆ÷ 70 =3 sfr PWMPRD = 0xD3; //PWMÖÜÆÚÉèÖüĴæÆ÷ 71 =3 sfr PWMDTYA = 0xD4; //PWMÕ¼¿Õ±ÈÉèÖüĴæÆ÷A 72 =3 sfr PWMDTY0 = 0xD5; //PWM0ÉèÖüĴæÆ÷ 73 =3 sfr PWMDTY1 = 0xD6; //PWM1ÉèÖüĴæÆ÷ 74 =3 sfr PWMDTY2 = 0xD7; //PWM2ÉèÖüĴæÆ÷ 75 =3 sfr PWMCON1 = 0xDA; //PWM¿ØÖƼĴæÆ÷ 76 =3 sfr PWMDTYB = 0xDB; //PWMÕ¼¿Õ±ÈÉèÖüĴæÆ÷B 77 =3 sfr PWMDTY3 = 0xDC; //PWM3ÉèÖüĴæÆ÷ 78 =3 sfr PWMDTY4 = 0xDD; //PWM4ÉèÖüĴæÆ÷ 79 =3 sfr PWMDTY5 = 0xDE; //PWM5ÉèÖüĴæÆ÷ 80 =3 sfr PWMDTY6 = 0xDF; //PWM6ÉèÖüĴæÆ÷ 81 =3 82 =3 83 =3 // 84 =3 ///*WatchDog*/ 85 =3 sfr BTMCON = 0XCE; //µÍƵ¶¨Ê±Æ÷¿ØÖƼĴæÆ÷ C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 3 86 =3 sfr WDTCON = 0xCF; //WDT¿ØÖƼĴæÆ÷ 87 =3 88 =3 89 =3 sfr OTCON = 0X8F; //Êä³ö¿ØÖƼĴæÆ÷ 90 =3 91 =3 /*INT*/ 92 =3 sfr INT0F = 0XBA; //INT0 ϽµÑØÖжϿØÖƼĴæÆ÷ 93 =3 sfr INT0R = 0XBB; //INT0 ÉϽµÑØÖжϿØÖƼĴæÆ÷ 94 =3 sfr INT1F = 0XBC; //INT1 ϽµÑØÖжϿØÖƼĴæÆ÷ 95 =3 sfr INT1R = 0XBD; //INT1 ÉϽµÑØÖжϿØÖƼĴæÆ÷ 96 =3 sfr INT2F = 0XC6; //INT2 ϽµÑØÖжϿØÖƼĴæÆ÷ 97 =3 sfr INT2R = 0XC7; //INT2 ÉϽµÑØÖжϿØÖƼĴæÆ÷ 98 =3 99 =3 /*IAP */ 100 =3 sfr IAPCTL = 0xF6; //IAP¿ØÖƼĴæÆ÷ 101 =3 sfr IAPDAT = 0xF5; //IAPÊý¾Ý¼Ä´æÆ÷ 102 =3 sfr IAPADE = 0xF4; //IAPÀ©Õ¹µØÖ·¼Ä´æÆ÷ 103 =3 sfr IAPADH = 0xF3; //IAPдÈëµØÖ·¸ßλ¼Ä´æÆ÷ 104 =3 sfr IAPADL = 0xF2; //IAPдÈëµØÖ·µÍ8λ¼Ä´æÆ÷ 105 =3 sfr IAPKEY = 0xF1; //IAP±£»¤¼Ä´æÆ÷ 106 =3 107 =3 /*uart0*/ 108 =3 sfr SCON = 0X98; //uart¿ØÖƼĴæÆ÷ 109 =3 sfr SBUF = 0X99; //uart0Êý¾Ý¼Ä´æÆ÷ 110 =3 111 =3 /*ÈýºÏÒ»*/ 112 =3 sfr SSCON0 = 0X9D; //SSI¿ØÖƼĴæÆ÷0 113 =3 sfr SSCON1 = 0X9E; //SSI¿ØÖƼĴæÆ÷1 114 =3 sfr SSCON2 = 0X95; //SSI¿ØÖƼĴæÆ÷2 115 =3 sfr SSDAT = 0X9F; //SSIÊý¾Ý¼Ä´æÆ÷ 116 =3 117 =3 sfr OPINX = 0XFE; 118 =3 sfr OPREG = 0XFF; 119 =3 120 =3 /*Check Sum*/ 121 =3 sfr CHKSUML = 0XFC; //Check Sum½á¹û¼Ä´æÆ÷µÍλ 122 =3 sfr CHKSUMH = 0XFD; //Check Sum½á¹û¼Ä´æÆ÷¸ßλ 123 =3 124 =3 sfr OPERCON = 0xEF; //ÔËËã¿ØÖƼĴæÆ÷ 125 =3 126 =3 ///* ------------------- λ¼Ä´æÆ÷-------------------- */ 127 =3 /*PSW*/ 128 =3 sbit CY = PSW^7; //±ê־λ 0:¼Ó·¨ÔËËã×î¸ßλÎÞ½ø룬»òÕß¼õ·¨ÔËËã×î¸ßλÎÞ½èλʱ 1:¼Ó·¨ÔËËã×î¸ßλÓнø -룬»òÕß¼õ·¨ÔËËã×î¸ßλÓнèλʱ 129 =3 sbit AC = PSW^6; //½øλ¸¨Öú±ê־λ 0:ÎÞ½èλ¡¢½øλ 1:¼Ó·¨ÔËËãʱÔÚbit3λÓнø룬»ò¼õ·¨ÔËËãÔÚbit3λÓн -èλʱ 130 =3 sbit F0 = PSW^5; //Óû§±ê־λ 131 =3 sbit RS1 = PSW^4; //¹¤×÷¼Ä´æÆ÷×éÑ¡Ôñλ 132 =3 sbit RS0 = PSW^3; //¹¤×÷¼Ä´æÆ÷×éÑ¡Ôñλ 133 =3 sbit OV = PSW^2; //Òç³ö±ê־λ 134 =3 sbit F1 = PSW^1; //F1±êÖ¾ 135 =3 sbit P = PSW^0; //Ææż±ê־λ 0:ACCÖÐ1µÄ¸öÊýΪżÊý£¨°üÀ¨0¸ö£© 1:ACCÖÐ1µÄ¸öÊýΪÆæÊý 136 =3 137 =3 /*T2CON*/ 138 =3 sbit TF2 = T2CON^7; 139 =3 sbit EXF2 = T2CON^6; 140 =3 sbit RCLK = T2CON^5; 141 =3 sbit TCLK = T2CON^4; 142 =3 sbit EXEN2 = T2CON^3; 143 =3 sbit TR2 = T2CON^2; 144 =3 sbit T2 = T2CON^1; 145 =3 sbit CP = T2CON^0; C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 4 146 =3 147 =3 148 =3 /*IP*/ 149 =3 sbit IPADC = IP^6; //ADCÖжÏÓÅÏÈ¿ØÖÆλ 0:É趨 ADCµÄÖжÏÓÅÏÈȨÊÇ ¡°µÍ¡± 1:É趨 ADCµÄÖжÏÓÅÏÈȨÊÇ ¡°¸ß¡ -± 150 =3 sbit IPT2 = IP^5; //PWMÖжÏÓÅÏÈ¿ØÖÆλ 0:É趨 PWMµÄÖжÏÓÅÏÈȨÊÇ ¡°µÍ¡± 1:É趨 PWM µÄÖжÏÓÅÏÈȨÊÇ ¡°¸ß -¡± 151 =3 sbit IPUART = IP^4; //SIFÖжÏÓÅÏÈ¿ØÖÆλ 0:É趨 SIFµÄÖжÏÓÅÏÈȨÊÇ ¡°µÍ¡± 1:É趨 SIFµÄÖжÏÓÅÏÈȨÊÇ ¡°¸ß¡ -± 152 =3 sbit IPT1 = IP^3; //Timer1ÖжÏÓÅÏÈ¿ØÖÆλ 0:É趨 Timer 1µÄÖжÏÓÅÏÈȨÊÇ ¡°µÍ¡± 1:É趨 Timer 1µÄÖжÏÓÅÏÈÈ -¨ÊÇ ¡°¸ß¡± 153 =3 sbit IPINT1 = IP^2; //32K Base TimerÖжÏÓÅÏÈ¿ØÖÆλ 0:É趨 32KµÄÖжÏÓÅÏÈȨÊÇ ¡°µÍ¡± 1:É趨 32KµÄÖжÏÓÅ -ÏÈȨÊÇ ¡°¸ß¡± 154 =3 sbit IPT0 = IP^1; //Timer0ÖжÏÓÅÏÈ¿ØÖÆλ 0:É趨 Timer 0µÄÖжÏÓÅÏÈȨÊÇ ¡°µÍ¡± 1:É趨 Timer 0µÄÖжÏÓÅÏÈÈ -¨ÊÇ ¡°¸ß¡± 155 =3 sbit IPINT0 = IP^0; 156 =3 157 =3 /*IE*/ 158 =3 sbit EA = IE^7; //ÖжÏʹÄܵÄ×Ü¿ØÖÆ 0:¹Ø±ÕËùÓеÄÖÐ¶Ï 1:´ò¿ªËùÓеÄÖÐ¶Ï 159 =3 sbit EADC = IE^6; //ADCÖжÏʹÄÜ¿ØÖÆ 0:¹Ø±ÕADCÖÐ¶Ï 1:´ò¿ªADCÖÐ¶Ï 160 =3 sbit ET2 = IE^5; //PWMÖжÏʹÄÜ¿ØÖÆ 0:¹Ø±ÕPWMÖÐ¶Ï 1:´ò¿ªPWMÖÐ¶Ï 161 =3 sbit EUART = IE^4; //UARTÖжÏʹÄÜ¿ØÖÆ 0:¹Ø±ÕSIFÖÐ¶Ï 1:´ò¿ªSIFÖÐ¶Ï 162 =3 sbit ET1 = IE^3; //Timer1ÖжÏʹÄÜ¿ØÖÆ 0:¹Ø±ÕTIMER1ÖÐ¶Ï 1:´ò¿ªTIMER1ÖÐ¶Ï 163 =3 sbit EINT1 = IE^2; //32K Base TimerÖжÏʹÄÜ¿ØÖÆ 0:¹Ø±Õ32KÖÐ¶Ï 1:´ò¿ª32KÖÐ¶Ï 164 =3 sbit ET0 = IE^1; //Timer0ÖжÏʹÄÜ¿ØÖÆ 0:¹Ø±ÕTIMER0ÖÐ¶Ï 1:´ò¿ªTIMER0ÖÐ¶Ï 165 =3 sbit EINT0 = IE^0; //TouchKeyµÄÖжÏʹÄÜ¿ØÖÆ 0:¹Ø±ÕTouchKeyÖÐ¶Ï 1:´ò¿ªTouchKeyÖÐ¶Ï 166 =3 167 =3 /*TCON*/ 168 =3 sbit TF1 = TCON^7; //T1Òç³öÖжÏÇëÇó±ê־λ T1²úÉúÒç³ö£¬·¢ÉúÖжÏʱ£¬Ó²¼þ½«TF1ÖÃΪ¡°1¡±£¬ÉêÇëÖжϣ¬CPU -ÏìӦʱ£¬Ó²¼þÇå¡°0¡±¡£ 169 =3 sbit TR1 = TCON^6; //¶¨Ê±Æ÷T1µÄÔËÐпØÖÆλ 0:Timer1½ûÖ¹¼ÆÊý 1:Timer1¿ªÊ¼¼ÆÊý 170 =3 sbit TF0 = TCON^5; //T0Òç³öÖжÏÇëÇó±ê־λ T0²úÉúÒç³ö£¬·¢ÉúÖжÏʱ£¬Ó²¼þ½«TF0ÖÃΪ¡°1¡±£¬ÉêÇëÖжϣ¬CPU -ÏìӦʱ£¬Ó²¼þÇå¡°0¡±¡£ 171 =3 sbit TR0 = TCON^4; //¶¨Ê±Æ÷T0µÄÔËÐпØÖÆλ 0:Timer0½ûÖ¹¼ÆÊý 1:Timer0¿ªÊ¼¼ÆÊý 172 =3 173 =3 /*SCON*/ 174 =3 sbit SM0 = SCON^7; 175 =3 sbit SM1 = SCON^6; 176 =3 sbit SM2 = SCON^5; 177 =3 sbit REN = SCON^4; 178 =3 sbit TB8 = SCON^3; 179 =3 sbit RB8 = SCON^2; 180 =3 sbit TI = SCON^1; 181 =3 sbit RI = SCON^0; 182 =3 183 =3 /* P0 */ 184 =3 sbit P01 = P0^1; 185 =3 sbit P00 = P0^0; 186 =3 187 =3 /* P1 */ 188 =3 sbit P17 = P1^7; 189 =3 sbit P16 = P1^6; 190 =3 sbit P15 = P1^5; 191 =3 sbit P14 = P1^4; 192 =3 sbit P13 = P1^3; 193 =3 sbit P12 = P1^2; 194 =3 sbit P11 = P1^1; 195 =3 sbit P10 = P1^0; 196 =3 197 =3 /* P2 */ 198 =3 sbit P27 = P2^7; 199 =3 sbit P26 = P2^6; C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 5 200 =3 sbit P25 = P2^5; 201 =3 sbit P24 = P2^4; 202 =3 sbit P23 = P2^3; 203 =3 sbit P22 = P2^2; 204 =3 sbit P21 = P2^1; 205 =3 sbit P20 = P2^0; 206 =3 207 =3 #endif 5 =2 6 =2 #define enableInterrupts() EA=1 /** ¿ªÆô×ÜÖÐ¶Ï **/ 7 =2 #define disableInterrupts() EA=0 /** ¹Ø±Õ×ÜÖÐ¶Ï **/ 8 =2 9 =2 #define __I volatile const /*!< defines 'read only' permissions */ 10 =2 #define __O volatile /*!< defines 'write only' permissions */ 11 =2 #define __IO volatile /*!< defines 'read / write' permissions */ 12 =2 13 =2 /*!< Signed integer types */ 14 =2 typedef signed char int8_t; 15 =2 typedef signed short int16_t; 16 =2 typedef signed long int32_t; 17 =2 18 =2 /*!< Unsigned integer types */ 19 =2 typedef unsigned char uint8_t; 20 =2 typedef unsigned short uint16_t; 21 =2 typedef unsigned long uint32_t; 22 =2 23 =2 typedef int32_t s32; 24 =2 typedef int16_t s16; 25 =2 typedef int8_t s8; 26 =2 27 =2 typedef uint32_t u32; 28 =2 typedef uint16_t u16; 29 =2 typedef uint8_t u8; 30 =2 31 =2 32 =2 typedef enum {FALSE = 0, TRUE = !FALSE} bool; 33 =2 34 =2 typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus, BitStatus; 35 =2 36 =2 typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; 37 =2 38 =2 typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; 39 =2 40 =2 typedef enum {LOW = 0, HIGH = !LOW} PriorityStatus; 41 =2 42 =2 #endif 15 =1 16 =1 typedef enum { 17 =1 GPIO0 = (uint8_t)0x00, //GPIO0 18 =1 GPIO1 = (uint8_t)0x01, //GPIO1 19 =1 GPIO2 = (uint8_t)0x02, //GPIO2 20 =1 }GPIO_TypeDef; 21 =1 22 =1 typedef enum { 23 =1 GPIO_MODE_IN_HI = (uint8_t)0x00, //¸ß×èÊäÈëģʽ 24 =1 GPIO_MODE_IN_PU = (uint8_t)0x01, //´øÉÏÀ­µÄÊäÈëģʽ 25 =1 GPIO_MODE_OUT_PP = (uint8_t)0x02 //Ç¿ÍÆÍìÊä³öģʽ 26 =1 }GPIO_Mode_TypeDef; 27 =1 28 =1 typedef enum { 29 =1 GPIO_PIN_0 = ((uint8_t)0x01), //IO¹Ü½ÅPx0 30 =1 GPIO_PIN_1 = ((uint8_t)0x02), //IO¹Ü½ÅPx1 C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 6 31 =1 GPIO_PIN_2 = ((uint8_t)0x04), //IO¹Ü½ÅPx2 32 =1 GPIO_PIN_3 = ((uint8_t)0x08), //IO¹Ü½ÅPx3 33 =1 GPIO_PIN_4 = ((uint8_t)0x10), //IO¹Ü½ÅPx4 34 =1 GPIO_PIN_5 = ((uint8_t)0x20), //IO¹Ü½ÅPx5 35 =1 GPIO_PIN_6 = ((uint8_t)0x40), //IO¹Ü½ÅPx6 36 =1 GPIO_PIN_7 = ((uint8_t)0x80), //IO¹Ü½ÅPx7 37 =1 GPIO_PIN_LNIB = ((uint8_t)0x0F), //IO¹Ü½ÅPx0~3 38 =1 GPIO_PIN_HNIB = ((uint8_t)0xF0), //IO¹Ü½ÅPx4~7 39 =1 GPIO_PIN_ALL = ((uint8_t)0xFF) //IO¹Ü½ÅPx0~7 40 =1 }GPIO_Pin_TypeDef; 41 =1 42 =1 void GPIO_DeInit(void); 43 =1 void GPIO_Init(GPIO_TypeDef GPIOx, uint8_t PortPins, GPIO_Mode_TypeDef GPIO_Mode); 44 =1 void GPIO_Write(GPIO_TypeDef GPIOx, uint8_t PortVal); 45 =1 void GPIO_WriteHigh(GPIO_TypeDef GPIOx, uint8_t PortPins); 46 =1 void GPIO_WriteLow(GPIO_TypeDef GPIOx, uint8_t PortPins); 47 =1 uint8_t GPIO_ReadPort(GPIO_TypeDef GPIOx); 48 =1 BitStatus GPIO_ReadPin(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef PortPins); 49 =1 50 =1 #endif 51 =1 52 =1 /******************* (C) COPYRIGHT 2018 SinOne Microelectronics *****END OF FILE****/ 13 14 /************************************************** 15 *º¯ÊýÃû³Æ£ºvoid GPIO_DeInit(void) 16 *º¯Êý¹¦ÄÜ£ºGPIOÏà¹Ø¼Ä´æÆ÷¸´Î»ÖÁȱʡֵ 17 *Èë¿Ú²ÎÊý£ºvoid 18 *³ö¿Ú²ÎÊý£ºvoid 19 **************************************************/ 20 void GPIO_DeInit(void) 21 { 22 1 P0CON = 0x00; 23 1 P1CON = 0x00; 24 1 P2CON = 0x00; 25 1 P0PH = 0x00; 26 1 P1PH = 0x00; 27 1 P2PH = 0x00; 28 1 P0 = P1 = P2 = 0; 29 1 } 30 31 /************************************************** 32 *º¯ÊýÃû³Æ£ºvoid GPIO_Init(GPIO_TypeDef GPIOx, uint8_t PortPins, GPIO_Mode_TypeDef GPIO_Mode) 33 *º¯Êý¹¦ÄÜ£ºGPIO¿ÚģʽÅäÖóõʼ»¯ 34 *Èë¿Ú²ÎÊý£ºGPIOx Ñ¡Ôñ²Ù×÷µÄGPIO¿Ú£¨P0,P1,P2£© 35 PortPins Ñ¡ÔñGPIO¹Ü½ÅPxy 36 GPIO_Mode Ñ¡ÔñGPIO¿Úģʽ£¨¸ß×èÊäÈë¡¢ÉÏÀ­ÊäÈë¡¢ÍÆÍìÊä³ö£© 37 *³ö¿Ú²ÎÊý£ºvoid 38 **************************************************/ 39 void GPIO_Init(GPIO_TypeDef GPIOx, uint8_t PortPins, GPIO_Mode_TypeDef GPIO_Mode) 40 { 41 1 //GPIO0ÉèÖà 42 1 if(GPIOx == GPIO0) 43 1 { 44 2 if(GPIO_Mode == GPIO_MODE_IN_HI) //¸ß×èÊäÈë 45 2 { 46 3 P0CON &= ~PortPins; 47 3 P0PH &= ~PortPins; 48 3 } 49 2 if(GPIO_Mode == GPIO_MODE_IN_PU) //ÉÏÀ­ÊäÈë 50 2 { 51 3 P0CON &= ~PortPins; 52 3 P0PH |= PortPins; C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 7 53 3 } 54 2 if(GPIO_Mode == GPIO_MODE_OUT_PP) //ÍÆÍìÊä³ö 55 2 { 56 3 P0CON |= PortPins; 57 3 } 58 2 } 59 1 60 1 //GPIO1ÉèÖà 61 1 else if(GPIOx == GPIO1) 62 1 { 63 2 if(GPIO_Mode == GPIO_MODE_IN_HI) 64 2 { 65 3 P1CON &= ~PortPins; 66 3 P1PH &= ~PortPins; 67 3 } 68 2 if(GPIO_Mode == GPIO_MODE_IN_PU) 69 2 { 70 3 P1CON &= ~PortPins; 71 3 P1PH |= PortPins; 72 3 } 73 2 if(GPIO_Mode == GPIO_MODE_OUT_PP) 74 2 { 75 3 P1CON |= PortPins; 76 3 } 77 2 } 78 1 79 1 //GPIO2ÉèÖà 80 1 else 81 1 { 82 2 if(GPIOx == GPIO2) 83 2 { 84 3 if(GPIO_Mode == GPIO_MODE_IN_HI) 85 3 { 86 4 P2CON &= ~PortPins; 87 4 P2PH &= ~PortPins; 88 4 } 89 3 if(GPIO_Mode == GPIO_MODE_IN_PU) 90 3 { 91 4 P2CON &= ~PortPins; 92 4 P2PH |= PortPins; 93 4 } 94 3 if(GPIO_Mode == GPIO_MODE_OUT_PP) 95 3 { 96 4 P2CON |= PortPins; 97 4 } 98 3 } 99 2 } 100 1 101 1 } 102 103 /************************************************** 104 *º¯ÊýÃû³Æ£ºvoid GPIO_Write(GPIO_TypeDef GPIOx, uint8_t PortVal) 105 *º¯Êý¹¦ÄÜ£ºGPIO¿Ú¸³Öµ 106 *Èë¿Ú²ÎÊý£ºGPIOx Ñ¡Ôñ²Ù×÷µÄGPIO¿Ú£¨P0,P1,P2£© 107 PortVal GPIO¿ÚµÄÖµ 108 *³ö¿Ú²ÎÊý£ºvoid 109 **************************************************/ 110 void GPIO_Write(GPIO_TypeDef GPIOx, uint8_t PortVal) 111 { 112 1 if(GPIOx == GPIO0) 113 1 { 114 2 P0 = PortVal; C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 8 115 2 } 116 1 if(GPIOx == GPIO1) 117 1 { 118 2 P1 = PortVal; 119 2 } 120 1 if(GPIOx == GPIO2) 121 1 { 122 2 P2 = PortVal; 123 2 } 124 1 } 125 126 /************************************************** 127 *º¯ÊýÃû³Æ£ºvoid GPIO_WriteHigh(GPIO_TypeDef GPIOx, uint8_t PortPins) 128 *º¯Êý¹¦ÄÜ£ºGPIO¿Ú¹Ü½ÅPxyÖÃλ 129 *Èë¿Ú²ÎÊý£ºGPIOx Ñ¡Ôñ²Ù×÷µÄGPIO¿Ú£¨P0,P1,P2£© 130 PortPins Ñ¡ÔñGPIO¿Ú¹Ü½ÅPxy 131 *³ö¿Ú²ÎÊý£ºvoid 132 **************************************************/ 133 void GPIO_WriteHigh(GPIO_TypeDef GPIOx, uint8_t PortPins) 134 { 135 1 if(GPIOx == GPIO0) 136 1 { 137 2 P0 |= PortPins; 138 2 } 139 1 if(GPIOx == GPIO1) 140 1 { 141 2 P1 |= PortPins; 142 2 } 143 1 if(GPIOx == GPIO2) 144 1 { 145 2 P2 |= PortPins; 146 2 } 147 1 } 148 149 /************************************************** 150 *º¯ÊýÃû³Æ£ºvoid GPIO_WriteLow(GPIO_TypeDef GPIOx, uint8_t PortPins) 151 *º¯Êý¹¦ÄÜ£ºGPIO¿Ú¹Ü½ÅPxy¸´Î» 152 *Èë¿Ú²ÎÊý£ºGPIOx Ñ¡Ôñ²Ù×÷µÄGPIO¿Ú£¨P0,P1,P2£© 153 PortPins Ñ¡ÔñGPIO¿Ú¹Ü½ÅPxy 154 *³ö¿Ú²ÎÊý£ºvoid 155 **************************************************/ 156 void GPIO_WriteLow(GPIO_TypeDef GPIOx, uint8_t PortPins) 157 { 158 1 if(GPIOx == GPIO0) 159 1 { 160 2 P0 &= ~PortPins; 161 2 } 162 1 if(GPIOx == GPIO1) 163 1 { 164 2 P1 &= ~PortPins; 165 2 } 166 1 if(GPIOx == GPIO2) 167 1 { 168 2 P2 &= ~PortPins; 169 2 } 170 1 } 171 172 /************************************************** 173 *º¯ÊýÃû³Æ£ºuint8_t GPIO_ReadPort(GPIO_TypeDef GPIOx) 174 *º¯Êý¹¦ÄÜ£º¶ÁGPIO¿ÚPxµÄÖµ 175 *Èë¿Ú²ÎÊý£ºGPIOx Ñ¡Ôñ²Ù×÷µÄGPIO¿Ú£¨P0,P1,P2£© 176 *³ö¿Ú²ÎÊý£ºuint8_t ·µ»ØPxµÄÖµ C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 9 177 **************************************************/ 178 uint8_t GPIO_ReadPort(GPIO_TypeDef GPIOx) 179 { 180 1 if(GPIOx == GPIO0) 181 1 { 182 2 return P0; 183 2 } 184 1 else if(GPIOx == GPIO1) 185 1 { 186 2 return P1; 187 2 } 188 1 else 189 1 { 190 2 return P2; 191 2 } 192 1 } 193 194 /************************************************** 195 *º¯ÊýÃû³Æ£ºBitStatus GPIO_ReadPin(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef PortPins) 196 *º¯Êý¹¦ÄÜ£º¶ÁGPIO¿Ú¹Ü½ÅPxyµÄÖµ 197 *Èë¿Ú²ÎÊý£ºGPIOx Ñ¡Ôñ²Ù×÷µÄGPIO¿Ú£¨P0,P1,P2£© 198 PortPins Ñ¡ÔñGPIO¿Ú¹Ü½ÅPxy 199 *³ö¿Ú²ÎÊý£ºBitStatus ·µ»ØPxyµÄÖµ 200 **************************************************/ 201 BitStatus GPIO_ReadPin(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef PortPins) 202 { 203 1 if(GPIOx == GPIO0) 204 1 { 205 2 return ((BitStatus)(P0 & PortPins)); 206 2 } 207 1 else if(GPIOx == GPIO1) 208 1 { 209 2 return ((BitStatus)(P1 & PortPins)); 210 2 } 211 1 else 212 1 { 213 2 return ((BitStatus)(P2 & PortPins)); 214 2 } 215 1 } 216 217 /******************* (C) COPYRIGHT 2018 SinOne Microelectronics *****END OF FILE****/ C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 10 ASSEMBLY LISTING OF GENERATED OBJECT CODE ; FUNCTION GPIO_DeInit (BEGIN) ; SOURCE LINE # 20 ; SOURCE LINE # 21 ; SOURCE LINE # 22 0000 E4 CLR A 0001 F59A MOV P0CON,A ; SOURCE LINE # 23 0003 F591 MOV P1CON,A ; SOURCE LINE # 24 0005 F5A1 MOV P2CON,A ; SOURCE LINE # 25 0007 F59B MOV P0PH,A ; SOURCE LINE # 26 0009 F592 MOV P1PH,A ; SOURCE LINE # 27 000B F5A2 MOV P2PH,A ; SOURCE LINE # 28 000D F5A0 MOV P2,A 000F F590 MOV P1,A 0011 F580 MOV P0,A ; SOURCE LINE # 29 0013 22 RET ; FUNCTION GPIO_DeInit (END) ; FUNCTION _GPIO_Init (BEGIN) ; SOURCE LINE # 39 ;---- Variable 'PortPins' assigned to Register 'R5' ---- ;---- Variable 'GPIO_Mode' assigned to Register 'R3' ---- ;---- Variable 'GPIOx' assigned to Register 'R7' ---- ; SOURCE LINE # 40 ; SOURCE LINE # 42 0000 EF MOV A,R7 0001 701C JNZ ?C0002 ; SOURCE LINE # 43 ; SOURCE LINE # 44 0003 EB MOV A,R3 0004 7006 JNZ ?C0003 ; SOURCE LINE # 45 ; SOURCE LINE # 46 0006 ED MOV A,R5 0007 F4 CPL A 0008 529A ANL P0CON,A ; SOURCE LINE # 47 000A 529B ANL P0PH,A ; SOURCE LINE # 48 000C ?C0003: ; SOURCE LINE # 49 000C BB0107 CJNE R3,#01H,?C0004 ; SOURCE LINE # 50 ; SOURCE LINE # 51 000F ED MOV A,R5 0010 F4 CPL A 0011 529A ANL P0CON,A ; SOURCE LINE # 52 0013 ED MOV A,R5 0014 429B ORL P0PH,A ; SOURCE LINE # 53 0016 ?C0004: ; SOURCE LINE # 54 C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 11 0016 EB MOV A,R3 0017 6402 XRL A,#02H 0019 7043 JNZ ?C0016 ; SOURCE LINE # 55 ; SOURCE LINE # 56 001B ED MOV A,R5 001C 429A ORL P0CON,A ; SOURCE LINE # 57 ; SOURCE LINE # 58 001E 22 RET 001F ?C0002: ; SOURCE LINE # 61 001F EF MOV A,R7 0020 6401 XRL A,#01H 0022 701C JNZ ?C0007 ; SOURCE LINE # 62 ; SOURCE LINE # 63 0024 EB MOV A,R3 0025 7006 JNZ ?C0008 ; SOURCE LINE # 64 ; SOURCE LINE # 65 0027 ED MOV A,R5 0028 F4 CPL A 0029 5291 ANL P1CON,A ; SOURCE LINE # 66 002B 5292 ANL P1PH,A ; SOURCE LINE # 67 002D ?C0008: ; SOURCE LINE # 68 002D BB0107 CJNE R3,#01H,?C0009 ; SOURCE LINE # 69 ; SOURCE LINE # 70 0030 ED MOV A,R5 0031 F4 CPL A 0032 5291 ANL P1CON,A ; SOURCE LINE # 71 0034 ED MOV A,R5 0035 4292 ORL P1PH,A ; SOURCE LINE # 72 0037 ?C0009: ; SOURCE LINE # 73 0037 EB MOV A,R3 0038 6402 XRL A,#02H 003A 7022 JNZ ?C0016 ; SOURCE LINE # 74 ; SOURCE LINE # 75 003C ED MOV A,R5 003D 4291 ORL P1CON,A ; SOURCE LINE # 76 ; SOURCE LINE # 77 003F 22 RET 0040 ?C0007: ; SOURCE LINE # 81 ; SOURCE LINE # 82 0040 EF MOV A,R7 0041 6402 XRL A,#02H 0043 7019 JNZ ?C0016 ; SOURCE LINE # 83 ; SOURCE LINE # 84 0045 EB MOV A,R3 0046 7006 JNZ ?C0013 ; SOURCE LINE # 85 C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 12 ; SOURCE LINE # 86 0048 ED MOV A,R5 0049 F4 CPL A 004A 52A1 ANL P2CON,A ; SOURCE LINE # 87 004C 52A2 ANL P2PH,A ; SOURCE LINE # 88 004E ?C0013: ; SOURCE LINE # 89 004E BB0107 CJNE R3,#01H,?C0014 ; SOURCE LINE # 90 ; SOURCE LINE # 91 0051 ED MOV A,R5 0052 F4 CPL A 0053 52A1 ANL P2CON,A ; SOURCE LINE # 92 0055 ED MOV A,R5 0056 42A2 ORL P2PH,A ; SOURCE LINE # 93 0058 ?C0014: ; SOURCE LINE # 94 0058 BB0203 CJNE R3,#02H,?C0016 ; SOURCE LINE # 95 ; SOURCE LINE # 96 005B ED MOV A,R5 005C 42A1 ORL P2CON,A ; SOURCE LINE # 97 ; SOURCE LINE # 98 ; SOURCE LINE # 99 ; SOURCE LINE # 101 005E ?C0016: 005E 22 RET ; FUNCTION _GPIO_Init (END) ; FUNCTION _GPIO_Write (BEGIN) ; SOURCE LINE # 110 ;---- Variable 'PortVal' assigned to Register 'R5' ---- ;---- Variable 'GPIOx' assigned to Register 'R7' ---- ; SOURCE LINE # 111 ; SOURCE LINE # 112 0000 EF MOV A,R7 0001 7002 JNZ ?C0017 ; SOURCE LINE # 113 ; SOURCE LINE # 114 0003 8D80 MOV P0,R5 ; SOURCE LINE # 115 0005 ?C0017: ; SOURCE LINE # 116 0005 BF0102 CJNE R7,#01H,?C0018 ; SOURCE LINE # 117 ; SOURCE LINE # 118 0008 8D90 MOV P1,R5 ; SOURCE LINE # 119 000A ?C0018: ; SOURCE LINE # 120 000A BF0202 CJNE R7,#02H,?C0020 ; SOURCE LINE # 121 ; SOURCE LINE # 122 000D 8DA0 MOV P2,R5 ; SOURCE LINE # 123 ; SOURCE LINE # 124 000F ?C0020: C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 13 000F 22 RET ; FUNCTION _GPIO_Write (END) ; FUNCTION _GPIO_WriteHigh (BEGIN) ; SOURCE LINE # 133 ;---- Variable 'PortPins' assigned to Register 'R5' ---- ;---- Variable 'GPIOx' assigned to Register 'R7' ---- ; SOURCE LINE # 134 ; SOURCE LINE # 135 0000 EF MOV A,R7 0001 7003 JNZ ?C0021 ; SOURCE LINE # 136 ; SOURCE LINE # 137 0003 ED MOV A,R5 0004 4280 ORL P0,A ; SOURCE LINE # 138 0006 ?C0021: ; SOURCE LINE # 139 0006 BF0103 CJNE R7,#01H,?C0022 ; SOURCE LINE # 140 ; SOURCE LINE # 141 0009 ED MOV A,R5 000A 4290 ORL P1,A ; SOURCE LINE # 142 000C ?C0022: ; SOURCE LINE # 143 000C BF0203 CJNE R7,#02H,?C0024 ; SOURCE LINE # 144 ; SOURCE LINE # 145 000F ED MOV A,R5 0010 42A0 ORL P2,A ; SOURCE LINE # 146 ; SOURCE LINE # 147 0012 ?C0024: 0012 22 RET ; FUNCTION _GPIO_WriteHigh (END) ; FUNCTION _GPIO_WriteLow (BEGIN) ; SOURCE LINE # 156 ;---- Variable 'PortPins' assigned to Register 'R5' ---- ;---- Variable 'GPIOx' assigned to Register 'R7' ---- ; SOURCE LINE # 157 ; SOURCE LINE # 158 0000 EF MOV A,R7 0001 7004 JNZ ?C0025 ; SOURCE LINE # 159 ; SOURCE LINE # 160 0003 ED MOV A,R5 0004 F4 CPL A 0005 5280 ANL P0,A ; SOURCE LINE # 161 0007 ?C0025: ; SOURCE LINE # 162 0007 BF0104 CJNE R7,#01H,?C0026 ; SOURCE LINE # 163 ; SOURCE LINE # 164 000A ED MOV A,R5 000B F4 CPL A 000C 5290 ANL P1,A ; SOURCE LINE # 165 000E ?C0026: ; SOURCE LINE # 166 C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 14 000E BF0204 CJNE R7,#02H,?C0028 ; SOURCE LINE # 167 ; SOURCE LINE # 168 0011 ED MOV A,R5 0012 F4 CPL A 0013 52A0 ANL P2,A ; SOURCE LINE # 169 ; SOURCE LINE # 170 0015 ?C0028: 0015 22 RET ; FUNCTION _GPIO_WriteLow (END) ; FUNCTION _GPIO_ReadPort (BEGIN) ; SOURCE LINE # 178 ;---- Variable 'GPIOx' assigned to Register 'R7' ---- ; SOURCE LINE # 179 ; SOURCE LINE # 180 0000 EF MOV A,R7 0001 7003 JNZ ?C0029 ; SOURCE LINE # 181 ; SOURCE LINE # 182 0003 AF80 MOV R7,P0 0005 22 RET ; SOURCE LINE # 183 0006 ?C0029: ; SOURCE LINE # 184 0006 BF0103 CJNE R7,#01H,?C0032 ; SOURCE LINE # 185 ; SOURCE LINE # 186 0009 AF90 MOV R7,P1 000B 22 RET ; SOURCE LINE # 187 000C ?C0032: ; SOURCE LINE # 189 ; SOURCE LINE # 190 000C AFA0 MOV R7,P2 ; SOURCE LINE # 191 ; SOURCE LINE # 192 000E ?C0030: 000E 22 RET ; FUNCTION _GPIO_ReadPort (END) ; FUNCTION _GPIO_ReadPin (BEGIN) ; SOURCE LINE # 201 ;---- Variable 'PortPins' assigned to Register 'R5' ---- ;---- Variable 'GPIOx' assigned to Register 'R7' ---- ; SOURCE LINE # 202 ; SOURCE LINE # 203 0000 EF MOV A,R7 0001 7005 JNZ ?C0034 ; SOURCE LINE # 204 ; SOURCE LINE # 205 0003 E580 MOV A,P0 0005 5D ANL A,R5 0006 FF MOV R7,A 0007 22 RET ; SOURCE LINE # 206 0008 ?C0034: ; SOURCE LINE # 207 0008 BF0105 CJNE R7,#01H,?C0037 ; SOURCE LINE # 208 ; SOURCE LINE # 209 C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 15 000B E590 MOV A,P1 000D 5D ANL A,R5 000E FF MOV R7,A 000F 22 RET ; SOURCE LINE # 210 0010 ?C0037: ; SOURCE LINE # 212 ; SOURCE LINE # 213 0010 E5A0 MOV A,P2 0012 5D ANL A,R5 0013 FF MOV R7,A ; SOURCE LINE # 214 ; SOURCE LINE # 215 0014 ?C0035: 0014 22 RET ; FUNCTION _GPIO_ReadPin (END) C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 16 NAME CLASS MSPACE TYPE OFFSET SIZE ==== ===== ====== ==== ====== ==== uint16_t . . . . . . . . . . . . . . . TYPEDEF ----- U_INT ----- 2 OPREG. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00FFH 1 GPIO_PIN_LNIB. . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 P0 . . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0080H 1 SSDAT. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 009FH 1 P1 . . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0090H 1 P2 . . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00A0H 1 EUART. . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00ACH 1 TMCON. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 008EH 1 AC . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D6H 1 FlagStatus . . . . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 RESET. . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 OTCON. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 008FH 1 EA . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00AFH 1 T2 . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00C9H 1 int32_t. . . . . . . . . . . . . . . . TYPEDEF ----- LONG ----- 4 PWMCON0. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00D2H 1 PWMCON1. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00DAH 1 GPIO_PIN_0 . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 int16_t. . . . . . . . . . . . . . . . TYPEDEF ----- INT ----- 2 GPIO_PIN_1 . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 GPIO_PIN_2 . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 GPIO_PIN_3 . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 ERROR. . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 GPIO_PIN_4 . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 GPIO_PIN_5 . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 EADC . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00AEH 1 IE . . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00A8H 1 GPIO_PIN_6 . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 GPIO_PIN_7 . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 OPINX. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00FEH 1 GPIO_MODE_OUT_PP . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 CP . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00C8H 1 ErrorStatus. . . . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 EXF2 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CEH 1 CHKSUMH. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00FDH 1 PWMDTY0. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00D5H 1 OPERCON. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00EFH 1 PWMDTY1. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00D6H 1 P0PH . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 009BH 1 IP . . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00B8H 1 CHKSUML. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00FCH 1 PWMDTY2. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00D7H 1 P1PH . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0092H 1 RI . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0098H 1 PWMDTY3. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00DCH 1 P2PH . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00A2H 1 SUCCESS. . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 CY . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D7H 1 PWMDTY4. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00DDH 1 TI . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0099H 1 PWMDTY5. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00DEH 1 IPT0 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B9H 1 PWMDTY6. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00DFH 1 _GPIO_Write. . . . . . . . . . . . . . PUBLIC CODE PROC 0000H ----- GPIOx. . . . . . . . . . . . . . . . * REG * DATA U_CHAR 0007H 1 PortVal. . . . . . . . . . . . . . . * REG * DATA U_CHAR 0005H 1 C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 17 NAME CLASS MSPACE TYPE OFFSET SIZE ==== ===== ====== ==== ====== ==== FunctionalState. . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 IPT1 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BBH 1 IPT2 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BDH 1 GPIO_MODE_IN_HI. . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 HIGH . . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 _GPIO_WriteHigh. . . . . . . . . . . . PUBLIC CODE PROC 0000H ----- GPIOx. . . . . . . . . . . . . . . . * REG * DATA U_CHAR 0007H 1 PortPins . . . . . . . . . . . . . . * REG * DATA U_CHAR 0005H 1 RCAP2H . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00CBH 1 SP . . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0081H 1 OV . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D2H 1 ITStatus . . . . . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 IAPADE . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00F4H 1 RCAP2L . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00CAH 1 _GPIO_Init . . . . . . . . . . . . . . PUBLIC CODE PROC 0000H ----- GPIOx. . . . . . . . . . . . . . . . * REG * DATA U_CHAR 0007H 1 PortPins . . . . . . . . . . . . . . * REG * DATA U_CHAR 0005H 1 GPIO_Mode. . . . . . . . . . . . . . * REG * DATA U_CHAR 0003H 1 ENABLE . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 BitStatus. . . . . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 IAPADH . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00F3H 1 PWMDTYA. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00D4H 1 PWMDTYB. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00DBH 1 ADCCON . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00ADH 1 s8 . . . . . . . . . . . . . . . . . . TYPEDEF ----- CHAR ----- 1 u8 . . . . . . . . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 RCLK . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CDH 1 IAPADL . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00F2H 1 GPIO_Mode_TypeDef. . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 bool . . . . . . . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 TCLK . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CCH 1 P00. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0080H 1 P10. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0090H 1 P01. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0081H 1 SBUF . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0099H 1 PCON . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0087H 1 P20. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A0H 1 P11. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0091H 1 GPIO_PIN_ALL . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 P21. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A1H 1 P12. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0092H 1 P22. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A2H 1 P13. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0093H 1 SCON . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0098H 1 GPIO_MODE_IN_PU. . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 P23. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A3H 1 P14. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0094H 1 IAPDAT . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00F5H 1 TCON . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0088H 1 TMOD . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0089H 1 P24. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A4H 1 P15. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0095H 1 IPINT0 . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B8H 1 _GPIO_ReadPort . . . . . . . . . . . . PUBLIC CODE PROC 0000H ----- GPIOx. . . . . . . . . . . . . . . . * REG * DATA U_CHAR 0007H 1 P25. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A5H 1 P16. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0096H 1 C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 18 NAME CLASS MSPACE TYPE OFFSET SIZE ==== ===== ====== ==== ====== ==== IPINT1 . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BAH 1 _GPIO_ReadPin. . . . . . . . . . . . . PUBLIC CODE PROC 0000H ----- GPIOx. . . . . . . . . . . . . . . . * REG * DATA U_CHAR 0007H 1 PortPins . . . . . . . . . . . . . . * REG * DATA U_CHAR 0005H 1 P26. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A6H 1 P17. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0097H 1 SSCON0 . . . . . . . . . . . . . . . . SFR DATA U_CHAR 009DH 1 P27. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A7H 1 SSCON1 . . . . . . . . . . . . . . . . SFR DATA U_CHAR 009EH 1 SSCON2 . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0095H 1 IAPCTL . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00F6H 1 IE1. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00A9H 1 TRUE . . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 B. . . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00F0H 1 IAPKEY . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00F1H 1 BTMCON . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00CEH 1 GPIO_TypeDef . . . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 PWMCFG . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00D1H 1 ACC. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00E0H 1 ET0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A9H 1 TF0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008DH 1 ET1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00ABH 1 ADCCFG0. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00ABH 1 IP1. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00B9H 1 TF1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008FH 1 ET2. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00ADH 1 ADCCFG1. . . . . . . . . . . . . . . . SFR DATA U_CHAR 00AAH 1 RB8. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009AH 1 TF2. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CFH 1 TH0. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 008CH 1 TH1. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 008DH 1 TB8. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009BH 1 TH2. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00CDH 1 GPIO_Pin_TypeDef . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 uint8_t. . . . . . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 P. . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D0H 1 SM0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009FH 1 TL0. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 008AH 1 GPIO_DeInit. . . . . . . . . . . . . . PUBLIC CODE PROC 0000H ----- SM1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009EH 1 WDTCON . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00CFH 1 TL1. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 008BH 1 SM2. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009DH 1 TL2. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00CCH 1 _GPIO_WriteLow . . . . . . . . . . . . PUBLIC CODE PROC 0000H ----- GPIOx. . . . . . . . . . . . . . . . * REG * DATA U_CHAR 0007H 1 PortPins . . . . . . . . . . . . . . * REG * DATA U_CHAR 0005H 1 RS0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D3H 1 TR0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008CH 1 RS1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D4H 1 TR1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008EH 1 IPUART . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BCH 1 s32. . . . . . . . . . . . . . . . . . TYPEDEF ----- LONG ----- 4 TR2. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CAH 1 int8_t . . . . . . . . . . . . . . . . TYPEDEF ----- CHAR ----- 1 u32. . . . . . . . . . . . . . . . . . TYPEDEF ----- U_LONG ----- 4 s16. . . . . . . . . . . . . . . . . . TYPEDEF ----- INT ----- 2 C51 COMPILER V9.60.7.0 SC92F8003_GPIO 05/13/2024 00:07:50 PAGE 19 NAME CLASS MSPACE TYPE OFFSET SIZE ==== ===== ====== ==== ====== ==== u16. . . . . . . . . . . . . . . . . . TYPEDEF ----- U_INT ----- 2 PWMPRD . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00D3H 1 DPH. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0083H 1 GPIO0. . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 DPL. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0082H 1 GPIO1. . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 EINT0. . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A8H 1 P0CON. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 009AH 1 GPIO2. . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 EINT1. . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00AAH 1 IPADC. . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BEH 1 INT0F. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00BAH 1 P1CON. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0091H 1 EXEN2. . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CBH 1 INT1F. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00BCH 1 P2CON. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00A1H 1 INT2F. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00C6H 1 REN. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009CH 1 ADCVH. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00AFH 1 T2MOD. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00C9H 1 T2CON. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00C8H 1 ADCVL. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00AEH 1 SET. . . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 FALSE. . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 INT0R. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00BBH 1 INT1R. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00BDH 1 PriorityStatus . . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1 INT2R. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00C7H 1 LOW. . . . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 F0 . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D5H 1 DISABLE. . . . . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 F1 . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D1H 1 PSW. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00D0H 1 GPIO_PIN_HNIB. . . . . . . . . . . . . E_CONST ----- U_CHAR ----- 1 uint32_t . . . . . . . . . . . . . . . TYPEDEF ----- U_LONG ----- 4 MODULE INFORMATION: STATIC OVERLAYABLE CODE SIZE = 208 ---- CONSTANT SIZE = ---- ---- XDATA SIZE = ---- ---- PDATA SIZE = ---- ---- DATA SIZE = ---- ---- IDATA SIZE = ---- ---- BIT SIZE = ---- ---- EDATA SIZE = ---- ---- HDATA SIZE = ---- ---- XDATA CONST SIZE = ---- ---- FAR CONST SIZE = ---- ---- END OF MODULE INFORMATION. C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)