Host OS:	Windows
ELXR: Copyright (C) 1983-2021 Green Hills Software.  All Rights Reserved.
Release: Compiler v2021.1.4
Build Directory: [Directory] COMP-VAL-WIN1:C:/autoval2/v2021.1-2021-04-25/win64-comp
Revision: [VCInfo] http://toolsvc/branches/release-branch-2021-1-comp/src@696881 (built by auto-compiler)
Revision Date: Mon Apr 26 12:59:11 2021

Release Date: Mon Apr 26 08:01:05 2021




Load Map Mon May 12 00:27:27 2025
Image Summary

  Section              Base      Size(hex)    Size(dec)  SecOffs
  .intc_vector         00000000  00000374          884   0001000
  .startup             00000400  00000000            0   0000000
  .text.startup        00000400  00000000            0   0000000
  .text                00000400  00001f7a         8058   0001374
  .ghtws.text          0000237c  000020c4         8388   00032f0
  .mcal_code           00004440  0000dee4        57060   00053b4
  .fls_ac_code_rom     00012324  00000040           64   0013298
  .rodata              00012364  000002c8          712   00132d8
  .mcal_config_data    0001262c  00002f04        12036   00135a0
  .mcal_const          00015530  00000870         2160   00164a4
  .init_table          00015da0  00000030           48   0016d14
  .zero_table          00015dd0  00000008            8   0016d44
  .ROM.mcal_ramcode    00015dd8  00000000            0   0000000
  .ROM.data            00015dd8  000001d8          472   0016d4c
  .ROM.tls.cond.data   00015fb0  00000000            0   0000000
  .ROM.mcal_data       00015fb0  00000054           84   0016f24
  .intc_vector_ram     1ffe0000  00000374          884   0000000
  .mcal_ramcode        1ffe0374  00000000            0   0000000
  .data                1ffe0374  000001d8          472   0016d4c
  .tls.cond.data       1ffe054c  00000000            0   0000000
  .mcal_data           1ffe054c  00000054           84   0016f24
  .bss                 1ffe05a0  000007d0         2000   0000000
  .tls.cond.bss        1ffe0d70  00000000            0   0000000
  .mcal_bss            1ffe0d80  00001488         5256   0000000
  .fls_ac_code_ram     1ffe2208  00000040           64   0000000
  .stack               2001f000  00001000         4096   0000000
  .ghrettbl            00000000  00000adc         2780   0016f78
  .ghcalltbl           00000000  00001760         5984   0017a54
  .debug_abbrev        00000000  00008383        33667   00191b4
  .debug_str           00000000  000206ec       132844   0021537
  .debug_info          00000000  000662d5       418517   0041c23
  .debug_line          00000000  00037ef0       229104   00a7ef8
  .debug_macinfo       00000000  000f495f      1001823   00dfde8
  .debug_frame         00000000  0000ac68        44136   01d4747
  .debug_loc           00000000  00011c77        72823   01df3af
  .ghtailcalltbl       00000000  00000008            8   01f1028
  .linfix              00000000  00000000            0   0000000
  .gstackfix           00000000  00000000            0   0000000
  .rominfo             00000000  00000024           36   01f1030

Load Map Mon May 12 00:27:27 2025
Module Summary

  Origin+Size    Section          Module
00000400+00014a  .text            startup.o
000023a0+000060  .ghtws.text      startup.o
00000000+000020  .ghrettbl        startup.o
00015dd0+000008  .zero_table      startup.o
00000000+000024  .ghcalltbl       startup.o
00015da0+000030  .init_table      startup.o
00000000+000134  .debug_abbrev    startup.o
00000000+000331  .debug_str       startup.o
00000000+00064b  .debug_info      startup.o
00000000+0002f3  .debug_line      startup.o
00000000+0003ad  .debug_macinfo   startup.o
00000000+000150  .debug_frame     startup.o
00000000+000143  .debug_loc       startup.o
00012364+000004  .rodata          Vector_Table.o
00000000+000374  .intc_vector     Vector_Table.o
00000134+0000a9  .debug_abbrev    Vector_Table.o
00000000+00018b  .debug_str       Vector_Table.o
0000064b+000182  .debug_info      Vector_Table.o
000002f3+000090  .debug_line      Vector_Table.o
000003ad+000015  .debug_macinfo   Vector_Table.o
00004440+0000ec  .mcal_code       Interrupt_Drv.o
00002808+000030  .ghtws.mcal_code -> .ghtws.text  Interrupt_Drv.o
00000020+000010  .ghrettbl        Interrupt_Drv.o
00012368+000034  .rodata          Interrupt_Drv.o
000001dd+000187  .debug_abbrev    Interrupt_Drv.o
00000000+00108e  .debug_str       Interrupt_Drv.o
000007cd+001059  .debug_info      Interrupt_Drv.o
00000383+00060f  .debug_line      Interrupt_Drv.o
000003c2+001532  .debug_macinfo   Interrupt_Drv.o
00000150+000138  .debug_frame     Interrupt_Drv.o
00000143+000102  .debug_loc       Interrupt_Drv.o
0000452c+000096  .mcal_code       Platform.o
00002838+00000c  .ghtws.mcal_code -> .ghtws.text  Platform.o
00000024+000014  .ghcalltbl       Platform.o
00000030+000004  .ghrettbl        Platform.o
00000364+00016d  .debug_abbrev    Platform.o
00000000+00104b  .debug_str       Platform.o
00001826+000d9e  .debug_info      Platform.o
00000992+000575  .debug_line      Platform.o
000018f4+001a71  .debug_macinfo   Platform.o
00000288+000108  .debug_frame     Platform.o
00000245+00014e  .debug_loc       Platform.o
0001239c+00005c  .rodata          Tmu_Drv.o
000004d1+000178  .debug_abbrev    Tmu_Drv.o
00000000+00149a  .debug_str       Tmu_Drv.o
000025c4+000806  .debug_info      Tmu_Drv.o
00000f07+0003e8  .debug_line      Tmu_Drv.o
00003365+0011f9  .debug_macinfo   Tmu_Drv.o
00000390+0000c0  .debug_frame     Tmu_Drv.o
00000393+00006a  .debug_loc       Tmu_Drv.o
000045c2+000010  .mcal_code       Exception.o
00002844+000060  .ghtws.mcal_code -> .ghtws.text  Exception.o
00000649+00005d  .debug_abbrev    Exception.o
00000000+000132  .debug_str       Exception.o
00002dca+0001df  .debug_info      Exception.o
000012ef+000332  .debug_line      Exception.o
0000455e+0007cc  .debug_macinfo   Exception.o
00000450+000180  .debug_frame     Exception.o
000006a6+0000b4  .debug_abbrev    System.o
00000000+000143  .debug_str       System.o
00002fa9+000266  .debug_info      System.o
00001621+000327  .debug_line      System.o
00004d2a+000ede  .debug_macinfo   System.o
000005d0+0000a8  .debug_frame     System.o
0000054a+00006a  .text            task_hal.o
00002400+000048  .ghtws.text      task_hal.o
00000034+000018  .ghrettbl        task_hal.o
00000038+00000c  .ghcalltbl       task_hal.o
0000075a+000166  .debug_abbrev    task_hal.o
00000000+000241  .debug_str       task_hal.o
0000320f+000415  .debug_info      task_hal.o
00001948+001c7b  .debug_line      task_hal.o
00005c08+00c1b3  .debug_macinfo   task_hal.o
00000678+000150  .debug_frame     task_hal.o
000003fd+0000a3  .debug_loc       task_hal.o
000005b4+000116  .text            task.o
1ffe0374+000108  .data            task.o
1ffe05a0+0000ac  .bss             task.o
00002448+000030  .ghtws.text      task.o
0000004c+00000c  .ghrettbl        task.o
00000044+000010  .ghcalltbl       task.o
000008c0+000174  .debug_abbrev    task.o
00000000+000307  .debug_str       task.o
00003624+0004cd  .debug_info      task.o
000035c3+00042f  .debug_line      task.o
00011dbb+00024a  .debug_macinfo   task.o
000007c8+0000f0  .debug_frame     task.o
000004a0+00004c  .debug_loc       task.o
000045d2+0010bc  .mcal_code       Spi.o
1ffe0d80+0000d4  .mcal_bss        Spi.o
000028a4+000138  .ghtws.mcal_code -> .ghtws.text  Spi.o
00000054+00017c  .ghcalltbl       Spi.o
00000058+000068  .ghrettbl        Spi.o
00000a34+0001b7  .debug_abbrev    Spi.o
00000000+0016aa  .debug_str       Spi.o
00003af1+0027d7  .debug_info      Spi.o
000039f2+001440  .debug_line      Spi.o
00012005+0029f8  .debug_macinfo   Spi.o
000008b8+000450  .debug_frame     Spi.o
000004ec+0011cf  .debug_loc       Spi.o
0000568e+000fda  .mcal_code       Spi_Drv.o
000029dc+0000f0  .ghtws.mcal_code -> .ghtws.text  Spi_Drv.o
000000c0+000050  .ghrettbl        Spi_Drv.o
00015530+000028  .mcal_const      Spi_Drv.o
000001d0+0000b8  .ghcalltbl       Spi_Drv.o
1ffe0e54+000138  .mcal_bss        Spi_Drv.o
000123f8+000029  .rodata          Spi_Drv.o
00000beb+0001e1  .debug_abbrev    Spi_Drv.o
00000000+00227e  .debug_str       Spi_Drv.o
000062c8+002a59  .debug_info      Spi_Drv.o
00004e32+0013b3  .debug_line      Spi_Drv.o
000149fd+002819  .debug_macinfo   Spi_Drv.o
00000d08+0002d0  .debug_frame     Spi_Drv.o
000016bb+000b1f  .debug_loc       Spi_Drv.o
00006668+0000fa  .mcal_code       Spi_Drv_Irq.o
00002acc+00006c  .ghtws.mcal_code -> .ghtws.text  Spi_Drv_Irq.o
00000288+000024  .ghcalltbl       Spi_Drv_Irq.o
00000110+000024  .ghrettbl        Spi_Drv_Irq.o
00000dcc+00008e  .debug_abbrev    Spi_Drv_Irq.o
00000000+000227  .debug_str       Spi_Drv_Irq.o
00008d21+000324  .debug_info      Spi_Drv_Irq.o
000061e5+000424  .debug_line      Spi_Drv_Irq.o
00017216+0012c5  .debug_macinfo   Spi_Drv_Irq.o
00000fd8+0001e0  .debug_frame     Spi_Drv_Irq.o
00006762+000124  .mcal_code       Spi_Drvw.o
1ffe0f8c+000006  .mcal_bss        Spi_Drvw.o
00002b38+000030  .ghtws.mcal_code -> .ghtws.text  Spi_Drvw.o
000002ac+00001c  .ghcalltbl       Spi_Drvw.o
00000134+000010  .ghrettbl        Spi_Drvw.o
00012421+00002a  .rodata          Spi_Drvw.o
00000e5a+0001b0  .debug_abbrev    Spi_Drvw.o
00000000+000829  .debug_str       Spi_Drvw.o
00009045+000b29  .debug_info      Spi_Drvw.o
00006609+00051b  .debug_line      Spi_Drvw.o
000184db+001d3f  .debug_macinfo   Spi_Drvw.o
000011b8+000120  .debug_frame     Spi_Drvw.o
000021da+0001df  .debug_loc       Spi_Drvw.o
000006cc+000a1e  .text            Cdd_bd18397.o
1ffe047c+000093  .data            Cdd_bd18397.o
1ffe064c+0000b8  .bss             Cdd_bd18397.o
00002478+000090  .ghtws.text      Cdd_bd18397.o
000002c8+000054  .ghcalltbl       Cdd_bd18397.o
00000144+000030  .ghrettbl        Cdd_bd18397.o
0001244b+000010  .rodata          Cdd_bd18397.o
0000100a+0001a6  .debug_abbrev    Cdd_bd18397.o
00000000+0011aa  .debug_str       Cdd_bd18397.o
00009b6e+001564  .debug_info      Cdd_bd18397.o
00006b24+000d3a  .debug_line      Cdd_bd18397.o
0001a21a+00405d  .debug_macinfo   Cdd_bd18397.o
000012d8+0001c8  .debug_frame     Cdd_bd18397.o
000023b9+00040b  .debug_loc       Cdd_bd18397.o
000010ea+000668  .text            CddTle94x1.o
1ffe0510+000004  .data            CddTle94x1.o
1ffe0704+00005e  .bss             CddTle94x1.o
00002508+0000fc  .ghtws.text      CddTle94x1.o
0000031c+0000a4  .ghcalltbl       CddTle94x1.o
00000174+000054  .ghrettbl        CddTle94x1.o
000011b0+0001a1  .debug_abbrev    CddTle94x1.o
00000000+001398  .debug_str       CddTle94x1.o
0000b0d2+001f1f  .debug_info      CddTle94x1.o
0000785e+00112b  .debug_line      CddTle94x1.o
0001e277+003efe  .debug_macinfo   CddTle94x1.o
000014a0+000390  .debug_frame     CddTle94x1.o
000027c4+0004b0  .debug_loc       CddTle94x1.o
00001752+0000aa  .text            CddTle94x1_Com.o
1ffe0764+0000f6  .bss             CddTle94x1_Com.o
00002604+00000c  .ghtws.text      CddTle94x1_Com.o
000003c0+000008  .ghcalltbl       CddTle94x1_Com.o
000001c8+000004  .ghrettbl        CddTle94x1_Com.o
00001351+000149  .debug_abbrev    CddTle94x1_Com.o
00000000+000274  .debug_str       CddTle94x1_Com.o
0000cff1+000314  .debug_info      CddTle94x1_Com.o
00008989+00093f  .debug_line      CddTle94x1_Com.o
00022175+002955  .debug_macinfo   CddTle94x1_Com.o
00001830+0000d8  .debug_frame     CddTle94x1_Com.o
00002c74+0000dc  .debug_loc       CddTle94x1_Com.o
000017fc+000010  .text            CddSbc.o
1ffe085c+000005  .bss             CddSbc.o
00002610+000018  .ghtws.text      CddSbc.o
000003c8+000008  .ghcalltbl       CddSbc.o
000001cc+000008  .ghrettbl        CddSbc.o
0000149a+00016c  .debug_abbrev    CddSbc.o
00000000+0004a3  .debug_str       CddSbc.o
0000d305+00054f  .debug_info      CddSbc.o
000092c8+00094f  .debug_line      CddSbc.o
00024aca+002959  .debug_macinfo   CddSbc.o
00001908+0001b0  .debug_frame     CddSbc.o
00002d50+000085  .debug_loc       CddSbc.o
0000180c+000010  .text            CddSbc_Router.o
00002628+000018  .ghtws.text      CddSbc_Router.o
000003d0+000008  .ghcalltbl       CddSbc_Router.o
000001d4+000008  .ghrettbl        CddSbc_Router.o
00001606+0000f9  .debug_abbrev    CddSbc_Router.o
00000000+0002f7  .debug_str       CddSbc_Router.o
0000d854+00039d  .debug_info      CddSbc_Router.o
00009c17+0008b6  .debug_line      CddSbc_Router.o
00027423+00288b  .debug_macinfo   CddSbc_Router.o
00001ab8+000198  .debug_frame     CddSbc_Router.o
00002dd5+000039  .debug_loc       CddSbc_Router.o
0000181c+00012e  .text            CddBoost.o
00002640+000018  .ghtws.text      CddBoost.o
000003d8+00008c  .ghcalltbl       CddBoost.o
000001dc+000008  .ghrettbl        CddBoost.o
000016ff+000104  .debug_abbrev    CddBoost.o
00000000+0001bf  .debug_str       CddBoost.o
0000dbf1+000207  .debug_info      CddBoost.o
0000a4cd+0003dc  .debug_line      CddBoost.o
00029cae+0016d1  .debug_macinfo   CddBoost.o
00001c50+0000c0  .debug_frame     CddBoost.o
00002e0e+00003a  .debug_loc       CddBoost.o
1ffe0f94+00000c  .mcal_bss        Flash_Drv.o
00006888+00000e  .mcal_code       Flash_Drv.o
0001245b+00002b  .rodata          Flash_Drv.o
00001803+0001e1  .debug_abbrev    Flash_Drv.o
00000000+001474  .debug_str       Flash_Drv.o
0000ddf8+0021d0  .debug_info      Flash_Drv.o
0000a8a9+000ba4  .debug_line      Flash_Drv.o
0002b37f+002215  .debug_macinfo   Flash_Drv.o
00001d10+000300  .debug_frame     Flash_Drv.o
00002e48+0007ae  .debug_loc       Flash_Drv.o
00012324+000040  .fls_ac_code_rom Flash_Drv_Ac.o
00004434+00000c  .ghtws.fls_ac_code_rom -> .ghtws.text Flash_Drv_Ac.o
00000464+000004  .ghcalltbl       Flash_Drv_Ac.o
000001e4+000004  .ghrettbl        Flash_Drv_Ac.o
000019e4+00010f  .debug_abbrev    Flash_Drv_Ac.o
00000000+0003e7  .debug_str       Flash_Drv_Ac.o
0000ffc8+000720  .debug_info      Flash_Drv_Ac.o
0000b44d+00039d  .debug_line      Flash_Drv_Ac.o
0002d594+001116  .debug_macinfo   Flash_Drv_Ac.o
00002010+0000a8  .debug_frame     Flash_Drv_Ac.o
000035f6+000031  .debug_loc       Flash_Drv_Ac.o
1ffe0fa0+000030  .mcal_bss        Fls.o
00001af3+00017f  .debug_abbrev    Fls.o
00000000+000fc9  .debug_str       Fls.o
000106e8+0019c2  .debug_info      Fls.o
0000b7ea+000e4d  .debug_line      Fls.o
0002e6aa+001c76  .debug_macinfo   Fls.o
000020b8+0003a8  .debug_frame     Fls.o
00003627+000836  .debug_loc       Fls.o
00006898+000004  .mcal_code       Fls_Drvw.o
1ffe0fd0+000004  .mcal_bss        Fls_Drvw.o
00001c72+000128  .debug_abbrev    Fls_Drvw.o
00000000+00078c  .debug_str       Fls_Drvw.o
000120aa+000b44  .debug_info      Fls_Drvw.o
0000c637+000543  .debug_line      Fls_Drvw.o
00030320+0016fb  .debug_macinfo   Fls_Drvw.o
00002460+0001b0  .debug_frame     Fls_Drvw.o
00003e5d+0003cf  .debug_loc       Fls_Drvw.o
0000689c+00090a  .mcal_code       Adc.o
1ffe0fd4+000088  .mcal_bss        Adc.o
00002b68+00003c  .ghtws.mcal_code -> .ghtws.text  Adc.o
00000468+0000a8  .ghcalltbl       Adc.o
000001e8+000014  .ghrettbl        Adc.o
00001d9a+0001c0  .debug_abbrev    Adc.o
00000000+001fc8  .debug_str       Adc.o
00012bee+0027a0  .debug_info      Adc.o
0000cb7a+000905  .debug_line      Adc.o
00031a1b+002b81  .debug_macinfo   Adc.o
00002610+0001f8  .debug_frame     Adc.o
0000422c+00052e  .debug_loc       Adc.o
000071a8+000466  .mcal_code       Adc_Drv.o
1ffe105c+000034  .mcal_bss        Adc_Drv.o
00002ba4+000054  .ghtws.mcal_code -> .ghtws.text  Adc_Drv.o
000001fc+00001c  .ghrettbl        Adc_Drv.o
00015558+000010  .mcal_const      Adc_Drv.o
00000510+000014  .ghcalltbl       Adc_Drv.o
00012486+000029  .rodata          Adc_Drv.o
00001f5a+0001ce  .debug_abbrev    Adc_Drv.o
00000000+0012e7  .debug_str       Adc_Drv.o
0001538e+0019c3  .debug_info      Adc_Drv.o
0000d47f+000a5b  .debug_line      Adc_Drv.o
0003459c+0023bb  .debug_macinfo   Adc_Drv.o
00002808+0001e0  .debug_frame     Adc_Drv.o
0000475a+0004ad  .debug_loc       Adc_Drv.o
0000760e+000054  .mcal_code       Adc_Drv_Irq.o
00002bf8+000018  .ghtws.mcal_code -> .ghtws.text  Adc_Drv_Irq.o
00000524+000008  .ghcalltbl       Adc_Drv_Irq.o
00000218+000008  .ghrettbl        Adc_Drv_Irq.o
00002128+000095  .debug_abbrev    Adc_Drv_Irq.o
00000000+0000c9  .debug_str       Adc_Drv_Irq.o
00016d51+0000b5  .debug_info      Adc_Drv_Irq.o
0000deda+0002e8  .debug_line      Adc_Drv_Irq.o
00036957+001229  .debug_macinfo   Adc_Drv_Irq.o
000029e8+0000c0  .debug_frame     Adc_Drv_Irq.o
00007664+000264  .mcal_code       Tdg_Adc_Drv.o
1ffe1090+00002c  .mcal_bss        Tdg_Adc_Drv.o
00002c10+000030  .ghtws.mcal_code -> .ghtws.text  Tdg_Adc_Drv.o
00000220+000010  .ghrettbl        Tdg_Adc_Drv.o
00015568+000010  .mcal_const      Tdg_Adc_Drv.o
0000052c+000014  .ghcalltbl       Tdg_Adc_Drv.o
000124af+00002d  .rodata          Tdg_Adc_Drv.o
000021bd+0001ea  .debug_abbrev    Tdg_Adc_Drv.o
00000000+000eb9  .debug_str       Tdg_Adc_Drv.o
00016e06+0013d9  .debug_info      Tdg_Adc_Drv.o
0000e1c2+000716  .debug_line      Tdg_Adc_Drv.o
00037b80+001a89  .debug_macinfo   Tdg_Adc_Drv.o
00002aa8+000150  .debug_frame     Tdg_Adc_Drv.o
00004c07+000252  .debug_loc       Tdg_Adc_Drv.o
000023a7+000095  .debug_abbrev    Tdg_Adc_Drv_Irq.o
00000000+000124  .debug_str       Tdg_Adc_Drv_Irq.o
000181df+000130  .debug_info      Tdg_Adc_Drv_Irq.o
0000e8d8+000316  .debug_line      Tdg_Adc_Drv_Irq.o
00039609+0011e5  .debug_macinfo   Tdg_Adc_Drv_Irq.o
00002bf8+0000f0  .debug_frame     Tdg_Adc_Drv_Irq.o
000078c8+00187c  .mcal_code       Mcpwm_Pwm_Drv.o
00015578+000010  .mcal_const      Mcpwm_Pwm_Drv.o
1ffe10bc+0002d0  .mcal_bss        Mcpwm_Pwm_Drv.o
00002c40+0000f0  .ghtws.mcal_code -> .ghtws.text  Mcpwm_Pwm_Drv.o
00000230+000050  .ghrettbl        Mcpwm_Pwm_Drv.o
00000540+000120  .ghcalltbl       Mcpwm_Pwm_Drv.o
000124dc+00002f  .rodata          Mcpwm_Pwm_Drv.o
0000243c+0001e1  .debug_abbrev    Mcpwm_Pwm_Drv.o
00000000+002b50  .debug_str       Mcpwm_Pwm_Drv.o
0001830f+00470b  .debug_info      Mcpwm_Pwm_Drv.o
0000ebee+001935  .debug_line      Mcpwm_Pwm_Drv.o
0003a7ee+001b33  .debug_macinfo   Mcpwm_Pwm_Drv.o
00002ce8+000558  .debug_frame     Mcpwm_Pwm_Drv.o
00004e59+0014ce  .debug_loc       Mcpwm_Pwm_Drv.o
0000261d+00008e  .debug_abbrev    Mcpwm_Pwm_Drv_Irq.o
00000000+000149  .debug_str       Mcpwm_Pwm_Drv_Irq.o
0001ca1a+00012a  .debug_info      Mcpwm_Pwm_Drv_Irq.o
00010523+000340  .debug_line      Mcpwm_Pwm_Drv_Irq.o
0003c321+001254  .debug_macinfo   Mcpwm_Pwm_Drv_Irq.o
00003240+0000f0  .debug_frame     Mcpwm_Pwm_Drv_Irq.o
1ffe0864+000004  .bss             Pwm.o
00009144+00045a  .mcal_code       Pwm.o
1ffe138c+00000c  .mcal_bss        Pwm.o
00002d30+000090  .ghtws.mcal_code -> .ghtws.text  Pwm.o
00000660+000094  .ghcalltbl       Pwm.o
00000280+000030  .ghrettbl        Pwm.o
000026ab+0001b9  .debug_abbrev    Pwm.o
00000000+001cbf  .debug_str       Pwm.o
0001cb44+002672  .debug_info      Pwm.o
00010863+00102b  .debug_line      Pwm.o
0003d575+003b10  .debug_macinfo   Pwm.o
00003330+0003f0  .debug_frame     Pwm.o
00006327+000d9c  .debug_loc       Pwm.o
0000959e+00033e  .mcal_code       Pwm_Drvw.o
00002dc0+00009c  .ghtws.mcal_code -> .ghtws.text  Pwm_Drvw.o
000006f4+000080  .ghcalltbl       Pwm_Drvw.o
000002b0+000034  .ghrettbl        Pwm_Drvw.o
00002864+00015a  .debug_abbrev    Pwm_Drvw.o
00000000+0021ee  .debug_str       Pwm_Drvw.o
0001f1b6+002af4  .debug_info      Pwm_Drvw.o
0001188e+000fb7  .debug_line      Pwm_Drvw.o
00041085+0029c6  .debug_macinfo   Pwm_Drvw.o
00003720+000420  .debug_frame     Pwm_Drvw.o
000070c3+000e07  .debug_loc       Pwm_Drvw.o
000098dc+000e84  .mcal_code       Tim_Pwm_Drv.o
00015588+000020  .mcal_const      Tim_Pwm_Drv.o
1ffe1398+000428  .mcal_bss        Tim_Pwm_Drv.o
00002e5c+0000e4  .ghtws.mcal_code -> .ghtws.text  Tim_Pwm_Drv.o
000002e4+00004c  .ghrettbl        Tim_Pwm_Drv.o
00000774+0000f4  .ghcalltbl       Tim_Pwm_Drv.o
0001250b+00002d  .rodata          Tim_Pwm_Drv.o
000029be+0001e1  .debug_abbrev    Tim_Pwm_Drv.o
00000000+002350  .debug_str       Tim_Pwm_Drv.o
00021caa+003a8c  .debug_info      Tim_Pwm_Drv.o
00012845+001477  .debug_line      Tim_Pwm_Drv.o
00043a4b+001da2  .debug_macinfo   Tim_Pwm_Drv.o
00003b40+000510  .debug_frame     Tim_Pwm_Drv.o
00007eca+001240  .debug_loc       Tim_Pwm_Drv.o
00002b9f+00008e  .debug_abbrev    Tim_Pwm_Drv_Irq.o
00000000+00013b  .debug_str       Tim_Pwm_Drv_Irq.o
00025736+00012d  .debug_info      Tim_Pwm_Drv_Irq.o
00013cbc+000336  .debug_line      Tim_Pwm_Drv_Irq.o
000457ed+001592  .debug_macinfo   Tim_Pwm_Drv_Irq.o
00004050+0000f0  .debug_frame     Tim_Pwm_Drv_Irq.o
0000194a+000002  .text            EcuM.o
1ffe0868+000004  .bss             EcuM.o
00002658+00000c  .ghtws.text      EcuM.o
00000330+000004  .ghrettbl        EcuM.o
00002c2d+0000b4  .debug_abbrev    EcuM.o
00000000+00010b  .debug_str       EcuM.o
00025863+000126  .debug_info      EcuM.o
00013ff2+00016c  .debug_line      EcuM.o
00046d7f+0001d3  .debug_macinfo   EcuM.o
00004140+0000d8  .debug_frame     EcuM.o
0000910a+000013  .debug_loc       EcuM.o
1ffe086c+000004  .bss             Gpt.o
0000a760+00050a  .mcal_code       Gpt.o
00002f40+00003c  .ghtws.mcal_code -> .ghtws.text  Gpt.o
00000868+000070  .ghcalltbl       Gpt.o
00000334+000014  .ghrettbl        Gpt.o
1ffe17c0+00003c  .mcal_bss        Gpt.o
00002ce1+0001c0  .debug_abbrev    Gpt.o
00000000+001758  .debug_str       Gpt.o
00025989+001cf6  .debug_info      Gpt.o
0001415e+000b69  .debug_line      Gpt.o
00046f52+002b33  .debug_macinfo   Gpt.o
00004218+0001f8  .debug_frame     Gpt.o
0000911d+0005d9  .debug_loc       Gpt.o
0000ac6a+000118  .mcal_code       Gpt_Drvw.o
00002f7c+000054  .ghtws.mcal_code -> .ghtws.text  Gpt_Drvw.o
00000348+00001c  .ghrettbl        Gpt_Drvw.o
000008d8+000028  .ghcalltbl       Gpt_Drvw.o
00002ea1+000196  .debug_abbrev    Gpt_Drvw.o
00000000+000c96  .debug_str       Gpt_Drvw.o
0002767f+000cd7  .debug_info      Gpt_Drvw.o
00014cc7+0007c5  .debug_line      Gpt_Drvw.o
00049a85+002090  .debug_macinfo   Gpt_Drvw.o
00004410+000198  .debug_frame     Gpt_Drvw.o
000096f6+000182  .debug_loc       Gpt_Drvw.o
00003037+000018  .debug_abbrev    Rtc_Drv.o
00000000+000074  .debug_str       Rtc_Drv.o
00028356+00002c  .debug_info      Rtc_Drv.o
0001548c+00036d  .debug_line      Rtc_Drv.o
0004bb15+001050  .debug_macinfo   Rtc_Drv.o
0000ad82+00064c  .mcal_code       Stim_Drv.o
000155a8+000008  .mcal_const      Stim_Drv.o
1ffe17fc+000030  .mcal_bss        Stim_Drv.o
00002fd0+000084  .ghtws.mcal_code -> .ghtws.text  Stim_Drv.o
00000900+0000a8  .ghcalltbl       Stim_Drv.o
00000364+00002c  .ghrettbl        Stim_Drv.o
00012538+00002a  .rodata          Stim_Drv.o
0000304f+0001e1  .debug_abbrev    Stim_Drv.o
00000000+00096c  .debug_str       Stim_Drv.o
00028382+000fb0  .debug_info      Stim_Drv.o
000157f9+00083e  .debug_line      Stim_Drv.o
0004cb65+00175a  .debug_macinfo   Stim_Drv.o
000045a8+0001e0  .debug_frame     Stim_Drv.o
00009878+000490  .debug_loc       Stim_Drv.o
00003230+000018  .debug_abbrev    Tim_Drv.o
00000000+000074  .debug_str       Tim_Drv.o
00029332+00002c  .debug_info      Tim_Drv.o
00016037+00036d  .debug_line      Tim_Drv.o
0004e2bf+00102c  .debug_macinfo   Tim_Drv.o
0000b3ce+0001de  .mcal_code       CDD_Dma.o
1ffe182c+00002c  .mcal_bss        CDD_Dma.o
00003054+00003c  .ghtws.mcal_code -> .ghtws.text  CDD_Dma.o
00000390+000014  .ghrettbl        CDD_Dma.o
000009a8+00004c  .ghcalltbl       CDD_Dma.o
00003248+0001b0  .debug_abbrev    CDD_Dma.o
00000000+001fbc  .debug_str       CDD_Dma.o
0002935e+001cb6  .debug_info      CDD_Dma.o
000163a4+000937  .debug_line      CDD_Dma.o
0004f2eb+001d91  .debug_macinfo   CDD_Dma.o
00004788+000240  .debug_frame     CDD_Dma.o
00009d08+00058c  .debug_loc       CDD_Dma.o
0000b5ac+000950  .mcal_code       Dma_Drv.o
00003090+0000b4  .ghtws.mcal_code -> .ghtws.text  Dma_Drv.o
000003a4+00003c  .ghrettbl        Dma_Drv.o
1ffe1858+000018  .mcal_bss        Dma_Drv.o
000009f4+00007c  .ghcalltbl       Dma_Drv.o
000155b0+000058  .mcal_const      Dma_Drv.o
00012562+000029  .rodata          Dma_Drv.o
000033f8+0001e1  .debug_abbrev    Dma_Drv.o
00000000+001e34  .debug_str       Dma_Drv.o
0002b014+002d4b  .debug_info      Dma_Drv.o
00016cdb+000c4e  .debug_line      Dma_Drv.o
0005107c+002117  .debug_macinfo   Dma_Drv.o
000049c8+0003f0  .debug_frame     Dma_Drv.o
0000a294+00062e  .debug_loc       Dma_Drv.o
0000befc+0000d2  .mcal_code       Dma_Drv_Irq.o
00003144+00003c  .ghtws.mcal_code -> .ghtws.text  Dma_Drv_Irq.o
00000a70+000014  .ghcalltbl       Dma_Drv_Irq.o
000003e0+000014  .ghrettbl        Dma_Drv_Irq.o
000035d9+0000aa  .debug_abbrev    Dma_Drv_Irq.o
00000000+000266  .debug_str       Dma_Drv_Irq.o
0002dd5f+000222  .debug_info      Dma_Drv_Irq.o
00017929+00035c  .debug_line      Dma_Drv_Irq.o
00053193+001422  .debug_macinfo   Dma_Drv_Irq.o
00004db8+000120  .debug_frame     Dma_Drv_Irq.o
0000bfce+001156  .mcal_code       Can.o
1ffe1870+0006c4  .mcal_bss        Can.o
00003180+0001bc  .ghtws.mcal_code -> .ghtws.text  Can.o
00000a84+0001f0  .ghcalltbl       Can.o
000003f4+000094  .ghrettbl        Can.o
00015608+000004  .mcal_const      Can.o
00003683+0001b2  .debug_abbrev    Can.o
00000000+002b11  .debug_str       Can.o
0002df81+003f64  .debug_info      Can.o
00017c85+00196b  .debug_line      Can.o
000545b5+002de5  .debug_macinfo   Can.o
00004ed8+000660  .debug_frame     Can.o
0000a8c2+001934  .debug_loc       Can.o
0000d124+002b6a  .mcal_code       Can_Drv.o
1ffe1f34+000200  .mcal_bss        Can_Drv.o
0000333c+0004a4  .ghtws.mcal_code -> .ghtws.text  Can_Drv.o
00000c74+000450  .ghcalltbl       Can_Drv.o
00000488+00018c  .ghrettbl        Can_Drv.o
0001560c+000040  .mcal_const      Can_Drv.o
0001258b+000029  .rodata          Can_Drv.o
00003835+000205  .debug_abbrev    Can_Drv.o
00000000+0045ea  .debug_str       Can_Drv.o
00031ee5+008085  .debug_info      Can_Drv.o
000195f0+002fcb  .debug_line      Can_Drv.o
0005739a+00357d  .debug_macinfo   Can_Drv.o
00005538+000c00  .debug_frame     Can_Drv.o
0000c1f6+003347  .debug_loc       Can_Drv.o
0000fc8e+0001b4  .mcal_code       Can_Drv_Irq.o
000037e0+000078  .ghtws.mcal_code -> .ghtws.text  Can_Drv_Irq.o
000010c4+000028  .ghcalltbl       Can_Drv_Irq.o
00000614+000028  .ghrettbl        Can_Drv_Irq.o
00003a3a+00008e  .debug_abbrev    Can_Drv_Irq.o
00000000+000258  .debug_str       Can_Drv_Irq.o
00039f6a+0002ef  .debug_info      Can_Drv_Irq.o
0001c5bb+0003d0  .debug_line      Can_Drv_Irq.o
0005a917+0010f5  .debug_macinfo   Can_Drv_Irq.o
00006138+000180  .debug_frame     Can_Drv_Irq.o
0000fe42+000086  .mcal_code       Can_Irq.o
00003858+000018  .ghtws.mcal_code -> .ghtws.text  Can_Irq.o
000010ec+000024  .ghcalltbl       Can_Irq.o
0000063c+000008  .ghrettbl        Can_Irq.o
00003ac8+000121  .debug_abbrev    Can_Irq.o
00000000+00058e  .debug_str       Can_Irq.o
0003a259+0005bd  .debug_info      Can_Irq.o
0001c98b+00046f  .debug_line      Can_Irq.o
0005ba0c+0017b4  .debug_macinfo   Can_Irq.o
000062b8+0000c0  .debug_frame     Can_Irq.o
0000f53d+000085  .debug_loc       Can_Irq.o
0000fec8+000030  .mcal_code       SchM_Adc.o
00003870+000048  .ghtws.mcal_code -> .ghtws.text  SchM_Adc.o
00001110+000018  .ghcalltbl       SchM_Adc.o
00000644+000018  .ghrettbl        SchM_Adc.o
00003be9+00006b  .debug_abbrev    SchM_Adc.o
00000000+0001fb  .debug_str       SchM_Adc.o
0003a816+00020e  .debug_info      SchM_Adc.o
0001cdfa+000306  .debug_line      SchM_Adc.o
0005d1c0+0009d8  .debug_macinfo   SchM_Adc.o
00006378+000180  .debug_frame     SchM_Adc.o
0000fef8+0000b0  .mcal_code       SchM_Can.o
000038b8+000108  .ghtws.mcal_code -> .ghtws.text  SchM_Can.o
00001128+000058  .ghcalltbl       SchM_Can.o
0000065c+000058  .ghrettbl        SchM_Can.o
00003c54+00006b  .debug_abbrev    SchM_Can.o
00000000+0004bb  .debug_str       SchM_Can.o
0003aa24+00065f  .debug_info      SchM_Can.o
0001d100+0004fe  .debug_line      SchM_Can.o
0005db98+000a18  .debug_macinfo   SchM_Can.o
000064f8+0003c0  .debug_frame     SchM_Can.o
00003cbf+00006b  .debug_abbrev    SchM_Crypto.o
00000000+0000ec  .debug_str       SchM_Crypto.o
0003b083+0000a4  .debug_info      SchM_Crypto.o
0001d5fe+000264  .debug_line      SchM_Crypto.o
0005e5b0+0009fa  .debug_macinfo   SchM_Crypto.o
000068b8+0000c0  .debug_frame     SchM_Crypto.o
0000ffa8+000010  .mcal_code       SchM_Dio.o
000039c0+000018  .ghtws.mcal_code -> .ghtws.text  SchM_Dio.o
00001180+000008  .ghcalltbl       SchM_Dio.o
000006b4+000008  .ghrettbl        SchM_Dio.o
00003d2a+00006b  .debug_abbrev    SchM_Dio.o
00000000+0000e7  .debug_str       SchM_Dio.o
0003b127+0000a4  .debug_info      SchM_Dio.o
0001d862+00025e  .debug_line      SchM_Dio.o
0005efaa+000a14  .debug_macinfo   SchM_Dio.o
00006978+0000c0  .debug_frame     SchM_Dio.o
0000ffb8+000070  .mcal_code       SchM_Dma.o
000039d8+0000a8  .ghtws.mcal_code -> .ghtws.text  SchM_Dma.o
00001188+000038  .ghcalltbl       SchM_Dma.o
000006bc+000038  .ghrettbl        SchM_Dma.o
00003d95+00006b  .debug_abbrev    SchM_Dma.o
00000000+000219  .debug_str       SchM_Dma.o
0003b1cb+0002c7  .debug_info      SchM_Dma.o
0001dac0+00035a  .debug_line      SchM_Dma.o
0005f9be+000a16  .debug_macinfo   SchM_Dma.o
00006a38+0001e0  .debug_frame     SchM_Dma.o
00003e00+00006b  .debug_abbrev    SchM_Fls.o
00000000+0001d2  .debug_str       SchM_Fls.o
0003b492+00026a  .debug_info      SchM_Fls.o
0001de1a+000330  .debug_line      SchM_Fls.o
000603d4+0009d8  .debug_macinfo   SchM_Fls.o
00006c18+0001b0  .debug_frame     SchM_Fls.o
00010028+000010  .mcal_code       SchM_Gpt.o
00003a80+000018  .ghtws.mcal_code -> .ghtws.text  SchM_Gpt.o
000011c0+000008  .ghcalltbl       SchM_Gpt.o
000006f4+000008  .ghrettbl        SchM_Gpt.o
00003e6b+00006b  .debug_abbrev    SchM_Gpt.o
00000000+00041b  .debug_str       SchM_Gpt.o
0003b6fc+0004ee  .debug_info      SchM_Gpt.o
0001e14a+000456  .debug_line      SchM_Gpt.o
00060dac+0009d8  .debug_macinfo   SchM_Gpt.o
00006dc8+000300  .debug_frame     SchM_Gpt.o
00003ed6+000018  .debug_abbrev    SchM_I2c.o
00000000+000075  .debug_str       SchM_I2c.o
0003bbea+00002c  .debug_info      SchM_I2c.o
0001e5a0+000234  .debug_line      SchM_I2c.o
00061784+0009aa  .debug_macinfo   SchM_I2c.o
00003eee+00006b  .debug_abbrev    SchM_Icu.o
00000000+000373  .debug_str       SchM_Icu.o
0003bc16+00043c  .debug_info      SchM_Icu.o
0001e7d4+000402  .debug_line      SchM_Icu.o
0006212e+000a16  .debug_macinfo   SchM_Icu.o
000070c8+0002a0  .debug_frame     SchM_Icu.o
00003f59+00006b  .debug_abbrev    SchM_Lin.o
00000000+000280  .debug_str       SchM_Lin.o
0003c052+000326  .debug_info      SchM_Lin.o
0001ebd6+000384  .debug_line      SchM_Lin.o
00062b44+000a16  .debug_macinfo   SchM_Lin.o
00007368+000210  .debug_frame     SchM_Lin.o
00010038+000010  .mcal_code       SchM_Mcu.o
00003a98+000018  .ghtws.mcal_code -> .ghtws.text  SchM_Mcu.o
000011c8+000008  .ghcalltbl       SchM_Mcu.o
000006fc+000008  .ghrettbl        SchM_Mcu.o
00003fc4+00006b  .debug_abbrev    SchM_Mcu.o
00000000+0000db  .debug_str       SchM_Mcu.o
0003c378+0000a4  .debug_info      SchM_Mcu.o
0001ef5a+00025e  .debug_line      SchM_Mcu.o
0006355a+0009d6  .debug_macinfo   SchM_Mcu.o
00007578+0000c0  .debug_frame     SchM_Mcu.o
0000402f+00006b  .debug_abbrev    SchM_Ocu.o
00000000+000246  .debug_str       SchM_Ocu.o
0003c41c+00026b  .debug_info      SchM_Ocu.o
0001f1b8+000330  .debug_line      SchM_Ocu.o
00063f30+000a16  .debug_macinfo   SchM_Ocu.o
00007638+0001b0  .debug_frame     SchM_Ocu.o
00010048+000020  .mcal_code       SchM_Port.o
00003ab0+000030  .ghtws.mcal_code -> .ghtws.text  SchM_Port.o
000011d0+000010  .ghcalltbl       SchM_Port.o
00000704+000010  .ghrettbl        SchM_Port.o
0000409a+00006b  .debug_abbrev    SchM_Port.o
00000000+000123  .debug_str       SchM_Port.o
0003c687+0000fe  .debug_info      SchM_Port.o
0001f4e8+00028a  .debug_line      SchM_Port.o
00064946+000a14  .debug_macinfo   SchM_Port.o
000077e8+0000f0  .debug_frame     SchM_Port.o
00010068+000120  .mcal_code       SchM_Pwm.o
00003ae0+0001b0  .ghtws.mcal_code -> .ghtws.text  SchM_Pwm.o
000011e0+000090  .ghcalltbl       SchM_Pwm.o
00000714+000090  .ghrettbl        SchM_Pwm.o
00004105+00006b  .debug_abbrev    SchM_Pwm.o
00000000+000905  .debug_str       SchM_Pwm.o
0003c785+0009f7  .debug_info      SchM_Pwm.o
0001f772+0006a2  .debug_line      SchM_Pwm.o
0006535a+000a18  .debug_macinfo   SchM_Pwm.o
000078d8+0005a0  .debug_frame     SchM_Pwm.o
00010188+000070  .mcal_code       SchM_Spi.o
00003c90+0000a8  .ghtws.mcal_code -> .ghtws.text  SchM_Spi.o
00001270+000038  .ghcalltbl       SchM_Spi.o
000007a4+000038  .ghrettbl        SchM_Spi.o
00004170+00006b  .debug_abbrev    SchM_Spi.o
00000000+00028d  .debug_str       SchM_Spi.o
0003d17c+0002c7  .debug_info      SchM_Spi.o
0001fe14+00035a  .debug_line      SchM_Spi.o
00065d72+000a16  .debug_macinfo   SchM_Spi.o
00007e78+0001e0  .debug_frame     SchM_Spi.o
000101f8+000020  .mcal_code       SchM_Wdg.o
00003d38+000030  .ghtws.mcal_code -> .ghtws.text  SchM_Wdg.o
000012a8+000010  .ghcalltbl       SchM_Wdg.o
000007dc+000010  .ghrettbl        SchM_Wdg.o
000041db+00006b  .debug_abbrev    SchM_Wdg.o
00000000+0001fd  .debug_str       SchM_Wdg.o
0003d443+00020f  .debug_info      SchM_Wdg.o
0002016e+000306  .debug_line      SchM_Wdg.o
00066788+000a16  .debug_macinfo   SchM_Wdg.o
00008058+000180  .debug_frame     SchM_Wdg.o
00004246+00006b  .debug_abbrev    SchM_Wdg_179_Ewdt.o
00000000+000209  .debug_str       SchM_Wdg_179_Ewdt.o
0003d652+0001b3  .debug_info      SchM_Wdg_179_Ewdt.o
00020474+0002ee  .debug_line      SchM_Wdg_179_Ewdt.o
0006719e+000a94  .debug_macinfo   SchM_Wdg_179_Ewdt.o
000081d8+000150  .debug_frame     SchM_Wdg_179_Ewdt.o
0000194c+000008  .text            Det.o
00002664+000018  .ghtws.text      Det.o
000007ec+000008  .ghrettbl        Det.o
000042b1+0000c5  .debug_abbrev    Det.o
00000000+000162  .debug_str       Det.o
0003d805+000262  .debug_info      Det.o
00020762+00018f  .debug_line      Det.o
00067c32+0001d2  .debug_macinfo   Det.o
00008328+000108  .debug_frame     Det.o
0000f5c2+0000e4  .debug_loc       Det.o
00010218+0000cc  .mcal_code       McalLib.o
1ffe2134+000004  .mcal_bss        McalLib.o
00003d68+000048  .ghtws.mcal_code -> .ghtws.text  McalLib.o
000012b8+000010  .ghcalltbl       McalLib.o
000007f4+000018  .ghrettbl        McalLib.o
00004376+000154  .debug_abbrev    McalLib.o
00000000+0002ad  .debug_str       McalLib.o
0003da67+0003a3  .debug_info      McalLib.o
000208f1+000393  .debug_line      McalLib.o
00067e04+000cc1  .debug_macinfo   McalLib.o
00008430+000138  .debug_frame     McalLib.o
0000f6a6+0000ef  .debug_loc       McalLib.o
000102e4+000166  .mcal_code       McalLib_OsCounter.o
00003db0+000060  .ghtws.mcal_code -> .ghtws.text  McalLib_OsCounter.o
0000080c+000020  .ghrettbl        McalLib_OsCounter.o
1ffe2138+000008  .mcal_bss        McalLib_OsCounter.o
000012c8+000024  .ghcalltbl       McalLib_OsCounter.o
000125b4+000037  .rodata          McalLib_OsCounter.o
000044ca+00018f  .debug_abbrev    McalLib_OsCounter.o
00000000+000354  .debug_str       McalLib_OsCounter.o
0003de0a+00055a  .debug_info      McalLib_OsCounter.o
00020c84+000460  .debug_line      McalLib_OsCounter.o
00068ac5+00160b  .debug_macinfo   McalLib_OsCounter.o
00008568+000168  .debug_frame     McalLib_OsCounter.o
0000f795+000161  .debug_loc       McalLib_OsCounter.o
1ffe0870+000008  .bss             Mcu.o
0001044a+000268  .mcal_code       Mcu.o
00003e10+000090  .ghtws.mcal_code -> .ghtws.text  Mcu.o
000012ec+00006c  .ghcalltbl       Mcu.o
0000082c+000030  .ghrettbl        Mcu.o
1ffe2140+000008  .mcal_bss        Mcu.o
0001564c+0000f0  .mcal_const      Mcu.o
00004659+00019a  .debug_abbrev    Mcu.o
00000000+00264f  .debug_str       Mcu.o
0003e364+002173  .debug_info      Mcu.o
000210e4+000c34  .debug_line      Mcu.o
0006a0d0+003588  .debug_macinfo   Mcu.o
000086d0+000300  .debug_frame     Mcu.o
0000f8f6+00031f  .debug_loc       Mcu.o
000106b2+000094  .mcal_code       Mcu_Drvw.o
00003ea0+00003c  .ghtws.mcal_code -> .ghtws.text  Mcu_Drvw.o
00001358+000044  .ghcalltbl       Mcu_Drvw.o
0000085c+000014  .ghrettbl        Mcu_Drvw.o
0001573c+000080  .mcal_const      Mcu_Drvw.o
000047f3+000187  .debug_abbrev    Mcu_Drvw.o
00000000+002305  .debug_str       Mcu_Drvw.o
000404d7+001a5f  .debug_info      Mcu_Drvw.o
00021d18+000938  .debug_line      Mcu_Drvw.o
0006d658+003699  .debug_macinfo   Mcu_Drvw.o
000089d0+0001f8  .debug_frame     Mcu_Drvw.o
0000fc15+000164  .debug_loc       Mcu_Drvw.o
00010746+000270  .mcal_code       Parcc_Drv.o
000157bc+000570  .mcal_const      Parcc_Drv.o
00003edc+000054  .ghtws.mcal_code -> .ghtws.text  Parcc_Drv.o
00000870+00001c  .ghrettbl        Parcc_Drv.o
0000139c+00001c  .ghcalltbl       Parcc_Drv.o
0000497a+000173  .debug_abbrev    Parcc_Drv.o
00000000+000e24  .debug_str       Parcc_Drv.o
00041f36+000de0  .debug_info      Parcc_Drv.o
00022650+0004fc  .debug_line      Parcc_Drv.o
00070cf1+00146a  .debug_macinfo   Parcc_Drv.o
00008bc8+000138  .debug_frame     Parcc_Drv.o
0000fd79+00021f  .debug_loc       Parcc_Drv.o
1ffe0878+000008  .bss             Pmu_Drv.o
000109b8+00013c  .mcal_code       Pmu_Drv.o
00003f30+000030  .ghtws.mcal_code -> .ghtws.text  Pmu_Drv.o
0000088c+000010  .ghrettbl        Pmu_Drv.o
00015d2c+000008  .mcal_const      Pmu_Drv.o
000013b8+00001c  .ghcalltbl       Pmu_Drv.o
00004aed+00015e  .debug_abbrev    Pmu_Drv.o
00000000+0006b8  .debug_str       Pmu_Drv.o
00042d16+0008de  .debug_info      Pmu_Drv.o
00022b4c+00048b  .debug_line      Pmu_Drv.o
0007215b+00140b  .debug_macinfo   Pmu_Drv.o
00008d00+000108  .debug_frame     Pmu_Drv.o
0000ff98+00007d  .debug_loc       Pmu_Drv.o
00004c4b+000155  .debug_abbrev    Ram_Drv.o
00000000+0004a6  .debug_str       Ram_Drv.o
000435f4+00051a  .debug_info      Ram_Drv.o
00022fd7+0003ca  .debug_line      Ram_Drv.o
00073566+000d2d  .debug_macinfo   Ram_Drv.o
00008e08+0000d8  .debug_frame     Ram_Drv.o
00010015+000090  .debug_loc       Ram_Drv.o
00010af4+000726  .mcal_code       Scc_Drv.o
00003f60+000168  .ghtws.mcal_code -> .ghtws.text  Scc_Drv.o
0000089c+000078  .ghrettbl        Scc_Drv.o
000013d4+000084  .ghcalltbl       Scc_Drv.o
1ffe2148+00000c  .mcal_bss        Scc_Drv.o
00004da0+0001c6  .debug_abbrev    Scc_Drv.o
00000000+001d51  .debug_str       Scc_Drv.o
00043b0e+002b34  .debug_info      Scc_Drv.o
000233a1+000b52  .debug_line      Scc_Drv.o
00074293+001542  .debug_macinfo   Scc_Drv.o
00008ee0+000420  .debug_frame     Scc_Drv.o
000100a5+000289  .debug_loc       Scc_Drv.o
0001121c+00034c  .mcal_code       Scm_Mcu_Drv.o
00015d34+00001c  .mcal_const      Scm_Mcu_Drv.o
000040c8+000090  .ghtws.mcal_code -> .ghtws.text  Scm_Mcu_Drv.o
00000914+000030  .ghrettbl        Scm_Mcu_Drv.o
00001458+000060  .ghcalltbl       Scm_Mcu_Drv.o
00004f66+00015e  .debug_abbrev    Scm_Mcu_Drv.o
00000000+0012e7  .debug_str       Scm_Mcu_Drv.o
00046642+001aeb  .debug_info      Scm_Mcu_Drv.o
00023ef3+000575  .debug_line      Scm_Mcu_Drv.o
000757d5+001476  .debug_macinfo   Scm_Mcu_Drv.o
00009300+0001b0  .debug_frame     Scm_Mcu_Drv.o
0001032e+00013b  .debug_loc       Scm_Mcu_Drv.o
00011568+000294  .mcal_code       Srmc_Drv.o
00004158+0000c0  .ghtws.mcal_code -> .ghtws.text  Srmc_Drv.o
00000944+000040  .ghrettbl        Srmc_Drv.o
000014b8+00004c  .ghcalltbl       Srmc_Drv.o
000050c4+00019b  .debug_abbrev    Srmc_Drv.o
00000000+000e06  .debug_str       Srmc_Drv.o
0004812d+001574  .debug_info      Srmc_Drv.o
00024468+000689  .debug_line      Srmc_Drv.o
00076c4b+001575  .debug_macinfo   Srmc_Drv.o
000094b0+0002a0  .debug_frame     Srmc_Drv.o
00010469+000248  .debug_loc       Srmc_Drv.o
000117fc+00007e  .mcal_code       Port.o
00004218+000018  .ghtws.mcal_code -> .ghtws.text  Port.o
00001504+000010  .ghcalltbl       Port.o
00000984+000008  .ghrettbl        Port.o
1ffe2154+000004  .mcal_bss        Port.o
0000525f+00019a  .debug_abbrev    Port.o
00000000+000b90  .debug_str       Port.o
000496a1+000d15  .debug_info      Port.o
00024af1+0005ce  .debug_line      Port.o
000781c0+001ba3  .debug_macinfo   Port.o
00009750+000180  .debug_frame     Port.o
000106b1+000284  .debug_loc       Port.o
0001187a+000270  .mcal_code       Port_Drv.o
00015d50+00003c  .mcal_const      Port_Drv.o
00004230+000054  .ghtws.mcal_code -> .ghtws.text  Port_Drv.o
00001514+000024  .ghcalltbl       Port_Drv.o
0000098c+00001c  .ghrettbl        Port_Drv.o
000053f9+000164  .debug_abbrev    Port_Drv.o
00000000+000975  .debug_str       Port_Drv.o
0004a3b6+000c65  .debug_info      Port_Drv.o
000250bf+000469  .debug_line      Port_Drv.o
00079d63+001454  .debug_macinfo   Port_Drv.o
000098d0+000150  .debug_frame     Port_Drv.o
00010935+0002ff  .debug_loc       Port_Drv.o
00011aea+0000aa  .mcal_code       Port_Drvw.o
00004284+000018  .ghtws.mcal_code -> .ghtws.text  Port_Drvw.o
00001538+000020  .ghcalltbl       Port_Drvw.o
000009a8+000008  .ghrettbl        Port_Drvw.o
0000555d+00013f  .debug_abbrev    Port_Drvw.o
00000000+000d5e  .debug_str       Port_Drvw.o
0004b01b+000d0f  .debug_info      Port_Drvw.o
00025528+000469  .debug_line      Port_Drvw.o
0007b1b7+00163e  .debug_macinfo   Port_Drvw.o
00009a20+000138  .debug_frame     Port_Drvw.o
00010c34+0002db  .debug_loc       Port_Drvw.o
00011b94+00006a  .mcal_code       Dio.o
0000429c+00000c  .ghtws.mcal_code -> .ghtws.text  Dio.o
00001558+000008  .ghcalltbl       Dio.o
000009b0+000004  .ghrettbl        Dio.o
0000569c+00017b  .debug_abbrev    Dio.o
00000000+000615  .debug_str       Dio.o
0004bd2a+00093c  .debug_info      Dio.o
00025991+0004b3  .debug_line      Dio.o
0007c7f5+00180d  .debug_macinfo   Dio.o
00009b58+000168  .debug_frame     Dio.o
00010f0f+0001e5  .debug_loc       Dio.o
00011bfe+000014  .mcal_code       Dio_Drvw.o
000042a8+00000c  .ghtws.mcal_code -> .ghtws.text  Dio_Drvw.o
00001560+000004  .ghcalltbl       Dio_Drvw.o
000009b4+000004  .ghrettbl        Dio_Drvw.o
00005817+00013a  .debug_abbrev    Dio_Drvw.o
00000000+0003d3  .debug_str       Dio_Drvw.o
0004c666+00061d  .debug_info      Dio_Drvw.o
00025e44+0003be  .debug_line      Dio_Drvw.o
0007e002+00109c  .debug_macinfo   Dio_Drvw.o
00009cc0+000150  .debug_frame     Dio_Drvw.o
000110f4+000284  .debug_loc       Dio_Drvw.o
00011c12+00002e  .mcal_code       Gpio_Drv.o
00015d8c+000014  .mcal_const      Gpio_Drv.o
000042b4+00000c  .ghtws.mcal_code -> .ghtws.text  Gpio_Drv.o
000009b8+000004  .ghrettbl        Gpio_Drv.o
00001564+000008  .ghcalltbl       Gpio_Drv.o
00005951+000155  .debug_abbrev    Gpio_Drv.o
00000000+0002bb  .debug_str       Gpio_Drv.o
0004cc83+000523  .debug_info      Gpio_Drv.o
00026202+000415  .debug_line      Gpio_Drv.o
0007f09e+001092  .debug_macinfo   Gpio_Drv.o
00009e10+000150  .debug_frame     Gpio_Drv.o
00011378+000222  .debug_loc       Gpio_Drv.o
0001262c+0001e0  .mcal_config_data Adc_Drv_PBcfg.o
00005aa6+0000d8  .debug_abbrev    Adc_Drv_PBcfg.o
00000000+000851  .debug_str       Adc_Drv_PBcfg.o
0004d1a6+00067d  .debug_info      Adc_Drv_PBcfg.o
00026617+0002a2  .debug_line      Adc_Drv_PBcfg.o
00080130+00120d  .debug_macinfo   Adc_Drv_PBcfg.o
0001280c+0001c8  .mcal_config_data Adc_PBcfg.o
1ffe2158+000014  .mcal_bss        Adc_PBcfg.o
00005b7e+0000f4  .debug_abbrev    Adc_PBcfg.o
00000000+0013a9  .debug_str       Adc_PBcfg.o
0004d823+001022  .debug_info      Adc_PBcfg.o
000268b9+0003e6  .debug_line      Adc_PBcfg.o
0008133d+002545  .debug_macinfo   Adc_PBcfg.o
000129d4+000064  .mcal_config_data Can_Drv_PBcfg.o
00005c72+0000f0  .debug_abbrev    Can_Drv_PBcfg.o
00000000+0009d7  .debug_str       Can_Drv_PBcfg.o
0004e845+00082a  .debug_info      Can_Drv_PBcfg.o
00026c9f+00037d  .debug_line      Can_Drv_PBcfg.o
00083882+00180c  .debug_macinfo   Can_Drv_PBcfg.o
00012a38+000184  .mcal_config_data Can_PBcfg.o
1ffe2180+000060  .mcal_bss        Can_PBcfg.o
00005d62+000103  .debug_abbrev    Can_PBcfg.o
00000000+000ff3  .debug_str       Can_PBcfg.o
0004f06f+000f8b  .debug_info      Can_PBcfg.o
0002701c+00039c  .debug_line      Can_PBcfg.o
0008508e+001de8  .debug_macinfo   Can_PBcfg.o
00012bbc+000084  .mcal_config_data CDD_Dma_PBcfg.o
00005e65+0000eb  .debug_abbrev    CDD_Dma_PBcfg.o
00000000+000f5c  .debug_str       CDD_Dma_PBcfg.o
0004fffa+000a51  .debug_info      CDD_Dma_PBcfg.o
000273b8+000346  .debug_line      CDD_Dma_PBcfg.o
00086e76+001a01  .debug_macinfo   CDD_Dma_PBcfg.o
00012c40+0002d0  .mcal_config_data Dio_Cfg.o
00005f50+00008f  .debug_abbrev    Dio_Cfg.o
00000000+00020d  .debug_str       Dio_Cfg.o
00050a4b+00021d  .debug_info      Dio_Cfg.o
000276fe+0002f5  .debug_line      Dio_Cfg.o
00088877+001377  .debug_macinfo   Dio_Cfg.o
1ffe0880+00004c  .bss             Dma_Drv_PBcfg.o
00012f10+000067  .mcal_config_data Dma_Drv_PBcfg.o
1ffe054c+000050  .mcal_data       Dma_Drv_PBcfg.o
00005fdf+0000af  .debug_abbrev    Dma_Drv_PBcfg.o
00000000+000ffe  .debug_str       Dma_Drv_PBcfg.o
00050c68+000a1b  .debug_info      Dma_Drv_PBcfg.o
000279f3+0002a2  .debug_line      Dma_Drv_PBcfg.o
00089bee+001350  .debug_macinfo   Dma_Drv_PBcfg.o
00012f78+000010  .mcal_config_data Flash_Drv_PBcfg.o
0000608e+00007e  .debug_abbrev    Flash_Drv_PBcfg.o
00000000+00012d  .debug_str       Flash_Drv_PBcfg.o
00051683+0000d9  .debug_info      Flash_Drv_PBcfg.o
00027c95+0002b2  .debug_line      Flash_Drv_PBcfg.o
0008af3e+000fc0  .debug_macinfo   Flash_Drv_PBcfg.o
00012f88+000010  .mcal_config_data Fls_Drvw_PBcfg.o
0000610c+00009a  .debug_abbrev    Fls_Drvw_PBcfg.o
00000000+0001cc  .debug_str       Fls_Drvw_PBcfg.o
0005175c+00018f  .debug_info      Fls_Drvw_PBcfg.o
00027f47+000334  .debug_line      Fls_Drvw_PBcfg.o
0008befe+001597  .debug_macinfo   Fls_Drvw_PBcfg.o
00012f98+00005c  .mcal_config_data Fls_PBcfg.o
000061a6+0000d2  .debug_abbrev    Fls_PBcfg.o
00000000+0003d4  .debug_str       Fls_PBcfg.o
000518eb+0003e6  .debug_info      Fls_PBcfg.o
0002827b+000395  .debug_line      Fls_PBcfg.o
0008d495+001965  .debug_macinfo   Fls_PBcfg.o
00012ff4+00005c  .mcal_config_data Gpt_Drvw_PBcfg.o
00006278+0000d2  .debug_abbrev    Gpt_Drvw_PBcfg.o
00000000+0007c4  .debug_str       Gpt_Drvw_PBcfg.o
00051cd1+000681  .debug_info      Gpt_Drvw_PBcfg.o
00028610+000497  .debug_line      Gpt_Drvw_PBcfg.o
0008edfa+002051  .debug_macinfo   Gpt_Drvw_PBcfg.o
00013050+0000b0  .mcal_config_data Gpt_PBcfg.o
0000634a+0000f4  .debug_abbrev    Gpt_PBcfg.o
00000000+000aab  .debug_str       Gpt_PBcfg.o
00052352+0009cc  .debug_info      Gpt_PBcfg.o
00028aa7+0004cb  .debug_line      Gpt_PBcfg.o
00090e4b+00238e  .debug_macinfo   Gpt_PBcfg.o
00013100+0009a4  .mcal_config_data Interrupt_Drv_Cfg.o
0000643e+0000cf  .debug_abbrev    Interrupt_Drv_Cfg.o
00000000+0010a9  .debug_str       Interrupt_Drv_Cfg.o
00052d1e+000baa  .debug_info      Interrupt_Drv_Cfg.o
00028f72+000339  .debug_line      Interrupt_Drv_Cfg.o
000931d9+001335  .debug_macinfo   Interrupt_Drv_Cfg.o
00013aa4+00000c  .mcal_config_data McalLib_Cfg.o
0000650d+00008f  .debug_abbrev    McalLib_Cfg.o
00000000+0000d6  .debug_str       McalLib_Cfg.o
000538c8+0000c4  .debug_info      McalLib_Cfg.o
000292ab+0001c5  .debug_line      McalLib_Cfg.o
0009450e+000929  .debug_macinfo   McalLib_Cfg.o
00013ab0+0000a0  .mcal_config_data Mcpwm_Pwm_Drv_PBcfg.o
0000659c+0000b6  .debug_abbrev    Mcpwm_Pwm_Drv_PBcfg.o
00000000+00067a  .debug_str       Mcpwm_Pwm_Drv_PBcfg.o
0005398c+000541  .debug_info      Mcpwm_Pwm_Drv_PBcfg.o
00029470+0002c0  .debug_line      Mcpwm_Pwm_Drv_PBcfg.o
00094e37+001128  .debug_macinfo   Mcpwm_Pwm_Drv_PBcfg.o
00013b50+00001c  .mcal_config_data Mcu_Drvw_PBcfg.o
00006652+0000c9  .debug_abbrev    Mcu_Drvw_PBcfg.o
00000000+0016b7  .debug_str       Mcu_Drvw_PBcfg.o
00053ecd+000fef  .debug_info      Mcu_Drvw_PBcfg.o
00029730+00069b  .debug_line      Mcu_Drvw_PBcfg.o
00095f5f+003572  .debug_macinfo   Mcu_Drvw_PBcfg.o
00013b6c+00002c  .mcal_config_data Mcu_PBcfg.o
0000671b+0000c9  .debug_abbrev    Mcu_PBcfg.o
00000000+0017b7  .debug_str       Mcu_PBcfg.o
00054ebc+00115f  .debug_info      Mcu_PBcfg.o
00029dcb+00061b  .debug_line      Mcu_PBcfg.o
000994d1+002d87  .debug_macinfo   Mcu_PBcfg.o
00013b98+0002c8  .mcal_config_data Parcc_Drv_PBcfg.o
000067e4+0000af  .debug_abbrev    Parcc_Drv_PBcfg.o
00000000+00074e  .debug_str       Parcc_Drv_PBcfg.o
0005601b+000497  .debug_info      Parcc_Drv_PBcfg.o
0002a3e6+0002ac  .debug_line      Parcc_Drv_PBcfg.o
0009c258+000fb6  .debug_macinfo   Parcc_Drv_PBcfg.o
00013e60+000004  .mcal_config_data Platform_Cfg.o
00006893+0000b1  .debug_abbrev    Platform_Cfg.o
00000000+000e79  .debug_str       Platform_Cfg.o
000564b2+000a0a  .debug_info      Platform_Cfg.o
0002a692+0003c4  .debug_line      Platform_Cfg.o
0009d20e+001856  .debug_macinfo   Platform_Cfg.o
00013e64+000014  .mcal_config_data Pmu_Drv_PBcfg.o
00006944+00007e  .debug_abbrev    Pmu_Drv_PBcfg.o
00000000+000187  .debug_str       Pmu_Drv_PBcfg.o
00056ebc+000114  .debug_info      Pmu_Drv_PBcfg.o
0002aa56+0002a2  .debug_line      Pmu_Drv_PBcfg.o
0009ea64+000ea6  .debug_macinfo   Pmu_Drv_PBcfg.o
000069c2+000018  .debug_abbrev    Port_Cfg.o
00000000+000067  .debug_str       Port_Cfg.o
00056fd0+00002c  .debug_info      Port_Cfg.o
0002acf8+000324  .debug_line      Port_Cfg.o
0009f90a+001324  .debug_macinfo   Port_Cfg.o
00013e78+0008c0  .mcal_config_data Port_Drv_PBcfg.o
000069da+0000a8  .debug_abbrev    Port_Drv_PBcfg.o
00000000+00058b  .debug_str       Port_Drv_PBcfg.o
00056ffc+0003fa  .debug_info      Port_Drv_PBcfg.o
0002b01c+00023f  .debug_line      Port_Drv_PBcfg.o
000a0c2e+000c8a  .debug_macinfo   Port_Drv_PBcfg.o
00014738+00038c  .mcal_config_data Port_Drvw_PBcfg.o
00006a82+0000c2  .debug_abbrev    Port_Drvw_PBcfg.o
00000000+00083f  .debug_str       Port_Drvw_PBcfg.o
000573f6+0006b0  .debug_info      Port_Drvw_PBcfg.o
0002b25b+0002ee  .debug_line      Port_Drvw_PBcfg.o
000a18b8+001489  .debug_macinfo   Port_Drvw_PBcfg.o
00014ac4+00012d  .mcal_config_data Port_PBcfg.o
00006b44+0000c2  .debug_abbrev    Port_PBcfg.o
00000000+000867  .debug_str       Port_PBcfg.o
00057aa6+000714  .debug_info      Port_PBcfg.o
0002b549+000355  .debug_line      Port_PBcfg.o
000a2d41+0018d2  .debug_macinfo   Port_PBcfg.o
00014bf4+000144  .mcal_config_data Pwm_Drvw_PBcfg.o
00006c06+0000c9  .debug_abbrev    Pwm_Drvw_PBcfg.o
00000000+000da8  .debug_str       Pwm_Drvw_PBcfg.o
000581ba+000adb  .debug_info      Pwm_Drvw_PBcfg.o
0002b89e+000417  .debug_line      Pwm_Drvw_PBcfg.o
000a4613+002a6e  .debug_macinfo   Pwm_Drvw_PBcfg.o
00014d38+000118  .mcal_config_data Pwm_PBcfg.o
00006ccf+0000d2  .debug_abbrev    Pwm_PBcfg.o
00000000+000d9d  .debug_str       Pwm_PBcfg.o
00058c95+000b94  .debug_info      Pwm_PBcfg.o
0002bcb5+000444  .debug_line      Pwm_PBcfg.o
000a7081+0027fb  .debug_macinfo   Pwm_PBcfg.o
00006da1+000018  .debug_abbrev    Ram_Drv_PBcfg.o
00000000+00006c  .debug_str       Ram_Drv_PBcfg.o
00059829+00002c  .debug_info      Ram_Drv_PBcfg.o
0002c0f9+0002a2  .debug_line      Ram_Drv_PBcfg.o
000a987c+000d62  .debug_macinfo   Ram_Drv_PBcfg.o
00006db9+000018  .debug_abbrev    Rtc_Drv_PBcfg.o
00000000+00006c  .debug_str       Rtc_Drv_PBcfg.o
00059855+00002c  .debug_info      Rtc_Drv_PBcfg.o
0002c39b+0002ce  .debug_line      Rtc_Drv_PBcfg.o
000aa5de+000ec6  .debug_macinfo   Rtc_Drv_PBcfg.o
00014e50+000058  .mcal_config_data Scc_Drv_PBcfg.o
00006dd1+0000cf  .debug_abbrev    Scc_Drv_PBcfg.o
00000000+00078e  .debug_str       Scc_Drv_PBcfg.o
00059881+00057b  .debug_info      Scc_Drv_PBcfg.o
0002c669+0002a2  .debug_line      Scc_Drv_PBcfg.o
000ab4a4+000ee3  .debug_macinfo   Scc_Drv_PBcfg.o
00014ea8+000040  .mcal_config_data Scm_Mcu_Drv_PBcfg.o
00006ea0+0000a8  .debug_abbrev    Scm_Mcu_Drv_PBcfg.o
00000000+000530  .debug_str       Scm_Mcu_Drv_PBcfg.o
00059dfc+000388  .debug_info      Scm_Mcu_Drv_PBcfg.o
0002c90b+0002b6  .debug_line      Scm_Mcu_Drv_PBcfg.o
000ac387+000f79  .debug_macinfo   Scm_Mcu_Drv_PBcfg.o
00014ee8+000040  .mcal_config_data Spi_Drv_PBcfg.o
00006f48+0000c2  .debug_abbrev    Spi_Drv_PBcfg.o
00000000+0002c0  .debug_str       Spi_Drv_PBcfg.o
0005a184+00025d  .debug_info      Spi_Drv_PBcfg.o
0002cbc1+0002a2  .debug_line      Spi_Drv_PBcfg.o
000ad300+001172  .debug_macinfo   Spi_Drv_PBcfg.o
00014f28+000068  .mcal_config_data Spi_Drvw_PBcfg.o
0000700a+0000c2  .debug_abbrev    Spi_Drvw_PBcfg.o
00000000+0004a9  .debug_str       Spi_Drvw_PBcfg.o
0005a3e1+0003f2  .debug_info      Spi_Drvw_PBcfg.o
0002ce63+00034b  .debug_line      Spi_Drvw_PBcfg.o
000ae472+001904  .debug_macinfo   Spi_Drvw_PBcfg.o
00014f90+0001ac  .mcal_config_data Spi_PBcfg.o
1ffe21e0+000020  .mcal_bss        Spi_PBcfg.o
000070cc+0000e2  .debug_abbrev    Spi_PBcfg.o
00000000+000c5b  .debug_str       Spi_PBcfg.o
0005a7d3+000cec  .debug_info      Spi_PBcfg.o
0002d1ae+0003ae  .debug_line      Spi_PBcfg.o
000afd76+0020f2  .debug_macinfo   Spi_PBcfg.o
0001513c+000028  .mcal_config_data Srmc_Drv_PBcfg.o
000071ae+000090  .debug_abbrev    Srmc_Drv_PBcfg.o
00000000+0002ca  .debug_str       Srmc_Drv_PBcfg.o
0005b4bf+0001cb  .debug_info      Srmc_Drv_PBcfg.o
0002d55c+0002a7  .debug_line      Srmc_Drv_PBcfg.o
000b1e68+001868  .debug_macinfo   Srmc_Drv_PBcfg.o
00015164+000050  .mcal_config_data Stim_Drv_PBcfg.o
0000723e+0000d8  .debug_abbrev    Stim_Drv_PBcfg.o
00000000+0002c5  .debug_str       Stim_Drv_PBcfg.o
0005b68a+00021b  .debug_info      Stim_Drv_PBcfg.o
0002d803+0002d3  .debug_line      Stim_Drv_PBcfg.o
000b36d0+001102  .debug_macinfo   Stim_Drv_PBcfg.o
000151b4+0000cc  .mcal_config_data Tdg_Adc_Drv_PBcfg.o
00007316+0000c8  .debug_abbrev    Tdg_Adc_Drv_PBcfg.o
00000000+000862  .debug_str       Tdg_Adc_Drv_PBcfg.o
0005b8a5+000634  .debug_info      Tdg_Adc_Drv_PBcfg.o
0002dad6+0002b6  .debug_line      Tdg_Adc_Drv_PBcfg.o
000b47d2+0011fb  .debug_macinfo   Tdg_Adc_Drv_PBcfg.o
000073de+000018  .debug_abbrev    Tim_Drv_PBcfg.o
00000000+00006c  .debug_str       Tim_Drv_PBcfg.o
0005bed9+00002c  .debug_info      Tim_Drv_PBcfg.o
0002dd8c+0002ce  .debug_line      Tim_Drv_PBcfg.o
000b59cd+000ea2  .debug_macinfo   Tim_Drv_PBcfg.o
00015280+000250  .mcal_config_data Tim_Pwm_Drv_PBcfg.o
000073f6+0000b6  .debug_abbrev    Tim_Pwm_Drv_PBcfg.o
00000000+000765  .debug_str       Tim_Pwm_Drv_PBcfg.o
0005bf05+0005d9  .debug_info      Tim_Pwm_Drv_PBcfg.o
0002e05a+0002b6  .debug_line      Tim_Pwm_Drv_PBcfg.o
000b686f+001476  .debug_macinfo   Tim_Pwm_Drv_PBcfg.o
000074ac+000018  .debug_abbrev    Tmu_Drv_Cfg.o
00000000+00006a  .debug_str       Tmu_Drv_Cfg.o
0005c4de+00002c  .debug_info      Tmu_Drv_Cfg.o
0002e310+00028b  .debug_line      Tmu_Drv_Cfg.o
000b7ce5+000b9e  .debug_macinfo   Tmu_Drv_Cfg.o
000154d0+000028  .mcal_config_data Wdg_Drvw_PBcfg.o
000074c4+0000c9  .debug_abbrev    Wdg_Drvw_PBcfg.o
00000000+0002f8  .debug_str       Wdg_Drvw_PBcfg.o
0005c50a+0002c9  .debug_info      Wdg_Drvw_PBcfg.o
0002e59b+0003df  .debug_line      Wdg_Drvw_PBcfg.o
000b8883+001664  .debug_macinfo   Wdg_Drvw_PBcfg.o
000154f8+000008  .mcal_config_data Wdg_PBcfg.o
0000758d+0000c9  .debug_abbrev    Wdg_PBcfg.o
00000000+0002d1  .debug_str       Wdg_PBcfg.o
0005c7d3+0002de  .debug_info      Wdg_PBcfg.o
0002e97a+000441  .debug_line      Wdg_PBcfg.o
000b9ee7+0018a3  .debug_macinfo   Wdg_PBcfg.o
00015500+000030  .mcal_config_data Wdog_Drv_PBcfg.o
00007656+00009e  .debug_abbrev    Wdog_Drv_PBcfg.o
00000000+0001ed  .debug_str       Wdog_Drv_PBcfg.o
0005cab1+0001aa  .debug_info      Wdog_Drv_PBcfg.o
0002edbb+00030b  .debug_line      Wdog_Drv_PBcfg.o
000bb78a+000feb  .debug_macinfo   Wdog_Drv_PBcfg.o
00001954+00000c  .text            SPIDev.o
0000267c+00000c  .ghtws.text      SPIDev.o
0000156c+000008  .ghcalltbl       SPIDev.o
000009bc+000004  .ghrettbl        SPIDev.o
000076f4+00006f  .debug_abbrev    SPIDev.o
00000000+000094  .debug_str       SPIDev.o
0005cc5b+00007e  .debug_info      SPIDev.o
0002f0c6+0005c5  .debug_line      SPIDev.o
000bc775+002382  .debug_macinfo   SPIDev.o
00009f60+0000a8  .debug_frame     SPIDev.o
1ffe0514+000010  .data            can_func.o
1ffe08cc+000034  .bss             can_func.o
00011c40+000286  .mcal_code       can_func.o
000042c0+0000c0  .ghtws.mcal_code -> .ghtws.text  can_func.o
000009c0+000040  .ghrettbl        can_func.o
00001574+000038  .ghcalltbl       can_func.o
00007763+0001be  .debug_abbrev    can_func.o
00000000+00081a  .debug_str       can_func.o
0005ccd9+000d3c  .debug_info      can_func.o
0002f68b+001e96  .debug_line      can_func.o
000beaf7+00c272  .debug_macinfo   can_func.o
0000a008+0002b8  .debug_frame     can_func.o
0001159a+000220  .debug_loc       can_func.o
1ffe0524+000004  .data            cmbCallBack.o
1ffe0900+000004  .bss             cmbCallBack.o
00007921+000076  .debug_abbrev    cmbCallBack.o
00000000+000077  .debug_str       cmbCallBack.o
0005da15+000086  .debug_info      cmbCallBack.o
00031521+000098  .debug_line      cmbCallBack.o
000cad69+00002b  .debug_macinfo   cmbCallBack.o
0000a2c0+0000a8  .debug_frame     cmbCallBack.o
00001960+000124  .text            func.o
1ffe0904+00003e  .bss             func.o
00002688+000048  .ghtws.text      func.o
000015ac+000080  .ghcalltbl       func.o
00000a00+000018  .ghrettbl        func.o
00007997+000151  .debug_abbrev    func.o
00000000+001ef5  .debug_str       func.o
0005da9b+001c4d  .debug_info      func.o
000315b9+0019ca  .debug_line      func.o
000cad94+00bdcf  .debug_macinfo   func.o
0000a368+000120  .debug_frame     func.o
000117ba+000013  .debug_loc       func.o
00001a84+00009e  .text            main.o
000026d0+00003c  .ghtws.text      main.o
00000a18+000014  .ghrettbl        main.o
0000162c+000054  .ghcalltbl       main.o
00007ae8+000184  .debug_abbrev    main.o
00000000+00542b  .debug_str       main.o
0005f6e8+00439b  .debug_info      main.o
00032f83+001c86  .debug_line      main.o
000d6b63+00bd9d  .debug_macinfo   main.o
0000a488+000150  .debug_frame     main.o
000117cd+000039  .debug_loc       main.o
00001b22+0001d8  .text            spi_func.o
1ffe0528+000024  .data            spi_func.o
1ffe0944+000014  .bss             spi_func.o
0000270c+0000e4  .ghtws.text      spi_func.o
00001680+000040  .ghcalltbl       spi_func.o
00000a2c+00004c  .ghrettbl        spi_func.o
000125eb+000012  .rodata          spi_func.o
00007c6c+0001c1  .debug_abbrev    spi_func.o
00000000+000e93  .debug_str       spi_func.o
00063a83+0012c5  .debug_info      spi_func.o
00034c09+001ef6  .debug_line      spi_func.o
000e2900+00c0ac  .debug_macinfo   spi_func.o
0000a5d8+000288  .debug_frame     spi_func.o
00011806+0000f2  .debug_loc       spi_func.o
00011ec6+000190  .mcal_code       Wdg.o
1ffe059c+000004  .mcal_data       Wdg.o
00004380+000054  .ghtws.mcal_code -> .ghtws.text  Wdg.o
000016c0+000048  .ghcalltbl       Wdg.o
00000a78+00001c  .ghrettbl        Wdg.o
1ffe2200+000004  .mcal_bss        Wdg.o
00007e2d+0001b0  .debug_abbrev    Wdg.o
00000000+000565  .debug_str       Wdg.o
00064d48+000801  .debug_info      Wdg.o
00036aff+00061f  .debug_line      Wdg.o
000ee9ac+001e34  .debug_macinfo   Wdg.o
0000a860+000150  .debug_frame     Wdg.o
000118f8+00012b  .debug_loc       Wdg.o
00012056+000062  .mcal_code       Wdg_Drvw.o
000043d4+000024  .ghtws.mcal_code -> .ghtws.text  Wdg_Drvw.o
00001708+000014  .ghcalltbl       Wdg_Drvw.o
00000a94+00000c  .ghrettbl        Wdg_Drvw.o
00007fdd+000172  .debug_abbrev    Wdg_Drvw.o
00000000+0003ae  .debug_str       Wdg_Drvw.o
00065549+000456  .debug_info      Wdg_Drvw.o
0003711e+000479  .debug_line      Wdg_Drvw.o
000f07e0+00165e  .debug_macinfo   Wdg_Drvw.o
0000a9b0+0000d8  .debug_frame     Wdg_Drvw.o
00011a23+000098  .debug_loc       Wdg_Drvw.o
000120b8+00026c  .mcal_code       Wdog_Drv.o
000043f8+00003c  .ghtws.mcal_code -> .ghtws.text  Wdog_Drv.o
00000aa0+000014  .ghrettbl        Wdog_Drv.o
1ffe2204+000004  .mcal_bss        Wdog_Drv.o
0000171c+00003c  .ghcalltbl       Wdog_Drv.o
000125fd+00002a  .rodata          Wdog_Drv.o
0000814f+0001c9  .debug_abbrev    Wdog_Drv.o
00000000+000562  .debug_str       Wdog_Drv.o
0006599f+0008cf  .debug_info      Wdog_Drv.o
00037597+000625  .debug_line      Wdog_Drv.o
000f1e3e+001a4f  .debug_macinfo   Wdog_Drv.o
0000aa88+000138  .debug_frame     Wdog_Drv.o
00011abb+0001bc  .debug_loc       Wdog_Drv.o
00008318+00006b  .debug_abbrev    Wdog_Drv_Irq.o
00000000+0000a1  .debug_str       Wdog_Drv_Irq.o
0006626e+000067  .debug_info      Wdog_Drv_Irq.o
00037bbc+000334  .debug_line      Wdog_Drv_Irq.o
000f388d+0010d2  .debug_macinfo   Wdog_Drv_Irq.o
0000abc0+0000a8  .debug_frame     Wdog_Drv_Irq.o
00001cfc+000010  .text            libmulti.a
1ffe0958+000418  .bss             libmulti.a
000027f0+000018  .ghtws.text      libmulti.a
00012628+000004  .rodata          libmulti.a
00000ab4+000008  .ghrettbl        libmulti.a
00001d0c+000088  .text            libstartup.a(ind_mset.o)
00000abc+000004  .ghrettbl        libstartup.a(ind_mset.o)
00000000+000004  .ghtailcalltbl   libstartup.a(ind_mset.o)
00001d94+0004f4  .text            libarch.a(ind64_udiv64.o)
00001758+000008  .ghcalltbl       libarch.a(ind64_udiv64.o)
00000ac0+000010  .ghrettbl        libarch.a(ind64_udiv64.o)
00000004+000004  .ghtailcalltbl   libarch.a(ind64_udiv64.o)
00002288+0000c6  .text            libarch.a(indarchi.o)
00000ad0+000004  .ghrettbl        libarch.a(indarchi.o)
0000234e+00002c  .text            libarch.a(ind64shrl.o)
00000ad4+000008  .ghrettbl        libarch.a(ind64shrl.o)
00000000+000024  .rominfo         <ROM info>
0000237c+000024  .ghtws.text      <ghtws header>

Load Map Mon May 12 00:27:27 2025
Global Symbols (sorted numerically)

                  00000000+000112 Adc_DeInit
                  00000000+000098 Adc_DisableGroupNotification
                  00000000+000126 Adc_DisableHardwareTrigger
                  00000000+0000a8 Adc_Drv_Calibrate
                  00000000+000060 Adc_Drv_DeInit
                  00000000+000020 Adc_Drv_DisableDma
                  00000000+000026 Adc_Drv_GetConvCompleteFlag
                  00000000+00001e Adc_Drv_GetDataAddress
                  00000000+0000a0 Adc_Drv_SelfTest
                  00000000+000036 Adc_Drv_StopConversion
                  00000000+00019e Adc_EnableHardwareTrigger
                  00000000+000072 Adc_GetGroupStatus
                  00000000+0001d4 Adc_GetStreamLastPointer
                  00000000+000028 Adc_GetVersionInfo
                  00000000+000220 Adc_ReadGroup
                  00000000+000126 Adc_SelfTest
                  00000000+000266 Adc_StopGroupConversion
                  00000000+000002 CAN1_FIFO_DMA_ErrNotifyFunc
                  00000000+000002 CanIf_ControllerErrorStatePassive
                  00000000+000050 Can_AbortHwObjectSend
                  00000000+000024 Can_CancelTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+000034 Can_CheckAbortHwObjectSend..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+000070 Can_CheckDeinit..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+000018 Can_CheckGetControllerErrorCounter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+000018 Can_CheckGetControllerErrorState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+000018 Can_CheckGetControllerMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+000018 Can_CheckGetVersionInfo..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+000068 Can_DeInit
                  00000000+000050 Can_DisableControllerInterrupts
                  00000000+000052 Can_Drv_BusOffMainFunction
                  00000000+00002c Can_Drv_CheckStartedMode
                  00000000+000022 Can_Drv_CheckStoppedMode
                  00000000+00000e Can_Drv_ClearMbIntStatus
                  00000000+000088 Can_Drv_ConfigFdDataBitTiming..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
                  00000000+00011a Can_Drv_Deinit
                  00000000+000040 Can_Drv_DisableSelfWakeup
                  00000000+000030 Can_Drv_EnableArbitrationFiledCompare
                  00000000+000048 Can_Drv_EnableSelfWakeup
                  00000000+00004c Can_Drv_FdErrorIntHandler
                  00000000+00001e Can_Drv_GetControllerErrorState
                  00000000+00001e Can_Drv_GetControllerRxErrorCounter
                  00000000+00001e Can_Drv_GetControllerTxErrorCounter
                  00000000+00005e Can_Drv_GetMbInterruptFlag
                  00000000+0000a6 Can_Drv_InjectAddress
                  00000000+000144 Can_Drv_InjectCorrectableAddress
                  00000000+0000fe Can_Drv_ReadMainFunction
                  00000000+00002a Can_Drv_SetFdArbBitTiming
                  00000000+000076 Can_Drv_SetFdArbitrationBitTiming..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
                  00000000+00002a Can_Drv_SetFdDataBitTiming
                  00000000+00004c Can_Drv_SetFdTdc
                  00000000+00002a Can_Drv_SetStdBitTiming
                  00000000+00004a Can_Drv_WakeupMainFunction
                  00000000+00004a Can_ExecutePollingMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+000040 Can_ExecutePollingRead..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+00004e Can_GetControllerErrorState
                  00000000+00003c Can_GetControllerMode
                  00000000+00004e Can_GetControllerRxErrorCounter
                  00000000+000054 Can_GetControllerState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+00004e Can_GetControllerTxErrorCounter
                  00000000+000024 Can_GetVersionInfo
                  00000000+00005e Can_InjectError
                  00000000+000002 Can_MainFunction_BusOff
                  00000000+00004c Can_MainFunction_Mode
                  00000000+000068 Can_MainFunction_Read
                  00000000+00007a Can_ProcessDisableControllerInterrupts..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+0000e2 Can_ProcessRxFifoReceive..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+000048 Can_ProcessRxNormalReceive..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
                  00000000+000008 CddSbc_DeInit
                  00000000+000008 CddSbc_GetCanMode
                  00000000+000008 CddSbc_GetCanUV
                  00000000+000048 CddSbc_GetResetReason
                  00000000+000008 CddSbc_GetWakeUpStatus
                  00000000+000008 CddSbc_Rou_DeInit
                  00000000+000008 CddSbc_Rou_GetCanMode
                  00000000+000008 CddSbc_Rou_GetCanUV
                  00000000+000008 CddSbc_Rou_GetSBCResetReason
                  00000000+000008 CddSbc_Rou_GetWakeUpStatus
                  00000000+000008 CddSbc_Rou_SetCanMode
                  00000000+000008 CddSbc_Rou_SetSleepMode
                  00000000+000008 CddSbc_Rou_SetWdgTimeoutModeAnd200ms
                  00000000+000008 CddSbc_Rou_SetWdgWindowModeAnd10ms
                  00000000+000008 CddSbc_SetCanMode
                  00000000+000008 CddSbc_SetSleepMode
                  00000000+000008 CddSbc_SetWdgTimeoutModeAnd200ms
                  00000000+000008 CddSbc_SetWdgWindowModeAnd10ms
                  00000000+00002c CddTle94x1_CbkSetCanMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
                  00000000+000002 CddTle94x1_DeInit
                  00000000+000038 CddTle94x1_GetCanMode
                  00000000+000032 CddTle94x1_GetCanUV
                  00000000+000014 CddTle94x1_GetSBCResetReason
                  00000000+00001c CddTle94x1_GetWakeUpStatus
                  00000000+000070 CddTle94x1_SetCanMode
                  00000000+0000be CddTle94x1_SetSleepMode
                  00000000+000048 CddTle94x1_SetWdgTimeoutModeAnd200ms
                  00000000+000046 CddTle94x1_SetWdgWindowModeAnd10ms
                  00000000+000086 CddTle94x1_SpiRx
                  00000000+00005e CddTle94x1_SpiTx
                  00000000+000022 CddTle94x1_ValidateCanMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
                  00000000+000134 Cdd_bd18397_SetCurrent_mA
                  00000000+000002 Det_Init
                  00000000+000004 Det_ReportTransientFault
                  00000000+000002 Det_Start
                  00000000+00002c Dio_Drvw_FlipChannel
                  00000000+000022 Dio_Drvw_MaskedWritePort
                  00000000+000018 Dio_Drvw_ReadChannel
                  00000000+000016 Dio_Drvw_ReadChannelGroup
                  00000000+00000e Dio_Drvw_ReadPort
                  00000000+000026 Dio_Drvw_WriteChannelGroup
                  00000000+000008 Dio_Drvw_WritePort
                  00000000+00006c Dio_FlipChannel
                  00000000+000028 Dio_GetVersionInfo
                  00000000+00005e Dio_MaskedWritePort
                  00000000+00006c Dio_ReadChannel
                  00000000+000072 Dio_ReadChannelGroup
                  00000000+00005c Dio_ReadPort
                  00000000+000070 Dio_WriteChannelGroup
                  00000000+00005a Dio_WritePort
                  00000000+00007e Dma_ClearIntStatus
                  00000000+0000b4 Dma_ConfigChannelGlobalParam
                  00000000+000098 Dma_ConfigChannelTransfer
                  00000000+000026 Dma_Drv_ClearDoneStatus
                  00000000+000028 Dma_Drv_ErrIrqHandler
                  00000000+00005c Dma_Drv_ErrorIntHandler
                  00000000+000018 Dma_Drv_GetAllChannelsErrorStatus
                  00000000+00001a Dma_Drv_GetBusyStatus
                  00000000+00001e Dma_Drv_GetChannelBusyStatus
                  00000000+000114 Dma_Drv_GetChannelGlobalConfig
                  00000000+0000ca Dma_Drv_GetChannelTransferConfig
                  00000000+00001e Dma_Drv_GetDoneStatus
                  00000000+00001a Dma_Drv_GetHaltStatus
                  00000000+00001c Dma_Drv_GetRestMinorLoopNum
                  00000000+00002c Dma_Drv_HaltControl
                  00000000+00005e Dma_Drv_SetDestAddr
                  00000000+00006c Dma_Drv_SetDestTransferSize
                  00000000+00006a Dma_Drv_SetDisableRequestAfterDone
                  00000000+000062 Dma_Drv_SetMajorLoopDestOffset
                  00000000+000060 Dma_Drv_SetMajorLoopSrcOffset
                  00000000+000062 Dma_Drv_SetMinorLoopDestOffset
                  00000000+000060 Dma_Drv_SetMinorLoopSrcOffset
                  00000000+00005e Dma_Drv_SetSourceAddr
                  00000000+00006c Dma_Drv_SetSourceTransferSize
                  00000000+000028 Dma_Drv_TriggerChannelStart
                  00000000+000052 Dma_GetChannelGlobalParam
                  00000000+00008c Dma_GetChannelStatus
                  00000000+000052 Dma_GetChannelTransferConfig
                  00000000+000034 Dma_GetHwModuleStatus
                  00000000+00002c Dma_GetVersionInfo
                  00000000+00001c Dma_Halt
                  00000000+000054 Dma_SetDestAddr
                  00000000+000054 Dma_SetSourceAddr
                  00000000+000052 Dma_TriggerChannelStartBySw
                  00000000+000064 Dma_UpdateErrorState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCDD_Dma.
                  00000000+000014 EcuM_SetWakeupEvent
                  00000000+000002 EcuM_ValidateWakeupEvent
                  00000000+000042 Ex_Can_UseCase_02
                  00000000+000054 Ex_Can_UseCase_03
                  00000000+00004e Ex_Can_UseCase_04
                  00000000+000096 Ex_Can_UseCase_05
                  00000000+000078 Flash_Drv_Abort
                  00000000+00003c Flash_Drv_BlankCheckData..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+000018 Flash_Drv_CallFinishNotif..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+000018 Flash_Drv_CallStartNotif..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+00002c Flash_Drv_CheckAddr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+00009a Flash_Drv_CheckBlank
                  00000000+000016 Flash_Drv_CheckReadParam..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+000028 Flash_Drv_CheckValidRange..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+000032 Flash_Drv_ClearCache..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+0000a4 Flash_Drv_Compare
                  00000000+000040 Flash_Drv_CompareData..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+00002e Flash_Drv_ComputeReadSize..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+00004c Flash_Drv_ConfigCommand..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+000060 Flash_Drv_EccIrqHandler
                  00000000+00005c Flash_Drv_EraseSector
                  00000000+00005e Flash_Drv_ExecuteCmd..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+000034 Flash_Drv_GetBlockNumFromAddr
                  00000000+000020 Flash_Drv_GetStatus..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+000048 Flash_Drv_IgnoreBusErrorConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+000066 Flash_Drv_Init
                  00000000+000040 Flash_Drv_PollEraseWriteStatus
                  00000000+00009c Flash_Drv_Read
                  00000000+000028 Flash_Drv_ReadData..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+00007c Flash_Drv_StartCmd..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+000052 Flash_Drv_Write
                  00000000+000060 Flash_Drv_WritePhrase..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
                  00000000+0000c2 Fls_BlankCheck
                  00000000+00005c Fls_Cancel
                  00000000+00004e Fls_CheckAddrAlignedPageEnd..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+00004e Fls_CheckAddrAlignedPageStart..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+00004e Fls_CheckAddrAlignedSectorEnd..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+00004c Fls_CheckAddrAlignedSectorStart..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000036 Fls_CheckJobResult..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+0000e0 Fls_Compare
                  00000000+000028 Fls_ConvertJobLogicAddrToPhyAddr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+0000a4 Fls_DoJobRead..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000010 Fls_Drvw_BlankCheckSector
                  00000000+000010 Fls_Drvw_Cancel
                  00000000+000016 Fls_Drvw_CompareSector
                  00000000+000048 Fls_Drvw_EraseSector
                  00000000+000016 Fls_Drvw_HandleAsyncEraseJob
                  00000000+00001a Fls_Drvw_HandleAsyncWriteJob
                  00000000+000008 Fls_Drvw_HandleEraseStatus..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls_Drvw.
                  00000000+000008 Fls_Drvw_HandleWriteStatus..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls_Drvw.
                  00000000+000022 Fls_Drvw_Init
                  00000000+000016 Fls_Drvw_ReadSector
                  00000000+000046 Fls_Drvw_TranslateReturnCode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls_Drvw.
                  00000000+000046 Fls_Drvw_WriteSector
                  00000000+0000bc Fls_Erase
                  00000000+000022 Fls_GetJobResult
                  00000000+00002a Fls_GetLogicStartAddr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+00002e Fls_GetSectorIndex..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000022 Fls_GetStatus
                  00000000+00009a Fls_HandleAsyncEraseJob..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000022 Fls_HandleAsyncJob..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+0000a2 Fls_HandleAsyncWriteJob..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000034 Fls_HandleEraseFault..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000018 Fls_HandleReadFault..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000046 Fls_HandleWriteFault..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+0000ac Fls_Init
                  00000000+00002e Fls_MainFunction
                  00000000+00001a Fls_ObtainRWEndAddr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000030 Fls_ObtainReadLength..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+00005a Fls_ObtainWriteLength..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000088 Fls_ProcessJobErase..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000086 Fls_ProcessJobRead..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+0000b6 Fls_ProcessJobWrite..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+000026 Fls_ProcessJobs..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
                  00000000+0000e0 Fls_Read
                  00000000+000052 Fls_SetMode
                  00000000+0000d8 Fls_Write
                  00000000+000010 Gpio_Drv_ClearPins
                  00000000+000014 Gpio_Drv_GetPinsOutput
                  00000000+00001e Gpio_Drv_ReadPin
                  00000000+000014 Gpio_Drv_ReadPins
                  00000000+000010 Gpio_Drv_SetPins
                  00000000+000010 Gpio_Drv_TogglePins
                  00000000+000010 Gpio_Drv_WritePort
                  00000000+0000ac Gpt_CheckWakeup
                  00000000+000162 Gpt_DeInit
                  00000000+0000d4 Gpt_DisableNotification
                  00000000+0000d8 Gpt_DisableWakeup
                  00000000+00001a Gpt_Drvw_DeInit
                  00000000+00001c Gpt_Drvw_DisableInterrupt
                  00000000+00003e Gpt_Drvw_GetPredefTimerValue
                  00000000+000014 Gpt_Drvw_StopPredefTimer
                  00000000+0000c0 Gpt_EnableWakeup
                  00000000+000138 Gpt_GetPredefTimerValue
                  00000000+0000ea Gpt_GetTimeElapsed
                  00000000+0000f2 Gpt_GetTimeRemaining
                  00000000+000028 Gpt_GetVersionInfo
                  00000000+000240 Gpt_SetMode
                  00000000+000002 InitCmb
                  00000000+000002 InitLEDPort
                  00000000+000002 InitWdt
                  00000000+000028 Interrupt_Drv_ClearPending
                  00000000+00003e Interrupt_Drv_GetPriority
                  00000000+00006a Interrupt_Drv_Init
                  00000000+000024 McalLib_OsCounter_SetCounterFreq
                  00000000+00000e McalLib_SetCounterFreq
                  00000000+00002a Mcpwm_Drv_0_ChIrqHandler
                  00000000+00002a Mcpwm_Drv_0_OverflowIrqHandler
                  00000000+00002a Mcpwm_Drv_1_ChIrqHandler
                  00000000+00002a Mcpwm_Drv_1_OverflowIrqHandler
                  00000000+00012c Mcpwm_Pwm_Drv_DeInit
                  00000000+000086 Mcpwm_Pwm_Drv_DisableNotification
                  00000000+00002a Mcpwm_Pwm_Drv_DisableTrigger
                  00000000+00016c Mcpwm_Pwm_Drv_EnableNotification
                  00000000+00002a Mcpwm_Pwm_Drv_EnableTrigger
                  00000000+00019a Mcpwm_Pwm_Drv_GetChannelDutyCycle
                  00000000+000012 Mcpwm_Pwm_Drv_GetChannelMode
                  00000000+000012 Mcpwm_Pwm_Drv_GetCurrentChannelState
                  00000000+000012 Mcpwm_Pwm_Drv_GetIdleState
                  00000000+000010 Mcpwm_Pwm_Drv_GetNotifFlag
                  00000000+0001e8 Mcpwm_Pwm_Drv_GetOutputState
                  00000000+000126 Mcpwm_Pwm_Drv_IsChannelOutputActive..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
                  00000000+000024 Mcpwm_Pwm_Drv_MaskOutputChannels
                  00000000+0000c0 Mcpwm_Pwm_Drv_ProcessCommonInterrupt
                  00000000+000144 Mcpwm_Pwm_Drv_ProcessTofInterrupt
                  00000000+00001e Mcpwm_Pwm_Drv_RevertCurrentChannelState
                  00000000+0000c8 Mcpwm_Pwm_Drv_SetChannelDeadTime
                  00000000+000032 Mcpwm_Pwm_Drv_SetCurrentChannelState
                  00000000+00010c Mcpwm_Pwm_Drv_SetDutyPhaseShift
                  00000000+0000ac Mcpwm_Pwm_Drv_SetNormalNotificationCase..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
                  00000000+000062 Mcpwm_Pwm_Drv_SetOutputForForcedChannel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
                  00000000+00029c Mcpwm_Pwm_Drv_SetPhaseShift
                  00000000+000082 Mcpwm_Pwm_Drv_SetPowerState
                  00000000+00019e Mcpwm_Pwm_Drv_SwOutputControl
                  00000000+000024 Mcpwm_Pwm_Drv_SyncUpdate
                  00000000+000024 Mcpwm_Pwm_Drv_UnMaskOutputChannels
                  00000000+00002a Mcpwm_Pwm_Drv_UpdateNotificationStateCenter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
                  00000000+0000a6 Mcpwm_Pwm_Drv_UpdateNotificationStateCombine..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
                  00000000+000088 Mcpwm_Pwm_Drv_UpdateNotificationStateEdge..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
                  00000000+0000f0 Mcpwm_Pwm_Drv_UpdateNotificationStateEdgeCombine..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
                  00000000+000024 Mcpwm_Pwm_Drv_UpdateNow
                  00000000+00001e Mcu_CheckEnableFircClockMonitor..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
                  00000000+00001e Mcu_CheckEnableOscClockMonitor..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
                  00000000+000012 Mcu_DisableFircClockMonitor
                  00000000+000012 Mcu_DisableOscClockMonitor
                  00000000+000008 Mcu_Drvw_DisableFirc64MClockMonitor
                  00000000+000008 Mcu_Drvw_DisableOscClockMonitor
                  00000000+000018 Mcu_Drvw_EnableFirc64MClockMonitor
                  00000000+000018 Mcu_Drvw_EnableOscClockMonitor
                  00000000+000008 Mcu_Drvw_GetClockReadyState
                  00000000+00002a Mcu_Drvw_GetPowerModeState
                  00000000+000008 Mcu_Drvw_GetResetRawValue
                  00000000+000044 Mcu_Drvw_GetResetReason
                  00000000+000008 Mcu_Drvw_PerformReset
                  00000000+000042 Mcu_Drvw_SetWakeupSource
                  00000000+000032 Mcu_EnableFircClockMonitor
                  00000000+000032 Mcu_EnableOscClockMonitor
                  00000000+000008 Mcu_GetClockReadyState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
                  00000000+000036 Mcu_GetPowerModeState
                  00000000+00001a Mcu_GetResetRawValue
                  00000000+00004a Mcu_GetResetReason
                  00000000+000028 Mcu_GetVersionInfo
                  00000000+00000e Mcu_InitRamSection
                  00000000+000012 Mcu_PerformReset
                  00000000+000050 Mcu_SetWakeupSource
                  00000000+00003e Platform_GetIrqPriority
                  00000000+000028 Platform_InstallIrqHandler
                  00000000+000032 Platform_SetIrq
                  00000000+00002c Platform_SetIrqPriority
                  00000000+00005a Pmu_Drv_IntHandler
                  00000000+000018 Port_CheckGetVersionInfo..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort.
                  00000000+000030 Port_CheckRefreshPortDirection..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort.
                  00000000+000066 Port_CheckSetPinDirection..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort.
                  00000000+00007c Port_CheckSetPinMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort.
                  00000000+000064 Port_Drv_SetPinMode
                  00000000+000016 Port_Drvw_CheckPinDirectionChangeable
                  00000000+000016 Port_Drvw_CheckPinModeChangeable
                  00000000+000054 Port_Drvw_RefreshPortDirection
                  00000000+000024 Port_Drvw_SetPinDirection
                  00000000+00003e Port_Drvw_SetPinMode
                  00000000+000026 Port_GetVersionInfo
                  00000000+000024 Port_RefreshPortDirection
                  00000000+00002a Port_SetPinDirection
                  00000000+00002c Port_SetPinMode
                  00000000+00001a Pwm_CheckNotificationCallback..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
                  00000000+00003a Pwm_CheckSetPowerState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
                  00000000+0000ac Pwm_DeInit
                  00000000+000030 Pwm_DisableNotification
                  00000000+000074 Pwm_DisableTriggerOutput
                  00000000+000030 Pwm_Drvw_CheckDeadTimeMode
                  00000000+000052 Pwm_Drvw_CheckEdgeNotificationType
                  00000000+000058 Pwm_Drvw_CheckIdleState
                  00000000+000066 Pwm_Drvw_CheckSetDutyPhaseShiftParams
                  00000000+000020 Pwm_Drvw_DeInit
                  00000000+000034 Pwm_Drvw_DisableNotification
                  00000000+000026 Pwm_Drvw_DisableTriggerOutput
                  00000000+000034 Pwm_Drvw_EnableNotification
                  00000000+000026 Pwm_Drvw_EnableTriggerOutput
                  00000000+000062 Pwm_Drvw_ForceMcpwmOutputToLowLevel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm_Drvw.
                  00000000+00001a Pwm_Drvw_ForceOutputToLowLevel
                  00000000+000062 Pwm_Drvw_ForceTimOutputToLowLevel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm_Drvw.
                  00000000+000034 Pwm_Drvw_GetChannelDutyCycle
                  00000000+000046 Pwm_Drvw_GetOutputState
                  00000000+000026 Pwm_Drvw_MaskOutputs
                  00000000+000042 Pwm_Drvw_SetChannelDeadTimeTicks
                  00000000+000066 Pwm_Drvw_SetDutyPhaseShiftTicks
                  00000000+000074 Pwm_Drvw_SetOutputToIdle
                  00000000+000040 Pwm_Drvw_SetPhaseShiftTicks
                  00000000+000042 Pwm_Drvw_SetPowerState
                  00000000+00001e Pwm_Drvw_SyncUpdate
                  00000000+000026 Pwm_Drvw_UnMaskOutputs
                  00000000+000074 Pwm_Drvw_WriteDutyCycleToBuffer
                  00000000+00006c Pwm_Drvw_WritePeriodAndDutyToBuffer
                  00000000+000040 Pwm_Drvw_WritePhaseShiftTicksToBuffer
                  00000000+00007c Pwm_EnableNotification
                  00000000+000074 Pwm_EnableTriggerOutput
                  00000000+000034 Pwm_ForceOutputToLowLevel
                  00000000+00004a Pwm_GetChannelDutyCycle
                  00000000+000058 Pwm_GetCurrentPowerState
                  00000000+00003e Pwm_GetOutputState
                  00000000+000058 Pwm_GetTargetPowerState
                  00000000+000062 Pwm_MaskOutputs
                  00000000+000084 Pwm_PreparePowerState
                  00000000+00006c Pwm_SetChannelDeadTimeTicks
                  00000000+000074 Pwm_SetDutyPhaseShiftTicks
                  00000000+000032 Pwm_SetOutputToIdle
                  00000000+0000ac Pwm_SetPhaseShiftTicks
                  00000000+00012a Pwm_SetPowerState
                  00000000+00005e Pwm_SyncUpdate
                  00000000+000062 Pwm_UnMaskOutputs
                  00000000+00005a Pwm_WriteDutyCycleToBuffer
                  00000000+0000b6 Pwm_WritePeriodAndDutyToBuffer
                  00000000+0000ac Pwm_WritePhaseShiftTicksToBuffer
                  00000000+0000cc Ram_Drv_CheckSectionWithDefaultValue..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CRam_Drv.
                  00000000+000032 Ram_Drv_Init
                  00000000+00009c Ram_Drv_InitSectionWithDefaultValue..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CRam_Drv.
                  00000000+000016 ReadFunc
                  00000000+000038 Scc_Drv_DisableFirc64MClockMonitor
                  00000000+000038 Scc_Drv_DisableOscClockMonitor
                  00000000+000028 Scc_Drv_EnableFirc64MClock
                  00000000+000044 Scc_Drv_EnableFirc64MClockMonitor
                  00000000+000044 Scc_Drv_EnableOscClockMonitor
                  00000000+00001c Scc_Drv_GetFirc64MClockStatus
                  00000000+000070 Scc_Drv_IntHandler
                  00000000+000028 Scc_Drv_SelectPllClockRefSrc
                  00000000+000008 SchM_Enter_Adc_StopAdcConversion
                  00000000+000008 SchM_Enter_Adc_StopTdgConversion
                  00000000+000008 SchM_Enter_Can_ConfigFdCompensation
                  00000000+000008 SchM_Enter_Can_ConfigFdDataBitTiming
                  00000000+000008 SchM_Enter_Can_ConfigTimeStamp
                  00000000+000008 SchM_Enter_Can_DisableClock
                  00000000+000008 SchM_Enter_Can_SetFdArbitrationBitTiming
                  00000000+000008 SchM_Enter_Can_SetSelfWakeup
                  00000000+000008 SchM_Enter_Crypto_QueueAccess
                  00000000+000008 SchM_Enter_Fls_BEDEndAddr
                  00000000+000008 SchM_Enter_Fls_BEDStartAddr
                  00000000+000008 SchM_Enter_Fls_FCMD
                  00000000+000008 SchM_Enter_Fls_FCTRL
                  00000000+000008 SchM_Enter_Fls_MBEState
                  00000000+000008 SchM_Enter_Fls_TransferStatus
                  00000000+000008 SchM_Enter_Gpt_RtcClearIntStatus
                  00000000+000008 SchM_Enter_Gpt_RtcConfigSecondIntMux
                  00000000+000008 SchM_Enter_Gpt_RtcEnableCounter
                  00000000+000008 SchM_Enter_Gpt_RtcEnableInt
                  00000000+000008 SchM_Enter_Gpt_RtcSelectClockOut
                  00000000+000008 SchM_Enter_Gpt_RtcSetCompDelayValue
                  00000000+000008 SchM_Enter_Gpt_RtcSetCompDirection
                  00000000+000008 SchM_Enter_Gpt_RtcSetCompensationValue
                  00000000+000008 SchM_Enter_Gpt_TimBaseReg
                  00000000+000008 SchM_Enter_Gpt_TimChannelConfigurationReg
                  00000000+000008 SchM_Enter_Gpt_TimEnableOutputCompare
                  00000000+000008 SchM_Enter_Gpt_TimGetValue
                  00000000+000008 SchM_Enter_Icu_CmpGetInputState
                  00000000+000008 SchM_Enter_Icu_CmpSetActiveEdge
                  00000000+000008 SchM_Enter_Icu_CmpSetChannelState
                  00000000+000008 SchM_Enter_Icu_PortGetInputState
                  00000000+000008 SchM_Enter_Icu_PortSetActiveEdge
                  00000000+000008 SchM_Enter_Icu_PortSetChannelState
                  00000000+000008 SchM_Enter_Icu_TimSetChannelModeCfg
                  00000000+000008 SchM_Enter_Icu_TimSetChannelState
                  00000000+000008 SchM_Enter_Icu_TimSetChannelStatePtr
                  00000000+000008 SchM_Enter_Icu_TimSetDmaParam
                  00000000+000008 SchM_Enter_Icu_TimValue
                  00000000+000008 SchM_Enter_Lin_FifoOperation
                  00000000+000008 SchM_Enter_Lin_GlobalChecksum
                  00000000+000008 SchM_Enter_Lin_IntOperation
                  00000000+000008 SchM_Enter_Lin_PrepareSendData
                  00000000+000008 SchM_Enter_Lin_UartChecksumReg
                  00000000+000008 SchM_Enter_Lin_UartLcr
                  00000000+000008 SchM_Enter_Lin_UartLinControlReg
                  00000000+000008 SchM_Enter_Lin_UartLinRspLenReg
                  00000000+000008 SchM_Enter_Ocu_ISRRegisterStatusUpdate
                  00000000+000008 SchM_Enter_Ocu_NotificationUpdate
                  00000000+000008 SchM_Enter_Ocu_SetPinActionUpdate
                  00000000+000008 SchM_Enter_Ocu_SetPinStateUpdate
                  00000000+000008 SchM_Enter_Ocu_StartChannelUpdate
                  00000000+000008 SchM_Enter_Ocu_StopChannelUpdate
                  00000000+000008 SchM_Enter_Pwm_SetMCPWMCounterRegister
                  00000000+000008 SchM_Enter_Pwm_SetMcpwmOutputTriggerRegister
                  00000000+000008 SchM_Enter_Pwm_SetMcpwmSyncRegister
                  00000000+000008 SchM_Enter_Pwm_SetMcpwmTimeRegister
                  00000000+000008 SchM_Enter_Pwm_SetTimCounterRegister
                  00000000+000008 SchM_Enter_Pwm_SetTimFilterRegister
                  00000000+000008 SchM_Enter_Pwm_SetTimOutputControlRegister
                  00000000+000008 SchM_Enter_Pwm_SetTimSyncRegister
                  00000000+000008 SchM_Enter_Pwm_SetTimTimeRegister
                  00000000+000008 SchM_Enter_Wdg_179_Ewdt_ProtectEwdtGptPeriod
                  00000000+000008 SchM_Enter_Wdg_179_Ewdt_ProtectEwdtState
                  00000000+000008 SchM_Enter_Wdg_179_Ewdt_ProtectEwdtTimeoutValue
                  00000000+000008 SchM_Enter_Wdg_179_Ewdt_WriteRegData
                  00000000+000008 SchM_Enter_Wdg_ProtectWdgGptPeriod
                  00000000+000008 SchM_Enter_Wdg_ProtectWdgPreviousMode
                  00000000+000008 SchM_Enter_Wdg_ProtectWdgTimeoutValue
                  00000000+000008 SchM_Exit_Adc_StopAdcConversion
                  00000000+000008 SchM_Exit_Adc_StopTdgConversion
                  00000000+000008 SchM_Exit_Can_ConfigFdCompensation
                  00000000+000008 SchM_Exit_Can_ConfigFdDataBitTiming
                  00000000+000008 SchM_Exit_Can_ConfigTimeStamp
                  00000000+000008 SchM_Exit_Can_DisableClock
                  00000000+000008 SchM_Exit_Can_SetFdArbitrationBitTiming
                  00000000+000008 SchM_Exit_Can_SetSelfWakeup
                  00000000+000008 SchM_Exit_Crypto_QueueAccess
                  00000000+000008 SchM_Exit_Fls_BEDEndAddr
                  00000000+000008 SchM_Exit_Fls_BEDStartAddr
                  00000000+000008 SchM_Exit_Fls_FCMD
                  00000000+000008 SchM_Exit_Fls_FCTRL
                  00000000+000008 SchM_Exit_Fls_MBEState
                  00000000+000008 SchM_Exit_Fls_TransferStatus
                  00000000+000008 SchM_Exit_Gpt_RtcClearIntStatus
                  00000000+000008 SchM_Exit_Gpt_RtcConfigSecondIntMux
                  00000000+000008 SchM_Exit_Gpt_RtcEnableCounter
                  00000000+000008 SchM_Exit_Gpt_RtcEnableInt
                  00000000+000008 SchM_Exit_Gpt_RtcSelectClockOut
                  00000000+000008 SchM_Exit_Gpt_RtcSetCompDelayValue
                  00000000+000008 SchM_Exit_Gpt_RtcSetCompDirection
                  00000000+000008 SchM_Exit_Gpt_RtcSetCompensationValue
                  00000000+000008 SchM_Exit_Gpt_TimBaseReg
                  00000000+000008 SchM_Exit_Gpt_TimChannelConfigurationReg
                  00000000+000008 SchM_Exit_Gpt_TimEnableOutputCompare
                  00000000+000008 SchM_Exit_Gpt_TimGetValue
                  00000000+000008 SchM_Exit_Icu_CmpGetInputState
                  00000000+000008 SchM_Exit_Icu_CmpSetActiveEdge
                  00000000+000008 SchM_Exit_Icu_CmpSetChannelState
                  00000000+000008 SchM_Exit_Icu_PortGetInputState
                  00000000+000008 SchM_Exit_Icu_PortSetActiveEdge
                  00000000+000008 SchM_Exit_Icu_PortSetChannelState
                  00000000+000008 SchM_Exit_Icu_TimSetChannelModeCfg
                  00000000+000008 SchM_Exit_Icu_TimSetChannelState
                  00000000+000008 SchM_Exit_Icu_TimSetChannelStatePtr
                  00000000+000008 SchM_Exit_Icu_TimSetDmaParam
                  00000000+000008 SchM_Exit_Icu_TimValue
                  00000000+000008 SchM_Exit_Lin_FifoOperation
                  00000000+000008 SchM_Exit_Lin_GlobalChecksum
                  00000000+000008 SchM_Exit_Lin_IntOperation
                  00000000+000008 SchM_Exit_Lin_PrepareSendData
                  00000000+000008 SchM_Exit_Lin_UartChecksumReg
                  00000000+000008 SchM_Exit_Lin_UartLcr
                  00000000+000008 SchM_Exit_Lin_UartLinControlReg
                  00000000+000008 SchM_Exit_Lin_UartLinRspLenReg
                  00000000+000008 SchM_Exit_Ocu_ISRRegisterStatusUpdate
                  00000000+000008 SchM_Exit_Ocu_NotificationUpdate
                  00000000+000008 SchM_Exit_Ocu_SetPinActionUpdate
                  00000000+000008 SchM_Exit_Ocu_SetPinStateUpdate
                  00000000+000008 SchM_Exit_Ocu_StartChannelUpdate
                  00000000+000008 SchM_Exit_Ocu_StopChannelUpdate
                  00000000+000008 SchM_Exit_Pwm_SetMCPWMCounterRegister
                  00000000+000008 SchM_Exit_Pwm_SetMcpwmOutputTriggerRegister
                  00000000+000008 SchM_Exit_Pwm_SetMcpwmSyncRegister
                  00000000+000008 SchM_Exit_Pwm_SetMcpwmTimeRegister
                  00000000+000008 SchM_Exit_Pwm_SetTimCounterRegister
                  00000000+000008 SchM_Exit_Pwm_SetTimFilterRegister
                  00000000+000008 SchM_Exit_Pwm_SetTimOutputControlRegister
                  00000000+000008 SchM_Exit_Pwm_SetTimSyncRegister
                  00000000+000008 SchM_Exit_Pwm_SetTimTimeRegister
                  00000000+000008 SchM_Exit_Wdg_179_Ewdt_ProtectEwdtGptPeriod
                  00000000+000008 SchM_Exit_Wdg_179_Ewdt_ProtectEwdtState
                  00000000+000008 SchM_Exit_Wdg_179_Ewdt_ProtectEwdtTimeoutValue
                  00000000+000008 SchM_Exit_Wdg_179_Ewdt_WriteRegData
                  00000000+000008 SchM_Exit_Wdg_ProtectWdgGptPeriod
                  00000000+000008 SchM_Exit_Wdg_ProtectWdgPreviousMode
                  00000000+000008 SchM_Exit_Wdg_ProtectWdgTimeoutValue
                  00000000+000026 Spi_Cancel
                  00000000+00006e Spi_CheckCancel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi.
                  00000000+00007a Spi_CheckGetJobResult..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi.
                  00000000+00007a Spi_CheckGetSequenceResult..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi.
                  00000000+000058 Spi_CheckReadIB..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi.
                  00000000+000044 Spi_CheckWriteIB..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi.
                  00000000+000086 Spi_DeInit
                  00000000+00002a Spi_Drv_0_RxfIrqHandler
                  00000000+00002a Spi_Drv_0_RxoIrqHandler
                  00000000+00002a Spi_Drv_0_RxuIrqHandler
                  00000000+00002a Spi_Drv_0_TxeIrqHandler
                  00000000+00002a Spi_Drv_0_TxoIrqHandler
                  00000000+000044 Spi_Drv_Cancel
                  00000000+000052 Spi_Drv_DeInit
                  00000000+000002 Spi_Drv_ExternalDeviceConfig_SpiExternalDevice_0
                  00000000+00001e Spi_Drv_GetStatus
                  00000000+000002 Spi_Drv_PhyUnitConfig_SpiPhyUnit_0
                  00000000+000092 Spi_Drv_PollAsyncTransmit
                  00000000+000014 Spi_Drvw_DeInit
                  00000000+000034 Spi_Drvw_PollAsyncTransmit
                  00000000+000026 Spi_GetJobResult
                  00000000+000022 Spi_GetSequenceResult
                  00000000+000076 Spi_GetStatus
                  00000000+000058 Spi_MainFunction_Handling
                  00000000+000052 Spi_ReadIB
                  00000000+000074 Spi_SetHWUnitAsyncMode
                  00000000+000078 Spi_WriteIB
                  00000000+000046 Srmc_Drv_ConfigWakeupSource
                  00000000+000030 Srmc_Drv_GetResetReasonValue
                  00000000+00001c Srmc_Drv_GetSysResetInterruptConfig
                  00000000+000028 Srmc_Drv_GetWakeupSourceStatus
                  00000000+000008 Srmc_Drv_SetSysResetInterruptConfig
                  00000000+000044 Srmc_Drv_SetWakeupSource
                  00000000+0000f0 Stim_Drv_DeInit
                  00000000+000082 Stim_Drv_DisableInterrupt
                  00000000+0000c8 Stim_Drv_StopPredefTimer
                  00000000+000032 Sys_SystemReset
                  00000000+000044 Tdg_Adc_Drv_DeInit
                  00000000+00004c Tdg_Adc_Drv_ErrIntHandler
                  00000000+000110 Tdg_Adc_Drv_StopConversion
                  00000000+000064 Tdg_Adc_Drv_TcoIntHandler
                  00000000+000026 Tdg_Drv_0_ErrIrqHandler
                  00000000+000026 Tdg_Drv_0_TcoIrqHandler
                  00000000+000026 Tdg_Drv_1_ErrIrqHandler
                  00000000+000026 Tdg_Drv_1_TcoIrqHandler
                  00000000+00002a Tim_Drv_2_ChIrqHandler
                  00000000+00002a Tim_Drv_2_OverflowIrqHandler
                  00000000+00002a Tim_Drv_3_ChIrqHandler
                  00000000+00002a Tim_Drv_3_OverflowIrqHandler
                  00000000+0000a8 Tim_Pwm_Drv_DeInit
                  00000000+000086 Tim_Pwm_Drv_DisableNotification
                  00000000+00002c Tim_Pwm_Drv_DisableTrigger
                  00000000+0000f2 Tim_Pwm_Drv_EnableNotification
                  00000000+00002c Tim_Pwm_Drv_EnableTrigger
                  00000000+000106 Tim_Pwm_Drv_GetChannelDutyCycle
                  00000000+000012 Tim_Pwm_Drv_GetCurrentChannelState
                  00000000+000012 Tim_Pwm_Drv_GetIdleState
                  00000000+000010 Tim_Pwm_Drv_GetNotifFlag
                  00000000+000188 Tim_Pwm_Drv_GetOutputState
                  00000000+0000b6 Tim_Pwm_Drv_IsChannelOutputActive..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
                  00000000+000024 Tim_Pwm_Drv_MaskOutputChannels
                  00000000+0000c0 Tim_Pwm_Drv_ProcessCommonInterrupt
                  00000000+00006a Tim_Pwm_Drv_ProcessTofInterrupt
                  00000000+00001e Tim_Pwm_Drv_RevertCurrentChannelState
                  00000000+000038 Tim_Pwm_Drv_SetCounterDeadTime
                  00000000+000032 Tim_Pwm_Drv_SetCurrentChannelState
                  00000000+0000f2 Tim_Pwm_Drv_SetDutyPhaseShift
                  00000000+0000b2 Tim_Pwm_Drv_SetNormalNotificationCase..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
                  00000000+000068 Tim_Pwm_Drv_SetOutputForForcedChannel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
                  00000000+0000f6 Tim_Pwm_Drv_SetPhaseShift
                  00000000+0000a0 Tim_Pwm_Drv_SetPowerState
                  00000000+000168 Tim_Pwm_Drv_SwOutputControl
                  00000000+000020 Tim_Pwm_Drv_SyncUpdate
                  00000000+000024 Tim_Pwm_Drv_UnMaskOutputChannels
                  00000000+00002a Tim_Pwm_Drv_UpdateNotificationStateCenter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
                  00000000+0000a6 Tim_Pwm_Drv_UpdateNotificationStateCombine..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
                  00000000+000088 Tim_Pwm_Drv_UpdateNotificationStateEdge..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
                  00000000+000020 Tim_Pwm_Drv_UpdateNow
                  00000000+000044 Tmu_Drv_Init
                  00000000+00005e Tmu_Drv_SelectInput..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTmu_Drv.
                  00000000+000002 WdgAftRefreshCallBackPtr
                  00000000+000002 WdgBefRefreshCallBackPtr
                  00000000+000002 Wdg_CallbackForGptNotification
                  00000000+000028 Wdg_GetVersionInfo
                  00000000+00002c Wdog_Drv_IntHandler
                  00000000+000028 Wdog_Drv_IrqHandler
                  00000000+00006e Wdog_Drv_SetTimeout
                  00000000+000000 __ROM_INTERRUPT_START
                  00000000+000000 __SRAM_INIT_FLAG
 .intc_vector     00000000+000374 __VECTOR_TABLE
                  00000000+000000 __division_by_zero
                  00000000+000006 __gh_shrl_64_64
                  00000000+000000 __ghs_eofn_Adc_DeInit
                  00000000+000000 __ghs_eofn_Adc_DisableGroupNotification
                  00000000+000000 __ghs_eofn_Adc_DisableHardwareTrigger
                  00000000+000000 __ghs_eofn_Adc_Drv_Calibrate
                  00000000+000000 __ghs_eofn_Adc_Drv_DeInit
                  00000000+000000 __ghs_eofn_Adc_Drv_DisableDma
                  00000000+000000 __ghs_eofn_Adc_Drv_GetConvCompleteFlag
                  00000000+000000 __ghs_eofn_Adc_Drv_GetDataAddress
                  00000000+000000 __ghs_eofn_Adc_Drv_SelfTest
                  00000000+000000 __ghs_eofn_Adc_Drv_StopConversion
                  00000000+000000 __ghs_eofn_Adc_EnableHardwareTrigger
                  00000000+000000 __ghs_eofn_Adc_GetGroupStatus
                  00000000+000000 __ghs_eofn_Adc_GetStreamLastPointer
                  00000000+000000 __ghs_eofn_Adc_GetVersionInfo
                  00000000+000000 __ghs_eofn_Adc_ReadGroup
                  00000000+000000 __ghs_eofn_Adc_SelfTest
                  00000000+000000 __ghs_eofn_Adc_StopGroupConversion
                  00000000+000000 __ghs_eofn_CAN1_FIFO_DMA_ErrNotifyFunc
                  00000000+000000 __ghs_eofn_CanIf_ControllerErrorStatePassive
                  00000000+000000 __ghs_eofn_Can_AbortHwObjectSend
                  00000000+000000 __ghs_eofn_Can_DeInit
                  00000000+000000 __ghs_eofn_Can_DisableControllerInterrupts
                  00000000+000000 __ghs_eofn_Can_Drv_CheckStartedMode
                  00000000+000000 __ghs_eofn_Can_Drv_CheckStoppedMode
                  00000000+000000 __ghs_eofn_Can_Drv_ClearMbIntStatus
                  00000000+000000 __ghs_eofn_Can_Drv_Deinit
                  00000000+000000 __ghs_eofn_Can_Drv_DisableSelfWakeup
                  00000000+000000 __ghs_eofn_Can_Drv_EnableArbitrationFiledCompare
                  00000000+000000 __ghs_eofn_Can_Drv_EnableSelfWakeup
                  00000000+000000 __ghs_eofn_Can_Drv_FdErrorIntHandler
                  00000000+000000 __ghs_eofn_Can_Drv_GetControllerErrorState
                  00000000+000000 __ghs_eofn_Can_Drv_GetControllerTxErrorCounter
                  00000000+000000 __ghs_eofn_Can_Drv_GetMbInterruptFlag
                  00000000+000000 __ghs_eofn_Can_Drv_InjectAddress
                  00000000+000000 __ghs_eofn_Can_Drv_InjectCorrectableAddress
                  00000000+000000 __ghs_eofn_Can_Drv_ReadMainFunction
                  00000000+000000 __ghs_eofn_Can_Drv_SetFdArbBitTiming
                  00000000+000000 __ghs_eofn_Can_Drv_SetFdTdc
                  00000000+000000 __ghs_eofn_Can_Drv_SetStdBitTiming
                  00000000+000000 __ghs_eofn_Can_Drv_WakeupMainFunction
                  00000000+000000 __ghs_eofn_Can_GetControllerErrorState
                  00000000+000000 __ghs_eofn_Can_GetControllerMode
                  00000000+000000 __ghs_eofn_Can_GetControllerRxErrorCounter
                  00000000+000000 __ghs_eofn_Can_GetControllerTxErrorCounter
                  00000000+000000 __ghs_eofn_Can_GetVersionInfo
                  00000000+000000 __ghs_eofn_Can_InjectError
                  00000000+000000 __ghs_eofn_Can_MainFunction_BusOff
                  00000000+000000 __ghs_eofn_Can_MainFunction_Mode
                  00000000+000000 __ghs_eofn_Can_MainFunction_Read
                  00000000+000000 __ghs_eofn_CddSbc_DeInit
                  00000000+000000 __ghs_eofn_CddSbc_GetCanMode
                  00000000+000000 __ghs_eofn_CddSbc_GetCanUV
                  00000000+000000 __ghs_eofn_CddSbc_GetResetReason
                  00000000+000000 __ghs_eofn_CddSbc_GetWakeUpStatus
                  00000000+000000 __ghs_eofn_CddSbc_Rou_DeInit
                  00000000+000000 __ghs_eofn_CddSbc_Rou_GetCanMode
                  00000000+000000 __ghs_eofn_CddSbc_Rou_GetCanUV
                  00000000+000000 __ghs_eofn_CddSbc_Rou_GetSBCResetReason
                  00000000+000000 __ghs_eofn_CddSbc_Rou_GetWakeUpStatus
                  00000000+000000 __ghs_eofn_CddSbc_Rou_SetCanMode
                  00000000+000000 __ghs_eofn_CddSbc_Rou_SetSleepMode
                  00000000+000000 __ghs_eofn_CddSbc_Rou_SetWdgTimeoutModeAnd200ms
                  00000000+000000 __ghs_eofn_CddSbc_Rou_SetWdgWindowModeAnd10ms
                  00000000+000000 __ghs_eofn_CddSbc_SetCanMode
                  00000000+000000 __ghs_eofn_CddSbc_SetSleepMode
                  00000000+000000 __ghs_eofn_CddSbc_SetWdgTimeoutModeAnd200ms
                  00000000+000000 __ghs_eofn_CddSbc_SetWdgWindowModeAnd10ms
                  00000000+000000 __ghs_eofn_CddTle94x1_DeInit
                  00000000+000000 __ghs_eofn_CddTle94x1_GetCanMode
                  00000000+000000 __ghs_eofn_CddTle94x1_GetCanUV
                  00000000+000000 __ghs_eofn_CddTle94x1_GetSBCResetReason
                  00000000+000000 __ghs_eofn_CddTle94x1_GetWakeUpStatus
                  00000000+000000 __ghs_eofn_CddTle94x1_SetCanMode
                  00000000+000000 __ghs_eofn_CddTle94x1_SetSleepMode
                  00000000+000000 __ghs_eofn_CddTle94x1_SetWdgTimeoutModeAnd200ms
                  00000000+000000 __ghs_eofn_CddTle94x1_SetWdgWindowModeAnd10ms
                  00000000+000000 __ghs_eofn_CddTle94x1_SpiRx
                  00000000+000000 __ghs_eofn_CddTle94x1_SpiTx
                  00000000+000000 __ghs_eofn_Cdd_bd18397_SetCurrent_mA
                  00000000+000000 __ghs_eofn_Det_Init
                  00000000+000000 __ghs_eofn_Det_ReportTransientFault
                  00000000+000000 __ghs_eofn_Det_Start
                  00000000+000000 __ghs_eofn_Dio_Drvw_FlipChannel
                  00000000+000000 __ghs_eofn_Dio_Drvw_MaskedWritePort
                  00000000+000000 __ghs_eofn_Dio_Drvw_ReadChannel
                  00000000+000000 __ghs_eofn_Dio_Drvw_ReadChannelGroup
                  00000000+000000 __ghs_eofn_Dio_Drvw_ReadPort
                  00000000+000000 __ghs_eofn_Dio_Drvw_WriteChannelGroup
                  00000000+000000 __ghs_eofn_Dio_Drvw_WritePort
                  00000000+000000 __ghs_eofn_Dio_FlipChannel
                  00000000+000000 __ghs_eofn_Dio_GetVersionInfo
                  00000000+000000 __ghs_eofn_Dio_MaskedWritePort
                  00000000+000000 __ghs_eofn_Dio_ReadChannel
                  00000000+000000 __ghs_eofn_Dio_ReadChannelGroup
                  00000000+000000 __ghs_eofn_Dio_ReadPort
                  00000000+000000 __ghs_eofn_Dio_WriteChannelGroup
                  00000000+000000 __ghs_eofn_Dio_WritePort
                  00000000+000000 __ghs_eofn_Dma_ClearIntStatus
                  00000000+000000 __ghs_eofn_Dma_ConfigChannelGlobalParam
                  00000000+000000 __ghs_eofn_Dma_ConfigChannelTransfer
                  00000000+000000 __ghs_eofn_Dma_Drv_ClearDoneStatus
                  00000000+000000 __ghs_eofn_Dma_Drv_ErrIrqHandler
                  00000000+000000 __ghs_eofn_Dma_Drv_ErrorIntHandler
                  00000000+000000 __ghs_eofn_Dma_Drv_GetAllChannelsErrorStatus
                  00000000+000000 __ghs_eofn_Dma_Drv_GetBusyStatus
                  00000000+000000 __ghs_eofn_Dma_Drv_GetChannelBusyStatus
                  00000000+000000 __ghs_eofn_Dma_Drv_GetChannelGlobalConfig
                  00000000+000000 __ghs_eofn_Dma_Drv_GetChannelTransferConfig
                  00000000+000000 __ghs_eofn_Dma_Drv_GetDoneStatus
                  00000000+000000 __ghs_eofn_Dma_Drv_GetHaltStatus
                  00000000+000000 __ghs_eofn_Dma_Drv_GetRestMinorLoopNum
                  00000000+000000 __ghs_eofn_Dma_Drv_HaltControl
                  00000000+000000 __ghs_eofn_Dma_Drv_SetDestAddr
                  00000000+000000 __ghs_eofn_Dma_Drv_SetDestTransferSize
                  00000000+000000 __ghs_eofn_Dma_Drv_SetDisableRequestAfterDone
                  00000000+000000 __ghs_eofn_Dma_Drv_SetMajorLoopDestOffset
                  00000000+000000 __ghs_eofn_Dma_Drv_SetMajorLoopSrcOffset
                  00000000+000000 __ghs_eofn_Dma_Drv_SetMinorLoopDestOffset
                  00000000+000000 __ghs_eofn_Dma_Drv_SetMinorLoopSrcOffset
                  00000000+000000 __ghs_eofn_Dma_Drv_SetSourceAddr
                  00000000+000000 __ghs_eofn_Dma_Drv_SetSourceTransferSize
                  00000000+000000 __ghs_eofn_Dma_Drv_TriggerChannelStart
                  00000000+000000 __ghs_eofn_Dma_GetChannelGlobalParam
                  00000000+000000 __ghs_eofn_Dma_GetChannelStatus
                  00000000+000000 __ghs_eofn_Dma_GetChannelTransferConfig
                  00000000+000000 __ghs_eofn_Dma_GetHwModuleStatus
                  00000000+000000 __ghs_eofn_Dma_GetVersionInfo
                  00000000+000000 __ghs_eofn_Dma_Halt
                  00000000+000000 __ghs_eofn_Dma_SetDestAddr
                  00000000+000000 __ghs_eofn_Dma_SetSourceAddr
                  00000000+000000 __ghs_eofn_Dma_TriggerChannelStartBySw
                  00000000+000000 __ghs_eofn_EcuM_SetWakeupEvent
                  00000000+000000 __ghs_eofn_EcuM_ValidateWakeupEvent
                  00000000+000000 __ghs_eofn_Ex_Can_UseCase_02
                  00000000+000000 __ghs_eofn_Ex_Can_UseCase_03
                  00000000+000000 __ghs_eofn_Ex_Can_UseCase_04
                  00000000+000000 __ghs_eofn_Ex_Can_UseCase_05
                  00000000+000000 __ghs_eofn_Flash_Drv_Abort
                  00000000+000000 __ghs_eofn_Flash_Drv_CheckBlank
                  00000000+000000 __ghs_eofn_Flash_Drv_Compare
                  00000000+000000 __ghs_eofn_Flash_Drv_EccIrqHandler
                  00000000+000000 __ghs_eofn_Flash_Drv_EraseSector
                  00000000+000000 __ghs_eofn_Flash_Drv_GetBlockNumFromAddr
                  00000000+000000 __ghs_eofn_Flash_Drv_Init
                  00000000+000000 __ghs_eofn_Flash_Drv_PollEraseWriteStatus
                  00000000+000000 __ghs_eofn_Flash_Drv_Read
                  00000000+000000 __ghs_eofn_Flash_Drv_Write
                  00000000+000000 __ghs_eofn_Fls_BlankCheck
                  00000000+000000 __ghs_eofn_Fls_Cancel
                  00000000+000000 __ghs_eofn_Fls_Compare
                  00000000+000000 __ghs_eofn_Fls_Drvw_BlankCheckSector
                  00000000+000000 __ghs_eofn_Fls_Drvw_Cancel
                  00000000+000000 __ghs_eofn_Fls_Drvw_EraseSector
                  00000000+000000 __ghs_eofn_Fls_Drvw_HandleAsyncEraseJob
                  00000000+000000 __ghs_eofn_Fls_Drvw_Init
                  00000000+000000 __ghs_eofn_Fls_Drvw_ReadSector
                  00000000+000000 __ghs_eofn_Fls_Drvw_WriteSector
                  00000000+000000 __ghs_eofn_Fls_Erase
                  00000000+000000 __ghs_eofn_Fls_GetJobResult
                  00000000+000000 __ghs_eofn_Fls_GetStatus
                  00000000+000000 __ghs_eofn_Fls_Init
                  00000000+000000 __ghs_eofn_Fls_MainFunction
                  00000000+000000 __ghs_eofn_Fls_Read
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 .mcal_code       000055f8+000000 __ghs_eofn_Spi_SetAsyncMode
 .mcal_code       0000568e+00001e Spi_Drv_CheckDataLength..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       0000568e+000000 __ghs_eofn_Spi_ChannelEndCallback
 .mcal_code       000056ac+000082 Spi_Drv_UpdateTxTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       0000572e+000130 Spi_Drv_InitTxTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       0000585e+000038 Spi_Drv_InitRxTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       00005896+000028 Spi_Drv_TransferFinished..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       000058be+00025a Spi_Drv_ProcessSyncTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       00005b18+00025a Spi_Drv_ProcessAsyncTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       00005d72+0001ac Spi_Drv_ConfigDmaTx..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       00005f1e+0001c0 Spi_Drv_ConfigDmaRx..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       000060de+0000c0 Spi_Drv_ContinueDmaTxTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       0000619e+0000c0 Spi_Drv_ContinueDmaRxTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       0000625e+00002a Spi_Drv_FinishDmaTxTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_code       00006288+000082 Spi_Drv_Init
 .mcal_code       0000630a+00003e Spi_Drv_SetDeviceParams
 .mcal_code       0000630a+000000 __ghs_eofn_Spi_Drv_Init
 .mcal_code       00006348+0000de Spi_Drv_SyncTransmit
 .mcal_code       00006348+000000 __ghs_eofn_Spi_Drv_SetDeviceParams
 .mcal_code       00006426+000142 Spi_Drv_AsyncTransmit
 .mcal_code       00006426+000000 __ghs_eofn_Spi_Drv_SyncTransmit
 .mcal_code       00006568+000028 Spi_Drv_SetAsyncMode
 .mcal_code       00006568+000000 __ghs_eofn_Spi_Drv_AsyncTransmit
 .mcal_code       00006590+000048 Spi_Drv_IntHandler
 .mcal_code       00006590+000000 __ghs_eofn_Spi_Drv_SetAsyncMode
 .mcal_code       000065d8+00002c Spi_Drv_DmaTxIntHandler
 .mcal_code       000065d8+000000 __ghs_eofn_Spi_Drv_IntHandler
 .mcal_code       00006604+000064 Spi_Drv_DmaRxIntHandler
 .mcal_code       00006604+000000 __ghs_eofn_Spi_Drv_DmaTxIntHandler
 .mcal_code       00006668+00000a Spi_Drv_0_DmaTxIrqHandler
 .mcal_code       00006668+000000 __ghs_eofn_Spi_Drv_DmaRxIntHandler
 .mcal_code       00006672+00000a Spi_Drv_0_DmaRxIrqHandler
 .mcal_code       00006672+000000 __ghs_eofn_Spi_Drv_0_DmaTxIrqHandler
 .mcal_code       0000667c+00002a Spi_Drv_1_TxeIrqHandler
 .mcal_code       0000667c+000000 __ghs_eofn_Spi_Drv_0_DmaRxIrqHandler
 .mcal_code       000066a6+00002a Spi_Drv_1_TxoIrqHandler
 .mcal_code       000066a6+000000 __ghs_eofn_Spi_Drv_1_TxeIrqHandler
 .mcal_code       000066d0+00002a Spi_Drv_1_RxfIrqHandler
 .mcal_code       000066d0+000000 __ghs_eofn_Spi_Drv_1_TxoIrqHandler
 .mcal_code       000066fa+00002a Spi_Drv_1_RxoIrqHandler
 .mcal_code       000066fa+000000 __ghs_eofn_Spi_Drv_1_RxfIrqHandler
 .mcal_code       00006724+00002a Spi_Drv_1_RxuIrqHandler
 .mcal_code       00006724+000000 __ghs_eofn_Spi_Drv_1_RxoIrqHandler
 .mcal_code       0000674e+00000a Spi_Drv_1_DmaTxIrqHandler
 .mcal_code       0000674e+000000 __ghs_eofn_Spi_Drv_1_RxuIrqHandler
 .mcal_code       00006758+00000a Spi_Drv_1_DmaRxIrqHandler
 .mcal_code       00006758+000000 __ghs_eofn_Spi_Drv_1_DmaTxIrqHandler
 .mcal_code       00006762+000020 Spi_Drvw_ChannelEndCallback..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drvw.
 .mcal_code       00006762+000000 __ghs_eofn_Spi_Drv_1_DmaRxIrqHandler
 .mcal_code       00006782+000022 Spi_Drvw_Init
 .mcal_code       000067a4+0000bc Spi_Drvw_TransmitChannel
 .mcal_code       000067a4+000000 __ghs_eofn_Spi_Drvw_Init
 .mcal_code       00006860+000026 Spi_Drvw_SetAsyncMode
 .mcal_code       00006860+000000 __ghs_eofn_Spi_Drvw_TransmitChannel
 .mcal_code       00006886+000000 __ghs_eofn_Spi_Drvw_SetAsyncMode
 .mcal_code       0000689c+000390 Adc_ProcessConversionEndInterrupt
 .mcal_code       0000689c+000000 __ghs_eofn_Fls_Drvw_CompareSector
 .mcal_code       0000689c+000000 __ghs_eofn_Fls_Drvw_HandleAsyncWriteJob
 .mcal_code       00006c2c+0001b4 Adc_Init
 .mcal_code       00006c2c+000000 __ghs_eofn_Adc_ProcessConversionEndInterrupt
 .mcal_code       00006de0+0000b8 Adc_SetupResultBuffer
 .mcal_code       00006de0+000000 __ghs_eofn_Adc_Init
 .mcal_code       00006e98+000276 Adc_StartGroupConversion
 .mcal_code       00006e98+000000 __ghs_eofn_Adc_SetupResultBuffer
 .mcal_code       0000710e+000098 Adc_EnableGroupNotification
 .mcal_code       0000710e+000000 __ghs_eofn_Adc_StartGroupConversion
 .mcal_code       000071a6+000000 __ghs_eofn_Adc_EnableGroupNotification
 .mcal_code       000071a8+00000e Adc_Drv_InitGroupConfig
 .mcal_code       000071b6+0000f2 Adc_Drv_Init
 .mcal_code       000071b6+000000 __ghs_eofn_Adc_Drv_InitGroupConfig
 .mcal_code       000072a8+000000 __ghs_eofn_Adc_Drv_Init
 .mcal_code       000072aa+000022 Adc_Drv_GetConvData
 .mcal_code       000072cc+00002c Adc_Drv_ClearFifo..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_Drv.
 .mcal_code       000072cc+000000 __ghs_eofn_Adc_Drv_GetConvData
 .mcal_code       000072f8+000020 Adc_Drv_DisableCompInterrupt
 .mcal_code       00007318+000000 __ghs_eofn_Adc_Drv_DisableCompInterrupt
 .mcal_code       0000731a+000254 Adc_Drv_StartConversion
 .mcal_code       0000756e+000000 __ghs_eofn_Adc_Drv_StartConversion
 .mcal_code       00007570+00009e Adc_Drv_IntHandler
 .mcal_code       0000760e+00002a Adc_Drv_0_IrqHandler
 .mcal_code       0000760e+000000 __ghs_eofn_Adc_Drv_IntHandler
 .mcal_code       00007638+00002a Adc_Drv_1_IrqHandler
 .mcal_code       00007638+000000 __ghs_eofn_Adc_Drv_0_IrqHandler
 .mcal_code       00007662+000000 __ghs_eofn_Adc_Drv_1_IrqHandler
 .mcal_code       00007664+00000e Tdg_Adc_Drv_InitGroupConfig
 .mcal_code       00007672+000070 Tdg_Adc_Drv_Init
 .mcal_code       00007672+000000 __ghs_eofn_Tdg_Adc_Drv_InitGroupConfig
 .mcal_code       000076e2+0001c6 Tdg_Adc_Drv_StartConversion
 .mcal_code       000076e2+000000 __ghs_eofn_Tdg_Adc_Drv_Init
 .mcal_code       000078a8+000020 Tdg_Adc_Drv_SwTrigger
 .mcal_code       000078a8+000000 __ghs_eofn_Tdg_Adc_Drv_StartConversion
 .mcal_code       000078c8+000000 __ghs_eofn_Tdg_Adc_Drv_SwTrigger
 .mcal_code       000078ce+000064 Mcpwm_Pwm_Drv_SetCounterOverflowInt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00007932+00010e Mcpwm_Pwm_Drv_DisableInterrupt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00007a40+000038 Mcpwm_Pwm_Drv_SpecialCheckNotification..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00007a78+0000c6 Mcpwm_Pwm_Drv_NormalCheckNotification..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00007b3e+000040 Mcpwm_Pwm_Drv_CheckNotification..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00007b7e+00016a Mcpwm_Pwm_Drv_ConfigCounter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00007ce8+000068 Mcpwm_Pwm_Drv_ConfigInstance..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00007d50+0003e8 Mcpwm_Pwm_Drv_InitChannel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00008138+000086 Mcpwm_Pwm_Drv_InitInstance..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       000081be+000080 Mcpwm_Pwm_Drv_InitInstanceStart
 .mcal_code       0000823e+000000 __ghs_eofn_Mcpwm_Pwm_Drv_InitInstanceStart
 .mcal_code       00008240+0001f6 Mcpwm_Pwm_Drv_UpdatePwmPeriod..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00008436+0000b8 Mcpwm_Pwm_Drv_Init
 .mcal_code       000084ee+00027a Mcpwm_Pwm_Drv_SetDutyCycle
 .mcal_code       000084ee+000000 __ghs_eofn_Mcpwm_Pwm_Drv_Init
 .mcal_code       00008768+0001d4 Mcpwm_Pwm_Drv_SetPeriodAndDuty
 .mcal_code       00008768+000000 __ghs_eofn_Mcpwm_Pwm_Drv_SetDutyCycle
 .mcal_code       0000893c+000000 __ghs_eofn_Mcpwm_Pwm_Drv_SetPeriodAndDuty
 .mcal_code       00008940+00031e Mcpwm_Pwm_Drv_UpdatePwmChannel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00008c60+000000 __ghs_eofn_Mcpwm_Pwm_Drv_DisableTrigger
 .mcal_code       00008c60+000000 __ghs_eofn_Mcpwm_Pwm_Drv_GetChannelMode
 .mcal_code       00008c60+000000 __ghs_eofn_Mcpwm_Pwm_Drv_SetCurrentChannelState
 .mcal_code       00008c62+000014 Mcpwm_Pwm_Drv_GetPeriod
 .mcal_code       00008c76+00035e Mcpwm_Pwm_Drv_SetChannelMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_code       00008c76+000000 __ghs_eofn_Mcpwm_Pwm_Drv_GetPeriod
 .mcal_code       00008fd4+00014a Mcpwm_Pwm_Drv_SoftwareUpdate
 .mcal_code       0000911e+000012 Mcpwm_Pwm_Drv_InitIdleState
 .mcal_code       0000911e+000000 __ghs_eofn_Mcpwm_Pwm_Drv_SoftwareUpdate
 .mcal_code       00009130+000012 Mcpwm_Pwm_Drv_InitOffValue
 .mcal_code       00009130+000000 __ghs_eofn_Mcpwm_Pwm_Drv_InitIdleState
 .mcal_code       00009142+000000 __ghs_eofn_Mcpwm_Pwm_Drv_InitOffValue
 .mcal_code       00009144+00002c Pwm_CheckHwInitCall..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
 .mcal_code       00009170+00001c Pwm_CheckChnParamCall..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
 .mcal_code       0000918c+00002c Pwm_CheckChnCfgCall..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
 .mcal_code       000091b8+000064 Pwm_CheckChnCfgStruct..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
 .mcal_code       0000921c+00005e Pwm_CheckModuleCfgStruct..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
 .mcal_code       0000927a+000056 Pwm_CheckPwmCfgStruct..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
 .mcal_code       000092d0+00002e Pwm_CheckHwAndChannel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
 .mcal_code       000092fe+000060 Pwm_CheckInit..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
 .mcal_code       0000935e+000108 Pwm_Init
 .mcal_code       00009466+00005a Pwm_SetDutyCycle
 .mcal_code       00009466+000000 __ghs_eofn_Pwm_Init
 .mcal_code       000094c0+0000b6 Pwm_SetPeriodAndDuty
 .mcal_code       000094c0+000000 __ghs_eofn_Pwm_SetDutyCycle
 .mcal_code       00009576+000028 Pwm_GetVersionInfo
 .mcal_code       00009576+000000 __ghs_eofn_Pwm_SetPeriodAndDuty
 .mcal_code       0000959e+000040 Pwm_Drvw_InitMcpwmIdleState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm_Drvw.
 .mcal_code       0000959e+000000 __ghs_eofn_Pwm_GetVersionInfo
 .mcal_code       000095de+000034 Pwm_Drvw_InitTimIdleState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm_Drvw.
 .mcal_code       00009612+000048 Pwm_Drvw_CheckMcpwmDefaultDutyPhaseShiftParams..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm_Drvw.
 .mcal_code       0000965a+000046 Pwm_Drvw_CheckTimDefaultDutyPhaseShiftParams..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm_Drvw.
 .mcal_code       000096a0+00003a Pwm_Drvw_CheckDefaultDutyPhaseShiftParams..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm_Drvw.
 .mcal_code       000096da+00002c Pwm_Drvw_Init
 .mcal_code       00009706+00005a Pwm_Drvw_SetDefaultDutyCycle
 .mcal_code       00009706+000000 __ghs_eofn_Pwm_Drvw_Init
 .mcal_code       00009760+000016 Pwm_Drvw_SyncDefaultDutyCycle
 .mcal_code       00009760+000000 __ghs_eofn_Pwm_Drvw_SetDefaultDutyCycle
 .mcal_code       00009776+000030 Pwm_Drvw_StartInstance
 .mcal_code       00009776+000000 __ghs_eofn_Pwm_Drvw_SyncDefaultDutyCycle
 .mcal_code       000097a6+00008a Pwm_Drvw_SetDutyCycle
 .mcal_code       000097a6+000000 __ghs_eofn_Pwm_Drvw_StartInstance
 .mcal_code       00009830+000074 Pwm_Drvw_SetPeriodAndDuty
 .mcal_code       00009830+000000 __ghs_eofn_Pwm_Drvw_SetDutyCycle
 .mcal_code       000098a4+00001e Pwm_Drvw_GetMaxPeriodValue
 .mcal_code       000098a4+000000 __ghs_eofn_Pwm_Drvw_SetPeriodAndDuty
 .mcal_code       000098c2+00001a Pwm_Drvw_InitIdleState
 .mcal_code       000098c2+000000 __ghs_eofn_Pwm_Drvw_GetMaxPeriodValue
 .mcal_code       000098dc+000000 __ghs_eofn_Pwm_Drvw_InitIdleState
 .mcal_code       000098e2+00009c Tim_Pwm_Drv_DisableInterrupt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       00009980+000082 Tim_Pwm_Drv_ConfigCounter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       00009a02+000038 Tim_Pwm_Drv_SpecialCheckNotification..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       00009a3a+0000d0 Tim_Pwm_Drv_NormalCheckNotification..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       00009b0a+00003a Tim_Pwm_Drv_CheckNotification..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       00009b44+000012 Tim_Pwm_Drv_SelectChannelPulsePol..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       00009b56+000314 Tim_Pwm_Drv_InitChannel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       00009e6a+000034 Tim_Pwm_Drv_InitInstance..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       00009e9e+000038 Tim_Pwm_Drv_InitInstanceStart
 .mcal_code       00009ed6+000052 Tim_Pwm_Drv_UpdatePwmPeriod..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       00009ed6+000000 __ghs_eofn_Tim_Pwm_Drv_InitInstanceStart
 .mcal_code       00009f28+000034 Tim_Pwm_Drv_Init
 .mcal_code       00009f5c+000234 Tim_Pwm_Drv_SetDutyCycle
 .mcal_code       00009f5c+000000 __ghs_eofn_Tim_Pwm_Drv_Init
 .mcal_code       0000a190+00017a Tim_Pwm_Drv_SetPeriodAndDuty
 .mcal_code       0000a190+000000 __ghs_eofn_Tim_Pwm_Drv_SetDutyCycle
 .mcal_code       0000a30a+000000 __ghs_eofn_Tim_Pwm_Drv_SetPeriodAndDuty
 .mcal_code       0000a30e+000240 Tim_Pwm_Drv_UpdatePwmChannel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       0000a550+000012 Tim_Pwm_Drv_GetChannelMode
 .mcal_code       0000a550+000000 __ghs_eofn_Tim_Pwm_Drv_GetChannelDutyCycle
 .mcal_code       0000a562+000000 __ghs_eofn_Tim_Pwm_Drv_GetChannelMode
 .mcal_code       0000a564+00000e Tim_Pwm_Drv_GetPeriod
 .mcal_code       0000a564+000000 __ghs_eofn_Tim_Pwm_Drv_RevertCurrentChannelState
 .mcal_code       0000a572+0000de Tim_Pwm_Drv_SetChannelMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_code       0000a572+000000 __ghs_eofn_Tim_Pwm_Drv_GetPeriod
 .mcal_code       0000a650+0000fe Tim_Pwm_Drv_SoftwareUpdate
 .mcal_code       0000a74e+000012 Tim_Pwm_Drv_InitIdleState
 .mcal_code       0000a74e+000000 __ghs_eofn_Tim_Pwm_Drv_SoftwareUpdate
 .mcal_code       0000a760+000162 Gpt_Init
 .mcal_code       0000a760+000000 __ghs_eofn_Tim_Pwm_Drv_InitIdleState
 .mcal_code       0000a760+000000 __ghs_eofn_Tim_Pwm_Drv_ProcessTofInterrupt
 .mcal_code       0000a8c2+000146 Gpt_StartTimer
 .mcal_code       0000a8c2+000000 __ghs_eofn_Gpt_Init
 .mcal_code       0000aa08+0000ee Gpt_StopTimer
 .mcal_code       0000aa08+000000 __ghs_eofn_Gpt_StartTimer
 .mcal_code       0000aaf6+0000bc Gpt_EnableNotification
 .mcal_code       0000aaf6+000000 __ghs_eofn_Gpt_StopTimer
 .mcal_code       0000abb2+0000b8 Gpt_TimeMatchCallback
 .mcal_code       0000abb2+000000 __ghs_eofn_Gpt_EnableNotification
 .mcal_code       0000ac6a+000002 Gpt_Drvw_InitInstances
 .mcal_code       0000ac6a+000000 __ghs_eofn_Gpt_TimeMatchCallback
 .mcal_code       0000ac6c+00001c Gpt_Drvw_Init
 .mcal_code       0000ac6c+000000 __ghs_eofn_Gpt_Drvw_InitInstances
 .mcal_code       0000ac88+000048 Gpt_Drvw_GetTimeElapsed
 .mcal_code       0000ac88+000000 __ghs_eofn_Gpt_Drvw_Init
 .mcal_code       0000acd0+000024 Gpt_Drvw_StartTimer
 .mcal_code       0000acd0+000000 __ghs_eofn_Gpt_Drvw_GetTimeElapsed
 .mcal_code       0000acf4+00001c Gpt_Drvw_StopTimer
 .mcal_code       0000acf4+000000 __ghs_eofn_Gpt_Drvw_StartTimer
 .mcal_code       0000ad10+00001c Gpt_Drvw_EnableInterrupt
 .mcal_code       0000ad10+000000 __ghs_eofn_Gpt_Drvw_StopTimer
 .mcal_code       0000ad2c+000056 Gpt_Drvw_StartPredefTimer
 .mcal_code       0000ad2c+000000 __ghs_eofn_Gpt_Drvw_EnableInterrupt
 .mcal_code       0000ad82+000098 Stim_Drv_IntHandler..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CStim_Drv.
 .mcal_code       0000ad82+000000 __ghs_eofn_Gpt_Drvw_StartPredefTimer
 .mcal_code       0000ae1a+00006a Stim_Drv_SetCompareValue..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CStim_Drv.
 .mcal_code       0000ae84+000026 Stim_Drv_GetStatus
 .mcal_code       0000aeaa+000016 Stim_Drv_GetCurrentCounterValue
 .mcal_code       0000aeaa+000000 __ghs_eofn_Stim_Drv_GetStatus
 .mcal_code       0000aec0+000018 Stim_Drv_GetCompareValue
 .mcal_code       0000aec0+000000 __ghs_eofn_Stim_Drv_GetCurrentCounterValue
 .mcal_code       0000aed8+0001b8 Stim_Drv_InitChannel
 .mcal_code       0000aed8+000000 __ghs_eofn_Stim_Drv_GetCompareValue
 .mcal_code       0000b090+00009c Stim_Drv_StartTimer
 .mcal_code       0000b090+000000 __ghs_eofn_Stim_Drv_InitChannel
 .mcal_code       0000b12c+000082 Stim_Drv_StopTimer
 .mcal_code       0000b12c+000000 __ghs_eofn_Stim_Drv_StartTimer
 .mcal_code       0000b1ae+00008c Stim_Drv_EnableInterrupt
 .mcal_code       0000b1ae+000000 __ghs_eofn_Stim_Drv_StopTimer
 .mcal_code       0000b23a+00015a Stim_Drv_StartPredefTimer
 .mcal_code       0000b23a+000000 __ghs_eofn_Stim_Drv_EnableInterrupt
 .mcal_code       0000b394+00003a Stim_Drv_IrqHandler
 .mcal_code       0000b394+000000 __ghs_eofn_Stim_Drv_StartPredefTimer
 .mcal_code       0000b3ce+00003a Dma_GetLogicChIndexOfPhyCh..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCDD_Dma.
 .mcal_code       0000b3ce+000000 __ghs_eofn_Stim_Drv_IrqHandler
 .mcal_code       0000b408+00004c Dma_HandlePhysChannelErrInt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCDD_Dma.
 .mcal_code       0000b454+00002a Dma_HandlePhysChannelDoneInt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCDD_Dma.
 .mcal_code       0000b47e+0000ba Dma_Init
 .mcal_code       0000b538+000074 Dma_EnableChannelHwRequest
 .mcal_code       0000b538+000000 __ghs_eofn_Dma_Init
 .mcal_code       0000b5ac+00000a Dma_Drv_GetLastErrorChannel
 .mcal_code       0000b5ac+000000 __ghs_eofn_Dma_EnableChannelHwRequest
 .mcal_code       0000b5b6+00001a Dma_Drv_InitDoneIrqHandle
 .mcal_code       0000b5b6+000000 __ghs_eofn_Dma_Drv_GetLastErrorChannel
 .mcal_code       0000b5d0+000036 Dma_Drv_EnableChannelRequest
 .mcal_code       0000b5d0+000000 __ghs_eofn_Dma_Drv_InitDoneIrqHandle
 .mcal_code       0000b606+000036 Dma_Drv_DisableChannelRequest
 .mcal_code       0000b606+000000 __ghs_eofn_Dma_Drv_EnableChannelRequest
 .mcal_code       0000b63c+000050 Dma_Drv_ClearIntStatus
 .mcal_code       0000b63c+000000 __ghs_eofn_Dma_Drv_DisableChannelRequest
 .mcal_code       0000b68c+00002e Dma_Drv_GetChannelErrorStatus
 .mcal_code       0000b68c+000000 __ghs_eofn_Dma_Drv_ClearIntStatus
 .mcal_code       0000b6ba+000060 Dma_Drv_SetMinorLoopNum
 .mcal_code       0000b6ba+000000 __ghs_eofn_Dma_Drv_GetChannelErrorStatus
 .mcal_code       0000b71a+00005e Dma_Drv_SetTransferByteNum
 .mcal_code       0000b71a+000000 __ghs_eofn_Dma_Drv_SetMinorLoopNum
 .mcal_code       0000b778+000036 Dma_Drv_Init
 .mcal_code       0000b778+000000 __ghs_eofn_Dma_Drv_SetTransferByteNum
 .mcal_code       0000b7ae+000398 Dma_Drv_SetChannelTransferConfig
 .mcal_code       0000b7ae+000000 __ghs_eofn_Dma_Drv_Init
 .mcal_code       0000bb46+000180 Dma_Drv_SetChannelGlobalConfig
 .mcal_code       0000bb46+000000 __ghs_eofn_Dma_Drv_SetChannelTransferConfig
 .mcal_code       0000bcc6+00001a Dma_Drv_GetLastErrorStatus
 .mcal_code       0000bcc6+000000 __ghs_eofn_Dma_Drv_SetChannelGlobalConfig
 .mcal_code       0000bce0+00016c Dma_Drv_ControlInt
 .mcal_code       0000bce0+000000 __ghs_eofn_Dma_Drv_GetLastErrorStatus
 .mcal_code       0000be4c+00009a Dma_Drv_DoneIntHandler
 .mcal_code       0000be4c+000000 __ghs_eofn_Dma_Drv_ControlInt
 .mcal_code       0000bee6+000016 Dma_Drv_InstallErrIntCallbackFunc
 .mcal_code       0000bee6+000000 __ghs_eofn_Dma_Drv_DoneIntHandler
 .mcal_code       0000befc+00002a Dma_Drv_Ch0IrqHandler
 .mcal_code       0000befc+000000 __ghs_eofn_Dma_Drv_InstallErrIntCallbackFunc
 .mcal_code       0000bf26+00002a Dma_Drv_Ch1IrqHandler
 .mcal_code       0000bf26+000000 __ghs_eofn_Dma_Drv_Ch0IrqHandler
 .mcal_code       0000bf50+00002a Dma_Drv_Ch2IrqHandler
 .mcal_code       0000bf50+000000 __ghs_eofn_Dma_Drv_Ch1IrqHandler
 .mcal_code       0000bf7a+00002a Dma_Drv_Ch3IrqHandler
 .mcal_code       0000bf7a+000000 __ghs_eofn_Dma_Drv_Ch2IrqHandler
 .mcal_code       0000bfa4+00002a Dma_Drv_Ch4IrqHandler
 .mcal_code       0000bfa4+000000 __ghs_eofn_Dma_Drv_Ch3IrqHandler
 .mcal_code       0000bfce+000028 Can_CheckInitialized..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000bfce+000000 __ghs_eofn_Dma_Drv_Ch4IrqHandler
 .mcal_code       0000bff6+000038 Can_CheckInit..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c02e+00002a Can_CheckController..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c058+000046 Can_CheckWrite..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c09e+00004c Can_CheckControllerBusy..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c0ea+00014a Can_SetControllerRxMask..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c234+0000e4 Can_SetControllerFifoFilter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c318+00008a Can_SetControllerRxConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c3a2+000102 Can_InitController..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c4a4+0000ba Can_InitAllControllers..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c55e+000078 Can_CheckPduInfo..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c5d6+0000ce Can_SetControllerToStopMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c6a4+00006a Can_EnterStopMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c70e+000054 Can_EnterSleepMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c762+0000a0 Can_SetControllerToStartMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c802+0000a6 Can_EnterStartMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c8a8+000084 Can_ControllerModeTransition..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c92c+000078 Can_ExecutePollingWrite..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000c9a4+0000a0 Can_ParseRxData..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000ca44+00003e Can_ProcessTxMsgBuffer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000ca82+0000d4 Can_ProcessRxMsgBuffer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000cb56+000064 Can_ProcessRxDma..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000cbba+000050 Can_ReportSecurityEvents..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000cc0a+00004c Can_SendMessage..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000cc56+000084 Can_SendPdu..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000ccda+000078 Can_ProcessEnableControllerInterrupts..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_code       0000cd52+000032 Can_Init
 .mcal_code       0000cd84+00002c Can_SetControllerMode
 .mcal_code       0000cd84+000000 __ghs_eofn_Can_Init
 .mcal_code       0000cdb0+000064 Can_EnableControllerInterrupts
 .mcal_code       0000cdb0+000000 __ghs_eofn_Can_SetControllerMode
 .mcal_code       0000ce14+00009e Can_Write
 .mcal_code       0000ce14+000000 __ghs_eofn_Can_EnableControllerInterrupts
 .mcal_code       0000ceb2+00006e Can_MainFunction_Write
 .mcal_code       0000ceb2+000000 __ghs_eofn_Can_Write
 .mcal_code       0000cf20+00007c Can_ProcessMbCommonInterrupt
 .mcal_code       0000cf20+000000 __ghs_eofn_Can_MainFunction_Write
 .mcal_code       0000cf9c+00004e Can_ProcessRxFiFoDmaInterrupt
 .mcal_code       0000cf9c+000000 __ghs_eofn_Can_ProcessMbCommonInterrupt
 .mcal_code       0000cfea+000046 Can_ProcessBusOffInterrupt
 .mcal_code       0000cfea+000000 __ghs_eofn_Can_ProcessRxFiFoDmaInterrupt
 .mcal_code       0000d030+00004c Can_ProcessErrorInterrupt
 .mcal_code       0000d030+000000 __ghs_eofn_Can_ProcessBusOffInterrupt
 .mcal_code       0000d07c+000054 Can_ProcessEccInterrupt
 .mcal_code       0000d07c+000000 __ghs_eofn_Can_ProcessErrorInterrupt
 .mcal_code       0000d0d0+000054 Can_ClearInjectError
 .mcal_code       0000d0d0+000000 __ghs_eofn_Can_ProcessEccInterrupt
 .mcal_code       0000d124+0000b6 Can_Drv_DmaHandle..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d124+000000 __ghs_eofn_Can_ClearInjectError
 .mcal_code       0000d1da+0000a2 Can_Drv_ConfigDma..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d27c+000008 Can_Drv_CallbackForDma..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d284+0000f8 Can_Drv_ClearOutputRxFIFO..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d37c+000010 Can_Drv_GetMbNum..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d38c+000098 Can_Drv_CompleteRxFifoData..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d424+000098 Can_Drv_AbortRxTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d4bc+0000fc Can_Drv_AbortTxTransfer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d5b8+000044 Can_Drv_CheckMbId..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d5fc+00002a Can_Drv_CheckMbIdRange..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d626+000066 Can_Drv_ClearMessageBufferIntFlag..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d68c+000016 Can_Drv_ComputeDlcAndDataSize..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d6a2+00000c Can_Drv_ComputePayloadSize..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d6ae+00006e Can_Drv_Disable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d71c+00006e Can_Drv_Enable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d78a+000040 Can_Drv_GetInterruptInfoFromBlock0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d7ca+000020 Can_Drv_GetMbInterruptStateFromBlock0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d7ea+000026 Can_Drv_GetMbInterruptStateFromBlock1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d810+000026 Can_Drv_GetMbInterruptStateFromBlock2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d836+000026 Can_Drv_GetMbInterruptStateFromBlock3..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d85c+000048 Can_Drv_GetInterruptInfoFromBlock1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d8a4+000048 Can_Drv_GetInterruptInfoFromBlock2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d8ec+000048 Can_Drv_GetInterruptInfoFromBlock3..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d934+00004a Can_Drv_ReadMbInterruptStatus..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000d97e+0000b8 Can_Drv_ProcessMbIrqSource..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000da36+0000a2 Can_Drv_GetMbAddr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000dad8+00001e Can_Drv_GetTimeStamp..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000daf6+000064 Can_Drv_ComputeFifoModeATable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000db5a+0000d4 Can_Drv_ComputeFifoModeBTable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000dc2e+000132 Can_Drv_ComputeFifoModeCTable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000dd60+0000a8 Can_Drv_ConfigRxFifoFilter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000de08+000054 Can_Drv_UnmaskInterrupt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000de5c+00002e Can_Drv_MaskInterrupt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000de8a+0000f2 Can_Drv_ReadRxFifo..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000df7c+00011e Can_Drv_GetMsgBuff..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e09a+000022 Can_Drv_GetMsgBuffTimeStamp..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e0bc+000034 Can_Drv_ProcessErrorIntConfigure..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e0f0+0000e6 Can_Drv_ProcessEccIntConfigure..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e1d6+000066 Can_Drv_ExecuteSoftReset..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e23c+0000f8 Can_Drv_ClearRam..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e334+00005e Can_Drv_ConfigMbInterruptBlock0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e392+000064 Can_Drv_ConfigMbInterruptBlock1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e3f6+000064 Can_Drv_ConfigMbInterruptBlock2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e45a+000064 Can_Drv_ConfigMbInterruptBlock3..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e4be+00003a Can_Drv_ConfigMbInterrupt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e4f8+000042 Can_Drv_GetMbInterruptState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e53a+00005e Can_Drv_SetErrorInterruptState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e598+0000a4 Can_Drv_SetRxMb..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e63c+000168 Can_Drv_ProcessSetTxMbBuffer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e7a4+00009e Can_Drv_SetTxMb..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e842+0000b0 Can_Drv_ProcessTxMb..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e8f2+000076 Can_Drv_SetStandardBitTiming..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e96a+000076 Can_Drv_GetPayloadSize..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000e9e0+000054 Can_Drv_GetMaxMbNumLimit..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000ea34+0000b4 Can_Drv_EnterFreezeMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000eae8+000076 Can_Drv_ExitFreezeMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000eb5e+00002a Can_Drv_SoftResetController..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000eb88+00009c Can_Drv_SetGlobalConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000ec24+000014 Can_Drv_SetBaudRate..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000ec38+000096 Can_Drv_SetFifoParameter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000ecce+000064 Can_Drv_SetMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000ed32+0000c8 Can_Drv_InitHandle..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000edfa+00008e Can_Drv_SetOperationMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000ee88+0000a6 Can_Drv_RxFifoIrqHandler..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000ef2e+000010 Can_Drv_UnlockRxMsgBuff..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000ef3e+0000ba Can_Drv_RxMbIrqHandler..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000eff8+0000f2 Can_Drv_TxMbIrqHandler..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000f0ea+0000d2 Can_Drv_ProcessMbAbnormalInter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_code       0000f1bc+000088 Can_Drv_AbortTransfer
 .mcal_code       0000f244+00006a Can_Drv_ConfigRxMb
 .mcal_code       0000f244+000000 __ghs_eofn_Can_Drv_AbortTransfer
 .mcal_code       0000f2ae+0000bc Can_Drv_Init
 .mcal_code       0000f2ae+000000 __ghs_eofn_Can_Drv_ConfigRxMb
 .mcal_code       0000f36a+000000 __ghs_eofn_Can_Drv_Init
 .mcal_code       0000f36c+000068 Can_Drv_DisableMbInterrupts
 .mcal_code       0000f3d4+000080 Can_Drv_Receive
 .mcal_code       0000f3d4+000000 __ghs_eofn_Can_Drv_DisableMbInterrupts
 .mcal_code       0000f454+0000a2 Can_Drv_RxFIFO
 .mcal_code       0000f454+000000 __ghs_eofn_Can_Drv_Receive
 .mcal_code       0000f4f6+000016 Can_Drv_ClearErrorStatus
 .mcal_code       0000f4f6+000000 __ghs_eofn_Can_Drv_RxFIFO
 .mcal_code       0000f50c+000038 Can_Drv_EnableInterrupts
 .mcal_code       0000f50c+000000 __ghs_eofn_Can_Drv_ClearErrorStatus
 .mcal_code       0000f544+000038 Can_Drv_DisableInterrupts
 .mcal_code       0000f544+000000 __ghs_eofn_Can_Drv_EnableInterrupts
 .mcal_code       0000f57c+000000 __ghs_eofn_Can_Drv_DisableInterrupts
 .mcal_code       0000f57c+000000 __ghs_eofn_Can_Drv_GetControllerRxErrorCounter
 .mcal_code       0000f57e+000050 Can_Drv_GetTransferStatus
 .mcal_code       0000f5ce+000084 Can_Drv_ManualBusOffRecovery
 .mcal_code       0000f5ce+000000 __ghs_eofn_Can_Drv_GetTransferStatus
 .mcal_code       0000f652+0000ae Can_Drv_WriteMainFunction
 .mcal_code       0000f652+000000 __ghs_eofn_Can_Drv_ManualBusOffRecovery
 .mcal_code       0000f700+000000 __ghs_eofn_Can_Drv_BusOffMainFunction
 .mcal_code       0000f700+000000 __ghs_eofn_Can_Drv_WriteMainFunction
 .mcal_code       0000f702+000050 Can_Drv_ConfigErrorInterrupt
 .mcal_code       0000f752+000000 __ghs_eofn_Can_Drv_ConfigErrorInterrupt
 .mcal_code       0000f754+00003a Can_Drv_SetRxMaskType
 .mcal_code       0000f754+000000 __ghs_eofn_Can_Drv_SetFdDataBitTiming
 .mcal_code       0000f78e+000000 __ghs_eofn_Can_Drv_SetRxMaskType
 .mcal_code       0000f794+000030 Can_Drv_SetStartMode
 .mcal_code       0000f7c4+000022 Can_Drv_SetStopMode
 .mcal_code       0000f7c4+000000 __ghs_eofn_Can_Drv_SetStartMode
 .mcal_code       0000f7e6+00002a Can_Drv_ConfigRxFifo
 .mcal_code       0000f7e6+000000 __ghs_eofn_Can_Drv_SetStopMode
 .mcal_code       0000f810+000076 Can_Drv_SendData
 .mcal_code       0000f810+000000 __ghs_eofn_Can_Drv_ConfigRxFifo
 .mcal_code       0000f886+000064 Can_Drv_SetRxIndividualMask
 .mcal_code       0000f886+000000 __ghs_eofn_Can_Drv_SendData
 .mcal_code       0000f8ea+00003c Can_Drv_SetRxFifoGlobalMask
 .mcal_code       0000f8ea+000000 __ghs_eofn_Can_Drv_SetRxIndividualMask
 .mcal_code       0000f926+000034 Can_Drv_SetRxFifoIndividualMask
 .mcal_code       0000f926+000000 __ghs_eofn_Can_Drv_SetRxFifoGlobalMask
 .mcal_code       0000f95a+00003a Can_Drv_SetTxArbitrationDelay
 .mcal_code       0000f95a+000000 __ghs_eofn_Can_Drv_SetRxFifoIndividualMask
 .mcal_code       0000f994+000000 __ghs_eofn_Can_Drv_SetTxArbitrationDelay
 .mcal_code       0000f996+0000b0 Can_Drv_ClearInjection
 .mcal_code       0000fa46+00004c Can_Drv_IntHandler
 .mcal_code       0000fa46+000000 __ghs_eofn_Can_Drv_ClearInjection
 .mcal_code       0000fa92+00004c Can_Drv_BusOffIntHandler
 .mcal_code       0000fa92+000000 __ghs_eofn_Can_Drv_IntHandler
 .mcal_code       0000fade+00004c Can_Drv_TxWarnIntHandler
 .mcal_code       0000fade+000000 __ghs_eofn_Can_Drv_BusOffIntHandler
 .mcal_code       0000fb2a+00004c Can_Drv_RxWarnIntHandler
 .mcal_code       0000fb2a+000000 __ghs_eofn_Can_Drv_TxWarnIntHandler
 .mcal_code       0000fb76+00004c Can_Drv_ErrorIntHandler
 .mcal_code       0000fb76+000000 __ghs_eofn_Can_Drv_RxWarnIntHandler
 .mcal_code       0000fbc2+000042 Can_Drv_WakeUpIntHandler
 .mcal_code       0000fbc2+000000 __ghs_eofn_Can_Drv_ErrorIntHandler
 .mcal_code       0000fc04+000080 Can_Drv_EccIntHandler
 .mcal_code       0000fc04+000000 __ghs_eofn_Can_Drv_WakeUpIntHandler
 .mcal_code       0000fc84+00000a Can_Drv_1_IntHandler
 .mcal_code       0000fc84+000000 __ghs_eofn_Can_Drv_EccIntHandler
 .mcal_code       0000fc8e+00002a Can_Drv_1_BusOffIrqHandler
 .mcal_code       0000fc8e+000000 __ghs_eofn_Can_Drv_1_IntHandler
 .mcal_code       0000fcb8+00002a Can_Drv_1_ErrIrqHandler
 .mcal_code       0000fcb8+000000 __ghs_eofn_Can_Drv_1_BusOffIrqHandler
 .mcal_code       0000fce2+00002e Can_Drv_1_Mb0To15IrqHandler
 .mcal_code       0000fce2+000000 __ghs_eofn_Can_Drv_1_ErrIrqHandler
 .mcal_code       0000fd10+00002e Can_Drv_1_Mb16To31IrqHandler
 .mcal_code       0000fd10+000000 __ghs_eofn_Can_Drv_1_Mb0To15IrqHandler
 .mcal_code       0000fd3e+00002e Can_Drv_1_Mb32To47IrqHandler
 .mcal_code       0000fd3e+000000 __ghs_eofn_Can_Drv_1_Mb16To31IrqHandler
 .mcal_code       0000fd6c+00002e Can_Drv_1_Mb48To63IrqHandler
 .mcal_code       0000fd6c+000000 __ghs_eofn_Can_Drv_1_Mb32To47IrqHandler
 .mcal_code       0000fd9a+00002a Can_Drv_1_TxWarnIrqHandler
 .mcal_code       0000fd9a+000000 __ghs_eofn_Can_Drv_1_Mb48To63IrqHandler
 .mcal_code       0000fdc4+00002a Can_Drv_1_RxWarnIrqHandler
 .mcal_code       0000fdc4+000000 __ghs_eofn_Can_Drv_1_TxWarnIrqHandler
 .mcal_code       0000fdee+00002a Can_Drv_1_SelfWakeupIrqHandler
 .mcal_code       0000fdee+000000 __ghs_eofn_Can_Drv_1_RxWarnIrqHandler
 .mcal_code       0000fe18+00002a Can_Drv_1_EccIrqHandler
 .mcal_code       0000fe18+000000 __ghs_eofn_Can_Drv_1_SelfWakeupIrqHandler
 .mcal_code       0000fe42+000062 Can_MbIrqCallback
 .mcal_code       0000fe42+000000 __ghs_eofn_Can_Drv_1_EccIrqHandler
 .mcal_code       0000fea4+000024 Can_ErrorIrqCallback
 .mcal_code       0000fea4+000000 __ghs_eofn_Can_MbIrqCallback
 .mcal_code       0000fec8+000008 SchM_Enter_Adc_SwNormalQueueUpdate
 .mcal_code       0000fec8+000000 __ghs_eofn_Can_ErrorIrqCallback
 .mcal_code       0000fed0+000008 SchM_Exit_Adc_SwNormalQueueUpdate
 .mcal_code       0000fed0+000000 __ghs_eofn_SchM_Enter_Adc_SwNormalQueueUpdate
 .mcal_code       0000fed8+000008 SchM_Enter_Adc_StartAdcConversion
 .mcal_code       0000fed8+000000 __ghs_eofn_SchM_Exit_Adc_SwNormalQueueUpdate
 .mcal_code       0000fee0+000008 SchM_Exit_Adc_StartAdcConversion
 .mcal_code       0000fee0+000000 __ghs_eofn_SchM_Enter_Adc_StartAdcConversion
 .mcal_code       0000fee8+000008 SchM_Enter_Adc_StartTdgConversion
 .mcal_code       0000fee8+000000 __ghs_eofn_SchM_Exit_Adc_StartAdcConversion
 .mcal_code       0000fef0+000008 SchM_Exit_Adc_StartTdgConversion
 .mcal_code       0000fef0+000000 __ghs_eofn_SchM_Enter_Adc_StartTdgConversion
 .mcal_code       0000fef8+000008 SchM_Enter_Can_DisableIntGlobal
 .mcal_code       0000fef8+000000 __ghs_eofn_SchM_Exit_Adc_StartTdgConversion
 .mcal_code       0000ff00+000008 SchM_Exit_Can_DisableIntGlobal
 .mcal_code       0000ff00+000000 __ghs_eofn_SchM_Enter_Can_DisableIntGlobal
 .mcal_code       0000ff08+000008 SchM_Enter_Can_DisableModule
 .mcal_code       0000ff08+000000 __ghs_eofn_SchM_Exit_Can_DisableIntGlobal
 .mcal_code       0000ff10+000008 SchM_Exit_Can_DisableModule
 .mcal_code       0000ff10+000000 __ghs_eofn_SchM_Enter_Can_DisableModule
 .mcal_code       0000ff18+000008 SchM_Enter_Can_SetStandardBitTiming
 .mcal_code       0000ff18+000000 __ghs_eofn_SchM_Exit_Can_DisableModule
 .mcal_code       0000ff20+000008 SchM_Exit_Can_SetStandardBitTiming
 .mcal_code       0000ff20+000000 __ghs_eofn_SchM_Enter_Can_SetStandardBitTiming
 .mcal_code       0000ff28+000008 SchM_Enter_Can_SetTxArbitrationDelay
 .mcal_code       0000ff28+000000 __ghs_eofn_SchM_Exit_Can_SetStandardBitTiming
 .mcal_code       0000ff30+000008 SchM_Exit_Can_SetTxArbitrationDelay
 .mcal_code       0000ff30+000000 __ghs_eofn_SchM_Enter_Can_SetTxArbitrationDelay
 .mcal_code       0000ff38+000008 SchM_Enter_Can_InterMaskBuff
 .mcal_code       0000ff38+000000 __ghs_eofn_SchM_Exit_Can_SetTxArbitrationDelay
 .mcal_code       0000ff40+000008 SchM_Exit_Can_InterMaskBuff
 .mcal_code       0000ff40+000000 __ghs_eofn_SchM_Enter_Can_InterMaskBuff
 .mcal_code       0000ff48+000008 SchM_Enter_Can_RecoveryBusOff
 .mcal_code       0000ff48+000000 __ghs_eofn_SchM_Exit_Can_InterMaskBuff
 .mcal_code       0000ff50+000008 SchM_Exit_Can_RecoveryBusOff
 .mcal_code       0000ff50+000000 __ghs_eofn_SchM_Enter_Can_RecoveryBusOff
 .mcal_code       0000ff58+000008 SchM_Enter_Can_CanCtl2Reg
 .mcal_code       0000ff58+000000 __ghs_eofn_SchM_Exit_Can_RecoveryBusOff
 .mcal_code       0000ff60+000008 SchM_Exit_Can_CanCtl2Reg
 .mcal_code       0000ff60+000000 __ghs_eofn_SchM_Enter_Can_CanCtl2Reg
 .mcal_code       0000ff68+000008 SchM_Enter_Can_CanMcrReg
 .mcal_code       0000ff68+000000 __ghs_eofn_SchM_Exit_Can_CanCtl2Reg
 .mcal_code       0000ff70+000008 SchM_Exit_Can_CanMcrReg
 .mcal_code       0000ff70+000000 __ghs_eofn_SchM_Enter_Can_CanMcrReg
 .mcal_code       0000ff78+000008 SchM_Enter_Can_CanMecrReg
 .mcal_code       0000ff78+000000 __ghs_eofn_SchM_Exit_Can_CanMcrReg
 .mcal_code       0000ff80+000008 SchM_Exit_Can_CanMecrReg
 .mcal_code       0000ff80+000000 __ghs_eofn_SchM_Enter_Can_CanMecrReg
 .mcal_code       0000ff88+000008 SchM_Enter_Can_CanRxmgMskReg
 .mcal_code       0000ff88+000000 __ghs_eofn_SchM_Exit_Can_CanMecrReg
 .mcal_code       0000ff90+000008 SchM_Exit_Can_CanRxmgMskReg
 .mcal_code       0000ff90+000000 __ghs_eofn_SchM_Enter_Can_CanRxmgMskReg
 .mcal_code       0000ff98+000008 SchM_Enter_Can_CanCtl1Reg
 .mcal_code       0000ff98+000000 __ghs_eofn_SchM_Exit_Can_CanRxmgMskReg
 .mcal_code       0000ffa0+000008 SchM_Exit_Can_CanCtl1Reg
 .mcal_code       0000ffa0+000000 __ghs_eofn_SchM_Enter_Can_CanCtl1Reg
 .mcal_code       0000ffa8+000008 SchM_Enter_Dio_WritePortData
 .mcal_code       0000ffa8+000000 __ghs_eofn_SchM_Exit_Can_CanCtl1Reg
 .mcal_code       0000ffb0+000008 SchM_Exit_Dio_WritePortData
 .mcal_code       0000ffb0+000000 __ghs_eofn_SchM_Enter_Dio_WritePortData
 .mcal_code       0000ffb8+000008 SchM_Enter_Dma_ChannelRequest
 .mcal_code       0000ffb8+000000 __ghs_eofn_SchM_Exit_Dio_WritePortData
 .mcal_code       0000ffc0+000008 SchM_Exit_Dma_ChannelRequest
 .mcal_code       0000ffc0+000000 __ghs_eofn_SchM_Enter_Dma_ChannelRequest
 .mcal_code       0000ffc8+000008 SchM_Enter_Dma_ClearIntStatus
 .mcal_code       0000ffc8+000000 __ghs_eofn_SchM_Exit_Dma_ChannelRequest
 .mcal_code       0000ffd0+000008 SchM_Exit_Dma_ClearIntStatus
 .mcal_code       0000ffd0+000000 __ghs_eofn_SchM_Enter_Dma_ClearIntStatus
 .mcal_code       0000ffd8+000008 SchM_Enter_Dma_DmaChConfig
 .mcal_code       0000ffd8+000000 __ghs_eofn_SchM_Exit_Dma_ClearIntStatus
 .mcal_code       0000ffe0+000008 SchM_Exit_Dma_DmaChConfig
 .mcal_code       0000ffe0+000000 __ghs_eofn_SchM_Enter_Dma_DmaChConfig
 .mcal_code       0000ffe8+000008 SchM_Enter_Dma_DmamuxChCfg
 .mcal_code       0000ffe8+000000 __ghs_eofn_SchM_Exit_Dma_DmaChConfig
 .mcal_code       0000fff0+000008 SchM_Exit_Dma_DmamuxChCfg
 .mcal_code       0000fff0+000000 __ghs_eofn_SchM_Enter_Dma_DmamuxChCfg
 .mcal_code       0000fff8+000008 SchM_Enter_Dma_DmaEie
 .mcal_code       0000fff8+000000 __ghs_eofn_SchM_Exit_Dma_DmamuxChCfg
 .mcal_code       00010000+000008 SchM_Exit_Dma_DmaEie
 .mcal_code       00010000+000000 __ghs_eofn_SchM_Enter_Dma_DmaEie
 .mcal_code       00010008+000008 SchM_Enter_Dma_DmaCprio
 .mcal_code       00010008+000000 __ghs_eofn_SchM_Exit_Dma_DmaEie
 .mcal_code       00010010+000008 SchM_Exit_Dma_DmaCprio
 .mcal_code       00010010+000000 __ghs_eofn_SchM_Enter_Dma_DmaCprio
 .mcal_code       00010018+000008 SchM_Enter_Dma_DmaConfig
 .mcal_code       00010018+000000 __ghs_eofn_SchM_Exit_Dma_DmaCprio
 .mcal_code       00010020+000008 SchM_Exit_Dma_DmaConfig
 .mcal_code       00010020+000000 __ghs_eofn_SchM_Enter_Dma_DmaConfig
 .mcal_code       00010028+000008 SchM_Enter_Gpt_StimControlAndStatusReg
 .mcal_code       00010028+000000 __ghs_eofn_SchM_Exit_Dma_DmaConfig
 .mcal_code       00010030+000008 SchM_Exit_Gpt_StimControlAndStatusReg
 .mcal_code       00010030+000000 __ghs_eofn_SchM_Enter_Gpt_StimControlAndStatusReg
 .mcal_code       00010038+000008 SchM_Enter_Mcu_SetMode
 .mcal_code       00010038+000000 __ghs_eofn_SchM_Exit_Gpt_StimControlAndStatusReg
 .mcal_code       00010040+000008 SchM_Exit_Mcu_SetMode
 .mcal_code       00010040+000000 __ghs_eofn_SchM_Enter_Mcu_SetMode
 .mcal_code       00010048+000008 SchM_Enter_Port_WritePortPcr
 .mcal_code       00010048+000000 __ghs_eofn_SchM_Exit_Mcu_SetMode
 .mcal_code       00010050+000008 SchM_Exit_Port_WritePortPcr
 .mcal_code       00010050+000000 __ghs_eofn_SchM_Enter_Port_WritePortPcr
 .mcal_code       00010058+000008 SchM_Enter_Port_WriteGpioPddr
 .mcal_code       00010058+000000 __ghs_eofn_SchM_Exit_Port_WritePortPcr
 .mcal_code       00010060+000008 SchM_Exit_Port_WriteGpioPddr
 .mcal_code       00010060+000000 __ghs_eofn_SchM_Enter_Port_WriteGpioPddr
 .mcal_code       00010068+000008 SchM_Enter_Pwm_SetMcpwmNotifIrq
 .mcal_code       00010068+000000 __ghs_eofn_SchM_Exit_Port_WriteGpioPddr
 .mcal_code       00010070+000008 SchM_Exit_Pwm_SetMcpwmNotifIrq
 .mcal_code       00010070+000000 __ghs_eofn_SchM_Enter_Pwm_SetMcpwmNotifIrq
 .mcal_code       00010078+000008 SchM_Enter_Pwm_SetMcpwmGlobalControlRegister
 .mcal_code       00010078+000000 __ghs_eofn_SchM_Exit_Pwm_SetMcpwmNotifIrq
 .mcal_code       00010080+000008 SchM_Exit_Pwm_SetMcpwmGlobalControlRegister
 .mcal_code       00010080+000000 __ghs_eofn_SchM_Enter_Pwm_SetMcpwmGlobalControlRegister
 .mcal_code       00010088+000008 SchM_Enter_Pwm_SetMcpwmSoftwareControlRegister
 .mcal_code       00010088+000000 __ghs_eofn_SchM_Exit_Pwm_SetMcpwmGlobalControlRegister
 .mcal_code       00010090+000008 SchM_Exit_Pwm_SetMcpwmSoftwareControlRegister
 .mcal_code       00010090+000000 __ghs_eofn_SchM_Enter_Pwm_SetMcpwmSoftwareControlRegister
 .mcal_code       00010098+000008 SchM_Enter_Pwm_SetMcpwmChannelConfigurationRegister
 .mcal_code       00010098+000000 __ghs_eofn_SchM_Exit_Pwm_SetMcpwmSoftwareControlRegister
 .mcal_code       000100a0+000008 SchM_Exit_Pwm_SetMcpwmChannelConfigurationRegister
 .mcal_code       000100a0+000000 __ghs_eofn_SchM_Enter_Pwm_SetMcpwmChannelConfigurationRegister
 .mcal_code       000100a8+000008 SchM_Enter_Pwm_SetMcpwmGlobalStatusRegister
 .mcal_code       000100a8+000000 __ghs_eofn_SchM_Exit_Pwm_SetMcpwmChannelConfigurationRegister
 .mcal_code       000100b0+000008 SchM_Exit_Pwm_SetMcpwmGlobalStatusRegister
 .mcal_code       000100b0+000000 __ghs_eofn_SchM_Enter_Pwm_SetMcpwmGlobalStatusRegister
 .mcal_code       000100b8+000008 SchM_Enter_Pwm_SetMcpwmModuloValueRegister
 .mcal_code       000100b8+000000 __ghs_eofn_SchM_Exit_Pwm_SetMcpwmGlobalStatusRegister
 .mcal_code       000100c0+000008 SchM_Exit_Pwm_SetMcpwmModuloValueRegister
 .mcal_code       000100c0+000000 __ghs_eofn_SchM_Enter_Pwm_SetMcpwmModuloValueRegister
 .mcal_code       000100c8+000008 SchM_Enter_Pwm_SetMcpwmChannelValueRegister
 .mcal_code       000100c8+000000 __ghs_eofn_SchM_Exit_Pwm_SetMcpwmModuloValueRegister
 .mcal_code       000100d0+000008 SchM_Exit_Pwm_SetMcpwmChannelValueRegister
 .mcal_code       000100d0+000000 __ghs_eofn_SchM_Enter_Pwm_SetMcpwmChannelValueRegister
 .mcal_code       000100d8+000008 SchM_Enter_Pwm_SetMcpwmReloadRegister
 .mcal_code       000100d8+000000 __ghs_eofn_SchM_Exit_Pwm_SetMcpwmChannelValueRegister
 .mcal_code       000100e0+000008 SchM_Exit_Pwm_SetMcpwmReloadRegister
 .mcal_code       000100e0+000000 __ghs_eofn_SchM_Enter_Pwm_SetMcpwmReloadRegister
 .mcal_code       000100e8+000008 SchM_Enter_Pwm_SetMcpwmChannelState
 .mcal_code       000100e8+000000 __ghs_eofn_SchM_Exit_Pwm_SetMcpwmReloadRegister
 .mcal_code       000100f0+000008 SchM_Exit_Pwm_SetMcpwmChannelState
 .mcal_code       000100f0+000000 __ghs_eofn_SchM_Enter_Pwm_SetMcpwmChannelState
 .mcal_code       000100f8+000008 SchM_Enter_Pwm_SetTimNotifIrq
 .mcal_code       000100f8+000000 __ghs_eofn_SchM_Exit_Pwm_SetMcpwmChannelState
 .mcal_code       00010100+000008 SchM_Exit_Pwm_SetTimNotifIrq
 .mcal_code       00010100+000000 __ghs_eofn_SchM_Enter_Pwm_SetTimNotifIrq
 .mcal_code       00010108+000008 SchM_Enter_Pwm_SetTimGlobalControlRegister
 .mcal_code       00010108+000000 __ghs_eofn_SchM_Exit_Pwm_SetTimNotifIrq
 .mcal_code       00010110+000008 SchM_Exit_Pwm_SetTimGlobalControlRegister
 .mcal_code       00010110+000000 __ghs_eofn_SchM_Enter_Pwm_SetTimGlobalControlRegister
 .mcal_code       00010118+000008 SchM_Enter_Pwm_SetTimSoftwareControlRegister
 .mcal_code       00010118+000000 __ghs_eofn_SchM_Exit_Pwm_SetTimGlobalControlRegister
 .mcal_code       00010120+000008 SchM_Exit_Pwm_SetTimSoftwareControlRegister
 .mcal_code       00010120+000000 __ghs_eofn_SchM_Enter_Pwm_SetTimSoftwareControlRegister
 .mcal_code       00010128+000008 SchM_Enter_Pwm_SetTimReloadRegister
 .mcal_code       00010128+000000 __ghs_eofn_SchM_Exit_Pwm_SetTimSoftwareControlRegister
 .mcal_code       00010130+000008 SchM_Exit_Pwm_SetTimReloadRegister
 .mcal_code       00010130+000000 __ghs_eofn_SchM_Enter_Pwm_SetTimReloadRegister
 .mcal_code       00010138+000008 SchM_Enter_Pwm_SetTimChannelConfigurationRegister
 .mcal_code       00010138+000000 __ghs_eofn_SchM_Exit_Pwm_SetTimReloadRegister
 .mcal_code       00010140+000008 SchM_Exit_Pwm_SetTimChannelConfigurationRegister
 .mcal_code       00010140+000000 __ghs_eofn_SchM_Enter_Pwm_SetTimChannelConfigurationRegister
 .mcal_code       00010148+000008 SchM_Enter_Pwm_SetTimGlobalStatusRegister
 .mcal_code       00010148+000000 __ghs_eofn_SchM_Exit_Pwm_SetTimChannelConfigurationRegister
 .mcal_code       00010150+000008 SchM_Exit_Pwm_SetTimGlobalStatusRegister
 .mcal_code       00010150+000000 __ghs_eofn_SchM_Enter_Pwm_SetTimGlobalStatusRegister
 .mcal_code       00010158+000008 SchM_Enter_Pwm_SetTimModuloValueRegister
 .mcal_code       00010158+000000 __ghs_eofn_SchM_Exit_Pwm_SetTimGlobalStatusRegister
 .mcal_code       00010160+000008 SchM_Exit_Pwm_SetTimModuloValueRegister
 .mcal_code       00010160+000000 __ghs_eofn_SchM_Enter_Pwm_SetTimModuloValueRegister
 .mcal_code       00010168+000008 SchM_Enter_Pwm_SetTimCompValueRegister
 .mcal_code       00010168+000000 __ghs_eofn_SchM_Exit_Pwm_SetTimModuloValueRegister
 .mcal_code       00010170+000008 SchM_Exit_Pwm_SetTimCompValueRegister
 .mcal_code       00010170+000000 __ghs_eofn_SchM_Enter_Pwm_SetTimCompValueRegister
 .mcal_code       00010178+000008 SchM_Enter_Pwm_SetTimChannelState
 .mcal_code       00010178+000000 __ghs_eofn_SchM_Exit_Pwm_SetTimCompValueRegister
 .mcal_code       00010180+000008 SchM_Exit_Pwm_SetTimChannelState
 .mcal_code       00010180+000000 __ghs_eofn_SchM_Enter_Pwm_SetTimChannelState
 .mcal_code       00010188+000008 SchM_Enter_Spi_UpdateTransferStatus
 .mcal_code       00010188+000000 __ghs_eofn_SchM_Exit_Pwm_SetTimChannelState
 .mcal_code       00010190+000008 SchM_Exit_Spi_UpdateTransferStatus
 .mcal_code       00010190+000000 __ghs_eofn_SchM_Enter_Spi_UpdateTransferStatus
 .mcal_code       00010198+000008 SchM_Enter_Spi_UpdateAsyncHWUnitQueue
 .mcal_code       00010198+000000 __ghs_eofn_SchM_Exit_Spi_UpdateTransferStatus
 .mcal_code       000101a0+000008 SchM_Exit_Spi_UpdateAsyncHWUnitQueue
 .mcal_code       000101a0+000000 __ghs_eofn_SchM_Enter_Spi_UpdateAsyncHWUnitQueue
 .mcal_code       000101a8+000008 SchM_Enter_Spi_UpdateSyncHWUnitStatus
 .mcal_code       000101a8+000000 __ghs_eofn_SchM_Exit_Spi_UpdateAsyncHWUnitQueue
 .mcal_code       000101b0+000008 SchM_Exit_Spi_UpdateSyncHWUnitStatus
 .mcal_code       000101b0+000000 __ghs_eofn_SchM_Enter_Spi_UpdateSyncHWUnitStatus
 .mcal_code       000101b8+000008 SchM_Enter_Spi_UpdateChannelState
 .mcal_code       000101b8+000000 __ghs_eofn_SchM_Exit_Spi_UpdateSyncHWUnitStatus
 .mcal_code       000101c0+000008 SchM_Exit_Spi_UpdateChannelState
 .mcal_code       000101c0+000000 __ghs_eofn_SchM_Enter_Spi_UpdateChannelState
 .mcal_code       000101c8+000008 SchM_Enter_Spi_UpdateJobState
 .mcal_code       000101c8+000000 __ghs_eofn_SchM_Exit_Spi_UpdateChannelState
 .mcal_code       000101d0+000008 SchM_Exit_Spi_UpdateJobState
 .mcal_code       000101d0+000000 __ghs_eofn_SchM_Enter_Spi_UpdateJobState
 .mcal_code       000101d8+000008 SchM_Enter_Spi_InitTxTransfer
 .mcal_code       000101d8+000000 __ghs_eofn_SchM_Exit_Spi_UpdateJobState
 .mcal_code       000101e0+000008 SchM_Exit_Spi_InitTxTransfer
 .mcal_code       000101e0+000000 __ghs_eofn_SchM_Enter_Spi_InitTxTransfer
 .mcal_code       000101e8+000008 SchM_Enter_Spi_WriteInterruptMaskReg
 .mcal_code       000101e8+000000 __ghs_eofn_SchM_Exit_Spi_InitTxTransfer
 .mcal_code       000101f0+000008 SchM_Exit_Spi_WriteInterruptMaskReg
 .mcal_code       000101f0+000000 __ghs_eofn_SchM_Enter_Spi_WriteInterruptMaskReg
 .mcal_code       000101f8+000008 SchM_Enter_Wdg_ProtectWdgState
 .mcal_code       000101f8+000000 __ghs_eofn_SchM_Exit_Spi_WriteInterruptMaskReg
 .mcal_code       00010200+000008 SchM_Exit_Wdg_ProtectWdgState
 .mcal_code       00010200+000000 __ghs_eofn_SchM_Enter_Wdg_ProtectWdgState
 .mcal_code       00010208+000008 SchM_Enter_Wdg_WriteRegData
 .mcal_code       00010208+000000 __ghs_eofn_SchM_Exit_Wdg_ProtectWdgState
 .mcal_code       00010210+000008 SchM_Exit_Wdg_WriteRegData
 .mcal_code       00010210+000000 __ghs_eofn_SchM_Enter_Wdg_WriteRegData
 .mcal_code       00010218+000018 McalLib_Init
 .mcal_code       00010218+000000 __ghs_eofn_SchM_Exit_Wdg_WriteRegData
 .mcal_code       00010230+000020 McalLib_GetCounterValue
 .mcal_code       00010230+000000 __ghs_eofn_McalLib_Init
 .mcal_code       00010250+00002a McalLib_GetElapsedValue
 .mcal_code       00010250+000000 __ghs_eofn_McalLib_GetCounterValue
 .mcal_code       0001027a+00001c McalLib_MicroSecToTicks
 .mcal_code       0001027a+000000 __ghs_eofn_McalLib_GetElapsedValue
 .mcal_code       00010296+00002e McalLib_SuspendAllInterrupts
 .mcal_code       00010296+000000 __ghs_eofn_McalLib_MicroSecToTicks
 .mcal_code       000102c4+000020 McalLib_ResumeAllInterrupts
 .mcal_code       000102c4+000000 __ghs_eofn_McalLib_SuspendAllInterrupts
 .mcal_code       000102e4+000006 McalLib_DetReportError..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcalLib_OsCounter.
 .mcal_code       000102e4+000000 __ghs_eofn_McalLib_ResumeAllInterrupts
 .mcal_code       000102ea+000018 McalLib_Systick_Init..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcalLib_OsCounter.
 .mcal_code       00010302+000016 McalLib_Systick_GetCounterValue..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcalLib_OsCounter.
 .mcal_code       00010318+00003e McalLib_Systick_GetElapsedValue..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcalLib_OsCounter.
 .mcal_code       00010356+000042 McalLib_OsCounter_Init
 .mcal_code       00010398+00002a McalLib_OsCounter_GetCounterValue
 .mcal_code       00010398+000000 __ghs_eofn_McalLib_OsCounter_Init
 .mcal_code       000103c2+000026 McalLib_OsCounter_GetElapsedValue
 .mcal_code       000103c2+000000 __ghs_eofn_McalLib_OsCounter_GetCounterValue
 .mcal_code       000103e8+000062 McalLib_OsCounter_MicroSecToTicks
 .mcal_code       000103e8+000000 __ghs_eofn_McalLib_OsCounter_GetElapsedValue
 .mcal_code       0001044a+000018 Mcu_CheckInit..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_code       0001044a+000000 __ghs_eofn_McalLib_OsCounter_MicroSecToTicks
 .mcal_code       00010462+00002e Mcu_CheckInitClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_code       00010490+00001e Mcu_CheckDistributePllClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_code       000104ae+00002e Mcu_CheckSetMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_code       000104dc+000026 Mcu_CheckMcuInitialized..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_code       00010502+000034 Mcu_StoreConfiguredModeId..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_code       00010536+000034 Mcu_StoreConfiguredClockId..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_code       0001056a+000050 Mcu_Init
 .mcal_code       000105ba+00004a Mcu_InitClock
 .mcal_code       000105ba+000000 __ghs_eofn_Mcu_Init
 .mcal_code       00010604+000020 Mcu_DistributePllClock
 .mcal_code       00010604+000000 __ghs_eofn_Mcu_InitClock
 .mcal_code       00010624+000020 Mcu_GetPllStatus
 .mcal_code       00010624+000000 __ghs_eofn_Mcu_DistributePllClock
 .mcal_code       00010644+00006e Mcu_SetMode
 .mcal_code       00010644+000000 __ghs_eofn_Mcu_GetPllStatus
 .mcal_code       000106b2+000024 Mcu_Drvw_Init
 .mcal_code       000106b2+000000 __ghs_eofn_Mcu_SetMode
 .mcal_code       000106d6+00001a Mcu_Drvw_InitClock
 .mcal_code       000106d6+000000 __ghs_eofn_Mcu_Drvw_Init
 .mcal_code       000106f0+00001e Mcu_Drvw_DistributePllClock
 .mcal_code       000106f0+000000 __ghs_eofn_Mcu_Drvw_InitClock
 .mcal_code       0001070e+000008 Mcu_Drvw_GetPllStatus
 .mcal_code       0001070e+000000 __ghs_eofn_Mcu_Drvw_DistributePllClock
 .mcal_code       00010716+000030 Mcu_Drvw_SetMode
 .mcal_code       00010716+000000 __ghs_eofn_Mcu_Drvw_GetPllStatus
 .mcal_code       00010746+000040 Parcc_Drv_ResetParccModule..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_code       00010746+000000 __ghs_eofn_Mcu_Drvw_SetMode
 .mcal_code       00010786+000042 Parcc_Drv_EnableParccModule..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_code       000107c8+000040 Parcc_Drv_DisableParccModule..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_code       00010808+000054 Parcc_Drv_SetParccClockDivider..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_code       0001085c+00008e Parcc_Drv_SetParccClockSrc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_code       000108ea+000050 Parcc_Drv_ConfigParccAccess..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_code       0001093a+00007c Parcc_Drv_Init
 .mcal_code       000109b6+000000 __ghs_eofn_Parcc_Drv_Init
 .mcal_code       000109b8+000074 Pmu_Drv_ConfigControlAndStatusReg..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPmu_Drv.
 .mcal_code       00010a2c+00004c Pmu_Drv_ConfigInterrupt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPmu_Drv.
 .mcal_code       00010a78+000050 Pmu_Drv_Init
 .mcal_code       00010ac8+00002c Pmu_Drv_ClearIsolationClear
 .mcal_code       00010ac8+000000 __ghs_eofn_Pmu_Drv_Init
 .mcal_code       00010af4+000036 Scc_Drv_GetLpo32KClockReadyState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010af4+000000 __ghs_eofn_Pmu_Drv_ClearIsolationClear
 .mcal_code       00010b2a+000036 Scc_Drv_GetSOscClockReadyState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010b60+000036 Scc_Drv_GetFirc64MClockReadyState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010b96+000036 Scc_Drv_GetFOscClockReadyState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010bcc+000052 Scc_Drv_GetPllClockReadyState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010c1e+000028 Scc_Drv_DisableFirc64MClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010c46+000028 Scc_Drv_ConfigFirc64MClockInStopMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010c6e+000028 Scc_Drv_EnableLDOOverDrive..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010c96+00003e Scc_Drv_EnablePllClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010cd4+000028 Scc_Drv_ConfigPllClockInStopMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010cfc+00005e Scc_Drv_EnableFOscClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010d5a+000030 Scc_Drv_DisablePllClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010d8a+000028 Scc_Drv_ConfigFOscClockInStopMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010db2+000068 Scc_Drv_ConfigPllClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010e1a+000046 Scc_Drv_DisableFOscClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010e60+00002c Scc_Drv_EnableLpo32KClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010e8c+00002c Scc_Drv_DisableLpo32KClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010eb8+000048 Scc_Drv_EnableSOscClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010f00+000034 Scc_Drv_DisableSOscClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010f34+000080 Scc_Drv_SetSysClockDivider..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010fb4+00002a Scc_Drv_SetSysClockSrcWithFirc64M..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00010fde+00002a Scc_Drv_SetSysClockSrcWithFOsc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00011008+00002a Scc_Drv_SetSysClockSrcWithPll..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00011032+000030 Scc_Drv_UpdateFlsWaitCounter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_code       00011062+0000ac Scc_Drv_ConfigSccClock
 .mcal_code       0001110e+000024 Scc_Drv_GetPllClockStatus
 .mcal_code       0001110e+000000 __ghs_eofn_Scc_Drv_ConfigSccClock
 .mcal_code       00011132+000020 Scc_Drv_GetPllClockSelectedState
 .mcal_code       00011132+000000 __ghs_eofn_Scc_Drv_GetPllClockStatus
 .mcal_code       00011152+00006c Scc_Drv_SetSysClockSrc
 .mcal_code       00011152+000000 __ghs_eofn_Scc_Drv_GetPllClockSelectedState
 .mcal_code       000111be+000014 Scc_Drv_GetPllClockFreq
 .mcal_code       000111be+000000 __ghs_eofn_Scc_Drv_SetSysClockSrc
 .mcal_code       000111d2+000048 Scc_Drv_GetClockReadyState
 .mcal_code       000111d2+000000 __ghs_eofn_Scc_Drv_GetPllClockFreq
 .mcal_code       0001121a+000000 __ghs_eofn_Scc_Drv_GetClockReadyState
 .mcal_code       0001121c+00004a Scm_Mcu_Drv_SetInterrupt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScm_Mcu_Drv.
 .mcal_code       00011266+00003a Scm_Mcu_Drv_SetSramReadBuffer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScm_Mcu_Drv.
 .mcal_code       000112a0+000020 Scm_Mcu_Drv_SetCacheMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScm_Mcu_Drv.
 .mcal_code       000112c0+00001e Scm_Mcu_Drv_SetParityFaultMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScm_Mcu_Drv.
 .mcal_code       000112de+00001e Scm_Mcu_Drv_SetParityMissMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScm_Mcu_Drv.
 .mcal_code       000112fc+000066 Scm_Mcu_Drv_ConfigTimerInput..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScm_Mcu_Drv.
 .mcal_code       00011362+00003e Scm_Mcu_Drv_ConfigAdcChannelMux..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScm_Mcu_Drv.
 .mcal_code       000113a0+000070 Scm_Mcu_Drv_ConfigClockOut..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScm_Mcu_Drv.
 .mcal_code       00011410+00001e Scm_Mcu_Drv_DisableClockOut..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScm_Mcu_Drv.
 .mcal_code       0001142e+0000b4 Scm_Mcu_Drv_Init
 .mcal_code       000114e2+00001a Scm_Mcu_Drv_InitClockOut
 .mcal_code       000114e2+000000 __ghs_eofn_Scm_Mcu_Drv_Init
 .mcal_code       000114fc+00006c Scm_Mcu_Drv_UpdateClockOut
 .mcal_code       000114fc+000000 __ghs_eofn_Scm_Mcu_Drv_InitClockOut
 .mcal_code       00011568+000022 Srmc_Drv_ConfigPowerModeWakeupSrc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       00011568+000000 __ghs_eofn_Scm_Mcu_Drv_UpdateClockOut
 .mcal_code       0001158a+00001e Srmc_Drv_ConfigCoreLockupReset..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       000115a8+00001e Srmc_Drv_ConfigResetPinFilterBusClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       000115c6+000026 Srmc_Drv_ConfigResetPinFilterInStopMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       000115ec+00001e Srmc_Drv_ConfigResetPinFilterInNormalMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       0001160a+000046 Srmc_Drv_ConfigSysResetInterrupt..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       00011650+00001e Srmc_Drv_ConfigMaxResetDelayTime..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       0001166e+00001e Srmc_Drv_ConfigStandbyModeState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       0001168c+000026 Srmc_Drv_EnterWaitMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       000116b2+00001e Srmc_Drv_ConfigStopModeAckTimeout..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       000116d0+00003a Srmc_Drv_EnterStandbyMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       0001170a+00003c Srmc_Drv_EnterStopMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSrmc_Drv.
 .mcal_code       00011746+00003e Srmc_Drv_GetCurrentPowerMode
 .mcal_code       00011784+00002c Srmc_Drv_InitResetConfiguration
 .mcal_code       00011784+000000 __ghs_eofn_Srmc_Drv_GetCurrentPowerMode
 .mcal_code       000117b0+00001c Srmc_Drv_InitPowerMode
 .mcal_code       000117b0+000000 __ghs_eofn_Srmc_Drv_InitResetConfiguration
 .mcal_code       000117cc+000030 Srmc_Drv_SetMode
 .mcal_code       000117cc+000000 __ghs_eofn_Srmc_Drv_InitPowerMode
 .mcal_code       000117fc+00004a Port_CheckInit..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort.
 .mcal_code       000117fc+000000 __ghs_eofn_Srmc_Drv_SetMode
 .mcal_code       00011846+000034 Port_Init
 .mcal_code       0001187a+000122 Port_Drv_InitPins..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort_Drv.
 .mcal_code       0001187a+000000 __ghs_eofn_Port_Init
 .mcal_code       0001199c+000014 Port_Drv_SetPinOutput
 .mcal_code       000119b0+000014 Port_Drv_ClearPinOutput
 .mcal_code       000119b0+000000 __ghs_eofn_Port_Drv_SetPinOutput
 .mcal_code       000119c4+00002c Port_Drv_SetPinDirection
 .mcal_code       000119c4+000000 __ghs_eofn_Port_Drv_ClearPinOutput
 .mcal_code       000119f0+00001a Port_Drv_Init
 .mcal_code       000119f0+000000 __ghs_eofn_Port_Drv_SetPinDirection
 .mcal_code       00011a0a+000064 Port_Drv_SetSlewRate
 .mcal_code       00011a0a+000000 __ghs_eofn_Port_Drv_Init
 .mcal_code       00011a6e+00007c Port_Drv_SetPullConfig
 .mcal_code       00011a6e+000000 __ghs_eofn_Port_Drv_SetSlewRate
 .mcal_code       00011aea+000096 Port_Drvw_InitUnconfigPins..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort_Drvw.
 .mcal_code       00011aea+000000 __ghs_eofn_Port_Drv_SetPullConfig
 .mcal_code       00011b80+000014 Port_Drvw_Init
 .mcal_code       00011b94+00006a Dio_WriteChannel
 .mcal_code       00011b94+000000 __ghs_eofn_Port_Drvw_Init
 .mcal_code       00011bfe+000014 Dio_Drvw_WriteChannel
 .mcal_code       00011bfe+000000 __ghs_eofn_Dio_WriteChannel
 .mcal_code       00011c12+00002e Gpio_Drv_WritePin
 .mcal_code       00011c12+000000 __ghs_eofn_Dio_Drvw_WriteChannel
 .mcal_code       00011c40+000002 CanIf_ControllerBusOff
 .mcal_code       00011c40+000000 __ghs_eofn_Gpio_Drv_WritePin
 .mcal_code       00011c42+000002 CanIf_ControllerModeIndication
 .mcal_code       00011c42+000000 __ghs_eofn_CanIf_ControllerBusOff
 .mcal_code       00011c44+000016 CanIf_TxConfirmation
 .mcal_code       00011c44+000000 __ghs_eofn_CanIf_ControllerModeIndication
 .mcal_code       00011c5a+000018 CanIf_RxIndication
 .mcal_code       00011c5a+000000 __ghs_eofn_CanIf_TxConfirmation
 .mcal_code       00011c72+000032 Ex_Can_StimCallback
 .mcal_code       00011c72+000000 __ghs_eofn_CanIf_RxIndication
 .mcal_code       00011ca4+000044 Ex_Can_CheckDmaRxResult..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func.
 .mcal_code       00011ca4+000000 __ghs_eofn_Ex_Can_StimCallback
 .mcal_code       00011ce8+000074 Ex_Can_CheckPollingRxResult..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func.
 .mcal_code       00011d5c+0000a8 Ex_Can_UseCase_01
 .mcal_code       00011e04+000098 TaskCAN
 .mcal_code       00011e04+000000 __ghs_eofn_Ex_Can_UseCase_01
 .mcal_code       00011e9c+000002 Can1_ErrNotifyFunc
 .mcal_code       00011e9c+000000 __ghs_eofn_TaskCAN
 .mcal_code       00011e9e+000004 CAN_LPduRxFunc
 .mcal_code       00011e9e+000000 __ghs_eofn_Can1_ErrNotifyFunc
 .mcal_code       00011ea2+000002 CanIf_ErrorNotification
 .mcal_code       00011ea2+000000 __ghs_eofn_CAN_LPduRxFunc
 .mcal_code       00011ea4+000002 Can1_HostMemNotify
 .mcal_code       00011ea4+000000 __ghs_eofn_CanIf_ErrorNotification
 .mcal_code       00011ea6+000002 Can1_MemNotify
 .mcal_code       00011ea6+000000 __ghs_eofn_Can1_HostMemNotify
 .mcal_code       00011ea8+000002 Can1_CorrMemNotify
 .mcal_code       00011ea8+000000 __ghs_eofn_Can1_MemNotify
 .mcal_code       00011eaa+00001c BusFault_Handler
 .mcal_code       00011eaa+000000 __ghs_eofn_Can1_CorrMemNotify
 .mcal_code       00011ec6+000038 Wdg_CheckIdleState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdg.
 .mcal_code       00011ec6+000000 __ghs_eofn_BusFault_Handler
 .mcal_code       00011efe+000038 Wdg_CheckInit..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdg.
 .mcal_code       00011f36+00002a Wdg_CheckSetMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdg.
 .mcal_code       00011f60+00002c Wdg_HandleSetModeResult..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdg.
 .mcal_code       00011f8c+000078 Wdg_Init
 .mcal_code       00012004+00003a Wdg_SetMode
 .mcal_code       00012004+000000 __ghs_eofn_Wdg_Init
 .mcal_code       0001203e+000018 Wdg_Service
 .mcal_code       0001203e+000000 __ghs_eofn_Wdg_SetMode
 .mcal_code       00012056+00002c Wdg_Drvw_SetMode
 .mcal_code       00012056+000000 __ghs_eofn_Wdg_Service
 .mcal_code       00012082+00002a Wdg_Drvw_Init
 .mcal_code       00012082+000000 __ghs_eofn_Wdg_Drvw_SetMode
 .mcal_code       000120ac+00000c Wdg_Drvw_Refresh
 .mcal_code       000120ac+000000 __ghs_eofn_Wdg_Drvw_Init
 .mcal_code       000120b8+00002c Wdog_Drv_WaitForConfigComplete..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdog_Drv.
 .mcal_code       000120b8+000000 __ghs_eofn_Wdg_Drvw_Refresh
 .mcal_code       000120e4+0000a8 Wdog_ConvertConfigToCsValue..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdog_Drv.
 .mcal_code       0001218c+0000c4 Wdog_Drv_Init
 .mcal_code       00012250+000098 Wdog_Drv_DeInit
 .mcal_code       00012250+000000 __ghs_eofn_Wdog_Drv_Init
 .mcal_code       000122e8+000024 Wdog_Drv_Refresh
 .mcal_code       000122e8+000000 __ghs_eofn_Wdog_Drv_DeInit
 .mcal_code       0001230c+000000 __ghs_eofn_Wdog_Drv_Refresh
 .fls_ac_code_rom 00012324+00003a Flash_Drv_AccessCode
                  00012324+000000 Fls_Drvw_AcEraseRomStart
                  00012324+000000 Fls_Drvw_AcWriteRomStart
 .fls_ac_code_rom 0001235e+000000 __ghs_eofn_Flash_Drv_AccessCode
                  00012364+000000 Fls_Drvw_AcEraseRomEnd
                  00012364+000000 Fls_Drvw_AcWriteRomEnd
 .rodata          00012364+000004 __Vectors_Size
 .rodata          00012628+000004 _multibufSize
 .mcal_config_data 0001262c+00000c Adc_Drv_GroupConfig_0
 .mcal_config_data 00012638+00000c Adc_Drv_GroupConfig_1
 .mcal_config_data 00012644+00000c Adc_Drv_GroupConfig_2
 .mcal_config_data 00012650+00000c Adc_Drv_GroupConfig_3
 .mcal_config_data 0001265c+00000c Adc_Drv_GroupConfig_4
 .mcal_config_data 00012668+00003c Adc_Drv_Config_0
 .mcal_config_data 000126a4+00003c Adc_Drv_Config_1
 .mcal_config_data 000126e0+00009c Adc_Drv_ChannelConfigList_0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_Drv_PBcfg.
 .mcal_config_data 0001277c+000090 Adc_Drv_ChannelConfigList_1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_Drv_PBcfg.
 .mcal_config_data 0001280c+000004 Adc_PreDefinedConfigPtr
 .mcal_config_data 00012810+000010 Adc_Config..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_config_data 00012820+000008 Adc_HWUnitConfigList..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_config_data 00012828+000118 Adc_GroupConfigList..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_config_data 00012940+000018 Adc_HWUnitConfig_0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_config_data 00012958+000018 Adc_HWUnitConfig_1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_config_data 00012970+000018 Adc_ChannelAssignmentOfGroup_0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_config_data 00012988+000018 Adc_ChannelAssignmentOfGroup_1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_config_data 000129a0+000004 Adc_ChannelAssignmentOfGroup_2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_config_data 000129a4+000018 Adc_ChannelAssignmentOfGroup_3..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_config_data 000129bc+000018 Adc_ChannelAssignmentOfGroup_4..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_config_data 000129d4+000064 Can_Drv_CtrlConfig
 .mcal_config_data 00012a38+000004 Can_PreDefinedConfigPtr
 .mcal_config_data 00012a3c+000020 Can_Config..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_PBcfg.
 .mcal_config_data 00012a5c+000008 Can_CtrlOffsetToCtrlIDMap..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_PBcfg.
 .mcal_config_data 00012a64+000004 Can_HwObjIDToCtrlIDMap..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_PBcfg.
 .mcal_config_data 00012a68+000080 Can_HwObjectConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_PBcfg.
 .mcal_config_data 00012ae8+000004 Can_ControllerPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_PBcfg.
 .mcal_config_data 00012aec+000040 Can_HwFilterObject0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_PBcfg.
 .mcal_config_data 00012b2c+000008 Can_HwFilterObject1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_PBcfg.
 .mcal_config_data 00012b34+000048 Can_ControllerConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_PBcfg.
 .mcal_config_data 00012b7c+000014 Can_RxFiFOConfigCtr0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_PBcfg.
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 .mcal_config_data 00012bbc+000004 Dma_PreDefinedConfigPtr
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 .mcal_config_data 00012f10+000004 Dma_Drv_ModuleCfgArrayPtr
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 .mcal_config_data 00012fc4+000008 Fls_SectorListPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls_PBcfg.
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 .mcal_config_data 0001306c+000080 Gpt_InitChannel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CGpt_PBcfg.
 .mcal_config_data 000130ec+000010 Gpt_InitPredefTimerChannel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CGpt_PBcfg.
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 .mcal_config_data 00013100+000008 Interrupt_Drv_Config
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 .mcal_config_data 00013ae4+00001c Mcpwm_Pwm_Drv_I1_Ch0_Cfg
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 .mcal_config_data 00013e60+000004 Platform_Configuration
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 .mcal_config_data 00014e50+000058 Scc_Drv_ClockConfig
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 .mcal_config_data 00014f90+000020 Spi_Config
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 .mcal_config_data 00015018+00001c Spi_ChannelConfig_SpiChl_Buck..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
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 .mcal_config_data 000150f4+000014 Spi_SequenceConfig_SEQ_Sbc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
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 .mcal_config_data 00015130+000001 Spi_ChannelAssignment_SpiJob_Stp..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_config_data 00015131+000001 Spi_ChannelAssignment_SpiJob_Sbc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_config_data 00015132+000001 Spi_ChannelAssignment_SpiJob_Buck..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_config_data 00015133+000001 Spi_ChannelAssignment_SpiJob_Boost..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_config_data 00015134+000002 Spi_JobAssignment_SEQ_Stp..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_config_data 00015136+000002 Spi_JobAssignment_SEQ_Sbc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_config_data 00015138+000002 Spi_JobAssignment_SEQ_Buck..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_config_data 0001513a+000002 Spi_JobAssignment_SEQ_Boost..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_config_data 0001513c+000018 Srmc_Drv_ResetConfig
 .mcal_config_data 00015154+000010 Srmc_Drv_PowerModeConfig
 .mcal_config_data 00015164+000050 Stim_Drv_ChannelConfig
 .mcal_config_data 000151b4+000008 Tdg_Adc_Drv_GroupConfig_0
 .mcal_config_data 000151bc+000008 Tdg_Adc_Drv_GroupConfig_1
 .mcal_config_data 000151c4+000008 Tdg_Adc_Drv_GroupConfig_2
 .mcal_config_data 000151cc+000008 Tdg_Adc_Drv_GroupConfig_3
 .mcal_config_data 000151d4+000008 Tdg_Adc_Drv_GroupConfig_4
 .mcal_config_data 000151dc+000020 Tdg_Adc_Drv_Config_0
 .mcal_config_data 000151fc+000020 Tdg_Adc_Drv_Config_1
 .mcal_config_data 0001521c+00000c Adc_Drv_TdgChannelConfig_Group0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv_PBcfg.
 .mcal_config_data 00015228+00000c Adc_Drv_TdgChannelConfig_Group1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv_PBcfg.
 .mcal_config_data 00015234+00000c Adc_Drv_TdgChannelConfig_Group2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv_PBcfg.
 .mcal_config_data 00015240+00000c Adc_Drv_TdgChannelConfig_Group3..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv_PBcfg.
 .mcal_config_data 0001524c+00000c Adc_Drv_TdgChannelConfig_Group4..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv_PBcfg.
 .mcal_config_data 00015258+000008 Tdg_Adc_Drv_DelayOutputConfig_Group0_Channel0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv_PBcfg.
 .mcal_config_data 00015260+000008 Tdg_Adc_Drv_DelayOutputConfig_Group1_Channel0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv_PBcfg.
 .mcal_config_data 00015268+000008 Tdg_Adc_Drv_DelayOutputConfig_Group2_Channel0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv_PBcfg.
 .mcal_config_data 00015270+000008 Tdg_Adc_Drv_DelayOutputConfig_Group3_Channel0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv_PBcfg.
 .mcal_config_data 00015278+000008 Tdg_Adc_Drv_DelayOutputConfig_Group4_Channel0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv_PBcfg.
 .mcal_config_data 00015280+00000c Tim_Pwm_Drv_User2_Cfg
 .mcal_config_data 0001528c+00000c Tim_Pwm_Drv_User3_Cfg
 .mcal_config_data 00015298+00001c Tim_Pwm_Drv_I2_Ch0_Cfg
 .mcal_config_data 000152b4+00001c Tim_Pwm_Drv_I2_Ch1_Cfg
 .mcal_config_data 000152d0+00001c Tim_Pwm_Drv_I2_Ch2_Cfg
 .mcal_config_data 000152ec+00001c Tim_Pwm_Drv_I2_Ch3_Cfg
 .mcal_config_data 00015308+00001c Tim_Pwm_Drv_I2_Ch4_Cfg
 .mcal_config_data 00015324+00001c Tim_Pwm_Drv_I2_Ch5_Cfg
 .mcal_config_data 00015340+00001c Tim_Pwm_Drv_I2_Ch6_Cfg
 .mcal_config_data 0001535c+00001c Tim_Pwm_Drv_I2_Ch7_Cfg
 .mcal_config_data 00015378+00001c Tim_Pwm_Drv_I3_Ch0_Cfg
 .mcal_config_data 00015394+00001c Tim_Pwm_Drv_I3_Ch1_Cfg
 .mcal_config_data 000153b0+00001c Tim_Pwm_Drv_I3_Ch2_Cfg
 .mcal_config_data 000153cc+00001c Tim_Pwm_Drv_I3_Ch3_Cfg
 .mcal_config_data 000153e8+00001c Tim_Pwm_Drv_I3_Ch4_Cfg
 .mcal_config_data 00015404+00001c Tim_Pwm_Drv_I3_Ch5_Cfg
 .mcal_config_data 00015420+00001c Tim_Pwm_Drv_I3_Ch6_Cfg
 .mcal_config_data 0001543c+00001c Tim_Pwm_Drv_I3_Ch7_Cfg
 .mcal_config_data 00015458+00001c Tim_Pwm_Drv_Inst2_Cfg..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv_PBcfg.
 .mcal_config_data 00015474+000020 Tim_Pwm_Drv_I2_ChArrayPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv_PBcfg.
 .mcal_config_data 00015494+00001c Tim_Pwm_Drv_Inst3_Cfg..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv_PBcfg.
 .mcal_config_data 000154b0+000020 Tim_Pwm_Drv_I3_ChArrayPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv_PBcfg.
 .mcal_config_data 000154d0+000018 Wdg_Drvw_Config
 .mcal_config_data 000154e8+000008 Wdg_Drvw_SlowModeSetting..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdg_Drvw_PBcfg.
 .mcal_config_data 000154f0+000008 Wdg_Drvw_FastModeSetting..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdg_Drvw_PBcfg.
 .mcal_config_data 000154f8+000004 Wdg_PreDefinedConfigPtr
 .mcal_config_data 000154fc+000004 Wdg_Config..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdg_PBcfg.
 .mcal_config_data 00015500+000018 Wdog_Drv_SlowModeConfig
 .mcal_config_data 00015518+000018 Wdog_Drv_FastModeConfig
 .mcal_const      00015530+000010 Spi_Drv_SpiRegBfPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_const      00015540+000010 Spi_Drv_SpiRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_const      00015550+000004 Spi_Drv_TxDmaReqSource..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_const      00015554+000004 Spi_Drv_RxDmaReqSource..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_const      00015558+000008 Adc_Drv_AdcRegBfPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_Drv.
 .mcal_const      00015560+000008 Adc_Drv_AdcRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_Drv.
 .mcal_const      00015568+000008 Tdg_Adc_Drv_TdgRegBfPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv.
 .mcal_const      00015570+000008 Tdg_Adc_Drv_TdgRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv.
 .mcal_const      00015578+000008 Mcpwm_Pwm_Drv_PwmRegBfPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_const      00015580+000008 Mcpwm_Pwm_Drv_PwmRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_const      00015588+000010 Tim_Pwm_Drv_PwmRegBfPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_const      00015598+000010 Tim_Pwm_Drv_PwmRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_const      000155a8+000004 Stim_Drv_StimRegBfPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CStim_Drv.
 .mcal_const      000155ac+000004 Stim_Drv_StimRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CStim_Drv.
 .mcal_const      000155b0+000040 Dma_Drv_ChannelMaskArray..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv.
 .mcal_const      000155f0+00000c Dma_Drv_GccClearChannelsMaskArray..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv.
 .mcal_const      000155fc+00000c Dma_Drv_GccWpenMaskArray..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv.
 .mcal_const      00015608+000004 Can_State..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_const      0001560c+000020 Can_Drv_CanRegBfPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_const      0001562c+000020 Can_Drv_CanRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_const      0001564c+000070 Mcu_ResetReasonTable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_const      000156bc+000080 Mcu_WakeupSourceTable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_const      0001573c+000080 Mcu_Drvw_WakeupSourceTable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu_Drvw.
 .mcal_const      000157bc+0000d4 Parcc_Drv_ParccRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015890+0000d4 Parcc_Drv_ParccRegBfPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015964+00027c Parcc_Drv_PeripheralFunctionalClockTable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015be0+000004 Parcc_Drv_WdogFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015be4+000014 Parcc_Drv_EwdtFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015bf8+000018 Parcc_Drv_StimFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015c10+000018 Parcc_Drv_TimFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015c28+000018 Parcc_Drv_McpwmFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015c40+000018 Parcc_Drv_TdgFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015c58+000010 Parcc_Drv_CanFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015c68+000018 Parcc_Drv_UartFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015c80+000018 Parcc_Drv_SpiFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015c98+000018 Parcc_Drv_I2cFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015cb0+000018 Parcc_Drv_I2sFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015cc8+000014 Parcc_Drv_AdcFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015cdc+000004 Parcc_Drv_CmpFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015ce0+000004 Parcc_Drv_CrcFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015ce4+000004 Parcc_Drv_AesFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015ce8+000004 Parcc_Drv_TrngFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015cec+000014 Parcc_Drv_FlashFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015d00+000004 Parcc_Drv_DmaFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015d04+000004 Parcc_Drv_DmaMuxFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015d08+000014 Parcc_Drv_PortFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015d1c+000004 Parcc_Drv_TmuFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015d20+000004 Parcc_Drv_RegfileFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015d24+000004 Parcc_Drv_SmpuFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015d28+000004 Parcc_Drv_GpioFunctionalClock..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CParcc_Drv.
 .mcal_const      00015d2c+000008 Pmu_Drv_IntEnableMaskTable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPmu_Drv.
 .mcal_const      00015d34+00001c Scm_Mcu_Drv_IntMaskTable..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScm_Mcu_Drv.
 .mcal_const      00015d50+000014 Port_Drv_GpioRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort_Drv.
 .mcal_const      00015d64+000014 Port_Drv_PortRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort_Drv.
 .mcal_const      00015d78+000014 Port_Drv_PortRegBfPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort_Drv.
 .mcal_const      00015d8c+000014 Gpio_Drv_GpioRegWPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CGpio_Drv.
 .init_table      00015da0+000030 INIT_TABLE
                  00015da0+000000 __INIT_TABLE
 .zero_table      00015dd0+000008 ZERO_TABLE
                  00015dd0+000000 __ZERO_TABLE
                  00015dd8+000000 __ROM_DATA_INIT_START
                  00015dd8+000000 __ROM_RAM_CODE_INIT_END
                  00015dd8+000000 __ROM_RAM_CODE_INIT_START
                  00015fb0+000000 __ROM_DATA_INIT_END
                  00015fb0+000000 __ROM_MCAL_DATA_INIT_START
                  00016004+000000 __ROM_MCAL_DATA_INIT_END
                  00031582+000000 __ghs_elxr_version
                  1ffe0000+000000 __RAM_INTERRUPT_START
                  1ffe0000+000000 __SRAM_START
 .data            1ffe0374+000108 TaskDb
                  1ffe0374+000000 __RAM_DATA_INIT_START
                  1ffe0374+000000 __RAM_RAM_CODE_INIT_END
                  1ffe0374+000000 __RAM_RAM_CODE_INIT_START
 .data            1ffe047c+000093 BD18397RUV_Registor_cfg..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .data            1ffe0510+000004 CddSbc_eDefaultMsg..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .data            1ffe0514+000008 SendData.Ex_Can_UseCase_01..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..5
 .data            1ffe051c+000008 SendData.Ex_Can_UseCase_05..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..9
 .data            1ffe0524+000004 datai..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CcmbCallBack.
 .data            1ffe0528+000004 TIMER_RELOADValue
 .data            1ffe052c+000020 TIMER_FLAGS
 .mcal_data       1ffe054c+000008 Dma_Drv_ChRequestCfg0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
                  1ffe054c+000000 __RAM_DATA_INIT_END
                  1ffe054c+000000 __RAM_MCAL_DATA_INIT_START
 .mcal_data       1ffe0554+000008 Dma_Drv_ChRequestCfg1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe055c+000003 Dma_Drv_ChPriorityCfg1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe0560+000008 Dma_Drv_ChRequestCfg2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe0568+000003 Dma_Drv_ChPriorityCfg2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe056c+000008 Dma_Drv_ChRequestCfg3..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe0574+000003 Dma_Drv_ChPriorityCfg3..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe0578+000008 Dma_Drv_ChRequestCfg4..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe0580+000003 Dma_Drv_ChPriorityCfg4..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe0584+000008 Dma_Drv_ChControlCfg0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe058c+000008 Dma_Drv_ChControlCfg1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe0594+000008 Dma_Drv_ChControlCfg2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .mcal_data       1ffe059c+000004 Wdg_State..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdg.
 .bss             1ffe05a0+000008 AllTickCount
                  1ffe05a0+000000 __BSS_SRAM_START
                  1ffe05a0+000000 __RAM_MCAL_DATA_INIT_END
 .bss             1ffe05a8+000004 TMP1msCount..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ctask.
 .bss             1ffe05ac+0000a0 TimerData..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ctask.
 .bss             1ffe064c+000008 bd18397_mult_device_CHEN..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe0654+000008 bd18397_mult_device_DCDCSET4..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe065c+000008 bd18397_mult_device_SYSCFG1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe0664+000008 bd18397_mult_device_ERRST1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe066c+000008 bd18397_mult_device_ADSEL..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe0674+000008 bd18397_mult_device_ERRST2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe067c+000008 bd18397_mult_device_DIMSET..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe0684+000008 bd18397_mult_device_ERRSET1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe068c+000008 bd18397_mult_device_DCDCSET1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe0694+000008 bd18397_mult_device_DCDCSET2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe069c+000008 bd18397_mult_device_DPWM2H..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06a4+000008 bd18397_mult_device_DPWM1L..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06ac+000008 bd18397_mult_device_DPWM2L..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06b4+000008 bd18397_mult_device_DPWM1H..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06bc+000008 bd18397_mult_device_ISET2H..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06c4+000008 bd18397_mult_device_ISET1L..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06cc+000008 bd18397_mult_device_ISET1H..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06d4+000008 bd18397_mult_device_VMONH..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06dc+000008 bd18397_mult_device_ISET2L..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06e4+000008 bd18397_mult_device_VMONL..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06ec+000008 bd18397_mult_device_ERRSTALL..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe06f4+000010 Ex_Spi_MasterRxDataBuffer..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCdd_bd18397.
 .bss             1ffe0704+000010 CddTle94x1_ErrorType..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe0714+000001 CddTle94x1_ucWK_STAT_0_WK_WU..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe0715+000001 CddTle94x1_ucWK_STAT_0_CANWU..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe0716+000044 CddTle94x1_DataMirror..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe075a+000001 CddTle94x1_ucSUP_STAT_0_VCC1_UV..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe075b+000001 CddTle94x1_ucSUP_STAT_0_POR..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe075c+000001 CddTle94x1_boIsWdgReset..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe075d+000001 CddTle94x1_ucTHERMO_STAT_TSD2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe075e+000001 CddTle94x1_ucDEV_STAT_DEV_STAT..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe075f+000001 CddTle94x1_eSBCResetReason..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe0760+000002 CddTle94x1_unErrorSequenceCounter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1.
 .bss             1ffe0764+000001 CddSbc_ucQueueReadIndex..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1_Com.
 .bss             1ffe0768+0000f0 CddSbc_SpiScheduleQueue..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1_Com.
 .bss             1ffe0858+000001 CddSbc_ucQueueWriteIndex..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1_Com.
 .bss             1ffe0859+000001 boInsertStatus.CddSbc_InsertNewSchedEntry..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddTle94x1_Com..3
 .bss             1ffe085c+000004 CddSbc_ECCResetReason..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddSbc.
 .bss             1ffe0860+000001 CddSbc_tResetReason..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCddSbc.
 .bss             1ffe0864+000004 Pwm_ConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
 .bss             1ffe0868+000004 EcuMLastWakeupEvent
 .bss             1ffe086c+000004 Gpt_Mode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CGpt.
 .bss             1ffe0870+000004 Mcu_ConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .bss             1ffe0874+000004 Mcu_Status..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .bss             1ffe0878+000004 Pmu_Drv_LvdCallBackFunc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPmu_Drv.
 .bss             1ffe087c+000004 Pmu_Drv_LvwCallBackFunc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPmu_Drv.
 .bss             1ffe0880+000003 Dma_Drv_ChPriorityCfg0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .bss             1ffe0884+00000c Dma_Drv_ChSourceCfg0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .bss             1ffe0890+00000c Dma_Drv_ChDestCfg0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .bss             1ffe089c+00000c Dma_Drv_ChSourceCfg1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .bss             1ffe08a8+00000c Dma_Drv_ChDestCfg1..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .bss             1ffe08b4+00000c Dma_Drv_ChSourceCfg2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .bss             1ffe08c0+00000c Dma_Drv_ChDestCfg2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv_PBcfg.
 .bss             1ffe08cc+000001 Ex_Can_TxFlag..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func.
 .bss             1ffe08cd+000001 Ex_Can_PeriodTime..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func.
 .bss             1ffe08d0+000004 interruptCount.Ex_Can_StimCallback..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..2
 .bss             1ffe08d4+000001 Ex_Can_RxFlagCase2..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func.
 .bss             1ffe08d5+000001 Ex_Can_RxFlagCase3..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func.
 .bss             1ffe08d6+000001 Cnt.Ex_Can_UseCase_01..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..6
 .bss             1ffe08d8+00000c PduInfo.Ex_Can_UseCase_01..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..7
 .bss             1ffe08e4+000001 Ex_Can_FlagCase4..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func.
 .bss             1ffe08e8+000004 i.Ex_Can_UseCase_05..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..10
 .bss             1ffe08ec+00000c PduInfo.Ex_Can_UseCase_05..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..11
 .bss             1ffe08f8+000002 pt_Ex_Can_UseCase_01.TaskCAN..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..12
 .bss             1ffe08fa+000002 pt_Ex_Can_UseCase_02.TaskCAN..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..13
 .bss             1ffe08fc+000002 pt_Ex_Can_UseCase_03.TaskCAN..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..14
 .bss             1ffe08fe+000002 pt_Ex_Can_UseCase_04.TaskCAN..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Ccan_func..15
 .bss             1ffe0900+000004 bssj..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CcmbCallBack.
 .bss             1ffe0904+000004 bADCFlag
 .bss             1ffe0908+000008 Ex_Pwm_VersionInfo
 .bss             1ffe0910+000002 adc0_group2_data..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Cfunc.
 .bss             1ffe0912+00000c adc1_group0_data..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Cfunc.
 .bss             1ffe091e+00000c adc1_group1_data..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Cfunc.
 .bss             1ffe092a+00000c adc0_group1_data..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Cfunc.
 .bss             1ffe0936+00000c adc0_group0_data..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Cfunc.
 .bss             1ffe0944+000001 Spi_Stat
 .bss             1ffe0948+000008 Ex_Spi_VersionInfo
 .bss             1ffe0950+000004 CoutFlag.TaskLMM..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Cspi_func..0
 .bss             1ffe0954+000002 led_para.TaskLMM..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Cspi_func..1
 .bss             1ffe0956+000001 index.TaskLMM..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Cspi_func..2
 .bss             1ffe0957+000001 adsel_mode.TaskLMM..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5Cspi_func..3
 .bss             1ffe0958+0003e8 _multibuffer
 .bss             1ffe0d40+000030 _multiArgs
 .mcal_bss        1ffe0d80+000004 Spi_ConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi.
 .mcal_bss        1ffe0d84+000038 Spi_HWUnitQueueArray..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi.
 .mcal_bss        1ffe0dbc+000040 Spi_SequenceStateArray..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi.
 .mcal_bss        1ffe0dfc+000010 Spi_SeqUsedHWUnits..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi.
 .mcal_bss        1ffe0e0c+000008 Spi_SyncHWUnitsBusyStatus..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi.
 .mcal_bss        1ffe0e14+000030 Spi_JobStateArray
 .mcal_bss        1ffe0e44+000010 Spi_ChannelStateArray
 .mcal_bss        1ffe0e54+000003 Spi_Drv_DmaChannelPriorityConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_bss        1ffe0e58+000008 Spi_Drv_DmaChannelControlConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_bss        1ffe0e60+000008 Spi_Drv_DmaChannelRequestConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_bss        1ffe0e68+00000c Spi_Drv_DmaChannelDestinationConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_bss        1ffe0e74+00000c Spi_Drv_DmaChannelSourceConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_bss        1ffe0e80+00000c Spi_Drv_DmaChannelGlobalConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_bss        1ffe0e8c+00000c Spi_Drv_DmaChannelTransferConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_bss        1ffe0e98+000004 Spi_Drv_DmaDiscardData..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_bss        1ffe0e9c+0000c0 Spi_Drv_TransferConfigArray..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drv.
 .mcal_bss        1ffe0f5c+000010 Spi_Drv_TransferConfigPtrArray
 .mcal_bss        1ffe0f6c+000020 Spi_Drv_DeviceParamArray
 .mcal_bss        1ffe0f8c+000004 Spi_Drvw_PhyUnitToHWUnitMapping..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drvw.
 .mcal_bss        1ffe0f90+000002 Spi_Drvw_HWUnitToPhyUnitMapping..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_Drvw.
 .mcal_bss        1ffe0f94+000008 Flash_Drv_ReadState
 .mcal_bss        1ffe0f9c+000004 Flash_Drv_ConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFlash_Drv.
 .mcal_bss        1ffe0fa0+000004 Fls_ConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
 .mcal_bss        1ffe0fa4+000024 Fls_Job..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
 .mcal_bss        1ffe0fc8+000004 Fls_MaxWrite..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
 .mcal_bss        1ffe0fcc+000004 Fls_MaxRead..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls.
 .mcal_bss        1ffe0fd0+000004 Fls_DrvwConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CFls_Drvw.
 .mcal_bss        1ffe0fd4+000004 Adc_ConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc.
 .mcal_bss        1ffe0fd8+000004 Adc_GlobalState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc.
 .mcal_bss        1ffe0fdc+000064 Adc_GroupStatus
 .mcal_bss        1ffe1040+00001c Adc_UnitStatus
 .mcal_bss        1ffe105c+000014 Adc_Drv_GroupConfigList..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_Drv.
 .mcal_bss        1ffe1070+000008 Adc_Drv_ConfigList..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_Drv.
 .mcal_bss        1ffe1078+000018 Adc_Drv_StateArray..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_Drv.
 .mcal_bss        1ffe1090+000014 Tdg_Adc_Drv_GroupConfigList..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv.
 .mcal_bss        1ffe10a4+000018 Tdg_Adc_Drv_StateArray..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTdg_Adc_Drv.
 .mcal_bss        1ffe10bc+000040 Mcpwm_Pwm_Drv_ChannelMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe10fc+000040 Mcpwm_Pwm_Drv_PolarityState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe113c+000010 Mcpwm_Pwm_Drv_NotifIrq..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe114c+000010 Mcpwm_Pwm_Drv_Period..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe115c+000020 Mcpwm_Pwm_Drv_DutyCycle..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe117c+000040 Mcpwm_Pwm_Drv_CounterMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe11bc+000010 Mcpwm_Pwm_Drv_PeriodDither..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe11cc+000010 Mcpwm_Pwm_Drv_PhaseShift..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe11dc+000020 Mcpwm_Pwm_Drv_ChannelDither..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe11fc+000040 Mcpwm_Pwm_Drv_IdleState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe123c+000040 Mcpwm_Pwm_Drv_ChIrqCallbacks..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe127c+000040 Mcpwm_Pwm_Drv_ChannelState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe12bc+000040 Mcpwm_Pwm_Drv_OffValue..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe12fc+000040 Mcpwm_Pwm_Drv_OverflowIrqCallbacks..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe133c+000008 Mcpwm_Pwm_Drv_ClockDivide..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe1344+000008 Mcpwm_Pwm_Drv_ClockSource..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe134c+000040 Mcpwm_Pwm_Drv_PreviousChannelState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcpwm_Pwm_Drv.
 .mcal_bss        1ffe138c+00000c Pwm_DrvState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPwm.
 .mcal_bss        1ffe1398+000080 Tim_Pwm_Drv_ChannelMode..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe1418+000080 Tim_Pwm_Drv_PolarityState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe1498+000020 Tim_Pwm_Drv_NotifIrq..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe14b8+000008 Tim_Pwm_Drv_Period..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe14c0+000040 Tim_Pwm_Drv_DutyCycle..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe1500+000020 Tim_Pwm_Drv_PhaseShift..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe1520+000080 Tim_Pwm_Drv_ChannelState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe15a0+000080 Tim_Pwm_Drv_IdleState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe1620+000080 Tim_Pwm_Drv_ChIrqCallbacks..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe16a0+000080 Tim_Pwm_Drv_OverflowIrqCallbacks..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe1720+000010 Tim_Pwm_Drv_ClockDivide..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe1730+000010 Tim_Pwm_Drv_ClockSource..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe1740+000080 Tim_Pwm_Drv_PreviousChannelState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CTim_Pwm_Drv.
 .mcal_bss        1ffe17c0+000010 Gpt_StopTime..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CGpt.
 .mcal_bss        1ffe17d0+000020 Gpt_ChannelInfo..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CGpt.
 .mcal_bss        1ffe17f0+000004 Gpt_ConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CGpt.
 .mcal_bss        1ffe17f4+000008 ReturnHwChannelInfo..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CGpt.
 .mcal_bss        1ffe17fc+000030 Stim_Drv_ChannelState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CStim_Drv.
 .mcal_bss        1ffe182c+000004 Dma_CfgPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCDD_Dma.
 .mcal_bss        1ffe1830+000028 Dma_ChannelStateArray..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCDD_Dma.
 .mcal_bss        1ffe1858+000004 Dma_Drv_IsrCbPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv.
 .mcal_bss        1ffe185c+000010 Dma_Drv_SwReqSrcFlag..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv.
 .mcal_bss        1ffe186c+000004 Dma_Drv_ErrIsrCbPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CDma_Drv.
 .mcal_bss        1ffe1870+000004 Can_DriverStatus..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1874+000004 Can_ConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1878+000004 Can_ControllerState..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe187c+000004 Can_ControllerConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1880+000001 Can_InterruptEnableStatus..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1884+000010 Can_HwObjectConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1894+000080 Can_HwToMapMbIndex..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1914+000518 Can_Status0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1e2c+000001 Can_EccInjectionStatus..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1e2e+000002 Can_BaudrateIdConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1e30+000004 Can_DisableInterruptLevel..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1e34+000100 Can_TxPduId..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan.
 .mcal_bss        1ffe1f34+000020 Can_Drv_StatePtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_bss        1ffe1f54+000040 Can_Drv_DmaControlConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_bss        1ffe1f94+000060 Can_Drv_DmaDestinationConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_bss        1ffe1ff4+000060 Can_Drv_DmaSourceConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_bss        1ffe2054+000060 Can_Drv_DmaTransferConfig..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_bss        1ffe20b4+000080 Can_Drv_InterMaskBuff..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_Drv.
 .mcal_bss        1ffe2134+000004 McalLib_IntDisabledCounter..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcalLib.
 .mcal_bss        1ffe2138+000001 McalLib_InitFlag..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcalLib_OsCounter.
 .mcal_bss        1ffe213c+000004 McalLib_OsCounterFreq..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcalLib_OsCounter.
 .mcal_bss        1ffe2140+000001 Mcu_ModeConfigIds..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_bss        1ffe2141+000001 Mcu_ClockConfigIds..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_bss        1ffe2144+000004 Mcu_ClockConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CMcu.
 .mcal_bss        1ffe2148+000004 Scc_Drv_PllClockFrequency..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_bss        1ffe214c+000004 Scc_Drv_Firc64MLocCallBackFunc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_bss        1ffe2150+000004 Scc_Drv_FoscLocCallBackFunc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CScc_Drv.
 .mcal_bss        1ffe2154+000004 Port_ConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CPort.
 .mcal_bss        1ffe2158+000014 Adc_ResultsBufferPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CAdc_PBcfg.
 .mcal_bss        1ffe2180+000060 Can_DmaDestinationAddr0..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CCan_PBcfg.
 .mcal_bss        1ffe21e0+000008 Spi_BufferSpiChl_Stp..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_bss        1ffe21e8+000008 Spi_BufferSpiChl_Sbc..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_bss        1ffe21f0+000008 Spi_BufferSpiChl_Buck..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_bss        1ffe21f8+000008 Spi_BufferSpiChl_Boost..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CSpi_PBcfg.
 .mcal_bss        1ffe2200+000004 Wdg_ConfigPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdg.
 .mcal_bss        1ffe2204+000004 Wdog_Drv_IntCallbackPtr..D.3A.5C1.2EProject.5C1.2Egit.5CHiRain.5CProject.5CCapri.5CMultiProject.5Cobjs.5Cdebug.5CWdog_Drv.
                  1ffe2208+000000 FLS_AC_ERASE_ADDR
                  1ffe2208+000000 FLS_AC_WRITE_ADDR
                  1ffe2208+000000 __BSS_SRAM_END
                  2001f000+000000 __STACK_END
                  20020000+000000 __SRAM_END
                  20020000+000000 __STACK_TOP
                  6086489f+000000 __ghs_elxr_revision