# 1 "../Generated/Src/Tim_Pwm_Drv_PBcfg.c"
# 1 "<built-in>" 1
# 1 "<built-in>" 3
# 387 "<built-in>" 3
# 1 "<command line>" 1
# 1 "<built-in>" 2
# 1 "../Generated/Src/Tim_Pwm_Drv_PBcfg.c" 2
# 26 "../Generated/Src/Tim_Pwm_Drv_PBcfg.c"
# 1 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h" 1
# 30 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
# 1 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h" 1
# 29 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h"
# 1 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 1
# 29 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
# 1 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" 1
# 29 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" 1
# 30 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/Platform_Types.h" 1
# 86 "../../../mcal/Base_ZX_K14xM/Inc/Platform_Types.h"
typedef unsigned char boolean;




typedef unsigned char uint8;




typedef unsigned short uint16;




typedef unsigned int uint32;





typedef unsigned long long uint64;




typedef signed char sint8;




typedef signed short sint16;




typedef signed int sint32;





typedef signed long long sint64;




typedef unsigned long uint8_least;




typedef unsigned long uint16_least;





typedef unsigned long uint32_least;




typedef signed long sint8_least;




typedef signed long sint16_least;




typedef signed long sint32_least;




typedef float float32;





typedef double float64;




typedef void *VoidPtr;




typedef const void *ConstVoidPtr;
# 31 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" 2
# 1 "../../../mcal/Base_ZX_K14xM/Inc/Compiler.h" 1
# 31 "../../../mcal/Base_ZX_K14xM/Inc/Compiler.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/Compiler_Cfg.h" 1
# 32 "../../../mcal/Base_ZX_K14xM/Inc/Compiler.h" 2
# 32 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" 2
# 63 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h"
typedef unsigned char StatusType;
# 104 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h"
typedef uint8 Std_ReturnType;




typedef uint8 Std_TransformerClass;




typedef uint8 Std_TransformerForwardCode;





typedef uint8 Std_MessageTypeType;





typedef uint8 Std_MessageResultType;





typedef struct
{
    uint16 vendorID;
    uint16 moduleID;
    uint8 sw_major_version;
    uint8 sw_minor_version;
    uint8 sw_patch_version;
} Std_VersionInfoType;




typedef struct
{
    uint8 errorCode;
    Std_TransformerClass transformerClass;
} Std_TransformerError;





typedef struct
{
    Std_TransformerForwardCode errorCode;
    Std_TransformerClass transformerClass;
} Std_TransformerForward;







typedef Std_ReturnType (*Std_ExtractProtocolHeaderFieldsType)(const uint8 *buffer,
                                                              uint32 bufferLength,
                                                              Std_MessageTypeType *messageType,
                                                              Std_MessageResultType *messageResult);
# 30 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" 2
# 1 "../Generated/inc\\McalLib_Cfg.h" 1
# 31 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" 2
# 273 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h"
static inline uint32 McalLib_ReadControlReg(void)
{
    uint32 res;

    __asm("MRS %0,CONTROL" : "=r" (res));

    return res;
}
# 290 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h"
static inline uint32 McalLib_ReadIpsrReg(void)
{
    uint32 res;
    __asm("MRS %0,IPSR" : "=r" (res));
    return res;
}
# 305 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h"
static inline uint32 McalLib_ReadPriMaskReg(void)
{
    uint32 res;
    __asm("MRS %0,PRIMASK" : "=r" (res));
    return res;
}
# 30 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2
# 184 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
typedef enum
{
    MCALLIB_COUNTER_SOFTWARE,

    MCALLIB_COUNTER_OS,




} McalLib_CounterType;




typedef struct
{
    uint32 CounterId;
    uint32 CounterFreq;
} McalLib_ConfigType;







# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1
# 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h"
#pragma clang section rodata = ".mcal_config_data"
# 211 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2

extern const McalLib_ConfigType *const McalLib_PreDefinedConfigPtr[(1U)];


# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1
# 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h"
#pragma clang section rodata = ""
# 216 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2
# 230 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
extern void Sys_SystemReset(void);


# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1
# 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h"
#pragma clang section text = ".mcal_code"
# 234 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2







void McalLib_Init(void);
# 254 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
Std_ReturnType McalLib_GetCounterValue(McalLib_CounterType Counter, uint32 *Value);
# 270 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
Std_ReturnType McalLib_GetElapsedValue(McalLib_CounterType Counter, uint32 *const CounterValue,
                                       uint32 *ElapsedValue);
# 282 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
uint32 McalLib_MicroSecToTicks(McalLib_CounterType Counter, uint32 MicroSecond);
# 296 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
void McalLib_SetCounterFreq(McalLib_CounterType Counter, uint32 Freq);
# 309 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
static inline void McalLib_Assert(const uint8 *File, uint32 Line)
{
    (void)File;
    (void)Line;

    for (;;)
    {
    }
}
# 327 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
void McalLib_SuspendAllInterrupts(void);







void McalLib_ResumeAllInterrupts(void);


# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1
# 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h"
#pragma clang section text = ""
# 339 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2
# 30 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h" 2
# 1 "../Generated/inc\\Tim_Pwm_Drv_Cfg.h" 1
# 30 "../Generated/inc\\Tim_Pwm_Drv_Cfg.h"
# 1 "../Generated/inc/Tim_Pwm_Drv_PBcfg.h" 1
# 31 "../Generated/inc\\Tim_Pwm_Drv_Cfg.h" 2
# 31 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h" 2
# 107 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h"
typedef enum
{
   TIM_PWM_DRV_STATUS_SUCCESS = 0x00U,
   TIM_PWM_DRV_STATUS_ERROR = 0x01U,
   TIM_PWM_DRV_STATUS_BUSY = 0x002U,
   TIM_PWM_DRV_STATUS_TIMEOUT = 0x003U,
   TIM_PWM_DRV_STATUS_UNSUPPORTED = 0x004U
} Tim_Pwm_Drv_StatusType;




typedef enum
{
   TIM_PWM_DRV_CLK_DISABLE = 0U,
   TIM_PWM_DRV_CLK_SOURCE_SYSTEM = 1U,
   TIM_PWM_DRV_CLK_SOURCE_FUNCTION = 2U,
   TIM_PWM_DRV_CLK_SOURCE_EXTERNAL = 3U
} Tim_Pwm_Drv_ClkSourceType;




typedef enum
{
   TIM_PWM_DRV_CLK_DIVIDE_1 = 0U,
   TIM_PWM_DRV_CLK_DIVIDE_2,
   TIM_PWM_DRV_CLK_DIVIDE_4,
   TIM_PWM_DRV_CLK_DIVIDE_8,
   TIM_PWM_DRV_CLK_DIVIDE_16,
   TIM_PWM_DRV_CLK_DIVIDE_32,
   TIM_PWM_DRV_CLK_DIVIDE_64,
   TIM_PWM_DRV_CLK_DIVIDE_128
} Tim_Pwm_Drv_ClkDivideType;




typedef enum
{
   TIM_PWM_DRV_COUNTING_UP = 0U,
   TIM_PWM_DRV_COUNTING_UP_AND_DOWN
} Tim_Pwm_Drv_CountingModeType;




typedef enum
{
   TIM_PWM_DRV_LOW_PULSE_POL = 1U,
   TIM_PWM_DRV_HIGH_PULSE_POL
} Tim_Pwm_Drv_PulsePolarityType;




typedef enum
{
   TIM_PWM_DRV_POL_HIGH = 0U,
   TIM_PWM_DRV_POL_LOW
} Tim_Pwm_Drv_PolarityType;




typedef enum
{
   TIM_PWM_DRV_CHANNEL_UNINIT = 0x00U,
   TIM_PWM_DRV_CHANNEL_RUNNING = 0x01U,
   TIM_PWM_DRV_CHANNEL_IDLE = 0x02U,
   TIM_PWM_DRV_CHANNEL_OUTPUT_FORCED = 0x03U
} Tim_Pwm_Drv_ChannelStateType;




typedef enum
{
   TIM_PWM_DRV_OUTPUT_STATE_LOW = 0x00U,
   TIM_PWM_DRV_OUTPUT_STATE_HIGH = 0x01U
} Tim_Pwm_Drv_OutputStateType;





typedef enum
{
   TIM_PWM_DRV_RISING_EDGE = 0U,
   TIM_PWM_DRV_FALLING_EDGE = 1U,
   TIM_PWM_DRV_BOTH_EDGES = 2U
} Tim_Pwm_Drv_EdgeNotifType;





typedef enum
{
   TIM_PWM_DRV_FULL_POWER = 0x00U,
   TIM_PWM_DRV_LOW_POWER = 0x01U,
   TIM_PWM_DRV_NODEFINE_POWER = 0x02U
} Tim_Pwm_Drv_PowerStateType;




typedef enum
{
   TIM_PWM_DRV_MODE_EDGE_ALIGNED = 0x01U,
   TIM_PWM_DRV_MODE_CENTER_ALIGNED = 0x02U,
   TIM_PWM_DRV_MODE_COMBINE_VARIABLE_EDGE_PLACEMENT = 0x03U
} Tim_Pwm_Drv_ChannelModeType;




typedef enum
{
   TIM_PWM_DRV_CLK_DEADTIME_DIVIDE_1 = 0x01U,
   TIM_PWM_DRV_CLK_DEADTIME_DIVIDE_4 = 0x02U,
   TIM_PWM_DRV_CLK_DEADTIME_DIVIDE_16 = 0x03U
} Tim_Pwm_Drv_DeadTimeDivider;





typedef uint8 Tim_Pwm_Drv_EdgeInterruptType;




typedef void (*Tim_Pwm_Drv_CallbackType)(void);




typedef struct
{
    boolean DeadTimeEnable;
    uint16 PhaseShiftValue;
} Tim_Pwm_Drv_PairChannelCfgType;




typedef struct
{
    uint8 ChannelId;
    boolean ChIrqEn;
    Tim_Pwm_Drv_CallbackType ChannelCb;
    boolean ChannelOutputEnable;
    Tim_Pwm_Drv_PolarityType Polarity;


    Tim_Pwm_Drv_ChannelModeType ChannelMode;
    boolean ChannelMatchTrigEnable;
    boolean DmaEn;
    const Tim_Pwm_Drv_PairChannelCfgType *PairCfg;
} Tim_Pwm_Drv_ChannelConfigType;




typedef struct
{
    Tim_Pwm_Drv_ClkSourceType ClkSrc;





    Tim_Pwm_Drv_ClkDivideType ClkDiv;
# 290 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h"
    uint16 PwmPeriod;
    Tim_Pwm_Drv_CountingModeType PwmCounterMode;
    Tim_Pwm_Drv_DeadTimeDivider DeadTimeDiv;
    uint16 DeadTimeVal;
    boolean InitTrigEn;
    boolean OverflowIrqEn;
    Tim_Pwm_Drv_CallbackType OverflowCb;
} Tim_Pwm_Drv_ConfigType;




typedef struct
{
    const Tim_Pwm_Drv_ConfigType *InstanceCfg;
    const Tim_Pwm_Drv_ChannelConfigType * const *ConfiguredChArray;
    uint8 NoOfConfiguredCh;
} Tim_Pwm_Drv_UserCfgType;
# 31 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h" 2
# 74 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ".mcal_config_data"
# 75 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h" 2



extern const Tim_Pwm_Drv_UserCfgType Tim_Pwm_Drv_User2_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch0_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch1_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch2_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch3_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch4_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch5_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch6_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch7_Cfg; extern const Tim_Pwm_Drv_UserCfgType Tim_Pwm_Drv_User3_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch0_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch1_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch2_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch3_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch4_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch5_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch6_Cfg; extern const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch7_Cfg;


# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ""
# 82 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h" 2




# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section text = ".mcal_code"
# 87 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h" 2
# 102 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_Init(uint8 TimId, const Tim_Pwm_Drv_UserCfgType * userCfg);
# 112 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_DeInit(uint8 TimId);
# 125 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_SetDutyCycle(uint8 TimId, uint8 ChannelId, uint16 DutyCycle, boolean SwTrigger);
# 139 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_SetPeriodAndDuty(uint8 TimId, uint8 ChannelId, uint16 Period, uint16 DutyCycle,
                                                                      boolean SwTrigger);
# 153 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_SwOutputControl(uint8 TimId, uint8 ChannelId, Tim_Pwm_Drv_OutputStateType State,
                                                                    boolean ActiveState);
# 167 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
Tim_Pwm_Drv_OutputStateType Tim_Pwm_Drv_GetOutputState(uint8 TimId, uint8 ChannelId);
# 178 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_DisableNotification(uint8 TimId, uint8 ChannelId);
# 190 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_EnableNotification(uint8 TimId, uint8 ChannelId,
                                                 Tim_Pwm_Drv_EdgeNotifType Notification);
# 206 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_SetPhaseShift(uint8 TimId, uint8 ChannelId, uint16 Period, uint16 PhaseShift,
                                                                  boolean SoftwareShift);
# 222 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_SetDutyPhaseShift(uint8 TimId, uint8 ChannelId, uint16 DutyCycle,
                                             uint16 PhaseShift, boolean SotfwareTrigger);
# 233 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
uint16 Tim_Pwm_Drv_GetChannelDutyCycle(uint8 TimId, uint8 ChannelId);
# 244 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_SetCounterDeadTime(uint8 TimId, uint16 DeadTimeVal);
# 255 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_EnableTrigger(uint8 TimId, uint32 TriggerMask);
# 266 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_DisableTrigger(uint8 TimId, uint32 TriggerMask);
# 276 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_SyncUpdate(uint8 TimId);
# 287 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_MaskOutputChannels(uint8 TimId, uint32 ChannelMask);
# 298 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_UnMaskOutputChannels(uint8 TimId, uint32 ChannelMask);
# 309 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_SetPowerState(uint8 TimId, Tim_Pwm_Drv_PowerStateType PowerState);
# 324 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
Tim_Pwm_Drv_ChannelModeType Tim_Pwm_Drv_GetChannelMode(uint8 TimId, uint8 ChannelId);
# 339 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
Tim_Pwm_Drv_ChannelStateType Tim_Pwm_Drv_GetCurrentChannelState(uint8 TimId, uint8 ChannelId);
# 351 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_SetCurrentChannelState(uint8 TimId, uint8 ChannelId,
                                                     Tim_Pwm_Drv_ChannelStateType State);
# 363 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_RevertCurrentChannelState(uint8 TimId, uint8 ChannelId);
# 374 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
Tim_Pwm_Drv_EdgeInterruptType Tim_Pwm_Drv_GetNotifFlag(uint8 TimId, uint8 ChannelId);
# 384 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
uint16 Tim_Pwm_Drv_GetPeriod(uint8 TimId);
# 394 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_SoftwareUpdate(uint8 TimId);
# 404 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_UpdateNow(uint8 TimId);
# 416 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_InitIdleState(uint8 ModuleId, uint8 ChannelId, Tim_Pwm_Drv_OutputStateType State);
# 429 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
Tim_Pwm_Drv_OutputStateType Tim_Pwm_Drv_GetIdleState(uint8 TimId, uint8 ChannelId);
# 440 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_InitInstanceStart(uint8 TimId, const Tim_Pwm_Drv_ConfigType * InstanceCfg);
# 450 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_ProcessTofInterrupt(uint8 TimId);
# 461 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h"
void Tim_Pwm_Drv_ProcessCommonInterrupt(uint8 TimId);




# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section text = ""
# 467 "../../../mcal/Pwm_ZX_K14xM/Inc\\Tim_Pwm_Drv.h" 2
# 27 "../Generated/Src/Tim_Pwm_Drv_PBcfg.c" 2
# 71 "../Generated/Src/Tim_Pwm_Drv_PBcfg.c"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section text = ".mcal_code"
# 72 "../Generated/Src/Tim_Pwm_Drv_PBcfg.c" 2



# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section text = ""
# 76 "../Generated/Src/Tim_Pwm_Drv_PBcfg.c" 2
# 85 "../Generated/Src/Tim_Pwm_Drv_PBcfg.c"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ".mcal_config_data"
# 86 "../Generated/Src/Tim_Pwm_Drv_PBcfg.c" 2




static const Tim_Pwm_Drv_ConfigType Tim_Pwm_Drv_Inst2_Cfg =
{
    .ClkSrc = TIM_PWM_DRV_CLK_SOURCE_FUNCTION,
    .ClkDiv = TIM_PWM_DRV_CLK_DIVIDE_4,
    .PwmPeriod = 8000U,
    .PwmCounterMode = TIM_PWM_DRV_COUNTING_UP,
    .DeadTimeDiv = TIM_PWM_DRV_CLK_DEADTIME_DIVIDE_1,
    .DeadTimeVal = 1U,
    .InitTrigEn = (boolean)0U,
    .OverflowIrqEn = (boolean)1U,
    .OverflowCb = ((void *)0)
};



static const Tim_Pwm_Drv_ConfigType Tim_Pwm_Drv_Inst3_Cfg =
{
    .ClkSrc = TIM_PWM_DRV_CLK_SOURCE_FUNCTION,
    .ClkDiv = TIM_PWM_DRV_CLK_DIVIDE_4,
    .PwmPeriod = 8000U,
    .PwmCounterMode = TIM_PWM_DRV_COUNTING_UP,
    .DeadTimeDiv = TIM_PWM_DRV_CLK_DEADTIME_DIVIDE_1,
    .DeadTimeVal = 1U,
    .InitTrigEn = (boolean)0U,
    .OverflowIrqEn = (boolean)1U,
    .OverflowCb = ((void *)0)
};





const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch0_Cfg =
{
    .ChannelId = 0U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)0U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch1_Cfg =
{
    .ChannelId = 1U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)1U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch2_Cfg =
{
    .ChannelId = 2U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)0U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch3_Cfg =
{
    .ChannelId = 3U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)0U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch4_Cfg =
{
    .ChannelId = 4U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)0U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch5_Cfg =
{
    .ChannelId = 5U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)1U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch6_Cfg =
{
    .ChannelId = 6U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)1U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I2_Ch7_Cfg =
{
    .ChannelId = 7U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)1U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch0_Cfg =
{
    .ChannelId = 0U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)1U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch1_Cfg =
{
    .ChannelId = 1U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)0U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch2_Cfg =
{
    .ChannelId = 2U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)1U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch3_Cfg =
{
    .ChannelId = 3U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)1U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch4_Cfg =
{
    .ChannelId = 4U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)0U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch5_Cfg =
{
    .ChannelId = 5U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)1U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch6_Cfg =
{
    .ChannelId = 6U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)0U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};



const Tim_Pwm_Drv_ChannelConfigType Tim_Pwm_Drv_I3_Ch7_Cfg =
{
    .ChannelId = 7U,
    .ChIrqEn = (boolean)1U,
    .ChannelCb = ((void *)0),
    .ChannelOutputEnable = (boolean)0U,
    .Polarity = TIM_PWM_DRV_POL_HIGH,
    .ChannelMode = TIM_PWM_DRV_MODE_EDGE_ALIGNED,
    .ChannelMatchTrigEnable = (boolean)1U,
    .DmaEn = (boolean)0U,
    .PairCfg = ((void *)0)
};




static const Tim_Pwm_Drv_ChannelConfigType * const Tim_Pwm_Drv_I2_ChArrayPtr[8U] =
{
    &Tim_Pwm_Drv_I2_Ch0_Cfg,
    &Tim_Pwm_Drv_I2_Ch1_Cfg,
    &Tim_Pwm_Drv_I2_Ch2_Cfg,
    &Tim_Pwm_Drv_I2_Ch3_Cfg,
    &Tim_Pwm_Drv_I2_Ch4_Cfg,
    &Tim_Pwm_Drv_I2_Ch5_Cfg,
    &Tim_Pwm_Drv_I2_Ch6_Cfg,
    &Tim_Pwm_Drv_I2_Ch7_Cfg
};



static const Tim_Pwm_Drv_ChannelConfigType * const Tim_Pwm_Drv_I3_ChArrayPtr[8U] =
{
    &Tim_Pwm_Drv_I3_Ch0_Cfg,
    &Tim_Pwm_Drv_I3_Ch1_Cfg,
    &Tim_Pwm_Drv_I3_Ch2_Cfg,
    &Tim_Pwm_Drv_I3_Ch3_Cfg,
    &Tim_Pwm_Drv_I3_Ch4_Cfg,
    &Tim_Pwm_Drv_I3_Ch5_Cfg,
    &Tim_Pwm_Drv_I3_Ch6_Cfg,
    &Tim_Pwm_Drv_I3_Ch7_Cfg
};




const Tim_Pwm_Drv_UserCfgType Tim_Pwm_Drv_User2_Cfg =
{
    .InstanceCfg = &Tim_Pwm_Drv_Inst2_Cfg,
    .ConfiguredChArray = Tim_Pwm_Drv_I2_ChArrayPtr,
    .NoOfConfiguredCh = 8U
};



const Tim_Pwm_Drv_UserCfgType Tim_Pwm_Drv_User3_Cfg =
{
    .InstanceCfg = &Tim_Pwm_Drv_Inst3_Cfg,
    .ConfiguredChArray = Tim_Pwm_Drv_I3_ChArrayPtr,
    .NoOfConfiguredCh = 8U
};



# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ""
# 411 "../Generated/Src/Tim_Pwm_Drv_PBcfg.c" 2