# 1 "../Generated/Src/Pwm_PBcfg.c"
# 1 "<built-in>" 1
# 1 "<built-in>" 3
# 387 "<built-in>" 3
# 1 "<command line>" 1
# 1 "<built-in>" 2
# 1 "../Generated/Src/Pwm_PBcfg.c" 2
# 26 "../Generated/Src/Pwm_PBcfg.c"
# 1 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h" 1
# 29 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
# 1 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Types.h" 1
# 30 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Types.h"
# 1 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Drvw_Types.h" 1
# 29 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Drvw_Types.h"
# 1 "../Generated/inc\\Pwm_Drvw_Cfg.h" 1
# 29 "../Generated/inc\\Pwm_Drvw_Cfg.h"
# 1 "../Generated/inc/Pwm_Drvw_PBcfg.h" 1
# 30 "../Generated/inc\\Pwm_Drvw_Cfg.h" 2
# 30 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Drvw_Types.h" 2
# 1 "../../../mcal/Pwm_ZX_K14xM/Inc/Mcpwm_Pwm_Drv_Types.h" 1
# 29 "../../../mcal/Pwm_ZX_K14xM/Inc/Mcpwm_Pwm_Drv_Types.h"
# 1 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 1
# 29 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
# 1 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" 1
# 29 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" 1
# 30 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/Platform_Types.h" 1
# 86 "../../../mcal/Base_ZX_K14xM/Inc/Platform_Types.h"
typedef unsigned char boolean;




typedef unsigned char uint8;




typedef unsigned short uint16;




typedef unsigned int uint32;





typedef unsigned long long uint64;




typedef signed char sint8;




typedef signed short sint16;




typedef signed int sint32;





typedef signed long long sint64;




typedef unsigned long uint8_least;




typedef unsigned long uint16_least;





typedef unsigned long uint32_least;




typedef signed long sint8_least;




typedef signed long sint16_least;




typedef signed long sint32_least;




typedef float float32;





typedef double float64;




typedef void *VoidPtr;




typedef const void *ConstVoidPtr;
# 31 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" 2
# 1 "../../../mcal/Base_ZX_K14xM/Inc/Compiler.h" 1
# 31 "../../../mcal/Base_ZX_K14xM/Inc/Compiler.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/Compiler_Cfg.h" 1
# 32 "../../../mcal/Base_ZX_K14xM/Inc/Compiler.h" 2
# 32 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" 2
# 63 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h"
typedef unsigned char StatusType;
# 104 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h"
typedef uint8 Std_ReturnType;




typedef uint8 Std_TransformerClass;




typedef uint8 Std_TransformerForwardCode;





typedef uint8 Std_MessageTypeType;





typedef uint8 Std_MessageResultType;





typedef struct
{
    uint16 vendorID;
    uint16 moduleID;
    uint8 sw_major_version;
    uint8 sw_minor_version;
    uint8 sw_patch_version;
} Std_VersionInfoType;




typedef struct
{
    uint8 errorCode;
    Std_TransformerClass transformerClass;
} Std_TransformerError;





typedef struct
{
    Std_TransformerForwardCode errorCode;
    Std_TransformerClass transformerClass;
} Std_TransformerForward;







typedef Std_ReturnType (*Std_ExtractProtocolHeaderFieldsType)(const uint8 *buffer,
                                                              uint32 bufferLength,
                                                              Std_MessageTypeType *messageType,
                                                              Std_MessageResultType *messageResult);
# 30 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" 2
# 1 "../Generated/inc\\McalLib_Cfg.h" 1
# 31 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" 2
# 273 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h"
static inline uint32 McalLib_ReadControlReg(void)
{
    uint32 res;

    __asm("MRS %0,CONTROL" : "=r" (res));

    return res;
}
# 290 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h"
static inline uint32 McalLib_ReadIpsrReg(void)
{
    uint32 res;
    __asm("MRS %0,IPSR" : "=r" (res));
    return res;
}
# 305 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h"
static inline uint32 McalLib_ReadPriMaskReg(void)
{
    uint32 res;
    __asm("MRS %0,PRIMASK" : "=r" (res));
    return res;
}
# 30 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2
# 184 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
typedef enum
{
    MCALLIB_COUNTER_SOFTWARE,

    MCALLIB_COUNTER_OS,




} McalLib_CounterType;




typedef struct
{
    uint32 CounterId;
    uint32 CounterFreq;
} McalLib_ConfigType;







# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1
# 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h"
#pragma clang section rodata = ".mcal_config_data"
# 211 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2

extern const McalLib_ConfigType *const McalLib_PreDefinedConfigPtr[(1U)];


# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1
# 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h"
#pragma clang section rodata = ""
# 216 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2
# 230 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
extern void Sys_SystemReset(void);


# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1
# 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h"
#pragma clang section text = ".mcal_code"
# 234 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2







void McalLib_Init(void);
# 254 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
Std_ReturnType McalLib_GetCounterValue(McalLib_CounterType Counter, uint32 *Value);
# 270 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
Std_ReturnType McalLib_GetElapsedValue(McalLib_CounterType Counter, uint32 *const CounterValue,
                                       uint32 *ElapsedValue);
# 282 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
uint32 McalLib_MicroSecToTicks(McalLib_CounterType Counter, uint32 MicroSecond);
# 296 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
void McalLib_SetCounterFreq(McalLib_CounterType Counter, uint32 Freq);
# 309 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
static inline void McalLib_Assert(const uint8 *File, uint32 Line)
{
    (void)File;
    (void)Line;

    for (;;)
    {
    }
}
# 327 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h"
void McalLib_SuspendAllInterrupts(void);







void McalLib_ResumeAllInterrupts(void);


# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1
# 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h"
#pragma clang section text = ""
# 339 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2
# 30 "../../../mcal/Pwm_ZX_K14xM/Inc/Mcpwm_Pwm_Drv_Types.h" 2
# 1 "../Generated/inc\\Mcpwm_Pwm_Drv_Cfg.h" 1
# 30 "../Generated/inc\\Mcpwm_Pwm_Drv_Cfg.h"
# 1 "../Generated/inc/Mcpwm_Pwm_Drv_PBcfg.h" 1
# 31 "../Generated/inc\\Mcpwm_Pwm_Drv_Cfg.h" 2
# 31 "../../../mcal/Pwm_ZX_K14xM/Inc/Mcpwm_Pwm_Drv_Types.h" 2
# 108 "../../../mcal/Pwm_ZX_K14xM/Inc/Mcpwm_Pwm_Drv_Types.h"
typedef enum
{
   MCPWM_PWM_DRV_STATUS_SUCCESS = 0x00U,
   MCPWM_PWM_DRV_STATUS_ERROR = 0x01U,
   MCPWM_PWM_DRV_STATUS_BUSY = 0x002U,
   MCPWM_PWM_DRV_STATUS_TIMEOUT = 0x003U,
   MCPWM_PWM_DRV_STATUS_UNSUPPORTED = 0x004U
} Mcpwm_Pwm_Drv_StatusType;




typedef enum
{
   MCPWM_PWM_DRV_CLK_DISABLE = 0U,
   MCPWM_PWM_DRV_CLK_SOURCE_SYSTEM = 1U,
   MCPWM_PWM_DRV_CLK_SOURCE_FUNCTION = 2U,
   MCPWM_PWM_DRV_CLK_SOURCE_EXTERNAL = 3U
} Mcpwm_Pwm_Drv_ClkSourceType;




typedef enum
{
   MCPWM_PWM_DRV_CLK_DIVIDE_1 = 0U,
   MCPWM_PWM_DRV_CLK_DIVIDE_2,
   MCPWM_PWM_DRV_CLK_DIVIDE_4,
   MCPWM_PWM_DRV_CLK_DIVIDE_8,
   MCPWM_PWM_DRV_CLK_DIVIDE_16,
   MCPWM_PWM_DRV_CLK_DIVIDE_32,
   MCPWM_PWM_DRV_CLK_DIVIDE_64,
   MCPWM_PWM_DRV_CLK_DIVIDE_128
} Mcpwm_Pwm_Drv_ClkDivideType;




typedef enum
{
   MCPWM_PWM_DRV_COUNTING_UP = 0U,
   MCPWM_PWM_DRV_COUNTING_UP_AND_DOWN
} Mcpwm_Pwm_Drv_CountingModeType;




typedef enum
{
   MCPWM_PWM_DRV_LOW_PULSE_POL = 0U,
   MCPWM_PWM_DRV_HIGH_PULSE_POL
} Mcpwm_Pwm_Drv_PulsePolarityType;




typedef enum
{
   MCPWM_PWM_DRV_POL_HIGH = 0U,
   MCPWM_PWM_DRV_POL_LOW
} Mcpwm_Pwm_Drv_PolarityType;




typedef enum
{
   MCPWM_PWM_DRV_SYMMETRIC = 0U,
   MCPWM_PWM_DRV_ASYMMETRIC
} Mcpwm_Pwm_Drv_AsymType;




typedef enum
{
   MCPWM_PWM_DRV_CHANNEL_UNINIT = 0x00U,
   MCPWM_PWM_DRV_CHANNEL_RUNNING = 0x01U,
   MCPWM_PWM_DRV_CHANNEL_IDLE = 0x02U,
   MCPWM_PWM_DRV_CHANNEL_OUTPUT_FORCED = 0x03U
} Mcpwm_Pwm_Drv_ChannelStateType;




typedef enum
{
   MCPWM_PWM_DRV_OUTPUT_STATE_LOW = 0x00U,
   MCPWM_PWM_DRV_OUTPUT_STATE_HIGH = 0x01U
} Mcpwm_Pwm_Drv_OutputStateType;





typedef enum
{
   MCPWM_PWM_DRV_RISING_EDGE = 0U,
   MCPWM_PWM_DRV_FALLING_EDGE = 1U,
   MCPWM_PWM_DRV_BOTH_EDGES = 2U
} Mcpwm_Pwm_Drv_EdgeNotifType;





typedef enum
{
   MCPWM_PWM_DRV_FULL_POWER = 0x00U,
   MCPWM_PWM_DRV_LOW_POWER = 0x01U,
   MCPWM_PWM_DRV_NODEFINE_POWER = 0x02U
} Mcpwm_Pwm_Drv_PowerStateType;




typedef enum
{
   MCPWM_PWM_DRV_MODE_EDGE_ALIGNED = 0x01,
   MCPWM_PWM_DRV_MODE_CENTER_ALIGNED = 0x02,
   MCPWM_PWM_DRV_MODE_COMBINE_EDGE_ALIGNED = 0x03,
   MCPWM_PWM_DRV_MODE_COMBINE_SYM_CENTER_ALIGNED = 0x04,
   MCPWM_PWM_DRV_MODE_COMBINE_VARIABLE_EDGE_PLACEMENT = 0x06
} Mcpwm_Pwm_Drv_ChannelModeType;




typedef uint8 Mcpwm_Pwm_Drv_EdgeInterruptType;




typedef void (*Mcpwm_Pwm_Drv_CallbackType)(void);




typedef struct
{
   boolean DeadTimeEnable;
   uint16 PhaseShiftValue;
} Mcpwm_Pwm_Drv_PairChannelCfgType;




typedef struct
{
    uint8 ChannelId;
    boolean ChIrqEn;
    Mcpwm_Pwm_Drv_CallbackType ChannelCb;
    boolean ChannelOutputEnable;
    Mcpwm_Pwm_Drv_PolarityType Polarity;


    Mcpwm_Pwm_Drv_ChannelModeType ChannelMode;
    uint8 ChannelDither;
    boolean ChannelMatchTrigEnable;
    boolean DmaEn;
    const Mcpwm_Pwm_Drv_PairChannelCfgType *PairCfg;
} Mcpwm_Pwm_Drv_ChannelConfigType;




typedef struct
{
    uint8 CntId;
    uint16 PwmPeriod;
    uint16 PwmPeriodDither;
    uint16 DeadTimeVal;
    boolean OverflowIrqEn;
    Mcpwm_Pwm_Drv_CallbackType OverflowCb;
} Mcpwm_Pwm_Drv_CounterType;




typedef struct
{
    Mcpwm_Pwm_Drv_ClkSourceType ClkSrc;




    Mcpwm_Pwm_Drv_ClkDivideType ClkDiv;
# 303 "../../../mcal/Pwm_ZX_K14xM/Inc/Mcpwm_Pwm_Drv_Types.h"
    boolean GlobalCntEn;
    boolean InitTrigEn;
    uint8 CounterNum;
    const Mcpwm_Pwm_Drv_CounterType * const *CounterConfig;
} Mcpwm_Pwm_Drv_ConfigType;




typedef struct
{
    const Mcpwm_Pwm_Drv_ConfigType *InstanceCfg;
    const Mcpwm_Pwm_Drv_ChannelConfigType * const *ConfiguredChArray;
    uint8 NoOfConfiguredCh;
} Mcpwm_Pwm_Drv_UserCfgType;
# 31 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Drvw_Types.h" 2
# 1 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h" 1
# 30 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h"
# 1 "../Generated/inc\\Tim_Pwm_Drv_Cfg.h" 1
# 30 "../Generated/inc\\Tim_Pwm_Drv_Cfg.h"
# 1 "../Generated/inc/Tim_Pwm_Drv_PBcfg.h" 1
# 31 "../Generated/inc\\Tim_Pwm_Drv_Cfg.h" 2
# 31 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h" 2
# 107 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h"
typedef enum
{
   TIM_PWM_DRV_STATUS_SUCCESS = 0x00U,
   TIM_PWM_DRV_STATUS_ERROR = 0x01U,
   TIM_PWM_DRV_STATUS_BUSY = 0x002U,
   TIM_PWM_DRV_STATUS_TIMEOUT = 0x003U,
   TIM_PWM_DRV_STATUS_UNSUPPORTED = 0x004U
} Tim_Pwm_Drv_StatusType;




typedef enum
{
   TIM_PWM_DRV_CLK_DISABLE = 0U,
   TIM_PWM_DRV_CLK_SOURCE_SYSTEM = 1U,
   TIM_PWM_DRV_CLK_SOURCE_FUNCTION = 2U,
   TIM_PWM_DRV_CLK_SOURCE_EXTERNAL = 3U
} Tim_Pwm_Drv_ClkSourceType;




typedef enum
{
   TIM_PWM_DRV_CLK_DIVIDE_1 = 0U,
   TIM_PWM_DRV_CLK_DIVIDE_2,
   TIM_PWM_DRV_CLK_DIVIDE_4,
   TIM_PWM_DRV_CLK_DIVIDE_8,
   TIM_PWM_DRV_CLK_DIVIDE_16,
   TIM_PWM_DRV_CLK_DIVIDE_32,
   TIM_PWM_DRV_CLK_DIVIDE_64,
   TIM_PWM_DRV_CLK_DIVIDE_128
} Tim_Pwm_Drv_ClkDivideType;




typedef enum
{
   TIM_PWM_DRV_COUNTING_UP = 0U,
   TIM_PWM_DRV_COUNTING_UP_AND_DOWN
} Tim_Pwm_Drv_CountingModeType;




typedef enum
{
   TIM_PWM_DRV_LOW_PULSE_POL = 1U,
   TIM_PWM_DRV_HIGH_PULSE_POL
} Tim_Pwm_Drv_PulsePolarityType;




typedef enum
{
   TIM_PWM_DRV_POL_HIGH = 0U,
   TIM_PWM_DRV_POL_LOW
} Tim_Pwm_Drv_PolarityType;




typedef enum
{
   TIM_PWM_DRV_CHANNEL_UNINIT = 0x00U,
   TIM_PWM_DRV_CHANNEL_RUNNING = 0x01U,
   TIM_PWM_DRV_CHANNEL_IDLE = 0x02U,
   TIM_PWM_DRV_CHANNEL_OUTPUT_FORCED = 0x03U
} Tim_Pwm_Drv_ChannelStateType;




typedef enum
{
   TIM_PWM_DRV_OUTPUT_STATE_LOW = 0x00U,
   TIM_PWM_DRV_OUTPUT_STATE_HIGH = 0x01U
} Tim_Pwm_Drv_OutputStateType;





typedef enum
{
   TIM_PWM_DRV_RISING_EDGE = 0U,
   TIM_PWM_DRV_FALLING_EDGE = 1U,
   TIM_PWM_DRV_BOTH_EDGES = 2U
} Tim_Pwm_Drv_EdgeNotifType;





typedef enum
{
   TIM_PWM_DRV_FULL_POWER = 0x00U,
   TIM_PWM_DRV_LOW_POWER = 0x01U,
   TIM_PWM_DRV_NODEFINE_POWER = 0x02U
} Tim_Pwm_Drv_PowerStateType;




typedef enum
{
   TIM_PWM_DRV_MODE_EDGE_ALIGNED = 0x01U,
   TIM_PWM_DRV_MODE_CENTER_ALIGNED = 0x02U,
   TIM_PWM_DRV_MODE_COMBINE_VARIABLE_EDGE_PLACEMENT = 0x03U
} Tim_Pwm_Drv_ChannelModeType;




typedef enum
{
   TIM_PWM_DRV_CLK_DEADTIME_DIVIDE_1 = 0x01U,
   TIM_PWM_DRV_CLK_DEADTIME_DIVIDE_4 = 0x02U,
   TIM_PWM_DRV_CLK_DEADTIME_DIVIDE_16 = 0x03U
} Tim_Pwm_Drv_DeadTimeDivider;





typedef uint8 Tim_Pwm_Drv_EdgeInterruptType;




typedef void (*Tim_Pwm_Drv_CallbackType)(void);




typedef struct
{
    boolean DeadTimeEnable;
    uint16 PhaseShiftValue;
} Tim_Pwm_Drv_PairChannelCfgType;




typedef struct
{
    uint8 ChannelId;
    boolean ChIrqEn;
    Tim_Pwm_Drv_CallbackType ChannelCb;
    boolean ChannelOutputEnable;
    Tim_Pwm_Drv_PolarityType Polarity;


    Tim_Pwm_Drv_ChannelModeType ChannelMode;
    boolean ChannelMatchTrigEnable;
    boolean DmaEn;
    const Tim_Pwm_Drv_PairChannelCfgType *PairCfg;
} Tim_Pwm_Drv_ChannelConfigType;




typedef struct
{
    Tim_Pwm_Drv_ClkSourceType ClkSrc;





    Tim_Pwm_Drv_ClkDivideType ClkDiv;
# 290 "../../../mcal/Pwm_ZX_K14xM/Inc/Tim_Pwm_Drv_Types.h"
    uint16 PwmPeriod;
    Tim_Pwm_Drv_CountingModeType PwmCounterMode;
    Tim_Pwm_Drv_DeadTimeDivider DeadTimeDiv;
    uint16 DeadTimeVal;
    boolean InitTrigEn;
    boolean OverflowIrqEn;
    Tim_Pwm_Drv_CallbackType OverflowCb;
} Tim_Pwm_Drv_ConfigType;




typedef struct
{
    const Tim_Pwm_Drv_ConfigType *InstanceCfg;
    const Tim_Pwm_Drv_ChannelConfigType * const *ConfiguredChArray;
    uint8 NoOfConfiguredCh;
} Tim_Pwm_Drv_UserCfgType;
# 32 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Drvw_Types.h" 2
# 104 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Drvw_Types.h"
typedef uint8 Pwm_Drvw_ModuleType;






typedef enum
{
    PWM_DRVW_HW_NONE = 0x00U,
    PWM_DRVW_HW_MCPWM = 0x01U,
    PWM_DRVW_HW_TIM = 0x02U
} Pwm_Drvw_HwType;






typedef enum
{
    PWM_DRVW_LOW = 0x00U,
    PWM_DRVW_HIGH
} Pwm_Drvw_OutputStateType;




typedef uint16 Pwm_Drvw_PeriodType;




typedef enum
{
    PWM_DRVW_RISING_EDGE = 0U,
    PWM_DRVW_FALLING_EDGE,
    PWM_DRVW_BOTH_EDGE
} Pwm_Drvw_EdgeNotificationType;




typedef enum
{
  PWM_DRVW_FULL_POWER = 0x00U,
  PWM_DRVW_LOW_POWER,
  PWM_DRVW_NODEFINE_POWER
} Pwm_Drvw_PowerStateType;






typedef struct
{
    const Pwm_Drvw_ModuleType ChnHwId;
    const Pwm_Drvw_HwType ChnHwType;
    const uint16 ChannelDutyCycle;
    const Mcpwm_Pwm_Drv_ChannelConfigType
                * McpwmChConfig;
    const Tim_Pwm_Drv_ChannelConfigType
                * TimChConfig;
} Pwm_Drvw_ChannelConfigType;






typedef struct
{
    uint8 HwId;
    const Pwm_Drvw_HwType HwType;
    const Mcpwm_Pwm_Drv_UserCfgType
                * McpwmHwConfig;
    const Tim_Pwm_Drv_UserCfgType * TimHwConfig;
} Pwm_Drvw_HwConfigType;
# 31 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Types.h" 2
# 1 "../Generated/inc\\Pwm_Cfg.h" 1
# 32 "../Generated/inc\\Pwm_Cfg.h"
# 1 "../Generated/inc/Pwm_PBcfg.h" 1
# 52 "../Generated/inc/Pwm_PBcfg.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ".mcal_config_data"
# 53 "../Generated/inc/Pwm_PBcfg.h" 2



# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ""
# 57 "../Generated/inc/Pwm_PBcfg.h" 2
# 33 "../Generated/inc\\Pwm_Cfg.h" 2
# 32 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Types.h" 2
# 90 "../../../mcal/Pwm_ZX_K14xM/Inc/Pwm_Types.h"
typedef uint8 Pwm_ChannelType;




typedef uint8 Pwm_HwNumType;




typedef Pwm_Drvw_PeriodType Pwm_PeriodType;






typedef enum
{
    PWM_LOW = 0x00U,
    PWM_HIGH
} Pwm_OutputStateType;




typedef enum
{
    PWM_RISING_EDGE = 0U,
    PWM_FALLING_EDGE,
    PWM_BOTH_EDGE
} Pwm_EdgeNotificationType;




typedef enum
{
    PWM_VARIABLE_PERIOD = 0x00U,
    PWM_FIXED_PERIOD,
    PWM_FIXED_PERIOD_SHIFTED
} Pwm_ChannelClassType;




typedef void (*Pwm_NotifyType)(void);




typedef struct
{
    const Pwm_ChannelType ChannelId;
    const Pwm_ChannelClassType PwmChnClass;
    const Pwm_Drvw_ChannelConfigType * DrvwChannelCfg;
    const Pwm_OutputStateType ChannelIdleState;

    const Pwm_NotifyType PwmChannelNotificationPtr;

} Pwm_ChannelConfigType;




typedef struct
{
    const Pwm_ChannelType NumChannels;
    const Pwm_ChannelConfigType (*PwmChannelConfigs)[];
    const Pwm_HwNumType NumModules;
    const Pwm_Drvw_HwConfigType (*PwmHwConfig)[];
} Pwm_ConfigType;




typedef enum
{
    PWM_SERVICE_ACCEPTED = 0x00U,
    PWM_NOT_INIT,
    PWM_SEQUENCE_ERROR,
    PWM_HW_FAILURE,
    PWM_POWER_STATE_NOT_SUPP,
    PWM_TRANS_NOT_POSSIBLE
} Pwm_PowerStateRequestResultType;




typedef enum {
    PWM_FULL_POWER = 0x00U,
    PWM_LOW_POWER,
    PWM_NODEFINE_POWER
} Pwm_PowerStateType;





typedef enum
{
    PWM_STATE_UNINIT = 0x00U,
    PWM_STATE_IDLE = 0x01U
} Pwm_GlobalStateType;





typedef struct
{

    Pwm_GlobalStateType PwmGlobalState;

    Pwm_PowerStateType PwmCurrentPowerState;
    Pwm_PowerStateType PwmTargetPowerState;
} Pwm_DriverStateType;
# 30 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h" 2
# 320 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 848 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ".mcal_config_data"
# 321 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h" 2
extern const Pwm_ConfigType * const Pwm_PreDefinedConfigPtr[(1U)];

# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 864 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ""
# 324 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h" 2
# 337 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section text = ".mcal_code"
# 338 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h" 2
# 350 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_Init(const Pwm_ConfigType * ConfigPtr);
# 360 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_DeInit(void);
# 372 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_SetDutyCycle(Pwm_ChannelType ChannelNumber, uint16 DutyCycle);
# 385 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_SetPeriodAndDuty(Pwm_ChannelType ChannelNumber, Pwm_PeriodType Period,
                        uint16 DutyCycle);
# 398 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_SetOutputToIdle(Pwm_ChannelType ChannelNumber);
# 411 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
Pwm_OutputStateType Pwm_GetOutputState(Pwm_ChannelType ChannelNumber);
# 422 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_DisableNotification(Pwm_ChannelType ChannelNumber);
# 435 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_EnableNotification(Pwm_ChannelType ChannelNumber, Pwm_EdgeNotificationType Notification);
# 446 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_GetVersionInfo(Std_VersionInfoType * versioninfo);
# 461 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
uint16 Pwm_GetChannelDutyCycle(Pwm_ChannelType ChannelNumber);
# 473 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_ForceOutputToLowLevel(Pwm_ChannelType ChannelNumber, boolean ForceEnable);
# 485 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_SetChannelDeadTimeTicks(Pwm_ChannelType ChannelNumber, uint16 DeadTimeTicks);
# 501 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_WriteDutyCycleToBuffer(Pwm_ChannelType ChannelNumber, uint16 DutyCycle);
# 517 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_WritePeriodAndDutyToBuffer(Pwm_ChannelType ChannelNumber, Pwm_PeriodType Period,
                                    uint16 DutyCycle);
# 536 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_WritePhaseShiftTicksToBuffer(Pwm_ChannelType ChannelNumber, Pwm_PeriodType Period,
                                        uint16 PhaseShiftTicks);
# 548 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_SyncUpdate(uint8 ModuleId);
# 562 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_SetPhaseShiftTicks(Pwm_ChannelType ChannelNumber, Pwm_PeriodType Period,
                            uint16 PhaseShiftTicks);
# 580 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_SetDutyPhaseShiftTicks(Pwm_ChannelType ChannelNumber, uint16 DutyCycle,
                                uint16 PhaseShiftTicks, boolean SyncUpdate);
# 594 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_EnableTriggerOutput(uint8 ModuleId, uint16 TriggerMask);
# 606 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_DisableTriggerOutput(uint8 ModuleId, uint16 TriggerMask);
# 618 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_MaskOutputs(uint8 ModuleId, uint8 ChannelMask);
# 628 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
void Pwm_UnMaskOutputs(uint8 ModuleId, uint8 ChannelMask);
# 648 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
Std_ReturnType Pwm_SetPowerState(Pwm_PowerStateRequestResultType * Result);
# 663 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
Std_ReturnType Pwm_GetCurrentPowerState(Pwm_PowerStateType * CurrentPowerState,
                                        Pwm_PowerStateRequestResultType * Result);
# 679 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
Std_ReturnType Pwm_GetTargetPowerState(Pwm_PowerStateType * TargetPowerState,
                                       Pwm_PowerStateRequestResultType * Result);
# 701 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h"
Std_ReturnType Pwm_PreparePowerState(Pwm_PowerStateType PowerState,
                                     Pwm_PowerStateRequestResultType * Result);



# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section text = ""
# 707 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm.h" 2
# 27 "../Generated/Src/Pwm_PBcfg.c" 2
# 1 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h" 1
# 67 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ".mcal_config_data"
# 68 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h" 2



extern const Pwm_Drvw_HwConfigType Pwm_Instances[((uint8)4U)]; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch0_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch1_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch2_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch3_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch4_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch9_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch10_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch11_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch12_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch5_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch6_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch7_Config; extern const Pwm_Drvw_ChannelConfigType Pwm_Drvw_Ch8_Config;


# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ""
# 75 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h" 2



# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section text = ".mcal_code"
# 79 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h" 2
# 91 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_Init(const Pwm_Drvw_HwConfigType * const HwCfgPtr);
# 101 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_SetDefaultDutyCycle(uint16 DutyCyclePu,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 112 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_SyncDefaultDutyCycle(uint8 ModuleId, Pwm_Drvw_HwType HwType);
# 121 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_StartInstance(const Pwm_Drvw_HwConfigType * const HwCfgPtr);
# 131 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_InitIdleState(Pwm_Drvw_OutputStateType State,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 142 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_DeInit(const Pwm_Drvw_HwConfigType * const HwCfgPtr);
# 157 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
Std_ReturnType Pwm_Drvw_SetDutyCycle(uint16 DutyCyclePu,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 174 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
Std_ReturnType Pwm_Drvw_SetPeriodAndDuty(Pwm_Drvw_PeriodType Period, uint16 DutyCyclePu,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 187 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_SetOutputToIdle(const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 201 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
Pwm_Drvw_OutputStateType Pwm_Drvw_GetOutputState(
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 214 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_DisableNotification(const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 225 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_EnableNotification(Pwm_Drvw_EdgeNotificationType Notification,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 240 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
Std_ReturnType Pwm_Drvw_CheckEdgeNotificationType(Pwm_Drvw_EdgeNotificationType Notification,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 253 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
uint16 Pwm_Drvw_GetChannelDutyCycle(const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 266 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_ForceOutputToLowLevel(boolean Force,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 282 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
Std_ReturnType Pwm_Drvw_SetChannelDeadTimeTicks(uint16 DeadTimeTicks,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 300 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
Std_ReturnType Pwm_Drvw_WriteDutyCycleToBuffer(uint16 DutyCyclePu,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 317 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
Std_ReturnType Pwm_Drvw_WritePeriodAndDutyToBuffer(Pwm_Drvw_PeriodType Period, uint16 DutyCyclePu,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 333 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_WritePhaseShiftTicksToBuffer(uint16 Period, uint16 PhaseShiftTicks,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 347 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_SyncUpdate(const Pwm_Drvw_HwConfigType * HwCfgPtr);
# 362 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_SetPhaseShiftTicks(uint16 Period, uint16 PhaseShiftTicks,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 380 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_SetDutyPhaseShiftTicks(uint16 DutyCyclePu, uint16 PhaseShiftTicks,
                const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr, boolean SyncUpdate);
# 396 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_EnableTriggerOutput(uint16 TrigMask, const Pwm_Drvw_HwConfigType * const HwCfgPtr);
# 411 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_DisableTriggerOutput(uint16 TrigMask, const Pwm_Drvw_HwConfigType * const HwCfgPtr);
# 425 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_MaskOutputs(uint8 ChannelMask, const Pwm_Drvw_HwConfigType * const HwCfgPtr);
# 437 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_UnMaskOutputs(uint8 ChannelMask, const Pwm_Drvw_HwConfigType * const HwCfgPtr);
# 450 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
Std_ReturnType Pwm_Drvw_CheckIdleState(const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 462 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
void Pwm_Drvw_SetPowerState(const Pwm_Drvw_HwConfigType * const HwCfgPtr,
                                                       Pwm_Drvw_PowerStateType PowerState);
# 479 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
uint32 Pwm_Drvw_GetMaxPeriodValue(const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 495 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
Std_ReturnType Pwm_Drvw_CheckDeadTimeMode(const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 512 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
Std_ReturnType Pwm_Drvw_CheckSetDutyPhaseShiftParams(uint16 PhaseShiftTicks, uint16 DutyCyclePu,
                                    const Pwm_Drvw_ChannelConfigType * const ChnConfigPtr);
# 522 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section text = ""
# 523 "../../../mcal/Pwm_ZX_K14xM/Inc\\Pwm_Drvw.h" 2
# 28 "../Generated/Src/Pwm_PBcfg.c" 2
# 70 "../Generated/Src/Pwm_PBcfg.c"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ".mcal_config_data"
# 71 "../Generated/Src/Pwm_PBcfg.c" 2






static const Pwm_ChannelConfigType Pwm_Channels[((uint8)13U)] =
{

    {
        .ChannelId = (Pwm_ChannelType)0U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch0_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)1U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch1_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)2U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch2_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)3U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch3_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)4U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch4_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)5U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch5_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)6U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch6_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)7U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch7_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)8U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch8_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)9U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch9_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)10U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch10_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)11U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch11_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    },

    {
        .ChannelId = (Pwm_ChannelType)12U,
        .PwmChnClass = PWM_FIXED_PERIOD,
        .DrvwChannelCfg = &Pwm_Drvw_Ch12_Config,
        .ChannelIdleState = PWM_LOW,
        .PwmChannelNotificationPtr = ((void *)0)
    }
 };




static const Pwm_ConfigType Pwm_Config =
{
    .NumChannels = (Pwm_ChannelType)((uint8)13U),
    &Pwm_Channels,
    .NumModules = (Pwm_HwNumType)((uint8)4U),
    &Pwm_Instances
};




const Pwm_ConfigType * const Pwm_PreDefinedConfigPtr[(1U)] =
{
    &Pwm_Config
};



# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section rodata = ""
# 207 "../Generated/Src/Pwm_PBcfg.c" 2
# 226 "../Generated/Src/Pwm_PBcfg.c"
# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section text = ".mcal_code"
# 227 "../Generated/Src/Pwm_PBcfg.c" 2



# 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h" 1
# 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Pwm_MemMap.h"
#pragma clang section text = ""
# 231 "../Generated/Src/Pwm_PBcfg.c" 2