# 1 "../Generated/Src/Can_Drv_PBcfg.c" # 1 "" 1 # 1 "" 3 # 387 "" 3 # 1 "" 1 # 1 "" 2 # 1 "../Generated/Src/Can_Drv_PBcfg.c" 2 # 31 "../Generated/Src/Can_Drv_PBcfg.c" # 1 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" 1 # 29 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" # 1 "../../../mcal/Can_ZX_K14xM/Inc/Can_Drv_Types.h" 1 # 29 "../../../mcal/Can_ZX_K14xM/Inc/Can_Drv_Types.h" # 1 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" 1 # 30 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" # 1 "../../../mcal/Base_ZX_K14xM/Inc/Platform_Types.h" 1 # 86 "../../../mcal/Base_ZX_K14xM/Inc/Platform_Types.h" typedef unsigned char boolean; typedef unsigned char uint8; typedef unsigned short uint16; typedef unsigned int uint32; typedef unsigned long long uint64; typedef signed char sint8; typedef signed short sint16; typedef signed int sint32; typedef signed long long sint64; typedef unsigned long uint8_least; typedef unsigned long uint16_least; typedef unsigned long uint32_least; typedef signed long sint8_least; typedef signed long sint16_least; typedef signed long sint32_least; typedef float float32; typedef double float64; typedef void *VoidPtr; typedef const void *ConstVoidPtr; # 31 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" 2 # 1 "../../../mcal/Base_ZX_K14xM/Inc/Compiler.h" 1 # 31 "../../../mcal/Base_ZX_K14xM/Inc/Compiler.h" # 1 "../../../mcal/Base_ZX_K14xM/Inc/Compiler_Cfg.h" 1 # 32 "../../../mcal/Base_ZX_K14xM/Inc/Compiler.h" 2 # 32 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" 2 # 63 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" typedef unsigned char StatusType; # 104 "../../../mcal/Base_ZX_K14xM/Inc\\Std_Types.h" typedef uint8 Std_ReturnType; typedef uint8 Std_TransformerClass; typedef uint8 Std_TransformerForwardCode; typedef uint8 Std_MessageTypeType; typedef uint8 Std_MessageResultType; typedef struct { uint16 vendorID; uint16 moduleID; uint8 sw_major_version; uint8 sw_minor_version; uint8 sw_patch_version; } Std_VersionInfoType; typedef struct { uint8 errorCode; Std_TransformerClass transformerClass; } Std_TransformerError; typedef struct { Std_TransformerForwardCode errorCode; Std_TransformerClass transformerClass; } Std_TransformerForward; typedef Std_ReturnType (*Std_ExtractProtocolHeaderFieldsType)(const uint8 *buffer, uint32 bufferLength, Std_MessageTypeType *messageType, Std_MessageResultType *messageResult); # 30 "../../../mcal/Can_ZX_K14xM/Inc/Can_Drv_Types.h" 2 # 1 "../Generated/inc\\Can_Drv_Cfg.h" 1 # 30 "../Generated/inc\\Can_Drv_Cfg.h" # 1 "../Generated/inc/Can_Drv_PBcfg.h" 1 # 31 "../Generated/inc\\Can_Drv_Cfg.h" 2 # 31 "../../../mcal/Can_ZX_K14xM/Inc/Can_Drv_Types.h" 2 # 1 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 1 # 29 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" # 1 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" 1 # 30 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" # 1 "../Generated/inc\\McalLib_Cfg.h" 1 # 31 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" 2 # 273 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" static inline uint32 McalLib_ReadControlReg(void) { uint32 res; __asm("MRS %0,CONTROL" : "=r" (res)); return res; } # 290 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" static inline uint32 McalLib_ReadIpsrReg(void) { uint32 res; __asm("MRS %0,IPSR" : "=r" (res)); return res; } # 305 "../../../mcal/McalLib_ZX_K14xM/Inc/McalLib_Compiler.h" static inline uint32 McalLib_ReadPriMaskReg(void) { uint32 res; __asm("MRS %0,PRIMASK" : "=r" (res)); return res; } # 30 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2 # 184 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" typedef enum { MCALLIB_COUNTER_SOFTWARE, MCALLIB_COUNTER_OS, } McalLib_CounterType; typedef struct { uint32 CounterId; uint32 CounterFreq; } McalLib_ConfigType; # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1 # 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" #pragma clang section rodata = ".mcal_config_data" # 211 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2 extern const McalLib_ConfigType *const McalLib_PreDefinedConfigPtr[(1U)]; # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1 # 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" #pragma clang section rodata = "" # 216 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2 # 230 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" extern void Sys_SystemReset(void); # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1 # 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" #pragma clang section text = ".mcal_code" # 234 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2 void McalLib_Init(void); # 254 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" Std_ReturnType McalLib_GetCounterValue(McalLib_CounterType Counter, uint32 *Value); # 270 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" Std_ReturnType McalLib_GetElapsedValue(McalLib_CounterType Counter, uint32 *const CounterValue, uint32 *ElapsedValue); # 282 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" uint32 McalLib_MicroSecToTicks(McalLib_CounterType Counter, uint32 MicroSecond); # 296 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" void McalLib_SetCounterFreq(McalLib_CounterType Counter, uint32 Freq); # 309 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" static inline void McalLib_Assert(const uint8 *File, uint32 Line) { (void)File; (void)Line; for (;;) { } } # 327 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" void McalLib_SuspendAllInterrupts(void); void McalLib_ResumeAllInterrupts(void); # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" 1 # 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\McalLib_MemMap.h" #pragma clang section text = "" # 339 "../../../mcal/McalLib_ZX_K14xM/Inc\\McalLib.h" 2 # 32 "../../../mcal/Can_ZX_K14xM/Inc/Can_Drv_Types.h" 2 # 165 "../../../mcal/Can_ZX_K14xM/Inc/Can_Drv_Types.h" typedef enum { CAN_DRV_SUCCESS = 0U, CAN_DRV_ERROR, CAN_DRV_ENTER_BUSY, CAN_DRV_NO_TRANSMIT } Can_Drv_ControllerStatus; typedef enum { CAN_DRV_ID_0 = 0U, CAN_DRV_ID_1 = 1U, CAN_DRV_ID_2 = 2U, CAN_DRV_ID_3 = 3U, CAN_DRV_ID_4 = 4U, CAN_DRV_ID_5 = 5U, CAN_DRV_ID_6 = 6U, CAN_DRV_ID_7 = 7U } Can_Drv_IdType; typedef enum { CAN_DRV_CAN_FD_MB_REGION_0 = 0U, CAN_DRV_CAN_FD_MB_REGION_1, CAN_DRV_CAN_FD_MB_REGION_2, CAN_DRV_CAN_FD_MB_REGION_3 } Can_Drv_FdMbRegionType; typedef enum { CAN_DRV_RX_FIFO_ACCEPTANCE_FORMAT_A = 0U, CAN_DRV_RX_FIFO_ACCEPTANCE_FORMAT_B, CAN_DRV_RX_FIFO_ACCEPTANCE_FORMAT_C, CAN_DRV_RX_FIFO_ACCEPTANCE_FORMAT_D } Can_Drv_RxAcceptanceType; typedef enum { CAN_DRV_RX_FIFO_FILTERS_8 = 0x0U, CAN_DRV_RX_FIFO_FILTERS_16 = 0x1U, CAN_DRV_RX_FIFO_FILTERS_24 = 0x2U, CAN_DRV_RX_FIFO_FILTERS_32 = 0x3U, CAN_DRV_RX_FIFO_FILTERS_40 = 0x4U, CAN_DRV_RX_FIFO_FILTERS_48 = 0x5U, CAN_DRV_RX_FIFO_FILTERS_56 = 0x6U, CAN_DRV_RX_FIFO_FILTERS_64 = 0x7U, CAN_DRV_RX_FIFO_FILTERS_72 = 0x8U, CAN_DRV_RX_FIFO_FILTERS_80 = 0x9U, CAN_DRV_RX_FIFO_FILTERS_88 = 0xAU, CAN_DRV_RX_FIFO_FILTERS_96 = 0xBU, CAN_DRV_RX_FIFO_FILTERS_104 = 0xCU, CAN_DRV_RX_FIFO_FILTERS_112 = 0xDU, CAN_DRV_RX_FIFO_FILTERS_120 = 0xEU, CAN_DRV_RX_FIFO_FILTERS_128 = 0xFU } Can_Drv_RxFifoFilterNumType; typedef enum { CAN_DRV_RXFIFO_INTERRUPTS = 0U, CAN_DRV_RXFIFO_DMA, CAN_DRV_RXFIFO_POLLING } Can_Drv_RxFifoTransferType; typedef enum { CAN_DRV_OBJECT_PL_8 = 0U, CAN_DRV_OBJECT_PL_16, CAN_DRV_OBJECT_PL_32, CAN_DRV_OBJECT_PL_64 } Can_Drv_FdPayloadLengthType; typedef struct { Can_Drv_FdPayloadLengthType Block0; Can_Drv_FdPayloadLengthType Block1; Can_Drv_FdPayloadLengthType Block2; Can_Drv_FdPayloadLengthType Block3; } Can_Drv_FdPayloadBlockType; typedef enum { CAN_DRV_MODE_NORMAL = 0U, CAN_DRV_MODE_LISTEN_ONLY, CAN_DRV_MODE_LOOPBACK, CAN_DRV_MODE_FREEZE, CAN_DRV_MODE_DISABLE } Can_Drv_ModeType; typedef enum { CAN_DRV_MSG_ID_STD = 0U, CAN_DRV_MSG_ID_EXT } Can_Drv_MsgIdType; typedef enum { CAN_DRV_RX_MASK_GLOBAL = 0U, CAN_DRV_RX_MASK_INDIVIDUAL } Can_Drv_RxMaskType; typedef enum { CAN_DRV_MB_RX_INACTIVE = 0x0, CAN_DRV_MB_RX_FULL = 0x2, CAN_DRV_MB_RX_EMPTY = 0x4, CAN_DRV_MB_RX_OVERRUN = 0x6, CAN_DRV_MB_RX_RANSWER = 0xA, CAN_DRV_MB_TX_INACTIVE = 0x08, CAN_DRV_MB_TX_ABORT = 0x09, CAN_DRV_MB_TX_DATA_REMOTE = 0x0C, CAN_DRV_MB_TX_TANSWER = 0x0E, CAN_DRV_NOT_USED = 0x0F } Can_Drv_MbCodeType; typedef enum { CAN_DRV_INT_BUS_OFF = 0U, CAN_DRV_INT_ERR = 1U, CAN_DRV_INT_TXW = 2U, CAN_DRV_INT_RXW = 3U, CAN_DRV_INT_BUS_OFF_DONE = 4U, CAN_DRV_INT_ERR_FAST = 5U, CAN_DRV_INT_SELF_WAKEUP = 6U, CAN_DRV_INT_RXFIFO_FRAME = 7U, CAN_DRV_INT_RXFIFO_WARNING = 8U, CAN_DRV_INT_RXFIFO_OVERFLOW = 9U, CAN_DRV_INT_HOST_MEM_ERR = 10U, CAN_DRV_INT_MEM_ERR = 11U, CAN_DRV_INT_COR_MEM_ERR = 12U, CAN_DRV_INT_PN_WAKEUP_MATCH = 13U, CAN_DRV_INT_PN_WAKEUP_TIMEOUT = 14U, CAN_DRV_INT_MB_RECEIVE = 15U, CAN_DRV_MB_TRANSMIT = 16U, CAN_DRV_DMA_COMPLETE = 17U, CAN_DRV_DMA_ERROR = 18U, CAN_DRV_INT_ALL = 19U } Can_Drv_IntType; typedef enum { CAN_DRV_STATE_NOT_SYNC = 0U, CAN_DRV_STATE_IDLE = 1U, CAN_DRV_STATE_TX = 2U, CAN_DRV_STATE_RX = 3U, CAN_DRV_STATE_DMA_ERROR = 4U, CAN_DRV_STATE_INVALID = 5U } Can_Drv_ControllerStateType; typedef struct { uint32 PropSeg; uint32 PhaseSeg1; uint32 PhaseSeg2; uint32 PreDivider; uint32 RJumpWidth; } Can_Drv_BitTimingType; typedef struct { boolean IsRemoteFrame; boolean IsExtendedFrame; uint32 Id; } Can_Drv_IdFilterType; typedef struct { Can_Drv_MsgIdType IdType; uint8 DataLen; boolean RemoteFlag; boolean FdEn; uint8 FdPadding; boolean BrsEn; } Can_Drv_MessageInfoType; typedef struct { uint32 Cs; uint32 MsgId; uint8 Data[64]; uint8 DataLen; uint32 TimeStamp; } Can_Drv_MsgBufType; typedef struct { Can_Drv_MsgBufType *MbMessagePtr; boolean IsPolling; boolean RemoteFlag; uint32 TimeStamp; Can_Drv_ControllerStateType State; volatile boolean IsDmaBusy; } Can_Drv_MbHandleType; typedef struct Can_Drv_State { Can_Drv_MbHandleType Mb[(64)]; Can_Drv_RxFifoTransferType TransferType; boolean RxFifoEn; boolean InterEn; uint32 MaxMbNumber; void (*IrqCallback)(uint8 Id, Can_Drv_IntType InterType, uint32 MbIdx, const struct Can_Drv_State *State); void (*ErrCallback)(uint8 Id, Can_Drv_IntType InterType, uint32 Data); uint8 RxFifoDMAChannel; } Can_Drv_StateType; typedef struct { uint32 MbMaxNum; boolean RxFifoEn; Can_Drv_RxFifoFilterNumType RxFifoIdFilterNum; Can_Drv_RxFifoTransferType TransferType; Can_Drv_ModeType Mode; boolean BitRateSwitch; Can_Drv_BitTimingType BitTiming; boolean FdEn; Can_Drv_FdPayloadBlockType Payload; Can_Drv_BitTimingType BitTimingFdData; uint32 CtrlConfig; uint8 RxFifoDMAChannel; void (*IrqCallback)(uint8 Id, Can_Drv_IntType InterType, uint32 MbIdx, const struct Can_Drv_State *State); void (*ErrCallback)(uint8 Id, Can_Drv_IntType InterType, uint32 Data); } Can_Drv_ConfigType; # 30 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" 2 # 73 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" 1 # 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" #pragma clang section rodata = ".mcal_config_data" # 74 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" 2 extern const Can_Drv_ConfigType Can_Drv_CtrlConfig[1U]; # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" 1 # 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" #pragma clang section rodata = "" # 79 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" 2 # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" 1 # 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" #pragma clang section text = ".mcal_code" # 87 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" 2 # 101 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_AbortTransfer(uint8 Id, uint8 MbIdx); # 118 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_ConfigRxMb(uint8 Id, uint8 MbIdx, Can_Drv_MsgIdType IdType, uint32 MsgId); # 133 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_Init(uint8 Id, Can_Drv_StateType *CanStatePtr, const Can_Drv_ConfigType *CanConfigPtr); # 147 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_Deinit(uint8 Id); # 159 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_DisableMbInterrupts(uint8 Id); # 174 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_Receive(uint8 Id, uint8 MbIdx, Can_Drv_MsgBufType *DataPtr, boolean IsPolling); # 189 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_RxFIFO(uint8 Id, Can_Drv_MsgBufType *DataPtr); # 200 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_ClearErrorStatus(uint8 Id, uint32 Mask); # 212 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_EnableInterrupts(uint8 Id); # 224 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_DisableInterrupts(uint8 Id); # 237 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" uint32 Can_Drv_GetControllerErrorState(uint8 Id); # 247 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" uint32 Can_Drv_GetControllerRxErrorCounter(uint8 Id); # 257 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" uint32 Can_Drv_GetControllerTxErrorCounter(uint8 Id); # 270 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_GetTransferStatus(uint8 Id, uint8 MbIdx); # 282 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_ManualBusOffRecovery(uint8 Id); # 293 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_WriteMainFunction(uint8 Id, uint8 MbIdx); # 304 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_ReadMainFunction(const uint8 Id, uint8 MbIdx); # 316 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_BusOffMainFunction(uint8 Id); # 328 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_WakeupMainFunction(uint8 Id); # 342 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_ConfigErrorInterrupt(uint8 Id, Can_Drv_IntType IntType, boolean Enable); # 355 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetStdBitTiming(uint8 Id, const Can_Drv_BitTimingType *RatePtr); # 368 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetFdArbBitTiming(uint8 Id, const Can_Drv_BitTimingType *RatePtr); # 381 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetFdDataBitTiming(uint8 Id, const Can_Drv_BitTimingType *RatePtr); # 394 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetRxMaskType(uint8 Id, Can_Drv_RxMaskType MaskType); # 408 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" boolean Can_Drv_GetMbInterruptFlag(uint8 Id, uint8 MbIdx); # 419 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_ClearMbIntStatus(uint8 Id, uint8 MbIdx); # 431 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" boolean Can_Drv_CheckStartedMode(uint8 Id); # 442 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" boolean Can_Drv_CheckStoppedMode(uint8 Id); # 454 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetStartMode(uint8 Id); # 466 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetStopMode(uint8 Id); # 480 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_ConfigRxFifo(uint8 Id, Can_Drv_RxAcceptanceType Element, const Can_Drv_IdFilterType *FilterTablePtr); # 499 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SendData(uint8 Id, uint8 MbIdx, const Can_Drv_MessageInfoType *TxInfoPtr, boolean IsPolling, uint32 MsgId, const uint8 *MsgDataPtr); # 516 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetRxIndividualMask(uint8 Id, Can_Drv_MsgIdType IdType, uint32 MbIdx, uint32 Mask); # 546 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetRxFifoGlobalMask(uint8 Id, uint32 Mask); # 558 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_EnableArbitrationFiledCompare(uint8 Id); # 593 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetRxFifoIndividualMask(uint8 Id, uint32 ElementIdx, uint32 Mask); # 611 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetFdTdc(uint8 Id, boolean Enable, uint8 Offset); # 624 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_SetTxArbitrationDelay(uint8 Id, uint8 Value); # 636 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_EnableSelfWakeup(uint8 Id); # 648 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_DisableSelfWakeup(uint8 Id); # 660 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_InjectCorrectableAddress(uint8 Id); # 672 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_InjectAddress(uint8 Id); # 684 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" Can_Drv_ControllerStatus Can_Drv_ClearInjection(uint8 Id); # 695 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_IntHandler(uint8 Id, uint32 StartMbIdx, uint32 EndMbIdx); # 705 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_BusOffIntHandler(uint8 Id); # 715 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_TxWarnIntHandler(uint8 Id); # 725 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_RxWarnIntHandler(uint8 Id); # 735 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_ErrorIntHandler(uint8 Id); # 745 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_FdErrorIntHandler(uint8 Id); # 755 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_WakeUpIntHandler(uint8 Id); # 765 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" void Can_Drv_EccIntHandler(uint8 Id); # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" 1 # 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" #pragma clang section text = "" # 769 "../../../mcal/Can_ZX_K14xM/Inc\\Can_Drv.h" 2 # 32 "../Generated/Src/Can_Drv_PBcfg.c" 2 # 1 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" 1 # 28 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" # 1 "../../../mcal/Dma_ZX_K14xM/Inc/Dma_Drv_Types.h" 1 # 31 "../../../mcal/Dma_ZX_K14xM/Inc/Dma_Drv_Types.h" # 1 "../Generated/inc\\Dma_Drv_Cfg.h" 1 # 30 "../Generated/inc\\Dma_Drv_Cfg.h" # 1 "../Generated/inc/Dma_Drv_PBcfg.h" 1 # 31 "../Generated/inc\\Dma_Drv_Cfg.h" 2 # 32 "../../../mcal/Dma_ZX_K14xM/Inc/Dma_Drv_Types.h" 2 # 88 "../../../mcal/Dma_ZX_K14xM/Inc/Dma_Drv_Types.h" typedef enum { DMA_DRV_PHYS_CH_0 = 0U, DMA_DRV_PHYS_CH_1, DMA_DRV_PHYS_CH_2, DMA_DRV_PHYS_CH_3, DMA_DRV_PHYS_CH_4, DMA_DRV_PHYS_CH_5, DMA_DRV_PHYS_CH_6, DMA_DRV_PHYS_CH_7, DMA_DRV_PHYS_CH_8, DMA_DRV_PHYS_CH_9, DMA_DRV_PHYS_CH_10, DMA_DRV_PHYS_CH_11, DMA_DRV_PHYS_CH_12, DMA_DRV_PHYS_CH_13, DMA_DRV_PHYS_CH_14, DMA_DRV_PHYS_CH_15 } Dma_Drv_ChannelType; typedef void (*Dma_Drv_CallbackType)(const Dma_Drv_ChannelType Channel); typedef void (*Dma_Drv_ErrIntCallbackType)(const Dma_Drv_ChannelType Channel); typedef enum { DMA_DRV_PRIORITY_LEVEL_0 = 0U, DMA_DRV_PRIORITY_LEVEL_1, DMA_DRV_PRIORITY_LEVEL_2, DMA_DRV_PRIORITY_LEVEL_3, DMA_DRV_PRIORITY_LEVEL_4, DMA_DRV_PRIORITY_LEVEL_5, DMA_DRV_PRIORITY_LEVEL_6, DMA_DRV_PRIORITY_LEVEL_7, DMA_DRV_PRIORITY_LEVEL_8, DMA_DRV_PRIORITY_LEVEL_9, DMA_DRV_PRIORITY_LEVEL_10, DMA_DRV_PRIORITY_LEVEL_11, DMA_DRV_PRIORITY_LEVEL_12, DMA_DRV_PRIORITY_LEVEL_13, DMA_DRV_PRIORITY_LEVEL_14, DMA_DRV_PRIORITY_LEVEL_15 } Dma_Drv_ChannelPriorityType; typedef enum { DMA_DRV_TRANSFER_SIZE_1BYTE = 0U, DMA_DRV_TRANSFER_SIZE_2BYTE, DMA_DRV_TRANSFER_SIZE_4BYTE } Dma_Drv_TransferSizeType; typedef enum { DMA_DRV_REQ_I2S0 = 0U, DMA_DRV_REQ_I2S1 = 1U, DMA_DRV_REQ_UART0_TX = 2U, DMA_DRV_REQ_UART0_RX = 3U, DMA_DRV_REQ_UART1_TX = 4U, DMA_DRV_REQ_UART1_RX = 5U, DMA_DRV_REQ_UART2_TX = 6U, DMA_DRV_REQ_UART2_RX = 7U, DMA_DRV_REQ_UART3_TX = 8U, DMA_DRV_REQ_UART3_RX = 9U, DMA_DRV_REQ_UART4_TX = 10U, DMA_DRV_REQ_UART4_RX = 11U, DMA_DRV_REQ_UART5_TX = 12U, DMA_DRV_REQ_UART5_RX = 13U, DMA_DRV_REQ_SPI0_TX = 14U, DMA_DRV_REQ_SPI0_RX = 15U, DMA_DRV_REQ_SPI1_TX = 16U, DMA_DRV_REQ_SPI1_RX = 17U, DMA_DRV_REQ_SPI2_TX = 18U, DMA_DRV_REQ_SPI2_RX = 19U, DMA_DRV_REQ_SPI3_TX = 20U, DMA_DRV_REQ_SPI3_RX = 21U, DMA_DRV_REQ_STIM0 = 22U, DMA_DRV_REQ_STIM1 = 23U, DMA_DRV_REQ_STIM2 = 24U, DMA_DRV_REQ_STIM3 = 25U, DMA_DRV_REQ_I2C0_TX = 26U, DMA_DRV_REQ_I2C0_RX = 27U, DMA_DRV_REQ_I2C1_TX = 28U, DMA_DRV_REQ_I2C1_RX = 29U, DMA_DRV_REQ_CAN0 = 30U, DMA_DRV_REQ_CAN1 = 31U, DMA_DRV_REQ_CAN2 = 32U, DMA_DRV_REQ_CAN3 = 33U, DMA_DRV_REQ_CAN4 = 34U, DMA_DRV_REQ_CAN5 = 35U, DMA_DRV_REQ_CAN6 = 36U, DMA_DRV_REQ_CAN7 = 37U, DMA_DRV_REQ_TIM0_CHANNEL0 = 38U, DMA_DRV_REQ_TIM0_CHANNEL1 = 39U, DMA_DRV_REQ_TIM0_CHANNEL2 = 40U, DMA_DRV_REQ_TIM0_CHANNEL3 = 41U, DMA_DRV_REQ_TIM0_CHANNEL4 = 42U, DMA_DRV_REQ_TIM0_CHANNEL5 = 43U, DMA_DRV_REQ_TIM0_CHANNEL6 = 44U, DMA_DRV_REQ_TIM0_CHANNEL7 = 45U, DMA_DRV_REQ_TIM1_CHANNEL0 = 46U, DMA_DRV_REQ_TIM1_CHANNEL1 = 47U, DMA_DRV_REQ_TIM1_CHANNEL2 = 48U, DMA_DRV_REQ_TIM1_CHANNEL3 = 49U, DMA_DRV_REQ_TIM1_CHANNEL4 = 50U, DMA_DRV_REQ_TIM1_CHANNEL5 = 51U, DMA_DRV_REQ_TIM1_CHANNEL6 = 52U, DMA_DRV_REQ_TIM1_CHANNEL7 = 53U, DMA_DRV_REQ_TIM2_CHANNEL0 = 54U, DMA_DRV_REQ_TIM2_CHANNEL1 = 55U, DMA_DRV_REQ_TIM2_CHANNEL2 = 56U, DMA_DRV_REQ_TIM2_CHANNEL3 = 57U, DMA_DRV_REQ_TIM2_CHANNEL4 = 58U, DMA_DRV_REQ_TIM2_CHANNEL5 = 59U, DMA_DRV_REQ_TIM2_CHANNEL6 = 60U, DMA_DRV_REQ_TIM2_CHANNEL7 = 61U, DMA_DRV_REQ_TIM3_CHANNEL0 = 62U, DMA_DRV_REQ_TIM3_CHANNEL1 = 63U, DMA_DRV_REQ_TIM3_CHANNEL2 = 64U, DMA_DRV_REQ_TIM3_CHANNEL3 = 65U, DMA_DRV_REQ_TIM3_CHANNEL4 = 66U, DMA_DRV_REQ_TIM3_CHANNEL5 = 67U, DMA_DRV_REQ_TIM3_CHANNEL6 = 68U, DMA_DRV_REQ_TIM3_CHANNEL7 = 69U, DMA_DRV_REQ_MCPWM0_CHANNEL0 = 70U, DMA_DRV_REQ_MCPWM0_CHANNEL1 = 71U, DMA_DRV_REQ_MCPWM0_CHANNEL2 = 72U, DMA_DRV_REQ_MCPWM0_CHANNEL3 = 73U, DMA_DRV_REQ_MCPWM0_CHANNEL4 = 74U, DMA_DRV_REQ_MCPWM0_CHANNEL5 = 75U, DMA_DRV_REQ_MCPWM0_CHANNEL6 = 76U, DMA_DRV_REQ_MCPWM0_CHANNEL7 = 77U, DMA_DRV_REQ_MCPWM1_CHANNEL0 = 78U, DMA_DRV_REQ_MCPWM1_CHANNEL1 = 79U, DMA_DRV_REQ_MCPWM1_CHANNEL2 = 80U, DMA_DRV_REQ_MCPWM1_CHANNEL3 = 81U, DMA_DRV_REQ_MCPWM1_CHANNEL4 = 82U, DMA_DRV_REQ_MCPWM1_CHANNEL5 = 83U, DMA_DRV_REQ_MCPWM1_CHANNEL6 = 84U, DMA_DRV_REQ_MCPWM1_CHANNEL7 = 85U, DMA_DRV_REQ_ADC0 = 88U, DMA_DRV_REQ_ADC1 = 89U, DMA_DRV_REQ_CMP = 90U, DMA_DRV_REQ_PORTA = 91U, DMA_DRV_REQ_PORTB = 92U, DMA_DRV_REQ_PORTC = 93U, DMA_DRV_REQ_PORTD = 94U, DMA_DRV_REQ_PORTE = 95U, DMA_DRV_REQ_DMAMUX_ALWAYS_ENABLED0 = 96U, DMA_DRV_REQ_DMAMUX_ALWAYS_ENABLED1 = 97U, DMA_DRV_REQ_SOFTWARE = 128U } Dma_Drv_RequestSourceType; typedef struct { Dma_Drv_RequestSourceType MuxReqSrc; boolean ReqEn; } Dma_Drv_RequestConfigType; typedef struct { uint8 Priority; boolean PreemptionDis; boolean SuspendEn; } Dma_Drv_PriorityConfigType; typedef struct { boolean ErrIntEn; boolean MajorIntEn; Dma_Drv_RequestConfigType * RequestConfig; Dma_Drv_PriorityConfigType * PriorityConfig; } Dma_Drv_ChannelGlobalConfigType; typedef struct { uint32 Addr; sint16 MinorLoopOffset; sint16 MajorLoopOffset; Dma_Drv_TransferSizeType TransferSize; } Dma_Drv_AddrConfigType; typedef struct { uint32 TransferNum; uint16 MinorLoopCnt; boolean ReqDis; } Dma_Drv_TransferControlConfigType; typedef struct { Dma_Drv_AddrConfigType * SourceConfig; Dma_Drv_AddrConfigType * DestinationConfig; Dma_Drv_TransferControlConfigType * ControlConfig; } Dma_Drv_ChannelTransferConfigType; typedef struct { boolean DebugHalt; boolean RoundRobin; boolean ErrHalt; } Dma_Drv_ConfigType; typedef enum { DMA_DRV_INT_ERROR = 0U, DMA_DRV_INT_DONE, DMA_DRV_INT_ALL } Dma_Drv_IntType; typedef enum { DMA_DRV_HALT_OFF = 0U, DMA_DRV_HALT_ON } Dma_Drv_HaltType; # 29 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" 2 # 67 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Dma_MemMap.h" 1 # 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Dma_MemMap.h" #pragma clang section rodata = ".mcal_config_data" # 68 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" 2 extern const Dma_Drv_ConfigType * const Dma_Drv_ModuleCfgArrayPtr[((uint32)1U)]; extern const Dma_Drv_ChannelGlobalConfigType Dma_Drv_ChGlobalCfg0; extern const Dma_Drv_ChannelGlobalConfigType Dma_Drv_ChGlobalCfg1; extern const Dma_Drv_ChannelGlobalConfigType Dma_Drv_ChGlobalCfg2; extern const Dma_Drv_ChannelGlobalConfigType Dma_Drv_ChGlobalCfg3; extern const Dma_Drv_ChannelGlobalConfigType Dma_Drv_ChGlobalCfg4; extern const Dma_Drv_ChannelTransferConfigType Dma_Drv_ChTransferCfg0; extern const Dma_Drv_ChannelTransferConfigType Dma_Drv_ChTransferCfg1; extern const Dma_Drv_ChannelTransferConfigType Dma_Drv_ChTransferCfg2; # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Dma_MemMap.h" 1 # 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Dma_MemMap.h" #pragma clang section rodata = "" # 75 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" 2 # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Dma_MemMap.h" 1 # 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Dma_MemMap.h" #pragma clang section text = ".mcal_code" # 83 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" 2 # 97 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" Dma_Drv_ChannelType Dma_Drv_GetLastErrorChannel(uint16 ErrStateRegVal); # 108 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_InitDoneIrqHandle(const Dma_Drv_ChannelType Channel, Dma_Drv_CallbackType MajorIntCallback); # 120 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_HaltControl(Dma_Drv_HaltType Cmd); # 130 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_EnableChannelRequest(Dma_Drv_ChannelType Channel); # 140 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_DisableChannelRequest(Dma_Drv_ChannelType Channel); # 154 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_ClearIntStatus(Dma_Drv_ChannelType Channel, Dma_Drv_IntType IntType); # 165 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" boolean Dma_Drv_GetBusyStatus(void); # 177 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" boolean Dma_Drv_GetHaltStatus(void); # 189 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" boolean Dma_Drv_GetChannelErrorStatus(Dma_Drv_ChannelType Channel); # 199 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" uint16 Dma_Drv_GetAllChannelsErrorStatus(void); # 210 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetSourceAddr(Dma_Drv_ChannelType Channel, uint32 Address); # 221 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetSourceTransferSize(Dma_Drv_ChannelType Channel, Dma_Drv_TransferSizeType Size); # 233 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetDestAddr(Dma_Drv_ChannelType Channel, uint32 Address); # 244 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetMinorLoopSrcOffset(Dma_Drv_ChannelType Channel, sint16 Offset); # 255 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetMinorLoopDestOffset(Dma_Drv_ChannelType Channel, sint16 Offset); # 266 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetMajorLoopSrcOffset(Dma_Drv_ChannelType Channel, sint16 Offset); # 277 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetMajorLoopDestOffset(Dma_Drv_ChannelType Channel, sint16 Offset); # 288 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetMinorLoopNum(Dma_Drv_ChannelType Channel, uint16 Num); # 298 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" uint16 Dma_Drv_GetRestMinorLoopNum(Dma_Drv_ChannelType Channel); # 309 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetDestTransferSize(Dma_Drv_ChannelType Channel, Dma_Drv_TransferSizeType Size); # 321 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetTransferByteNum(Dma_Drv_ChannelType Channel, uint32 Num); # 334 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetDisableRequestAfterDone(Dma_Drv_ChannelType Channel, boolean Cmd); # 344 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_TriggerChannelStart(Dma_Drv_ChannelType Channel); # 356 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" boolean Dma_Drv_GetChannelBusyStatus(Dma_Drv_ChannelType Channel); # 368 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" boolean Dma_Drv_GetDoneStatus(Dma_Drv_ChannelType Channel); # 378 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_Init(const Dma_Drv_ConfigType * ModuleCfgPtr); # 388 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_ClearDoneStatus(Dma_Drv_ChannelType Channel); # 399 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetChannelTransferConfig(const Dma_Drv_ChannelType Channel, const Dma_Drv_ChannelTransferConfigType * ChTransCfgPtr); # 411 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_SetChannelGlobalConfig(const Dma_Drv_ChannelType Channel, const Dma_Drv_ChannelGlobalConfigType * ChGlobalCfgPtr); # 422 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" uint16 Dma_Drv_GetLastErrorStatus(void); # 439 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_ControlInt(Dma_Drv_ChannelType Channel, Dma_Drv_IntType IntType, boolean Control); # 450 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_ErrorIntHandler(void); # 460 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_DoneIntHandler(Dma_Drv_ChannelType Channel); # 470 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_InstallErrIntCallbackFunc(Dma_Drv_ErrIntCallbackType CbFunPtr); # 481 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_GetChannelTransferConfig(Dma_Drv_ChannelType Channel, const Dma_Drv_ChannelTransferConfigType * ChTransCfgPtr); # 493 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" void Dma_Drv_GetChannelGlobalConfig(Dma_Drv_ChannelType Channel, Dma_Drv_ChannelGlobalConfigType * ChGlobalCfgPtr); # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Dma_MemMap.h" 1 # 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Dma_MemMap.h" #pragma clang section text = "" # 498 "../../../mcal/Dma_ZX_K14xM/Inc\\Dma_Drv.h" 2 # 34 "../Generated/Src/Can_Drv_PBcfg.c" 2 # 87 "../Generated/Src/Can_Drv_PBcfg.c" # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" 1 # 1072 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" #pragma clang section text = ".mcal_code" # 88 "../Generated/Src/Can_Drv_PBcfg.c" 2 extern void Can_MbIrqCallback(uint8 Instance, Can_Drv_IntType InterType, uint32 MbIdx, const Can_Drv_StateType * StatePtr); extern void Can_ErrorIrqCallback(uint8 Id, Can_Drv_IntType InterType, uint32 Data); # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" 1 # 1088 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" #pragma clang section text = "" # 95 "../Generated/Src/Can_Drv_PBcfg.c" 2 # 114 "../Generated/Src/Can_Drv_PBcfg.c" # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" 1 # 876 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" #pragma clang section rodata = ".mcal_config_data" # 115 "../Generated/Src/Can_Drv_PBcfg.c" 2 const Can_Drv_ConfigType Can_Drv_CtrlConfig[1U]= { { (uint8)11U,(boolean)1U, (Can_Drv_RxFifoFilterNumType)((8U >> 3U) - 1U), CAN_DRV_RXFIFO_DMA, CAN_DRV_MODE_NORMAL, (boolean)0U, { (uint8)3U, (uint8)6U, (uint8)6U, (uint16)5, (uint8)4U }, (boolean)0U, { CAN_DRV_OBJECT_PL_8, CAN_DRV_OBJECT_PL_8, CAN_DRV_OBJECT_PL_8, CAN_DRV_OBJECT_PL_8 }, { (uint8)8U, (uint8)4U, (uint8)3U, (uint16)5U, (uint8)1U }, (uint32)((0x00000000U)), (uint8)DMA_DRV_PHYS_CH_0, Can_MbIrqCallback, Can_ErrorIrqCallback } }; # 1 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" 1 # 892 "../../../mcal/Base_ZX_K14xM/Inc/MemMap\\Can_MemMap.h" #pragma clang section rodata = "" # 179 "../Generated/Src/Can_Drv_PBcfg.c" 2