/**************************************************************************************************/ /** * @file : Port_Cfg.h * @brief : AUTOSAR Port config file * - Platform: Z20K14xM * - Autosar Version: 4.6.0 * @version : 1.2.0 * @author : Zhixin Semiconductor * @note : None * * @copyright : Copyright (c) 2021-2023 Zhixin Semiconductor Ltd. All rights reserved. **************************************************************************************************/ #ifndef PORT_CFG_H #define PORT_CFG_H /** @addtogroup Port_Module * @{ */ /** @addtogroup Port_Configuration * @brief Port AUTOSAR level configuration * @{ */ #ifdef __cplusplus extern "C" { #endif #include "Port_PBcfg.h" /** @defgroup Public_MacroDefinition * @{ */ /* Published information */ #define PORT_CFG_H_VENDOR_ID 0x00B3U #define PORT_CFG_H_AR_RELEASE_MAJOR_VERSION 4U #define PORT_CFG_H_AR_RELEASE_MINOR_VERSION 6U #define PORT_CFG_H_AR_RELEASE_REVISION_VERSION 0U #define PORT_CFG_H_SW_MAJOR_VERSION 1U #define PORT_CFG_H_SW_MINOR_VERSION 2U #define PORT_CFG_H_SW_PATCH_VERSION 0U /* Check if the vendor id of current file and Port_PBcfg.h are the same */ #if (PORT_CFG_H_VENDOR_ID != PORT_PBCFG_H_VENDOR_ID) #error "Vendor if of Port_Cfg.h and Port_PBcfg.h are different" #endif /* Check if autodsar version of current file and Port_PBcfg.h are the same */ #if ((PORT_CFG_H_AR_RELEASE_MAJOR_VERSION != PORT_PBCFG_H_AR_RELEASE_MAJOR_VERSION) || \ (PORT_CFG_H_AR_RELEASE_MINOR_VERSION != PORT_PBCFG_H_AR_RELEASE_MINOR_VERSION) || \ (PORT_CFG_H_AR_RELEASE_REVISION_VERSION != PORT_PBCFG_H_AR_RELEASE_REVISION_VERSION) \ ) #error "AutoSar version of Port_Cfg.h and Port_PBcfg.h are different" #endif /* Check if the software version of current file and Port_PBcfg.h are the same*/ #if ((PORT_CFG_H_SW_MAJOR_VERSION != PORT_PBCFG_H_SW_MAJOR_VERSION) || \ (PORT_CFG_H_SW_MINOR_VERSION != PORT_PBCFG_H_SW_MINOR_VERSION) || \ (PORT_CFG_H_SW_PATCH_VERSION != PORT_PBCFG_H_SW_PATCH_VERSION) \ ) #error "Software version of Port_Cfg.h and Port_PBcfg.h are different" #endif #define PORT_PRECOMPILE_SUPPORT (STD_ON) #define PORT_DEV_ERROR_DETECT PORT_DRVW_DEV_ERROR_DETECT #define PORT_SET_PIN_DIRECTION_API PORT_DRVW_SET_PIN_DIRECTION_API #define PORT_SET_PIN_MODE_API PORT_DRVW_SET_PIN_MODE_API #define PORT_VERSION_INFO_API (STD_ON) #define PORT_NUMBER_OF_PARTITION (1U) #define PORT_TOTAL_PIN_NUMBER ((uint16)144) #define PORT_NUMBER_OF_CONFIG_PINS PORT_DRVW_NUMBER_OF_CONFIG_PINS #define PORT_MAX_PINMUX_NUMBER PORT_DRVW_MAX_PINMUX_NUMBER #define PortCfgSet_PORT_PWM_TIM2_CH7 0 #define PortCfgSet_PORT_PWM_TIM2_CH6 1 #define PortCfgSet_PORT_PWM_TIM2_CH1 2 #define PortCfgSet_PORT_PWM_TIM2_CH5 3 #define PortCfgSet_PORT_PWM_TIM3_CH1 4 #define PortCfgSet_PORT_PWM_TIM3_CH5 5 #define PortCfgSet_PORT_PWM_TIM3_CH3 6 #define PortCfgSet_PORT_PWM_TIM3_CH2 7 #define PortCfgSet_PORT_PWM_TIM3_CH0 8 #define PortCfgSet_PORT_PWM_GPIO_TIM2_CH2 9 #define PortCfgSet_PORT_PWM_GPIO_TIM2_CH0 10 #define PortCfgSet_PORT_PWM_GPIO_TIM2_CH7 11 #define PortCfgSet_PORT_PWM_GPIO_TIM2_CH6 12 #define PortCfgSet_PORT_ADC_GRAY_ADC0_CH10 13 #define PortCfgSet_PORT_ADC_GRAY_ADC0_CH09 14 #define PortCfgSet_PORT_ADC_GRAY_ADC0_CH08 15 #define PortCfgSet_PORT_ADC_GRAY_ADC0_CH15 16 #define PortCfgSet_PORT_ADC_GRAY_ADC0_CH14 17 #define PortCfgSet_PORT_ADC_GRAY_ADC0_CH13 18 #define PortCfgSet_PORT_ADC_GRAY_ADC0_CH12 19 #define PortCfgSet_PORT_ADC_GRAY_ADC0_CH07 20 #define PortCfgSet_PORT_ADC_GRAY_ADC0_CH06 21 #define PortCfgSet_PORT_ADC_ADC0_CH05 22 #define PortCfgSet_PORT_ADC_ADC0_CH03 23 #define PortCfgSet_PORT_ADC_ADC1_CH08 24 #define PortCfgSet_PORT_ADC_ADC1_CH07 25 #define PortCfgSet_PORT_ADC_ADC1_CH06 26 #define PortCfgSet_PORT_ADC_ADC1_CH03 27 #define PortCfgSet_PORT_ADC_ADC1_CH02 28 #define PortCfgSet_PORT_ADC_ADC1_CH01 29 #define PortCfgSet_PORT_ADC_ADC1_CH00 30 #define PortCfgSet_PORT_ADC_ADC0_CH01 31 #define PortCfgSet_PORT_ADC_ADC0_CH00 33 #define PortCfgSet_PORT_ADC_ADC1_CH05 32 #define PortCfgSet_PORT_ADC_ADC1_CH04 34 #define PortCfgSet_PORT_ADC_ADC1_CH13 35 #define PortCfgSet_PORT_ADC_ADC1_CH12 36 #define PortCfgSet_PORT_ADC_ADC1_CH11 37 #define PortCfgSet_PORT_CAN_CAN1_TX 38 #define PortCfgSet_PORT_CAN_CAN1_RX 39 #define PortCfgSet_PORT_GPIO_VCCX3_EN 40 #define PortCfgSet_PORT_GPIO_BOOST_LH 41 #define PortCfgSet_PORT_GPIO_BOOST_FUT 42 #define PortCfgSet_PORT_GPIO_BOOST_EN 43 #define PortCfgSet_PORT_GPIO_STP_EN 44 #define PortCfgSet_PORT_GPIO_HSS_IN1 45 #define PortCfgSet_PORT_GPIO_HSS_IN2 46 #define PortCfgSet_PORT_GPIO_HSS_DSEL 47 #define PortCfgSet_PORT_GPIO_HSS_IN3 48 #define PortCfgSet_PORT_GPIO_HSS_DEN 49 #define PortCfgSet_PORT_GPIO_GRAY_MOTOR_S0 50 #define PortCfgSet_PORT_GPIO_GRAY_MOTOR_S1 51 #define PortCfgSet_PORT_GPIO_GRAY_MOTOR_S2 52 #define PortCfgSet_PORT_GPIO_GRAY_MOTOR_S3 53 #define PortCfgSet_PORT_SPIA_SPI_A_CS_SBC 54 #define PortCfgSet_PORT_SPIA_SPI_A_CS_STP 55 #define PortCfgSet_PORT_SPIA_SPI_A_MOSI_uC 56 #define PortCfgSet_PORT_SPIA_SPI_A_MISO 57 #define PortCfgSet_PORT_SPIA_SPI_A_CLK_uC 58 #define PortCfgSet_PORT_SPIA_PORT_TEST 69 #define PortCfgSet_PORT_SPIB_SPI_B_CS_BOOST 59 #define PortCfgSet_PORT_SPIB_SPI_B_CS_BUCK_uC 60 #define PortCfgSet_PORT_SPIB_SPI_B_MOSI_Uc 61 #define PortCfgSet_PORT_SPIB_SPI_B_MISO 62 #define PortCfgSet_PORT_SPIB_SPI_B_CLK_uC 63 #define PortCfgSet_PORT_UART_CAN_UART_CAN2_TX 64 #define PortCfgSet_PORT_UART_CAN_UART_CAN2_RX 65 #define PortCfgSet_PORT_UART_CAN_UART_CAN0_TX 66 #define PortCfgSet_PORT_UART_CAN_UART_CAN0_RX 67 #define PortCfgSet_PORT_DUMMY_PTE14 68 /** @} end of Public_MacroDefinition */ /** @defgroup Public_TypeDefinition * @{ */ /** @} end of group Public_TypeDefinition */ /** @defgroup Global_VariableDeclaration * @{ */ /** @} end of group Global_VariableDeclaration */ /** @defgroup Public_FunctionDeclaration * @{ */ /** @} end of group Public_FunctionDeclaration */ #ifdef __cplusplus } #endif /** @} end of group Port_Configuration */ /** @} end of group Port_Module */ #endif /* PORT_CFG_H */ /* End of File */