//***************************************************************************** // (C) Automotive Lighting Reutlingen GmbH // Tuebinger Strasse 123, 72762 Reutlingen, Germany // // Automotive Lighting Reutlingen GmbH owns all the rights to this work. // This work shall not be copied, reproduced, used, modified, transferred // or its information shall not be disclosed without the prior written // authorization of Automotive Lighting Reutlingen GmbH. //***************************************************************************** //----------------------------------------------------------------------------- /// \file CddTle94x1_Regs.h /// /// \brief SBC complex device driver /// /// \descr System Basic Chip /// /// \author ZHAO, Kai ALDE-RT/EES6 /// //----------------------------------------------------------------------------- #ifndef CDD_TLE94X1_REGS_2021_03_08_H_ #define CDD_TLE94X1_REGS_2021_03_08_H_ //============================================================================= // includes //============================================================================= #include //============================================================================= // Default Definitions //============================================================================= // CONTROL REGISTERS - Read/Write // General Control Registers #define TLE94X1_M_S_CTRL_ADR 0x01U // Mode- and Supply Control #define TLE94X1_HW_CTRL_0_ADR 0x02U // Mode- and Supply Control 0 #define TLE94X1_WD_CTRL_ADR 0x03U // Watchdog Control #define TLE94X1_BUS_CTRL_0_ADR 0x04U // Bus Control 0 #define TLE94X1_WK_CTRL_0_ADR 0x06U // Internal Wake Input Control 0 #define TLE94X1_WK_CTRL_1_ADR 0x07U // External Wake Source Control 1 #define TLE94X1_WK_PUPD_CTRL_ADR 0x08U // Wake Input Level Control #define TLE94X1_BUS_CTRL_3_ADR 0x0BU // Bus Control 3 #define TLE94X1_TIMER_CTRL_ADR 0x0CU // Timer Control 0 #define TLE94X1_HW_CTRL_1_ADR 0x0EU // Hardware Control 1 #define TLE94X1_HW_CTRL_2_ADR 0x0FU // Hardware Control 2 #define TLE94X1_GPIO_CTRL_ADR 0x17U // GPIO Configuration Control #define TLE94X1_PWM_CTRL_ADR 0x18U // PWM Configuration Control #define TLE94X1_PWM_FREQ_CTRL_ADR 0x1CU // PWM Frequency Configuration Control #define TLE94X1_HW_CTRL_3_ADR 0x1DU // Hardware Control 3 #define TLE94X1_SYS_STAT_CTRL_0_ADR 0x1EU // System Status Control Low Byte #define TLE94X1_SYS_STAT_CTRL_1_ADR 0x1FU // System Status Control High Byte // Selective Wake Control Registers #define TLE94X1_SWK_CTRL_ADR 0x20U // CAN Selective Wake Control #define TLE94X1_SWK_BTL0_CTRL_ADR 0x21U // SWK Bit Timing Logic Control1 #define TLE94X1_SWK_BTL1_CTRL_ADR 0x22U // SWK Bit Timing Logic Control2 #define TLE94X1_SWK_ID3_CTRL_ADR 0x23U // SWK WUF Identifier bits 28...21 #define TLE94X1_SWK_ID2_CTRL_ADR 0x24U // SWK WUF Identifier bits 20...13 #define TLE94X1_SWK_ID1_CTRL_ADR 0x25U // SWK WUF Identifier bits 12...5 #define TLE94X1_SWK_ID0_CTRL_ADR 0x26U // SWK WUF Identifier bits 4...0 #define TLE94X1_SWK_MASK_ID3_CTRL_ADR 0x27U // SWK WUF Identifier Mask bits 28...21 #define TLE94X1_SWK_MASK_ID2_CTRL_ADR 0x28U // SWK WUF Identifier Mask bits 20...13 #define TLE94X1_SWK_MASK_ID1_CTRL_ADR 0x29U // SWK WUF Identifier Mask bits 12...5 #define TLE94X1_SWK_MASK_ID0_CTRL_ADR 0x2AU // SWK WUF Identifier Mask bits 4...0 #define TLE94X1_SWK_DLC_CTRL_ADR 0x2BU // SWK Frame Data Length Code Control #define TLE94X1_SWK_DATA7_CTRL 0x2CU // SWK Datat7 Register #define TLE94X1_SWK_DATA6_CTRL 0x2DU // SWK Datat6 Register #define TLE94X1_SWK_DATA5_CTRL 0x2EU // SWK Datat5 Register #define TLE94X1_SWK_DATA4_CTRL 0x2FU // SWK Datat4 Register #define TLE94X1_SWK_DATA3_CTRL 0x30U // SWK Datat3 Register #define TLE94X1_SWK_DATA2_CTRL 0x31U // SWK Datat2 Register #define TLE94X1_SWK_DATA1_CTRL 0x32U // SWK Datat1 Register #define TLE94X1_SWK_DATA0_CTRL 0x33U // SWK Datat0 Register #define TLE94X1_SWK_CAN_FD_CTRL 0x34U // CAN FD Configuration Control Register #define TLE94X1_SWK_OSC_TRIM_CTRL 0x38U // SWK Oscillator Trimming Register #define TLE94X1_SWK_OPT_CTRL 0x39U // Selective Wake Options Register #define TLE94X1_SWK_OSC_CAL_H_STAT 0x3AU // SWK Oscillator Calibration High Register #define TLE94X1_SWK_OSC_CAL_L_STAT 0x3BU // SWK Oscillator Calibration Low Register #define TLE94X1_SWK_CDR_CTRL1 0x3CU // CDR Control 1 Register #define TLE94X1_SWK_CDR_CTRL2 0x3DU // CDR Control 2 Register #define TLE94X1_SWK_CDR_LIMIT_HIGH_CTRL 0x3EU // SWK CDR Upper Limit Control #define TLE94X1_SWK_CDR_LIMIT_LOW_CTRL 0x3FU // SWK CDR Lower Limit Control // STATUS REGISTERS - Read/Clear // General Status Registers #define TLE94X1_SUP_STAT_1_ADR 0x40U // Supply Voltage Fail Status 1 #define TLE94X1_SUP_STAT_0_ADR 0x41U // Supply Voltage Fail Status 0 #define TLE94X1_THERM_STAT_ADR 0x42U // Thermal Protection Status #define TLE94X1_DEV_STAT_ADR 0x43U // Device Information Status #define TLE94X1_BUS_STAT_ADR 0x44U // Bus Communication Status 0 #define TLE94X1_WK_STAT_0_ADR 0x46U // Wake-up Source and Information Status 0 #define TLE94X1_WK_STAT_1_ADR 0x47U // Wake-up Source and Information Status 1 #define TLE94X1_WK_LVL_STAT_ADR 0x48U // Wake-up Input Level - !!! READ ONLY #define TLE94X1_GPIO_OC_STAT_ADR 0x54U // GPIO Overcurrent Status #define TLE94X1_GPIO_OL_STAT_ADR 0x55U // GPIO Open-Load Status // Selective Wake Status Registers #define TLE94X1_SWK_STAT 0x70U // Selective Wake Status #define TLE94X1_SWK_ECNT_STAT 0x71U // SWK Status #define TLE94X1_SWK_CDR_STAT1 0x72U // CDR Status 1 Register #define TLE94X1_SWK_CDR_STAT2 0x73U // CDR Status 2 Register // FAMILY AND PRODUCT INFORMATION REGISTER - Read ONLY #define TLE94X1_FAM_PROD_STAT_ADR 0x7EU // Family and Product Identification Register // Configuration definitions // CAN modes #define CDD_TLE94X1_CAN_OFF 0x00u #define CDD_TLE94X1_CAN_WAKE_ON 0x01u #define CDD_TLE94X1_CAN_RECEIVE_ONLY 0x02u #define CDD_TLE94X1_CAN_NORMAL 0x03u #define CDD_TLE94X1_CAN_OFF_SWK 0x04u #define CDD_TLE94X1_CAN_WAKE_ON_SWK 0x05u #define CDD_TLE94X1_CAN_RECEIVE_ONLY_SWK 0x06u #define CDD_TLE94X1_CAN_NORMAL_SWK 0x07u // Init configuration #define CDD_TLE94X1_DISABLE 0u #define CDD_TLE94X1_ENABLE 1u // SBC modes #define CDD_TLE94X1_NORMAL_MODE 0u #define CDD_TLE94X1_SLEEP_MODE 1u #define CDD_TLE94X1_STOP_MODE 2u // VCC1_OV_RST #define CDD_TLE94X1_VCC1_OV_RST_0 0u #define CDD_TLE94X1_VCC1_OV_RST_1 1u // VCC2 Modes #define CDD_TLE94X1_VCC2_OFF 0u // VCC2 Off #define CDD_TLE94X1_VCC2_ON1 1u // VCC2 On in Normal Mode #define CDD_TLE94X1_VCC2_ON2 2u // VCC2 On in Normal and Stop Mode #define CDD_TLE94X1_VCC2_ON3 3u // VCC2 always ON // Thermal Shutdown Threshold #define CDD_TLE94X1_TSD_THR_0 0u // Default shutdown threshold selected #define CDD_TLE94X1_TSD_THR_1 1u // higher shutdown threshold selected // VCC1 Reset Threshold Control #define CDD_TLE94X1_VCC1_RT_Vrt1 0u // Vrt1_selected #define CDD_TLE94X1_VCC1_RT_Vrt2 1u // Vrt2_selected #define CDD_TLE94X1_VCC1_RT_Vrt3 2u // Vrt3_selected #define CDD_TLE94X1_VCC1_RT_Vrt4 3u // Vrt4_selected // Reset Delay Time Selection #define CDD_TLE94X1_RSTN_DEL_tRD1 0u // The extended reset delay time tRD1 is seletced(default) #define CDD_TLE94X1_RSTN_DEL_tRD2 1u // The reduced tRD2 delay time is seletced // SS_MOD_FR #define CDD_TLE94X1_SS_MOD_FR_00 0u // spread spectrum disabled #define CDD_TLE94X1_SS_MOD_FR_01 1u // 15.625kHz Modulation Frequency #define CDD_TLE94X1_SS_MOD_FR_02 2u // 31.250kHz Modulation Frequency #define CDD_TLE94X1_SS_MOD_FR_03 3u // 62.500kHz Modulation Frequency // GPIO #define CDD_TLE94X1_GPIO_000 0u // FO selected (default) #define CDD_TLE94X1GPIO_001 1u // FO selected #define CDD_TLE94X1_GPIO_010 2u // FO selected #define CDD_TLE94X1_GPIO_011 3u // High-Side controlled by TIMER (Cyclic Sense) #define CDD_TLE94X1_GPIO_100 4u // Off #define CDD_TLE94X1_GPIO_101 5u // Wake input enabled (16us static filter) #define CDD_TLE94X1_GPIO_110 6u // Low-Side Switch controlled by PWM #define CDD_TLE94X1_GPIO_111 7u // High-Side Switch controlled by PWM //PWM_DC #define CDD_TLE94X1_PWM_DC_0 0u // 100% off, i.e. HS/LS = Off #define CDD_TLE94X1_PWM_DC_100 0xFF // 100% on, i.e. HS/LS always On // Register Masks #define CDD_TLE94X1_CAN_MODE_MASK 0x07 //CHECKSUM #define CDD_TLE94X1_WD_Checksum_0 0u // Counts as 0 for checksum calculation #define CDD_TLE94X1_WD_Checksum_1 1u // Counts as 1 for checksum calculation //WD_WIN #define CDD_TLE94X1_WD_TimeOut 0u // Watchdog works as a Time-Out watchdog #define CDD_TLE94X1_WD_Window 1u // Watchdog works as a Window watchdog //WD_TIMER #define CDD_TLE94X1_WD_TIMER_10ms 0u // 10ms #define CDD_TLE94X1_WD_TIMER_20ms 1u // 20ms #define CDD_TLE94X1_WD_TIMER_50ms 2u // 50ms #define CDD_TLE94X1_WD_TIMER_100ms 3u // 100ms #define CDD_TLE94X1_WD_TIMER_200ms 4u // 200ms #define CDD_TLE94X1_WD_TIMER_500ms 5u // 500ms #define CDD_TLE94X1_WD_TIMER_1000ms 6u // 1000ms #define CDD_TLE94X1_WD_TIMER_10000ms 7u // 10000ms #define CDD_SBC_CFG_DATA_LEN 2u //***************************************************************************** // C O N T R O L R E G I S T E R S //***************************************************************************** typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 VCC1_RT : 2; // VCC1 Reset Threshold Control uint8 VCC1_OV_RST : 1; // VCC1 Over Voltage leading to Reset / Fail-Safe Mode enable uint8 VCC2_ON : 2; // VCC2 Mode Control uint8 : 1; // Reserved, always reads as 0 uint8 MODE : 2; // SBC Mode Control } tTle94x1_M_S_CTRL_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_M_S_CTRL_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_M_S_CTRL_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 CFG1 : 1; // Configuration Select 1 uint8 : 1; // Reserved, always reads as 0 uint8 CP_EN : 1; // Charge Pump Output Enable uint8 : 2; // Reserved, always reads as 0 uint8 FO_ON : 1; // Failure Output activation uint8 SOFT_RESET_RST: 1; // Soft Reset Configuration uint8 : 1; // Reserved, always reads as 0 } tTle94x1_HW_CTRL_0_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_HW_CTRL_0_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_HW_CTRL_0_Register; //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 WD_TIMER : 3; // Watchdog Timer Period uint8 : 1; // Reserved, always reads as 0 uint8 WD_EN_WK_BUS : 1; // Watchdog Enable after Bus (CAN) Wake-up in SBC Stop Mode uint8 WD_WIN : 1; // Watchdog Type Selection uint8 WD_STM_EN_0 : 1; // Watchdog Deactivation during Stop Mode, bit 0 uint8 CHECKSUM : 1; // Watchdog Setting Check Sum Bit } tTle94x1_WD_CTRL_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_WD_CTRL_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_WD_CTRL_Register; //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 CAN : 2; // HS-CAN Module Modes uint8 : 6; // Reserved, always reads as 0 } tTle94x1_BUS_CTRL_0_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_BUS_CTRL_0_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_BUS_CTRL_0_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 : 2; // Reserved, always reads as 0 uint8 WD_STM_EN_1 : 1; // Watchdog Deactivation during Stop Mode, bit 1 uint8 : 3; // Reserved, always reads as 0 uint8 TIMER_WK_EN : 1; // Wake Source Control (for cyclic wake) uint8 : 1; // Reserved, always reads as 0 } tTle94x1_WK_CTRL_0_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_WK_CTRL_0_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_WK_CTRL_0_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 WK_EN : 1; // WK Wake Source Control uint8 : 4; // Reserved, always reads as 0 uint8 WK_MEAS : 1; // Wake / Voltage Sensing Selection uint8 : 1; // Reserved, always reads as 0 uint8 INT_GLOBAL : 1; // Global Interrupt Configuration } tTle94x1_WK_CTRL_1_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_WK_CTRL_1_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_WK_CTRL_1_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 WK_PUPD : 2; // WK Pull-Up / Pull-Down Configuration uint8 : 4; // Reserved, always reads as 0 uint8 GPIO_WK_PUPD : 2; // GPIO WK Pull-Up / Pull-Down Configuration } tTle94x1_WK_PUPD_CTRL_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_WK_PUPD_CTRL_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_WK_PUPD_CTRL_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 : 4; // Reserved, always reads as 0 uint8 CAN_FLASH : 1; // HS-CAN Flash Mode activation uint8 : 3; // Reserved, always reads as 0 } tTle94x1_BUS_CTRL_3_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_BUS_CTRL_3_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_BUS_CTRL_3_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 : 3; // Reserved, always reads as 0 uint8 CFG_LOCK_0 : 1; // Configuration Lock Bit -Level 0 uint8 RSTN_DEL : 1; // Reset Delay Time Selection uint8 TSD2_DEL : 1; // TSD2 Minumum Waiting Time Selection uint8 : 1; // Reserved, always reads as 0 uint8 RSTN_HYS : 1; // VCC1 Undervoltag Reset Hysteresis Selection } tTle94x1_HW_CTRL_1_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_HW_CTRL_1_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_HW_CTRL_1_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 CFG_LOCK_1 : 1; // Configuration Lock Bit - Level 1 uint8 : 1; // Reserved, always reads as 0 uint8 SS_MOD_FR : 2; // Spread Spectrum Modulation Frequency Setting of intergrated uint8 I_PEAK_TH : 1; // VCC1 Active Peak Threshold Selction uint8 TwoMHZ_FREQ : 3; // SMPS and Charge Pump Switching Frequency Setting } tTle94x1_HW_CTRL_2_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_HW_CTRL_2_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_HW_CTRL_2_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 GPIO : 3; // GPIO Configuration uint8 Reserved: 5; // Reserved, always reads as 0 } tTle94x1_GPIO_CTRL_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_GPIO_CTRL_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_GPIO_CTRL_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 PWM_DC : 8; // GPIO Configuration } tTle94x1_PWM_CTRL_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_PWM_CTRL_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_PWM_CTRL_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 ICC1_LIM_ADJ : 2; // Confgiration of ICC1 current limitation uint8 TSD_THR : 1; // Thermal Shutdown Threshold (TSD1& TSD2) Configuration uint8 : 5; // Reserved, always reads as 0 } tTle94x1_HW_CTRL_3_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_HW_CTRL_3_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_HW_CTRL_3_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 TIMER_PER : 4; // Timer Period Configuration uint8 TIMER_ON : 3; // Timer On-Time Configruation uint8 : 1; // Reserved, always reads as 0 } tTle94x1_TIMER_CTRL_0_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_TIMER_CTRL_0_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_TIMER_CTRL_0_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 SYS_STAT_L : 8; // System Status Control Low Byte (bit0=LSB; bit7=MSB) } tTle94x1_SYS_STATUS_CTRL_0_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_SYS_STATUS_CTRL_0_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_SYS_STATUS_CTRL_0_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 SYS_STAT_H : 8; // System Status Control High Byte (bit0=LSB; bit7=MSB) } tTle94x1_SYS_STATUS_CTRL_1_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_SYS_STATUS_CTRL_1_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_SYS_STATUS_CTRL_1_Register; //***************************************************************************** // S T A T U S R E G I S T E R S //***************************************************************************** typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 VCC1_WARN : 1; // VCC1 Undervoltage Prewarning uint8 VCC1_OV : 1; // VCC1 Overvoltage Detection uint8 : 3; // Reserved, always reads as 0 uint8 VS_OV : 1; // VS Overvoltage Detection uint8 VS_UV : 1; // VS Undervoltage Detection uint8 : 1; // Reserved, always reads as 0 } tTle94x1_SUP_STAT_1_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_SUP_STAT_1_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_SUP_STAT_1_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 VCC1_UV : 1; // VCC1 UV-Detection (due to VRTx reset) uint8 : 1; // Reserved, always reads as 0 uint8 VCC1_SC : 1; // VCC1 Short to GND Detection uint8 VCC2_UV : 1; // VCC2 Under Voltage Detection (VCC2, UV,f) uint8 VCC2_OT : 1; // VCC2 Over Temperature Detection uint8 : 2; // Reserved, always reads as 0 uint8 POR : 1; // Power-On Reset Detection } tTle94x1_SUP_STAT_0_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_SUP_STAT_0_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_SUP_STAT_0_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 TPW : 1; // Thermal Pre Warning uint8 TSD1 : 1; // TSD1 Thermal Shut-Down Detection uint8 TSD2 : 1; // TSD2 Thermal Shut-Down Detection uint8 TSD2_SAFE : 1; // TSD2 Thermal Shut-Down Safe State Detection uint8 : 4; // Reserved, always reads as 0 } tTle94x1_THERM_STAT_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_THERM_STAT_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_THERM_STAT_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 VCAN_UV : 1; // Under voltage CAN Bus Supply uint8 CAN_FAIL : 2; // CAN Failure Status uint8 SYSERR : 1; // SWK Sysem Error uint8 CANTO : 1; // CAN Time Out Detection uint8 : 3; // Reserved, always reads as 0 } tTle94x1_BUS_STAT_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_BUS_STAT_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_BUS_STAT_Register; typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 FAILURE : 1; // Actiavation of Fail Output FO uint8 SPI_FAIL : 1; // SPI Fail Information uint8 WD_FAIL : 2; // Number of WD-Failure Events uint8 : 2; // Reserved, always reads as 0 uint8 DEV_STAT :2; // Device Status before Restart Mode } tTle94x1_DEV_STAT_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_DEV_STAT_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_DEV_STAT_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 WK_WU : 1; // Wake up via WK uint8 : 3; // Reserved, always reads as 0 uint8 TIMER_WU : 1; // Wake up via cyclic wake uint8 CAN_WU : 1; // Wake up via CAN_0 Bus uint8 : 2; // Reserved, always reads as 0 } tTle94x1_WK_STAT_0_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_WK_STAT_0_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_WK_STAT_0_Register; //----------------------------------------------------------------------------- typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 WK_LVL : 1; // Status of WK uint8 : 3; // Reserved, always reads as 0 uint8 GPIO_LVL : 1; // Status of GPOP if configured as GPIO uint8 : 1; // Reserved, always reads as 0 uint8 CFG0_STATE : 1; // Device Configruation Status on pin INTN uint8 SBC_DEV_LVL : 1; // Status of SBC Operating Mode at TEST PIN } tTle94x1_WK_LVL_STAT_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_WK_LVL_STAT_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_WK_LVL_STAT_Register; //*********************************************************************************************** // F A M I L Y AND P R O D U C T I D E N T I FI C A T I O N R E G I S T E R //*********************************************************************************************** typedef struct // PRQA S 0635 // The bit field were declared with uint8 - which is Unsigned integer { uint8 PROD : 4; // SBC Product Identifier (bit0=LSB; bit3=MSB) uint8 FAM : 4; // SBC Family Identifier (bit4=LSB; bit7=MSB) } tTle94x1_FAM_PROD_STAT_Bit; typedef struct { uint8 Address; union { // PRQA S 0750 // Union has to be used in order to save memory. The data has to be accessed by Word or by Bits but not both at the same time. tTle94x1_FAM_PROD_STAT_Bit Bit; // bit access to the register data uint8 Word; // word access to the register data } Data; } tTle94x1_Access_FAM_PROD_STAT_Register; #endif // __CDD_Tle94x1_REGS_H__ // the struct tCddLed78825_DataMirror represents the NCV78825 registers typedef struct { tTle94x1_Access_M_S_CTRL_Register M_S_CTRL_Register; tTle94x1_Access_HW_CTRL_0_Register HW_CTRL_0_Register; tTle94x1_Access_HW_CTRL_1_Register HW_CTRL_1_Register; tTle94x1_Access_HW_CTRL_2_Register HW_CTRL_2_Register; tTle94x1_Access_HW_CTRL_3_Register HW_CTRL_3_Register; tTle94x1_Access_BUS_CTRL_0_Register BUS_CTRL_0_Register; //Tle94x1_Access_BUS_CTRL_3_Register BUS_CTRL_3_Register; tTle94x1_Access_GPIO_CTRL_Register GPIO_CTRL_Register; //tTle94x1_Access_PWM_CTRL_Register PWM_CTRL_Register; tTle94x1_Access_WD_CTRL_Register WD_CTRL_Register; tTle94x1_Access_WK_CTRL_0_Register WK_CTRL_0_Register; tTle94x1_Access_WK_CTRL_1_Register WK_CTRL_1_Register; } tCddTle94x1_CtrlReg; typedef struct { tTle94x1_Access_SYS_STATUS_CTRL_0_Register SYS_STATUS_CTRL_0_Register; tTle94x1_Access_WK_STAT_0_Register WK_STAT_0_Register; tTle94x1_Access_SUP_STAT_0_Register SUP_STAT_0_Register; tTle94x1_Access_BUS_STAT_Register BUS_STAT_Register; tTle94x1_Access_DEV_STAT_Register DEV_STAT_Register; tTle94x1_Access_THERM_STAT_Register THERM_STAT_Register; tTle94x1_Access_WK_LVL_STAT_Register WK_LVL_STAT_Register; } tCddTle94x1_StatReg; typedef struct { tCddTle94x1_CtrlReg CtrlTx; tCddTle94x1_CtrlReg CtrlRx; tCddTle94x1_StatReg StatTx; tCddTle94x1_StatReg StatRx; } tCddTle94x1_DataMirror; // EOF CDD_TLE94X1_REGS_2021_03_08_H_