.file	"kf32a156_cfgl.c"
	.stabs	"C:\\\\WorkSpace32\\\\blinkled\\\\Debug/",100,0,2,.Ltext0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",100,0,2,.Ltext0
	.text	
.Ltext0:
	.stabs	"gcc2_compiled.",60,0,0,0
	.stabs	"int:t(0,1)=r(0,1);-2147483648;2147483647;",128,0,0,0
	.stabs	"char:t(0,2)=@s8;r(0,2);0;255;",128,0,0,0
	.stabs	"long int:t(0,3)=r(0,3);-2147483648;2147483647;",128,0,0,0
	.stabs	"unsigned int:t(0,4)=r(0,4);0;037777777777;",128,0,0,0
	.stabs	"long unsigned int:t(0,5)=r(0,5);0;037777777777;",128,0,0,0
	.stabs	"long long int:t(0,6)=@s64;r(0,6);01000000000000000000000;0777777777777777777777;",128,0,0,0
	.stabs	"long long unsigned int:t(0,7)=@s64;r(0,7);0;01777777777777777777777;",128,0,0,0
	.stabs	"short int:t(0,8)=@s16;r(0,8);-32768;32767;",128,0,0,0
	.stabs	"short unsigned int:t(0,9)=@s16;r(0,9);0;65535;",128,0,0,0
	.stabs	"signed char:t(0,10)=@s8;r(0,10);-128;127;",128,0,0,0
	.stabs	"unsigned char:t(0,11)=@s8;r(0,11);0;255;",128,0,0,0
	.stabs	"float:t(0,12)=r(0,1);4;0;",128,0,0,0
	.stabs	"double:t(0,13)=r(0,1);8;0;",128,0,0,0
	.stabs	"long double:t(0,14)=r(0,1);8;0;",128,0,0,0
	.stabs	"void:t(0,15)=(0,15)",128,0,0,0
	.stabs	"C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_cfgl.h",130,0,0,0
	.stabs	"C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h",130,0,0,0
	.stabs	"C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stdint.h",130,0,0,0
	.stabs	"C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stddef.h",130,0,0,0
	.stabs	"ptrdiff_t:t(4,1)=(0,1)",128,0,24,0
	.stabs	"size_t:t(4,2)=(0,4)",128,0,30,0
	.stabs	"wchar_t:t(4,3)=(0,9)",128,0,35,0
	.stabn	162,0,0,0
	.stabs	"int8_t:t(3,1)=(0,10)",128,0,21,0
	.stabs	"uint8_t:t(3,2)=(0,11)",128,0,22,0
	.stabs	"int16_t:t(3,3)=(0,8)",128,0,23,0
	.stabs	"uint16_t:t(3,4)=(0,9)",128,0,24,0
	.stabs	"int32_t:t(3,5)=(0,1)",128,0,25,0
	.stabs	"uint32_t:t(3,6)=(0,4)",128,0,26,0
	.stabs	"int64_t:t(3,7)=(0,6)",128,0,27,0
	.stabs	"uint64_t:t(3,8)=(0,7)",128,0,28,0
	.stabs	"int_least8_t:t(3,9)=(0,10)",128,0,31,0
	.stabs	"uint_least8_t:t(3,10)=(0,11)",128,0,32,0
	.stabs	"int_least16_t:t(3,11)=(0,8)",128,0,33,0
	.stabs	"uint_least16_t:t(3,12)=(0,9)",128,0,34,0
	.stabs	"int_least32_t:t(3,13)=(0,1)",128,0,35,0
	.stabs	"uint_least32_t:t(3,14)=(0,4)",128,0,36,0
	.stabs	"int_least64_t:t(3,15)=(0,6)",128,0,37,0
	.stabs	"uint_least64_t:t(3,16)=(0,7)",128,0,38,0
	.stabs	"int_fast8_t:t(3,17)=(0,2)",128,0,44,0
	.stabs	"uint_fast8_t:t(3,18)=(0,11)",128,0,45,0
	.stabs	"int_fast16_t:t(3,19)=(0,8)",128,0,46,0
	.stabs	"uint_fast16_t:t(3,20)=(0,9)",128,0,47,0
	.stabs	"int_fast32_t:t(3,21)=(0,1)",128,0,48,0
	.stabs	"uint_fast32_t:t(3,22)=(0,4)",128,0,49,0
	.stabs	"int_fast64_t:t(3,23)=(0,6)",128,0,50,0
	.stabs	"uint_fast64_t:t(3,24)=(0,7)",128,0,51,0
	.stabs	"intptr_t:t(3,25)=(0,1)",128,0,60,0
	.stabs	"uintptr_t:t(3,26)=(0,4)",128,0,69,0
	.stabs	"intmax_t:t(3,27)=(0,6)",128,0,74,0
	.stabs	"uintmax_t:t(3,28)=(0,7)",128,0,75,0
	.stabn	162,0,0,0
	.stabs	" :T(2,1)=eFALSE:0,TRUE:1,;",128,0,0,0
	.stabs	"FunctionalState:t(2,2)=(2,1)",128,0,56,0
	.stabs	" :T(2,3)=eRESET:0,SET:1,;",128,0,0,0
	.stabs	"FlagStatus:t(2,4)=(2,3)",128,0,64,0
	.stabs	"INTStatus:t(2,5)=(2,3)",128,0,64,0
	.stabs	" :T(2,6)=eFAILURE:0,SUCCESS:1,;",128,0,0,0
	.stabs	"RetStatus:t(2,7)=(2,6)",128,0,71,0
	.stabs	" :T(2,8)=eDISABLE:0,ENABLE:1,;",128,0,0,0
	.stabs	"AbleStatus:t(2,9)=(2,8)",128,0,78,0
	.stabs	" :T(2,10)=eDIR_DOWN:0,DIR_UP:1,;",128,0,0,0
	.stabs	"DIRStatus:t(2,11)=(2,10)",128,0,87,0
	.stabs	" :T(2,12)=eINT_Initial_SP:0,INT_Reset:1,INT_NMI:2,INT_HardFault:3,INT_Reserved4:4,INT_StackFault:5,INT_AriFault:6,INT_Reserved7:7,INT_Reserved8:8,INT_Reserved9:9,INT_Reserved10:10,INT_SVCAll:11,INT_Reserved12:12,INT_Reserved13:13,INT_SoftSV:14,INT_SysTick:15,INT_WWDT:16,INT_EINT16:17,INT_EINT0:18,INT_EINT1:19,INT_EINT2:20,INT_EINT3:21,INT_EINT4:22,INT_EINT9TO5:23,INT_EINT15TO10:24,INT_T1:25,INT_T3:26,INT_T5:27,INT_T6:28,INT_QEI0:29,INT_QEI1:30,INT_T7:29,INT_T8:30,INT_ECFGL:31,INT_CAN4:32,INT_T14:33,INT_RNG:34,INT_FDC2:35,INT_EXIC:36,INT_ADC0:37,INT_ADC1:38,INT_CFGL:39,INT_T11:40,INT_T0:41,INT_DMA0:42,INT_CMP:43,INT_USART0:44,INT_USART1:45,INT_SPI0:46,INT_SPI1:47,INT_DMA1:48,INT_EINT19TO17:49,INT_CANFD6:50,INT_CANFD7:51,INT_FDC0:52,INT_FDC1:53,INT_EINT31TO20:54,INT_ECC:55,INT_OSC:56,INT_CLK:56,INT_I2C0:57,INT_I2C1:58,INT_I2C2:59,INT_T12:60,INT_T2:61,INT_T4:62,INT_T13:63,INT_USART2:64,INT_T16:65,INT_USART4:66,INT_SPI2:67,INT_SPI3:68,INT_ADC2:69,INT_T18:70,INT_T19:71,INT_HRCAP0:72,INT_WKP0:73,INT_WKP1:73,INT_WKP2:73,INT_WKP3:73,INT_WKP4:73,INT_HRCAP1:74,INT_T21:75,INT_I2C3:76,INT_USART5:77,INT_HRCAP2:78,INT_USART7:79,;",128,0,0,0
	.stabs	"InterruptIndex:t(2,13)=(2,12)",128,0,185,0
	.stabs	"GPIO_MenMap:T(2,14)=s56PIR:(2,15)=k(2,16)=B(3,6),0,32;POR:(2,16),32,32;PUR:(2,16),64,32;PDR:(2,16),96,32;PODR:(2,16),128,32;PMOD:(2,16),160,32;OMOD:(2,16),192,32;LOCK:(2,16),224,32;RMP:(2,17)=ar(2,18)=r(2,18);0;037777777777;;0;1;(2,16),256,64;RESERVED:(2,19)=ar(2,18);0;2;(2,16),320,96;RMP_MSB:(2,16),416,32;;",128,0,0,0
	.stabs	"GPIO_SFRmap:t(2,20)=(2,14)",128,0,211,0
	.stabs	"IONMI_MenMap:T(2,21)=s64RESERVED:(2,22)=ar(2,18);0;14;(2,16),0,480;CTLR:(2,16),480,32;;",128,0,0,0
	.stabs	"IONMI_SFRmap:t(2,23)=(2,21)",128,0,916,0
	.stabs	"OSC_MemMap:T(2,24)=s24CTL0:(2,16),0,32;CTL1:(2,16),32,32;INT:(2,16),64,32;CTL2:(2,16),96,32;HFOSCCAL0:(2,16),128,32;HFOSCCAL1:(2,16),160,32;;",128,0,0,0
	.stabs	"OSC_SFRmap:t(2,25)=(2,24)",128,0,978,0
	.stabs	"PLL_MenMap:T(2,26)=s4CTL:(2,16),0,32;;",128,0,0,0
	.stabs	"PLL_SFRmap:t(2,27)=(2,26)",128,0,984,0
	.stabs	"INT_MemMap:T(2,28)=s160CTL0:(2,16),0,32;EIE0:(2,16),32,32;RESERVED1:(3,6),64,32;EIE1:(2,16),96,32;RESERVED2:(3,6),128,32;EIE2:(2,16),160,32;RESERVED3:(3,6),192,32;EIF0:(2,16),224,32;RESERVED4:(3,6),256,32;EIF1:(2,16),288,32;RESERVED5:(3,6),320,32;EIF2:(2,16),352,32;RESERVED6:(3,6),384,32;IP0:(2,16),416,32;IP1:(2,16),448,32;IP2:(2,16),480,32;IP3:(2,16),512,32;IP4:(2,16),544,32;IP5:(2,16),576,32;IP6:(2,16),608,32;IP7:(2,16),640,32;IP8:(2,16),672,32;IP9:(2,16),704,32;IP10:(2,16),736,32;IP11:(2,16),768,32;IP12:(2,16),800,32;IP13:(2,16),832,32;IP14:(2,16),864,32;IP15:(2,16),896,32;IP16:(2,16),928,32;IP17:(2,16),960,32;IP18:(2,16),992,32;EINTMASK:(2,16),1024,32;EINTRISE:(2,16),1056,32;EINTFALL:(2,16),1088,32;EINTF:(2,16),1120,32;EINTLVL:(2,16),1152,32;EINTSS0:(2,16),1184,32;EINTSS1:(2,16),1216,32;CTL1:(2,16),1248,32;;",128,0,0,0
	.stabs	"INT_SFRmap:t(2,29)=(2,28)",128,0,1335,0
	.stabs	"SYSCTL_MemMap:T(2,30)=s36PSW:(2,16),0,32;MCTL:(2,16),32,32;ARCTL:(2,16),64,32;VECTOFF:(2,16),96,32;RESEVRVE1:(3,6),128,32;RAMSPA:(2,16),160,32;MEMCTL:(2,16),192,32;MSPSPA:(2,16),224,32;PSPSPA:(2,16),256,32;;",128,0,0,0
	.stabs	"SYSCTL_SFRmap:t(2,31)=(2,30)",128,0,2743,0
	.stabs	"DMA_MenMap:T(2,32)=s204:(2,33)=u28:(2,34)=s28CTLR1:(2,16),0,32;CTLR2:(2,16),32,32;CTLR3:(2,16),64,32;CTLR4:(2,16),96,32;CTLR5:(2,16),128,32;CTLR6:(2,16),160,32;CTLR7:(2,16),192,32;;,0,224;CTLR:(2,35)=ar(2,18);0;6;(2,16),0,224;;,0,224;RESERVED1:(3,6),224,32;:(2,36)=u28:(2,37)=s28PADDR1:(2,16),0,32;PADDR2:(2,16),32,32;PADDR3:(2,16),64,32;PADDR4:(2,16),96,32;PADDR5:(2,16),128,32;PADDR6:(2,16),160,32;PADDR7:(2,16),192,32;;,0,224;PADDR:(2,35),0,224;;,256,224;RESERVED2:(3,6),480,32;:(2,38)=u28:(2,39)=s28MADDR1:(2,16),0,32;MADDR2:(2,16),32,32;MADDR3:(2,16),64,32;MADDR4:(2,16),96,32;MADDR5:(2,16),128,32;MADDR6:(2,16),160,32;MADDR7:(2,16),192,32;;,0,224;MADDR:(2,35),0,224;;,512,224;RESERVED3:(3,6),736,32;:(2,40)=u28:(2,41)=s28CPAR1:(2,15),0,32;CPAR2:(2,15),32,32;CPAR3:(2,15),64,32;CPAR4:(2,15),96,32;CPAR5:(2,15),128,32;CPAR6:(2,15),160,32;CPAR7:(2,15),192,32;;,0,224;CPAR:(2,42)=ar(2,18);0;6;(2,15),0,224;;,768,224;RESERVED4:(3,6),992,32;:(2,43)=u28:(2,44)=s28CMAR1:(2,15),0,32;CMAR2:(2,15),32,32;CMAR3:(2,15),64,32;CMAR4:(2,15),96,32;CMAR5:(2,15),128,32;CMAR6:(2,15),160,32;CMAR7:(2,15),192,32;;,0,224;CMAR:(2,42),0,224;;,1024,224;RESERVED5:(3,6),1248,32;:(2,45)=u28:(2,46)=s28NCT1:(2,15),0,32;NCT2:(2,15),32,32;NCT3:(2,15),64,32;NCT4:(2,15),96,32;NCT5:(2,15),128,32;NCT6:(2,15),160,32;NCT7:(2,15),192,32;;,0,224;NCT:(2,42),0,224;;,1280,224;RESERVED6:(3,6),1504,32;LIFR:(2,16),1536,32;LIER:(2,16),1568,32;REMAP:(2,16),1600,32;;",128,0,0,0
	.stabs	"DMA_SFRmap:t(2,47)=(2,32)",128,0,2989,0
	.stabs	"SYSTICK_MemMap:T(2,48)=s16CTL:(2,16),0,32;RELOAD:(2,16),32,32;CV:(2,16),64,32;CALI:(2,16),96,32;;",128,0,0,0
	.stabs	"SYSTICK_SFRmap:t(2,49)=(2,48)",128,0,3566,0
	.stabs	"BTIM_MemMap:T(2,50)=s32CNT:(2,16),0,32;CTL1:(2,16),32,32;CTL2:(2,16),64,32;PRSC:(2,16),96,32;PPX:(2,16),128,32;DIER:(2,16),160,32;SR:(2,15),192,32;SRIC:(2,16),224,32;;",128,0,0,0
	.stabs	"BTIM_SFRmap:t(2,51)=(2,50)",128,0,3628,0
	.stabs	"GPTIM_MemMap:T(2,52)=s96CNT:(2,16),0,32;CTL1:(2,16),32,32;CTL2:(2,16),64,32;PRSC:(2,16),96,32;PPX:(2,16),128,32;UDTIM:(2,16),160,32;RESERVED1:(2,53)=ar(2,18);0;1;(3,6),192,64;CCPXC1:(2,15),256,32;CCPXC2:(2,15),288,32;CCPXC3:(2,15),320,32;CCPXC4:(2,15),352,32;CCPXSRIC:(2,16),384,32;CCPXDF:(2,15),416,32;RESERVED2:(2,53),448,64;CCPXCTL1:(2,16),512,32;CCPXR1:(2,16),544,32;CCPXR2:(2,16),576,32;CCPXR3:(2,16),608,32;CCPXR4:(2,16),640,32;CCPXCTL2:(2,16),672,32;CCPXCTL3:(2,16),704,32;CCPXEGIF:(2,16),736,32;;",128,0,0,0
	.stabs	"GPTIM_SFRmap:t(2,54)=(2,52)",128,0,3818,0
	.stabs	"CCP_SFRmap:t(2,55)=(2,52)",128,0,3818,0
	.stabs	"ATIM_MemMap:T(2,56)=s240TXCNT:(2,16),0,32;TZCNT:(2,16),32,32;TXPPX:(2,16),64,32;TZPPZ:(2,16),96,32;TXPRSC:(2,16),128,32;TZPRSC:(2,16),160,32;TXCCR0:(2,16),192,32;TXCCR1:(2,16),224,32;TZCCR0:(2,16),256,32;TXCTL:(2,16),288,32;TZCTL:(2,16),320,32;PXPDCTL:(2,16),352,32;PXASCTL:(2,16),384,32;TXCCTCTL:(2,16),416,32;TZCCTCTL:(2,16),448,32;RESERVED0:(3,6),480,32;COMH1:(2,16),512,32;COML1:(2,16),544,32;FAUCTL1:(2,16),576,32;DITCTL:(2,16),608,32;COMH2:(2,16),640,32;COML2:(2,16),672,32;FAUCTL2:(2,16),704,32;CCRCTL:(2,16),736,32;COMH3:(2,16),768,32;COML3:(2,16),800,32;FAUCTL3:(2,16),832,32;RESERVED1:(3,6),864,32;COMH4:(2,16),896,32;COML4:(2,16),928,32;FAUCTL4:(2,16),960,32;RESERVED2:(3,6),992,32;ECCPXCTL1:(2,16),1024,32;ECCPXR1:(2,16),1056,32;ECCPXR2:(2,16),1088,32;ECCPXR3:(2,16),1120,32;ECCPXR4:(2,16),1152,32;PXUDCTL:(2,16),1184,32;ECCPXCTL2:(2,16),1216,32;PXDTCTL:(2,16),1248,32;PWMXOC:(2,16),1280,32;PXATRCTL:(2,16),1312,32;PXASCTL0:(2,16),1344,32;PXASCTL1:(2,16),1376,32;ZPDCTL0:(2,16),1408,32;ZPDCTL1:(2,16),1440,32;ZPDPORT:(2,16),1472,32;ECCPXIE:(2,16),1504,32;ECCPXEGIF:(2,16),1536,32;TXUDTIM:(2,16),1568,32;TZUDTIM:(2,16),1600,32;ECCPXDF:(2,15),1632,32;ECCPXC1:(2,15),1664,32;ECCPXC2:(2,15),1696,32;ECCPXC3:(2,15),1728,32;ECCPXC4:(2,15),1760,32;RESERVED3:(3,6),1792,32;ECCPXDE:(2,16),1824,32;ECCPXSRIC:(2,16),1856,32;ECCPXCTL3:(2,16),1888,32;;",128,0,0,0
	.stabs	"ATIM_SFRmap:t(2,57)=(2,56)",128,0,4333,0
	.stabs	"ECCP_SFRmap:t(2,58)=(2,56)",128,0,4333,0
	.stabs	"EPWM_MemMap:T(2,59)=s104CNT:(2,16),0,32;PHS:(2,16),32,32;PPX:(2,16),64,32;PRSC:(2,16),96,32;CTL:(2,16),128,32;RA:(2,16),160,32;RB:(2,16),192,32;CTLA:(2,16),224,32;CTLB:(2,16),256,32;DBCTL:(2,16),288,32;DBT:(2,16),320,32;PCCTL:(2,16),352,32;PXASCTL:(2,16),384,32;ETCTL:(2,16),416,32;IE:(2,16),448,32;IF:(2,15),480,32;IC:(2,16),512,32;DE:(2,16),544,32;DF:(2,15),576,32;RESERVED0:(3,6),608,32;HRPWMCTL:(2,16),640,32;HRCMP:(2,16),672,32;CAP:(2,15),704,32;RC:(2,16),736,32;RD:(2,16),768,32;UDCTL:(2,16),800,32;;",128,0,0,0
	.stabs	"EPWM_SFRmap:t(2,60)=(2,59)",128,0,5174,0
	.stabs	"HRCAP_MenMap:T(2,61)=s52CTL:(2,16),0,32;COUNTER:(2,15),32,32;RISE:(2,62)=ar(2,18);0;1;(2,15),64,64;FALL:(2,62),128,64;HRRISE:(2,62),192,64;HRFALL:(2,62),256,64;SR:(2,15),320,32;SRIC:(2,16),352,32;IFRC:(2,16),384,32;;",128,0,0,0
	.stabs	"HRCAP_SFRmap:t(2,63)=(2,61)",128,0,5815,0
	.stabs	"QEI_MenMap:T(2,64)=s24CTL0:(2,16),0,32;CTL1:(2,16),32,32;CNT:(2,16),64,32;PPX:(2,16),96,32;PRSC:(2,16),128,32;DIER:(2,16),160,32;;",128,0,0,0
	.stabs	"QEI_SFRmap:t(2,65)=(2,64)",128,0,5972,0
	.stabs	"ADC_MemMap:T(2,66)=s92CTL0:(2,16),0,32;CTL1:(2,16),32,32;SCANSQ0:(2,16),64,32;SCANSQ1:(2,16),96,32;SCANSQ2:(2,16),128,32;HSCANSQ:(2,16),160,32;WDH:(2,16),192,32;WDL:(2,16),224,32;DATA:(2,15),256,32;HPDATA0:(2,15),288,32;HPDATA1:(2,15),320,32;HPDATA2:(2,15),352,32;HPDATA3:(2,15),384,32;HPDOFF0:(2,16),416,32;HPDOFF1:(2,16),448,32;HPDOFF2:(2,16),480,32;HPDOFF3:(2,16),512,32;SCANSQ3:(2,16),544,32;RESERVED:(2,53),576,64;STATE:(2,16),640,32;DELAY:(2,16),672,32;SCANCTL:(2,16),704,32;;",128,0,0,0
	.stabs	"ADC_SFRmap:t(2,67)=(2,66)",128,0,6106,0
	.stabs	"DAC_MemMap:T(2,68)=s24CTL:(2,16),0,32;DAHD:(2,16),32,32;DATA:(2,15),64,32;CTL1:(2,16),96,32;RESERVED:(3,6),128,32;CAL:(2,16),160,32;;",128,0,0,0
	.stabs	"DAC_SFRmap:t(2,69)=(2,68)",128,0,6796,0
	.stabs	"CMP_MemMap:T(2,70)=s40CTL0:(2,16),0,32;CTL1:(2,16),32,32;CTL2:(2,16),64,32;CTL3:(2,16),96,32;CTL4:(2,16),128,32;CTL5:(2,16),160,32;TRIM0:(2,16),192,32;TRIM1:(2,16),224,32;TRIM2:(2,16),256,32;TRIM3:(2,16),288,32;;",128,0,0,0
	.stabs	"CMP_SFRmap:t(2,71)=(2,70)",128,0,6967,0
	.stabs	"OP_MemMap:T(2,72)=s24CTL0:(2,16),0,32;CTL1:(2,16),32,32;TRIM0:(2,16),64,32;TRIM1:(2,16),96,32;TRIM2:(2,16),128,32;TRIM3:(2,16),160,32;;",128,0,0,0
	.stabs	"OP_SFRmap:t(2,73)=(2,72)",128,0,7396,0
	.stabs	"USART_MemMap:T(2,74)=s28CTLR:(2,16),0,32;BRGR:(2,16),32,32;STR:(2,16),64,32;:(2,75)=u4TBUFR:(2,16),0,32;RBUFR:(2,15),0,32;;,96,32;U7816R:(2,16),128,32;IER:(2,16),160,32;ADM:(2,16),192,32;;",128,0,0,0
	.stabs	"USART_SFRmap:t(2,76)=(2,74)",128,0,7696,0
	.stabs	"SPI_MemMap:T(2,77)=s16BRGR:(2,16),0,32;CTLR:(2,16),32,32;BUFR:(2,16),64,32;STR:(2,16),96,32;;",128,0,0,0
	.stabs	"SPI_SFRmap:t(2,78)=(2,77)",128,0,8037,0
	.stabs	"I2C_MemMap:T(2,79)=s36CTLR:(2,16),0,32;SR:(2,16),32,32;BUFR:(2,16),64,32;ADDR0:(2,16),96,32;BRGR:(2,16),128,32;ADDR1:(2,16),160,32;ADDR2:(2,16),192,32;ADDR3:(2,16),224,32;IER:(2,16),256,32;;",128,0,0,0
	.stabs	"I2C_SFRmap:t(2,80)=(2,79)",128,0,8201,0
	.stabs	"CanTxBufferTypeDef:t(2,81)=(2,82)=u16SFF:(2,83)=s16TXINFR:(2,84)=s4DLC:(2,16),0,4;RESERVED0:(2,16),4,2;RTR:(2,16),6,1;IDE:(2,16),7,1;RESERVED1:(2,16),8,24;;,0,32;TXDATA0:(2,85)=s4DATA1:(2,16),0,8;DATA0:(2,16),8,8;RESERVED0:(2,16),16,5;ID:(2,16),21,11;;,32,32;TXDATA1:(2,86)=s4DATA5:(2,16),0,8;DATA4:(2,16),8,8;DATA3:(2,16),16,8;DATA2:(2,16),24,8;;,64,32;TXDATA2:(2,87)=s4RESERVED0:(2,16),0,8;RESERVED1:(2,16),8,8;DATA7:(2,16),16,8;DATA6:(2,16),24,8;;,96,32;;,0,128;EFF:(2,88)=s16TXINFR:(2,89)=s4DLC:(2,16),0,4;RESERVED0:(2,16),4,2;RTR:(2,16),6,1;IDE:(2,16),7,1;RESERVED1:(2,16),8,24;;,0,32;TXDATA0:(2,90)=s4RESERVED:(2,16),0,3;ID:(2,16),3,29;;,32,32;TXDATA1:(2,91)=s4DATA3:(2,16),0,8;DATA2:(2,16),8,8;DATA1:(2,16),16,8;DATA0:(2,16),24,8;;,64,32;TXDATA2:(2,92)=s4DATA7:(2,16),0,8;DATA6:(2,16),8,8;DATA5:(2,16),16,8;DATA4:(2,16),24,8;;,96,32;;,0,128;;",128,0,8517,0
	.stabs	"CAN_MemMap:T(2,93)=s64CTLR:(2,16),0,32;BRGR:(2,16),32,32;RCR:(2,16),64,32;EROR:(2,16),96,32;ACRR:(2,16),128,32;MSKR:(2,16),160,32;IER:(2,16),192,32;IFR:(2,16),224,32;:(2,94)=u16:(2,95)=s16INFR:(2,16),0,32;TX0R:(2,16),32,32;TX1R:(2,16),64,32;TX2R:(2,16),96,32;;,0,128;CanTxBuffer:(2,81),0,128;;,256,128;RXDATA0:(2,16),384,32;RXDATA1:(2,16),416,32;RXDATA2:(2,16),448,32;RXDATA3:(2,16),480,32;;",128,0,0,0
	.stabs	"CAN_SFRmap:t(2,96)=(2,93)",128,0,8547,0
	.stabs	"CAN_FILTER_Map:T(2,97)=s64ACR1R:(2,16),0,32;MSK1R:(2,16),32,32;ACR2R:(2,16),64,32;MSK2R:(2,16),96,32;ACR3R:(2,16),128,32;MSK3R:(2,16),160,32;ACR4R:(2,16),192,32;MSK4R:(2,16),224,32;ACR5R:(2,16),256,32;MSK5R:(2,16),288,32;ACR6R:(2,16),320,32;MSK6R:(2,16),352,32;ACR7R:(2,16),384,32;MSK7R:(2,16),416,32;ACR8R:(2,16),448,32;MSK8R:(2,16),480,32;;",128,0,0,0
	.stabs	"CAN_FILTER_SFRmap:t(2,98)=(2,97)",128,0,8567,0
	.stabs	"CANFD_MenMap:T(2,99)=s124CTLR0:(2,16),0,32;BRGR:(2,16),32,32;RCR:(2,15),64,32;EROR:(2,16),96,32;NOUSE1:(2,16),128,32;MSKR:(2,16),160,32;IER:(2,16),192,32;IFR:(2,16),224,32;RX_SET1:(2,15),256,32;:(2,100)=u4:(2,101)=s4RX_SET2_1:(3,2),0,8;RX_SET2_2:(3,2),8,8;RX_SET2_34:(3,4),16,16;;,0,32;:(2,102)=s4RX_SET2:(3,6),0,32;;,0,32;;,288,32;:(2,103)=u64RXDATA:(2,104)=ar(2,18);0;63;(2,105)=k(2,106)=B(3,2),0,512;RXDATA_32:(2,107)=ar(2,18);0;15;(2,15),0,512;;,320,512;TIMER:(2,16),832,32;CRC:(2,15),864,32;NOUSE2:(2,16),896,32;CTLR1:(2,16),928,32;AMSTA:(2,15),960,32;;",128,0,0,0
	.stabs	"CANFD_SFRMap:t(2,108)=(2,99)",128,0,9725,0
	.stabs	"EXIC_MemMap:T(2,109)=s24CTL0:(2,16),0,32;CTL1:(2,16),32,32;STATE:(2,16),64,32;RESERVED1:(3,6),96,32;WRITEBUF:(2,16),128,32;READBUF:(2,16),160,32;;",128,0,0,0
	.stabs	"EXIC_SFRmap:t(2,110)=(2,109)",128,0,10240,0
	.stabs	"RTC_MemMap:T(2,111)=s44CR:(2,16),0,32;ALRA:(2,16),32,32;TMR:(2,16),64,32;DTR:(2,16),96,32;ALRB:(2,16),128,32;TMER:(2,16),160,32;TCR:(2,16),192,32;IER:(2,16),224,32;IFR:(2,16),256,32;TMBR:(2,16),288,32;DTBR:(2,16),320,32;;",128,0,0,0
	.stabs	"RTC_SFRmap:t(2,112)=(2,111)",128,0,10338,0
	.stabs	"IWDT_MemMap:T(2,113)=s8CTL:(2,16),0,32;FD:(2,16),32,32;;",128,0,0,0
	.stabs	"IWDT_SFRmap:t(2,114)=(2,113)",128,0,10865,0
	.stabs	"WWDT_MemMap:T(2,115)=s12CTL:(2,16),0,32;CNT:(2,16),32,32;CTL1:(2,16),64,32;;",128,0,0,0
	.stabs	"WWDT_SFRmap:t(2,116)=(2,115)",128,0,10915,0
	.stabs	"EWDT_MenMap:T(2,117)=s8CTL:(2,16),0,32;CNT:(2,16),32,32;;",128,0,0,0
	.stabs	"EWDT_SFRmap:t(2,118)=(2,117)",128,0,10993,0
	.stabs	"CFGL_MemMap:T(2,119)=s12CTL0:(2,16),0,32;CTL1:(2,16),32,32;IFR:(2,16),64,32;;",128,0,0,0
	.stabs	"CFGL_SFRmap:t(2,120)=(2,119)",128,0,11080,0
	.stabs	"ECFGL_MenMap:T(2,121)=s96:(2,122)=u64:(2,123)=s64ECFGL0_CTL:(2,16),0,32;ECFGL1_CTL:(2,16),32,32;ECFGL2_CTL:(2,16),64,32;ECFGL3_CTL:(2,16),96,32;ECFGL4_CTL:(2,16),128,32;ECFGL5_CTL:(2,16),160,32;ECFGL6_CTL:(2,16),192,32;ECFGL7_CTL:(2,16),224,32;ECFGL8_CTL:(2,16),256,32;ECFGL9_CTL:(2,16),288,32;ECFGL10_CTL:(2,16),320,32;ECFGL11_CTL:(2,16),352,32;ECFGL12_CTL:(2,16),384,32;ECFGL13_CTL:(2,16),416,32;ECFGL14_CTL:(2,16),448,32;ECFGL15_CTL:(2,16),480,32;;,0,512;ECFGL_CTL:(2,124)=ar(2,18);0;15;(2,16),0,512;;,0,512;SOFTSEL:(2,16),512,32;FCLK:(2,16),544,32;IC:(2,16),576,32;IF:(2,16),608,32;RFCTL:(2,16),640,32;FFCTL:(2,16),672,32;ADC:(2,16),704,32;OUT:(2,15),736,32;;",128,0,0,0
	.stabs	"ECFGL_SFRmap:t(2,125)=(2,121)",128,0,11295,0
	.stabs	"RST_MemMap:T(2,126)=s16CTL0:(2,16),0,32;CTL1:(2,16),32,32;CTL2:(2,16),64,32;CTL3:(2,16),96,32;;",128,0,0,0
	.stabs	"RST_SFRmap:t(2,127)=(2,126)",128,0,11615,0
	.stabs	"PCLK_MemMap:T(2,128)=s16CTL0:(2,16),0,32;CTL1:(2,16),32,32;CTL2:(2,16),64,32;CTL3:(2,16),96,32;;",128,0,0,0
	.stabs	"PCLK_SFRmap:t(2,129)=(2,128)",128,0,11797,0
	.stabs	"PM_MemMap:T(2,130)=s36CTL0:(2,16),0,32;CTL1:(2,16),32,32;STA0:(2,15),64,32;STA1:(2,15),96,32;STAC:(2,16),128,32;CTL2:(2,16),160,32;CAL0:(2,16),192,32;CAL1:(2,16),224,32;CAL2:(2,16),256,32;;",128,0,0,0
	.stabs	"PM_SFRmap:t(2,131)=(2,130)",128,0,11983,0
	.stabs	"BKP_MemMap:T(2,132)=s96CTL:(2,16),0,32;INT:(2,16),32,32;RESERVED:(2,133)=ar(2,18);0;13;(3,6),64,448;DATA:(2,134)=ar(2,18);0;7;(2,16),512,256;;",128,0,0,0
	.stabs	"BKP_SFRmap:t(2,135)=(2,132)",128,0,12457,0
	.stabs	"FLASH_MemMap:T(2,136)=s80ISPCON0:(2,16),0,32;ISPCON1:(2,16),32,32;ISPCMD:(2,16),64,32;ISPTRG:(2,16),96,32;RESERVED1:(3,6),128,32;CFG:(2,16),160,32;RESERVED2:(3,6),192,32;ISPADDR:(2,16),224,32;STATE:(2,16),256,32;RESERVED3:(3,6),288,32;NVMUNLOCK:(2,16),320,32;PROUNLOCK:(2,16),352,32;CFGUNLOCK:(2,16),384,32;RESERVED4:(3,6),416,32;CSSTART:(2,16),448,32;CSSTOP:(2,16),480,32;CSRES:(2,137)=ar(2,18);0;3;(2,16),512,128;;",128,0,0,0
	.stabs	"FLASH_SFRmap:t(2,138)=(2,136)",128,0,12556,0
	.stabs	"CRC_MemMap:T(2,139)=s32CTL:(2,16),0,32;DATA:(2,16),32,32;RSLT:(2,15),64,32;INIT:(2,16),96,32;PLN:(2,16),128,32;RXOR:(2,16),160,32;IDATA:(2,16),192,32;TEMP:(2,15),224,32;;",128,0,0,0
	.stabs	"CRC_SFRmap:t(2,140)=(2,139)",128,0,12749,0
	.stabs	"AES_MenMap:T(2,141)=s48CTL:(2,16),0,32;INT:(2,16),32,32;RESERVED1:(3,6),64,32;RESERVED2:(3,6),96,32;INPUT0:(2,16),128,32;INPUT1:(2,16),160,32;INPUT2:(2,16),192,32;INPUT3:(2,16),224,32;OUTPUT0:(2,15),256,32;OUTPUT1:(2,15),288,32;OUTPUT2:(2,15),320,32;OUTPUT3:(2,15),352,32;;",128,0,0,0
	.stabs	"AES_SFRmap:t(2,142)=(2,141)",128,0,12814,0
	.stabs	"RNG_MenMap:T(2,143)=s16CTL:(2,16),0,32;STATE:(2,16),32,32;SEED:(2,15),64,32;DR:(2,15),96,32;;",128,0,0,0
	.stabs	"RNG_SFRmap:t(2,144)=(2,143)",128,0,12914,0
	.stabs	"FlexMUX_MenMap:T(2,145)=s8SOU:(2,16),0,32;TAR:(2,16),32,32;;",128,0,0,0
	.stabs	"FlexMUX_SFRmap:t(2,146)=(2,145)",128,0,13015,0
	.stabs	"FDC_MenMap:T(2,147)=s128CTL:(2,16),0,32;MOD:(2,16),32,32;CNT:(2,15),64,32;IDLY:(2,16),96,32;CH0CTL:(2,16),128,32;CH1CTL:(2,16),160,32;CH2CTL:(2,16),192,32;CH3CTL:(2,16),224,32;RESERVED:(2,148)=ar(2,18);0;3;(3,6),256,128;CH0DLY0:(2,16),384,32;CH0DLY1:(2,16),416,32;CH0DLY2:(2,16),448,32;RESERVED5:(3,6),480,32;CH1DLY0:(2,16),512,32;CH1DLY1:(2,16),544,32;CH1DLY2:(2,16),576,32;RESERVED6:(3,6),608,32;CH2DLY0:(2,16),640,32;CH2DLY1:(2,16),672,32;CH2DLY2:(2,16),704,32;RESERVED7:(3,6),736,32;CH3DLY0:(2,16),768,32;CH3DLY1:(2,16),800,32;CH3DLY2:(2,16),832,32;RESERVED8:(3,6),864,32;PO0DLY:(2,16),896,32;PO1DLY:(2,16),928,32;PO2DLY:(2,16),960,32;PO3DLY:(2,16),992,32;;",128,0,0,0
	.stabs	"FDC_SFRmap:t(2,149)=(2,147)",128,0,13197,0
	.stabs	"FlexRM_MenMap:T(2,150)=s24CTL:(2,16),0,32;GPSR0:(2,16),32,32;GPSR1:(2,16),64,32;GCSR0:(2,16),96,32;GCSR1:(2,16),128,32;GCSR2:(2,16),160,32;;",128,0,0,0
	.stabs	"FlexRM_SFRmap:t(2,151)=(2,150)",128,0,13675,0
	.stabs	"CACHE_MenMap:T(2,152)=s4CTLR:(2,16),0,32;;",128,0,0,0
	.stabs	"CACHE_SFRmap:t(2,153)=(2,152)",128,0,14093,0
	.stabn	162,0,0,0
	.stabs	"CFGL_InitTypeDef:t(1,1)=(1,2)=s192m_Module_EN:(3,6),0,32;m_Output_EN:(3,6),32,32;m_RaiseINT_EN:(3,6),64,32;m_FallINT_EN:(3,6),96,32;m_Mode_Sel:(3,6),128,32;m_Output_Pol:(3,6),160,32;m_G4Output_POL:(3,6),192,32;m_G3Output_POL:(3,6),224,32;m_G2Output_POL:(3,6),256,32;m_G1Output_POL:(3,6),288,32;m_G4Input_Sel:(3,6),320,32;m_G3Input_Sel:(3,6),352,32;m_G2Input_Sel:(3,6),384,32;m_G1Input_Sel:(3,6),416,32;m_CH4Data_Sel:(3,6),448,32;m_CH5CH6Data_Sel:(3,6),480,32;m_G4D4_Inphase_EN:(2,2),512,32;m_G4D4_Inverse_EN:(2,2),544,32;m_G4D3_Inphase_EN:(2,2),576,32;m_G4D3_Inverse_EN:(2,2),608,32;m_G4D2_Inphase_EN:(2,2),640,32;m_G4D2_Inverse_EN:(2,2),672,32;m_G4D1_Inphase_EN:(2,2),704,32;m_G4D1_Inverse_EN:(2,2),736,32;m_G3D4_Inphase_EN:(2,2),768,32;m_G3D4_Inverse_EN:(2,2),800,32;m_G3D3_Inphase_EN:(2,2),832,32;m_G3D3_Inverse_EN:(2,2),864,32;m_G3D2_Inphase_EN:(2,2),896,32;m_G3D2_Inverse_EN:(2,2),928,32;m_G3D1_Inphase_EN:(2,2),960,32;m_G3D1_Inverse_EN:(2,2),992,32;m_G2D4_Inphase_EN:(2,2),1024,32;m_G2D4_Inverse_EN:(2,2),1056,32;m_G2D3_Inphase_EN:(2,2),1088,32;m_G2D3_Inverse_EN:(2,2),1120,32;m_G2D2_Inphase_EN:(2,2),1152,32;m_G2D2_Inverse_EN:(2,2),1184,32;m_G2D1_Inphase_EN:(2,2),1216,32;m_G2D1_Inverse_EN:(2,2),1248,32;m_G1D4_Inphase_EN:(2,2),1280,32;m_G1D4_Inverse_EN:(2,2),1312,32;m_G1D3_Inphase_EN:(2,2),1344,32;m_G1D3_Inverse_EN:(2,2),1376,32;m_G1D2_Inphase_EN:(2,2),1408,32;m_G1D2_Inverse_EN:(2,2),1440,32;m_G1D1_Inphase_EN:(2,2),1472,32;m_G1D1_Inverse_EN:(2,2),1504,32;;",128,0,139,0
	.stabn	162,0,0,0
	.section .text$SFR_Config
	.type	.text$SFR_Config$scode_local_1, @function
	.text$SFR_Config$scode_loacal_1:
	.align	1
	.stabs	"SFR_Config:f(3,6)",36,0,14156,SFR_Config
	.stabs	"SfrMem:p(3,6)",160,0,14156,0
	.stabs	"SfrMask:p(3,6)",160,0,14156,4
	.stabs	"WriteVal:p(3,6)",160,0,14156,8
	.type	SFR_Config, @function
SFR_Config:
	.stabd	46,0,0
	.stabs	"C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h",132,0,0,.Ltext1
.Ltext1:
	.stabn	68,0,14157,.LM0-.LFBB1
.LM0:
.LFBB1:
	SUB	sp,#12
	ST.w	[sp],r0
	ST.w	[sp+#1],r1
	ST.w	[sp+#2],r2
	.stabn	68,0,14158,.LM1-.LFBB1
.LM1:
	LD.w	r5,[sp]
	LD.w	r4,[sp+#1]
	ANL	r4,r5,r4
	LD.w	r5,[sp+#2]
	ORL	r5,r4,r5
	.stabn	68,0,14159,.LM2-.LFBB1
.LM2:
	MOV	r0,r5
	ADD	sp,#12
	JMP	lr
	.size	SFR_Config, .-SFR_Config
.Lscope1:
	.stabs	"",36,0,0,.Lscope1-.LFBB1
	.stabd	78,0,0
	.section .text$CFGL_Reset
	.type	.text$CFGL_Reset$scode_local_2, @function
	.text$CFGL_Reset$scode_loacal_2:
	.align	1
	.stabs	"CFGL_Reset:F(0,15)",36,0,67,CFGL_Reset
	.export	CFGL_Reset
	.type	CFGL_Reset, @function
CFGL_Reset:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext2
.Ltext2:
	.stabn	68,0,68,.LM3-.LFBB2
.LM3:
.LFBB2:
	PUSH	lr
	.stabn	68,0,70,.LM4-.LFBB2
.LM4:
	MOV	r0,#1
	LSL	r0,#19
	MOV	r1,#1
	LD	r5,#RST_CTL3_Peripheral_Reset_Enable
	LJMP	r5
	.stabn	68,0,71,.LM5-.LFBB2
.LM5:
	MOV	r0,#1
	LSL	r0,#19
	MOV	r1,#0
	LD	r5,#RST_CTL3_Peripheral_Reset_Enable
	LJMP	r5
	.stabn	68,0,72,.LM6-.LFBB2
.LM6:
	MOV	r0,#1
	LSL	r0,#19
	MOV	r1,#1
	LD	r5,#PCLK_CTL3_Peripheral_Clock_Enable
	LJMP	r5
	.stabn	68,0,74,.LM7-.LFBB2
.LM7:
	POP	lr
	JMP	lr
	.size	CFGL_Reset, .-CFGL_Reset
.Lscope2:
	.stabs	"",36,0,0,.Lscope2-.LFBB2
	.stabd	78,0,0
	.section .text$CFGL_Configuration
	.type	.text$CFGL_Configuration$scode_local_3, @function
	.text$CFGL_Configuration$scode_loacal_3:
	.align	1
	.stabs	"CFGL_Configuration:F(0,15)",36,0,82,CFGL_Configuration
	.stabs	"CFGLx:p(0,16)=*(2,120)",160,0,82,4
	.stabs	"CFGLInitStruct:p(0,17)=*(1,1)",160,0,82,8
	.export	CFGL_Configuration
	.type	CFGL_Configuration, @function
CFGL_Configuration:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext3
.Ltext3:
	.stabn	68,0,83,.LM8-.LFBB3
.LM8:
.LFBB3:
	PUSH	lr
	SUB	sp,#12
	ST.w	[sp+#1],r0
	ST.w	[sp+#2],r1
	.stabn	68,0,122,.LM9-.LFBB3
.LM9:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5]
	.stabn	68,0,123,.LM10-.LFBB3
.LM10:
	LD.w	r4,[sp+#2]
	LD.w	r4,[r4+#1]
	.stabn	68,0,122,.LM11-.LFBB3
.LM11:
	ORL	r4,r5,r4
	.stabn	68,0,124,.LM12-.LFBB3
.LM12:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#2]
	.stabn	68,0,123,.LM13-.LFBB3
.LM13:
	ORL	r4,r4,r5
	.stabn	68,0,125,.LM14-.LFBB3
.LM14:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#3]
	.stabn	68,0,124,.LM15-.LFBB3
.LM15:
	ORL	r4,r4,r5
	.stabn	68,0,126,.LM16-.LFBB3
.LM16:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#4]
	.stabn	68,0,125,.LM17-.LFBB3
.LM17:
	ORL	r4,r4,r5
	.stabn	68,0,127,.LM18-.LFBB3
.LM18:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#5]
	.stabn	68,0,126,.LM19-.LFBB3
.LM19:
	ORL	r4,r4,r5
	.stabn	68,0,128,.LM20-.LFBB3
.LM20:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#6]
	.stabn	68,0,127,.LM21-.LFBB3
.LM21:
	ORL	r4,r4,r5
	.stabn	68,0,129,.LM22-.LFBB3
.LM22:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#7]
	.stabn	68,0,128,.LM23-.LFBB3
.LM23:
	ORL	r4,r4,r5
	.stabn	68,0,130,.LM24-.LFBB3
.LM24:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#8]
	.stabn	68,0,129,.LM25-.LFBB3
.LM25:
	ORL	r4,r4,r5
	.stabn	68,0,131,.LM26-.LFBB3
.LM26:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#9]
	.stabn	68,0,130,.LM27-.LFBB3
.LM27:
	ORL	r4,r4,r5
	.stabn	68,0,132,.LM28-.LFBB3
.LM28:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#10]
	.stabn	68,0,131,.LM29-.LFBB3
.LM29:
	ORL	r4,r4,r5
	.stabn	68,0,133,.LM30-.LFBB3
.LM30:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#11]
	.stabn	68,0,132,.LM31-.LFBB3
.LM31:
	ORL	r4,r4,r5
	.stabn	68,0,134,.LM32-.LFBB3
.LM32:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#12]
	.stabn	68,0,133,.LM33-.LFBB3
.LM33:
	ORL	r4,r4,r5
	.stabn	68,0,135,.LM34-.LFBB3
.LM34:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#13]
	.stabn	68,0,134,.LM35-.LFBB3
.LM35:
	ORL	r4,r4,r5
	.stabn	68,0,136,.LM36-.LFBB3
.LM36:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#14]
	.stabn	68,0,135,.LM37-.LFBB3
.LM37:
	ORL	r4,r4,r5
	.stabn	68,0,137,.LM38-.LFBB3
.LM38:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#15]
	.stabn	68,0,122,.LM39-.LFBB3
.LM39:
	ORL	r5,r4,r5
	ST.w	[sp],r5
	.stabn	68,0,138,.LM40-.LFBB3
.LM40:
	LD.w	r5,[sp+#1]
	LD.w	r5,[r5]
	MOV	r0,r5
	LD	r1,#559232
	LD.w	r2,[sp]
	LD	r5,#SFR_Config
	LJMP	r5
	MOV	r5,r0
	LD.w	r4,[sp+#1]
	ST.w	[r4],r5
	.stabn	68,0,173,.LM41-.LFBB3
.LM41:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#16]
	MOV	r3,#31
	LSL	r4,r5,r3
	.stabn	68,0,174,.LM42-.LFBB3
.LM42:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#17]
	LSL	r5,#30
	.stabn	68,0,173,.LM43-.LFBB3
.LM43:
	ORL	r4,r4,r5
	.stabn	68,0,175,.LM44-.LFBB3
.LM44:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#18]
	LSL	r5,#29
	.stabn	68,0,174,.LM45-.LFBB3
.LM45:
	ORL	r4,r4,r5
	.stabn	68,0,176,.LM46-.LFBB3
.LM46:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#19]
	LSL	r5,#28
	.stabn	68,0,175,.LM47-.LFBB3
.LM47:
	ORL	r4,r4,r5
	.stabn	68,0,177,.LM48-.LFBB3
.LM48:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#20]
	LSL	r5,#27
	.stabn	68,0,176,.LM49-.LFBB3
.LM49:
	ORL	r4,r4,r5
	.stabn	68,0,178,.LM50-.LFBB3
.LM50:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#21]
	LSL	r5,#26
	.stabn	68,0,177,.LM51-.LFBB3
.LM51:
	ORL	r4,r4,r5
	.stabn	68,0,179,.LM52-.LFBB3
.LM52:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#22]
	LSL	r5,#25
	.stabn	68,0,178,.LM53-.LFBB3
.LM53:
	ORL	r4,r4,r5
	.stabn	68,0,180,.LM54-.LFBB3
.LM54:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#23]
	LSL	r5,#24
	.stabn	68,0,179,.LM55-.LFBB3
.LM55:
	ORL	r4,r4,r5
	.stabn	68,0,181,.LM56-.LFBB3
.LM56:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#24]
	LSL	r5,#23
	.stabn	68,0,180,.LM57-.LFBB3
.LM57:
	ORL	r4,r4,r5
	.stabn	68,0,182,.LM58-.LFBB3
.LM58:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#25]
	LSL	r5,#22
	.stabn	68,0,181,.LM59-.LFBB3
.LM59:
	ORL	r4,r4,r5
	.stabn	68,0,183,.LM60-.LFBB3
.LM60:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#26]
	LSL	r5,#21
	.stabn	68,0,182,.LM61-.LFBB3
.LM61:
	ORL	r4,r4,r5
	.stabn	68,0,184,.LM62-.LFBB3
.LM62:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#27]
	LSL	r5,#20
	.stabn	68,0,183,.LM63-.LFBB3
.LM63:
	ORL	r4,r4,r5
	.stabn	68,0,185,.LM64-.LFBB3
.LM64:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#28]
	LSL	r5,#19
	.stabn	68,0,184,.LM65-.LFBB3
.LM65:
	ORL	r4,r4,r5
	.stabn	68,0,186,.LM66-.LFBB3
.LM66:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#29]
	LSL	r5,#18
	.stabn	68,0,185,.LM67-.LFBB3
.LM67:
	ORL	r4,r4,r5
	.stabn	68,0,187,.LM68-.LFBB3
.LM68:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#30]
	LSL	r5,#17
	.stabn	68,0,186,.LM69-.LFBB3
.LM69:
	ORL	r4,r4,r5
	.stabn	68,0,188,.LM70-.LFBB3
.LM70:
	LD.w	r5,[sp+#2]
	LD.w	r5,[r5+#31]
	LSL	r5,#16
	.stabn	68,0,187,.LM71-.LFBB3
.LM71:
	ORL	r4,r4,r5
	.stabn	68,0,189,.LM72-.LFBB3
.LM72:
	LD.w	r3,[sp+#2]
	MOV	r5,#128
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#15
	.stabn	68,0,188,.LM73-.LFBB3
.LM73:
	ORL	r4,r4,r5
	.stabn	68,0,190,.LM74-.LFBB3
.LM74:
	LD.w	r3,[sp+#2]
	MOV	r5,#132
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#14
	.stabn	68,0,189,.LM75-.LFBB3
.LM75:
	ORL	r4,r4,r5
	.stabn	68,0,191,.LM76-.LFBB3
.LM76:
	LD.w	r3,[sp+#2]
	MOV	r5,#136
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#13
	.stabn	68,0,190,.LM77-.LFBB3
.LM77:
	ORL	r4,r4,r5
	.stabn	68,0,192,.LM78-.LFBB3
.LM78:
	LD.w	r3,[sp+#2]
	MOV	r5,#140
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#12
	.stabn	68,0,191,.LM79-.LFBB3
.LM79:
	ORL	r4,r4,r5
	.stabn	68,0,193,.LM80-.LFBB3
.LM80:
	LD.w	r3,[sp+#2]
	MOV	r5,#144
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#11
	.stabn	68,0,192,.LM81-.LFBB3
.LM81:
	ORL	r4,r4,r5
	.stabn	68,0,194,.LM82-.LFBB3
.LM82:
	LD.w	r3,[sp+#2]
	MOV	r5,#148
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#10
	.stabn	68,0,193,.LM83-.LFBB3
.LM83:
	ORL	r4,r4,r5
	.stabn	68,0,195,.LM84-.LFBB3
.LM84:
	LD.w	r3,[sp+#2]
	MOV	r5,#152
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#9
	.stabn	68,0,194,.LM85-.LFBB3
.LM85:
	ORL	r4,r4,r5
	.stabn	68,0,196,.LM86-.LFBB3
.LM86:
	LD.w	r3,[sp+#2]
	MOV	r5,#156
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#8
	.stabn	68,0,195,.LM87-.LFBB3
.LM87:
	ORL	r4,r4,r5
	.stabn	68,0,197,.LM88-.LFBB3
.LM88:
	LD.w	r3,[sp+#2]
	MOV	r5,#160
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#7
	.stabn	68,0,196,.LM89-.LFBB3
.LM89:
	ORL	r4,r4,r5
	.stabn	68,0,198,.LM90-.LFBB3
.LM90:
	LD.w	r3,[sp+#2]
	MOV	r5,#164
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#6
	.stabn	68,0,197,.LM91-.LFBB3
.LM91:
	ORL	r4,r4,r5
	.stabn	68,0,199,.LM92-.LFBB3
.LM92:
	LD.w	r3,[sp+#2]
	MOV	r5,#168
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#5
	.stabn	68,0,198,.LM93-.LFBB3
.LM93:
	ORL	r4,r4,r5
	.stabn	68,0,200,.LM94-.LFBB3
.LM94:
	LD.w	r3,[sp+#2]
	MOV	r5,#172
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#4
	.stabn	68,0,199,.LM95-.LFBB3
.LM95:
	ORL	r4,r4,r5
	.stabn	68,0,201,.LM96-.LFBB3
.LM96:
	LD.w	r3,[sp+#2]
	MOV	r5,#176
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#3
	.stabn	68,0,200,.LM97-.LFBB3
.LM97:
	ORL	r4,r4,r5
	.stabn	68,0,202,.LM98-.LFBB3
.LM98:
	LD.w	r3,[sp+#2]
	MOV	r5,#180
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	LSL	r5,#2
	.stabn	68,0,201,.LM99-.LFBB3
.LM99:
	ORL	r4,r4,r5
	.stabn	68,0,203,.LM100-.LFBB3
.LM100:
	LD.w	r3,[sp+#2]
	MOV	r5,#184
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	ADD	r5,r5,r5
	.stabn	68,0,202,.LM101-.LFBB3
.LM101:
	ORL	r4,r4,r5
	.stabn	68,0,204,.LM102-.LFBB3
.LM102:
	LD.w	r3,[sp+#2]
	MOV	r5,#188
	ADD	r5,r3,r5
	LD.w	r5,[r5]
	.stabn	68,0,173,.LM103-.LFBB3
.LM103:
	ORL	r5,r4,r5
	ST.w	[sp],r5
	.stabn	68,0,205,.LM104-.LFBB3
.LM104:
	LD.w	r5,[sp+#1]
	LD.w	r5,[r5+#1]
	MOV	r0,r5
	MOV	r1,#0
	LD.w	r2,[sp]
	LD	r5,#SFR_Config
	LJMP	r5
	MOV	r4,r0
	LD.w	r5,[sp+#1]
	ST.w	[r5+#1],r4
	.stabn	68,0,207,.LM105-.LFBB3
.LM105:
	ADD	sp,#12
	POP	lr
	JMP	lr
	.size	CFGL_Configuration, .-CFGL_Configuration
	.stabs	"tmpreg:(3,6)",128,0,84,0
	.stabn	192,0,0,.LFBB3-.LFBB3
	.stabn	224,0,0,.Lscope3-.LFBB3
.Lscope3:
	.stabs	"",36,0,0,.Lscope3-.LFBB3
	.stabd	78,0,0
	.section .text$CFGL_Struct_Init
	.type	.text$CFGL_Struct_Init$scode_local_4, @function
	.text$CFGL_Struct_Init$scode_loacal_4:
	.align	1
	.stabs	"CFGL_Struct_Init:F(0,15)",36,0,214,CFGL_Struct_Init
	.stabs	"CFGLInitStruct:p(0,17)",160,0,214,0
	.export	CFGL_Struct_Init
	.type	CFGL_Struct_Init, @function
CFGL_Struct_Init:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext4
.Ltext4:
	.stabn	68,0,215,.LM106-.LFBB4
.LM106:
.LFBB4:
	SUB	sp,#4
	ST.w	[sp],r0
	.stabn	68,0,217,.LM107-.LFBB4
.LM107:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5],r4
	.stabn	68,0,219,.LM108-.LFBB4
.LM108:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#1],r4
	.stabn	68,0,221,.LM109-.LFBB4
.LM109:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#2],r4
	.stabn	68,0,223,.LM110-.LFBB4
.LM110:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#3],r4
	.stabn	68,0,225,.LM111-.LFBB4
.LM111:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#4],r4
	.stabn	68,0,227,.LM112-.LFBB4
.LM112:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#5],r4
	.stabn	68,0,229,.LM113-.LFBB4
.LM113:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#6],r4
	.stabn	68,0,231,.LM114-.LFBB4
.LM114:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#7],r4
	.stabn	68,0,233,.LM115-.LFBB4
.LM115:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#8],r4
	.stabn	68,0,235,.LM116-.LFBB4
.LM116:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#9],r4
	.stabn	68,0,237,.LM117-.LFBB4
.LM117:
	LD.w	r5,[sp]
	LD	r4,#458752
	ST.w	[r5+#10],r4
	.stabn	68,0,239,.LM118-.LFBB4
.LM118:
	LD.w	r5,[sp]
	LD	r4,#28672
	ST.w	[r5+#11],r4
	.stabn	68,0,241,.LM119-.LFBB4
.LM119:
	LD.w	r5,[sp]
	LD	r4,#1792
	ST.w	[r5+#12],r4
	.stabn	68,0,243,.LM120-.LFBB4
.LM120:
	LD.w	r5,[sp]
	MOV	r4,#112
	ST.w	[r5+#13],r4
	.stabn	68,0,245,.LM121-.LFBB4
.LM121:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#14],r4
	.stabn	68,0,247,.LM122-.LFBB4
.LM122:
	LD.w	r5,[sp]
	MOV	r4,#7
	ST.w	[r5+#15],r4
	.stabn	68,0,250,.LM123-.LFBB4
.LM123:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#16],r4
	.stabn	68,0,252,.LM124-.LFBB4
.LM124:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#17],r4
	.stabn	68,0,254,.LM125-.LFBB4
.LM125:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#18],r4
	.stabn	68,0,256,.LM126-.LFBB4
.LM126:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#19],r4
	.stabn	68,0,258,.LM127-.LFBB4
.LM127:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#20],r4
	.stabn	68,0,260,.LM128-.LFBB4
.LM128:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#21],r4
	.stabn	68,0,262,.LM129-.LFBB4
.LM129:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#22],r4
	.stabn	68,0,264,.LM130-.LFBB4
.LM130:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#23],r4
	.stabn	68,0,267,.LM131-.LFBB4
.LM131:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#24],r4
	.stabn	68,0,269,.LM132-.LFBB4
.LM132:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#25],r4
	.stabn	68,0,271,.LM133-.LFBB4
.LM133:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#26],r4
	.stabn	68,0,273,.LM134-.LFBB4
.LM134:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#27],r4
	.stabn	68,0,275,.LM135-.LFBB4
.LM135:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#28],r4
	.stabn	68,0,277,.LM136-.LFBB4
.LM136:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#29],r4
	.stabn	68,0,279,.LM137-.LFBB4
.LM137:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#30],r4
	.stabn	68,0,281,.LM138-.LFBB4
.LM138:
	LD.w	r5,[sp]
	MOV	r4,#0
	ST.w	[r5+#31],r4
	.stabn	68,0,284,.LM139-.LFBB4
.LM139:
	LD.w	r4,[sp]
	MOV	r5,#128
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,286,.LM140-.LFBB4
.LM140:
	LD.w	r4,[sp]
	MOV	r5,#132
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,288,.LM141-.LFBB4
.LM141:
	LD.w	r4,[sp]
	MOV	r5,#136
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,290,.LM142-.LFBB4
.LM142:
	LD.w	r4,[sp]
	MOV	r5,#140
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,292,.LM143-.LFBB4
.LM143:
	LD.w	r4,[sp]
	MOV	r5,#144
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,294,.LM144-.LFBB4
.LM144:
	LD.w	r4,[sp]
	MOV	r5,#148
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,296,.LM145-.LFBB4
.LM145:
	LD.w	r4,[sp]
	MOV	r5,#152
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,298,.LM146-.LFBB4
.LM146:
	LD.w	r4,[sp]
	MOV	r5,#156
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,301,.LM147-.LFBB4
.LM147:
	LD.w	r4,[sp]
	MOV	r5,#160
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,303,.LM148-.LFBB4
.LM148:
	LD.w	r4,[sp]
	MOV	r5,#164
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,305,.LM149-.LFBB4
.LM149:
	LD.w	r4,[sp]
	MOV	r5,#168
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,307,.LM150-.LFBB4
.LM150:
	LD.w	r4,[sp]
	MOV	r5,#172
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,309,.LM151-.LFBB4
.LM151:
	LD.w	r4,[sp]
	MOV	r5,#176
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,311,.LM152-.LFBB4
.LM152:
	LD.w	r4,[sp]
	MOV	r5,#180
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,313,.LM153-.LFBB4
.LM153:
	LD.w	r4,[sp]
	MOV	r5,#184
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,315,.LM154-.LFBB4
.LM154:
	LD.w	r4,[sp]
	MOV	r5,#188
	ADD	r4,r4,r5
	MOV	r5,#0
	ST.w	[r4],r5
	.stabn	68,0,316,.LM155-.LFBB4
.LM155:
	ADD	sp,#4
	JMP	lr
	.size	CFGL_Struct_Init, .-CFGL_Struct_Init
.Lscope4:
	.stabs	"",36,0,0,.Lscope4-.LFBB4
	.stabd	78,0,0
	.section .text$CFGL2_OUT_SYNCHRO_Enable
	.type	.text$CFGL2_OUT_SYNCHRO_Enable$scode_local_5, @function
	.text$CFGL2_OUT_SYNCHRO_Enable$scode_loacal_5:
	.align	1
	.stabs	"CFGL2_OUT_SYNCHRO_Enable:F(0,15)",36,0,323,CFGL2_OUT_SYNCHRO_Enable
	.stabs	"NewState:p(2,2)",160,0,323,0
	.export	CFGL2_OUT_SYNCHRO_Enable
	.type	CFGL2_OUT_SYNCHRO_Enable, @function
CFGL2_OUT_SYNCHRO_Enable:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext5
.Ltext5:
	.stabn	68,0,324,.LM156-.LFBB5
.LM156:
.LFBB5:
	SUB	sp,#4
	ST.w	[sp],r0
	.stabn	68,0,329,.LM157-.LFBB5
.LM157:
	LD.w	r5,[sp]
	CMP	r5,#0
	JZ	.L7
	.stabn	68,0,332,.LM158-.LFBB5
.LM158:
	LD	r5,#1073752464
// inline asm begin
	// 332 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #31
// inline asm end
	JMP	.L6
.L7:
	.stabn	68,0,338,.LM159-.LFBB5
.LM159:
	LD	r5,#1073752464
// inline asm begin
	// 338 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #31
// inline asm end
.L6:
	.stabn	68,0,340,.LM160-.LFBB5
.LM160:
	ADD	sp,#4
	JMP	lr
	.size	CFGL2_OUT_SYNCHRO_Enable, .-CFGL2_OUT_SYNCHRO_Enable
.Lscope5:
	.stabs	"",36,0,0,.Lscope5-.LFBB5
	.stabd	78,0,0
	.section .text$CFGL1_OUT_SYNCHRO_Enable
	.type	.text$CFGL1_OUT_SYNCHRO_Enable$scode_local_6, @function
	.text$CFGL1_OUT_SYNCHRO_Enable$scode_loacal_6:
	.align	1
	.stabs	"CFGL1_OUT_SYNCHRO_Enable:F(0,15)",36,0,347,CFGL1_OUT_SYNCHRO_Enable
	.stabs	"NewState:p(2,2)",160,0,347,0
	.export	CFGL1_OUT_SYNCHRO_Enable
	.type	CFGL1_OUT_SYNCHRO_Enable, @function
CFGL1_OUT_SYNCHRO_Enable:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext6
.Ltext6:
	.stabn	68,0,348,.LM161-.LFBB6
.LM161:
.LFBB6:
	SUB	sp,#4
	ST.w	[sp],r0
	.stabn	68,0,353,.LM162-.LFBB6
.LM162:
	LD.w	r5,[sp]
	CMP	r5,#0
	JZ	.L10
	.stabn	68,0,356,.LM163-.LFBB6
.LM163:
	LD	r5,#1073752464
// inline asm begin
	// 356 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #30
// inline asm end
	JMP	.L9
.L10:
	.stabn	68,0,362,.LM164-.LFBB6
.LM164:
	LD	r5,#1073752464
// inline asm begin
	// 362 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #30
// inline asm end
.L9:
	.stabn	68,0,364,.LM165-.LFBB6
.LM165:
	ADD	sp,#4
	JMP	lr
	.size	CFGL1_OUT_SYNCHRO_Enable, .-CFGL1_OUT_SYNCHRO_Enable
.Lscope6:
	.stabs	"",36,0,0,.Lscope6-.LFBB6
	.stabd	78,0,0
	.section .text$CFGL2_FALLINT_Enable
	.type	.text$CFGL2_FALLINT_Enable$scode_local_7, @function
	.text$CFGL2_FALLINT_Enable$scode_loacal_7:
	.align	1
	.stabs	"CFGL2_FALLINT_Enable:F(0,15)",36,0,372,CFGL2_FALLINT_Enable
	.stabs	"NewState:p(2,2)",160,0,372,0
	.export	CFGL2_FALLINT_Enable
	.type	CFGL2_FALLINT_Enable, @function
CFGL2_FALLINT_Enable:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext7
.Ltext7:
	.stabn	68,0,373,.LM166-.LFBB7
.LM166:
.LFBB7:
	SUB	sp,#4
	ST.w	[sp],r0
	.stabn	68,0,378,.LM167-.LFBB7
.LM167:
	LD.w	r5,[sp]
	CMP	r5,#0
	JZ	.L13
	.stabn	68,0,381,.LM168-.LFBB7
.LM168:
	LD	r5,#1073752456
// inline asm begin
	// 381 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #28
	.stabn	68,0,382,.LM169-.LFBB7
.LM169:
// inline asm end
	LD	r5,#1073752464
// inline asm begin
	// 382 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #29
// inline asm end
	JMP	.L12
.L13:
	.stabn	68,0,388,.LM170-.LFBB7
.LM170:
	LD	r5,#1073752456
// inline asm begin
	// 388 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #28
	.stabn	68,0,389,.LM171-.LFBB7
.LM171:
// inline asm end
	LD	r5,#1073752464
// inline asm begin
	// 389 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #29
// inline asm end
.L12:
	.stabn	68,0,391,.LM172-.LFBB7
.LM172:
	ADD	sp,#4
	JMP	lr
	.size	CFGL2_FALLINT_Enable, .-CFGL2_FALLINT_Enable
.Lscope7:
	.stabs	"",36,0,0,.Lscope7-.LFBB7
	.stabd	78,0,0
	.section .text$CFGL2_RISEINT_Enable
	.type	.text$CFGL2_RISEINT_Enable$scode_local_8, @function
	.text$CFGL2_RISEINT_Enable$scode_loacal_8:
	.align	1
	.stabs	"CFGL2_RISEINT_Enable:F(0,15)",36,0,399,CFGL2_RISEINT_Enable
	.stabs	"NewState:p(2,2)",160,0,399,0
	.export	CFGL2_RISEINT_Enable
	.type	CFGL2_RISEINT_Enable, @function
CFGL2_RISEINT_Enable:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext8
.Ltext8:
	.stabn	68,0,400,.LM173-.LFBB8
.LM173:
.LFBB8:
	SUB	sp,#4
	ST.w	[sp],r0
	.stabn	68,0,405,.LM174-.LFBB8
.LM174:
	LD.w	r5,[sp]
	CMP	r5,#0
	JZ	.L16
	.stabn	68,0,408,.LM175-.LFBB8
.LM175:
	LD	r5,#1073752456
// inline asm begin
	// 408 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #29
	.stabn	68,0,409,.LM176-.LFBB8
.LM176:
// inline asm end
	LD	r5,#1073752464
// inline asm begin
	// 409 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #29
// inline asm end
	JMP	.L15
.L16:
	.stabn	68,0,415,.LM177-.LFBB8
.LM177:
	LD	r5,#1073752456
// inline asm begin
	// 415 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #29
	.stabn	68,0,416,.LM178-.LFBB8
.LM178:
// inline asm end
	LD	r5,#1073752464
// inline asm begin
	// 416 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #29
// inline asm end
.L15:
	.stabn	68,0,418,.LM179-.LFBB8
.LM179:
	ADD	sp,#4
	JMP	lr
	.size	CFGL2_RISEINT_Enable, .-CFGL2_RISEINT_Enable
.Lscope8:
	.stabs	"",36,0,0,.Lscope8-.LFBB8
	.stabd	78,0,0
	.section .text$CFGL1_FALLINT_Enable
	.type	.text$CFGL1_FALLINT_Enable$scode_local_9, @function
	.text$CFGL1_FALLINT_Enable$scode_loacal_9:
	.align	1
	.stabs	"CFGL1_FALLINT_Enable:F(0,15)",36,0,426,CFGL1_FALLINT_Enable
	.stabs	"NewState:p(2,2)",160,0,426,0
	.export	CFGL1_FALLINT_Enable
	.type	CFGL1_FALLINT_Enable, @function
CFGL1_FALLINT_Enable:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext9
.Ltext9:
	.stabn	68,0,427,.LM180-.LFBB9
.LM180:
.LFBB9:
	SUB	sp,#4
	ST.w	[sp],r0
	.stabn	68,0,432,.LM181-.LFBB9
.LM181:
	LD.w	r5,[sp]
	CMP	r5,#0
	JZ	.L19
	.stabn	68,0,435,.LM182-.LFBB9
.LM182:
	LD	r5,#1073752448
// inline asm begin
	// 435 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #28
	.stabn	68,0,436,.LM183-.LFBB9
.LM183:
// inline asm end
	LD	r5,#1073752464
// inline asm begin
	// 436 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #28
// inline asm end
	JMP	.L18
.L19:
	.stabn	68,0,442,.LM184-.LFBB9
.LM184:
	LD	r5,#1073752448
// inline asm begin
	// 442 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #28
	.stabn	68,0,443,.LM185-.LFBB9
.LM185:
// inline asm end
	LD	r5,#1073752464
// inline asm begin
	// 443 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #28
// inline asm end
.L18:
	.stabn	68,0,445,.LM186-.LFBB9
.LM186:
	ADD	sp,#4
	JMP	lr
	.size	CFGL1_FALLINT_Enable, .-CFGL1_FALLINT_Enable
.Lscope9:
	.stabs	"",36,0,0,.Lscope9-.LFBB9
	.stabd	78,0,0
	.section .text$CFGL1_RISEINT_Enable
	.type	.text$CFGL1_RISEINT_Enable$scode_local_10, @function
	.text$CFGL1_RISEINT_Enable$scode_loacal_10:
	.align	1
	.stabs	"CFGL1_RISEINT_Enable:F(0,15)",36,0,453,CFGL1_RISEINT_Enable
	.stabs	"NewState:p(2,2)",160,0,453,0
	.export	CFGL1_RISEINT_Enable
	.type	CFGL1_RISEINT_Enable, @function
CFGL1_RISEINT_Enable:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext10
.Ltext10:
	.stabn	68,0,454,.LM187-.LFBB10
.LM187:
.LFBB10:
	SUB	sp,#4
	ST.w	[sp],r0
	.stabn	68,0,459,.LM188-.LFBB10
.LM188:
	LD.w	r5,[sp]
	CMP	r5,#0
	JZ	.L22
	.stabn	68,0,462,.LM189-.LFBB10
.LM189:
	LD	r5,#1073752448
// inline asm begin
	// 462 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #29
	.stabn	68,0,463,.LM190-.LFBB10
.LM190:
// inline asm end
	LD	r5,#1073752464
// inline asm begin
	// 463 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #28
// inline asm end
	JMP	.L21
.L22:
	.stabn	68,0,469,.LM191-.LFBB10
.LM191:
	LD	r5,#1073752448
// inline asm begin
	// 469 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #29
	.stabn	68,0,470,.LM192-.LFBB10
.LM192:
// inline asm end
	LD	r5,#1073752464
// inline asm begin
	// 470 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #28
// inline asm end
.L21:
	.stabn	68,0,472,.LM193-.LFBB10
.LM193:
	ADD	sp,#4
	JMP	lr
	.size	CFGL1_RISEINT_Enable, .-CFGL1_RISEINT_Enable
.Lscope10:
	.stabs	"",36,0,0,.Lscope10-.LFBB10
	.stabd	78,0,0
	.section .text$CFGL1_Get_INT_Flag
	.type	.text$CFGL1_Get_INT_Flag$scode_local_11, @function
	.text$CFGL1_Get_INT_Flag$scode_loacal_11:
	.align	1
	.stabs	"CFGL1_Get_INT_Flag:F(2,4)",36,0,479,CFGL1_Get_INT_Flag
	.export	CFGL1_Get_INT_Flag
	.type	CFGL1_Get_INT_Flag, @function
CFGL1_Get_INT_Flag:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext11
.Ltext11:
	.stabn	68,0,480,.LM194-.LFBB11
.LM194:
.LFBB11:
	.stabn	68,0,482,.LM195-.LFBB11
.LM195:
	LD	r5,#1073752456
	LD.w	r4,[r5+#2]
	MOV	r5,#255
	ADD	r5,r5,#1
	ANL	r5,r4,r5
	CMP	r5,#0
	JZ	.L25
	.stabn	68,0,485,.LM196-.LFBB11
.LM196:
	MOV	r5,#1
	JMP	.L26
.L25:
	.stabn	68,0,490,.LM197-.LFBB11
.LM197:
	MOV	r5,#0
.L26:
	.stabn	68,0,492,.LM198-.LFBB11
.LM198:
	MOV	r0,r5
	JMP	lr
	.size	CFGL1_Get_INT_Flag, .-CFGL1_Get_INT_Flag
.Lscope11:
	.stabs	"",36,0,0,.Lscope11-.LFBB11
	.stabd	78,0,0
	.section .text$CFGL2_Get_INT_Flag
	.type	.text$CFGL2_Get_INT_Flag$scode_local_12, @function
	.text$CFGL2_Get_INT_Flag$scode_loacal_12:
	.align	1
	.stabs	"CFGL2_Get_INT_Flag:F(2,4)",36,0,499,CFGL2_Get_INT_Flag
	.export	CFGL2_Get_INT_Flag
	.type	CFGL2_Get_INT_Flag, @function
CFGL2_Get_INT_Flag:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext12
.Ltext12:
	.stabn	68,0,500,.LM199-.LFBB12
.LM199:
.LFBB12:
	.stabn	68,0,502,.LM200-.LFBB12
.LM200:
	LD	r5,#1073752456
	LD.w	r4,[r5+#2]
	MOV	r5,#1
	LSL	r5,#9
	ANL	r5,r4,r5
	CMP	r5,#0
	JZ	.L28
	.stabn	68,0,505,.LM201-.LFBB12
.LM201:
	MOV	r5,#1
	JMP	.L29
.L28:
	.stabn	68,0,510,.LM202-.LFBB12
.LM202:
	MOV	r5,#0
.L29:
	.stabn	68,0,512,.LM203-.LFBB12
.LM203:
	MOV	r0,r5
	JMP	lr
	.size	CFGL2_Get_INT_Flag, .-CFGL2_Get_INT_Flag
.Lscope12:
	.stabs	"",36,0,0,.Lscope12-.LFBB12
	.stabd	78,0,0
	.section .text$CFGL1_Clear_RISEINT_Flag
	.type	.text$CFGL1_Clear_RISEINT_Flag$scode_local_13, @function
	.text$CFGL1_Clear_RISEINT_Flag$scode_loacal_13:
	.align	1
	.stabs	"CFGL1_Clear_RISEINT_Flag:F(2,7)",36,0,519,CFGL1_Clear_RISEINT_Flag
	.export	CFGL1_Clear_RISEINT_Flag
	.type	CFGL1_Clear_RISEINT_Flag, @function
CFGL1_Clear_RISEINT_Flag:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext13
.Ltext13:
	.stabn	68,0,520,.LM204-.LFBB13
.LM204:
.LFBB13:
	SUB	sp,#4
	.stabn	68,0,521,.LM205-.LFBB13
.LM205:
	MOV	r5,#0
	ST.w	[sp],r5
	.stabn	68,0,523,.LM206-.LFBB13
.LM206:
	LD	r5,#1073752448
// inline asm begin
	// 523 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #29
	.stabn	68,0,524,.LM207-.LFBB13
.LM207:
// inline asm end
	JMP	.L31
.L33:
	.stabn	68,0,526,.LM208-.LFBB13
.LM208:
	LD.w	r5,[sp]
	ADD	r5,r5,#1
	ST.w	[sp],r5
.L31:
	.stabn	68,0,524,.LM209-.LFBB13
.LM209:
	LD	r5,#1073752456
	LD.w	r4,[r5+#2]
	MOV	r5,#255
	ADD	r5,r5,#1
	ANL	r5,r4,r5
	LSR	r5,#8
	CMP	r5,#0
	JZ	.L32
	.stabn	68,0,524,.LM210-.LFBB13
.LM210:
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L33
.L32:
	.stabn	68,0,528,.LM211-.LFBB13
.LM211:
	LD	r5,#1073752448
// inline asm begin
	// 528 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #29
	.stabn	68,0,529,.LM212-.LFBB13
.LM212:
// inline asm end
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L34
	.stabn	68,0,531,.LM213-.LFBB13
.LM213:
	MOV	r5,#0
	JMP	.L35
.L34:
	.stabn	68,0,533,.LM214-.LFBB13
.LM214:
	MOV	r5,#1
.L35:
	.stabn	68,0,534,.LM215-.LFBB13
.LM215:
	MOV	r0,r5
	ADD	sp,#4
	JMP	lr
	.size	CFGL1_Clear_RISEINT_Flag, .-CFGL1_Clear_RISEINT_Flag
	.stabs	"wait_flag:(2,16)",128,0,521,0
	.stabn	192,0,0,.LFBB13-.LFBB13
	.stabn	224,0,0,.Lscope13-.LFBB13
.Lscope13:
	.stabs	"",36,0,0,.Lscope13-.LFBB13
	.stabd	78,0,0
	.section .text$CFGL1_Clear_FALLINT_Flag
	.type	.text$CFGL1_Clear_FALLINT_Flag$scode_local_14, @function
	.text$CFGL1_Clear_FALLINT_Flag$scode_loacal_14:
	.align	1
	.stabs	"CFGL1_Clear_FALLINT_Flag:F(2,7)",36,0,541,CFGL1_Clear_FALLINT_Flag
	.export	CFGL1_Clear_FALLINT_Flag
	.type	CFGL1_Clear_FALLINT_Flag, @function
CFGL1_Clear_FALLINT_Flag:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext14
.Ltext14:
	.stabn	68,0,542,.LM216-.LFBB14
.LM216:
.LFBB14:
	SUB	sp,#4
	.stabn	68,0,543,.LM217-.LFBB14
.LM217:
	MOV	r5,#0
	ST.w	[sp],r5
	.stabn	68,0,545,.LM218-.LFBB14
.LM218:
	LD	r5,#1073752448
// inline asm begin
	// 545 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #28
	.stabn	68,0,546,.LM219-.LFBB14
.LM219:
// inline asm end
	JMP	.L37
.L39:
	.stabn	68,0,548,.LM220-.LFBB14
.LM220:
	LD.w	r5,[sp]
	ADD	r5,r5,#1
	ST.w	[sp],r5
.L37:
	.stabn	68,0,546,.LM221-.LFBB14
.LM221:
	LD	r5,#1073752456
	LD.w	r4,[r5+#2]
	MOV	r5,#255
	ADD	r5,r5,#1
	ANL	r5,r4,r5
	LSR	r5,#8
	CMP	r5,#0
	JZ	.L38
	.stabn	68,0,546,.LM222-.LFBB14
.LM222:
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L39
.L38:
	.stabn	68,0,550,.LM223-.LFBB14
.LM223:
	LD	r5,#1073752448
// inline asm begin
	// 550 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #28
	.stabn	68,0,551,.LM224-.LFBB14
.LM224:
// inline asm end
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L40
	.stabn	68,0,553,.LM225-.LFBB14
.LM225:
	MOV	r5,#0
	JMP	.L41
.L40:
	.stabn	68,0,555,.LM226-.LFBB14
.LM226:
	MOV	r5,#1
.L41:
	.stabn	68,0,556,.LM227-.LFBB14
.LM227:
	MOV	r0,r5
	ADD	sp,#4
	JMP	lr
	.size	CFGL1_Clear_FALLINT_Flag, .-CFGL1_Clear_FALLINT_Flag
	.stabs	"wait_flag:(2,16)",128,0,543,0
	.stabn	192,0,0,.LFBB14-.LFBB14
	.stabn	224,0,0,.Lscope14-.LFBB14
.Lscope14:
	.stabs	"",36,0,0,.Lscope14-.LFBB14
	.stabd	78,0,0
	.section .text$CFGL1_Clear_RISEFALLINT_Flag
	.type	.text$CFGL1_Clear_RISEFALLINT_Flag$scode_local_15, @function
	.text$CFGL1_Clear_RISEFALLINT_Flag$scode_loacal_15:
	.align	1
	.stabs	"CFGL1_Clear_RISEFALLINT_Flag:F(2,7)",36,0,563,CFGL1_Clear_RISEFALLINT_Flag
	.export	CFGL1_Clear_RISEFALLINT_Flag
	.type	CFGL1_Clear_RISEFALLINT_Flag, @function
CFGL1_Clear_RISEFALLINT_Flag:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext15
.Ltext15:
	.stabn	68,0,564,.LM228-.LFBB15
.LM228:
.LFBB15:
	SUB	sp,#4
	.stabn	68,0,565,.LM229-.LFBB15
.LM229:
	MOV	r5,#0
	ST.w	[sp],r5
	.stabn	68,0,567,.LM230-.LFBB15
.LM230:
	LD	r5,#1073752448
// inline asm begin
	// 567 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #28
	.stabn	68,0,568,.LM231-.LFBB15
.LM231:
// inline asm end
	LD	r5,#1073752448
// inline asm begin
	// 568 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #29
	.stabn	68,0,569,.LM232-.LFBB15
.LM232:
// inline asm end
	JMP	.L43
.L45:
	.stabn	68,0,571,.LM233-.LFBB15
.LM233:
	LD.w	r5,[sp]
	ADD	r5,r5,#1
	ST.w	[sp],r5
.L43:
	.stabn	68,0,569,.LM234-.LFBB15
.LM234:
	LD	r5,#1073752456
	LD.w	r4,[r5+#2]
	MOV	r5,#255
	ADD	r5,r5,#1
	ANL	r5,r4,r5
	LSR	r5,#8
	CMP	r5,#0
	JZ	.L44
	.stabn	68,0,569,.LM235-.LFBB15
.LM235:
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L45
.L44:
	.stabn	68,0,573,.LM236-.LFBB15
.LM236:
	LD	r5,#1073752448
// inline asm begin
	// 573 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #28
	.stabn	68,0,574,.LM237-.LFBB15
.LM237:
// inline asm end
	LD	r5,#1073752448
// inline asm begin
	// 574 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #29
	.stabn	68,0,575,.LM238-.LFBB15
.LM238:
// inline asm end
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L46
	.stabn	68,0,577,.LM239-.LFBB15
.LM239:
	MOV	r5,#0
	JMP	.L47
.L46:
	.stabn	68,0,579,.LM240-.LFBB15
.LM240:
	MOV	r5,#1
.L47:
	.stabn	68,0,580,.LM241-.LFBB15
.LM241:
	MOV	r0,r5
	ADD	sp,#4
	JMP	lr
	.size	CFGL1_Clear_RISEFALLINT_Flag, .-CFGL1_Clear_RISEFALLINT_Flag
	.stabs	"wait_flag:(2,16)",128,0,565,0
	.stabn	192,0,0,.LFBB15-.LFBB15
	.stabn	224,0,0,.Lscope15-.LFBB15
.Lscope15:
	.stabs	"",36,0,0,.Lscope15-.LFBB15
	.stabd	78,0,0
	.section .text$CFGL2_Clear_RISEINT_Flag
	.type	.text$CFGL2_Clear_RISEINT_Flag$scode_local_16, @function
	.text$CFGL2_Clear_RISEINT_Flag$scode_loacal_16:
	.align	1
	.stabs	"CFGL2_Clear_RISEINT_Flag:F(2,7)",36,0,587,CFGL2_Clear_RISEINT_Flag
	.export	CFGL2_Clear_RISEINT_Flag
	.type	CFGL2_Clear_RISEINT_Flag, @function
CFGL2_Clear_RISEINT_Flag:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext16
.Ltext16:
	.stabn	68,0,588,.LM242-.LFBB16
.LM242:
.LFBB16:
	SUB	sp,#4
	.stabn	68,0,589,.LM243-.LFBB16
.LM243:
	MOV	r5,#0
	ST.w	[sp],r5
	.stabn	68,0,591,.LM244-.LFBB16
.LM244:
	LD	r5,#1073752456
// inline asm begin
	// 591 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #29
	.stabn	68,0,592,.LM245-.LFBB16
.LM245:
// inline asm end
	JMP	.L49
.L51:
	.stabn	68,0,594,.LM246-.LFBB16
.LM246:
	LD.w	r5,[sp]
	ADD	r5,r5,#1
	ST.w	[sp],r5
.L49:
	.stabn	68,0,592,.LM247-.LFBB16
.LM247:
	LD	r5,#1073752456
	LD.w	r4,[r5+#2]
	MOV	r5,#1
	LSL	r5,#9
	ANL	r5,r4,r5
	LSR	r5,#9
	CMP	r5,#0
	JZ	.L50
	.stabn	68,0,592,.LM248-.LFBB16
.LM248:
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L51
.L50:
	.stabn	68,0,596,.LM249-.LFBB16
.LM249:
	LD	r5,#1073752456
// inline asm begin
	// 596 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #29
	.stabn	68,0,597,.LM250-.LFBB16
.LM250:
// inline asm end
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L52
	.stabn	68,0,599,.LM251-.LFBB16
.LM251:
	MOV	r5,#0
	JMP	.L53
.L52:
	.stabn	68,0,601,.LM252-.LFBB16
.LM252:
	MOV	r5,#1
.L53:
	.stabn	68,0,602,.LM253-.LFBB16
.LM253:
	MOV	r0,r5
	ADD	sp,#4
	JMP	lr
	.size	CFGL2_Clear_RISEINT_Flag, .-CFGL2_Clear_RISEINT_Flag
	.stabs	"wait_flag:(2,16)",128,0,589,0
	.stabn	192,0,0,.LFBB16-.LFBB16
	.stabn	224,0,0,.Lscope16-.LFBB16
.Lscope16:
	.stabs	"",36,0,0,.Lscope16-.LFBB16
	.stabd	78,0,0
	.section .text$CFGL2_Clear_FALLINT_Flag
	.type	.text$CFGL2_Clear_FALLINT_Flag$scode_local_17, @function
	.text$CFGL2_Clear_FALLINT_Flag$scode_loacal_17:
	.align	1
	.stabs	"CFGL2_Clear_FALLINT_Flag:F(2,7)",36,0,609,CFGL2_Clear_FALLINT_Flag
	.export	CFGL2_Clear_FALLINT_Flag
	.type	CFGL2_Clear_FALLINT_Flag, @function
CFGL2_Clear_FALLINT_Flag:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext17
.Ltext17:
	.stabn	68,0,610,.LM254-.LFBB17
.LM254:
.LFBB17:
	SUB	sp,#4
	.stabn	68,0,611,.LM255-.LFBB17
.LM255:
	MOV	r5,#0
	ST.w	[sp],r5
	.stabn	68,0,613,.LM256-.LFBB17
.LM256:
	LD	r5,#1073752456
// inline asm begin
	// 613 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #28
	.stabn	68,0,614,.LM257-.LFBB17
.LM257:
// inline asm end
	JMP	.L55
.L57:
	.stabn	68,0,616,.LM258-.LFBB17
.LM258:
	LD.w	r5,[sp]
	ADD	r5,r5,#1
	ST.w	[sp],r5
.L55:
	.stabn	68,0,614,.LM259-.LFBB17
.LM259:
	LD	r5,#1073752456
	LD.w	r4,[r5+#2]
	MOV	r5,#1
	LSL	r5,#9
	ANL	r5,r4,r5
	LSR	r5,#9
	CMP	r5,#0
	JZ	.L56
	.stabn	68,0,614,.LM260-.LFBB17
.LM260:
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L57
.L56:
	.stabn	68,0,618,.LM261-.LFBB17
.LM261:
	LD	r5,#1073752456
// inline asm begin
	// 618 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #28
	.stabn	68,0,619,.LM262-.LFBB17
.LM262:
// inline asm end
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L58
	.stabn	68,0,621,.LM263-.LFBB17
.LM263:
	MOV	r5,#0
	JMP	.L59
.L58:
	.stabn	68,0,623,.LM264-.LFBB17
.LM264:
	MOV	r5,#1
.L59:
	.stabn	68,0,624,.LM265-.LFBB17
.LM265:
	MOV	r0,r5
	ADD	sp,#4
	JMP	lr
	.size	CFGL2_Clear_FALLINT_Flag, .-CFGL2_Clear_FALLINT_Flag
	.stabs	"wait_flag:(2,16)",128,0,611,0
	.stabn	192,0,0,.LFBB17-.LFBB17
	.stabn	224,0,0,.Lscope17-.LFBB17
.Lscope17:
	.stabs	"",36,0,0,.Lscope17-.LFBB17
	.stabd	78,0,0
	.section .text$CFGL2_Clear_RISEFALLINT_Flag
	.type	.text$CFGL2_Clear_RISEFALLINT_Flag$scode_local_18, @function
	.text$CFGL2_Clear_RISEFALLINT_Flag$scode_loacal_18:
	.align	1
	.stabs	"CFGL2_Clear_RISEFALLINT_Flag:F(2,7)",36,0,631,CFGL2_Clear_RISEFALLINT_Flag
	.export	CFGL2_Clear_RISEFALLINT_Flag
	.type	CFGL2_Clear_RISEFALLINT_Flag, @function
CFGL2_Clear_RISEFALLINT_Flag:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext18
.Ltext18:
	.stabn	68,0,632,.LM266-.LFBB18
.LM266:
.LFBB18:
	SUB	sp,#4
	.stabn	68,0,633,.LM267-.LFBB18
.LM267:
	MOV	r5,#0
	ST.w	[sp],r5
	.stabn	68,0,635,.LM268-.LFBB18
.LM268:
	LD	r5,#1073752456
// inline asm begin
	// 635 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #28
	.stabn	68,0,636,.LM269-.LFBB18
.LM269:
// inline asm end
	LD	r5,#1073752456
// inline asm begin
	// 636 "../KF32Lib/src/kf32a156_cfgl.c" 1
	CLR [r5], #29
	.stabn	68,0,637,.LM270-.LFBB18
.LM270:
// inline asm end
	JMP	.L61
.L63:
	.stabn	68,0,639,.LM271-.LFBB18
.LM271:
	LD.w	r5,[sp]
	ADD	r5,r5,#1
	ST.w	[sp],r5
.L61:
	.stabn	68,0,637,.LM272-.LFBB18
.LM272:
	LD	r5,#1073752456
	LD.w	r4,[r5+#2]
	MOV	r5,#1
	LSL	r5,#9
	ANL	r5,r4,r5
	LSR	r5,#9
	CMP	r5,#0
	JZ	.L62
	.stabn	68,0,637,.LM273-.LFBB18
.LM273:
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L63
.L62:
	.stabn	68,0,641,.LM274-.LFBB18
.LM274:
	LD	r5,#1073752456
// inline asm begin
	// 641 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #28
	.stabn	68,0,642,.LM275-.LFBB18
.LM275:
// inline asm end
	LD	r5,#1073752456
// inline asm begin
	// 642 "../KF32Lib/src/kf32a156_cfgl.c" 1
	SET [r5], #29
	.stabn	68,0,643,.LM276-.LFBB18
.LM276:
// inline asm end
	LD.w	r5,[sp]
	LD	r4,#65535
	CMP	r5,r4
	JNZ	.L64
	.stabn	68,0,645,.LM277-.LFBB18
.LM277:
	MOV	r5,#0
	JMP	.L65
.L64:
	.stabn	68,0,647,.LM278-.LFBB18
.LM278:
	MOV	r5,#1
.L65:
	.stabn	68,0,648,.LM279-.LFBB18
.LM279:
	MOV	r0,r5
	ADD	sp,#4
	JMP	lr
	.size	CFGL2_Clear_RISEFALLINT_Flag, .-CFGL2_Clear_RISEFALLINT_Flag
	.stabs	"wait_flag:(2,16)",128,0,633,0
	.stabn	192,0,0,.LFBB18-.LFBB18
	.stabn	224,0,0,.Lscope18-.LFBB18
.Lscope18:
	.stabs	"",36,0,0,.Lscope18-.LFBB18
	.stabd	78,0,0
	.section .text$CFGL2_OUT_STATE
	.type	.text$CFGL2_OUT_STATE$scode_local_19, @function
	.text$CFGL2_OUT_STATE$scode_loacal_19:
	.align	1
	.stabs	"CFGL2_OUT_STATE:F(2,4)",36,0,655,CFGL2_OUT_STATE
	.export	CFGL2_OUT_STATE
	.type	CFGL2_OUT_STATE, @function
CFGL2_OUT_STATE:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext19
.Ltext19:
	.stabn	68,0,656,.LM280-.LFBB19
.LM280:
.LFBB19:
	.stabn	68,0,658,.LM281-.LFBB19
.LM281:
	LD	r5,#1073752456
	LD.w	r4,[r5+#2]
	MOV	r5,#2
	ANL	r5,r4,r5
	CMP	r5,#0
	JZ	.L67
	.stabn	68,0,661,.LM282-.LFBB19
.LM282:
	MOV	r5,#1
	JMP	.L68
.L67:
	.stabn	68,0,666,.LM283-.LFBB19
.LM283:
	MOV	r5,#0
.L68:
	.stabn	68,0,668,.LM284-.LFBB19
.LM284:
	MOV	r0,r5
	JMP	lr
	.size	CFGL2_OUT_STATE, .-CFGL2_OUT_STATE
.Lscope19:
	.stabs	"",36,0,0,.Lscope19-.LFBB19
	.stabd	78,0,0
	.section .text$CFGL1_OUT_STATE
	.type	.text$CFGL1_OUT_STATE$scode_local_20, @function
	.text$CFGL1_OUT_STATE$scode_loacal_20:
	.align	1
	.stabs	"CFGL1_OUT_STATE:F(2,4)",36,0,675,CFGL1_OUT_STATE
	.export	CFGL1_OUT_STATE
	.type	CFGL1_OUT_STATE, @function
CFGL1_OUT_STATE:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext20
.Ltext20:
	.stabn	68,0,676,.LM285-.LFBB20
.LM285:
.LFBB20:
	.stabn	68,0,678,.LM286-.LFBB20
.LM286:
	LD	r5,#1073752456
	LD.w	r4,[r5+#2]
	MOV	r5,#1
	ANL	r5,r4,r5
	CMP	r5,#0
	JZ	.L70
	.stabn	68,0,681,.LM287-.LFBB20
.LM287:
	MOV	r5,#1
	JMP	.L71
.L70:
	.stabn	68,0,686,.LM288-.LFBB20
.LM288:
	MOV	r5,#0
.L71:
	.stabn	68,0,688,.LM289-.LFBB20
.LM289:
	MOV	r0,r5
	JMP	lr
	.size	CFGL1_OUT_STATE, .-CFGL1_OUT_STATE
.Lscope20:
	.stabs	"",36,0,0,.Lscope20-.LFBB20
	.stabd	78,0,0
	.section .text$CFGL_Clear_INT_Flag
	.type	.text$CFGL_Clear_INT_Flag$scode_local_21, @function
	.text$CFGL_Clear_INT_Flag$scode_loacal_21:
	.align	1
	.stabs	"CFGL_Clear_INT_Flag:F(0,15)",36,0,695,CFGL_Clear_INT_Flag
	.export	CFGL_Clear_INT_Flag
	.type	CFGL_Clear_INT_Flag, @function
CFGL_Clear_INT_Flag:
	.stabd	46,0,0
	.stabs	"../KF32Lib/src/kf32a156_cfgl.c",132,0,0,.Ltext21
.Ltext21:
	.stabn	68,0,696,.LM290-.LFBB21
.LM290:
.LFBB21:
	PUSH	{r6, lr}
	.stabn	68,0,697,.LM291-.LFBB21
.LM291:
	LD	r6,#1073752456
	LD	r5,#1073752456
	LD.w	r5,[r5+#2]
	MOV	r0,r5
	MOV	r1,#4
	NOT	r1,r1
	MOV	r2,#0
	LD	r5,#SFR_Config
	LJMP	r5
	MOV	r5,r0
	ST.w	[r6+#2],r5
	.stabn	68,0,698,.LM292-.LFBB21
.LM292:
	POP	r6
	POP	lr
	JMP	lr
	.size	CFGL_Clear_INT_Flag, .-CFGL_Clear_INT_Flag
.Lscope21:
	.stabs	"",36,0,0,.Lscope21-.LFBB21
	.stabd	78,0,0
	.text	
	.stabs	"",100,0,0,.Letext0
.Letext0:
	.ident	"GCC: (GNU Tools for KungFu32 Embedded Processors major 4) 4.7.0-Mar 27 2023-12:21:57"