# 1 "../KF32Lib/src/kf32a156_cfgl.c"
# 1 "C:\\WorkSpace32\\blinkled\\Debug//"
# 1 "<command-line>"
# 1 "../KF32Lib/src/kf32a156_cfgl.c"
# 31 "../KF32Lib/src/kf32a156_cfgl.c"
# 1 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_cfgl.h" 1
# 30 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_cfgl.h"
# 1 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h" 1
# 37 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
# 1 "C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stdint.h" 1
# 16 "C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stdint.h"
# 1 "C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stddef.h" 1
# 24 "C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stddef.h"
typedef int ptrdiff_t;





typedef unsigned int size_t;




typedef unsigned short wchar_t;
# 17 "C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stdint.h" 2




typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef short int16_t;
typedef unsigned short uint16_t;
typedef int int32_t;
typedef unsigned int uint32_t;
typedef long long int64_t;
typedef unsigned long long uint64_t;


typedef signed char int_least8_t;
typedef unsigned char uint_least8_t;
typedef short int_least16_t;
typedef unsigned short uint_least16_t;
typedef int int_least32_t;
typedef unsigned int uint_least32_t;
typedef long long int_least64_t;
typedef unsigned long long uint_least64_t;





typedef char int_fast8_t;
typedef unsigned char uint_fast8_t;
typedef short int_fast16_t;
typedef unsigned short uint_fast16_t;
typedef int int_fast32_t;
typedef unsigned int uint_fast32_t;
typedef long long int_fast64_t;
typedef unsigned long long uint_fast64_t;
# 60 "C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stdint.h"
  typedef int intptr_t;
# 69 "C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stdint.h"
  typedef unsigned int uintptr_t;




typedef long long intmax_t;
typedef unsigned long long uintmax_t;
# 38 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h" 2
# 52 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef enum
{
 FALSE = 0,
 TRUE = !FALSE
}FunctionalState;



typedef enum
{
 RESET = 0,
 SET = !RESET
}FlagStatus, INTStatus;


typedef enum
{
 FAILURE = 0,
 SUCCESS = !FAILURE
}RetStatus;


typedef enum
{
 DISABLE = 0,
 ENABLE = !DISABLE
}AbleStatus;




typedef enum
{
    DIR_DOWN = 0,
    DIR_UP = !DIR_DOWN
} DIRStatus;
# 96 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef enum
{
    INT_Initial_SP = 0,
    INT_Reset = 1,
    INT_NMI = 2,
    INT_HardFault = 3,
    INT_Reserved4 = 4,
    INT_StackFault = 5,
    INT_AriFault = 6,
    INT_Reserved7 = 7,
    INT_Reserved8 = 8,
    INT_Reserved9 = 9,
    INT_Reserved10 = 10,
    INT_SVCAll = 11,
    INT_Reserved12 = 12,
    INT_Reserved13 = 13,
    INT_SoftSV = 14,
    INT_SysTick = 15,
    INT_WWDT = 16,
    INT_EINT16 = 17,
    INT_EINT0 = 18,
    INT_EINT1 = 19,
    INT_EINT2 = 20,
    INT_EINT3 = 21,
    INT_EINT4 = 22,
    INT_EINT9TO5 = 23,
    INT_EINT15TO10 = 24,
    INT_T1 = 25,
    INT_T3 = 26,
    INT_T5 = 27,
    INT_T6 = 28,
    INT_QEI0 = 29,
    INT_QEI1 = 30,
    INT_T7 = INT_QEI0,
    INT_T8 = INT_QEI1,
    INT_ECFGL = 31,
    INT_CAN4 = 32,
    INT_T14 = 33,
    INT_RNG = 34,
    INT_FDC2 = 35,
    INT_EXIC = 36,
    INT_ADC0 = 37,
    INT_ADC1 = 38,
    INT_CFGL = 39,
    INT_T11 = 40,
    INT_T0 = 41,
    INT_DMA0 = 42,
    INT_CMP = 43,
    INT_USART0 = 44,
    INT_USART1 = 45,
    INT_SPI0 = 46,
    INT_SPI1 = 47,
    INT_DMA1 = 48,
    INT_EINT19TO17 = 49,
    INT_CANFD6 = 50,
    INT_CANFD7 = 51,
    INT_FDC0 = 52,
    INT_FDC1 = 53,
    INT_EINT31TO20 = 54,
    INT_ECC = 55,
    INT_OSC = 56,
    INT_CLK = INT_OSC,
    INT_I2C0 = 57,
    INT_I2C1 = 58,
    INT_I2C2 = 59,
    INT_T12 = 60,
    INT_T2 = 61,
    INT_T4 = 62,
    INT_T13 = 63,
    INT_USART2 = 64,
    INT_T16 = 65,
    INT_USART4 = 66,
    INT_SPI2 = 67,
    INT_SPI3 = 68,
    INT_ADC2 = 69,
    INT_T18 = 70,
    INT_T19 = 71,
    INT_HRCAP0 = 72,
    INT_WKP0 = 73,
    INT_WKP1 = INT_WKP0,
    INT_WKP2 = INT_WKP0,
    INT_WKP3 = INT_WKP0,
    INT_WKP4 = INT_WKP0,
    INT_HRCAP1 = 74,
    INT_T21 = 75,
    INT_I2C3 = 76,
    INT_USART5 = 77,
    INT_HRCAP2 = 78,
    INT_USART7 = 79
}InterruptIndex;
# 198 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct GPIO_MenMap
{
 volatile const uint32_t PIR;
 volatile uint32_t POR;
 volatile uint32_t PUR;
 volatile uint32_t PDR;
 volatile uint32_t PODR;
 volatile uint32_t PMOD;
 volatile uint32_t OMOD;
 volatile uint32_t LOCK;
 volatile uint32_t RMP[2];
 volatile uint32_t RESERVED[3];
 volatile uint32_t RMP_MSB;
}GPIO_SFRmap;
# 912 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct IONMI_MenMap
{
 volatile uint32_t RESERVED[15];
 volatile uint32_t CTLR;
}IONMI_SFRmap;
# 970 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct OSC_MemMap
{
    volatile uint32_t CTL0;
    volatile uint32_t CTL1;
    volatile uint32_t INT;
    volatile uint32_t CTL2;
    volatile uint32_t HFOSCCAL0;
    volatile uint32_t HFOSCCAL1;
}OSC_SFRmap;


typedef struct PLL_MenMap
{
 volatile uint32_t CTL;
}PLL_SFRmap;
# 1293 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct INT_MemMap
{
    volatile uint32_t CTL0;
    volatile uint32_t EIE0;
             uint32_t RESERVED1;
    volatile uint32_t EIE1;
             uint32_t RESERVED2;
    volatile uint32_t EIE2;
       uint32_t RESERVED3;
    volatile uint32_t EIF0;
             uint32_t RESERVED4;
    volatile uint32_t EIF1;
             uint32_t RESERVED5;
    volatile uint32_t EIF2;
             uint32_t RESERVED6;
    volatile uint32_t IP0;
    volatile uint32_t IP1;
    volatile uint32_t IP2;
    volatile uint32_t IP3;
    volatile uint32_t IP4;
    volatile uint32_t IP5;
    volatile uint32_t IP6;
    volatile uint32_t IP7;
    volatile uint32_t IP8;
    volatile uint32_t IP9;
    volatile uint32_t IP10;
    volatile uint32_t IP11;
    volatile uint32_t IP12;
    volatile uint32_t IP13;
    volatile uint32_t IP14;
    volatile uint32_t IP15;
    volatile uint32_t IP16;
    volatile uint32_t IP17;
    volatile uint32_t IP18;
    volatile uint32_t EINTMASK;
    volatile uint32_t EINTRISE;
    volatile uint32_t EINTFALL;
    volatile uint32_t EINTF;
    volatile uint32_t EINTLVL;
    volatile uint32_t EINTSS0;
    volatile uint32_t EINTSS1;
    volatile uint32_t CTL1;
}INT_SFRmap;
# 2733 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct SYSCTL_MemMap {
    volatile uint32_t PSW;
    volatile uint32_t MCTL;
    volatile uint32_t ARCTL;
    volatile uint32_t VECTOFF;
       uint32_t RESEVRVE1;
    volatile uint32_t RAMSPA;
    volatile uint32_t MEMCTL;
    volatile uint32_t MSPSPA;
    volatile uint32_t PSPSPA;
}SYSCTL_SFRmap;
# 2888 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct DMA_MenMap
{
 union
 {
  struct
  {
            volatile uint32_t CTLR1;
            volatile uint32_t CTLR2;
            volatile uint32_t CTLR3;
            volatile uint32_t CTLR4;
            volatile uint32_t CTLR5;
            volatile uint32_t CTLR6;
            volatile uint32_t CTLR7;
  };
  volatile uint32_t CTLR[7];
 };
 uint32_t RESERVED1;

    union
    {
        struct
        {
            volatile uint32_t PADDR1;
            volatile uint32_t PADDR2;
            volatile uint32_t PADDR3;
            volatile uint32_t PADDR4;
            volatile uint32_t PADDR5;
            volatile uint32_t PADDR6;
            volatile uint32_t PADDR7;
        };
        volatile uint32_t PADDR[7];
    };
    uint32_t RESERVED2;

    union
    {
        struct
        {
            volatile uint32_t MADDR1;
            volatile uint32_t MADDR2;
            volatile uint32_t MADDR3;
            volatile uint32_t MADDR4;
            volatile uint32_t MADDR5;
            volatile uint32_t MADDR6;
            volatile uint32_t MADDR7;
        };
        volatile uint32_t MADDR[7];
    };
    uint32_t RESERVED3;

    union
    {
        struct
        {
            volatile const uint32_t CPAR1;
            volatile const uint32_t CPAR2;
            volatile const uint32_t CPAR3;
            volatile const uint32_t CPAR4;
            volatile const uint32_t CPAR5;
            volatile const uint32_t CPAR6;
            volatile const uint32_t CPAR7;
        };
        volatile const uint32_t CPAR[7];
    };
    uint32_t RESERVED4;

    union
    {
        struct
        {
            volatile const uint32_t CMAR1;
            volatile const uint32_t CMAR2;
            volatile const uint32_t CMAR3;
            volatile const uint32_t CMAR4;
            volatile const uint32_t CMAR5;
            volatile const uint32_t CMAR6;
            volatile const uint32_t CMAR7;
        };
        volatile const uint32_t CMAR[7];
    };
    uint32_t RESERVED5;

    union
    {
        struct
        {
            volatile const uint32_t NCT1;
            volatile const uint32_t NCT2;
            volatile const uint32_t NCT3;
            volatile const uint32_t NCT4;
            volatile const uint32_t NCT5;
            volatile const uint32_t NCT6;
            volatile const uint32_t NCT7;
        };
        volatile const uint32_t NCT[7];
    };
    uint32_t RESERVED6;

    volatile uint32_t LIFR;
    volatile uint32_t LIER;
    volatile uint32_t REMAP;
}DMA_SFRmap;
# 3560 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct SYSTICK_MemMap
{
    volatile uint32_t CTL;
    volatile uint32_t RELOAD;
    volatile uint32_t CV;
    volatile uint32_t CALI;
}SYSTICK_SFRmap;
# 3618 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct BTIM_MemMap
{
    volatile uint32_t CNT;
    volatile uint32_t CTL1;
    volatile uint32_t CTL2;
    volatile uint32_t PRSC;
    volatile uint32_t PPX;
    volatile uint32_t DIER;
    volatile const uint32_t SR;
    volatile uint32_t SRIC;
}BTIM_SFRmap;
# 3794 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct GPTIM_MemMap
{
    volatile uint32_t CNT;
    volatile uint32_t CTL1;
    volatile uint32_t CTL2;
    volatile uint32_t PRSC;
    volatile uint32_t PPX;
    volatile uint32_t UDTIM;
                   uint32_t RESERVED1[2];
    volatile const uint32_t CCPXC1;
    volatile const uint32_t CCPXC2;
    volatile const uint32_t CCPXC3;
    volatile const uint32_t CCPXC4;
    volatile uint32_t CCPXSRIC;
    volatile const uint32_t CCPXDF;
                   uint32_t RESERVED2[2];
    volatile uint32_t CCPXCTL1;
    volatile uint32_t CCPXR1;
    volatile uint32_t CCPXR2;
    volatile uint32_t CCPXR3;
    volatile uint32_t CCPXR4;
    volatile uint32_t CCPXCTL2;
    volatile uint32_t CCPXCTL3;
    volatile uint32_t CCPXEGIF;
}GPTIM_SFRmap, CCP_SFRmap;
# 4271 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct ATIM_MemMap
{
    volatile uint32_t TXCNT;
    volatile uint32_t TZCNT;
    volatile uint32_t TXPPX;
    volatile uint32_t TZPPZ;
    volatile uint32_t TXPRSC;
    volatile uint32_t TZPRSC;
    volatile uint32_t TXCCR0;
    volatile uint32_t TXCCR1;
    volatile uint32_t TZCCR0;
    volatile uint32_t TXCTL;
    volatile uint32_t TZCTL;
    volatile uint32_t PXPDCTL;
    volatile uint32_t PXASCTL;
    volatile uint32_t TXCCTCTL;
    volatile uint32_t TZCCTCTL;
          uint32_t RESERVED0;
    volatile uint32_t COMH1;
    volatile uint32_t COML1;
    volatile uint32_t FAUCTL1;
    volatile uint32_t DITCTL;
    volatile uint32_t COMH2;
    volatile uint32_t COML2;
    volatile uint32_t FAUCTL2;
    volatile uint32_t CCRCTL;
    volatile uint32_t COMH3;
    volatile uint32_t COML3;
    volatile uint32_t FAUCTL3;
          uint32_t RESERVED1;
    volatile uint32_t COMH4;
    volatile uint32_t COML4;
    volatile uint32_t FAUCTL4;
          uint32_t RESERVED2;
    volatile uint32_t ECCPXCTL1;
    volatile uint32_t ECCPXR1;
    volatile uint32_t ECCPXR2;
    volatile uint32_t ECCPXR3;
    volatile uint32_t ECCPXR4;
    volatile uint32_t PXUDCTL;
    volatile uint32_t ECCPXCTL2;
    volatile uint32_t PXDTCTL;
    volatile uint32_t PWMXOC;
    volatile uint32_t PXATRCTL;
    volatile uint32_t PXASCTL0;
    volatile uint32_t PXASCTL1;
    volatile uint32_t ZPDCTL0;
    volatile uint32_t ZPDCTL1;
    volatile uint32_t ZPDPORT;
    volatile uint32_t ECCPXIE;
    volatile uint32_t ECCPXEGIF;
    volatile uint32_t TXUDTIM;
    volatile uint32_t TZUDTIM;
    volatile const uint32_t ECCPXDF;
    volatile const uint32_t ECCPXC1;
    volatile const uint32_t ECCPXC2;
    volatile const uint32_t ECCPXC3;
    volatile const uint32_t ECCPXC4;
                   uint32_t RESERVED3;
    volatile uint32_t ECCPXDE;
    volatile uint32_t ECCPXSRIC;
    volatile uint32_t ECCPXCTL3;
}ATIM_SFRmap, ECCP_SFRmap;
# 5146 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct EPWM_MemMap
{
 volatile uint32_t CNT;
 volatile uint32_t PHS;
 volatile uint32_t PPX;
 volatile uint32_t PRSC;
 volatile uint32_t CTL;
 volatile uint32_t RA;
 volatile uint32_t RB;
 volatile uint32_t CTLA;
 volatile uint32_t CTLB;
 volatile uint32_t DBCTL;
 volatile uint32_t DBT;
 volatile uint32_t PCCTL;
 volatile uint32_t PXASCTL;
 volatile uint32_t ETCTL;
 volatile uint32_t IE;
 volatile const uint32_t IF;
 volatile uint32_t IC;
 volatile uint32_t DE;
 volatile const uint32_t DF;
       uint32_t RESERVED0;
 volatile uint32_t HRPWMCTL;
 volatile uint32_t HRCMP;
 volatile const uint32_t CAP;
 volatile uint32_t RC;
 volatile uint32_t RD;
 volatile uint32_t UDCTL;
}EPWM_SFRmap;
# 5804 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct HRCAP_MenMap
{
 volatile uint32_t CTL;
 volatile const uint32_t COUNTER;
 volatile const uint32_t RISE[2];
 volatile const uint32_t FALL[2];
 volatile const uint32_t HRRISE[2];
 volatile const uint32_t HRFALL[2];
 volatile const uint32_t SR;
 volatile uint32_t SRIC;
 volatile uint32_t IFRC;
}HRCAP_SFRmap;
# 5964 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct QEI_MenMap
{
    volatile uint32_t CTL0;
    volatile uint32_t CTL1;
    volatile uint32_t CNT;
    volatile uint32_t PPX;
    volatile uint32_t PRSC;
    volatile uint32_t DIER;
}QEI_SFRmap;
# 6083 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct ADC_MemMap {
    volatile uint32_t CTL0;
    volatile uint32_t CTL1;
    volatile uint32_t SCANSQ0;
    volatile uint32_t SCANSQ1;
    volatile uint32_t SCANSQ2;
    volatile uint32_t HSCANSQ;
    volatile uint32_t WDH;
    volatile uint32_t WDL;
    volatile const uint32_t DATA;
    volatile const uint32_t HPDATA0;
    volatile const uint32_t HPDATA1;
    volatile const uint32_t HPDATA2;
    volatile const uint32_t HPDATA3;
    volatile uint32_t HPDOFF0;
    volatile uint32_t HPDOFF1;
    volatile uint32_t HPDOFF2;
    volatile uint32_t HPDOFF3;
    volatile uint32_t SCANSQ3;
                   uint32_t RESERVED[2];
    volatile uint32_t STATE;
    volatile uint32_t DELAY;
    volatile uint32_t SCANCTL;
}ADC_SFRmap;
# 6788 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct DAC_MemMap
{
    volatile uint32_t CTL;
    volatile uint32_t DAHD;
    volatile const uint32_t DATA;
    volatile uint32_t CTL1;
                   uint32_t RESERVED;
    volatile uint32_t CAL;
}DAC_SFRmap;
# 6955 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct CMP_MemMap
{
    volatile uint32_t CTL0;
    volatile uint32_t CTL1;
    volatile uint32_t CTL2;
    volatile uint32_t CTL3;
    volatile uint32_t CTL4;
    volatile uint32_t CTL5;
    volatile uint32_t TRIM0;
    volatile uint32_t TRIM1;
    volatile uint32_t TRIM2;
    volatile uint32_t TRIM3;
}CMP_SFRmap;
# 7388 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct OP_MemMap
{
 volatile uint32_t CTL0;
 volatile uint32_t CTL1;
 volatile uint32_t TRIM0;
 volatile uint32_t TRIM1;
 volatile uint32_t TRIM2;
 volatile uint32_t TRIM3;
}OP_SFRmap;
# 7683 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct USART_MemMap
{
    volatile uint32_t CTLR;
    volatile uint32_t BRGR;
    volatile uint32_t STR;
    union
    {
        volatile uint32_t TBUFR;
        volatile const uint32_t RBUFR;
    };
    volatile uint32_t U7816R;
    volatile uint32_t IER;
    volatile uint32_t ADM;
}USART_SFRmap;
# 8031 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct SPI_MemMap
{
    volatile uint32_t BRGR;
    volatile uint32_t CTLR;
    volatile uint32_t BUFR;
    volatile uint32_t STR;
}SPI_SFRmap;
# 8190 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct I2C_MemMap
{
    volatile uint32_t CTLR;
    volatile uint32_t SR;
    volatile uint32_t BUFR;
    volatile uint32_t ADDR0;
    volatile uint32_t BRGR;
    volatile uint32_t ADDR1;
    volatile uint32_t ADDR2;
    volatile uint32_t ADDR3;
    volatile uint32_t IER;
}I2C_SFRmap;
# 8452 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef union
{
 struct
 {
  struct
  {
   volatile uint32_t DLC :4;
   volatile uint32_t RESERVED0:2;
   volatile uint32_t RTR :1;
   volatile uint32_t IDE :1;
   volatile uint32_t RESERVED1:24;

  }TXINFR;
  struct
  {
   volatile uint32_t DATA1:8;
   volatile uint32_t DATA0:8;
   volatile uint32_t RESERVED0:5;
   volatile uint32_t ID:11;
  }TXDATA0;
  struct
  {
   volatile uint32_t DATA5:8;
   volatile uint32_t DATA4:8;
   volatile uint32_t DATA3:8;
   volatile uint32_t DATA2:8;
  }TXDATA1;
  struct
  {
   volatile uint32_t RESERVED0:8;
   volatile uint32_t RESERVED1:8;
   volatile uint32_t DATA7:8;
   volatile uint32_t DATA6:8;
  }TXDATA2;
 }SFF;
 struct
 {
  struct
  {
   volatile uint32_t DLC:4;
   volatile uint32_t RESERVED0:2;
   volatile uint32_t RTR:1;
   volatile uint32_t IDE:1;
   volatile uint32_t RESERVED1:24;
  }TXINFR;
  struct
  {
   volatile uint32_t RESERVED:3;
   volatile uint32_t ID:29;
  }TXDATA0;
  struct
  {
   volatile uint32_t DATA3:8;
   volatile uint32_t DATA2:8;
   volatile uint32_t DATA1:8;
   volatile uint32_t DATA0:8;
  }TXDATA1;
  struct
  {
   volatile uint32_t DATA7:8;
   volatile uint32_t DATA6:8;
   volatile uint32_t DATA5:8;
   volatile uint32_t DATA4:8;
  }TXDATA2;
 }EFF;
}CanTxBufferTypeDef;



typedef struct CAN_MemMap
{
    volatile uint32_t CTLR;
    volatile uint32_t BRGR;
    volatile uint32_t RCR;
    volatile uint32_t EROR;
    volatile uint32_t ACRR;
    volatile uint32_t MSKR;
    volatile uint32_t IER;
    volatile uint32_t IFR;
    union
    {
     struct
     {
         volatile uint32_t INFR;
         volatile uint32_t TX0R;
         volatile uint32_t TX1R;
         volatile uint32_t TX2R;
     };
     CanTxBufferTypeDef CanTxBuffer;
    };
 volatile uint32_t RXDATA0;
 volatile uint32_t RXDATA1;
 volatile uint32_t RXDATA2;
 volatile uint32_t RXDATA3;

}CAN_SFRmap;

typedef struct CAN_FILTER_Map
{
    volatile uint32_t ACR1R;
    volatile uint32_t MSK1R;
    volatile uint32_t ACR2R;
    volatile uint32_t MSK2R;
    volatile uint32_t ACR3R;
    volatile uint32_t MSK3R;
    volatile uint32_t ACR4R;
    volatile uint32_t MSK4R;
    volatile uint32_t ACR5R;
    volatile uint32_t MSK5R;
    volatile uint32_t ACR6R;
    volatile uint32_t MSK6R;
    volatile uint32_t ACR7R;
    volatile uint32_t MSK7R;
    volatile uint32_t ACR8R;
    volatile uint32_t MSK8R;
}CAN_FILTER_SFRmap;
# 9689 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct CANFD_MenMap
{
 volatile uint32_t CTLR0;
 volatile uint32_t BRGR;
 volatile const uint32_t RCR;
 volatile uint32_t EROR;
 volatile uint32_t NOUSE1;
 volatile uint32_t MSKR;
 volatile uint32_t IER;
 volatile uint32_t IFR;
 volatile const uint32_t RX_SET1;
 union
 {
  struct
  {
   uint8_t RX_SET2_1;
   uint8_t RX_SET2_2;
   uint16_t RX_SET2_34;
  };
  struct
  {
   uint32_t RX_SET2;
  };

 };
 union
 {
  volatile const uint8_t RXDATA[64];
  volatile const uint32_t RXDATA_32[16];
 };
 volatile uint32_t TIMER;
 volatile const uint32_t CRC;
 volatile uint32_t NOUSE2;
 volatile uint32_t CTLR1;
 volatile const uint32_t AMSTA;

}CANFD_SFRMap;
# 10231 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct EXIC_MemMap
{
    volatile uint32_t CTL0;
    volatile uint32_t CTL1;
    volatile uint32_t STATE;
       uint32_t RESERVED1;
    volatile uint32_t WRITEBUF;
    volatile uint32_t READBUF;

}EXIC_SFRmap;
# 10325 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct RTC_MemMap
{
    volatile uint32_t CR;
    volatile uint32_t ALRA;
    volatile uint32_t TMR;
    volatile uint32_t DTR;
    volatile uint32_t ALRB;
    volatile uint32_t TMER;
    volatile uint32_t TCR;
    volatile uint32_t IER;
    volatile uint32_t IFR;
    volatile uint32_t TMBR;
    volatile uint32_t DTBR;
}RTC_SFRmap;
# 10861 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct IWDT_MemMap
{
    volatile uint32_t CTL;
    volatile uint32_t FD;
}IWDT_SFRmap;
# 10910 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct WWDT_MemMap
{
    volatile uint32_t CTL;
    volatile uint32_t CNT;
    volatile uint32_t CTL1;
}WWDT_SFRmap;
# 10989 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct EWDT_MenMap
{
 volatile uint32_t CTL;
 volatile uint32_t CNT;
}EWDT_SFRmap;
# 11075 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct CFGL_MemMap
{
    volatile uint32_t CTL0;
    volatile uint32_t CTL1;
    volatile uint32_t IFR;
}CFGL_SFRmap;
# 11262 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct ECFGL_MenMap
{
 union
 {
  struct
  {
   volatile uint32_t ECFGL0_CTL;
   volatile uint32_t ECFGL1_CTL;
   volatile uint32_t ECFGL2_CTL;
   volatile uint32_t ECFGL3_CTL;
   volatile uint32_t ECFGL4_CTL;
   volatile uint32_t ECFGL5_CTL;
   volatile uint32_t ECFGL6_CTL;
   volatile uint32_t ECFGL7_CTL;
   volatile uint32_t ECFGL8_CTL;
   volatile uint32_t ECFGL9_CTL;
   volatile uint32_t ECFGL10_CTL;
   volatile uint32_t ECFGL11_CTL;
   volatile uint32_t ECFGL12_CTL;
   volatile uint32_t ECFGL13_CTL;
   volatile uint32_t ECFGL14_CTL;
   volatile uint32_t ECFGL15_CTL;
  };
  volatile uint32_t ECFGL_CTL[16];
 };
 volatile uint32_t SOFTSEL;
 volatile uint32_t FCLK;
 volatile uint32_t IC;
 volatile uint32_t IF;
 volatile uint32_t RFCTL;
 volatile uint32_t FFCTL;
 volatile uint32_t ADC;
 volatile const uint32_t OUT;
}ECFGL_SFRmap;
# 11609 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct RST_MemMap
{
    volatile uint32_t CTL0;
    volatile uint32_t CTL1;
    volatile uint32_t CTL2;
    volatile uint32_t CTL3;
}RST_SFRmap;
# 11791 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct PCLK_MemMap
{
    volatile uint32_t CTL0;
    volatile uint32_t CTL1;
    volatile uint32_t CTL2;
    volatile uint32_t CTL3;
}PCLK_SFRmap;
# 11973 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct PM_MemMap {
    volatile uint32_t CTL0;
    volatile uint32_t CTL1;
    volatile const uint32_t STA0;
    volatile const uint32_t STA1;
    volatile uint32_t STAC;
    volatile uint32_t CTL2;
    volatile uint32_t CAL0;
    volatile uint32_t CAL1;
    volatile uint32_t CAL2;
}PM_SFRmap;
# 12451 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct BKP_MemMap
{
    volatile uint32_t CTL;
    volatile uint32_t INT;
             uint32_t RESERVED[14];
    volatile uint32_t DATA[8];
}BKP_SFRmap;
# 12537 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct FLASH_MemMap
{
    volatile uint32_t ISPCON0;
    volatile uint32_t ISPCON1;
    volatile uint32_t ISPCMD;
    volatile uint32_t ISPTRG;
             uint32_t RESERVED1;
    volatile uint32_t CFG;
             uint32_t RESERVED2;
    volatile uint32_t ISPADDR;
    volatile uint32_t STATE;
             uint32_t RESERVED3;
    volatile uint32_t NVMUNLOCK;
    volatile uint32_t PROUNLOCK;
    volatile uint32_t CFGUNLOCK;
             uint32_t RESERVED4;
    volatile uint32_t CSSTART;
    volatile uint32_t CSSTOP;
    volatile uint32_t CSRES[4];
}FLASH_SFRmap;
# 12738 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct CRC_MemMap
{
 volatile uint32_t CTL;
 volatile uint32_t DATA;
 volatile const uint32_t RSLT;
 volatile uint32_t INIT;
 volatile uint32_t PLN;
 volatile uint32_t RXOR;
 volatile uint32_t IDATA;
 volatile const uint32_t TEMP;

}CRC_SFRmap;
# 12800 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct AES_MenMap
{
 volatile uint32_t CTL;
 volatile uint32_t INT;
       uint32_t RESERVED1;
       uint32_t RESERVED2;
 volatile uint32_t INPUT0;
 volatile uint32_t INPUT1;
 volatile uint32_t INPUT2;
 volatile uint32_t INPUT3;
 volatile const uint32_t OUTPUT0;
 volatile const uint32_t OUTPUT1;
 volatile const uint32_t OUTPUT2;
 volatile const uint32_t OUTPUT3;
}AES_SFRmap;
# 12908 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct RNG_MenMap
{
 volatile uint32_t CTL;
 volatile uint32_t STATE;
 volatile const uint32_t SEED;
 volatile const uint32_t DR;
}RNG_SFRmap;
# 13011 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct FlexMUX_MenMap
{
 volatile uint32_t SOU;
 volatile uint32_t TAR;
}FlexMUX_SFRmap;
# 13166 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct FDC_MenMap
{
 volatile uint32_t CTL;
 volatile uint32_t MOD;
 volatile const uint32_t CNT;
 volatile uint32_t IDLY;
 volatile uint32_t CH0CTL;
 volatile uint32_t CH1CTL;
 volatile uint32_t CH2CTL;
 volatile uint32_t CH3CTL;
       uint32_t RESERVED[4];
 volatile uint32_t CH0DLY0;
 volatile uint32_t CH0DLY1;
 volatile uint32_t CH0DLY2;
       uint32_t RESERVED5;
 volatile uint32_t CH1DLY0;
 volatile uint32_t CH1DLY1;
 volatile uint32_t CH1DLY2;
       uint32_t RESERVED6;
 volatile uint32_t CH2DLY0;
 volatile uint32_t CH2DLY1;
 volatile uint32_t CH2DLY2;
       uint32_t RESERVED7;
 volatile uint32_t CH3DLY0;
 volatile uint32_t CH3DLY1;
 volatile uint32_t CH3DLY2;
       uint32_t RESERVED8;
 volatile uint32_t PO0DLY;
 volatile uint32_t PO1DLY;
 volatile uint32_t PO2DLY;
 volatile uint32_t PO3DLY;
}FDC_SFRmap;
# 13667 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct FlexRM_MenMap
{
 volatile uint32_t CTL;
 volatile uint32_t GPSR0;
 volatile uint32_t GPSR1;
 volatile uint32_t GCSR0;
 volatile uint32_t GCSR1;
 volatile uint32_t GCSR2;
}FlexRM_SFRmap;
# 14090 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
typedef struct CACHE_MenMap
{
 volatile uint32_t CTLR;
}CACHE_SFRmap;
# 14155 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h"
static inline uint32_t
SFR_Config (uint32_t SfrMem, uint32_t SfrMask, uint32_t WriteVal)
{
    return ((SfrMem & SfrMask) | (WriteVal));
}
# 31 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_cfgl.h" 2
# 41 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_cfgl.h"
typedef struct
{
 uint32_t m_Module_EN;

 uint32_t m_Output_EN;

 uint32_t m_RaiseINT_EN;

 uint32_t m_FallINT_EN;

 uint32_t m_Mode_Sel;

 uint32_t m_Output_Pol;

 uint32_t m_G4Output_POL;

 uint32_t m_G3Output_POL;

 uint32_t m_G2Output_POL;

 uint32_t m_G1Output_POL;

 uint32_t m_G4Input_Sel;

 uint32_t m_G3Input_Sel;

 uint32_t m_G2Input_Sel;

 uint32_t m_G1Input_Sel;

 uint32_t m_CH4Data_Sel;

 uint32_t m_CH5CH6Data_Sel;

 FunctionalState m_G4D4_Inphase_EN;

 FunctionalState m_G4D4_Inverse_EN;

 FunctionalState m_G4D3_Inphase_EN;

 FunctionalState m_G4D3_Inverse_EN;

 FunctionalState m_G4D2_Inphase_EN;

 FunctionalState m_G4D2_Inverse_EN;

 FunctionalState m_G4D1_Inphase_EN;

 FunctionalState m_G4D1_Inverse_EN;

 FunctionalState m_G3D4_Inphase_EN;

 FunctionalState m_G3D4_Inverse_EN;

 FunctionalState m_G3D3_Inphase_EN;

 FunctionalState m_G3D3_Inverse_EN;

 FunctionalState m_G3D2_Inphase_EN;

 FunctionalState m_G3D2_Inverse_EN;

 FunctionalState m_G3D1_Inphase_EN;

 FunctionalState m_G3D1_Inverse_EN;

 FunctionalState m_G2D4_Inphase_EN;

 FunctionalState m_G2D4_Inverse_EN;

 FunctionalState m_G2D3_Inphase_EN;

 FunctionalState m_G2D3_Inverse_EN;

 FunctionalState m_G2D2_Inphase_EN;

 FunctionalState m_G2D2_Inverse_EN;

 FunctionalState m_G2D1_Inphase_EN;

 FunctionalState m_G2D1_Inverse_EN;

 FunctionalState m_G1D4_Inphase_EN;

 FunctionalState m_G1D4_Inverse_EN;

 FunctionalState m_G1D3_Inphase_EN;

 FunctionalState m_G1D3_Inverse_EN;

 FunctionalState m_G1D2_Inphase_EN;

 FunctionalState m_G1D2_Inverse_EN;

 FunctionalState m_G1D1_Inphase_EN;

 FunctionalState m_G1D1_Inverse_EN;

} CFGL_InitTypeDef;
# 354 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_cfgl.h"
FlagStatus CFGL1_OUT_STATE (void);
FlagStatus CFGL2_OUT_STATE (void);
FlagStatus CFGL2_Get_INT_Flag (void);
FlagStatus CFGL1_Get_INT_Flag (void);
void CFGL1_FALLINT_Enable (FunctionalState NewState);
void CFGL1_RISEINT_Enable (FunctionalState NewState);
void CFGL2_FALLINT_Enable (FunctionalState NewState);
void CFGL2_RISEINT_Enable (FunctionalState NewState);
void CFGL1_OUT_SYNCHRO_Enable (FunctionalState NewState);
void CFGL2_OUT_SYNCHRO_Enable (FunctionalState NewState);
void CFGL_Configuration (CFGL_SFRmap* CFGLx, CFGL_InitTypeDef* CFGLInitStruct);
void CFGL_Reset (void);
RetStatus CFGL1_Clear_RISEINT_Flag (void);
RetStatus CFGL1_Clear_FALLINT_Flag (void);
RetStatus CFGL1_Clear_RISEFALLINT_Flag (void);
RetStatus CFGL2_Clear_RISEINT_Flag (void);
RetStatus CFGL2_Clear_FALLINT_Flag (void);
RetStatus CFGL2_Clear_RISEFALLINT_Flag (void);
void CFGL_Struct_Init (CFGL_InitTypeDef* CFGLInitStruct);
void CFGL_Clear_INT_Flag(void);
# 32 "../KF32Lib/src/kf32a156_cfgl.c" 2
# 1 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_rst.h" 1
# 59 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_rst.h"
void RST_CTL0_Peripheral_Reset_Enable(uint32_t RST_CTL0Periph,
                    FunctionalState NewState);
void RST_CTL1_Peripheral_Reset_Enable(uint32_t RST_CTL1Periph,
                    FunctionalState NewState);
void RST_CTL2_Peripheral_Reset_Enable(uint32_t RST_CTL2Periph,
                    FunctionalState NewState);
void RST_CTL3_Peripheral_Reset_Enable(uint32_t RST_CTL3Periph,
                    FunctionalState NewState);
# 33 "../KF32Lib/src/kf32a156_cfgl.c" 2
# 1 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_pclk.h" 1
# 58 "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_pclk.h"
void PCLK_CTL0_Peripheral_Clock_Enable (uint32_t PCLK_CTL0_bit,FunctionalState NewState);
void PCLK_CTL1_Peripheral_Clock_Enable (uint32_t PCLK_CTL1_bit,FunctionalState NewState);
void PCLK_CTL2_Peripheral_Clock_Enable (uint32_t PCLK_CTL2_bit,FunctionalState NewState);
void PCLK_CTL3_Peripheral_Clock_Enable (uint32_t PCLK_CTL3_bit,FunctionalState NewState);
# 34 "../KF32Lib/src/kf32a156_cfgl.c" 2
# 67 "../KF32Lib/src/kf32a156_cfgl.c"
void CFGL_Reset (void)
{

 RST_CTL3_Peripheral_Reset_Enable(((uint32_t)1<<((19))), TRUE);
 RST_CTL3_Peripheral_Reset_Enable(((uint32_t)1<<((19))), FALSE);
 PCLK_CTL3_Peripheral_Clock_Enable(((uint32_t)1<<((19))), TRUE);

}







void CFGL_Configuration (CFGL_SFRmap* CFGLx, CFGL_InitTypeDef* CFGLInitStruct)
{
    uint32_t tmpreg;


    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
    ((void)0);
# 122 "../KF32Lib/src/kf32a156_cfgl.c"
    tmpreg = (uint32_t)(CFGLInitStruct->m_Module_EN |
                        CFGLInitStruct->m_Output_EN |
                        CFGLInitStruct->m_RaiseINT_EN |
                        CFGLInitStruct->m_FallINT_EN |
                        CFGLInitStruct->m_Mode_Sel |
                        CFGLInitStruct->m_Output_Pol |
                        CFGLInitStruct->m_G4Output_POL |
                        CFGLInitStruct->m_G3Output_POL |
                        CFGLInitStruct->m_G2Output_POL |
                        CFGLInitStruct->m_G1Output_POL |
                        CFGLInitStruct->m_G4Input_Sel |
                        CFGLInitStruct->m_G3Input_Sel |
                        CFGLInitStruct->m_G2Input_Sel |
                        CFGLInitStruct->m_G1Input_Sel |
                        CFGLInitStruct->m_CH4Data_Sel |
                        CFGLInitStruct->m_CH5CH6Data_Sel);
    CFGLx->CTL0 = SFR_Config (CFGLx->CTL0, ~(((uint32_t)1<<((31))) | ((uint32_t)1<<((30))) | ((uint32_t)1<<((29))) | ((uint32_t)1<<((28))) | ((uint32_t)7<<((25))) | ((uint32_t)1<<((24))) | ((uint32_t)1<<((23))) | ((uint32_t)1<<((22))) | ((uint32_t)1<<((21))) | ((uint32_t)1<<((20))) | ((uint32_t)7<<((16))) | ((uint32_t)7<<((12))) | ((uint32_t)7<<((8))) | ((uint32_t)7<<((4))) | ((uint32_t)1<<((3))) | ((uint32_t)7<<((0)))), tmpreg);
# 173 "../KF32Lib/src/kf32a156_cfgl.c"
    tmpreg = (uint32_t)((CFGLInitStruct->m_G4D4_Inphase_EN << (31)) |
         (CFGLInitStruct->m_G4D4_Inverse_EN << (30)) |
         (CFGLInitStruct->m_G4D3_Inphase_EN << (29)) |
         (CFGLInitStruct->m_G4D3_Inverse_EN << (28)) |
         (CFGLInitStruct->m_G4D2_Inphase_EN << (27)) |
         (CFGLInitStruct->m_G4D2_Inverse_EN << (26)) |
         (CFGLInitStruct->m_G4D1_Inphase_EN << (25)) |
         (CFGLInitStruct->m_G4D1_Inverse_EN << (24)) |
         (CFGLInitStruct->m_G3D4_Inphase_EN << (23)) |
      (CFGLInitStruct->m_G3D4_Inverse_EN << (22)) |
      (CFGLInitStruct->m_G3D3_Inphase_EN << (21)) |
      (CFGLInitStruct->m_G3D3_Inverse_EN << (20)) |
      (CFGLInitStruct->m_G3D2_Inphase_EN << (19)) |
      (CFGLInitStruct->m_G3D2_Inverse_EN << (18)) |
      (CFGLInitStruct->m_G3D1_Inphase_EN << (17)) |
      (CFGLInitStruct->m_G3D1_Inverse_EN << (16)) |
         (CFGLInitStruct->m_G2D4_Inphase_EN << (15)) |
      (CFGLInitStruct->m_G2D4_Inverse_EN << (14)) |
      (CFGLInitStruct->m_G2D3_Inphase_EN << (13)) |
      (CFGLInitStruct->m_G2D3_Inverse_EN << (12)) |
      (CFGLInitStruct->m_G2D2_Inphase_EN << (11)) |
      (CFGLInitStruct->m_G2D2_Inverse_EN << (10)) |
      (CFGLInitStruct->m_G2D1_Inphase_EN << (9)) |
      (CFGLInitStruct->m_G2D1_Inverse_EN << (8)) |
         (CFGLInitStruct->m_G1D4_Inphase_EN << (7)) |
      (CFGLInitStruct->m_G1D4_Inverse_EN << (6)) |
      (CFGLInitStruct->m_G1D3_Inphase_EN << (5)) |
      (CFGLInitStruct->m_G1D3_Inverse_EN << (4)) |
      (CFGLInitStruct->m_G1D2_Inphase_EN << (3)) |
      (CFGLInitStruct->m_G1D2_Inverse_EN << (2)) |
      (CFGLInitStruct->m_G1D1_Inphase_EN << (1)) |
      (CFGLInitStruct->m_G1D1_Inverse_EN << (0)));
    CFGLx->CTL1 = SFR_Config (CFGLx->CTL1, ~0XFFFFFFFF, tmpreg);

}






void CFGL_Struct_Init (CFGL_InitTypeDef* CFGLInitStruct)
{

 CFGLInitStruct->m_Module_EN = ((uint32_t) 0x0 << (31));

    CFGLInitStruct->m_Output_EN = ((uint32_t) 0x0 << (30));

    CFGLInitStruct->m_RaiseINT_EN = ((uint32_t) 0x0 << (29));

    CFGLInitStruct->m_FallINT_EN = ((uint32_t) 0x0 << (28));

    CFGLInitStruct->m_Mode_Sel = ((uint32_t) 0x0 << (25));

    CFGLInitStruct->m_Output_Pol = ((uint32_t) 0x0 << (24));

 CFGLInitStruct->m_G4Output_POL = ((uint32_t) 0x0 << (23));

    CFGLInitStruct->m_G3Output_POL = ((uint32_t) 0x0 << (22));

    CFGLInitStruct->m_G2Output_POL = ((uint32_t) 0x0 << (21));

    CFGLInitStruct->m_G1Output_POL = ((uint32_t) 0x0 << (20));

    CFGLInitStruct->m_G4Input_Sel = ((uint32_t) 0x7 << (16));

    CFGLInitStruct->m_G3Input_Sel = ((uint32_t) 0x7 << (12));

    CFGLInitStruct->m_G2Input_Sel = ((uint32_t) 0x7 << (8));

    CFGLInitStruct->m_G1Input_Sel = ((uint32_t) 0x7 << (4));

    CFGLInitStruct->m_CH4Data_Sel = ((uint32_t) 0x0 << (3));

    CFGLInitStruct->m_CH5CH6Data_Sel = ((uint32_t) 0x7 << (0));


    CFGLInitStruct->m_G4D4_Inphase_EN = FALSE;

    CFGLInitStruct->m_G4D4_Inverse_EN = FALSE;

    CFGLInitStruct->m_G4D3_Inphase_EN = FALSE;

    CFGLInitStruct->m_G4D3_Inverse_EN = FALSE;

    CFGLInitStruct->m_G4D2_Inphase_EN = FALSE;

    CFGLInitStruct->m_G4D2_Inverse_EN = FALSE;

    CFGLInitStruct->m_G4D1_Inphase_EN = FALSE;

    CFGLInitStruct->m_G4D1_Inverse_EN = FALSE;


    CFGLInitStruct->m_G3D4_Inphase_EN = FALSE;

    CFGLInitStruct->m_G3D4_Inverse_EN = FALSE;

    CFGLInitStruct->m_G3D3_Inphase_EN = FALSE;

    CFGLInitStruct->m_G3D3_Inverse_EN = FALSE;

    CFGLInitStruct->m_G3D2_Inphase_EN = FALSE;

    CFGLInitStruct->m_G3D2_Inverse_EN = FALSE;

    CFGLInitStruct->m_G3D1_Inphase_EN = FALSE;

    CFGLInitStruct->m_G3D1_Inverse_EN = FALSE;


    CFGLInitStruct->m_G2D4_Inphase_EN = FALSE;

    CFGLInitStruct->m_G2D4_Inverse_EN = FALSE;

    CFGLInitStruct->m_G2D3_Inphase_EN = FALSE;

    CFGLInitStruct->m_G2D3_Inverse_EN = FALSE;

    CFGLInitStruct->m_G2D2_Inphase_EN = FALSE;

    CFGLInitStruct->m_G2D2_Inverse_EN = FALSE;

    CFGLInitStruct->m_G2D1_Inphase_EN = FALSE;

    CFGLInitStruct->m_G2D1_Inverse_EN = FALSE;


    CFGLInitStruct->m_G1D4_Inphase_EN = FALSE;

    CFGLInitStruct->m_G1D4_Inverse_EN = FALSE;

    CFGLInitStruct->m_G1D3_Inphase_EN = FALSE;

    CFGLInitStruct->m_G1D3_Inverse_EN = FALSE;

    CFGLInitStruct->m_G1D2_Inphase_EN = FALSE;

    CFGLInitStruct->m_G1D2_Inverse_EN = FALSE;

    CFGLInitStruct->m_G1D1_Inphase_EN = FALSE;

    CFGLInitStruct->m_G1D1_Inverse_EN = FALSE;
}






void CFGL2_OUT_SYNCHRO_Enable (FunctionalState NewState)
{

    ((void)0);


    if (NewState != FALSE)
    {

     __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((31)));

    }
    else
    {

        __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((31)));
    }
}






void CFGL1_OUT_SYNCHRO_Enable (FunctionalState NewState)
{

    ((void)0);


    if (NewState != FALSE)
    {

     __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((30)));

    }
    else
    {

        __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((30)));
    }
}







void CFGL2_FALLINT_Enable (FunctionalState NewState)
{

 ((void)0);


    if (NewState != FALSE)
    {

     __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((28)));
     __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((29)));

    }
    else
    {

     __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((28)));
        __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((29)));
    }
}







void CFGL2_RISEINT_Enable (FunctionalState NewState)
{

 ((void)0);


    if (NewState != FALSE)
    {

     __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((29)));
     __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((29)));

    }
    else
    {

     __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((29)));
        __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((29)));
    }
}







void CFGL1_FALLINT_Enable (FunctionalState NewState)
{

 ((void)0);


    if (NewState != FALSE)
    {

     __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((28)));
     __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((28)));

    }
    else
    {

     __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((28)));
        __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((28)));
    }
}







void CFGL1_RISEINT_Enable (FunctionalState NewState)
{

 ((void)0);


    if (NewState != FALSE)
    {

     __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((29)));
     __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((28)));

    }
    else
    {

     __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((29)));
        __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR)),"i"((28)));
    }
}






FlagStatus CFGL1_Get_INT_Flag (void)
{

    if (((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR & ((uint32_t)1<<((8))))
    {

        return SET;
    }
    else
    {

        return RESET;
    }
}






FlagStatus CFGL2_Get_INT_Flag (void)
{

    if (((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR & ((uint32_t)1<<((9))))
    {

        return SET;
    }
    else
    {

        return RESET;
    }
}






RetStatus CFGL1_Clear_RISEINT_Flag (void)
{
 volatile uint32_t wait_flag = 0x0000;

 __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((29)));
 while(((((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR & ((uint32_t)1<<((8))))>>(8))&& (wait_flag != (0xFFFF)))
 {
  wait_flag++;
 }
 __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((29)));
 if(wait_flag==(0xFFFF))
 {
  return FAILURE;
 }
 return SUCCESS;
}






RetStatus CFGL1_Clear_FALLINT_Flag (void)
{
 volatile uint32_t wait_flag = 0x0000;

 __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((28)));
 while(((((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR & ((uint32_t)1<<((8))))>>(8))&& (wait_flag != (0xFFFF)))
 {
  wait_flag++;
 }
 __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((28)));
 if(wait_flag==(0xFFFF))
 {
  return FAILURE;
 }
 return SUCCESS;
}






RetStatus CFGL1_Clear_RISEFALLINT_Flag (void)
{
 volatile uint32_t wait_flag = 0x0000;

 __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((28)));
 __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((29)));
 while(((((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR & ((uint32_t)1<<((8))))>>(8))&& (wait_flag != (0xFFFF)))
 {
  wait_flag++;
 }
 __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((28)));
 __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002980))->CTL0)),"i"((29)));
 if(wait_flag==(0xFFFF))
 {
  return FAILURE;
 }
 return SUCCESS;
}






RetStatus CFGL2_Clear_RISEINT_Flag (void)
{
 volatile uint32_t wait_flag = 0x0000;

 __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((29)));
 while(((((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR & ((uint32_t)1<<((9))))>>(9))&& (wait_flag != (0xFFFF)))
 {
  wait_flag++;
 }
 __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((29)));
 if(wait_flag==(0xFFFF))
 {
  return FAILURE;
 }
 return SUCCESS;
}






RetStatus CFGL2_Clear_FALLINT_Flag (void)
{
 volatile uint32_t wait_flag = 0x0000;

 __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((28)));
 while(((((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR & ((uint32_t)1<<((9))))>>(9))&& (wait_flag != (0xFFFF)))
 {
  wait_flag++;
 }
 __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((28)));
 if(wait_flag==(0xFFFF))
 {
  return FAILURE;
 }
 return SUCCESS;
}






RetStatus CFGL2_Clear_RISEFALLINT_Flag (void)
{
 volatile uint32_t wait_flag = 0x0000;

 __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((28)));
 __asm volatile("CLR [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((29)));
 while(((((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR & ((uint32_t)1<<((9))))>>(9))&& (wait_flag != (0xFFFF)))
 {
  wait_flag++;
 }
 __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((28)));
 __asm volatile("SET [%0], #%1"::"r"(&(((CFGL_SFRmap *) ((uint32_t)0x40002988))->CTL0)),"i"((29)));
 if(wait_flag==(0xFFFF))
 {
  return FAILURE;
 }
 return SUCCESS;
}






FlagStatus CFGL2_OUT_STATE (void)
{

    if (((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR & ((uint32_t)1<<((1))))
    {

        return SET;
    }
    else
    {

        return RESET;
    }
}






FlagStatus CFGL1_OUT_STATE (void)
{

    if (((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR & ((uint32_t)1<<((0))))
    {

        return SET;
    }
    else
    {

        return RESET;
    }
}






void CFGL_Clear_INT_Flag(void)
{
 ((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR = SFR_Config(((CFGL_SFRmap *) ((uint32_t)0x40002988))->IFR, ~((uint32_t)1<<((2))), 0<<(2));
}