#include #include #include #include "stm32mp15-mx.dtsi" #include "stm32mp157.dtsi" #include "stm32mp15xf.dtsi" #include "stm32mp15xxac-pinctrl.dtsi" #include "stm32mp15-ddr.dtsi" /dts-v1/; /* USER CODE BEGIN includes */ #include /* USER CODE END includes */ /{ model = "STMicroelectronics STM32MP157F-DK2 STM32CubeMX board"; compatible = "st,stm32mp157f-board_157f-dk2-mx", "st,stm32mp157"; /* USER CODE BEGIN root */ memory@c0000000{ device_type = "memory"; reg = <0xc0000000 0x20000000>; }; vin:vin{ compatible = "regulator-fixed"; regulator-name = "vin"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; }; aliases{ serial0 = &uart4; serial1 = &usart3; serial2 = &uart7; serial3 = &usart2; }; chosen{ stdout-path = "serial0:115200n8"; }; /* USER CODE END root */ clocks{ clk_lse:clk-lse{ st,drive = < LSEDRV_MEDIUM_HIGH >; }; clk_hse:clk-hse{ st,digbypass; }; }; }; &pinctrl{ rtc_pins_mx:rtc_mx-0{ pins{ pinmux = ; }; }; sdmmc1_pins_mx:sdmmc1_mx-0{ pins1{ pinmux = , , , , ; bias-disable; drive-push-pull; slew-rate = <1>; }; pins2{ pinmux = ; bias-disable; drive-push-pull; slew-rate = <2>; }; }; uart4_pins_mx:uart4_mx-0{ pins1{ pinmux = ; bias-disable; }; pins2{ pinmux = ; bias-disable; drive-push-pull; slew-rate = <0>; }; }; }; &pinctrl_z{ i2c4_pins_z_mx:i2c4_mx-0{ pins{ pinmux = , ; bias-disable; drive-open-drain; slew-rate = <0>; }; }; }; &rcc{ st,csi-cal; st,hsi-cal; st,cal-sec = <60>; st,clksrc = < CLK_MPU_PLL1P CLK_AXI_PLL2P CLK_MCU_PLL3P CLK_PLL12_HSE CLK_PLL3_HSE CLK_PLL4_HSE CLK_RTC_LSE CLK_MCO1_DISABLED CLK_MCO2_DISABLED >; st,clkdiv = < 1 0 0 1 1 1 1 2 23 0 0 >; st,pkcs = < CLK_CKPER_HSE CLK_ETH_PLL4P CLK_SDMMC12_PLL4P CLK_DSI_DSIPLL CLK_STGEN_HSE CLK_USBPHY_HSE CLK_SPI2S1_DISABLED CLK_SPI2S23_PLL3Q CLK_SPI45_DISABLED CLK_SPI6_DISABLED CLK_I2C46_HSI CLK_SDMMC3_DISABLED CLK_USBO_USBPHY CLK_ADC_CKPER CLK_CEC_LSE CLK_I2C12_HSI CLK_I2C35_DISABLED CLK_UART1_DISABLED CLK_UART24_HSI CLK_UART35_DISABLED CLK_UART6_DISABLED CLK_UART78_DISABLED CLK_SPDIF_DISABLED CLK_SAI1_DISABLED CLK_SAI2_PLL3Q CLK_SAI3_DISABLED CLK_SAI4_DISABLED CLK_RNG1_LSI CLK_LPTIM1_DISABLED CLK_LPTIM23_DISABLED CLK_LPTIM45_DISABLED >; status = "okay"; secure-status = "okay"; pll2:st,pll@1{ compatible = "st,stm32mp1-pll"; reg = <1>; cfg = < 2 65 1 0 0 PQR(1,1,1) >; frac = < 0x1400 >; }; pll3:st,pll@2{ compatible = "st,stm32mp1-pll"; reg = <2>; cfg = < 1 33 1 16 36 PQR(1,1,0) >; frac = < 0x1a04 >; }; pll4:st,pll@3{ compatible = "st,stm32mp1-pll"; reg = <3>; cfg = < 3 98 5 7 7 PQR(1,1,0) >; }; }; &bsec{ status = "okay"; secure-status = "okay"; /* USER CODE BEGIN bsec */ board_id:board_id@ec{ reg = <0xec 0x4>; st,non-secure-otp; }; /* USER CODE END bsec */ }; &cryp1{ status = "okay"; }; &etzpc{ st,decprot = < DECPROT(STM32MP1_ETZPC_ADC_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_DMA1_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_DMA2_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_DMAMUX_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_ETH_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_HASH1_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_CEC_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_I2C1_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_I2C4_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_SPI2_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_RNG1_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_SAI2_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_UART4_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_USART2_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_OTG_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_VREFBUF_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_DDRCTRL_ID, DECPROT_S_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_DDRPHYC_ID, DECPROT_S_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_STGENC_ID, DECPROT_S_RW, DECPROT_UNLOCK) /* USER CODE BEGIN etzpc_decprot */ /*STM32CubeMX generates a basic and standard configuration for ETZPC. Additional device configurations can be added here if needed. "etzpc" node could be also overloaded in "addons" User-Section.*/ DECPROT(STM32MP1_ETZPC_BKPSRAM_ID, DECPROT_S_RW, DECPROT_UNLOCK) /* USER CODE END etzpc_decprot */ >; secure-status = "okay"; }; &hash1{ status = "okay"; }; &i2c4{ pinctrl-names = "default"; pinctrl-0 = <&i2c4_pins_z_mx>; status = "okay"; secure-status = "okay"; /* USER CODE BEGIN i2c4 */ i2c-scl-rising-time-ns = <185>; i2c-scl-falling-time-ns = <20>; clock-frequency = <400000>; pmic:stpmic@33{ compatible = "st,stpmic1"; reg = <0x33>; interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; status = "okay"; secure-status = "okay"; regulators{ compatible = "st,stpmic1-regulators"; buck1-supply = <&vin>; buck2-supply = <&vin>; buck3-supply = <&vin>; buck4-supply = <&vin>; ldo1-supply = <&v3v3>; ldo2-supply = <&vin>; ldo3-supply = <&vdd_ddr>; ldo4-supply = <&vin>; ldo5-supply = <&vin>; ldo6-supply = <&v3v3>; vref_ddr-supply = <&vin>; boost-supply = <&vin>; pwr_sw1-supply = <&bst_out>; pwr_sw2-supply = <&bst_out>; vddcore:buck1{ regulator-name = "vddcore"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1350000>; regulator-always-on; regulator-initial-mode = <0>; regulator-over-current-protection; lp-stop{ regulator-on-in-suspend; regulator-suspend-microvolt = <1200000>; }; standby-ddr-sr{ regulator-off-in-suspend; }; standby-ddr-off{ regulator-off-in-suspend; }; }; vdd_ddr:buck2{ regulator-name = "vdd_ddr"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; regulator-always-on; regulator-initial-mode = <0>; regulator-over-current-protection; lp-stop{ regulator-suspend-microvolt = <1350000>; regulator-on-in-suspend; }; standby-ddr-sr{ regulator-suspend-microvolt = <1350000>; regulator-on-in-suspend; }; standby-ddr-off{ regulator-off-in-suspend; }; }; vdd:buck3{ regulator-name = "vdd"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; st,mask-reset; regulator-initial-mode = <0>; regulator-over-current-protection; lp-stop{ regulator-suspend-microvolt = <3300000>; regulator-on-in-suspend; }; standby-ddr-sr{ regulator-suspend-microvolt = <3300000>; regulator-on-in-suspend; }; standby-ddr-off{ regulator-suspend-microvolt = <3300000>; regulator-on-in-suspend; }; }; v3v3:buck4{ regulator-name = "v3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; regulator-over-current-protection; regulator-initial-mode = <0>; lp-stop{ regulator-suspend-microvolt = <3300000>; regulator-on-in-suspend; }; standby-ddr-sr{ regulator-off-in-suspend; }; standby-ddr-off{ regulator-off-in-suspend; }; }; v1v8_audio:ldo1{ regulator-name = "v1v8_audio"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; standby-ddr-sr{ regulator-off-in-suspend; }; standby-ddr-off{ regulator-off-in-suspend; }; }; v3v3_hdmi:ldo2{ regulator-name = "v3v3_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; standby-ddr-sr{ regulator-off-in-suspend; }; standby-ddr-off{ regulator-off-in-suspend; }; }; vtt_ddr:ldo3{ regulator-name = "vtt_ddr"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <750000>; regulator-always-on; regulator-over-current-protection; lp-stop{ regulator-off-in-suspend; }; standby-ddr-sr{ regulator-off-in-suspend; }; standby-ddr-off{ regulator-off-in-suspend; }; }; vdd_usb:ldo4{ regulator-name = "vdd_usb"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; standby-ddr-sr{ regulator-off-in-suspend; }; standby-ddr-off{ regulator-off-in-suspend; }; }; vdda:ldo5{ regulator-name = "vdda"; regulator-min-microvolt = <2900000>; regulator-max-microvolt = <2900000>; regulator-boot-on; standby-ddr-sr{ regulator-off-in-suspend; }; standby-ddr-off{ regulator-off-in-suspend; }; }; v1v2_hdmi:ldo6{ regulator-name = "v1v2_hdmi"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; standby-ddr-sr{ regulator-off-in-suspend; }; standby-ddr-off{ regulator-off-in-suspend; }; }; vref_ddr:vref_ddr{ regulator-name = "vref_ddr"; regulator-always-on; regulator-over-current-protection; lp-stop{ regulator-on-in-suspend; }; standby-ddr-sr{ regulator-on-in-suspend; }; standby-ddr-off{ regulator-off-in-suspend; }; }; bst_out:boost{ regulator-name = "bst_out"; }; vbus_otg:pwr_sw1{ regulator-name = "vbus_otg"; }; vbus_sw:pwr_sw2{ regulator-name = "vbus_sw"; regulator-active-discharge = <1>; }; }; }; /* USER CODE END i2c4 */ }; &iwdg2{ status = "okay"; secure-status = "okay"; /* USER CODE BEGIN iwdg2 */ timeout-sec = <32>; /* USER CODE END iwdg2 */ }; &pwr_regulators{ status = "okay"; secure-status = "okay"; /* USER CODE BEGIN pwr_regulators */ system_suspend_supported_soc_modes = < STM32_PM_CSLEEP_RUN STM32_PM_CSTOP_ALLOW_LP_STOP STM32_PM_CSTOP_ALLOW_STANDBY_DDR_SR >; system_off_soc_mode = ; vdd-supply = <&vdd>; vdd_3v3_usbfs-supply = <&vdd_usb>; /* USER CODE END pwr_regulators */ }; &rng1{ status = "okay"; secure-status = "okay"; }; &rtc{ pinctrl-names = "default"; pinctrl-0 = <&rtc_pins_mx>; status = "okay"; secure-status = "okay"; }; &sdmmc1{ pinctrl-names = "default"; pinctrl-0 = <&sdmmc1_pins_mx>; status = "okay"; /* USER CODE BEGIN sdmmc1 */ disable-wp; st,neg-edge; bus-width = <4>; vmmc-supply = <&v3v3>; /* USER CODE END sdmmc1 */ }; &tamp{ status = "okay"; secure-status = "okay"; }; &uart4{ pinctrl-names = "default"; pinctrl-0 = <&uart4_pins_mx>; status = "okay"; }; &usbotg_hs{ status = "okay"; /* USER CODE BEGIN usbotg_hs */ phys = <&usbphyc_port1 0>; phy-names = "usb2-phy"; usb-role-switch; /* USER CODE END usbotg_hs */ }; &usbphyc{ status = "okay"; }; &usbphyc_port0{ status = "okay"; /* USER CODE BEGIN usbphyc_port0 */ phy-supply = <&vdd_usb>; /* USER CODE END usbphyc_port0 */ }; &usbphyc_port1{ status = "okay"; /* USER CODE BEGIN usbphyc_port1 */ phy-supply = <&vdd_usb>; /* USER CODE END usbphyc_port1 */ }; /* USER CODE BEGIN addons */ &cpu0{ cpu-supply = <&vddcore>; }; &cpu1{ cpu-supply = <&vddcore>; }; &nvmem_layout{ nvmem-cells = <&cfg0_otp>, <&part_number_otp>, <&monotonic_otp>, <&nand_otp>, <&uid_otp>, <&package_otp>, <&hw2_otp>, <&pkh_otp>, <&board_id>; nvmem-cell-names = "cfg0_otp", "part_number_otp", "monotonic_otp", "nand_otp", "uid_otp", "package_otp", "hw2_otp", "pkh_otp", "board_id"; }; &timers15{ secure-status = "okay"; st,hsi-cal-input = <7>; st,csi-cal-input = <8>; }; /* USER CODE END addons */