#include <dt-bindings/pinctrl/stm32-pinfunc.h>
#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include "stm32mp157-m4-srm.dtsi"
/dts-v1/;

/* USER CODE BEGIN includes */
#include <dt-bindings/mfd/st,stpmic1.h>
#include <dt-bindings/rtc/rtc-stm32.h>
/* USER CODE END includes */

/{
	model = "STMicroelectronics STM32MP157C-DK2 STM32CubeMX board";
	compatible = "st,stm32mp157c-board_157c-dk2-mx", "st,stm32mp157";

	/* USER CODE BEGIN root */

	led{
		compatible = "gpio-leds";

		blue{
			label = "heartbeat";
			gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};
	};

	sound{
		compatible = "audio-graph-card";
		label = "STM32MP1-DK";
		routing = "Playback", "MCLK", "Capture", "MCLK", "MICL", "Mic Bias";
		dais = <&sai2a_port &sai2b_port &i2s2_port>;
		status = "okay";
	};

	usb_phy_tuning:usb-phy-tuning{
		st,hs-dc-level = <2>;
		st,fs-rftime-tuning;
		st,hs-rftime-reduction;
		st,hs-current-trim = <15>;
		st,hs-impedance-trim = <1>;
		st,squelch-level = <3>;
		st,hs-rx-offset = <2>;
		st,no-lsfs-sc;
	};

	vin:vin{
		compatible = "regulator-fixed";
		regulator-name = "vin";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	aliases{
		ethernet0 = &ethernet0;
		serial0 = &uart4;
		serial1 = &usart3;
		serial2 = &uart7;
		serial3 = &usart2;
	};

	chosen{
		stdout-path = "serial0:115200n8";
	};

	wifi_pwrseq:wifi-pwrseq{
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpioh 4 GPIO_ACTIVE_LOW>;
	};
	/* USER CODE END root */

	memory@c0000000{
		device_type = "memory";
		reg = <0xc0000000 0x20000000>;
	};

	reserved-memory{
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* USER CODE BEGIN reserved-memory */

		mcuram2:mcuram2@10000000{
			compatible = "shared-dma-pool";
			reg = <0x10000000 0x40000>;
			no-map;
		};

		vdev0vring0:vdev0vring0@10040000{
			compatible = "shared-dma-pool";
			reg = <0x10040000 0x1000>;
			no-map;
		};

		vdev0vring1:vdev0vring1@10041000{
			compatible = "shared-dma-pool";
			reg = <0x10041000 0x1000>;
			no-map;
		};

		vdev0buffer:vdev0buffer@10042000{
			compatible = "shared-dma-pool";
			reg = <0x10042000 0x4000>;
			no-map;
		};

		mcuram:mcuram@30000000{
			compatible = "shared-dma-pool";
			reg = <0x30000000 0x40000>;
			no-map;
		};

		retram:retram@38000000{
			compatible = "shared-dma-pool";
			reg = <0x38000000 0x10000>;
			no-map;
		};

		gpu_reserved:gpu@da000000{
			reg = <0xda000000 0x4000000>;
			no-map;
		};
		/* USER CODE END reserved-memory */
	};

	clocks{

#ifndef CONFIG_STM32MP1_TRUSTED

		clk_lsi:clk-lsi{
			clock-frequency = <32000>;
		};

		clk_hsi:clk-hsi{
			clock-frequency = <64000000>;
		};

		clk_csi:clk-csi{
			clock-frequency = <4000000>;
		};

		clk_lse:clk-lse{
			clock-frequency = <32768>;
		};

		clk_hse:clk-hse{
			clock-frequency = <24000000>;
		};
#endif
	};
};

&pinctrl{
	u-boot,dm-pre-reloc;

	adc_pins_mx:adc_mx-0{

		pins{
			pinmux = <STM32_PINMUX('A', 4, ANALOG)>, <STM32_PINMUX('A', 5, ANALOG)>;
		};
	};

	adc_sleep_pins_mx:adc_sleep_mx-0{

		pins{
			pinmux = <STM32_PINMUX('A', 4, ANALOG)>, <STM32_PINMUX('A', 5, ANALOG)>;
		};
	};

	eth1_pins_mx:eth1_mx-0{

		pins1{
			pinmux = <STM32_PINMUX('A', 1, AF11)>, <STM32_PINMUX('A', 7, AF11)>, <STM32_PINMUX('B', 0, AF11)>, <STM32_PINMUX('B', 1, AF11)>, <STM32_PINMUX('C', 4, AF11)>, <STM32_PINMUX('C', 5, AF11)>;
			bias-disable;
		};

		pins2{
			pinmux = <STM32_PINMUX('A', 2, AF11)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};

		pins3{
			pinmux = <STM32_PINMUX('B', 11, AF11)>, <STM32_PINMUX('C', 1, AF11)>, <STM32_PINMUX('C', 2, AF11)>, <STM32_PINMUX('E', 2, AF11)>, <STM32_PINMUX('G', 4, AF11)>, <STM32_PINMUX('G', 5, AF11)>, <STM32_PINMUX('G', 13, AF11)>, <STM32_PINMUX('G', 14, AF11)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
	};

	eth1_sleep_pins_mx:eth1_sleep_mx-0{

		pins{
			pinmux = <STM32_PINMUX('A', 1, ANALOG)>, <STM32_PINMUX('A', 2, ANALOG)>, <STM32_PINMUX('A', 7, ANALOG)>, <STM32_PINMUX('B', 0, ANALOG)>, <STM32_PINMUX('B', 1, ANALOG)>, <STM32_PINMUX('B', 11, ANALOG)>, <STM32_PINMUX('C', 1, ANALOG)>, <STM32_PINMUX('C', 2, ANALOG)>, <STM32_PINMUX('C', 4, ANALOG)>, <STM32_PINMUX('C', 5, ANALOG)>, <STM32_PINMUX('E', 2, ANALOG)>, <STM32_PINMUX('G', 4, ANALOG)>, <STM32_PINMUX('G', 5, ANALOG)>, <STM32_PINMUX('G', 13, ANALOG)>, <STM32_PINMUX('G', 14, ANALOG)>;
		};
	};

	hdmi_cec_pins_mx:hdmi_cec_mx-0{

		pins{
			pinmux = <STM32_PINMUX('B', 6, AF5)>;
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	hdmi_cec_sleep_pins_mx:hdmi_cec_sleep_mx-0{

		pins{
			pinmux = <STM32_PINMUX('B', 6, ANALOG)>;
		};
	};

	i2c1_pins_mx:i2c1_mx-0{

		pins{
			pinmux = <STM32_PINMUX('D', 12, AF5)>, <STM32_PINMUX('F', 15, AF5)>;
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	i2c1_sleep_pins_mx:i2c1_sleep_mx-0{

		pins{
			pinmux = <STM32_PINMUX('D', 12, ANALOG)>, <STM32_PINMUX('F', 15, ANALOG)>;
		};
	};

	i2s2_pins_mx:i2s2_mx-0{

		pins{
			pinmux = <STM32_PINMUX('A', 9, AF5)>, <STM32_PINMUX('B', 9, AF5)>, <STM32_PINMUX('I', 3, AF5)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	i2s2_sleep_pins_mx:i2s2_sleep_mx-0{

		pins{
			pinmux = <STM32_PINMUX('A', 9, ANALOG)>, <STM32_PINMUX('B', 9, ANALOG)>, <STM32_PINMUX('I', 3, ANALOG)>;
		};
	};

	rtc_pins_mx:rtc_mx-0{

		pins{
			pinmux = <STM32_PINMUX('I', 8, ANALOG)>;
		};
	};

	rtc_sleep_pins_mx:rtc_sleep_mx-0{

		pins{
			pinmux = <STM32_PINMUX('I', 8, ANALOG)>;
		};
	};

	sai2a_pins_mx:sai2a_mx-0{

		pins{
			pinmux = <STM32_PINMUX('E', 0, AF10)>, <STM32_PINMUX('I', 5, AF10)>, <STM32_PINMUX('I', 6, AF10)>, <STM32_PINMUX('I', 7, AF10)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	sai2a_sleep_pins_mx:sai2a_sleep_mx-0{

		pins{
			pinmux = <STM32_PINMUX('E', 0, ANALOG)>, <STM32_PINMUX('I', 5, ANALOG)>, <STM32_PINMUX('I', 6, ANALOG)>, <STM32_PINMUX('I', 7, ANALOG)>;
		};
	};

	sai2b_pins_mx:sai2b_mx-0{

		pins{
			pinmux = <STM32_PINMUX('F', 11, AF10)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	sai2b_sleep_pins_mx:sai2b_sleep_mx-0{

		pins{
			pinmux = <STM32_PINMUX('F', 11, ANALOG)>;
		};
	};

	sdmmc1_pins_mx:sdmmc1_mx-0{
		u-boot,dm-pre-reloc;

		pins1{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('C', 8, AF12)>, <STM32_PINMUX('C', 9, AF12)>, <STM32_PINMUX('C', 10, AF12)>, <STM32_PINMUX('C', 11, AF12)>, <STM32_PINMUX('D', 2, AF12)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};

		pins2{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('C', 12, AF12)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
	};

	sdmmc1_opendrain_pins_mx:sdmmc1_opendrain_mx-0{
		u-boot,dm-pre-reloc;

		pins1{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('C', 8, AF12)>, <STM32_PINMUX('C', 9, AF12)>, <STM32_PINMUX('C', 10, AF12)>, <STM32_PINMUX('C', 11, AF12)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};

		pins2{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('C', 12, AF12)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};

		pins3{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('D', 2, AF12)>;
			bias-disable;
			drive-open-drain;
			slew-rate = <1>;
		};
	};

	sdmmc1_sleep_pins_mx:sdmmc1_sleep_mx-0{
		u-boot,dm-pre-reloc;

		pins{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('C', 8, ANALOG)>, <STM32_PINMUX('C', 9, ANALOG)>, <STM32_PINMUX('C', 10, ANALOG)>, <STM32_PINMUX('C', 11, ANALOG)>, <STM32_PINMUX('C', 12, ANALOG)>, <STM32_PINMUX('D', 2, ANALOG)>;
		};
	};

	sdmmc2_pins_mx:sdmmc2_mx-0{

		pins1{
			pinmux = <STM32_PINMUX('B', 3, AF9)>, <STM32_PINMUX('B', 4, AF9)>, <STM32_PINMUX('B', 14, AF9)>, <STM32_PINMUX('B', 15, AF9)>, <STM32_PINMUX('G', 6, AF10)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};

		pins2{
			pinmux = <STM32_PINMUX('E', 3, AF9)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
	};

	sdmmc2_opendrain_pins_mx:sdmmc2_opendrain_mx-0{

		pins1{
			pinmux = <STM32_PINMUX('B', 3, AF9)>, <STM32_PINMUX('B', 4, AF9)>, <STM32_PINMUX('B', 14, AF9)>, <STM32_PINMUX('B', 15, AF9)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};

		pins2{
			pinmux = <STM32_PINMUX('E', 3, AF9)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};

		pins3{
			pinmux = <STM32_PINMUX('G', 6, AF10)>;
			bias-disable;
			drive-open-drain;
			slew-rate = <1>;
		};
	};

	sdmmc2_sleep_pins_mx:sdmmc2_sleep_mx-0{

		pins{
			pinmux = <STM32_PINMUX('B', 3, ANALOG)>, <STM32_PINMUX('B', 4, ANALOG)>, <STM32_PINMUX('B', 14, ANALOG)>, <STM32_PINMUX('B', 15, ANALOG)>, <STM32_PINMUX('E', 3, ANALOG)>, <STM32_PINMUX('G', 6, ANALOG)>;
		};
	};

	uart4_pins_mx:uart4_mx-0{
		u-boot,dm-pre-reloc;

		pins1{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('B', 2, AF8)>;
			bias-disable;
		};

		pins2{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('G', 11, AF6)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	uart4_sleep_pins_mx:uart4_sleep_mx-0{
		u-boot,dm-pre-reloc;

		pins{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('B', 2, ANALOG)>, <STM32_PINMUX('G', 11, ANALOG)>;
		};
	};

	usart2_pins_mx:usart2_mx-0{

		pins1{
			pinmux = <STM32_PINMUX('D', 3, AF7)>, <STM32_PINMUX('D', 6, AF7)>;
			bias-disable;
		};

		pins2{
			pinmux = <STM32_PINMUX('D', 4, AF7)>, <STM32_PINMUX('D', 5, AF7)>;
			bias-disable;
			drive-push-pull;
			slew-rate = <3>;
		};
	};

	usart2_sleep_pins_mx:usart2_sleep_mx-0{

		pins{
			pinmux = <STM32_PINMUX('D', 3, ANALOG)>, <STM32_PINMUX('D', 4, ANALOG)>, <STM32_PINMUX('D', 5, ANALOG)>, <STM32_PINMUX('D', 6, ANALOG)>;
		};
	};
};

&pinctrl_z{
	u-boot,dm-pre-reloc;

	i2c4_pins_z_mx:i2c4_mx-0{
		u-boot,dm-pre-reloc;

		pins{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('Z', 4, AF6)>, <STM32_PINMUX('Z', 5, AF6)>;
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	i2c4_sleep_pins_z_mx:i2c4_sleep_mx-0{
		u-boot,dm-pre-reloc;

		pins{
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, <STM32_PINMUX('Z', 5, ANALOG)>;
		};
	};
};

&m4_rproc{
	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
	mbox-names = "vq0", "vq1", "shutdown";
	status = "okay";

	/* USER CODE BEGIN m4_rproc */
	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>;
	interrupt-parent = <&exti>;
	interrupts = <68 1>;
	wakeup-source;
	/* USER CODE END m4_rproc */
};

&adc{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&adc_pins_mx>;
	pinctrl-1 = <&adc_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN adc */
	vdd-supply = <&vdd>;
	vdda-supply = <&vdd>;
	vref-supply = <&vrefbuf>;

	adc1:adc@0{
		st,min-sample-time-nsecs = <5000>;
		st,adc-channels = <0 1 6 13 18 19>;
		status = "okay";
	};

	adc2:adc@100{
		st,adc-channels = <0 1 2 6 18 19>;
		st,min-sample-time-nsecs = <5000>;
		status = "okay";
	};
	/* USER CODE END adc */
};

&bsec{
	status = "okay";
};

&cec{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&hdmi_cec_pins_mx>;
	pinctrl-1 = <&hdmi_cec_sleep_pins_mx>;
	status = "okay";
};

&crc1{
	status = "okay";
};

&cryp1{
	u-boot,dm-pre-reloc;
	status = "okay";
};

&dma1{
	status = "okay";

	/* USER CODE BEGIN dma1 */
	sram = <&dma_pool>;
	/* USER CODE END dma1 */
};

&dma2{
	status = "okay";

	/* USER CODE BEGIN dma2 */
	sram = <&dma_pool>;
	/* USER CODE END dma2 */
};

&dmamux1{
	dma-masters = <&dma1 &dma2>;
	dma-channels = <16>;
	status = "okay";
};

&dsi{
	status = "okay";

	/* USER CODE BEGIN dsi */
	#address-cells = <1>;
	#size-cells = <0>;

	ports{
		#address-cells = <1>;
		#size-cells = <0>;

		port@0{
			reg = <0>;

			dsi_in:endpoint{
				remote-endpoint = <&ltdc_ep1_out>;
			};
		};

		port@1{
			reg = <1>;

			dsi_out:endpoint{
				remote-endpoint = <&panel_in>;
			};
		};
	};

	panel_otm8009a:panel-otm8009a@0{
		compatible = "orisetech,otm8009a";
		reg = <0>;
		reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
		power-supply = <&v3v3>;
		status = "okay";

		port{

			panel_in:endpoint{
				remote-endpoint = <&dsi_out>;
			};
		};
	};
	/* USER CODE END dsi */
};

&dts{
	status = "okay";
};

&ethernet0{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&eth1_pins_mx>;
	pinctrl-1 = <&eth1_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN ethernet0 */
	phy-mode = "rgmii-id";
	max-speed = <1000>;
	phy-handle = <&phy0>;
	nvmem-cells = <&ethernet_mac_address>;
	nvmem-cell-names = "mac-address";

	mdio0{
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";

		phy0:ethernet-phy@0{
			reg = <0>;
		};
	};
	/* USER CODE END ethernet0 */
};

&gpu{
	status = "okay";

	/* USER CODE BEGIN gpu */
	contiguous-area = <&gpu_reserved>;
	/* USER CODE END gpu */
};

&hash1{
	u-boot,dm-pre-reloc;
	status = "okay";
};

&hsem{
	status = "okay";
};

&i2c1{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c1_pins_mx>;
	pinctrl-1 = <&i2c1_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c1 */
	i2c-scl-rising-time-ns = <100>;
	i2c-scl-falling-time-ns = <7>;
	/delete-property/ dmas;
	/delete-property/ dma-names;

	hdmi-transmitter@39{
		compatible = "sil,sii9022";
		reg = <0x39>;
		iovcc-supply = <&v3v3_hdmi>;
		cvcc12-supply = <&v1v2_hdmi>;
		reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
		interrupt-parent = <&gpiog>;
		#sound-dai-cells = <0>;
		status = "okay";

		ports{
			#address-cells = <1>;
			#size-cells = <0>;

			port@0{
				reg = <0>;

				sii9022_in:endpoint{
					remote-endpoint = <&ltdc_ep0_out>;
				};
			};

			port@3{
				reg = <3>;

				sii9022_tx_endpoint:endpoint{
					remote-endpoint = <&i2s2_endpoint>;
				};
			};
		};
	};

	cs42l51:cs42l51@4a{
		compatible = "cirrus,cs42l51";
		reg = <0x4a>;
		#sound-dai-cells = <0>;
		VL-supply = <&v3v3>;
		VD-supply = <&v1v8_audio>;
		VA-supply = <&v1v8_audio>;
		VAHP-supply = <&v1v8_audio>;
		reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
		clocks = <&sai2a>;
		clock-names = "MCLK";
		status = "okay";

		cs42l51_port:port{
			#address-cells = <1>;
			#size-cells = <0>;

			cs42l51_tx_endpoint:endpoint@0{
				reg = <0>;
				remote-endpoint = <&sai2a_endpoint>;
				frame-master;
				bitclock-master;
			};

			cs42l51_rx_endpoint:endpoint@1{
				reg = <1>;
				remote-endpoint = <&sai2b_endpoint>;
				frame-master;
				bitclock-master;
			};
		};
	};

	touchscreen@2a{
		compatible = "focaltech,ft6236";
		reg = <0x2a>;
		interrupts = <2 2>;
		interrupt-parent = <&gpiof>;
		interrupt-controller;
		touchscreen-size-x = <480>;
		touchscreen-size-y = <800>;
		panel = <&panel_otm8009a>;
		status = "okay";
	};

	touchscreen@38{
		compatible = "focaltech,ft6236";
		reg = <0x38>;
		interrupts = <2 2>;
		interrupt-parent = <&gpiof>;
		interrupt-controller;
		touchscreen-size-x = <480>;
		touchscreen-size-y = <800>;
		panel = <&panel_otm8009a>;
		status = "okay";
	};
	/* USER CODE END i2c1 */
};

&i2c4{
	u-boot,dm-pre-reloc;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c4_pins_z_mx>;
	pinctrl-1 = <&i2c4_sleep_pins_z_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c4 */
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	clock-frequency = <400000>;
	/delete-property/ dmas;
	/delete-property/ dma-names;

	stusb1600@28{
		compatible = "st,stusb1600";
		reg = <0x28>;
		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
		interrupt-parent = <&gpioi>;
		pinctrl-names = "default";
		pinctrl-0 = <&stusb1600_pins_a>;
		status = "okay";
		vdd-supply = <&vin>;

		connector{
			compatible = "usb-c-connector";
			label = "USB-C";
			power-role = "dual";
			power-opmode = "default";

			port{

				con_usbotg_hs_ep:endpoint{
					remote-endpoint = <&usbotg_hs_ep>;
				};
			};
		};
	};

	pmic:stpmic@33{
		compatible = "st,stpmic1";
		reg = <0x33>;
		interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
		status = "okay";

		regulators{
			compatible = "st,stpmic1-regulators";
			buck1-supply = <&vin>;
			buck2-supply = <&vin>;
			buck3-supply = <&vin>;
			buck4-supply = <&vin>;
			ldo1-supply = <&v3v3>;
			ldo2-supply = <&vin>;
			ldo3-supply = <&vdd_ddr>;
			ldo4-supply = <&vin>;
			ldo5-supply = <&vin>;
			ldo6-supply = <&v3v3>;
			vref_ddr-supply = <&vin>;
			boost-supply = <&vin>;
			pwr_sw1-supply = <&bst_out>;
			pwr_sw2-supply = <&bst_out>;

			vddcore:buck1{
				regulator-name = "vddcore";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1350000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			vdd_ddr:buck2{
				regulator-name = "vdd_ddr";
				regulator-min-microvolt = <1350000>;
				regulator-max-microvolt = <1350000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			vdd:buck3{
				regulator-name = "vdd";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				st,mask-reset;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			v3v3:buck4{
				regulator-name = "v3v3";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				regulator-over-current-protection;
				regulator-initial-mode = <0>;
			};

			v1v8_audio:ldo1{
				regulator-name = "v1v8_audio";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO1 0>;
			};

			v3v3_hdmi:ldo2{
				regulator-name = "v3v3_hdmi";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO2 0>;
			};

			vtt_ddr:ldo3{
				regulator-name = "vtt_ddr";
				regulator-min-microvolt = <500000>;
				regulator-max-microvolt = <750000>;
				regulator-always-on;
				regulator-over-current-protection;
			};

			vdd_usb:ldo4{
				regulator-name = "vdd_usb";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				interrupts = <IT_CURLIM_LDO4 0>;
				regulator-always-on;
			};

			vdda:ldo5{
				regulator-name = "vdda";
				regulator-min-microvolt = <2900000>;
				regulator-max-microvolt = <2900000>;
				interrupts = <IT_CURLIM_LDO5 0>;
				regulator-boot-on;
			};

			v1v2_hdmi:ldo6{
				regulator-name = "v1v2_hdmi";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO6 0>;
			};

			vref_ddr:vref_ddr{
				regulator-name = "vref_ddr";
				regulator-always-on;
				regulator-over-current-protection;
			};

			bst_out:boost{
				regulator-name = "bst_out";
				interrupts = <IT_OCP_BOOST 0>;
			};

			vbus_otg:pwr_sw1{
				regulator-name = "vbus_otg";
				interrupts = <IT_OCP_OTG 0>;
			};

			vbus_sw:pwr_sw2{
				regulator-name = "vbus_sw";
				interrupts = <IT_OCP_SWOUT 0>;
				regulator-active-discharge = <1>;
			};
		};

		onkey{
			compatible = "st,stpmic1-onkey";
			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
			interrupt-names = "onkey-falling", "onkey-rising";
			power-off-time-sec = <10>;
			status = "okay";
		};

		watchdog{
			compatible = "st,stpmic1-wdt";
			status = "disabled";
		};
	};
	/* USER CODE END i2c4 */
};

&i2s2{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2s2_pins_mx>;
	pinctrl-1 = <&i2s2_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2s2 */
	clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
	clock-names = "pclk", "i2sclk", "x8k", "x11k";

	i2s2_port:port{

		i2s2_endpoint:endpoint{
			remote-endpoint = <&sii9022_tx_endpoint>;
			format = "i2s";
			mclk-fs = <256>;
		};
	};
	/* USER CODE END i2s2 */
};

&ipcc{
	status = "okay";
};

&iwdg2{
	status = "okay";

	/* USER CODE BEGIN iwdg2 */
	timeout-sec = <32>;
	/* USER CODE END iwdg2 */
};

&ltdc{
	status = "okay";

	/* USER CODE BEGIN ltdc */

	port{
		#address-cells = <1>;
		#size-cells = <0>;

		ltdc_ep0_out:endpoint@0{
			reg = <0>;
			remote-endpoint = <&sii9022_in>;
		};

		ltdc_ep1_out:endpoint@1{
			reg = <1>;
			remote-endpoint = <&dsi_in>;
		};
	};
	/* USER CODE END ltdc */
};

&mdma1{
	status = "okay";
};

&pwr_regulators{
	status = "okay";

	/* USER CODE BEGIN pwr_regulators */
	vdd-supply = <&vdd>;
	vdd_3v3_usbfs-supply = <&vdd_usb>;
	/* USER CODE END pwr_regulators */
};

&rcc{
	u-boot,dm-pre-reloc;
	status = "okay";
};

&rng1{
	status = "okay";
};

&rtc{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&rtc_pins_mx>;
	pinctrl-1 = <&rtc_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN rtc */
	st,lsco = <RTC_OUT2_RMP>;
	/* USER CODE END rtc */
};

&sai2{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&sai2a_pins_mx>, <&sai2b_pins_mx>;
	pinctrl-1 = <&sai2a_sleep_pins_mx>, <&sai2b_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN sai2 */
	clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
	clock-names = "pclk", "x8k", "x11k";
	/* USER CODE END sai2 */

	sai2a:audio-controller@4400b004{
		status = "okay";

		/* USER CODE BEGIN sai2a */
		#clock-cells = <0>;
		dma-names = "tx";
		clocks = <&rcc SAI2_K>;
		clock-names = "sai_ck";

		sai2a_port:port{

			sai2a_endpoint:endpoint{
				remote-endpoint = <&cs42l51_tx_endpoint>;
				format = "i2s";
				mclk-fs = <256>;
				dai-tdm-slot-num = <2>;
				dai-tdm-slot-width = <32>;
			};
		};
		/* USER CODE END sai2a */
	};

	sai2b:audio-controller@4400b024{
		status = "okay";

		/* USER CODE BEGIN sai2b */
		dma-names = "rx";
		st,sync = <&sai2a 2>;
		clocks = <&rcc SAI2_K>, <&sai2a>;
		clock-names = "sai_ck", "MCLK";

		sai2b_port:port{

			sai2b_endpoint:endpoint{
				remote-endpoint = <&cs42l51_rx_endpoint>;
				format = "i2s";
				mclk-fs = <256>;
				dai-tdm-slot-num = <2>;
				dai-tdm-slot-width = <32>;
			};
		};
		/* USER CODE END sai2b */
	};
};

&sdmmc1{
	u-boot,dm-pre-reloc;
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_pins_mx>;
	pinctrl-1 = <&sdmmc1_opendrain_pins_mx>;
	pinctrl-2 = <&sdmmc1_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN sdmmc1 */
	cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
	disable-wp;
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&v3v3>;
	/* USER CODE END sdmmc1 */
};

&sdmmc2{
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc2_pins_mx>;
	pinctrl-1 = <&sdmmc2_opendrain_pins_mx>;
	pinctrl-2 = <&sdmmc2_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN sdmmc2 */
	arm,primecell-periphid = <0x10153180>;
	non-removable;
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&v3v3>;
	mmc-pwrseq = <&wifi_pwrseq>;
	#address-cells = <1>;
	#size-cells = <0>;

	brcmf:bcrmf@1{
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";
	};
	/* USER CODE END sdmmc2 */
};

&tamp{
	status = "okay";
};

&uart4{
	u-boot,dm-pre-reloc;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart4_pins_mx>;
	pinctrl-1 = <&uart4_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN uart4 */
	/delete-property/ dmas;
	/delete-property/ dma-names;
	/* USER CODE END uart4 */
};

&usart2{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&usart2_pins_mx>;
	pinctrl-1 = <&usart2_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN usart2 */
	uart-has-rtscts;

	bluetooth{
		shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
		compatible = "brcm,bcm43438-bt";
		max-speed = <3000000>;
		vbat-supply = <&v3v3>;
		vddio-supply = <&v3v3>;
	};
	/* USER CODE END usart2 */
};

&usbh_ehci{
	status = "okay";

	/* USER CODE BEGIN usbh_ehci */
	phys = <&usbphyc_port0>;
	/* USER CODE END usbh_ehci */
};

&usbh_ohci{
	status = "okay";
};

&usbotg_hs{
	u-boot,dm-pre-reloc;
	status = "okay";

	/* USER CODE BEGIN usbotg_hs */
	phys = <&usbphyc_port1 0>;
	phy-names = "usb2-phy";
	usb-role-switch;

	port{

		usbotg_hs_ep:endpoint{
			remote-endpoint = <&con_usbotg_hs_ep>;
		};
	};
	/* USER CODE END usbotg_hs */
};

&usbphyc{
	u-boot,dm-pre-reloc;
	status = "okay";
};

&usbphyc_port0{
	u-boot,dm-pre-reloc;
	status = "okay";

	/* USER CODE BEGIN usbphyc_port0 */
	phy-supply = <&vdd_usb>;
	st,phy-tuning = <&usb_phy_tuning>;
	/* USER CODE END usbphyc_port0 */
};

&usbphyc_port1{
	u-boot,dm-pre-reloc;
	status = "okay";

	/* USER CODE BEGIN usbphyc_port1 */
	phy-supply = <&vdd_usb>;
	st,phy-tuning = <&usb_phy_tuning>;
	/* USER CODE END usbphyc_port1 */
};

&vrefbuf{
	status = "okay";

	/* USER CODE BEGIN vrefbuf */
	regulator-min-microvolt = <2500000>;
	regulator-max-microvolt = <2500000>;
	vdda-supply = <&vdd>;
	/* USER CODE END vrefbuf */
};

/* USER CODE BEGIN addons */

&cpu0{
	cpu-supply = <&vddcore>;
};

&cpu1{
	cpu-supply = <&vddcore>;
};

&sram{

	dma_pool:dma_pool@0{
		reg = <0x50000 0x10000>;
		pool;
	};
};
/* USER CODE END addons */