<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<HALvsLL xmlns="http://mcd.rou.st.com/modules.php?name=mcu"
	xmlns:ns0="http://www.w3.org/2001/XMLSchema-instance"
	ns0:schemaLocation="http://mcd.rou.st.com/modules.php?name=mcu 
    ../../../../../../../../doc/V4/Development/Specifications/db/IP_DefMapping.xsd"
    Version="" DBVersion="4.0">
<Item Name="APB1CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB1_DIV_1" Type="RefParameter" Value="RCC_HCLK_DIV1"/>
<Item Name="APB1CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB1_DIV_2" Type="RefParameter" Value="RCC_HCLK_DIV2"/>
<Item Name="APB1CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB1_DIV_4" Type="RefParameter" Value="RCC_HCLK_DIV4"/>
<Item Name="APB1CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB1_DIV_8" Type="RefParameter" Value="RCC_HCLK_DIV8"/>
<Item Name="APB1CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB1_DIV_16" Type="RefParameter" Value="RCC_HCLK_DIV16"/>
<Item Name="APB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB2_DIV_1" Type="RefParameter" Value="RCC_HCLK_DIV1"/>
<Item Name="APB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB2_DIV_16" Type="RefParameter" Value="RCC_HCLK_DIV16"/>
<Item Name="APB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB2_DIV_2" Type="RefParameter" Value="RCC_HCLK_DIV2"/>
<Item Name="APB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB2_DIV_4" Type="RefParameter" Value="RCC_HCLK_DIV4"/>
<Item Name="APB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB2_DIV_8" Type="RefParameter" Value="RCC_HCLK_DIV8"/>
<Item Name="PWR_Regulator_Voltage_Scale" NewName="VoltageScaling" NewValue="LL_PWR_REGU_VOLTAGE_SCALE1" Type="RefParameter" Value="PWR_REGULATOR_VOLTAGE_SCALE1"/>
<Item Name="PWR_Regulator_Voltage_Scale" NewName="VoltageScaling" NewValue="LL_PWR_REGU_VOLTAGE_SCALE2" Type="RefParameter" Value="PWR_REGULATOR_VOLTAGE_SCALE2"/>
<Item Name="ADCCLockSelection" NewName="ADCxSource" NewValue="LL_RCC_ADC_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_ADCCLKSOURCE_HSI"/>
<Item Name="ADCCLockSelection" NewName="ADCxSource" NewValue="LL_RCC_ADC_CLKSOURCE_PLL" Type="RefParameter" Value="RCC_ADCCLKSOURCE_PLL"/>
<Item Name="ADCCLockSelection" NewName="ADCxSource" NewValue="LL_RCC_ADC_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_ADCCLKSOURCE_SYSCLK"/>
<Item Name="I2C1CLockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C1_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_I2C1CLKSOURCE_PCLK1"/>
<Item Name="I2C1CLockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C1_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_I2C1CLKSOURCE_HSI"/>
<Item Name="I2C1CLockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C1_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_I2C1CLKSOURCE_SYSCLK"/>
<Item Name="I2C2CLockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C2_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_I2C2CLKSOURCE_HSI"/>
<Item Name="I2C2CLockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C2_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_I2C2CLKSOURCE_PCLK1"/>
<Item Name="I2C2CLockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C2_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_I2C2CLKSOURCE_SYSCLK"/>
<Item Name="I2C3CLockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C3_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_I2C3CLKSOURCE_HSI"/>
<Item Name="I2C3CLockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C3_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_I2C3CLKSOURCE_PCLK1"/>
<Item Name="I2C3CLockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C3_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_I2C3CLKSOURCE_SYSCLK"/>
<Item Name="LPTIM1CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM1_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_LPTIM1CLKSOURCE_HSI"/>
<Item Name="LPTIM1CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM1_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_LPTIM1CLKSOURCE_LSE"/>
<Item Name="LPTIM1CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM1_CLKSOURCE_LSI" Type="RefParameter" Value="RCC_LPTIM1CLKSOURCE_LSI"/>
<Item Name="LPTIM1CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM1_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_LPTIM1CLKSOURCE_PCLK1"/>
<Item Name="LPTIM2CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM2_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_LPTIM2CLKSOURCE_HSI"/>
<Item Name="LPTIM2CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM2_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_LPTIM2CLKSOURCE_LSE"/>
<Item Name="LPTIM2CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM2_CLKSOURCE_LSI" Type="RefParameter" Value="RCC_LPTIM2CLKSOURCE_LSI"/>
<Item Name="LPTIM2CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM2_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_LPTIM2CLKSOURCE_PCLK1"/>
<Item Name="LPTIM3CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM3_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_LPTIM3CLKSOURCE_HSI"/>
<Item Name="LPTIM3CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM3_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_LPTIM3CLKSOURCE_LSE"/>
<Item Name="LPTIM3CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM3_CLKSOURCE_LSI" Type="RefParameter" Value="RCC_LPTIM3CLKSOURCE_LSI"/>
<Item Name="LPTIM3CLockSelection" NewName="LPTIMxSource" NewValue="LL_RCC_LPTIM3_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_LPTIM3CLKSOURCE_PCLK1"/>
<Item Name="LPUART1CLockSelection" NewName="LPUARTxSource" NewValue="LL_RCC_LPUART1_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_LPUART1CLKSOURCE_HSI"/>
<Item Name="LPUART1CLockSelection" NewName="LPUARTxSource" NewValue="LL_RCC_LPUART1_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_LPUART1CLKSOURCE_LSE"/>
<Item Name="LPUART1CLockSelection" NewName="LPUARTxSource" NewValue="LL_RCC_LPUART1_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_LPUART1CLKSOURCE_PCLK1"/>
<Item Name="LPUART1CLockSelection" NewName="LPUARTxSource" NewValue="LL_RCC_LPUART1_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_LPUART1CLKSOURCE_SYSCLK"/>
<Item Name="RNGCLockSelection" NewName="RNGxSource" NewValue="LL_RCC_RNG_CLKSOURCE_MSI" Type="RefParameter" Value="RCC_RNGCLKSOURCE_MSI"/>
<Item Name="RNGCLockSelection" NewName="RNGxSource" NewValue="LL_RCC_RNG_CLKSOURCE_LSI" Type="RefParameter" Value="RCC_RNGCLKSOURCE_LSI"/>
<Item Name="RNGCLockSelection" NewName="RNGxSource" NewValue="LL_RCC_RNG_CLKSOURCE_PLL" Type="RefParameter" Value="RCC_RNGCLKSOURCE_PLL"/>
<Item Name="RNGCLockSelection" NewName="RNGxSource" NewValue="LL_RCC_RNG_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_RNGCLKSOURCE_LSE"/>
<Item Name="RTCClockSelection" NewName="Source" NewValue="LL_RCC_RTC_CLKSOURCE_HSE_DIV32" Type="RefParameter" Value="RCC_RTCCLKSOURCE_HSE_DIV32"/>
<Item Name="RTCClockSelection" NewName="Source" NewValue="LL_RCC_RTC_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_RTCCLKSOURCE_LSE"/>
<Item Name="RTCClockSelection" NewName="Source" NewValue="LL_RCC_RTC_CLKSOURCE_LSI" Type="RefParameter" Value="RCC_RTCCLKSOURCE_LSI"/>
<Item Name="USART1CLockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART1_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_USART1CLKSOURCE_HSI"/>
<Item Name="USART1CLockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART1_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_USART1CLKSOURCE_LSE"/>
<Item Name="USART1CLockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART1_CLKSOURCE_PCLK2" Type="RefParameter" Value="RCC_USART1CLKSOURCE_PCLK2"/>
<Item Name="USART1CLockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART1_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_USART1CLKSOURCE_SYSCLK"/>
<Item Name="USART2CLockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART2_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_USART2CLKSOURCE_HSI"/>
<Item Name="USART2CLockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART2_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_USART2CLKSOURCE_LSE"/>
<Item Name="USART2CLockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART2_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_USART2CLKSOURCE_PCLK1"/>
<Item Name="USART2CLockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART2_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_USART2CLKSOURCE_SYSCLK"/>
<Item Name="USART3CLockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART3_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_USART3CLKSOURCE_HSI"/>


<Item Name="LSCOSource1" NewName="Source" NewValue="LL_RCC_LSCO_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_LSCOSOURCE_LSE"/>
<Item Name="LSCOSource1" NewName="Source" NewValue="LL_RCC_LSCO_CLKSOURCE_LSI" Type="RefParameter" Value="RCC_LSCOSOURCE_LSI"/>
<Item NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_HIGH" Type="RefParameter" Value="RCC_LSEDRIVE_HIGH"/>
<Item NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_LOW" Type="RefParameter" Value="RCC_LSEDRIVE_LOW"/>
<Item NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_MEDIUMHIGH" Type="RefParameter" Value="RCC_LSEDRIVE_MEDIUMHIGH"/>
<Item NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_MEDIUMLOW" Type="RefParameter" Value="RCC_LSEDRIVE_MEDIUMLOW"/>

<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_1" Type="RefParameter" Value="RCC_MCODIV_1"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_16" Type="RefParameter" Value="RCC_MCODIV_16"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_2" Type="RefParameter" Value="RCC_MCODIV_2"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_4" Type="RefParameter" Value="RCC_MCODIV_4"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_8" Type="RefParameter" Value="RCC_MCODIV_8"/>

<Item Name="RCC_MCO1Source" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_SYSCLK" Type="RefParameter" Value="RCC_MCO1SOURCE_SYSCLK"/>
<Item Name="RCC_MCO1Source" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_HSI" Type="RefParameter" Value="RCC_MCO1SOURCE_HSI"/>
<Item Name="RCC_MCO1Source" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_MSI" Type="RefParameter" Value="RCC_MCO1SOURCE_MSI"/>
<Item Name="RCC_MCO1Source" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_HSE" Type="RefParameter" Value="RCC_MCO1SOURCE_HSE"/>
<Item Name="RCC_MCO1Source" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_PLLCLK" Type="RefParameter" Value="RCC_MCO1SOURCE_PLLCLK"/>
<Item Name="RCC_MCO1Source" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_LSE" Type="RefParameter" Value="RCC_MCO1SOURCE_LSE"/>
<Item Name="RCC_MCO1Source" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_LSI" Type="RefParameter" Value="RCC_MCO1SOURCE_LSI"/>
<Item Name="RCC_MCO1Source" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_PLLPCLK" Type="RefParameter" Value="RCC_MCO1SOURCE_PLLPCLK"/>
<Item Name="RCC_MCO1Source" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_PLLQCLK" Type="RefParameter" Value="RCC_MCO1SOURCE_PLLQCLK"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_0" Type="RefParameter" Value="RCC_MSIRANGE_0"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_1" Type="RefParameter" Value="RCC_MSIRANGE_1"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_10" Type="RefParameter" Value="RCC_MSIRANGE_10"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_11" Type="RefParameter" Value="RCC_MSIRANGE_11"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_2" Type="RefParameter" Value="RCC_MSIRANGE_2"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_3" Type="RefParameter" Value="RCC_MSIRANGE_3"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_4" Type="RefParameter" Value="RCC_MSIRANGE_4"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_5" Type="RefParameter" Value="RCC_MSIRANGE_5"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_6" Type="RefParameter" Value="RCC_MSIRANGE_6"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_7" Type="RefParameter" Value="RCC_MSIRANGE_7"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_8" Type="RefParameter" Value="RCC_MSIRANGE_8"/>
<Item Name="MSIClockRange" NewName="Range" NewValue="LL_RCC_MSIRANGE_9" Type="RefParameter" Value="RCC_MSIRANGE_9"/>


<Item Name="PLLSource" NewName="Source" NewValue="LL_RCC_PLLSOURCE_HSE" Type="RefParameter" Value="RCC_PLLSOURCE_HSE"/>
<Item Name="PLLSourceVirtual" NewName="Source" NewValue="LL_RCC_PLLSOURCE_HSE" Type="RefParameter" Value="RCC_PLLSOURCE_HSE"/>
<Item Name="PLLSource" NewName="Source" NewValue="LL_RCC_PLLSOURCE_HSI" Type="RefParameter" Value="RCC_PLLSOURCE_HSI"/>
<Item Name="PLLSourceVirtual" NewName="Source" NewValue="LL_RCC_PLLSOURCE_HSI" Type="RefParameter" Value="RCC_PLLSOURCE_HSI"/>
<Item Name="PLLSource" NewName="Source" NewValue="LL_RCC_PLLSOURCE_MSI" Type="RefParameter" Value="RCC_PLLSOURCE_MSI"/>
<Item Name="PLLSourceVirtual" NewName="Source" NewValue="LL_RCC_PLLSOURCE_MSI" Type="RefParameter" Value="RCC_PLLSOURCE_MSI"/>
<Item Name="SYSCLKSource" NewName="Source" NewValue="LL_RCC_SYS_CLKSOURCE_HSE" Type="RefParameter" Value="RCC_SYSCLKSOURCE_HSE"/>
<Item Name="SYSCLKSource" NewName="Source" NewValue="LL_RCC_SYS_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_SYSCLKSOURCE_HSI"/>
<Item Name="SYSCLKSource" NewName="Source" NewValue="LL_RCC_SYS_CLKSOURCE_MSI" Type="RefParameter" Value="RCC_SYSCLKSOURCE_MSI"/>
<Item Name="SYSCLKSource" NewName="Source" NewValue="LL_RCC_SYS_CLKSOURCE_PLL" Type="RefParameter" Value="RCC_SYSCLKSOURCE_PLLCLK"/>

<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_1" Type="RefParameter" Value="RCC_SYSCLK_DIV1"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_2" Type="RefParameter" Value="RCC_SYSCLK_DIV2"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_3" Type="RefParameter" Value="RCC_SYSCLK_DIV3"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_4" Type="RefParameter" Value="RCC_SYSCLK_DIV4"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_5" Type="RefParameter" Value="RCC_SYSCLK_DIV5"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_6" Type="RefParameter" Value="RCC_SYSCLK_DIV6"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_8" Type="RefParameter" Value="RCC_SYSCLK_DIV8"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_10" Type="RefParameter" Value="RCC_SYSCLK_DIV10"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_16" Type="RefParameter" Value="RCC_SYSCLK_DIV16"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_32" Type="RefParameter" Value="RCC_SYSCLK_DIV32"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_64" Type="RefParameter" Value="RCC_SYSCLK_DIV64"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_128" Type="RefParameter" Value="RCC_SYSCLK_DIV128"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_256" Type="RefParameter" Value="RCC_SYSCLK_DIV256"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_512" Type="RefParameter" Value="RCC_SYSCLK_DIV512"/>

<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_1" Type="RefParameter" Value="RCC_SYSCLK_DIV1"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_2" Type="RefParameter" Value="RCC_SYSCLK_DIV2"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_3" Type="RefParameter" Value="RCC_SYSCLK_DIV3"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_4" Type="RefParameter" Value="RCC_SYSCLK_DIV4"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_5" Type="RefParameter" Value="RCC_SYSCLK_DIV5"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_6" Type="RefParameter" Value="RCC_SYSCLK_DIV6"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_8" Type="RefParameter" Value="RCC_SYSCLK_DIV8"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_10" Type="RefParameter" Value="RCC_SYSCLK_DIV10"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_16" Type="RefParameter" Value="RCC_SYSCLK_DIV16"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_32" Type="RefParameter" Value="RCC_SYSCLK_DIV32"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_64" Type="RefParameter" Value="RCC_SYSCLK_DIV64"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_128" Type="RefParameter" Value="RCC_SYSCLK_DIV128"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_256" Type="RefParameter" Value="RCC_SYSCLK_DIV256"/>
<Item Name="AHB2CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_512" Type="RefParameter" Value="RCC_SYSCLK_DIV512"/>

<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_1" Type="RefParameter" Value="RCC_SYSCLK_DIV1"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_2" Type="RefParameter" Value="RCC_SYSCLK_DIV2"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_3" Type="RefParameter" Value="RCC_SYSCLK_DIV3"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_4" Type="RefParameter" Value="RCC_SYSCLK_DIV4"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_5" Type="RefParameter" Value="RCC_SYSCLK_DIV5"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_6" Type="RefParameter" Value="RCC_SYSCLK_DIV6"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_8" Type="RefParameter" Value="RCC_SYSCLK_DIV8"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_10" Type="RefParameter" Value="RCC_SYSCLK_DIV10"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_16" Type="RefParameter" Value="RCC_SYSCLK_DIV16"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_32" Type="RefParameter" Value="RCC_SYSCLK_DIV32"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_64" Type="RefParameter" Value="RCC_SYSCLK_DIV64"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_128" Type="RefParameter" Value="RCC_SYSCLK_DIV128"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_256" Type="RefParameter" Value="RCC_SYSCLK_DIV256"/>
<Item Name="AHB3CLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_512" Type="RefParameter" Value="RCC_SYSCLK_DIV512"/>


<!-- -->
<Item Name="DMA2D" NewName="DMA2D" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2D)" Type="CLK_ENABLE" Value="__HAL_RCC_DMA2D_CLK_ENABLE"/>

<Item Name="LPTIM1" NewName="LPTIM1" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPTIM1)" Type="CLK_ENABLE" Value="__HAL_RCC_LPTIM1_CLK_ENABLE"/>
<Item Name="LPTIM2" NewName="LPTIM2" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPTIM2)" Type="CLK_ENABLE" Value="__HAL_RCC_LPTIM2_CLK_ENABLE"/>
<Item Name="LPTIM3" NewName="LPTIM3" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPTIM3)" Type="CLK_ENABLE" Value="__HAL_RCC_LPTIM3_CLK_ENABLE"/>
<Item Name="FDCAN1" NewName="FDCAN1" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_FDCAN1)" Type="CLK_ENABLE" Value="__HAL_RCC_FDCAN1_CLK_ENABLE"/>
<Item Name="USB" NewName="USB" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_USB)" Type="CLK_ENABLE" Value="__HAL_RCC_USB_CLK_ENABLE"/>
<Item Name="UCPD1" NewName="UCPD1" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_UCPD1)" Type="CLK_ENABLE" Value="__HAL_RCC_UCPD1_CLK_ENABLE"/>

<Item Name="TIM1" NewName="TIM1" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM1)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM1_CLK_ENABLE"/>
<Item Name="TIM2" NewName="TIM2" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM2_CLK_ENABLE"/>
<Item Name="TIM3" NewName="TIM3" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM3)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM3_CLK_ENABLE"/>
<Item Name="TIM4" NewName="TIM4" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM4)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM4_CLK_ENABLE"/>
<Item Name="TIM5" NewName="TIM5" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM5_CLK_ENABLE"/>
<Item Name="TIM6" NewName="TIM6" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM6_CLK_ENABLE"/>
<Item Name="TIM7" NewName="TIM7" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM7_CLK_ENABLE"/>
<Item Name="TIM8" NewName="TIM8" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM8)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM8_CLK_ENABLE"/>
<Item Name="TIM15" NewName="TIM15" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM15)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM15_CLK_ENABLE"/>
<Item Name="TIM16" NewName="TIM16" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM16)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM16_CLK_ENABLE"/>
<Item Name="TIM17" NewName="TIM17" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM17)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM17_CLK_ENABLE"/>
<Item Name="FLatency" NewName="FLatency" NewValue="LL_FLASH_LATENCY_0" Type="RefParameter" Value="FLASH_LATENCY_0"/>
<Item Name="FLatency" NewName="FLatency" NewValue="LL_FLASH_LATENCY_1" Type="RefParameter" Value="FLASH_LATENCY_1"/>
<Item Name="FLatency" NewName="FLatency" NewValue="LL_FLASH_LATENCY_2" Type="RefParameter" Value="FLASH_LATENCY_2"/>

<Item Name="Cortex_Div" NewName="Source" NewValue="LL_SYSTICK_CLKSOURCE_HCLK_DIV8" Type="RefParameter" Value="SYSTICK_CLKSOURCE_HCLK_DIV8"/>
<Item Name="Cortex_Div" NewName="Source" NewValue="LL_SYSTICK_CLKSOURCE_HCLK" Type="RefParameter" Value="SYSTICK_CLKSOURCE_HCLK"/>

<Item Name="PLLM" NewName="PLLM" NewValue="LL_RCC_PLLM_DIV_1" Type="RefParameter" Value="RCC_PLLM_DIV1"/>
<Item Name="PLLM" NewName="PLLM" NewValue="LL_RCC_PLLM_DIV_2" Type="RefParameter" Value="RCC_PLLM_DIV2"/>
<Item Name="PLLM" NewName="PLLM" NewValue="LL_RCC_PLLM_DIV_3" Type="RefParameter" Value="RCC_PLLM_DIV3"/>
<Item Name="PLLM" NewName="PLLM" NewValue="LL_RCC_PLLM_DIV_4" Type="RefParameter" Value="RCC_PLLM_DIV4"/>
<Item Name="PLLM" NewName="PLLM" NewValue="LL_RCC_PLLM_DIV_5" Type="RefParameter" Value="RCC_PLLM_DIV5"/>
<Item Name="PLLM" NewName="PLLM" NewValue="LL_RCC_PLLM_DIV_6" Type="RefParameter" Value="RCC_PLLM_DIV6"/>
<Item Name="PLLM" NewName="PLLM" NewValue="LL_RCC_PLLM_DIV_7" Type="RefParameter" Value="RCC_PLLM_DIV7"/>
<Item Name="PLLM" NewName="PLLM" NewValue="LL_RCC_PLLM_DIV_8" Type="RefParameter" Value="RCC_PLLM_DIV8"/>

<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_2" Type="RefParameter" Value="RCC_PLLP_DIV2"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_3" Type="RefParameter" Value="RCC_PLLP_DIV3"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_4" Type="RefParameter" Value="RCC_PLLP_DIV4"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_5" Type="RefParameter" Value="RCC_PLLP_DIV5"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_6" Type="RefParameter" Value="RCC_PLLP_DIV6"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_7" Type="RefParameter" Value="RCC_PLLP_DIV7"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_8" Type="RefParameter" Value="RCC_PLLP_DIV8"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_9" Type="RefParameter" Value="RCC_PLLP_DIV9"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_10" Type="RefParameter" Value="RCC_PLLP_DIV10"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_11" Type="RefParameter" Value="RCC_PLLP_DIV11"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_12" Type="RefParameter" Value="RCC_PLLP_DIV12"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_13" Type="RefParameter" Value="RCC_PLLP_DIV13"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_14" Type="RefParameter" Value="RCC_PLLP_DIV14"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_15" Type="RefParameter" Value="RCC_PLLP_DIV15"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_16" Type="RefParameter" Value="RCC_PLLP_DIV16"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_17" Type="RefParameter" Value="RCC_PLLP_DIV17"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_18" Type="RefParameter" Value="RCC_PLLP_DIV18"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_19" Type="RefParameter" Value="RCC_PLLP_DIV19"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_20" Type="RefParameter" Value="RCC_PLLP_DIV20"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_21" Type="RefParameter" Value="RCC_PLLP_DIV21"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_22" Type="RefParameter" Value="RCC_PLLP_DIV22"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_23" Type="RefParameter" Value="RCC_PLLP_DIV23"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_24" Type="RefParameter" Value="RCC_PLLP_DIV24"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_25" Type="RefParameter" Value="RCC_PLLP_DIV25"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_26" Type="RefParameter" Value="RCC_PLLP_DIV26"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_27" Type="RefParameter" Value="RCC_PLLP_DIV27"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_28" Type="RefParameter" Value="RCC_PLLP_DIV28"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_29" Type="RefParameter" Value="RCC_PLLP_DIV29"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_30" Type="RefParameter" Value="RCC_PLLP_DIV30"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_31" Type="RefParameter" Value="RCC_PLLP_DIV31"/>
<Item Name="PLLP" NewName="PLLP" NewValue="LL_RCC_PLLP_DIV_32" Type="RefParameter" Value="RCC_PLLP_DIV32"/>



<Item Name="PLLQ" NewName="PLLQ" NewValue="LL_RCC_PLLQ_DIV_2" Type="RefParameter" Value="RCC_PLLQ_DIV2"/>
<Item Name="PLLQ" NewName="PLLQ" NewValue="LL_RCC_PLLQ_DIV_3" Type="RefParameter" Value="RCC_PLLQ_DIV3"/>
<Item Name="PLLQ" NewName="PLLQ" NewValue="LL_RCC_PLLQ_DIV_4" Type="RefParameter" Value="RCC_PLLQ_DIV4"/>
<Item Name="PLLQ" NewName="PLLQ" NewValue="LL_RCC_PLLQ_DIV_5" Type="RefParameter" Value="RCC_PLLQ_DIV5"/>
<Item Name="PLLQ" NewName="PLLQ" NewValue="LL_RCC_PLLQ_DIV_6" Type="RefParameter" Value="RCC_PLLQ_DIV6"/>
<Item Name="PLLQ" NewName="PLLQ" NewValue="LL_RCC_PLLQ_DIV_7" Type="RefParameter" Value="RCC_PLLQ_DIV7"/>
<Item Name="PLLQ" NewName="PLLQ" NewValue="LL_RCC_PLLQ_DIV_8" Type="RefParameter" Value="RCC_PLLQ_DIV8"/>

<Item Name="PLLR" NewName="PLLR" NewValue="LL_RCC_PLLR_DIV_2" Type="RefParameter" Value="RCC_PLLR_DIV2"/>
<Item Name="PLLR" NewName="PLLR" NewValue="LL_RCC_PLLR_DIV_3" Type="RefParameter" Value="RCC_PLLR_DIV3"/>
<Item Name="PLLR" NewName="PLLR" NewValue="LL_RCC_PLLR_DIV_4" Type="RefParameter" Value="RCC_PLLR_DIV4"/>
<Item Name="PLLR" NewName="PLLR" NewValue="LL_RCC_PLLR_DIV_5" Type="RefParameter" Value="RCC_PLLR_DIV5"/>
<Item Name="PLLR" NewName="PLLR" NewValue="LL_RCC_PLLR_DIV_6" Type="RefParameter" Value="RCC_PLLR_DIV6"/>
<Item Name="PLLR" NewName="PLLR" NewValue="LL_RCC_PLLR_DIV_7" Type="RefParameter" Value="RCC_PLLR_DIV7"/>
<Item Name="PLLR" NewName="PLLR" NewValue="LL_RCC_PLLR_DIV_8" Type="RefParameter" Value="RCC_PLLR_DIV8"/>

<Item Name="LSIDIV" NewName="LSIDIV" NewValue="LL_RCC_LSI_PREDIV_1" Type="RefParameter" Value="RCC_LSI_DIV1"/>
<Item Name="LSIDIV" NewName="LSIDIV" NewValue="LL_RCC_LSI_PREDIV_128" Type="RefParameter" Value="RCC_LSI_DIV128"/>

<!-- CRS param-->
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_1" Type="RefParameter" Value="RCC_CRS_SYNC_DIV1"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_2" Type="RefParameter" Value="RCC_CRS_SYNC_DIV2"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_4" Type="RefParameter" Value="RCC_CRS_SYNC_DIV4"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_8" Type="RefParameter" Value="RCC_CRS_SYNC_DIV8"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_16" Type="RefParameter" Value="RCC_CRS_SYNC_DIV16"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_32" Type="RefParameter" Value="RCC_CRS_SYNC_DIV32"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_64" Type="RefParameter" Value="RCC_CRS_SYNC_DIV64"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_128" Type="RefParameter" Value="RCC_CRS_SYNC_DIV128"/>

<Item Name="Source" NewName="Source" NewValue="LL_CRS_SYNC_SOURCE_USB" Type="RefParameter" Value="RCC_CRS_SYNC_SOURCE_USB"/>
<Item Name="Source" NewName="Source" NewValue="LL_CRS_SYNC_SOURCE_LSE" Type="RefParameter" Value="RCC_CRS_SYNC_SOURCE_LSE"/>
<Item Name="Source" NewName="Source" NewValue="LL_CRS_SYNC_SOURCE_GPIO" Type="RefParameter" Value="RCC_CRS_SYNC_SOURCE_GPIO"/>

<Item Name="Polarity" NewName="Polarity" NewValue="LL_CRS_SYNC_POLARITY_RISING" Type="RefParameter" Value="RCC_CRS_SYNC_POLARITY_RISING"/>
<Item Name="Polarity" NewName="Polarity" NewValue="LL_CRS_SYNC_POLARITY_FALLING" Type="RefParameter" Value="RCC_CRS_SYNC_POLARITY_FALLING"/>

<Item Name="LSE_Drive_Capability" NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_LOW" Type="RefParameter" Value="RCC_LSEDRIVE_LOW"/>
<Item Name="LSE_Drive_Capability" NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_MEDIUMLOW" Type="RefParameter" Value="RCC_LSEDRIVE_MEDIUMLOW"/>
<Item Name="LSE_Drive_Capability" NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_MEDIUMHIGH" Type="RefParameter" Value="RCC_LSEDRIVE_MEDIUMHIGH"/>
<Item Name="LSE_Drive_Capability" NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_HIGH" Type="RefParameter" Value="RCC_LSEDRIVE_HIGH"/>


<Item Name="I2S2CLockSelection" NewName="Source" NewValue="LL_RCC_I2S2_CLKSOURCE_PLL" Type="RefParameter" Value="RCC_I2S2CLKSOURCE_PLL"/>
<Item Name="I2S2CLockSelection" NewName="Source" NewValue="LL_RCC_I2S2_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_I2S2CLKSOURCE_HSI"/>
<Item Name="I2S2CLockSelection" NewName="Source" NewValue="LL_RCC_I2S2_CLKSOURCE_PIN" Type="RefParameter" Value="RCC_I2S2CLKSOURCE_PIN"/>

<!-- CLK Enable MAcros -->
<Item Name="PA" NewName="PA" NewValue="LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOA_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="PB" NewName="PB" NewValue="LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOB_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="PC" NewName="PC" NewValue="LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOC_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="PH" NewName="PH" NewValue="LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOH)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOH_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>

<Item Name="DMA1" NewName="DMA1" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1)" Type="CLK_ENABLE" Value="__HAL_RCC_DMA1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="DMAMUX1" NewName="DMAMUX1" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMAMUX1)" Type="CLK_ENABLE" Value="__HAL_RCC_DMAMUX1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="DMA1" NewName="DMA1" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMAMUX1)" Type="CLK_ENABLE" Value="__HAL_RCC_DMAMUX1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="DMA2" NewName="DMA2" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMAMUX1)" Type="CLK_ENABLE" Value="__HAL_RCC_DMAMUX1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="DMA2" NewName="DMA2" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2)" Type="CLK_ENABLE" Value="__HAL_RCC_DMA2_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="CRC" NewName="CRC" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC)" Type="CLK_ENABLE" Value="__HAL_RCC_CRC_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>

<Item Name="AES" NewName="AES" NewValue="LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_AES)" Type="CLK_ENABLE" Value="__HAL_RCC_AES_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="PKA" NewName="PKA" NewValue="LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_PKA)" Type="CLK_ENABLE" Value="__HAL_RCC_PKA_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="RNG" NewName="RNG" NewValue="LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_RNG)" Type="CLK_ENABLE" Value="__HAL_RCC_RNG_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="HSEM" NewName="HSEM" NewValue="LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_HSEM)" Type="CLK_ENABLE" Value="__HAL_RCC_HSEM_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="IPCC" NewName="IPCC" NewValue="LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC)" Type="CLK_ENABLE" Value="__HAL_RCC_IPCC_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="FLASH" NewName="FLASH" NewValue="LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_FLASH)" Type="CLK_ENABLE" Value="__HAL_RCC_FLASH_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="RTC" NewName="RTC" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_RTCAPB)" Type="CLK_ENABLE" Value="__HAL_RCC_RTC_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="RTC" NewName="RTC" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_RTCAPB)" Type="CLK_ENABLE" Value="__HAL_RCC_RTCAPB_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="RTC" NewName="RTC" NewValue="LL_RCC_EnableRTC" Type="CLK_ENABLE" Value="__HAL_RCC_RTC_ENABLE"/>
<Item Name="WWDG" NewName="WWDG" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_WWDG)" Type="CLK_ENABLE" Value="__HAL_RCC_WWDG_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="TIM2" NewName="TIM2" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM2_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="SPI2" NewName="SPI2" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2)" Type="CLK_ENABLE" Value="__HAL_RCC_SPI2_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="I2S2" NewName="I2S2" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2)" Type="CLK_ENABLE" Value="__HAL_RCC_SPI2_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="USART2" NewName="USART2" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2)" Type="CLK_ENABLE" Value="__HAL_RCC_USART2_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="I2C1" NewName="I2C1" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1)" Type="CLK_ENABLE" Value="__HAL_RCC_I2C1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="I2C2" NewName="I2C2" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2)" Type="CLK_ENABLE" Value="__HAL_RCC_I2C2_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="I2C3" NewName="I2C3" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C3)" Type="CLK_ENABLE" Value="__HAL_RCC_I2C3_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="DAC" NewName="DAC" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DAC)" Type="CLK_ENABLE" Value="__HAL_RCC_DAC_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="LPTIM1" NewName="LPTIM1" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPTIM1)" Type="CLK_ENABLE" Value="__HAL_RCC_LPTIM1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>

<Item Name="LPTIM2" NewName="LPTIM2" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPTIM2)" Type="CLK_ENABLE" Value="__HAL_RCC_LPTIM2_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="LPTIM3" NewName="LPTIM3" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPTIM3)" Type="CLK_ENABLE" Value="__HAL_RCC_LPTIM3_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="LPUART1" NewName="LPUART1" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPUART1)" Type="CLK_ENABLE" Value="__HAL_RCC_LPUART1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="LPUART2" NewName="LPUART2" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPUART2)" Type="CLK_ENABLE" Value="__HAL_RCC_LPUART2_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>

<Item Name="ADC" NewName="ADC" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_ADC)" Type="CLK_ENABLE" Value="__HAL_RCC_ADC_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="TIM1" NewName="TIM1" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM1)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="SPI1" NewName="SPI1" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1)" Type="CLK_ENABLE" Value="__HAL_RCC_SPI1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="I2S1" NewName="I2S1" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1)" Type="CLK_ENABLE" Value="__HAL_RCC_SPI1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="USART1" NewName="USART1" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1)" Type="CLK_ENABLE" Value="__HAL_RCC_USART1_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>

<Item Name="TIM16" NewName="TIM16" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM16)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM16_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>
<Item Name="TIM17" NewName="TIM17" NewValue="LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM17)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM17_CLK_ENABLE" Condition="!ARM_CORTEX_M0PLUS"/>

<Item Name="DMA1" NewName="DMA1" NewValue="LL_C2_AHB1_GRP1_EnableClock(LL_C2_AHB1_GRP1_PERIPH_DMA1)" Type="CLK_ENABLE" Value="__HAL_RCC_DMA1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="DMA2" NewName="DMA2" NewValue="LL_C2_AHB1_GRP1_EnableClock(LL_C2_AHB1_GRP1_PERIPH_DMA2)" Type="CLK_ENABLE" Value="__HAL_RCC_DMA2_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="DMA1" NewName="DMA1" NewValue="LL_C2_AHB1_GRP1_EnableClock(LL_C2_AHB1_GRP1_PERIPH_DMAMUX1)" Type="CLK_ENABLE" Value="__HAL_RCC_DMAMUX1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="DMAMUX1" NewName="DMAMUX1" NewValue="LL_C2_AHB1_GRP1_EnableClock(LL_C2_AHB1_GRP1_PERIPH_DMAMUX1)" Type="CLK_ENABLE" Value="__HAL_RCC_DMAMUX1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="DMA2" NewName="DMA2" NewValue="LL_C2_AHB1_GRP1_EnableClock(LL_C2_AHB1_GRP1_PERIPH_DMAMUX1)" Type="CLK_ENABLE" Value="__HAL_RCC_DMAMUX1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="CRC" NewName="CRC" NewValue="LL_C2_AHB1_GRP1_EnableClock(LL_C2_AHB1_GRP1_PERIPH_CRC)" Type="CLK_ENABLE" Value="__HAL_RCC_CRC_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>

 
<Item Name="PA" NewName="PA" NewValue="LL_C2_AHB2_GRP1_EnableClock(LL_C2_AHB2_GRP1_PERIPH_GPIOA)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOA_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="PB" NewName="PB" NewValue="LL_C2_AHB2_GRP1_EnableClock(LL_C2_AHB2_GRP1_PERIPH_GPIOB)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOB_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="PC" NewName="PC" NewValue="LL_C2_AHB2_GRP1_EnableClock(LL_C2_AHB2_GRP1_PERIPH_GPIOC)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOC_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="PH" NewName="PH" NewValue="LL_C2_AHB2_GRP1_EnableClock(LL_C2_AHB2_GRP1_PERIPH_GPIOH)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOH_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>

<Item Name="AES" NewName="AES" NewValue="LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_AES)" Type="CLK_ENABLE" Value="__HAL_RCC_AES_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="PKA" NewName="PKA" NewValue="LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_PKA)" Type="CLK_ENABLE" Value="__HAL_RCC_PKA_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="RNG" NewName="RNG" NewValue="LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_RNG)" Type="CLK_ENABLE" Value="__HAL_RCC_RNG_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="HSEM" NewName="HSEM" NewValue="LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_HSEM)" Type="CLK_ENABLE" Value="__HAL_RCC_HSEM_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="IPCC" NewName="IPCC" NewValue="LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_IPCC)" Type="CLK_ENABLE" Value="__HAL_RCC_IPCC_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="FLASH" NewName="FLASH" NewValue="LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_FLASH)" Type="CLK_ENABLE" Value="__HAL_RCC_FLASH_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>

<Item Name="RTCAPB" NewName="RTCAPB" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_RTCAPB)" Type="CLK_ENABLE" Value="__HAL_RCC_RTCAPB_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="RTC" NewName="RTC" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_RTCAPB)" Type="CLK_ENABLE" Value="__HAL_RCC_RTCAPB_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="RTC" NewName="RTC" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_RTC)" Type="CLK_ENABLE" Value="__HAL_RCC_RTC_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="SPI2" NewName="SPI2" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_SPI2)" Type="CLK_ENABLE" Value="__HAL_RCC_SPI2_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="I2S2" NewName="I2S2" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_SPI2)" Type="CLK_ENABLE" Value="__HAL_RCC_SPI2_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="USART2" NewName="USART2" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_USART2)" Type="CLK_ENABLE" Value="__HAL_RCC_USART2_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="I2C1" NewName="I2C1" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_I2C1)" Type="CLK_ENABLE" Value="__HAL_RCC_I2C1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="I2C2" NewName="I2C2" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_I2C2)" Type="CLK_ENABLE" Value="__HAL_RCC_I2C2_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="I2C3" NewName="I2C3" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_I2C3)" Type="CLK_ENABLE" Value="__HAL_RCC_I2C3_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="DAC" NewName="DAC" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_DAC)" Type="CLK_ENABLE" Value="__HAL_RCC_DAC_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="LPTIM1" NewName="LPTIM1" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_LPTIM1)" Type="CLK_ENABLE" Value="__HAL_RCC_LPTIM1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="TIM2" NewName="TIM2" NewValue="LL_C2_APB1_GRP1_EnableClock(LL_C2_APB1_GRP1_PERIPH_TIM2)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM2_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="USART1" NewName="USART1" NewValue="LL_C2_APB2_GRP1_EnableClock(LL_C2_APB2_GRP1_PERIPH_USART1)" Type="CLK_ENABLE" Value="__HAL_RCC_USART1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/> 
<Item Name="TIM1" NewName="TIM1" NewValue="LL_C2_APB2_GRP1_EnableClock(LL_C2_APB2_GRP1_PERIPH_TIM1)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="SPI1" NewName="SPI1" NewValue="LL_C2_APB2_GRP1_EnableClock(LL_C2_APB2_GRP1_PERIPH_SPI1)" Type="CLK_ENABLE" Value="__HAL_RCC_SPI1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="I2S1" NewName="I2S1" NewValue="LL_C2_APB2_GRP1_EnableClock(LL_C2_APB2_GRP1_PERIPH_SPI1)" Type="CLK_ENABLE" Value="__HAL_RCC_SPI1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>

<Item Name="TIM16" NewName="TIM16" NewValue="LL_C2_APB2_GRP1_EnableClock(LL_C2_APB2_GRP1_PERIPH_TIM16)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM16_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="TIM17" NewName="TIM17" NewValue="LL_C2_APB2_GRP1_EnableClock(LL_C2_APB2_GRP1_PERIPH_TIM17)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM17_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="ADC" NewName="ADC" NewValue="LL_C2_APB2_GRP1_EnableClock(LL_C2_APB2_GRP1_PERIPH_ADC)" Type="CLK_ENABLE" Value="__HAL_RCC_ADC_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>

<Item Name="SUBGHZSPI" NewName="SUBGHZSPI" NewValue="LL_C2_APB3_GRP1_EnableClock(LL_C2_APB3_GRP1_PERIPH_SUBGHZSPI)" Type="CLK_ENABLE" Value="__HAL_RCC_SUBGHZSPI_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="LPUART1" NewName="LPUART1" NewValue="LL_C2_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPUART1)" Type="CLK_ENABLE" Value="__HAL_RCC_LPUART1_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
<Item Name="LPUART2" NewName="LPUART2" NewValue="LL_C2_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPUART2)" Type="CLK_ENABLE" Value="__HAL_RCC_LPUART2_CLK_ENABLE" Condition="ARM_CORTEX_M0PLUS"/>
</HALvsLL>
