<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<HALvsLL xmlns="http://mcd.rou.st.com/modules.php?name=mcu"
	xmlns:ns0="http://www.w3.org/2001/XMLSchema-instance"
	ns0:schemaLocation="http://mcd.rou.st.com/modules.php?name=mcu 
    ../../../../../../../../doc/V4/Development/Specifications/db/IP_DefMapping.xsd"
    Version="" DBVersion="4.0">
<Item Name="APB1CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB1_DIV_1" Type="RefParameter" Value="RCC_HCLK_DIV1"/>
<Item Name="APB1CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB1_DIV_16" Type="RefParameter" Value="RCC_HCLK_DIV16"/>
<Item Name="APB1CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB1_DIV_2" Type="RefParameter" Value="RCC_HCLK_DIV2"/>
<Item Name="APB1CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB1_DIV_4" Type="RefParameter" Value="RCC_HCLK_DIV4"/>
<Item Name="APB1CLKDivider" NewName="Prescaler" NewValue="LL_RCC_APB1_DIV_8" Type="RefParameter" Value="RCC_HCLK_DIV8"/>

<Item Name="I2c1ClockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C1_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_I2C1CLKSOURCE_HSI"/>
<Item Name="I2c1ClockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C1_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_I2C1CLKSOURCE_PCLK1"/>
<Item Name="I2c1ClockSelection" NewName="I2CxSource" NewValue="LL_RCC_I2C1_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_I2C1CLKSOURCE_SYSCLK"/>

<Item Name="RTCClockSelection" NewName="Source" NewValue="LL_RCC_RTC_CLKSOURCE_HSE_DIV32" Type="RefParameter" Value="RCC_RTCCLKSOURCE_HSE_DIV32"/>
<Item Name="RTCClockSelection" NewName="Source" NewValue="LL_RCC_RTC_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_RTCCLKSOURCE_LSE"/>
<Item Name="RTCClockSelection" NewName="Source" NewValue="LL_RCC_RTC_CLKSOURCE_LSI" Type="RefParameter" Value="RCC_RTCCLKSOURCE_LSI"/>

<Item Name="Usart1ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART1_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_USART1CLKSOURCE_HSI"/>
<Item Name="Usart1ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART1_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_USART1CLKSOURCE_LSE"/>
<Item Name="Usart1ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART1_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_USART1CLKSOURCE_PCLK1"/>
<Item Name="Usart1ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART1_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_USART1CLKSOURCE_SYSCLK"/>

<Item Name="Usart2ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART2_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_USART2CLKSOURCE_HSI"/>
<Item Name="Usart2ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART2_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_USART2CLKSOURCE_LSE"/>
<Item Name="Usart2ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART2_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_USART2CLKSOURCE_PCLK1"/>
<Item Name="Usart2ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART2_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_USART2CLKSOURCE_SYSCLK"/>

<Item Name="Usart3ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART3_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_USART3CLKSOURCE_HSI"/>
<Item Name="Usart3ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART3_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_USART3CLKSOURCE_LSE"/>
<Item Name="Usart3ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART3_CLKSOURCE_PCLK1" Type="RefParameter" Value="RCC_USART3CLKSOURCE_PCLK1"/>
<Item Name="Usart3ClockSelection" NewName="USARTxSource" NewValue="LL_RCC_USART3_CLKSOURCE_SYSCLK" Type="RefParameter" Value="RCC_USART3CLKSOURCE_SYSCLK"/>

<Item Name="USBClockSelectionARG" NewName="USBxSource" NewValue="LL_RCC_USB_CLKSOURCE_HSI48" Type="RefParameter" Value="RCC_USBCLKSOURCE_HSI48"/>
<Item Name="USBClockSelectionARG" NewName="USBxSource" NewValue="LL_RCC_USB_CLKSOURCE_PLL"   Type="RefParameter" Value="RCC_USBCLKSOURCE_PLL"/>

<Item Name="CECClockSelection" NewName="CECxSource" NewValue="LL_RCC_CEC_CLKSOURCE_HSI_DIV244" Type="RefParameter" Value="RCC_CECCLKSOURCE_HSI"/>
<Item Name="CECClockSelection" NewName="CECxSource" NewValue="LL_RCC_CEC_CLKSOURCE_LSE" Type="RefParameter" Value="RCC_CECCLKSOURCE_LSE"/>


<Item NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_HIGH" Type="RefParameter" Value="RCC_LSEDRIVE_HIGH"/>
<Item NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_LOW" Type="RefParameter" Value="RCC_LSEDRIVE_LOW"/>
<Item NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_MEDIUMHIGH" Type="RefParameter" Value="RCC_LSEDRIVE_MEDIUMHIGH"/>
<Item NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_MEDIUMLOW" Type="RefParameter" Value="RCC_LSEDRIVE_MEDIUMLOW"/>
<Item LLFunctions="LL_RCC_HSE_EnableBypass,LL_RCC_HSE_Enable" Name="HSEState" Type="RefParameter" Value="RCC_HSE_BYPASS"/>
<Item LLFunctions="LL_RCC_HSE_Disable" Name="HSEState" Type="RefParameter" Value="RCC_HSE_OFF"/>
<Item LLFunctions="LL_RCC_HSE_Enable" Name="HSEState" Type="RefParameter" Value="RCC_HSE_ON"/>
<Item LLFunctions="LL_RCC_HSI_Disable" Name="HSIState" Type="RefParameter" Value="RCC_HSI_OFF"/>
<Item LLFunctions="LL_RCC_HSI_Enable" Name="HSIState" Type="RefParameter" Value="RCC_HSI_ON"/>
<Item LLFunctions="LL_RCC_HSI48_Disable" Name="HSI48State" Type="RefParameter" Value="RCC_HSI48_OFF"/>
<Item LLFunctions="LL_RCC_HSI48_Enable" Name="HSI48State" Type="RefParameter" Value="RCC_HSI48_ON"/>

<Item LLFunctions="LL_RCC_LSE_EnableBypass,LL_RCC_LSE_Enable" Name="LSEState" Type="RefParameter" Value="RCC_LSE_BYPASS"/>
<Item LLFunctions="LL_RCC_LSE_Disable" Name="LSEState" Type="RefParameter" Value="RCC_LSE_OFF"/>
<Item LLFunctions="LL_RCC_LSE_Enable" Name="LSEState" Type="RefParameter" Value="RCC_LSE_ON"/>
<Item LLFunctions="LL_RCC_LSI_Disable" Name="LSIState" Type="RefParameter" Value="RCC_LSI_OFF"/>
<Item LLFunctions="LL_RCC_LSI_Enable" Name="LSIState" Type="RefParameter" Value="RCC_LSI_ON"/>

<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_1" Type="RefParameter" Value="RCC_MCODIV_1"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_16" Type="RefParameter" Value="RCC_MCODIV_16"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_2" Type="RefParameter" Value="RCC_MCODIV_2"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_4" Type="RefParameter" Value="RCC_MCODIV_4"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_8" Type="RefParameter" Value="RCC_MCODIV_8"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_32" Type="RefParameter" Value="RCC_MCODIV_32"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_64" Type="RefParameter" Value="RCC_MCODIV_64"/>
<Item Name="RCC_MCODiv" NewName="MCOxPrescaler" NewValue="LL_RCC_MCO1_DIV_128" Type="RefParameter" Value="RCC_MCODIV_128"/>


<Item Name="RCC_MCOSource" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_SYSCLK" Type="RefParameter" Value="RCC_MCO1SOURCE_SYSCLK"/>
<Item Name="RCC_MCOSource" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_HSI" Type="RefParameter" Value="RCC_MCO1SOURCE_HSI"/>
<Item Name="RCC_MCOSource"  NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_HSI48" Type="RefParameter" Value="RCC_MCO1SOURCE_HSI48"/>
<Item Name="RCC_MCOSource" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_HSI14" Type="RefParameter" Value="RCC_MCO1SOURCE_HSI14"/>
<Item Name="RCC_MCOSource" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_HSE" Type="RefParameter" Value="RCC_MCO1SOURCE_HSE"/>
<Item Name="RCC_MCOSource" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_LSI" Type="RefParameter" Value="RCC_MCO1SOURCE_LSI"/>
<Item Name="RCC_MCOSource" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_LSE" Type="RefParameter" Value="RCC_MCO1SOURCE_LSE"/>
<Item Name="RCC_MCOSource" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_PLLCLK_DIV_2" Type="RefParameter" Value="RCC_MCO1SOURCE_PLLCLK_DIV2"/>
<Item Name="RCC_MCOSource" NewName="MCOxSource" NewValue="LL_RCC_MCO1SOURCE_PLLCLK" Type="RefParameter" Value="RCC_MCO1SOURCE_PLLCLK"/>



<Item Name="PLLSource" NewName="Source" NewValue="LL_RCC_PLLSOURCE_HSE" Type="RefParameter" Value="RCC_PLLSOURCE_HSE"/>
<Item Name="PLLSource" NewName="Source" NewValue="LL_RCC_PLLSOURCE_HSI" Type="RefParameter" Value="RCC_PLLSOURCE_HSI"/>
<Item Name="PLLSource" NewName="Source" NewValue="LL_RCC_PLLSOURCE_HSI48" Type="RefParameter" Value="RCC_PLLSOURCE_HSI48"/>

<Item Name="PLLSourceVirtual" NewName="Source" NewValue="LL_RCC_PLLSOURCE_HSE" Type="RefParameter" Value="RCC_PLLSOURCE_HSE"/>
<Item Name="PLLSourceVirtual" NewName="Source" NewValue="LL_RCC_PLLSOURCE_HSI" Type="RefParameter" Value="RCC_PLLSOURCE_HSI"/>
<Item Name="PLLSourceVirtual" NewName="Source" NewValue="LL_RCC_PLLSOURCE_HSI48" Type="RefParameter" Value="RCC_PLLSOURCE_HSI48"/>
<Item NewName="Source" NewValue="LL_RCC_PLLSOURCE_NONE" Type="RefParameter" Value="RCC_PLLSOURCE_NONE"/>
<Item Name="SYSCLKSource" NewName="Source" NewValue="LL_RCC_SYS_CLKSOURCE_HSE" Type="RefParameter" Value="RCC_SYSCLKSOURCE_HSE"/>
<Item Name="SYSCLKSource" NewName="Source" NewValue="LL_RCC_SYS_CLKSOURCE_HSI" Type="RefParameter" Value="RCC_SYSCLKSOURCE_HSI"/>
<Item Name="SYSCLKSource" NewName="Source" NewValue="LL_RCC_SYS_CLKSOURCE_HSI48" Type="RefParameter" Value="RCC_SYSCLKSOURCE_HSI48"/>
<Item Name="SYSCLKSource" NewName="Source" NewValue="LL_RCC_SYS_CLKSOURCE_PLL" Type="RefParameter" Value="RCC_SYSCLKSOURCE_PLLCLK"/>
<Item NewValue="LL_RCC_SYS_CLKSOURCE_STATUS_HSE" Type="RefParameter" Value="RCC_SYSCLKSOURCE_STATUS_HSE"/>
<Item NewValue="LL_RCC_SYS_CLKSOURCE_STATUS_HSI" Type="RefParameter" Value="RCC_SYSCLKSOURCE_STATUS_HSI"/>
<Item NewValue="LL_RCC_SYS_CLKSOURCE_STATUS_MSI" Type="RefParameter" Value="RCC_SYSCLKSOURCE_STATUS_MSI"/>
<Item NewValue="LL_RCC_SYS_CLKSOURCE_STATUS_PLL" Type="RefParameter" Value="RCC_SYSCLKSOURCE_STATUS_PLLCLK"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_1" Type="RefParameter" Value="RCC_SYSCLK_DIV1"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_128" Type="RefParameter" Value="RCC_SYSCLK_DIV128"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_16" Type="RefParameter" Value="RCC_SYSCLK_DIV16"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_2" Type="RefParameter" Value="RCC_SYSCLK_DIV2"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_256" Type="RefParameter" Value="RCC_SYSCLK_DIV256"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_4" Type="RefParameter" Value="RCC_SYSCLK_DIV4"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_512" Type="RefParameter" Value="RCC_SYSCLK_DIV512"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_64" Type="RefParameter" Value="RCC_SYSCLK_DIV64"/>
<Item Name="AHBCLKDivider" NewName="Prescaler" NewValue="LL_RCC_SYSCLK_DIV_8" Type="RefParameter" Value="RCC_SYSCLK_DIV8"/>


<Item Name="FLatency" NewName="FLatency" NewValue="LL_FLASH_LATENCY_0" Type="RefParameter" Value="FLASH_LATENCY_0"/>
<Item Name="FLatency" NewName="FLatency" NewValue="LL_FLASH_LATENCY_1" Type="RefParameter" Value="FLASH_LATENCY_1"/>


<Item Name="TimSys_Div" NewName="Source" NewValue="LL_SYSTICK_CLKSOURCE_HCLK_DIV8" Type="RefParameter" Value="SYSTICK_CLKSOURCE_HCLK_DIV8"/>
<Item Name="TimSys_Div" NewName="Source" NewValue="LL_SYSTICK_CLKSOURCE_HCLK" Type="RefParameter" Value="SYSTICK_CLKSOURCE_HCLK"/>

<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_2" Type="RefParameter" Value="RCC_PLL_MUL2"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_3" Type="RefParameter" Value="RCC_PLL_MUL3"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_4" Type="RefParameter" Value="RCC_PLL_MUL4"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_5" Type="RefParameter" Value="RCC_PLL_MUL5"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_6" Type="RefParameter" Value="RCC_PLL_MUL6"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_7" Type="RefParameter" Value="RCC_PLL_MUL7"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_8" Type="RefParameter" Value="RCC_PLL_MUL8"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_9" Type="RefParameter" Value="RCC_PLL_MUL9"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_10" Type="RefParameter" Value="RCC_PLL_MUL10"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_11" Type="RefParameter" Value="RCC_PLL_MUL11"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_12" Type="RefParameter" Value="RCC_PLL_MUL12"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_13" Type="RefParameter" Value="RCC_PLL_MUL13"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_14" Type="RefParameter" Value="RCC_PLL_MUL14"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_15" Type="RefParameter" Value="RCC_PLL_MUL15"/>
<Item Name="PLLMUL" NewName="PLLMul" NewValue="LL_RCC_PLL_MUL_16" Type="RefParameter" Value="RCC_PLL_MUL16"/>


<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_1" Type="RefParameter" Value="RCC_PREDIV_DIV1"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_2" Type="RefParameter" Value="RCC_PREDIV_DIV2"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_3" Type="RefParameter" Value="RCC_PREDIV_DIV3"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_4" Type="RefParameter" Value="RCC_PREDIV_DIV4"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_5" Type="RefParameter" Value="RCC_PREDIV_DIV5"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_6" Type="RefParameter" Value="RCC_PREDIV_DIV6"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_7" Type="RefParameter" Value="RCC_PREDIV_DIV7"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_8" Type="RefParameter" Value="RCC_PREDIV_DIV8"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_9" Type="RefParameter" Value="RCC_PREDIV_DIV9"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_10" Type="RefParameter" Value="RCC_PREDIV_DIV10"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_11" Type="RefParameter" Value="RCC_PREDIV_DIV11"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_12" Type="RefParameter" Value="RCC_PREDIV_DIV12"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_13" Type="RefParameter" Value="RCC_PREDIV_DIV13"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_14" Type="RefParameter" Value="RCC_PREDIV_DIV14"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_15" Type="RefParameter" Value="RCC_PREDIV_DIV15"/>
<Item Name="PLLDivider" NewName="PLLDiv" NewValue="LL_RCC_PREDIV_DIV_16" Type="RefParameter" Value="RCC_PREDIV_DIV16"/>




<!-- CRS param-->
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_1" Type="RefParameter" Value="RCC_CRS_SYNC_DIV1"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_2" Type="RefParameter" Value="RCC_CRS_SYNC_DIV2"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_4" Type="RefParameter" Value="RCC_CRS_SYNC_DIV4"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_8" Type="RefParameter" Value="RCC_CRS_SYNC_DIV8"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_16" Type="RefParameter" Value="RCC_CRS_SYNC_DIV16"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_32" Type="RefParameter" Value="RCC_CRS_SYNC_DIV32"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_64" Type="RefParameter" Value="RCC_CRS_SYNC_DIV64"/>
<Item Name="Prescaler" NewName="Divider" NewValue="LL_CRS_SYNC_DIV_128" Type="RefParameter" Value="RCC_CRS_SYNC_DIV128"/>

<Item Name="Source" NewName="Source" NewValue="LL_CRS_SYNC_SOURCE_USB" Type="RefParameter" Value="RCC_CRS_SYNC_SOURCE_USB"/>
<Item Name="Source" NewName="Source" NewValue="LL_CRS_SYNC_SOURCE_LSE" Type="RefParameter" Value="RCC_CRS_SYNC_SOURCE_LSE"/>
<Item Name="Source" NewName="Source" NewValue="LL_CRS_SYNC_SOURCE_GPIO" Type="RefParameter" Value="RCC_CRS_SYNC_SOURCE_GPIO"/>

<Item Name="Polarity" NewName="Polarity" NewValue="LL_CRS_SYNC_POLARITY_RISING" Type="RefParameter" Value="RCC_CRS_SYNC_POLARITY_RISING"/>
<Item Name="Polarity" NewName="Polarity" NewValue="LL_CRS_SYNC_POLARITY_FALLING" Type="RefParameter" Value="RCC_CRS_SYNC_POLARITY_FALLING"/>

<Item Name="LSE_Drive_Capability" NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_LOW" Type="RefParameter" Value="RCC_LSEDRIVE_LOW"/>
<Item Name="LSE_Drive_Capability" NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_MEDIUMLOW" Type="RefParameter" Value="RCC_LSEDRIVE_MEDIUMLOW"/>
<Item Name="LSE_Drive_Capability" NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_MEDIUMHIGH" Type="RefParameter" Value="RCC_LSEDRIVE_MEDIUMHIGH"/>
<Item Name="LSE_Drive_Capability" NewName="LSEDrive" NewValue="LL_RCC_LSEDRIVE_HIGH" Type="RefParameter" Value="RCC_LSEDRIVE_HIGH"/>

<Item Name="DMA1" NewName="DMA1" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1)" Type="CLK_ENABLE" Value="__HAL_RCC_DMA1_CLK_ENABLE"/>
<Item Name="DMA2" NewName="DMA2" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2)" Type="CLK_ENABLE" Value="__HAL_RCC_DMA2_CLK_ENABLE"/>
<Item Name="SRAM" NewName="SRAM" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_SRAM)" Type="CLK_ENABLE" Value="__HAL_RCC_SRAM_CLK_ENABLE"/>
<Item Name="FLASH" NewName="FLASH" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_FLASH)" Type="CLK_ENABLE" Value="__HAL_RCC_FLASH_CLK_ENABLE"/>
<Item Name="CRC" NewName="CRC" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC)" Type="CLK_ENABLE" Value="__HAL_RCC_CRC_CLK_ENABLE"/>
<Item Name="PA" NewName="PA" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOA_CLK_ENABLE"/>
<Item Name="PB" NewName="PB" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOB_CLK_ENABLE"/>
<Item Name="PC" NewName="PC" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOC_CLK_ENABLE"/>
<Item Name="PD" NewName="PD" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOD)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOD_CLK_ENABLE"/>
<Item Name="PE" NewName="PE" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOE_CLK_ENABLE"/>
<Item Name="PF" NewName="PF" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF)" Type="CLK_ENABLE" Value="__HAL_RCC_GPIOF_CLK_ENABLE"/>
<Item Name="TSC" NewName="TSC" NewValue="LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_TSC)" Type="CLK_ENABLE" Value="__HAL_RCC_TSC_CLK_ENABLE"/>
<Item Name="RTC" NewName="RTC" NewValue="LL_RCC_EnableRTC" Type="CLK_ENABLE" Value="__HAL_RCC_RTC_ENABLE"/>



<Item Name="TIM2" NewName="TIM2" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM2_CLK_ENABLE"/>
<Item Name="TIM3" NewName="TIM3" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM3)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM3_CLK_ENABLE"/>
<Item Name="TIM6" NewName="TIM6" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM6_CLK_ENABLE"/>
<Item Name="TIM7" NewName="TIM7" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM7_CLK_ENABLE"/>
<Item Name="TIM14" NewName="TIM14" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM14)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM14_CLK_ENABLE"/>
<Item Name="WWDG" NewName="WWDG" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_WWDG)" Type="CLK_ENABLE" Value="__HAL_RCC_WWDG_CLK_ENABLE"/>
<Item Name="SPI2" NewName="SPI2" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2)" Type="CLK_ENABLE" Value="__HAL_RCC_SPI2_CLK_ENABLE"/>
<Item Name="USART2" NewName="USART2" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2)" Type="CLK_ENABLE" Value="__HAL_RCC_USART2_CLK_ENABLE"/>
<Item Name="USART3" NewName="USART3" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART3)" Type="CLK_ENABLE" Value="__HAL_RCC_USART3_CLK_ENABLE"/>
<Item Name="USART4" NewName="USART4" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART4)" Type="CLK_ENABLE" Value="__HAL_RCC_USART4_CLK_ENABLE"/>
<Item Name="USART5" NewName="USART5" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART5)" Type="CLK_ENABLE" Value="__HAL_RCC_USART5_CLK_ENABLE"/>
<Item Name="I2C1" NewName="I2C1" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1)" Type="CLK_ENABLE" Value="__HAL_RCC_I2C1_CLK_ENABLE"/>
<Item Name="I2C2" NewName="I2C2" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2)" Type="CLK_ENABLE" Value="__HAL_RCC_I2C2_CLK_ENABLE"/>
<Item Name="USB" NewName="USB" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USB)" Type="CLK_ENABLE" Value="__HAL_RCC_USB_CLK_ENABLE"/>
<Item Name="CAN" NewName="CAN" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CAN)" Type="CLK_ENABLE" Value="__HAL_RCC_CAN_CLK_ENABLE"/>
<Item Name="CRS" NewName="CRS" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CRS)" Type="CLK_ENABLE" Value="__HAL_RCC_CRS_CLK_ENABLE"/>
<Item Name="SYS" NewName="SYS" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR)" Type="CLK_ENABLE" Value="__HAL_RCC_PWR_CLK_ENABLE"/>
<Item Name="DAC" NewName="DAC" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DAC1)" Type="CLK_ENABLE" Value="__HAL_RCC_DAC1_CLK_ENABLE"/>
<Item Name="DAC" NewName="DAC" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DAC1)" Type="CLK_ENABLE" Value="__HAL_RCC_DAC_CLK_ENABLE"/>
<Item Name="DAC1" NewName="DAC1" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DAC1)" Type="CLK_ENABLE" Value="__HAL_RCC_DAC1_CLK_ENABLE"/>

<Item Name="CEC" NewName="CEC" NewValue="LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CEC)" Type="CLK_ENABLE" Value="__HAL_RCC_CEC_CLK_ENABLE"/>


<Item Name="SYS" NewName="SYS" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SYSCFG)" Type="CLK_ENABLE" Value="__HAL_RCC_SYSCFG_CLK_ENABLE"/>
<Item Name="ADC1" NewName="ADC1" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_ADC1)" Type="CLK_ENABLE" Value="__HAL_RCC_ADC1_CLK_ENABLE"/>
<Item Name="ADC" NewName="ADC" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_ADC1)" Type="CLK_ENABLE" Value="__HAL_RCC_ADC1_CLK_ENABLE"/>

<Item Name="USART8" NewName="USART8" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_USART8)" Type="CLK_ENABLE" Value="__HAL_RCC_USART8_CLK_ENABLE"/>
<Item Name="USART7" NewName="USART7" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_USART7)" Type="CLK_ENABLE" Value="__HAL_RCC_USART7_CLK_ENABLE"/>
<Item Name="USART6" NewName="USART6" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_USART6)" Type="CLK_ENABLE" Value="__HAL_RCC_USART6_CLK_ENABLE"/>
<Item Name="TIM1" NewName="TIM1" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM1)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM1_CLK_ENABLE"/>
<Item Name="SPI1" NewName="SPI1" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SPI1)" Type="CLK_ENABLE" Value="__HAL_RCC_SPI1_CLK_ENABLE"/>
<Item Name="USART1" NewName="USART1" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_USART1)" Type="CLK_ENABLE" Value="__HAL_RCC_USART1_CLK_ENABLE"/>
<Item Name="TIM15" NewName="TIM15" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM15)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM15_CLK_ENABLE"/>
<Item Name="TIM16" NewName="TIM16" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM16)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM16_CLK_ENABLE"/>
<Item Name="TIM17" NewName="TIM17" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM17)" Type="CLK_ENABLE" Value="__HAL_RCC_TIM17_CLK_ENABLE"/>
<Item Name="DBGMCU" NewName="DBGMCU" NewValue="LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_DBGMCU)" Type="CLK_ENABLE" Value="__HAL_RCC_DBGMCU_CLK_ENABLE"/>
</HALvsLL>
