DB.6.0.10 ProjectManager.functionlistsort.* (.*)-MX_GTZC_Init-GTZC-(.*) $1-MX_GTZC_S_Init-GTZC_S-$2 , STM32WL DB.6.0.10 CortexM0Plus.IPs.* (.*)GTZC(.*) $1GTZC_S$2 , STM32WL DB.6.0.10 CortexM4.IPs.* (.*)SYS:I(.*) $1SYS\:I,GTZC_NS\:I$2 , STM32WL DB.6.0.10 ^GTZC\.(.*) GTZC(\..*) GTZC_S$1 , STM32WL DB.6.0.10 Mcu\.IP\d* (.*)GTZC(.*) $1GTZC_S$2 , STM32WL DB.6.0.10 VP_GTZC.*\.Mode.* VP_GTZC(.*) VP_GTZC_S$1 , STM32WL DB.6.0.10 .*\.Signal (.*)_VS_GTZC_Enable(.*) $1_S_VS_GTZC_Enable$2 , STM32WL DB.5.0.0 Mcu\.(.*) (.*)SPDIFRX(.*) $1SPDIFRX1$2 STM32H7 , DB.5.0.20 (.*)_traceremb_usart3\.Mode TRACER_EMB TRACER_EMB_USART3 __No_Separator DB.5.0.0 ^SPDIFRX\.(.*) SPDIFRX(\..*) SPDIFRX1$1 STM32H7 , DB.5.0.0 .*\.Signal (.*)SPDIFRX(.*) $1SPDIFRX1$2 STM32H7 , DB.5.0.0 ProjectManager.functionlistsort.* (.*)_SPDIFRX_(.*) $1SPDIFRX1$2 STM32H7 , DB.5.0.0 ProjectManager.functionlistsort.* (.*)-SPDIFRX-(.*) $1SPDIFRX1$2 STM32H7 , DB.5.0.30 ADC.*ScanConvMode ^ENABLE$ ADC_SCAN_ENABLE STM32F7 , DB.5.0.30 ADC.*ScanConvMode ^DISABLE$ ADC_SCAN_DISABLE STM32F7 , DB.4.0.100 .*Signal COMP(.*)_INM(.*) COMP$1_INM __No_Separator DB.4.0.120 SH.COMP_DAC2_group.[0-9] DAC_OUT2,DAC_OUT2 DAC_OUT2,Enable_DAC_OUT2 __No_Separator DIE422 DB.4.0.120 SH.COMP_DAC21_group.[0-9] DAC2_OUT1,DAC_OUT1 DAC2_OUT1,Switch_Enable_OUT1 __No_Separator DIE438 DB.4.0.120 SH.COMP_DAC12_group.[0-9] DAC1_OUT2,DAC_OUT2 DAC1_OUT2,Enable_DAC_OUT2 __No_Separator DIE432|DIE446 DB.4.0.150 ^DFSDM\.(.*) DFSDM(\..*) DFSDM1$1 , DB.4.0.150 Mcu\.(.*) (.*)DFSDM(.*) $1DFSDM1$2 , DB.4.0.150 VP_DFSDM.*\.Mode.* VP_DFSDM(.*) VP_DFSDM1$1 , DB.4.0.150 .*\.Signal (.*)DFSDM(.*) $1DFSDM1$2 , DB.4.0.150 SH\..* (.*)DFSDM(.*) $1DFSDM1$2 , DB.4.0.150 TIM[0-9]([0-9])*\.(.*) BreakInput_BRK(2*)_DFSDM BreakInput_BRK$1_DFSDM1 , DB.4.0.150 TIM[0-9]([0-9])*\.(.*) Source_BRK(2*)_DFSDM Source_BRK$1_DFSDM1 , DB.4.0.150 TIM[0-9]([0-9])*\.(.*) SourceBRK(2*)DFSDM SourceBRK$1DFSDM1 , DB.4.0.150 PCC\.(.*) (.*)DFSDM(.*) $1DFSDM1$2 , DB.4.0.150 .*\.Mode$ Serial-WireDebug|Serial-Wire Serial_Wire , DB.4.0.150 .*\.Mode$ JTAG\(4-pin\)|JTAG_4_pin JTAG_4_pins , DB.4.0.150 .*\.Mode$ JTAG\(5-pin\)|JTAG_5_pin JTAG_5_pins , DB.4.0.150 .*\.Mode$ Trace-Asynchronous_SW Trace_Asynchronous_SW , DB.4.0.150 .*\.Mode$ Trace-Synchro\(1bit\)_JTAG Trace_Synchro_1bit_JTAG , DB.4.0.150 .*\.Mode$ Trace-Synchro\(2bits\)_JTAG|Trace-Synchro\(2bit\)_JTAG Trace_Synchro_2bits_JTAG , DB.4.0.150 .*\.Mode$ Trace-Synchro\(4bits\)_JTAG|Trace-Synchro\(4bit\)_JTAG Trace_Synchro_4bits_JTAG , DB.4.0.150 .*\.Mode$ Trace-Synchro\(1bit\)_SW Trace_Synchro_1bit_SW , DB.4.0.150 .*\.Mode$ Trace-Synchro\(2bit\)_SW Trace_Synchro_2bits_SW , DB.4.0.150 .*\.Mode$ Trace-Synchro\(4bit\)_SW Trace_Synchro_4bits_SW , DB.4.0.150 .*\.Mode$ SYS-WakeUp0|SYS-WakeUp-1|SYS_WKUP1|Wake-Up-1|Wake_Up_1|SYS-WakeUp1|SYS-WKUP|Wake-up|SYS-WakeUp SYS_WakeUp0 , !STM32F446 DB.4.0.150 .*\.Mode$ SYS-WakeUp0 SYS_WakeUp0 , STM32F446 DB.4.0.150 .*\.Mode$ SYS-WakeUp-2|SYS_WKUP2|Wake-Up-2|SYS-WakeUp2|Wake_Up_2 SYS_WakeUp1 , !STM32F446 DB.4.0.150 .*\.Mode$ SYS-WakeUp1 SYS_WakeUp1 , STM32F446 DB.4.0.150 .*\.Mode$ SYS-WakeUp-3|SYS_WKUP3|Wake-Up-3|SYS-WakeUp3|Wake_Up_3 SYS_WakeUp2 , DB.4.0.150 .*\.Mode$ SYS-WakeUp-4|SYS_WKUP4|SYS-WakeUp4 SYS_WakeUp3 , DB.4.0.150 .*\.Mode$ SYS-WakeUp-5|SYS_WKUP5|SYS-WakeUp5 SYS_WakeUp4 , DB.4.0.150 .*\.Mode$ SYS-WakeUp-6|SYS_WKUP6 SYS_WakeUp5 , DB.4.0.150 .*\.Mode$ SYS_WKUP7 SYS_WakeUp6 , DB.4.0.150 .*\.Mode$ SYS_WKUP8 SYS_WakeUp7 , DB.4.0.150 .*\.Mode$ PVD_ext Mode_PVD_Ext , DB.4.0.150 .*\.Mode$ PVD_int Mode_PVD_Int , DB.4.0.170 AddIPMode Mcu.IP([0-9]|[0-9][0-9]) RTC Pin:VP_RTC_VS_RTC_Activate;AddedKeys:VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled,VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate __No_Separator DB.4.0.170 AddIPMode VP_RTC_VS_RTC_(.*).Mode Alarm A|Alarm B|WakeUp Pin:VP_RTC_VS_RTC_Calendar;AddedKeys:VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar,VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar __No_Separator DB.4.0.170 AddIPMode (.*).Mode AlarmA_RoutedAF|AlarmB_RoutedAF|WakeUpAF1 Pin:VP_RTC_VS_RTC_Calendar;AddedKeys:VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar,VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar __No_Separator DB.4.0.170 AddIPMode (.*).Mode Timestamp enabled - Input Enabled to AF1|Timestamp enabled - Input Enabled to AF2|Timestamp enabled Pin:VP_RTC_VS_RTC_Calendar;AddedKeys:VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar,VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar __No_Separator DB.4.0.180 (.*).Mode (.*)_MODE_TX MODE_TX __No_Separator DB.4.0.180 (.*).Mode (.*)_MODE_RX MODE_RX __No_Separator DB.4.0.180 (.*).Mode (.*)_MODE_TX_RX MODE_TX_RX __No_Separator DB.4.0.180 (.*).Parity (.*)_PARITY_NONE PARITY_NONE __No_Separator DB.4.0.180 (.*).Parity (.*)_PARITY_EVEN PARITY_EVEN __No_Separator DB.4.0.180 (.*).Parity (.*)_PARITY_ODD PARITY_ODD __No_Separator DB.4.0.180 USART(.*).StopBits (.*)_STOPBITS_1 STOPBITS_1 __No_Separator DB.4.0.180 USART(.*).StopBits (.*)_STOPBITS_2 STOPBITS_2 __No_Separator DB.4.0.180 USART(.*).StopBits (.*)_STOPBITS_1_5 STOPBITS_1_5 __No_Separator DB.4.0.180 USART(.*).StopBits (.*)_STOPBITS_0_5 STOPBITS_0_5 __No_Separator DB.4.0.190 (.*).WordLength (.*)_WORDLENGTH_7B WORDLENGTH_7B __No_Separator DB.4.0.190 (.*).WordLength (.*)_WORDLENGTH_8B WORDLENGTH_8B __No_Separator DB.4.0.190 (.*).WordLength (.*)_WORDLENGTH_9B WORDLENGTH_9B __No_Separator DB.4.0.180 (STM32F4&DIE434)|(STM32F7&(DIE449|DIE451))|(STM32H7&DIE450) .*\.Signal FMC_NCE3 FMC_NCE , DB.4.0.180 (STM32F4&DIE434)|(STM32F7&(DIE449|DIE451))|(STM32H7&DIE450) .*\.Signal|SH\.FMC_INT3\..* FMC_INT3 FMC_INT , DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigConv ADC_EXTERNALTRIG_T1_CC1 STM32L4 ExternalTrigConvEdge!=ADC_EXTERNALTRIGCONVEDGE_NONE . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigInjecConv ADC_EXTERNALTRIGINJEC_T1_TRGO ExternalTrigInjecConvEdge!=ADC_EXTERNALTRIGINJECCONV_EDGE_NONE STM32L4 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigConv ADC_EXTERNALTRIGCONV_T1_CC1 DIE439|DIE422|DIE438|DIE466 ExternalTrigConvEdge!=ADC_EXTERNALTRIGCONVEDGE_NONE . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigInjecConv ADC_EXTERNALTRIGINJECCONV_T1_TRGO ExternalTrigInjecConvEdge!=ADC_EXTERNALTRIGINJECCONV_EDGE_NONE DIE439|DIE422|DIE438|DIE466 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigConv ADC_EXTERNALTRIGCONV_T19_TRGO DIE432 ExternalTrigConvEdge!=ADC_EXTERNALTRIGCONVEDGE_NONE . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigInjecConv ADC_EXTERNALTRIGINJECCONV_T19_CC1 ExternalTrigInjecConvEdge!=ADC_EXTERNALTRIGINJECCONV_EDGE_NONE DIE432 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigConv ADC_EXTERNALTRIGCONV_T6_TRGO ExternalTrigConvEdge!=ADC_EXTERNALTRIGCONVEDGE_NONE STM32L0 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigConv ADC_EXTERNALTRIGCONV_T1_TRGO ExternalTrigConvEdge!=ADC_EXTERNALTRIGCONVEDGE_NONE STM32F0 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigConv ADC_EXTERNALTRIGCONV_T2_CC3 ExternalTrigConvEdge!=ADC_EXTERNALTRIGCONVEDGE_NONE STM32L1 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigInjecConv ADC_EXTERNALTRIGINJECCONV_T2_CC1 ExternalTrigInjecConvEdge!=ADC_EXTERNALTRIGINJECCONV_EDGE_NONE STM32L1 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigConv ADC_EXTERNALTRIGCONV_T1_CC1 ExternalTrigConvEdge!=ADC_EXTERNALTRIGCONVEDGE_NONE STM32F1 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigInjecConv ADC_EXTERNALTRIGINJECCONV_T1_TRGO ExternalTrigInjecConvEdge!=ADC_EXTERNALTRIGINJECCONV_EDGE_NONE STM32F1 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigConv ADC_EXTERNALTRIGCONV_T1_CC1 ExternalTrigConvEdge!=ADC_EXTERNALTRIGCONVEDGE_NONE STM32F7 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigInjecConv ADC_EXTERNALTRIGINJECCONV_T1_TRGO ExternalTrigInjecConvEdge!=ADC_EXTERNALTRIGINJECCONV_EDGE_NONE STM32F7 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigConv ADC_EXTERNALTRIGCONV_T1_CC1 ExternalTrigConvEdge!=ADC_EXTERNALTRIGCONVEDGE_NONE STM32F4|STM32F2 . DB.4.0.180 ChangeDefaultValue ADC[1-4]*\..* ExternalTrigInjecConv ADC_EXTERNALTRIGINJECCONV_T1_CC4 ExternalTrigInjecConvEdge!=ADC_EXTERNALTRIGINJECCONV_EDGE_NONE STM32F4|STM32F2 . DB.4.0.190 ADC.SamplingTime ADC_SAMPLETIME_7CYCLES_5 ADC_SAMPLETIME_3CYCLES_5 STM32L0 , DB.4.0.190 ADC.SamplingTime ADC_SAMPLETIME_28CYCLES_5 ADC_SAMPLETIME_12CYCLES_5 STM32L0 , DB.4.0.190 ADC.SamplingTime ADC_SAMPLETIME_41CYCLES_5 ADC_SAMPLETIME_19CYCLES_5 STM32L0 , DB.4.0.190 ADC.SamplingTime ADC_SAMPLETIME_55CYCLES_5 ADC_SAMPLETIME_39CYCLES_5 STM32L0 , DB.4.0.190 ADC.SamplingTime ADC_SAMPLETIME_71CYCLES_5 ADC_SAMPLETIME_79CYCLES_5 STM32L0 , DB.4.0.190 ADC.SamplingTime ADC_SAMPLETIME_239CYCLES_5 ADC_SAMPLETIME_160CYCLES_5 STM32L0 , DB.4.0.190 .*Signal USB_OE USB_NOE __No_Separator DIE417|DIE435|DIE445|DIE447|DIE448 DB.4.0.190 .*Mode Activate_OE Activate_NOE __No_Separator DIE417|DIE435|DIE445|DIE447|DIE448 DB.4.0.210 PC14.* "PC14/OSC32_IN" "PC14-OSC32_IN (PC14)" __No_Separator DIE462|DIE415 DB.4.0.210 PC15.* "PC15/OSC32_OUT" "PC15-OSC32_OUT (PC15)" __No_Separator DIE462|DIE415 DB.4.0.210 PH0.* "PH0/OSC_IN" "PH0-OSC_IN (PH0)" __No_Separator DIE462|DIE415 DB.4.0.210 PH1.* "PH1/OSC_OUT" "PH1-OSC_OUT (PH1)" __No_Separator DIE462|DIE415 DB.4.0.210 PA13.* "PA13" "PA13 (JTMS/SWDIO)" __No_Separator DIE462 DB.4.0.210 PA13.* "PA13" "PA13 (JTMS-SWDIO)" __No_Separator DIE415 DB.4.0.210 PA14.* "PA14" "PA14 (JTCK/SWCLK)" __No_Separator DIE462 DB.4.0.210 PA14.* "PA14" "PA14 (JTCK-SWCLK)" __No_Separator DIE415 DB.4.0.210 PA15.* "PA15" "PA15 (JTDI)" __No_Separator DIE462|DIE415 DB.4.0.210 PB3.* "PB3" "PB3 (JTD0/TRACESWO)" __No_Separator DIE462 DB.4.0.210 PB3.* "PB3" "PB3 (JTD0-TRACESWO)" __No_Separator DIE415 DB.4.0.210 PB4.* "PB4" "PB4 (NJTRST)" __No_Separator DIE462|DIE415 DB.4.0.210 PH3.* "PH3/BOOT0" "PH3-BOOT0 (BOOT0)" __No_Separator DIE462 DB.4.0.210 CRYP.* DataEncryptionTypesList Algorithm , DB.5.0.1 AES.* DataEncryptionTypesList Algorithm , DIE470 DB.5.0.1 CRYP.Algorithm TDESECB CRYP_TDES_ECB , STM32F4|STM32F7 DB.5.0.1 CRYP.Algorithm TDESCBC CRYP_TDES_CBC , STM32F4|STM32F7 DB.5.0.1 CRYP.Algorithm DESECB CRYP_DES_ECB , STM32F4|STM32F7 DB.5.0.1 CRYP.Algorithm DESCBC CRYP_DES_CBC , STM32F4|STM32F7 DB.5.0.1 CRYP.Algorithm AESECB CRYP_AES_ECB , STM32F4|STM32F7 DB.5.0.1 CRYP.Algorithm AESCBC CRYP_AES_CBC , STM32F4|STM32F7 DB.5.0.1 CRYP.Algorithm AESCTR CRYP_AES_CTR , STM32F4|STM32F7 DB.5.0.1 CRYP.Algorithm AESGCM CRYP_AES_GCM , STM32F4|STM32F7 DB.5.0.1 CRYP.Algorithm AESCCM CRYP_AES_CCM , STM32F4|STM32F7 DB.4.0.240 CAN.* TimeSeg1 BS1 , DB.4.0.240 CAN.* TimeSeg2 BS2 , DB.4.0.240 CAN.* SyncJumpWidth SJW , DB.4.0.240 CAN.* TimeTriggeredMode TTCM , DB.4.0.240 CAN.* AutoBusOff ABOM , DB.4.0.240 CAN.* AutoWakeUp AWUM , DB.4.0.240 CAN.* AutoRetransmission NART , DB.4.0.240 CAN.* ReceiveFifoLocked RFLM , DB.4.0.240 CAN.* TransmitFifoPriority TXFP , DB.4.0.210 HRTIM.* HRTIM_OUTPUTFAULTLEVEL_HIGH HRTIM_OUTPUTFAULTLEVEL_HIGHZ , STM32F3 DB.4.0.220 TIM.* TIM_CLEARINPUTSOURCE_OCREFCLR TIM_CLEARINPUTSOURCE_NONE , DIE451|DIE449|DIE452 DB.4.0.230 [PA11|PB8|PD0|PA12|PB9|PD1]\.Mode Master FDCANMaster __No_Separator STM32H7 DB.4.0.230 [PB12|PB5|PB13|PB6]\.Mode Slave FDCANSlave __No_Separator STM32H7 DB.4.0.230 AddIPMode PA10.Mode FullDuplex Pin:PA12;AddedKeys:PA12.Mode=FDCANFD,PA12.Signal=FDCAN1_TX __No_Separator STM32H7 DB.4.0.230 AddIPMode PA9.Mode FullDuplex Pin:PA11;AddedKeys:PA11.Mode=FDCANFD,PA11.Signal=FDCAN1_RX __No_Separator STM32H7 DB.4.0.230 AddIPMode PE1.Mode FullDuplex Pin:PB9;AddedKeys:PB9.Mode=FDCANFD,PB9.Signal=FDCAN1_TX __No_Separator STM32H7 DB.4.0.230 AddIPMode PE0.Mode FullDuplex Pin:PB8;AddedKeys:PB8.Mode=FDCANFD,PB8.Signal=FDCAN1_RX __No_Separator STM32H7 DB.4.0.230 AddIPMode PD5.Mode FullDuplex Pin:PD1;AddedKeys:PD1.Mode=FDCANFD,PD1.Signal=FDCAN1_TX __No_Separator STM32H7 DB.4.0.230 AddIPMode PD4.Mode FullDuplex Pin:PD0;AddedKeys:PD0.Mode=FDCANFD,PD0.Signal=FDCAN1_RX __No_Separator STM32H7 DB.4.0.230 PA10.Mode FullDuplex Enable_FDCAN_TXFD __No_Separator STM32H7 DB.4.0.230 PA9.Mode FullDuplex Enable_FDCAN_RXFD __No_Separator STM32H7 DB.4.0.230 PE1.Mode FullDuplex Enable_FDCAN_TXFD __No_Separator STM32H7 DB.4.0.230 PE0.Mode FullDuplex Enable_FDCAN_RXFD __No_Separator STM32H7 DB.4.0.230 PD5.Mode FullDuplex Enable_FDCAN_TXFD __No_Separator STM32H7 DB.4.0.230 PD4.Mode FullDuplex Enable_FDCAN_RXFD __No_Separator STM32H7 DB.4.0.230 AddIPMode PD10.Mode FullDuplex Pin:PB13;AddedKeys:PB13.Mode=FDCANFD,PB13.Signal=FDCAN2_TX __No_Separator STM32H7 DB.4.0.230 AddIPMode PD9.Mode FullDuplex Pin:PB12;AddedKeys:PB12.Mode=FDCANFD,PB12.Signal=FDCAN2_RX __No_Separator STM32H7 DB.4.0.230 AddIPMode PB7.Mode FullDuplex Pin:PB6;AddedKeys:PB6.Mode=FDCANFD,PB6.Signal=FDCAN2_TX __No_Separator STM32H7 DB.4.0.230 AddIPMode PD9.Mode FullDuplex Pin:PB12;AddedKeys:PB12.Mode=FDCANFD,PB12.Signal=FDCAN2_RX __No_Separator STM32H7 DB.4.0.230 PD10.Mode FullDuplex Enable_FDCAN_TXFD __No_Separator STM32H7 DB.4.0.230 PD9.Mode FullDuplex Enable_FDCAN_RXFD __No_Separator STM32H7 DB.4.0.230 PB7.Mode FullDuplex Enable_FDCAN_TXFD __No_Separator STM32H7 DB.4.0.230 PD6.Mode FullDuplex Enable_FDCAN_RXFD __No_Separator STM32H7 DB.5.0.10 USART(.*).TxPinLevelInvertParam (.*)_ADVFEATURE_TXINV_(.*) ADVFEATURE_TXINV_$2 __No_Separator DB.5.0.10 USART(.*).RxPinLevelInvertParam (.*)_ADVFEATURE_RXINV_(.*) ADVFEATURE_RXINV_$2 __No_Separator DB.5.0.10 USART(.*).DataInvertParam (.*)_ADVFEATURE_DATAINV_(.*) ADVFEATURE_DATAINV_$2 __No_Separator DB.5.0.10 USART(.*).SwapParam (.*)_ADVFEATURE_SWAP_(.*) ADVFEATURE_SWAP_$2 __No_Separator DB.5.0.10 USART(.*).OverrunDisableParam (.*)_ADVFEATURE_OVERRUN_(.*) ADVFEATURE_OVERRUN_$2 __No_Separator DB.5.0.10 USART(.*).DMADisableonRxErrorParam (.*)_ADVFEATURE_DMA_(.*) ADVFEATURE_DMA_$2 __No_Separator DB.5.0.10 USART(.*).MSBFirstParam (.*)_ADVFEATURE_MSBFIRST_(.*) ADVFEATURE_MSBFIRST_$2 __No_Separator DB.5.0.10 ProjectManager.functionlistsort.* (.*)MX_USB_DEVICE_Init(.*) MX_Usb_Device_Init STM32WB , DB.5.0.10 ChangeDefaultValue RCC*\..* PWR_Regulator_Voltage_Scale PWR_REGULATOR_VOLTAGE_SCALE1 STM32H7 . DB.5.0.20 U(.*)ART(.*).IPParameters Prescaler ClockPrescaler STM32H7 Prescaler=PRESCALER_DIV(.*) __No_Separator DB.5.0.20 U(.*)ART(.*)\.Prescaler Prescaler ClockPrescaler Prescaler=PRESCALER_DIV(.*) STM32H7 __No_Separator DB.5.0.20 RCC.(.*) TIM1CLockSelection TIM1CLockSelectionVirtual STM32G0 __No_Separator DB.5.0.20 RCC.(.*) TIM15CLockSelection TIM15CLockSelectionVirtual STM32G0 __No_Separator DB.5.0.40 ChangeDefaultValue RCC*\..* SDMMC3CLockSelection RCC_SDMMC3CLKSOURCE_HCLK2 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* SDMMC12CLockSelection RCC_SDMMC12CLKSOURCE_HCLK6 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* QSPICLockSelection RCC_QSPICLKSOURCE_ACLK STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* FMCCLockSelection RCC_FMCCLKSOURCE_ACLK STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* SPI6CLockSelection RCC_SPI6CLKSOURCE_PCLK5 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* LPTIM23CLockSelection RCC_LPTIM23CLKSOURCE_PCLK3 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* LPTIM1CLockSelection RCC_LPTIM1CLKSOURCE_PCLK1 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* USART1CLockSelection RCC_USART1CLKSOURCE_PCLK5 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* USART24CLockSelection RCC_UART24CLKSOURCE_PCLK1 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* USART6CLockSelection RCC_USART6CLKSOURCE_PCLK2 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* UART78CLockSelection RCC_UART78CLKSOURCE_PCLK1 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* USART35CLockSelection RCC_UART35CLKSOURCE_PCLK1 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* SPI45CLockSelection RCC_SPI45CLKSOURCE_PCLK2 STM32MP1 . DB.5.0.40 RCC*\..* RCC_I2C46CLKSOURCE_BCLK RCC_I2C46CLKSOURCE_PCLK5 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* SPI45CLockSelection RCC_SPI45CLKSOURCE_PCLK2 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* I2C12CLockSelection RCC_I2C12CLKSOURCE_PCLK1 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* I2C35CLockSelection RCC_I2C35CLKSOURCE_PCLK1 STM32MP1 . DB.5.0.40 ChangeDefaultValue RCC*\..* LPTIM45CLockSelection RCC_LPTIM45CLKSOURCE_PCLK3 STM32MP1 . DB.5.0.40 (STM32F2&DIE411)|(STM32F4&DIE413)|(STM32F4&DIE419) .*\.Signal DCMI_PIXCK DCMI_PIXCLK , DB.5.0.40 ChangeDefaultValue RCC*\..* I2C46CLockSelection RCC_I2C46CLKSOURCE_PCLK5 STM32MP1 . DB.5.0.40 ChangeDefaultValue UART*\..* WordLength WORDLENGTH_7B STM32G0|STM32G4|STM32WB !UART$1_IRDA & !UART$1_LIN . DB.5.0.40 ChangeDefaultValue USART(.*)\..* WordLength WORDLENGTH_7B STM32G0|STM32G4|STM32WB IPParameters!=(.)*VirtualMode-SmartCard(.)*|(.)*VirtualMode-LIN(.)* . DB.5.0.40 ChangeDefaultValue UART(.*)\..* WordLength WORDLENGTH_7B STM32G4 . DB.5.0.50 RCC*\..* USART1CLockSelection USART1CLockSelectionVirtual STM32L5 __No_Separator DB.5.0.50 RCC*\..* USART2CLockSelection USART2CLockSelectionVirtual STM32L5 __No_Separator DB.5.0.50 RCC*\..* USART3CLockSelection USART3CLockSelectionVirtual STM32L5 __No_Separator DB.5.0.50 RCC*\..* UART4CLockSelection UART4CLockSelectionVirtual STM32L5 __No_Separator DB.5.0.50 RCC*\..* UART5CLockSelection UART5CLockSelectionVirtual STM32L5 __No_Separator DB.5.0.50 RCC*\..* LPUART1CLockSelection LPUART1CLockSelectionVirtual STM32L5 __No_Separator DB.5.0.50 RCC*\..* LPTIM1CLockSelection LPTIM1CLockSelectionVirtual STM32L5 __No_Separator DB.5.0.50 RCC*\..* LPTIM2CLockSelection LPTIM2CLockSelectionVirtual STM32L5 __No_Separator DB.5.0.50 RCC*\..* RCC_MCO1Source RCC_MCO1SourceVirtual STM32L5 __No_Separator DB.5.0.50 RCC*\..* LSCOSource1 LSCOSource1Virtual STM32L5 __No_Separator DB.5.0.50 RCC*\..* SMPSCLockSelection SMPSCLockSelectionVirtual STM32WB __No_Separator DB.5.0.50 RCC*\..* LPTIM3CLockSelection LPTIM3CLockSelectionVirtual STM32L5 __No_Separator DB.5.0.50 ChangeIPModeToParameter VP_GTZC_VS_Template_MPCBB\d*_Secure\.Mode Default_(MPCBB\d*.)_Template AddedKeys:GTZC.$1_NonSecureArea_Choice=Use default memory template from partition_stm32l5xx.h STM32L5 __No_Separator DB.5.0.50 ChangeIPModeToParameter VP_GTZC_VS_MPC[WB][MB]\d*_Secure\.Mode (MPC[WB][MB]\d*)_Secure AddedKeys:GTZC.$1_NonSecureArea_Choice=from full Secured STM32L5 __No_Separator DB.5.0.50 ChangeIPModeToParameter VP_GTZC_VS_NoMPC[WB][MB]\d*_Secure\.Mode No_(MPC[WB][MB]\d*)_Secure AddedKeys:GTZC.$1_NonSecureArea_Choice=from full Not Secured STM32L5 __No_Separator DB.5.0.50 ChangeIPModeToParameter VP_GTZC_VS_IP_Secure\.Mode IP_Secure AddedKeys:GTZC.TZSC_Secure_IP_Choice=by Individual Unsecuring from full Secured STM32L5 __No_Separator DB.5.0.50 ChangeIPModeToParameter VP_GTZC_VS_NoIP_Secure\.Mode No_IP_Secure AddedKeys:GTZC.TZSC_Secure_IP_Choice=by Individual Securing from full Not Secured STM32L5 __No_Separator DB.5.0.50 ChangeIPModeToParameter VP_GTZC_VS_IP_Privilege\.Mode IP_Privilege AddedKeys:GTZC.TZSC_Privilege_IP_Choice=by Individual Unprivileging from full Privileged STM32L5 __No_Separator DB.5.0.50 ChangeIPModeToParameter VP_GTZC_VS_NoIP_Privilege\.Mode No_IP_Privilege AddedKeys:GTZC.TZSC_Privilege_IP_Choice=by Individual Privileging from full Not Privileged STM32L5 __No_Separator DB.5.0.50 ChangeIPModeToParameter VP_GTZC_VS_IT_Secure\.Mode IT_Secure AddedKeys:GTZC.TZIC_Configure_IT_Choice=by Individual Disabling from full Enabled STM32L5 __No_Separator DB.5.0.50 ChangeIPModeToParameter VP_GTZC_VS_NoIT_Secure\.Mode No_IT_Secure AddedKeys:GTZC.TZIC_Configure_IT_Choice=by Individual Enabling from full Disabled STM32L5 __No_Separator DB.5.0.50 AddParameterValueWithReferencedValue GTZC\.MPCBB1_NonSecureArea_Start GTZC\.MPCBB1_NonSecureArea_Start=(.*) AddedKeys:GTZC.MPCBB1_NonSecureArea_Start_Address=(MPCBB1_NonSecureArea_SRAM1_BASE_NS + $1) STM32L5 __No_Separator DB.5.0.50 AddParameterValueWithReferencedValue GTZC\.MPCBB2_NonSecureArea_Start GTZC\.MPCBB2_NonSecureArea_Start=(.*) AddedKeys:GTZC.MPCBB2_NonSecureArea_Start_Address=(MPCBB2_NonSecureArea_SRAM2_BASE_NS + $1) STM32L5 __No_Separator DB.5.0.50 AddParameterValueWithReferencedValue GTZC\.MPCWM1_NonSecureArea\d*_Start GTZC\.MPCWM1_NonSecureArea(\d*)_Start=(.*) AddedKeys:GTZC.MPCWM1_NonSecureArea$1_Start_Address=(MPCWM1_NonSecureArea_OCTOSPI1_BASE + $2) STM32L5 __No_Separator DB.5.0.50 AddParameterValueWithReferencedValue GTZC\.MPCWM2_NonSecureArea\d*_Start GTZC\.MPCWM2_NonSecureArea(\d*)_Start=(.*) AddedKeys:GTZC.MPCWM2_NonSecureArea$1_Start_Address=(MPCWM2_NonSecureArea_FMC_BANK1 + $2) STM32L5 __No_Separator DB.5.0.50 AddParameterValueWithReferencedValue GTZC\.MPCWM3_NonSecureArea_Start GTZC\.MPCWM3_NonSecureArea_Start=(.*) AddedKeys:GTZC.MPCWM3_NonSecureArea_Start_Address=(MPCWM3_NonSecureArea_FMC_BANK3 + $1) STM32L5 __No_Separator DB.5.0.60 ChangeDefaultValue RCC*\..* PLL1UserDefinedConfig true STM32MP1 . DB.5.0.20 ChangeDefaultGPIOValue (.*).Mode=Asynchronous GPIO_PuPd GPIO_PULLUP STM32G0|STM32WB Signal=USART(.*)_(.*)X . DB.5.0.20 ChangeDefaultValue RCC*\..* SMPSDivider 1 STM32WB SMPSCLockSelectionVirtual=RCC_SMPSCLKSOURCE_HSI . DB.6.0.0 (.*).Signal OPAMP(.*)_VINM OPAMP$1_VINM0 Mode=PGA(.*) STM32G4 __No_Separator DB.6.0.10 LPUART(.*).IPParameters Prescaler ClockPrescaler STM32H7 Prescaler=UART_PRESCALER_DIV(.*) __No_Separator DB.6.0.10 LPUART(.*).Prescaler Prescaler ClockPrescaler STM32H7 Prescaler=UART_PRESCALER_DIV(.*) __No_Separator DB.6.0.10 LPUART(.*).IPParameters Prescaler ClockPrescaler STM32WB Prescaler=UART_PRESCALER_DIV(.*) __No_Separator DB.6.0.10 LPUART(.*).Prescaler Prescaler ClockPrescaler STM32WB Prescaler=UART_PRESCALER_DIV(.*) __No_Separator DB.6.0.10 LPUART(.*).IPParameters Prescaler ClockPrescaler STM32G4 Prescaler=UART_PRESCALER_DIV(.*) __No_Separator DB.6.0.10 LPUART(.*).Prescaler Prescaler ClockPrescaler STM32G4 Prescaler=UART_PRESCALER_DIV(.*) __No_Separator DB.6.0.10 LPUART(.*).Prescaler Prescaler ClockPrescaler STM32L5 Prescaler=UART_PRESCALER_DIV(.*) __No_Separator DB.6.0.10 LPUART(.*).IPParameters Prescaler ClockPrescaler STM32WL Prescaler=UART_PRESCALER_DIV(.*) __No_Separator DB.6.0.10 LPUART(.*).Prescaler Prescaler ClockPrescaler STM32WL Prescaler=UART_PRESCALER_DIV(.*) __No_Separator DB.6.0.10 USB_DEVICE(.*) USBD_SUPPORT_USER_STRING USBD_SUPPORT_USER_STRING_DESC STM32L0 __No_Separator DB.6.0.10 RCC\.(.*) RCC_I2SCLKSOURCE_HSE RCC_I2SCLKSOURCE_HSI STM32G4 , DB.6.0.10 AssignTimToSysContext VP_SYS(.*)_VS_tim(.+).Mode Mcu.ContextNb=2 __No_Separator STM32H7|STM32L5