Cryptographic processor The cryptographic processor can be used to both encipher and decipher data using the<br/> DES, Triple-DES or AES (128, 192, or 256) algorithms. It is a fully compliant implementation<br/> of the following standards: <p style="text-indent:20px;">- The data encryption standard (DES) and Triple-DES (TDES) as defined<br/> by Federal Information Processing Standards Publication (FIPS PUB 46-3, 1999 October 25).<br/> It follows the American National Standards Institute (ANSI) X9.52 standard.</p> <p style="text-indent:20px;">- The advanced encryption standard (AES) as defined by Federal<br/> Information Processing Standards Publication (FIPS PUB 197, 2001 November 26)</p><br/> The CRYP processor performs data encryption and decryption using DES and TDES<br/> algorithms in Electronic codebook (ECB) or Cipher block chaining (CBC) mode.<br/> The CRYP peripheral is a 32-bit AHB2 peripheral. It supports DMA transfer for incoming and<br/> processed data, and has input and output FIFOs (each 8 words deep). Cryptographic processor The cryptographic processor can be used to both encipher and decipher data using the<br/> DES, Triple-DES or AES (128, 192, or 256) algorithms. It is a fully compliant implementation<br/> of the following standards: <p style="text-indent:20px;">- The data encryption standard (DES) and Triple-DES (TDES) as defined<br/> by Federal Information Processing Standards Publication (FIPS PUB 46-3, 1999 October 25).<br/> It follows the American National Standards Institute (ANSI) X9.52 standard.</p> <p style="text-indent:20px;">- The advanced encryption standard (AES) as defined by Federal<br/> Information Processing Standards Publication (FIPS PUB 197, 2001 November 26)</p><br/> The CRYP processor performs data encryption and decryption using DES and TDES<br/> algorithms in Electronic codebook (ECB) or Cipher block chaining (CBC) mode.<br/> The CRYP peripheral is a 32-bit AHB2 peripheral. It supports DMA transfer for incoming and<br/> processed data, and has input and output FIFOs (each 8 words deep). Cryptographic processor The cryptographic processor can be used to both encipher and decipher data using the<br/> DES, Triple-DES or AES (128, 192, or 256) algorithms. It is a fully compliant implementation<br/> of the following standards: <p style="text-indent:20px;">- The data encryption standard (DES) and Triple-DES (TDES) as defined<br/> by Federal Information Processing Standards Publication (FIPS PUB 46-3, 1999 October 25).<br/> It follows the American National Standards Institute (ANSI) X9.52 standard.</p> <p style="text-indent:20px;">- The advanced encryption standard (AES) as defined by Federal<br/> Information Processing Standards Publication (FIPS PUB 197, 2001 November 26)</p><br/> The CRYP processor performs data encryption and decryption using DES and TDES<br/> algorithms in Electronic codebook (ECB) or Cipher block chaining (CBC) mode.<br/> The CRYP peripheral is a 32-bit AHB2 peripheral. It supports DMA transfer for incoming and<br/> processed data, and has input and output FIFOs (each 8 words deep). Cryptographic processor The cryptographic processor can be used to both encipher and decipher data using the<br/> DES, Triple-DES or AES (128, 192, or 256) algorithms. It is a fully compliant implementation<br/> of the following standards: <p style="text-indent:20px;">- The data encryption standard (DES) and Triple-DES (TDES) as defined<br/> by Federal Information Processing Standards Publication (FIPS PUB 46-3, 1999 October 25).<br/> It follows the American National Standards Institute (ANSI) X9.52 standard.</p> <p style="text-indent:20px;">- The advanced encryption standard (AES) as defined by Federal<br/> Information Processing Standards Publication (FIPS PUB 197, 2001 November 26)</p><br/> The CRYP processor performs data encryption and decryption using DES and TDES<br/> algorithms in Electronic codebook (ECB) or Cipher block chaining (CBC) mode.<br/> The CRYP peripheral is a 32-bit AHB2 peripheral. It supports DMA transfer for incoming and<br/> processed data, and has input and output FIFOs (each 8 words deep). Cryptographic processor The cryptographic processor can be used to both encipher and decipher data using the<br/> DES, Triple-DES or AES (128, 192, or 256) algorithms. It is a fully compliant implementation<br/> of the following standards: <p style="text-indent:20px;">- The data encryption standard (DES) and Triple-DES (TDES) as defined<br/> by Federal Information Processing Standards Publication (FIPS PUB 46-3, 1999 October 25).<br/> It follows the American National Standards Institute (ANSI) X9.52 standard.</p> <p style="text-indent:20px;">- The advanced encryption standard (AES) as defined by Federal<br/> Information Processing Standards Publication (FIPS PUB 197, 2001 November 26)</p><br/> The CRYP processor performs data encryption and decryption using DES and TDES<br/> algorithms in Electronic codebook (ECB) or Cipher block chaining (CBC) mode.<br/> The CRYP peripheral is a 32-bit AHB2 peripheral. It supports DMA transfer for incoming and<br/> processed data, and has input and output FIFOs (each 8 words deep). Cryptographic processor The cryptographic processor can be used to both encipher and decipher data using the<br/> DES, Triple-DES or AES (128, 192, or 256) algorithms. It is a fully compliant implementation<br/> of the following standards: <p style="text-indent:20px;">- The data encryption standard (DES) and Triple-DES (TDES) as defined<br/> by Federal Information Processing Standards Publication (FIPS PUB 46-3, 1999 October 25).<br/> It follows the American National Standards Institute (ANSI) X9.52 standard.</p> <p style="text-indent:20px;">- The advanced encryption standard (AES) as defined by Federal<br/> Information Processing Standards Publication (FIPS PUB 197, 2001 November 26)</p><br/> The CRYP processor performs data encryption and decryption using DES and TDES<br/> algorithms in Electronic codebook (ECB) or Cipher block chaining (CBC) mode.<br/> The CRYP peripheral is a 32-bit AHB2 peripheral. It supports DMA transfer for incoming and<br/> processed data, and has input and output FIFOs (each 8 words deep). Cryptographic processor The cryptographic processor can be used to both encipher and decipher data using the<br/> DES, Triple-DES or AES (128, 192, or 256) algorithms. It is a fully compliant implementation<br/> of the following standards: <p style="text-indent:20px;">- The data encryption standard (DES) and Triple-DES (TDES) as defined<br/> by Federal Information Processing Standards Publication (FIPS PUB 46-3, 1999 October 25).<br/> It follows the American National Standards Institute (ANSI) X9.52 standard.</p> <p style="text-indent:20px;">- The advanced encryption standard (AES) as defined by Federal<br/> Information Processing Standards Publication (FIPS PUB 197, 2001 November 26)</p><br/> The CRYP processor performs data encryption and decryption using DES and TDES<br/> algorithms in Electronic codebook (ECB) or Cipher block chaining (CBC) mode.<br/> The CRYP peripheral is a 32-bit AHB2 peripheral. It supports DMA transfer for incoming and<br/> processed data, and has input and output FIFOs (each 8 words deep).