//*********************************************************** // Header file for the KungFu32 // // Microcontroller // // Copyright 2012-2020 ChipON, All rights reserved //*********************************************************** // register------------------------------------- .EQU QEI1_CTL0, 0x40000080 // 0x4000 0080 QEI1_CTL0 Bits------------------------------------- .EQU QEI1_CTL0_LPCLK, 11 .EQU QEI1_CTL0_TXIF, 10 .EQU QEI1_CTL0_PHEIF, 9 .EQU QEI1_CTL0_CNTERRIF, 8 .EQU QEI1_CTL0_QEIMOD2, 7 .EQU QEI1_CTL0_QEIMOD1, 6 .EQU QEI1_CTL0_QEIMOD0, 5 .EQU QEI1_CTL0_INDRES, 4 .EQU QEI1_CTL0_TXCS, 3 .EQU QEI1_CTL0_INDEX, 2 .EQU QEI1_CTL0_TXDIROUT, 1 .EQU QEI1_CTL0_TXDIR, 0 // register------------------------------------- .EQU QEI1_CTL1, 0x40000084 // 0x4000 0084 QEI1_CTL1 Bits------------------------------------- .EQU QEI1_CTL1_PHFSEL3, 12 .EQU QEI1_CTL1_PHFSEL2, 11 .EQU QEI1_CTL1_PHFSEL1, 10 .EQU QEI1_CTL1_PHFSEL0, 9 .EQU QEI1_CTL1_PHDFEN, 8 .EQU QEI1_CTL1_MODEN, 7 .EQU QEI1_CTL1_QEICLK1, 6 .EQU QEI1_CTL1_QEICLK0, 5 .EQU QEI1_CTL1_QEIOUT, 4 .EQU QEI1_CTL1_QEICK2, 3 .EQU QEI1_CTL1_QEICK1, 2 .EQU QEI1_CTL1_QEICK0, 1 .EQU QEI1_CTL1_SWPAB, 0 // register------------------------------------- .EQU T8_CNT, 0x40000088 // 0x4000 0088 T8_CNT Bits------------------------------------- .EQU T8_CNT_TXCNT15, 15 .EQU T8_CNT_TXCNT14, 14 .EQU T8_CNT_TXCNT13, 13 .EQU T8_CNT_TXCNT12, 12 .EQU T8_CNT_TXCNT11, 11 .EQU T8_CNT_TXCNT10, 10 .EQU T8_CNT_TXCNT9, 9 .EQU T8_CNT_TXCNT8, 8 .EQU T8_CNT_TXCNT7, 7 .EQU T8_CNT_TXCNT6, 6 .EQU T8_CNT_TXCNT5, 5 .EQU T8_CNT_TXCNT4, 4 .EQU T8_CNT_TXCNT3, 3 .EQU T8_CNT_TXCNT2, 2 .EQU T8_CNT_TXCNT1, 1 .EQU T8_CNT_TXCNT0, 0 // register------------------------------------- .EQU T8_PPX, 0x4000008C // 0x4000 008C T8_PPX Bits------------------------------------- .EQU T8_PPX_PPX15, 15 .EQU T8_PPX_PPX14, 14 .EQU T8_PPX_PPX13, 13 .EQU T8_PPX_PPX12, 12 .EQU T8_PPX_PPX11, 11 .EQU T8_PPX_PPX10, 10 .EQU T8_PPX_PPX9, 9 .EQU T8_PPX_PPX8, 8 .EQU T8_PPX_PPX7, 7 .EQU T8_PPX_PPX6, 6 .EQU T8_PPX_PPX5, 5 .EQU T8_PPX_PPX4, 4 .EQU T8_PPX_PPX3, 3 .EQU T8_PPX_PPX2, 2 .EQU T8_PPX_PPX1, 1 .EQU T8_PPX_PPX0, 0 // register------------------------------------- .EQU T8_PRSC, 0x40000090 // 0x4000 0090 T8_PRSC Bits------------------------------------- .EQU T8_PRSC_TXPRSC15, 15 .EQU T8_PRSC_TXPRSC14, 14 .EQU T8_PRSC_TXPRSC13, 13 .EQU T8_PRSC_TXPRSC12, 12 .EQU T8_PRSC_TXPRSC11, 11 .EQU T8_PRSC_TXPRSC10, 10 .EQU T8_PRSC_TXPRSC9, 9 .EQU T8_PRSC_TXPRSC8, 8 .EQU T8_PRSC_TXPRSC7, 7 .EQU T8_PRSC_TXPRSC6, 6 .EQU T8_PRSC_TXPRSC5, 5 .EQU T8_PRSC_TXPRSC4, 4 .EQU T8_PRSC_TXPRSC3, 3 .EQU T8_PRSC_TXPRSC2, 2 .EQU T8_PRSC_TXPRSC1, 1 .EQU T8_PRSC_TXPRSC0, 0 // register------------------------------------- .EQU QEI1_DIER, 0x40000094 // 0x4000 0094 QEI1_DIER Bits------------------------------------- .EQU QEI1_DIER_TXIC, 5 .EQU QEI1_DIER_PHEIC, 4 .EQU QEI1_DIER_CNTERRIC, 3 .EQU QEI1_DIER_TXIE, 2 .EQU QEI1_DIER_PHEIE, 1 .EQU QEI1_DIER_CNTERRIE, 0 // register------------------------------------- .EQU T1_CNT, 0x40000100 // 0x4000 0100 T1_CNT Bits------------------------------------- .EQU T1_CNT_TXCNT15, 15 .EQU T1_CNT_TXCNT14, 14 .EQU T1_CNT_TXCNT13, 13 .EQU T1_CNT_TXCNT12, 12 .EQU T1_CNT_TXCNT11, 11 .EQU T1_CNT_TXCNT10, 10 .EQU T1_CNT_TXCNT9, 9 .EQU T1_CNT_TXCNT8, 8 .EQU T1_CNT_TXCNT7, 7 .EQU T1_CNT_TXCNT6, 6 .EQU T1_CNT_TXCNT5, 5 .EQU T1_CNT_TXCNT4, 4 .EQU T1_CNT_TXCNT3, 3 .EQU T1_CNT_TXCNT2, 2 .EQU T1_CNT_TXCNT1, 1 .EQU T1_CNT_TXCNT0, 0 // register------------------------------------- .EQU T1_CTL1, 0x40000104 // 0x4000 0104 T1_CTL1 Bits------------------------------------- .EQU T1_CTL1_TXIF, 13 .EQU T1_CTL1_TXIE, 12 .EQU T1_CTL1_TXCMS2, 10 .EQU T1_CTL1_TXCMS1, 9 .EQU T1_CTL1_TXCMS0, 8 .EQU T1_CTL1_TXDIR, 7 .EQU T1_CTL1_TXCLK1, 6 .EQU T1_CTL1_TXCLK0, 5 .EQU T1_CTL1_TXSY, 3 .EQU T1_CTL1_TXCS, 1 .EQU T1_CTL1_TXEN, 0 // register------------------------------------- .EQU T1_CTL2, 0x40000108 // 0x4000 0108 T1_CTL2 Bits------------------------------------- .EQU T1_CTL2_TRGSEL1, 15 .EQU T1_CTL2_TRGSEL0, 14 .EQU T1_CTL2_TXUR, 13 .EQU T1_CTL2_TXMSSYNC, 12 .EQU T1_CTL2_TXTS3, 11 .EQU T1_CTL2_TXTS2, 10 .EQU T1_CTL2_TXTS1, 9 .EQU T1_CTL2_TXTS0, 8 .EQU T1_CTL2_TXSMS2, 7 .EQU T1_CTL2_TXSMS1, 6 .EQU T1_CTL2_TXSMS0, 5 .EQU T1_CTL2_TXMMS2, 4 .EQU T1_CTL2_TXMMS1, 3 .EQU T1_CTL2_TXMMS0, 2 .EQU T1_CTL2_TXUDEVT, 1 .EQU T1_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T1_PRSC, 0x4000010C // 0x4000 010C T1_PRSC Bits------------------------------------- .EQU T1_PRSC_TXCKS15, 15 .EQU T1_PRSC_TXCKS14, 14 .EQU T1_PRSC_TXCKS13, 13 .EQU T1_PRSC_TXCKS12, 12 .EQU T1_PRSC_TXCKS11, 11 .EQU T1_PRSC_TXCKS10, 10 .EQU T1_PRSC_TXCKS9, 9 .EQU T1_PRSC_TXCKS8, 8 .EQU T1_PRSC_TXCKS7, 7 .EQU T1_PRSC_TXCKS6, 6 .EQU T1_PRSC_TXCKS5, 5 .EQU T1_PRSC_TXCKS4, 4 .EQU T1_PRSC_TXCKS3, 3 .EQU T1_PRSC_TXCKS2, 2 .EQU T1_PRSC_TXCKS1, 1 .EQU T1_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T1_PPX, 0x40000110 // 0x4000 0110 T1_PPX Bits------------------------------------- .EQU T1_PPX_PPX15, 15 .EQU T1_PPX_PPX14, 14 .EQU T1_PPX_PPX13, 13 .EQU T1_PPX_PPX12, 12 .EQU T1_PPX_PPX11, 11 .EQU T1_PPX_PPX10, 10 .EQU T1_PPX_PPX9, 9 .EQU T1_PPX_PPX8, 8 .EQU T1_PPX_PPX7, 7 .EQU T1_PPX_PPX6, 6 .EQU T1_PPX_PPX5, 5 .EQU T1_PPX_PPX4, 4 .EQU T1_PPX_PPX3, 3 .EQU T1_PPX_PPX2, 2 .EQU T1_PPX_PPX1, 1 .EQU T1_PPX_PPX0, 0 // register------------------------------------- .EQU T1_UDTIM, 0x40000114 // 0x4000 0114 T1_UDTIM Bits------------------------------------- .EQU T1_UDTIM_TXUD7, 7 .EQU T1_UDTIM_TXUD6, 6 .EQU T1_UDTIM_TXUD5, 5 .EQU T1_UDTIM_TXUD4, 4 .EQU T1_UDTIM_TXUD3, 3 .EQU T1_UDTIM_TXUD2, 2 .EQU T1_UDTIM_TXUD1, 1 .EQU T1_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP1_C1, 0x40000120 // 0x4000 0120 CCP1_C1 Bits------------------------------------- .EQU CCP1_C1_CCPXCY15, 15 .EQU CCP1_C1_CCPXCY14, 14 .EQU CCP1_C1_CCPXCY13, 13 .EQU CCP1_C1_CCPXCY12, 12 .EQU CCP1_C1_CCPXCY11, 11 .EQU CCP1_C1_CCPXCY10, 10 .EQU CCP1_C1_CCPXCY9, 9 .EQU CCP1_C1_CCPXCY8, 8 .EQU CCP1_C1_CCPXCY7, 7 .EQU CCP1_C1_CCPXCY6, 6 .EQU CCP1_C1_CCPXCY5, 5 .EQU CCP1_C1_CCPXCY4, 4 .EQU CCP1_C1_CCPXCY3, 3 .EQU CCP1_C1_CCPXCY2, 2 .EQU CCP1_C1_CCPXCY1, 1 .EQU CCP1_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP1_C2, 0x40000124 // 0x4000 0124 CCP1_C2 Bits------------------------------------- .EQU CCP1_C2_CCPXCY15, 15 .EQU CCP1_C2_CCPXCY14, 14 .EQU CCP1_C2_CCPXCY13, 13 .EQU CCP1_C2_CCPXCY12, 12 .EQU CCP1_C2_CCPXCY11, 11 .EQU CCP1_C2_CCPXCY10, 10 .EQU CCP1_C2_CCPXCY9, 9 .EQU CCP1_C2_CCPXCY8, 8 .EQU CCP1_C2_CCPXCY7, 7 .EQU CCP1_C2_CCPXCY6, 6 .EQU CCP1_C2_CCPXCY5, 5 .EQU CCP1_C2_CCPXCY4, 4 .EQU CCP1_C2_CCPXCY3, 3 .EQU CCP1_C2_CCPXCY2, 2 .EQU CCP1_C2_CCPXCY1, 1 .EQU CCP1_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP1_C3, 0x40000128 // 0x4000 0128 CCP1_C3 Bits------------------------------------- .EQU CCP1_C3_CCPXCY15, 15 .EQU CCP1_C3_CCPXCY14, 14 .EQU CCP1_C3_CCPXCY13, 13 .EQU CCP1_C3_CCPXCY12, 12 .EQU CCP1_C3_CCPXCY11, 11 .EQU CCP1_C3_CCPXCY10, 10 .EQU CCP1_C3_CCPXCY9, 9 .EQU CCP1_C3_CCPXCY8, 8 .EQU CCP1_C3_CCPXCY7, 7 .EQU CCP1_C3_CCPXCY6, 6 .EQU CCP1_C3_CCPXCY5, 5 .EQU CCP1_C3_CCPXCY4, 4 .EQU CCP1_C3_CCPXCY3, 3 .EQU CCP1_C3_CCPXCY2, 2 .EQU CCP1_C3_CCPXCY1, 1 .EQU CCP1_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP1_C4, 0x4000012C // 0x4000 012C CCP1_C4 Bits------------------------------------- .EQU CCP1_C4_CCPXCY15, 15 .EQU CCP1_C4_CCPXCY14, 14 .EQU CCP1_C4_CCPXCY13, 13 .EQU CCP1_C4_CCPXCY12, 12 .EQU CCP1_C4_CCPXCY11, 11 .EQU CCP1_C4_CCPXCY10, 10 .EQU CCP1_C4_CCPXCY9, 9 .EQU CCP1_C4_CCPXCY8, 8 .EQU CCP1_C4_CCPXCY7, 7 .EQU CCP1_C4_CCPXCY6, 6 .EQU CCP1_C4_CCPXCY5, 5 .EQU CCP1_C4_CCPXCY4, 4 .EQU CCP1_C4_CCPXCY3, 3 .EQU CCP1_C4_CCPXCY2, 2 .EQU CCP1_C4_CCPXCY1, 1 .EQU CCP1_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP1_SRIC, 0x40000130 // 0x4000 0130 CCP1_SRIC Bits------------------------------------- .EQU CCP1_SRIC_TXIC, 6 .EQU CCP1_SRIC_TXUIC, 5 .EQU CCP1_SRIC_TXTIC, 4 .EQU CCP1_SRIC_CC4IC, 3 .EQU CCP1_SRIC_CC3IC, 2 .EQU CCP1_SRIC_CC2IC, 1 .EQU CCP1_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP1_DF, 0x40000134 // 0x4000 0134 CCP1_DF Bits------------------------------------- .EQU CCP1_DF_TXUDF, 5 .EQU CCP1_DF_TXTDF, 4 .EQU CCP1_DF_CC4DF, 3 .EQU CCP1_DF_CC3DF, 2 .EQU CCP1_DF_CC2DF, 1 .EQU CCP1_DF_CC1DF, 0 // register------------------------------------- .EQU CCP1_CTL1, 0x40000140 // 0x4000 0140 CCP1_CTL1 Bits------------------------------------- .EQU CCP1_CTL1_CH4M3, 15 .EQU CCP1_CTL1_CH4M2, 14 .EQU CCP1_CTL1_CH4M1, 13 .EQU CCP1_CTL1_CH4M0, 12 .EQU CCP1_CTL1_CH3M3, 11 .EQU CCP1_CTL1_CH3M2, 10 .EQU CCP1_CTL1_CH3M1, 9 .EQU CCP1_CTL1_CH3M0, 8 .EQU CCP1_CTL1_CH2M3, 7 .EQU CCP1_CTL1_CH2M2, 6 .EQU CCP1_CTL1_CH2M1, 5 .EQU CCP1_CTL1_CH2M0, 4 .EQU CCP1_CTL1_CH1M3, 3 .EQU CCP1_CTL1_CH1M2, 2 .EQU CCP1_CTL1_CH1M1, 1 .EQU CCP1_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP1_R1, 0x40000144 // 0x4000 0144 CCP1_R1 Bits------------------------------------- .EQU CCP1_R1_CCPXRY15, 15 .EQU CCP1_R1_CCPXRY14, 14 .EQU CCP1_R1_CCPXRY13, 13 .EQU CCP1_R1_CCPXRY12, 12 .EQU CCP1_R1_CCPXRY11, 11 .EQU CCP1_R1_CCPXRY10, 10 .EQU CCP1_R1_CCPXRY9, 9 .EQU CCP1_R1_CCPXRY8, 8 .EQU CCP1_R1_CCPXRY7, 7 .EQU CCP1_R1_CCPXRY6, 6 .EQU CCP1_R1_CCPXRY5, 5 .EQU CCP1_R1_CCPXRY4, 4 .EQU CCP1_R1_CCPXRY3, 3 .EQU CCP1_R1_CCPXRY2, 2 .EQU CCP1_R1_CCPXRY1, 1 .EQU CCP1_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP1_R2, 0x40000148 // 0x4000 0148 CCP1_R2 Bits------------------------------------- .EQU CCP1_R2_CCPXRY15, 15 .EQU CCP1_R2_CCPXRY14, 14 .EQU CCP1_R2_CCPXRY13, 13 .EQU CCP1_R2_CCPXRY12, 12 .EQU CCP1_R2_CCPXRY11, 11 .EQU CCP1_R2_CCPXRY10, 10 .EQU CCP1_R2_CCPXRY9, 9 .EQU CCP1_R2_CCPXRY8, 8 .EQU CCP1_R2_CCPXRY7, 7 .EQU CCP1_R2_CCPXRY6, 6 .EQU CCP1_R2_CCPXRY5, 5 .EQU CCP1_R2_CCPXRY4, 4 .EQU CCP1_R2_CCPXRY3, 3 .EQU CCP1_R2_CCPXRY2, 2 .EQU CCP1_R2_CCPXRY1, 1 .EQU CCP1_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP1_R3, 0x4000014C // 0x4000 014C CCP1_R3 Bits------------------------------------- .EQU CCP1_R3_CCPXRY15, 15 .EQU CCP1_R3_CCPXRY14, 14 .EQU CCP1_R3_CCPXRY13, 13 .EQU CCP1_R3_CCPXRY12, 12 .EQU CCP1_R3_CCPXRY11, 11 .EQU CCP1_R3_CCPXRY10, 10 .EQU CCP1_R3_CCPXRY9, 9 .EQU CCP1_R3_CCPXRY8, 8 .EQU CCP1_R3_CCPXRY7, 7 .EQU CCP1_R3_CCPXRY6, 6 .EQU CCP1_R3_CCPXRY5, 5 .EQU CCP1_R3_CCPXRY4, 4 .EQU CCP1_R3_CCPXRY3, 3 .EQU CCP1_R3_CCPXRY2, 2 .EQU CCP1_R3_CCPXRY1, 1 .EQU CCP1_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP1_R4, 0x40000150 // 0x4000 0150 CCP1_R4 Bits------------------------------------- .EQU CCP1_R4_CCPXRY15, 15 .EQU CCP1_R4_CCPXRY14, 14 .EQU CCP1_R4_CCPXRY13, 13 .EQU CCP1_R4_CCPXRY12, 12 .EQU CCP1_R4_CCPXRY11, 11 .EQU CCP1_R4_CCPXRY10, 10 .EQU CCP1_R4_CCPXRY9, 9 .EQU CCP1_R4_CCPXRY8, 8 .EQU CCP1_R4_CCPXRY7, 7 .EQU CCP1_R4_CCPXRY6, 6 .EQU CCP1_R4_CCPXRY5, 5 .EQU CCP1_R4_CCPXRY4, 4 .EQU CCP1_R4_CCPXRY3, 3 .EQU CCP1_R4_CCPXRY2, 2 .EQU CCP1_R4_CCPXRY1, 1 .EQU CCP1_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP1_CTL2, 0x40000154 // 0x4000 0154 CCP1_CTL2 Bits------------------------------------- .EQU CCP1_CTL2_PXOC4CE, 15 .EQU CCP1_CTL2_PXOC3CE, 14 .EQU CCP1_CTL2_PXOC2CE, 13 .EQU CCP1_CTL2_PXOC1CE, 12 .EQU CCP1_CTL2_PXASS1, 11 .EQU CCP1_CTL2_PXASS0, 10 .EQU CCP1_CTL2_TCKSEL1, 9 .EQU CCP1_CTL2_TCKSEL0, 8 .EQU CCP1_CTL2_PXOC4_1, 7 .EQU CCP1_CTL2_PXOC4_0, 6 .EQU CCP1_CTL2_PXOC3_1, 5 .EQU CCP1_CTL2_PXOC3_0, 4 .EQU CCP1_CTL2_PXOC2_1, 3 .EQU CCP1_CTL2_PXOC2_0, 2 .EQU CCP1_CTL2_PXOC1_1, 1 .EQU CCP1_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP1_CTL3, 0x40000158 // 0x4000 0158 CCP1_CTL3 Bits------------------------------------- .EQU CCP1_CTL3_PXSPMST, 15 .EQU CCP1_CTL3_PXPWMI, 14 .EQU CCP1_CTL3_PXXORM, 13 .EQU CCP1_CTL3_PXSPM, 12 .EQU CCP1_CTL3_TXTDE, 11 .EQU CCP1_CTL3_CC4DE, 10 .EQU CCP1_CTL3_CC3DE, 9 .EQU CCP1_CTL3_CC2DE, 8 .EQU CCP1_CTL3_CC1DE, 7 .EQU CCP1_CTL3_TXUDE, 6 .EQU CCP1_CTL3_TXUIE, 5 .EQU CCP1_CTL3_TXTIE, 4 .EQU CCP1_CTL3_CC4IE, 3 .EQU CCP1_CTL3_CC3IE, 2 .EQU CCP1_CTL3_CC2IE, 1 .EQU CCP1_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP1_EGIF, 0x4000015C // 0x4000 015C CCP1_EGIF Bits------------------------------------- .EQU CCP1_EGIF_POSSEL, 13 .EQU CCP1_EGIF_PXSEL, 12 .EQU CCP1_EGIF_TXUIF, 11 .EQU CCP1_EGIF_TXTIF, 10 .EQU CCP1_EGIF_CC4IF, 9 .EQU CCP1_EGIF_CC3IF, 8 .EQU CCP1_EGIF_CC2IF, 7 .EQU CCP1_EGIF_CC1IF, 6 .EQU CCP1_EGIF_TXTRG, 5 .EQU CCP1_EGIF_CC4G, 4 .EQU CCP1_EGIF_CC3G, 3 .EQU CCP1_EGIF_CC2G, 2 .EQU CCP1_EGIF_CC1G, 1 .EQU CCP1_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU T2_CNT, 0x40000180 // 0x4000 0180 T2_CNT Bits------------------------------------- .EQU T2_CNT_TXCNT15, 15 .EQU T2_CNT_TXCNT14, 14 .EQU T2_CNT_TXCNT13, 13 .EQU T2_CNT_TXCNT12, 12 .EQU T2_CNT_TXCNT11, 11 .EQU T2_CNT_TXCNT10, 10 .EQU T2_CNT_TXCNT9, 9 .EQU T2_CNT_TXCNT8, 8 .EQU T2_CNT_TXCNT7, 7 .EQU T2_CNT_TXCNT6, 6 .EQU T2_CNT_TXCNT5, 5 .EQU T2_CNT_TXCNT4, 4 .EQU T2_CNT_TXCNT3, 3 .EQU T2_CNT_TXCNT2, 2 .EQU T2_CNT_TXCNT1, 1 .EQU T2_CNT_TXCNT0, 0 // register------------------------------------- .EQU T2_CTL1, 0x40000184 // 0x4000 0184 T2_CTL1 Bits------------------------------------- .EQU T2_CTL1_TXIF, 13 .EQU T2_CTL1_TXIE, 12 .EQU T2_CTL1_TXCMS2, 10 .EQU T2_CTL1_TXCMS1, 9 .EQU T2_CTL1_TXCMS0, 8 .EQU T2_CTL1_TXDIR, 7 .EQU T2_CTL1_TXCLK1, 6 .EQU T2_CTL1_TXCLK0, 5 .EQU T2_CTL1_TXSY, 3 .EQU T2_CTL1_TXCS, 1 .EQU T2_CTL1_TXEN, 0 // register------------------------------------- .EQU T2_CTL2, 0x40000188 // 0x4000 0188 T2_CTL2 Bits------------------------------------- .EQU T2_CTL2_TRGSEL1, 15 .EQU T2_CTL2_TRGSEL0, 14 .EQU T2_CTL2_TXUR, 13 .EQU T2_CTL2_TXMSSYNC, 12 .EQU T2_CTL2_TXTS3, 11 .EQU T2_CTL2_TXTS2, 10 .EQU T2_CTL2_TXTS1, 9 .EQU T2_CTL2_TXTS0, 8 .EQU T2_CTL2_TXSMS2, 7 .EQU T2_CTL2_TXSMS1, 6 .EQU T2_CTL2_TXSMS0, 5 .EQU T2_CTL2_TXMMS2, 4 .EQU T2_CTL2_TXMMS1, 3 .EQU T2_CTL2_TXMMS0, 2 .EQU T2_CTL2_TXUDEVT, 1 .EQU T2_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T2_PRSC, 0x4000018C // 0x4000 018C T2_PRSC Bits------------------------------------- .EQU T2_PRSC_TXCKS15, 15 .EQU T2_PRSC_TXCKS14, 14 .EQU T2_PRSC_TXCKS13, 13 .EQU T2_PRSC_TXCKS12, 12 .EQU T2_PRSC_TXCKS11, 11 .EQU T2_PRSC_TXCKS10, 10 .EQU T2_PRSC_TXCKS9, 9 .EQU T2_PRSC_TXCKS8, 8 .EQU T2_PRSC_TXCKS7, 7 .EQU T2_PRSC_TXCKS6, 6 .EQU T2_PRSC_TXCKS5, 5 .EQU T2_PRSC_TXCKS4, 4 .EQU T2_PRSC_TXCKS3, 3 .EQU T2_PRSC_TXCKS2, 2 .EQU T2_PRSC_TXCKS1, 1 .EQU T2_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T2_PPX, 0x40000190 // 0x4000 0190 T2_PPX Bits------------------------------------- .EQU T2_PPX_PPX15, 15 .EQU T2_PPX_PPX14, 14 .EQU T2_PPX_PPX13, 13 .EQU T2_PPX_PPX12, 12 .EQU T2_PPX_PPX11, 11 .EQU T2_PPX_PPX10, 10 .EQU T2_PPX_PPX9, 9 .EQU T2_PPX_PPX8, 8 .EQU T2_PPX_PPX7, 7 .EQU T2_PPX_PPX6, 6 .EQU T2_PPX_PPX5, 5 .EQU T2_PPX_PPX4, 4 .EQU T2_PPX_PPX3, 3 .EQU T2_PPX_PPX2, 2 .EQU T2_PPX_PPX1, 1 .EQU T2_PPX_PPX0, 0 // register------------------------------------- .EQU T2_UDTIM, 0x40000194 // 0x4000 0194 T2_UDTIM Bits------------------------------------- .EQU T2_UDTIM_TXUD7, 7 .EQU T2_UDTIM_TXUD6, 6 .EQU T2_UDTIM_TXUD5, 5 .EQU T2_UDTIM_TXUD4, 4 .EQU T2_UDTIM_TXUD3, 3 .EQU T2_UDTIM_TXUD2, 2 .EQU T2_UDTIM_TXUD1, 1 .EQU T2_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP2_C1, 0x400001A0 // 0x4000 01A0 CCP2_C1 Bits------------------------------------- .EQU CCP2_C1_CCPXCY15, 15 .EQU CCP2_C1_CCPXCY14, 14 .EQU CCP2_C1_CCPXCY13, 13 .EQU CCP2_C1_CCPXCY12, 12 .EQU CCP2_C1_CCPXCY11, 11 .EQU CCP2_C1_CCPXCY10, 10 .EQU CCP2_C1_CCPXCY9, 9 .EQU CCP2_C1_CCPXCY8, 8 .EQU CCP2_C1_CCPXCY7, 7 .EQU CCP2_C1_CCPXCY6, 6 .EQU CCP2_C1_CCPXCY5, 5 .EQU CCP2_C1_CCPXCY4, 4 .EQU CCP2_C1_CCPXCY3, 3 .EQU CCP2_C1_CCPXCY2, 2 .EQU CCP2_C1_CCPXCY1, 1 .EQU CCP2_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP2_C2, 0x400001A4 // 0x4000 01A4 CCP2_C2 Bits------------------------------------- .EQU CCP2_C2_CCPXCY15, 15 .EQU CCP2_C2_CCPXCY14, 14 .EQU CCP2_C2_CCPXCY13, 13 .EQU CCP2_C2_CCPXCY12, 12 .EQU CCP2_C2_CCPXCY11, 11 .EQU CCP2_C2_CCPXCY10, 10 .EQU CCP2_C2_CCPXCY9, 9 .EQU CCP2_C2_CCPXCY8, 8 .EQU CCP2_C2_CCPXCY7, 7 .EQU CCP2_C2_CCPXCY6, 6 .EQU CCP2_C2_CCPXCY5, 5 .EQU CCP2_C2_CCPXCY4, 4 .EQU CCP2_C2_CCPXCY3, 3 .EQU CCP2_C2_CCPXCY2, 2 .EQU CCP2_C2_CCPXCY1, 1 .EQU CCP2_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP2_C3, 0x400001A8 // 0x4000 01A8 CCP2_C3 Bits------------------------------------- .EQU CCP2_C3_CCPXCY15, 15 .EQU CCP2_C3_CCPXCY14, 14 .EQU CCP2_C3_CCPXCY13, 13 .EQU CCP2_C3_CCPXCY12, 12 .EQU CCP2_C3_CCPXCY11, 11 .EQU CCP2_C3_CCPXCY10, 10 .EQU CCP2_C3_CCPXCY9, 9 .EQU CCP2_C3_CCPXCY8, 8 .EQU CCP2_C3_CCPXCY7, 7 .EQU CCP2_C3_CCPXCY6, 6 .EQU CCP2_C3_CCPXCY5, 5 .EQU CCP2_C3_CCPXCY4, 4 .EQU CCP2_C3_CCPXCY3, 3 .EQU CCP2_C3_CCPXCY2, 2 .EQU CCP2_C3_CCPXCY1, 1 .EQU CCP2_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP2_C4, 0x400001AC // 0x4000 01AC CCP2_C4 Bits------------------------------------- .EQU CCP2_C4_CCPXCY15, 15 .EQU CCP2_C4_CCPXCY14, 14 .EQU CCP2_C4_CCPXCY13, 13 .EQU CCP2_C4_CCPXCY12, 12 .EQU CCP2_C4_CCPXCY11, 11 .EQU CCP2_C4_CCPXCY10, 10 .EQU CCP2_C4_CCPXCY9, 9 .EQU CCP2_C4_CCPXCY8, 8 .EQU CCP2_C4_CCPXCY7, 7 .EQU CCP2_C4_CCPXCY6, 6 .EQU CCP2_C4_CCPXCY5, 5 .EQU CCP2_C4_CCPXCY4, 4 .EQU CCP2_C4_CCPXCY3, 3 .EQU CCP2_C4_CCPXCY2, 2 .EQU CCP2_C4_CCPXCY1, 1 .EQU CCP2_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP2_SRIC, 0x400001B0 // 0x4000 01B0 CCP2_SRIC Bits------------------------------------- .EQU CCP2_SRIC_TXIC, 6 .EQU CCP2_SRIC_TXUIC, 5 .EQU CCP2_SRIC_TXTIC, 4 .EQU CCP2_SRIC_CC4IC, 3 .EQU CCP2_SRIC_CC3IC, 2 .EQU CCP2_SRIC_CC2IC, 1 .EQU CCP2_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP2_DF, 0x400001B4 // 0x4000 01B4 CCP2_DF Bits------------------------------------- .EQU CCP2_DF_TXUDF, 5 .EQU CCP2_DF_TXTDF, 4 .EQU CCP2_DF_CC4DF, 3 .EQU CCP2_DF_CC3DF, 2 .EQU CCP2_DF_CC2DF, 1 .EQU CCP2_DF_CC1DF, 0 // register------------------------------------- .EQU CCP2_CTL1, 0x400001C0 // 0x4000 01C0 CCP2_CTL1 Bits------------------------------------- .EQU CCP2_CTL1_CH4M3, 15 .EQU CCP2_CTL1_CH4M2, 14 .EQU CCP2_CTL1_CH4M1, 13 .EQU CCP2_CTL1_CH4M0, 12 .EQU CCP2_CTL1_CH3M3, 11 .EQU CCP2_CTL1_CH3M2, 10 .EQU CCP2_CTL1_CH3M1, 9 .EQU CCP2_CTL1_CH3M0, 8 .EQU CCP2_CTL1_CH2M3, 7 .EQU CCP2_CTL1_CH2M2, 6 .EQU CCP2_CTL1_CH2M1, 5 .EQU CCP2_CTL1_CH2M0, 4 .EQU CCP2_CTL1_CH1M3, 3 .EQU CCP2_CTL1_CH1M2, 2 .EQU CCP2_CTL1_CH1M1, 1 .EQU CCP2_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP2_R1, 0x400001C4 // 0x4000 01C4 CCP2_R1 Bits------------------------------------- .EQU CCP2_R1_CCPXRY15, 15 .EQU CCP2_R1_CCPXRY14, 14 .EQU CCP2_R1_CCPXRY13, 13 .EQU CCP2_R1_CCPXRY12, 12 .EQU CCP2_R1_CCPXRY11, 11 .EQU CCP2_R1_CCPXRY10, 10 .EQU CCP2_R1_CCPXRY9, 9 .EQU CCP2_R1_CCPXRY8, 8 .EQU CCP2_R1_CCPXRY7, 7 .EQU CCP2_R1_CCPXRY6, 6 .EQU CCP2_R1_CCPXRY5, 5 .EQU CCP2_R1_CCPXRY4, 4 .EQU CCP2_R1_CCPXRY3, 3 .EQU CCP2_R1_CCPXRY2, 2 .EQU CCP2_R1_CCPXRY1, 1 .EQU CCP2_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP2_R2, 0x400001C8 // 0x4000 01C8 CCP2_R2 Bits------------------------------------- .EQU CCP2_R2_CCPXRY15, 15 .EQU CCP2_R2_CCPXRY14, 14 .EQU CCP2_R2_CCPXRY13, 13 .EQU CCP2_R2_CCPXRY12, 12 .EQU CCP2_R2_CCPXRY11, 11 .EQU CCP2_R2_CCPXRY10, 10 .EQU CCP2_R2_CCPXRY9, 9 .EQU CCP2_R2_CCPXRY8, 8 .EQU CCP2_R2_CCPXRY7, 7 .EQU CCP2_R2_CCPXRY6, 6 .EQU CCP2_R2_CCPXRY5, 5 .EQU CCP2_R2_CCPXRY4, 4 .EQU CCP2_R2_CCPXRY3, 3 .EQU CCP2_R2_CCPXRY2, 2 .EQU CCP2_R2_CCPXRY1, 1 .EQU CCP2_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP2_R3, 0x400001CC // 0x4000 01CC CCP2_R3 Bits------------------------------------- .EQU CCP2_R3_CCPXRY15, 15 .EQU CCP2_R3_CCPXRY14, 14 .EQU CCP2_R3_CCPXRY13, 13 .EQU CCP2_R3_CCPXRY12, 12 .EQU CCP2_R3_CCPXRY11, 11 .EQU CCP2_R3_CCPXRY10, 10 .EQU CCP2_R3_CCPXRY9, 9 .EQU CCP2_R3_CCPXRY8, 8 .EQU CCP2_R3_CCPXRY7, 7 .EQU CCP2_R3_CCPXRY6, 6 .EQU CCP2_R3_CCPXRY5, 5 .EQU CCP2_R3_CCPXRY4, 4 .EQU CCP2_R3_CCPXRY3, 3 .EQU CCP2_R3_CCPXRY2, 2 .EQU CCP2_R3_CCPXRY1, 1 .EQU CCP2_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP2_R4, 0x400001D0 // 0x4000 01D0 CCP2_R4 Bits------------------------------------- .EQU CCP2_R4_CCPXRY15, 15 .EQU CCP2_R4_CCPXRY14, 14 .EQU CCP2_R4_CCPXRY13, 13 .EQU CCP2_R4_CCPXRY12, 12 .EQU CCP2_R4_CCPXRY11, 11 .EQU CCP2_R4_CCPXRY10, 10 .EQU CCP2_R4_CCPXRY9, 9 .EQU CCP2_R4_CCPXRY8, 8 .EQU CCP2_R4_CCPXRY7, 7 .EQU CCP2_R4_CCPXRY6, 6 .EQU CCP2_R4_CCPXRY5, 5 .EQU CCP2_R4_CCPXRY4, 4 .EQU CCP2_R4_CCPXRY3, 3 .EQU CCP2_R4_CCPXRY2, 2 .EQU CCP2_R4_CCPXRY1, 1 .EQU CCP2_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP2_CTL2, 0x400001D4 // 0x4000 01D4 CCP2_CTL2 Bits------------------------------------- .EQU CCP2_CTL2_PXOC4CE, 15 .EQU CCP2_CTL2_PXOC3CE, 14 .EQU CCP2_CTL2_PXOC2CE, 13 .EQU CCP2_CTL2_PXOC1CE, 12 .EQU CCP2_CTL2_PXASS1, 11 .EQU CCP2_CTL2_PXASS0, 10 .EQU CCP2_CTL2_TCKSEL1, 9 .EQU CCP2_CTL2_TCKSEL0, 8 .EQU CCP2_CTL2_PXOC4_1, 7 .EQU CCP2_CTL2_PXOC4_0, 6 .EQU CCP2_CTL2_PXOC3_1, 5 .EQU CCP2_CTL2_PXOC3_0, 4 .EQU CCP2_CTL2_PXOC2_1, 3 .EQU CCP2_CTL2_PXOC2_0, 2 .EQU CCP2_CTL2_PXOC1_1, 1 .EQU CCP2_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP2_CTL3, 0x400001D8 // 0x4000 01D8 CCP2_CTL3 Bits------------------------------------- .EQU CCP2_CTL3_PXSPMST, 15 .EQU CCP2_CTL3_PXPWMI, 14 .EQU CCP2_CTL3_PXXORM, 13 .EQU CCP2_CTL3_PXSPM, 12 .EQU CCP2_CTL3_TXTDE, 11 .EQU CCP2_CTL3_CC4DE, 10 .EQU CCP2_CTL3_CC3DE, 9 .EQU CCP2_CTL3_CC2DE, 8 .EQU CCP2_CTL3_CC1DE, 7 .EQU CCP2_CTL3_TXUDE, 6 .EQU CCP2_CTL3_TXUIE, 5 .EQU CCP2_CTL3_TXTIE, 4 .EQU CCP2_CTL3_CC4IE, 3 .EQU CCP2_CTL3_CC3IE, 2 .EQU CCP2_CTL3_CC2IE, 1 .EQU CCP2_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP2_EGIF, 0x400001DC // 0x4000 01DC CCP2_EGIF Bits------------------------------------- .EQU CCP2_EGIF_POSSEL, 13 .EQU CCP2_EGIF_PXSEL, 12 .EQU CCP2_EGIF_TXUIF, 11 .EQU CCP2_EGIF_TXTIF, 10 .EQU CCP2_EGIF_CC4IF, 9 .EQU CCP2_EGIF_CC3IF, 8 .EQU CCP2_EGIF_CC2IF, 7 .EQU CCP2_EGIF_CC1IF, 6 .EQU CCP2_EGIF_TXTRG, 5 .EQU CCP2_EGIF_CC4G, 4 .EQU CCP2_EGIF_CC3G, 3 .EQU CCP2_EGIF_CC2G, 2 .EQU CCP2_EGIF_CC1G, 1 .EQU CCP2_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU T3_CNT, 0x40000200 // 0x4000 0200 T3_CNT Bits------------------------------------- .EQU T3_CNT_TXCNT15, 15 .EQU T3_CNT_TXCNT14, 14 .EQU T3_CNT_TXCNT13, 13 .EQU T3_CNT_TXCNT12, 12 .EQU T3_CNT_TXCNT11, 11 .EQU T3_CNT_TXCNT10, 10 .EQU T3_CNT_TXCNT9, 9 .EQU T3_CNT_TXCNT8, 8 .EQU T3_CNT_TXCNT7, 7 .EQU T3_CNT_TXCNT6, 6 .EQU T3_CNT_TXCNT5, 5 .EQU T3_CNT_TXCNT4, 4 .EQU T3_CNT_TXCNT3, 3 .EQU T3_CNT_TXCNT2, 2 .EQU T3_CNT_TXCNT1, 1 .EQU T3_CNT_TXCNT0, 0 // register------------------------------------- .EQU T3_CTL1, 0x40000204 // 0x4000 0204 T3_CTL1 Bits------------------------------------- .EQU T3_CTL1_TXIF, 13 .EQU T3_CTL1_TXIE, 12 .EQU T3_CTL1_TXCMS2, 10 .EQU T3_CTL1_TXCMS1, 9 .EQU T3_CTL1_TXCMS0, 8 .EQU T3_CTL1_TXDIR, 7 .EQU T3_CTL1_TXCLK1, 6 .EQU T3_CTL1_TXCLK0, 5 .EQU T3_CTL1_TXSY, 3 .EQU T3_CTL1_TXCS, 1 .EQU T3_CTL1_TXEN, 0 // register------------------------------------- .EQU T3_CTL2, 0x40000208 // 0x4000 0208 T3_CTL2 Bits------------------------------------- .EQU T3_CTL2_TRGSEL1, 15 .EQU T3_CTL2_TRGSEL0, 14 .EQU T3_CTL2_TXUR, 13 .EQU T3_CTL2_TXMSSYNC, 12 .EQU T3_CTL2_TXTS3, 11 .EQU T3_CTL2_TXTS2, 10 .EQU T3_CTL2_TXTS1, 9 .EQU T3_CTL2_TXTS0, 8 .EQU T3_CTL2_TXSMS2, 7 .EQU T3_CTL2_TXSMS1, 6 .EQU T3_CTL2_TXSMS0, 5 .EQU T3_CTL2_TXMMS2, 4 .EQU T3_CTL2_TXMMS1, 3 .EQU T3_CTL2_TXMMS0, 2 .EQU T3_CTL2_TXUDEVT, 1 .EQU T3_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T3_PRSC, 0x4000020C // 0x4000 020C T3_PRSC Bits------------------------------------- .EQU T3_PRSC_TXCKS15, 15 .EQU T3_PRSC_TXCKS14, 14 .EQU T3_PRSC_TXCKS13, 13 .EQU T3_PRSC_TXCKS12, 12 .EQU T3_PRSC_TXCKS11, 11 .EQU T3_PRSC_TXCKS10, 10 .EQU T3_PRSC_TXCKS9, 9 .EQU T3_PRSC_TXCKS8, 8 .EQU T3_PRSC_TXCKS7, 7 .EQU T3_PRSC_TXCKS6, 6 .EQU T3_PRSC_TXCKS5, 5 .EQU T3_PRSC_TXCKS4, 4 .EQU T3_PRSC_TXCKS3, 3 .EQU T3_PRSC_TXCKS2, 2 .EQU T3_PRSC_TXCKS1, 1 .EQU T3_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T3_PPX, 0x40000210 // 0x4000 0210 T3_PPX Bits------------------------------------- .EQU T3_PPX_PPX15, 15 .EQU T3_PPX_PPX14, 14 .EQU T3_PPX_PPX13, 13 .EQU T3_PPX_PPX12, 12 .EQU T3_PPX_PPX11, 11 .EQU T3_PPX_PPX10, 10 .EQU T3_PPX_PPX9, 9 .EQU T3_PPX_PPX8, 8 .EQU T3_PPX_PPX7, 7 .EQU T3_PPX_PPX6, 6 .EQU T3_PPX_PPX5, 5 .EQU T3_PPX_PPX4, 4 .EQU T3_PPX_PPX3, 3 .EQU T3_PPX_PPX2, 2 .EQU T3_PPX_PPX1, 1 .EQU T3_PPX_PPX0, 0 // register------------------------------------- .EQU T3_UDTIM, 0x40000214 // 0x4000 0214 T3_UDTIM Bits------------------------------------- .EQU T3_UDTIM_TXUD7, 7 .EQU T3_UDTIM_TXUD6, 6 .EQU T3_UDTIM_TXUD5, 5 .EQU T3_UDTIM_TXUD4, 4 .EQU T3_UDTIM_TXUD3, 3 .EQU T3_UDTIM_TXUD2, 2 .EQU T3_UDTIM_TXUD1, 1 .EQU T3_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP3_C1, 0x40000220 // 0x4000 0220 CCP3_C1 Bits------------------------------------- .EQU CCP3_C1_CCPXCY15, 15 .EQU CCP3_C1_CCPXCY14, 14 .EQU CCP3_C1_CCPXCY13, 13 .EQU CCP3_C1_CCPXCY12, 12 .EQU CCP3_C1_CCPXCY11, 11 .EQU CCP3_C1_CCPXCY10, 10 .EQU CCP3_C1_CCPXCY9, 9 .EQU CCP3_C1_CCPXCY8, 8 .EQU CCP3_C1_CCPXCY7, 7 .EQU CCP3_C1_CCPXCY6, 6 .EQU CCP3_C1_CCPXCY5, 5 .EQU CCP3_C1_CCPXCY4, 4 .EQU CCP3_C1_CCPXCY3, 3 .EQU CCP3_C1_CCPXCY2, 2 .EQU CCP3_C1_CCPXCY1, 1 .EQU CCP3_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP3_C2, 0x40000224 // 0x4000 0224 CCP3_C2 Bits------------------------------------- .EQU CCP3_C2_CCPXCY15, 15 .EQU CCP3_C2_CCPXCY14, 14 .EQU CCP3_C2_CCPXCY13, 13 .EQU CCP3_C2_CCPXCY12, 12 .EQU CCP3_C2_CCPXCY11, 11 .EQU CCP3_C2_CCPXCY10, 10 .EQU CCP3_C2_CCPXCY9, 9 .EQU CCP3_C2_CCPXCY8, 8 .EQU CCP3_C2_CCPXCY7, 7 .EQU CCP3_C2_CCPXCY6, 6 .EQU CCP3_C2_CCPXCY5, 5 .EQU CCP3_C2_CCPXCY4, 4 .EQU CCP3_C2_CCPXCY3, 3 .EQU CCP3_C2_CCPXCY2, 2 .EQU CCP3_C2_CCPXCY1, 1 .EQU CCP3_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP3_C3, 0x40000228 // 0x4000 0228 CCP3_C3 Bits------------------------------------- .EQU CCP3_C3_CCPXCY15, 15 .EQU CCP3_C3_CCPXCY14, 14 .EQU CCP3_C3_CCPXCY13, 13 .EQU CCP3_C3_CCPXCY12, 12 .EQU CCP3_C3_CCPXCY11, 11 .EQU CCP3_C3_CCPXCY10, 10 .EQU CCP3_C3_CCPXCY9, 9 .EQU CCP3_C3_CCPXCY8, 8 .EQU CCP3_C3_CCPXCY7, 7 .EQU CCP3_C3_CCPXCY6, 6 .EQU CCP3_C3_CCPXCY5, 5 .EQU CCP3_C3_CCPXCY4, 4 .EQU CCP3_C3_CCPXCY3, 3 .EQU CCP3_C3_CCPXCY2, 2 .EQU CCP3_C3_CCPXCY1, 1 .EQU CCP3_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP3_C4, 0x4000022C // 0x4000 022C CCP3_C4 Bits------------------------------------- .EQU CCP3_C4_CCPXCY15, 15 .EQU CCP3_C4_CCPXCY14, 14 .EQU CCP3_C4_CCPXCY13, 13 .EQU CCP3_C4_CCPXCY12, 12 .EQU CCP3_C4_CCPXCY11, 11 .EQU CCP3_C4_CCPXCY10, 10 .EQU CCP3_C4_CCPXCY9, 9 .EQU CCP3_C4_CCPXCY8, 8 .EQU CCP3_C4_CCPXCY7, 7 .EQU CCP3_C4_CCPXCY6, 6 .EQU CCP3_C4_CCPXCY5, 5 .EQU CCP3_C4_CCPXCY4, 4 .EQU CCP3_C4_CCPXCY3, 3 .EQU CCP3_C4_CCPXCY2, 2 .EQU CCP3_C4_CCPXCY1, 1 .EQU CCP3_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP3_SRIC, 0x40000230 // 0x4000 0230 CCP3_SRIC Bits------------------------------------- .EQU CCP3_SRIC_TXIC, 6 .EQU CCP3_SRIC_TXUIC, 5 .EQU CCP3_SRIC_TXTIC, 4 .EQU CCP3_SRIC_CC4IC, 3 .EQU CCP3_SRIC_CC3IC, 2 .EQU CCP3_SRIC_CC2IC, 1 .EQU CCP3_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP3_DF, 0x40000234 // 0x4000 0234 CCP3_DF Bits------------------------------------- .EQU CCP3_DF_TXUDF, 5 .EQU CCP3_DF_TXTDF, 4 .EQU CCP3_DF_CC4DF, 3 .EQU CCP3_DF_CC3DF, 2 .EQU CCP3_DF_CC2DF, 1 .EQU CCP3_DF_CC1DF, 0 // register------------------------------------- .EQU CCP3_CTL1, 0x40000240 // 0x4000 0240 CCP3_CTL1 Bits------------------------------------- .EQU CCP3_CTL1_CH4M3, 15 .EQU CCP3_CTL1_CH4M2, 14 .EQU CCP3_CTL1_CH4M1, 13 .EQU CCP3_CTL1_CH4M0, 12 .EQU CCP3_CTL1_CH3M3, 11 .EQU CCP3_CTL1_CH3M2, 10 .EQU CCP3_CTL1_CH3M1, 9 .EQU CCP3_CTL1_CH3M0, 8 .EQU CCP3_CTL1_CH2M3, 7 .EQU CCP3_CTL1_CH2M2, 6 .EQU CCP3_CTL1_CH2M1, 5 .EQU CCP3_CTL1_CH2M0, 4 .EQU CCP3_CTL1_CH1M3, 3 .EQU CCP3_CTL1_CH1M2, 2 .EQU CCP3_CTL1_CH1M1, 1 .EQU CCP3_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP3_R1, 0x40000244 // 0x4000 0244 CCP3_R1 Bits------------------------------------- .EQU CCP3_R1_CCPXRY15, 15 .EQU CCP3_R1_CCPXRY14, 14 .EQU CCP3_R1_CCPXRY13, 13 .EQU CCP3_R1_CCPXRY12, 12 .EQU CCP3_R1_CCPXRY11, 11 .EQU CCP3_R1_CCPXRY10, 10 .EQU CCP3_R1_CCPXRY9, 9 .EQU CCP3_R1_CCPXRY8, 8 .EQU CCP3_R1_CCPXRY7, 7 .EQU CCP3_R1_CCPXRY6, 6 .EQU CCP3_R1_CCPXRY5, 5 .EQU CCP3_R1_CCPXRY4, 4 .EQU CCP3_R1_CCPXRY3, 3 .EQU CCP3_R1_CCPXRY2, 2 .EQU CCP3_R1_CCPXRY1, 1 .EQU CCP3_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP3_R2, 0x40000248 // 0x4000 0248 CCP3_R2 Bits------------------------------------- .EQU CCP3_R2_CCPXRY15, 15 .EQU CCP3_R2_CCPXRY14, 14 .EQU CCP3_R2_CCPXRY13, 13 .EQU CCP3_R2_CCPXRY12, 12 .EQU CCP3_R2_CCPXRY11, 11 .EQU CCP3_R2_CCPXRY10, 10 .EQU CCP3_R2_CCPXRY9, 9 .EQU CCP3_R2_CCPXRY8, 8 .EQU CCP3_R2_CCPXRY7, 7 .EQU CCP3_R2_CCPXRY6, 6 .EQU CCP3_R2_CCPXRY5, 5 .EQU CCP3_R2_CCPXRY4, 4 .EQU CCP3_R2_CCPXRY3, 3 .EQU CCP3_R2_CCPXRY2, 2 .EQU CCP3_R2_CCPXRY1, 1 .EQU CCP3_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP3_R3, 0x4000024C // 0x4000 024C CCP3_R3 Bits------------------------------------- .EQU CCP3_R3_CCPXRY15, 15 .EQU CCP3_R3_CCPXRY14, 14 .EQU CCP3_R3_CCPXRY13, 13 .EQU CCP3_R3_CCPXRY12, 12 .EQU CCP3_R3_CCPXRY11, 11 .EQU CCP3_R3_CCPXRY10, 10 .EQU CCP3_R3_CCPXRY9, 9 .EQU CCP3_R3_CCPXRY8, 8 .EQU CCP3_R3_CCPXRY7, 7 .EQU CCP3_R3_CCPXRY6, 6 .EQU CCP3_R3_CCPXRY5, 5 .EQU CCP3_R3_CCPXRY4, 4 .EQU CCP3_R3_CCPXRY3, 3 .EQU CCP3_R3_CCPXRY2, 2 .EQU CCP3_R3_CCPXRY1, 1 .EQU CCP3_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP3_R4, 0x40000250 // 0x4000 0250 CCP3_R4 Bits------------------------------------- .EQU CCP3_R4_CCPXRY15, 15 .EQU CCP3_R4_CCPXRY14, 14 .EQU CCP3_R4_CCPXRY13, 13 .EQU CCP3_R4_CCPXRY12, 12 .EQU CCP3_R4_CCPXRY11, 11 .EQU CCP3_R4_CCPXRY10, 10 .EQU CCP3_R4_CCPXRY9, 9 .EQU CCP3_R4_CCPXRY8, 8 .EQU CCP3_R4_CCPXRY7, 7 .EQU CCP3_R4_CCPXRY6, 6 .EQU CCP3_R4_CCPXRY5, 5 .EQU CCP3_R4_CCPXRY4, 4 .EQU CCP3_R4_CCPXRY3, 3 .EQU CCP3_R4_CCPXRY2, 2 .EQU CCP3_R4_CCPXRY1, 1 .EQU CCP3_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP3_CTL2, 0x40000254 // 0x4000 0254 CCP3_CTL2 Bits------------------------------------- .EQU CCP3_CTL2_PXOC4CE, 15 .EQU CCP3_CTL2_PXOC3CE, 14 .EQU CCP3_CTL2_PXOC2CE, 13 .EQU CCP3_CTL2_PXOC1CE, 12 .EQU CCP3_CTL2_PXASS1, 11 .EQU CCP3_CTL2_PXASS0, 10 .EQU CCP3_CTL2_TCKSEL1, 9 .EQU CCP3_CTL2_TCKSEL0, 8 .EQU CCP3_CTL2_PXOC4_1, 7 .EQU CCP3_CTL2_PXOC4_0, 6 .EQU CCP3_CTL2_PXOC3_1, 5 .EQU CCP3_CTL2_PXOC3_0, 4 .EQU CCP3_CTL2_PXOC2_1, 3 .EQU CCP3_CTL2_PXOC2_0, 2 .EQU CCP3_CTL2_PXOC1_1, 1 .EQU CCP3_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP3_CTL3, 0x40000258 // 0x4000 0258 CCP3_CTL3 Bits------------------------------------- .EQU CCP3_CTL3_PXSPMST, 15 .EQU CCP3_CTL3_PXPWMI, 14 .EQU CCP3_CTL3_PXXORM, 13 .EQU CCP3_CTL3_PXSPM, 12 .EQU CCP3_CTL3_TXTDE, 11 .EQU CCP3_CTL3_CC4DE, 10 .EQU CCP3_CTL3_CC3DE, 9 .EQU CCP3_CTL3_CC2DE, 8 .EQU CCP3_CTL3_CC1DE, 7 .EQU CCP3_CTL3_TXUDE, 6 .EQU CCP3_CTL3_TXUIE, 5 .EQU CCP3_CTL3_TXTIE, 4 .EQU CCP3_CTL3_CC4IE, 3 .EQU CCP3_CTL3_CC3IE, 2 .EQU CCP3_CTL3_CC2IE, 1 .EQU CCP3_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP3_EGIF, 0x4000025C // 0x4000 025C CCP3_EGIF Bits------------------------------------- .EQU CCP3_EGIF_POSSEL, 13 .EQU CCP3_EGIF_PXSEL, 12 .EQU CCP3_EGIF_TXUIF, 11 .EQU CCP3_EGIF_TXTIF, 10 .EQU CCP3_EGIF_CC4IF, 9 .EQU CCP3_EGIF_CC3IF, 8 .EQU CCP3_EGIF_CC2IF, 7 .EQU CCP3_EGIF_CC1IF, 6 .EQU CCP3_EGIF_TXTRG, 5 .EQU CCP3_EGIF_CC4G, 4 .EQU CCP3_EGIF_CC3G, 3 .EQU CCP3_EGIF_CC2G, 2 .EQU CCP3_EGIF_CC1G, 1 .EQU CCP3_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU T4_CNT, 0x40000280 // 0x4000 0280 T4_CNT Bits------------------------------------- .EQU T4_CNT_TXCNT15, 15 .EQU T4_CNT_TXCNT14, 14 .EQU T4_CNT_TXCNT13, 13 .EQU T4_CNT_TXCNT12, 12 .EQU T4_CNT_TXCNT11, 11 .EQU T4_CNT_TXCNT10, 10 .EQU T4_CNT_TXCNT9, 9 .EQU T4_CNT_TXCNT8, 8 .EQU T4_CNT_TXCNT7, 7 .EQU T4_CNT_TXCNT6, 6 .EQU T4_CNT_TXCNT5, 5 .EQU T4_CNT_TXCNT4, 4 .EQU T4_CNT_TXCNT3, 3 .EQU T4_CNT_TXCNT2, 2 .EQU T4_CNT_TXCNT1, 1 .EQU T4_CNT_TXCNT0, 0 // register------------------------------------- .EQU T4_CTL1, 0x40000284 // 0x4000 0284 T4_CTL1 Bits------------------------------------- .EQU T4_CTL1_TXIF, 13 .EQU T4_CTL1_TXIE, 12 .EQU T4_CTL1_TXCMS2, 10 .EQU T4_CTL1_TXCMS1, 9 .EQU T4_CTL1_TXCMS0, 8 .EQU T4_CTL1_TXDIR, 7 .EQU T4_CTL1_TXCLK1, 6 .EQU T4_CTL1_TXCLK0, 5 .EQU T4_CTL1_TXSY, 3 .EQU T4_CTL1_TXCS, 1 .EQU T4_CTL1_TXEN, 0 // register------------------------------------- .EQU T4_CTL2, 0x40000288 // 0x4000 0288 T4_CTL2 Bits------------------------------------- .EQU T4_CTL2_TRGSEL1, 15 .EQU T4_CTL2_TRGSEL0, 14 .EQU T4_CTL2_TXUR, 13 .EQU T4_CTL2_TXMSSYNC, 12 .EQU T4_CTL2_TXTS3, 11 .EQU T4_CTL2_TXTS2, 10 .EQU T4_CTL2_TXTS1, 9 .EQU T4_CTL2_TXTS0, 8 .EQU T4_CTL2_TXSMS2, 7 .EQU T4_CTL2_TXSMS1, 6 .EQU T4_CTL2_TXSMS0, 5 .EQU T4_CTL2_TXMMS2, 4 .EQU T4_CTL2_TXMMS1, 3 .EQU T4_CTL2_TXMMS0, 2 .EQU T4_CTL2_TXUDEVT, 1 .EQU T4_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T4_PRSC, 0x4000028C // 0x4000 028C T4_PRSC Bits------------------------------------- .EQU T4_PRSC_TXCKS15, 15 .EQU T4_PRSC_TXCKS14, 14 .EQU T4_PRSC_TXCKS13, 13 .EQU T4_PRSC_TXCKS12, 12 .EQU T4_PRSC_TXCKS11, 11 .EQU T4_PRSC_TXCKS10, 10 .EQU T4_PRSC_TXCKS9, 9 .EQU T4_PRSC_TXCKS8, 8 .EQU T4_PRSC_TXCKS7, 7 .EQU T4_PRSC_TXCKS6, 6 .EQU T4_PRSC_TXCKS5, 5 .EQU T4_PRSC_TXCKS4, 4 .EQU T4_PRSC_TXCKS3, 3 .EQU T4_PRSC_TXCKS2, 2 .EQU T4_PRSC_TXCKS1, 1 .EQU T4_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T4_PPX, 0x40000290 // 0x4000 0290 T4_PPX Bits------------------------------------- .EQU T4_PPX_PPX15, 15 .EQU T4_PPX_PPX14, 14 .EQU T4_PPX_PPX13, 13 .EQU T4_PPX_PPX12, 12 .EQU T4_PPX_PPX11, 11 .EQU T4_PPX_PPX10, 10 .EQU T4_PPX_PPX9, 9 .EQU T4_PPX_PPX8, 8 .EQU T4_PPX_PPX7, 7 .EQU T4_PPX_PPX6, 6 .EQU T4_PPX_PPX5, 5 .EQU T4_PPX_PPX4, 4 .EQU T4_PPX_PPX3, 3 .EQU T4_PPX_PPX2, 2 .EQU T4_PPX_PPX1, 1 .EQU T4_PPX_PPX0, 0 // register------------------------------------- .EQU T4_UDTIM, 0x40000294 // 0x4000 0294 T4_UDTIM Bits------------------------------------- .EQU T4_UDTIM_TXUD7, 7 .EQU T4_UDTIM_TXUD6, 6 .EQU T4_UDTIM_TXUD5, 5 .EQU T4_UDTIM_TXUD4, 4 .EQU T4_UDTIM_TXUD3, 3 .EQU T4_UDTIM_TXUD2, 2 .EQU T4_UDTIM_TXUD1, 1 .EQU T4_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP4_C1, 0x400002A0 // 0x4000 02A0 CCP4_C1 Bits------------------------------------- .EQU CCP4_C1_CCPXCY15, 15 .EQU CCP4_C1_CCPXCY14, 14 .EQU CCP4_C1_CCPXCY13, 13 .EQU CCP4_C1_CCPXCY12, 12 .EQU CCP4_C1_CCPXCY11, 11 .EQU CCP4_C1_CCPXCY10, 10 .EQU CCP4_C1_CCPXCY9, 9 .EQU CCP4_C1_CCPXCY8, 8 .EQU CCP4_C1_CCPXCY7, 7 .EQU CCP4_C1_CCPXCY6, 6 .EQU CCP4_C1_CCPXCY5, 5 .EQU CCP4_C1_CCPXCY4, 4 .EQU CCP4_C1_CCPXCY3, 3 .EQU CCP4_C1_CCPXCY2, 2 .EQU CCP4_C1_CCPXCY1, 1 .EQU CCP4_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP4_C2, 0x400002A4 // 0x4000 02A4 CCP4_C2 Bits------------------------------------- .EQU CCP4_C2_CCPXCY15, 15 .EQU CCP4_C2_CCPXCY14, 14 .EQU CCP4_C2_CCPXCY13, 13 .EQU CCP4_C2_CCPXCY12, 12 .EQU CCP4_C2_CCPXCY11, 11 .EQU CCP4_C2_CCPXCY10, 10 .EQU CCP4_C2_CCPXCY9, 9 .EQU CCP4_C2_CCPXCY8, 8 .EQU CCP4_C2_CCPXCY7, 7 .EQU CCP4_C2_CCPXCY6, 6 .EQU CCP4_C2_CCPXCY5, 5 .EQU CCP4_C2_CCPXCY4, 4 .EQU CCP4_C2_CCPXCY3, 3 .EQU CCP4_C2_CCPXCY2, 2 .EQU CCP4_C2_CCPXCY1, 1 .EQU CCP4_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP4_C3, 0x400002A8 // 0x4000 02A8 CCP4_C3 Bits------------------------------------- .EQU CCP4_C3_CCPXCY15, 15 .EQU CCP4_C3_CCPXCY14, 14 .EQU CCP4_C3_CCPXCY13, 13 .EQU CCP4_C3_CCPXCY12, 12 .EQU CCP4_C3_CCPXCY11, 11 .EQU CCP4_C3_CCPXCY10, 10 .EQU CCP4_C3_CCPXCY9, 9 .EQU CCP4_C3_CCPXCY8, 8 .EQU CCP4_C3_CCPXCY7, 7 .EQU CCP4_C3_CCPXCY6, 6 .EQU CCP4_C3_CCPXCY5, 5 .EQU CCP4_C3_CCPXCY4, 4 .EQU CCP4_C3_CCPXCY3, 3 .EQU CCP4_C3_CCPXCY2, 2 .EQU CCP4_C3_CCPXCY1, 1 .EQU CCP4_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP4_C4, 0x400002AC // 0x4000 02AC CCP4_C4 Bits------------------------------------- .EQU CCP4_C4_CCPXCY15, 15 .EQU CCP4_C4_CCPXCY14, 14 .EQU CCP4_C4_CCPXCY13, 13 .EQU CCP4_C4_CCPXCY12, 12 .EQU CCP4_C4_CCPXCY11, 11 .EQU CCP4_C4_CCPXCY10, 10 .EQU CCP4_C4_CCPXCY9, 9 .EQU CCP4_C4_CCPXCY8, 8 .EQU CCP4_C4_CCPXCY7, 7 .EQU CCP4_C4_CCPXCY6, 6 .EQU CCP4_C4_CCPXCY5, 5 .EQU CCP4_C4_CCPXCY4, 4 .EQU CCP4_C4_CCPXCY3, 3 .EQU CCP4_C4_CCPXCY2, 2 .EQU CCP4_C4_CCPXCY1, 1 .EQU CCP4_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP4_SRIC, 0x400002B0 // 0x4000 02B0 CCP4_SRIC Bits------------------------------------- .EQU CCP4_SRIC_TXIC, 6 .EQU CCP4_SRIC_TXUIC, 5 .EQU CCP4_SRIC_TXTIC, 4 .EQU CCP4_SRIC_CC4IC, 3 .EQU CCP4_SRIC_CC3IC, 2 .EQU CCP4_SRIC_CC2IC, 1 .EQU CCP4_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP4_DF, 0x400002B4 // 0x4000 02B4 CCP4_DF Bits------------------------------------- .EQU CCP4_DF_TXUDF, 5 .EQU CCP4_DF_TXTDF, 4 .EQU CCP4_DF_CC4DF, 3 .EQU CCP4_DF_CC3DF, 2 .EQU CCP4_DF_CC2DF, 1 .EQU CCP4_DF_CC1DF, 0 // register------------------------------------- .EQU CCP4_CTL1, 0x400002C0 // 0x4000 02C0 CCP4_CTL1 Bits------------------------------------- .EQU CCP4_CTL1_CH4M3, 15 .EQU CCP4_CTL1_CH4M2, 14 .EQU CCP4_CTL1_CH4M1, 13 .EQU CCP4_CTL1_CH4M0, 12 .EQU CCP4_CTL1_CH3M3, 11 .EQU CCP4_CTL1_CH3M2, 10 .EQU CCP4_CTL1_CH3M1, 9 .EQU CCP4_CTL1_CH3M0, 8 .EQU CCP4_CTL1_CH2M3, 7 .EQU CCP4_CTL1_CH2M2, 6 .EQU CCP4_CTL1_CH2M1, 5 .EQU CCP4_CTL1_CH2M0, 4 .EQU CCP4_CTL1_CH1M3, 3 .EQU CCP4_CTL1_CH1M2, 2 .EQU CCP4_CTL1_CH1M1, 1 .EQU CCP4_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP4_R1, 0x400002C4 // 0x4000 02C4 CCP4_R1 Bits------------------------------------- .EQU CCP4_R1_CCPXRY15, 15 .EQU CCP4_R1_CCPXRY14, 14 .EQU CCP4_R1_CCPXRY13, 13 .EQU CCP4_R1_CCPXRY12, 12 .EQU CCP4_R1_CCPXRY11, 11 .EQU CCP4_R1_CCPXRY10, 10 .EQU CCP4_R1_CCPXRY9, 9 .EQU CCP4_R1_CCPXRY8, 8 .EQU CCP4_R1_CCPXRY7, 7 .EQU CCP4_R1_CCPXRY6, 6 .EQU CCP4_R1_CCPXRY5, 5 .EQU CCP4_R1_CCPXRY4, 4 .EQU CCP4_R1_CCPXRY3, 3 .EQU CCP4_R1_CCPXRY2, 2 .EQU CCP4_R1_CCPXRY1, 1 .EQU CCP4_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP4_R2, 0x400002C8 // 0x4000 02C8 CCP4_R2 Bits------------------------------------- .EQU CCP4_R2_CCPXRY15, 15 .EQU CCP4_R2_CCPXRY14, 14 .EQU CCP4_R2_CCPXRY13, 13 .EQU CCP4_R2_CCPXRY12, 12 .EQU CCP4_R2_CCPXRY11, 11 .EQU CCP4_R2_CCPXRY10, 10 .EQU CCP4_R2_CCPXRY9, 9 .EQU CCP4_R2_CCPXRY8, 8 .EQU CCP4_R2_CCPXRY7, 7 .EQU CCP4_R2_CCPXRY6, 6 .EQU CCP4_R2_CCPXRY5, 5 .EQU CCP4_R2_CCPXRY4, 4 .EQU CCP4_R2_CCPXRY3, 3 .EQU CCP4_R2_CCPXRY2, 2 .EQU CCP4_R2_CCPXRY1, 1 .EQU CCP4_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP4_R3, 0x400002CC // 0x4000 02CC CCP4_R3 Bits------------------------------------- .EQU CCP4_R3_CCPXRY15, 15 .EQU CCP4_R3_CCPXRY14, 14 .EQU CCP4_R3_CCPXRY13, 13 .EQU CCP4_R3_CCPXRY12, 12 .EQU CCP4_R3_CCPXRY11, 11 .EQU CCP4_R3_CCPXRY10, 10 .EQU CCP4_R3_CCPXRY9, 9 .EQU CCP4_R3_CCPXRY8, 8 .EQU CCP4_R3_CCPXRY7, 7 .EQU CCP4_R3_CCPXRY6, 6 .EQU CCP4_R3_CCPXRY5, 5 .EQU CCP4_R3_CCPXRY4, 4 .EQU CCP4_R3_CCPXRY3, 3 .EQU CCP4_R3_CCPXRY2, 2 .EQU CCP4_R3_CCPXRY1, 1 .EQU CCP4_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP4_R4, 0x400002D0 // 0x4000 02D0 CCP4_R4 Bits------------------------------------- .EQU CCP4_R4_CCPXRY15, 15 .EQU CCP4_R4_CCPXRY14, 14 .EQU CCP4_R4_CCPXRY13, 13 .EQU CCP4_R4_CCPXRY12, 12 .EQU CCP4_R4_CCPXRY11, 11 .EQU CCP4_R4_CCPXRY10, 10 .EQU CCP4_R4_CCPXRY9, 9 .EQU CCP4_R4_CCPXRY8, 8 .EQU CCP4_R4_CCPXRY7, 7 .EQU CCP4_R4_CCPXRY6, 6 .EQU CCP4_R4_CCPXRY5, 5 .EQU CCP4_R4_CCPXRY4, 4 .EQU CCP4_R4_CCPXRY3, 3 .EQU CCP4_R4_CCPXRY2, 2 .EQU CCP4_R4_CCPXRY1, 1 .EQU CCP4_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP4_CTL2, 0x400002D4 // 0x4000 02D4 CCP4_CTL2 Bits------------------------------------- .EQU CCP4_CTL2_PXOC4CE, 15 .EQU CCP4_CTL2_PXOC3CE, 14 .EQU CCP4_CTL2_PXOC2CE, 13 .EQU CCP4_CTL2_PXOC1CE, 12 .EQU CCP4_CTL2_PXASS1, 11 .EQU CCP4_CTL2_PXASS0, 10 .EQU CCP4_CTL2_TCKSEL1, 9 .EQU CCP4_CTL2_TCKSEL0, 8 .EQU CCP4_CTL2_PXOC4_1, 7 .EQU CCP4_CTL2_PXOC4_0, 6 .EQU CCP4_CTL2_PXOC3_1, 5 .EQU CCP4_CTL2_PXOC3_0, 4 .EQU CCP4_CTL2_PXOC2_1, 3 .EQU CCP4_CTL2_PXOC2_0, 2 .EQU CCP4_CTL2_PXOC1_1, 1 .EQU CCP4_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP4_CTL3, 0x400002D8 // 0x4000 02D8 CCP4_CTL3 Bits------------------------------------- .EQU CCP4_CTL3_PXSPMST, 15 .EQU CCP4_CTL3_PXPWMI, 14 .EQU CCP4_CTL3_PXXORM, 13 .EQU CCP4_CTL3_PXSPM, 12 .EQU CCP4_CTL3_TXTDE, 11 .EQU CCP4_CTL3_CC4DE, 10 .EQU CCP4_CTL3_CC3DE, 9 .EQU CCP4_CTL3_CC2DE, 8 .EQU CCP4_CTL3_CC1DE, 7 .EQU CCP4_CTL3_TXUDE, 6 .EQU CCP4_CTL3_TXUIE, 5 .EQU CCP4_CTL3_TXTIE, 4 .EQU CCP4_CTL3_CC4IE, 3 .EQU CCP4_CTL3_CC3IE, 2 .EQU CCP4_CTL3_CC2IE, 1 .EQU CCP4_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP4_EGIF, 0x400002DC // 0x4000 02DC CCP4_EGIF Bits------------------------------------- .EQU CCP4_EGIF_POSSEL, 13 .EQU CCP4_EGIF_PXSEL, 12 .EQU CCP4_EGIF_TXUIF, 11 .EQU CCP4_EGIF_TXTIF, 10 .EQU CCP4_EGIF_CC4IF, 9 .EQU CCP4_EGIF_CC3IF, 8 .EQU CCP4_EGIF_CC2IF, 7 .EQU CCP4_EGIF_CC1IF, 6 .EQU CCP4_EGIF_TXTRG, 5 .EQU CCP4_EGIF_CC4G, 4 .EQU CCP4_EGIF_CC3G, 3 .EQU CCP4_EGIF_CC2G, 2 .EQU CCP4_EGIF_CC1G, 1 .EQU CCP4_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU T11_CNT, 0x40000300 // 0x4000 0300 T11_CNT Bits------------------------------------- .EQU T11_CNT_TXCNT31, 31 .EQU T11_CNT_TXCNT30, 30 .EQU T11_CNT_TXCNT29, 29 .EQU T11_CNT_TXCNT28, 28 .EQU T11_CNT_TXCNT27, 27 .EQU T11_CNT_TXCNT26, 26 .EQU T11_CNT_TXCNT25, 25 .EQU T11_CNT_TXCNT24, 24 .EQU T11_CNT_TXCNT23, 23 .EQU T11_CNT_TXCNT22, 22 .EQU T11_CNT_TXCNT21, 21 .EQU T11_CNT_TXCNT20, 20 .EQU T11_CNT_TXCNT19, 19 .EQU T11_CNT_TXCNT18, 18 .EQU T11_CNT_TXCNT17, 17 .EQU T11_CNT_TXCNT16, 16 .EQU T11_CNT_TXCNT15, 15 .EQU T11_CNT_TXCNT14, 14 .EQU T11_CNT_TXCNT13, 13 .EQU T11_CNT_TXCNT12, 12 .EQU T11_CNT_TXCNT11, 11 .EQU T11_CNT_TXCNT10, 10 .EQU T11_CNT_TXCNT9, 9 .EQU T11_CNT_TXCNT8, 8 .EQU T11_CNT_TXCNT7, 7 .EQU T11_CNT_TXCNT6, 6 .EQU T11_CNT_TXCNT5, 5 .EQU T11_CNT_TXCNT4, 4 .EQU T11_CNT_TXCNT3, 3 .EQU T11_CNT_TXCNT2, 2 .EQU T11_CNT_TXCNT1, 1 .EQU T11_CNT_TXCNT0, 0 // register------------------------------------- .EQU T11_PHS, 0x40000304 // 0x4000 0304 T11_PHS Bits------------------------------------- .EQU T11_PHS_TXPHS31, 31 .EQU T11_PHS_TXPHS30, 30 .EQU T11_PHS_TXPHS29, 29 .EQU T11_PHS_TXPHS28, 28 .EQU T11_PHS_TXPHS27, 27 .EQU T11_PHS_TXPHS26, 26 .EQU T11_PHS_TXPHS25, 25 .EQU T11_PHS_TXPHS24, 24 .EQU T11_PHS_TXPHS23, 23 .EQU T11_PHS_TXPHS22, 22 .EQU T11_PHS_TXPHS21, 21 .EQU T11_PHS_TXPHS20, 20 .EQU T11_PHS_TXPHS19, 19 .EQU T11_PHS_TXPHS18, 18 .EQU T11_PHS_TXPHS17, 17 .EQU T11_PHS_TXPHS16, 16 .EQU T11_PHS_TXPHS15, 15 .EQU T11_PHS_TXPHS14, 14 .EQU T11_PHS_TXPHS13, 13 .EQU T11_PHS_TXPHS12, 12 .EQU T11_PHS_TXPHS11, 11 .EQU T11_PHS_TXPHS10, 10 .EQU T11_PHS_TXPHS9, 9 .EQU T11_PHS_TXPHS8, 8 .EQU T11_PHS_TXPHS7, 7 .EQU T11_PHS_TXPHS6, 6 .EQU T11_PHS_TXPHS5, 5 .EQU T11_PHS_TXPHS4, 4 .EQU T11_PHS_TXPHS3, 3 .EQU T11_PHS_TXPHS2, 2 .EQU T11_PHS_TXPHS1, 1 .EQU T11_PHS_TXPHS0, 0 // register------------------------------------- .EQU T11_PPX, 0x40000308 // 0x4000 0308 T11_PPX Bits------------------------------------- .EQU T11_PPX_PPX31, 31 .EQU T11_PPX_PPX30, 30 .EQU T11_PPX_PPX29, 29 .EQU T11_PPX_PPX28, 28 .EQU T11_PPX_PPX27, 27 .EQU T11_PPX_PPX26, 26 .EQU T11_PPX_PPX25, 25 .EQU T11_PPX_PPX24, 24 .EQU T11_PPX_PPX23, 23 .EQU T11_PPX_PPX22, 22 .EQU T11_PPX_PPX21, 21 .EQU T11_PPX_PPX20, 20 .EQU T11_PPX_PPX19, 19 .EQU T11_PPX_PPX18, 18 .EQU T11_PPX_PPX17, 17 .EQU T11_PPX_PPX16, 16 .EQU T11_PPX_PPX15, 15 .EQU T11_PPX_PPX14, 14 .EQU T11_PPX_PPX13, 13 .EQU T11_PPX_PPX12, 12 .EQU T11_PPX_PPX11, 11 .EQU T11_PPX_PPX10, 10 .EQU T11_PPX_PPX9, 9 .EQU T11_PPX_PPX8, 8 .EQU T11_PPX_PPX7, 7 .EQU T11_PPX_PPX6, 6 .EQU T11_PPX_PPX5, 5 .EQU T11_PPX_PPX4, 4 .EQU T11_PPX_PPX3, 3 .EQU T11_PPX_PPX2, 2 .EQU T11_PPX_PPX1, 1 .EQU T11_PPX_PPX0, 0 // register------------------------------------- .EQU T11_PRSC, 0x4000030C // 0x4000 030C T11_PRSC Bits------------------------------------- .EQU T11_PRSC_TXPRSC31, 31 .EQU T11_PRSC_TXPRSC30, 30 .EQU T11_PRSC_TXPRSC29, 29 .EQU T11_PRSC_TXPRSC28, 28 .EQU T11_PRSC_TXPRSC27, 27 .EQU T11_PRSC_TXPRSC26, 26 .EQU T11_PRSC_TXPRSC25, 25 .EQU T11_PRSC_TXPRSC24, 24 .EQU T11_PRSC_TXPRSC23, 23 .EQU T11_PRSC_TXPRSC22, 22 .EQU T11_PRSC_TXPRSC21, 21 .EQU T11_PRSC_TXPRSC20, 20 .EQU T11_PRSC_TXPRSC19, 19 .EQU T11_PRSC_TXPRSC18, 18 .EQU T11_PRSC_TXPRSC17, 17 .EQU T11_PRSC_TXPRSC16, 16 .EQU T11_PRSC_TXPRSC15, 15 .EQU T11_PRSC_TXPRSC14, 14 .EQU T11_PRSC_TXPRSC13, 13 .EQU T11_PRSC_TXPRSC12, 12 .EQU T11_PRSC_TXPRSC11, 11 .EQU T11_PRSC_TXPRSC10, 10 .EQU T11_PRSC_TXPRSC9, 9 .EQU T11_PRSC_TXPRSC8, 8 .EQU T11_PRSC_TXPRSC7, 7 .EQU T11_PRSC_TXPRSC6, 6 .EQU T11_PRSC_TXPRSC5, 5 .EQU T11_PRSC_TXPRSC4, 4 .EQU T11_PRSC_TXPRSC3, 3 .EQU T11_PRSC_TXPRSC2, 2 .EQU T11_PRSC_TXPRSC1, 1 .EQU T11_PRSC_TXPRSC0, 0 // register------------------------------------- .EQU T11_CTL, 0x40000310 // 0x4000 0310 T11_CTL Bits------------------------------------- .EQU T11_CTL_BLINKEN, 31 .EQU T11_CTL_UDSYNEN, 29 .EQU T11_CTL_HRLOCK, 28 .EQU T11_CTL_ETLOCK, 27 .EQU T11_CTL_PCLOCK, 26 .EQU T11_CTL_DBLOCK, 25 .EQU T11_CTL_AQLOCKB, 24 .EQU T11_CTL_AQLOCKA, 23 .EQU T11_CTL_CAPEN, 22 .EQU T11_CTL_CAPSEL, 21 .EQU T11_CTL_TXMAX, 19 .EQU T11_CTL_PHSDIR, 18 .EQU T11_CTL_SWFSYNC, 17 .EQU T11_CTL_SYNCOSEL1, 16 .EQU T11_CTL_SYNCOSEL0, 15 .EQU T11_CTL_PHSEN, 14 .EQU T11_CTL_SYNCI, 13 .EQU T11_CTL_TXUR, 12 .EQU T11_CTL_TXUDEVT, 11 .EQU T11_CTL_TXUDEN, 10 .EQU T11_CTL_TXCMS2, 9 .EQU T11_CTL_TXCMS1, 8 .EQU T11_CTL_TXCMS0, 7 .EQU T11_CTL_TXDIR, 6 .EQU T11_CTL_TXCLK1, 5 .EQU T11_CTL_TXCLK0, 4 .EQU T11_CTL_TXSY, 3 .EQU T11_CTL_TXGATE, 2 .EQU T11_CTL_TXCS, 1 .EQU T11_CTL_TXEN, 0 // register------------------------------------- .EQU EPWM11_RA, 0x40000314 // 0x4000 0314 EPWM11_RA Bits------------------------------------- .EQU EPWM11_RA_EPWMRA31, 31 .EQU EPWM11_RA_EPWMRA30, 30 .EQU EPWM11_RA_EPWMRA29, 29 .EQU EPWM11_RA_EPWMRA28, 28 .EQU EPWM11_RA_EPWMRA27, 27 .EQU EPWM11_RA_EPWMRA26, 26 .EQU EPWM11_RA_EPWMRA25, 25 .EQU EPWM11_RA_EPWMRA24, 24 .EQU EPWM11_RA_EPWMRA23, 23 .EQU EPWM11_RA_EPWMRA22, 22 .EQU EPWM11_RA_EPWMRA21, 21 .EQU EPWM11_RA_EPWMRA20, 20 .EQU EPWM11_RA_EPWMRA19, 19 .EQU EPWM11_RA_EPWMRA18, 18 .EQU EPWM11_RA_EPWMRA17, 17 .EQU EPWM11_RA_EPWMRA16, 16 .EQU EPWM11_RA_EPWMRA15, 15 .EQU EPWM11_RA_EPWMRA14, 14 .EQU EPWM11_RA_EPWMRA13, 13 .EQU EPWM11_RA_EPWMRA12, 12 .EQU EPWM11_RA_EPWMRA11, 11 .EQU EPWM11_RA_EPWMRA10, 10 .EQU EPWM11_RA_EPWMRA9, 9 .EQU EPWM11_RA_EPWMRA8, 8 .EQU EPWM11_RA_EPWMRA7, 7 .EQU EPWM11_RA_EPWMRA6, 6 .EQU EPWM11_RA_EPWMRA5, 5 .EQU EPWM11_RA_EPWMRA4, 4 .EQU EPWM11_RA_EPWMRA3, 3 .EQU EPWM11_RA_EPWMRA2, 2 .EQU EPWM11_RA_EPWMRA1, 1 .EQU EPWM11_RA_EPWMRA0, 0 // register------------------------------------- .EQU EPWM11_RB, 0x40000318 // 0x4000 0318 EPWM11_RB Bits------------------------------------- .EQU EPWM11_RB_EPWMRB31, 31 .EQU EPWM11_RB_EPWMRB30, 30 .EQU EPWM11_RB_EPWMRB29, 29 .EQU EPWM11_RB_EPWMRB28, 28 .EQU EPWM11_RB_EPWMRB27, 27 .EQU EPWM11_RB_EPWMRB26, 26 .EQU EPWM11_RB_EPWMRB25, 25 .EQU EPWM11_RB_EPWMRB24, 24 .EQU EPWM11_RB_EPWMRB23, 23 .EQU EPWM11_RB_EPWMRB22, 22 .EQU EPWM11_RB_EPWMRB21, 21 .EQU EPWM11_RB_EPWMRB20, 20 .EQU EPWM11_RB_EPWMRB19, 19 .EQU EPWM11_RB_EPWMRB18, 18 .EQU EPWM11_RB_EPWMRB17, 17 .EQU EPWM11_RB_EPWMRB16, 16 .EQU EPWM11_RB_EPWMRB15, 15 .EQU EPWM11_RB_EPWMRB14, 14 .EQU EPWM11_RB_EPWMRB13, 13 .EQU EPWM11_RB_EPWMRB12, 12 .EQU EPWM11_RB_EPWMRB11, 11 .EQU EPWM11_RB_EPWMRB10, 10 .EQU EPWM11_RB_EPWMRB9, 9 .EQU EPWM11_RB_EPWMRB8, 8 .EQU EPWM11_RB_EPWMRB7, 7 .EQU EPWM11_RB_EPWMRB6, 6 .EQU EPWM11_RB_EPWMRB5, 5 .EQU EPWM11_RB_EPWMRB4, 4 .EQU EPWM11_RB_EPWMRB3, 3 .EQU EPWM11_RB_EPWMRB2, 2 .EQU EPWM11_RB_EPWMRB1, 1 .EQU EPWM11_RB_EPWMRB0, 0 // register------------------------------------- .EQU EPWM11_CTLA, 0x4000031C // 0x4000 031C EPWM11_CTLA Bits------------------------------------- .EQU EPWM11_CTLA_OTSFA, 16 .EQU EPWM11_CTLA_ACTSFA1, 15 .EQU EPWM11_CTLA_ACTSFA0, 14 .EQU EPWM11_CTLA_CSFA1, 13 .EQU EPWM11_CTLA_CSFA0, 12 .EQU EPWM11_CTLA_ACBD1, 11 .EQU EPWM11_CTLA_ACBD0, 10 .EQU EPWM11_CTLA_ACBU1, 9 .EQU EPWM11_CTLA_ACBU0, 8 .EQU EPWM11_CTLA_ACAD1, 7 .EQU EPWM11_CTLA_ACAD0, 6 .EQU EPWM11_CTLA_ACAU1, 5 .EQU EPWM11_CTLA_ACAU0, 4 .EQU EPWM11_CTLA_APRD1, 3 .EQU EPWM11_CTLA_APRD0, 2 .EQU EPWM11_CTLA_AZRO1, 1 .EQU EPWM11_CTLA_AZRO0, 0 // register------------------------------------- .EQU EPWM11_CTLB, 0x40000320 // 0x4000 0320 EPWM11_CTLB Bits------------------------------------- .EQU EPWM11_CTLB_OTSFB, 16 .EQU EPWM11_CTLB_ACTSFB1, 15 .EQU EPWM11_CTLB_ACTSFB0, 14 .EQU EPWM11_CTLB_CSFB1, 13 .EQU EPWM11_CTLB_CSFB0, 12 .EQU EPWM11_CTLB_BCBD1, 11 .EQU EPWM11_CTLB_BCBD0, 10 .EQU EPWM11_CTLB_BCBU1, 9 .EQU EPWM11_CTLB_BCBU0, 8 .EQU EPWM11_CTLB_BCAD1, 7 .EQU EPWM11_CTLB_BCAD0, 6 .EQU EPWM11_CTLB_BCAU1, 5 .EQU EPWM11_CTLB_BCAU0, 4 .EQU EPWM11_CTLB_BPRD1, 3 .EQU EPWM11_CTLB_BPRD0, 2 .EQU EPWM11_CTLB_BZRO1, 1 .EQU EPWM11_CTLB_BZRO0, 0 // register------------------------------------- .EQU EPWM11_DBCTL, 0x40000324 // 0x4000 0324 EPWM11_DBCTL Bits------------------------------------- .EQU EPWM11_DBCTL_INMODE1, 5 .EQU EPWM11_DBCTL_INMODE0, 4 .EQU EPWM11_DBCTL_POLSEL1, 3 .EQU EPWM11_DBCTL_POLSEL0, 2 .EQU EPWM11_DBCTL_OUTMODE1, 1 .EQU EPWM11_DBCTL_OUTMODE0, 0 // register------------------------------------- .EQU EPWM11_DBT, 0x40000328 // 0x4000 0328 EPWM11_DBT Bits------------------------------------- .EQU EPWM11_DBT_RDBT15, 31 .EQU EPWM11_DBT_RDBT14, 30 .EQU EPWM11_DBT_RDBT13, 29 .EQU EPWM11_DBT_RDBT12, 28 .EQU EPWM11_DBT_RDBT11, 27 .EQU EPWM11_DBT_RDBT10, 26 .EQU EPWM11_DBT_RDBT9, 25 .EQU EPWM11_DBT_RDBT8, 24 .EQU EPWM11_DBT_RDBT7, 23 .EQU EPWM11_DBT_RDBT6, 22 .EQU EPWM11_DBT_RDBT5, 21 .EQU EPWM11_DBT_RDBT4, 20 .EQU EPWM11_DBT_RDBT3, 19 .EQU EPWM11_DBT_RDBT2, 18 .EQU EPWM11_DBT_RDBT1, 17 .EQU EPWM11_DBT_RDBT0, 16 .EQU EPWM11_DBT_FDBT15, 15 .EQU EPWM11_DBT_FDBT14, 14 .EQU EPWM11_DBT_FDBT13, 13 .EQU EPWM11_DBT_FDBT12, 12 .EQU EPWM11_DBT_FDBT11, 11 .EQU EPWM11_DBT_FDBT10, 10 .EQU EPWM11_DBT_FDBT9, 9 .EQU EPWM11_DBT_FDBT8, 8 .EQU EPWM11_DBT_FDBT7, 7 .EQU EPWM11_DBT_FDBT6, 6 .EQU EPWM11_DBT_FDBT5, 5 .EQU EPWM11_DBT_FDBT4, 4 .EQU EPWM11_DBT_FDBT3, 3 .EQU EPWM11_DBT_FDBT2, 2 .EQU EPWM11_DBT_FDBT1, 1 .EQU EPWM11_DBT_FDBT0, 0 // register------------------------------------- .EQU EPWM11_PCCTL, 0x4000032C // 0x4000 032C EPWM11_PCCTL Bits------------------------------------- .EQU EPWM11_PCCTL_CHPFREQ2, 10 .EQU EPWM11_PCCTL_CHPFREQ1, 9 .EQU EPWM11_PCCTL_CHPFREQ0, 8 .EQU EPWM11_PCCTL_CHPDUTY2, 7 .EQU EPWM11_PCCTL_CHPDUTY1, 6 .EQU EPWM11_PCCTL_CHPDUTY0, 5 .EQU EPWM11_PCCTL_OSHTWTH3, 4 .EQU EPWM11_PCCTL_OSHTWTH2, 3 .EQU EPWM11_PCCTL_OSHTWTH1, 2 .EQU EPWM11_PCCTL_OSHTWTH0, 1 .EQU EPWM11_PCCTL_CHPEN, 0 // register------------------------------------- .EQU EPWM11_PXASCTL, 0x40000330 // 0x4000 0330 EPWM11_PXASCTL Bits------------------------------------- .EQU EPWM11_PXASCTL_PXRSEN, 8 .EQU EPWM11_PXASCTL_PXSSA1, 7 .EQU EPWM11_PXASCTL_PXSSA0, 6 .EQU EPWM11_PXASCTL_PXSSB1, 5 .EQU EPWM11_PXASCTL_PXSSB0, 4 .EQU EPWM11_PXASCTL_PXASE, 3 .EQU EPWM11_PXASCTL_PXASS2, 2 .EQU EPWM11_PXASCTL_PXASS1, 1 .EQU EPWM11_PXASCTL_PXASS0, 0 // register------------------------------------- .EQU EPWM11_ETCTL, 0x40000334 // 0x4000 0334 EPWM11_ETCTL Bits------------------------------------- .EQU EPWM11_ETCTL_BTSEL1, 25 .EQU EPWM11_ETCTL_BTSEL0, 24 .EQU EPWM11_ETCTL_FRCB, 19 .EQU EPWM11_ETCTL_TOADENB, 16 .EQU EPWM11_ETCTL_ATSEL1, 9 .EQU EPWM11_ETCTL_ATSEL0, 8 .EQU EPWM11_ETCTL_FRCA, 3 .EQU EPWM11_ETCTL_TOADENA, 0 // register------------------------------------- .EQU EPWM11_IE, 0x40000338 // 0x4000 0338 EPWM11_IE Bits------------------------------------- .EQU EPWM11_IE_CAPIE, 9 .EQU EPWM11_IE_TXDIE, 8 .EQU EPWM11_IE_TXCIE, 7 .EQU EPWM11_IE_TXAIE, 6 .EQU EPWM11_IE_TXBIE, 5 .EQU EPWM11_IE_TXIE, 4 .EQU EPWM11_IE_TXUIE, 3 .EQU EPWM11_IE_TXGIE, 2 .EQU EPWM11_IE_TXTIE1, 1 .EQU EPWM11_IE_TXTIE0, 0 // register------------------------------------- .EQU EPWM11_IF, 0x4000033C // 0x4000 033C EPWM11_IF Bits------------------------------------- .EQU EPWM11_IF_CAPIF, 9 .EQU EPWM11_IF_TXDIF, 8 .EQU EPWM11_IF_TXCIF, 7 .EQU EPWM11_IF_TXAIF, 6 .EQU EPWM11_IF_TXBIF, 5 .EQU EPWM11_IF_TXIF, 4 .EQU EPWM11_IF_TXUIF, 3 .EQU EPWM11_IF_TXGIF, 2 .EQU EPWM11_IF_TXTIF1, 1 .EQU EPWM11_IF_TXTIF0, 0 // register------------------------------------- .EQU EPWM11_IC, 0x40000340 // 0x4000 0340 EPWM11_IC Bits------------------------------------- .EQU EPWM11_IC_CAPIC1, 10 .EQU EPWM11_IC_CAPIC0, 9 .EQU EPWM11_IC_TXDIC, 8 .EQU EPWM11_IC_TXCIC, 7 .EQU EPWM11_IC_TXAIC, 6 .EQU EPWM11_IC_TXBIC, 5 .EQU EPWM11_IC_TXIC, 4 .EQU EPWM11_IC_TXUIC, 3 .EQU EPWM11_IC_TXGIC, 2 .EQU EPWM11_IC_TXTIC1, 1 .EQU EPWM11_IC_TXTIC0, 0 // register------------------------------------- .EQU EPWM11_DE, 0x40000344 // 0x4000 0344 EPWM11_DE Bits------------------------------------- .EQU EPWM11_DE_TXDDE, 8 .EQU EPWM11_DE_TXCDE, 7 .EQU EPWM11_DE_TXADE, 6 .EQU EPWM11_DE_TXBDE, 5 .EQU EPWM11_DE_TXDE, 4 .EQU EPWM11_DE_TXUDE, 3 .EQU EPWM11_DE_TXGDE, 2 .EQU EPWM11_DE_TXTDE1, 1 .EQU EPWM11_DE_TXTDE0, 0 // register------------------------------------- .EQU EPWM11_DF, 0x40000348 // 0x4000 0348 EPWM11_DF Bits------------------------------------- .EQU EPWM11_DF_TXDDF, 8 .EQU EPWM11_DF_TXCDF, 7 .EQU EPWM11_DF_TXADF, 6 .EQU EPWM11_DF_TXBDF, 5 .EQU EPWM11_DF_TXDF, 4 .EQU EPWM11_DF_TXUDF, 3 .EQU EPWM11_DF_TXGDF, 2 .EQU EPWM11_DF_TXTDF1, 1 .EQU EPWM11_DF_TXTDF0, 0 // register------------------------------------- .EQU EPWM11_HRPWMCTLA, 0x40000350 // 0x4000 0350 EPWM11_HRPWMCTLA Bits------------------------------------- .EQU EPWM11_HRPWMCTLA_HRPHSENA, 6 .EQU EPWM11_HRPWMCTLA_HRFENA, 5 .EQU EPWM11_HRPWMCTLA_HRRENA, 4 .EQU EPWM11_HRPWMCTLA_HRPENA, 3 .EQU EPWM11_HRPWMCTLA_HRDENA, 2 .EQU EPWM11_HRPWMCTLA_HRSELA, 1 .EQU EPWM11_HRPWMCTLA_HRENA, 0 // register------------------------------------- .EQU EPWM11_HRCMPA, 0x40000354 // 0x4000 0354 EPWM11_HRCMPA Bits------------------------------------- .EQU EPWM11_HRCMPA_HRCMPA7, 7 .EQU EPWM11_HRCMPA_HRCMPA6, 6 .EQU EPWM11_HRCMPA_HRCMPA5, 5 .EQU EPWM11_HRCMPA_HRCMPA4, 4 .EQU EPWM11_HRCMPA_HRCMPA3, 3 .EQU EPWM11_HRCMPA_HRCMPA2, 2 .EQU EPWM11_HRCMPA_HRCMPA1, 1 .EQU EPWM11_HRCMPA_HRCMPA0, 0 // register------------------------------------- .EQU EPWM11_CAP, 0x40000358 // 0x4000 0358 EPWM11_CAP Bits------------------------------------- .EQU EPWM11_CAP_CAP31, 31 .EQU EPWM11_CAP_CAP30, 30 .EQU EPWM11_CAP_CAP29, 29 .EQU EPWM11_CAP_CAP28, 28 .EQU EPWM11_CAP_CAP27, 27 .EQU EPWM11_CAP_CAP26, 26 .EQU EPWM11_CAP_CAP25, 25 .EQU EPWM11_CAP_CAP24, 24 .EQU EPWM11_CAP_CAP23, 23 .EQU EPWM11_CAP_CAP22, 22 .EQU EPWM11_CAP_CAP21, 21 .EQU EPWM11_CAP_CAP20, 20 .EQU EPWM11_CAP_CAP19, 19 .EQU EPWM11_CAP_CAP18, 18 .EQU EPWM11_CAP_CAP17, 17 .EQU EPWM11_CAP_CAP16, 16 .EQU EPWM11_CAP_CAP15, 15 .EQU EPWM11_CAP_CAP14, 14 .EQU EPWM11_CAP_CAP13, 13 .EQU EPWM11_CAP_CAP12, 12 .EQU EPWM11_CAP_CAP11, 11 .EQU EPWM11_CAP_CAP10, 10 .EQU EPWM11_CAP_CAP9, 9 .EQU EPWM11_CAP_CAP8, 8 .EQU EPWM11_CAP_CAP7, 7 .EQU EPWM11_CAP_CAP6, 6 .EQU EPWM11_CAP_CAP5, 5 .EQU EPWM11_CAP_CAP4, 4 .EQU EPWM11_CAP_CAP3, 3 .EQU EPWM11_CAP_CAP2, 2 .EQU EPWM11_CAP_CAP1, 1 .EQU EPWM11_CAP_CAP0, 0 // register------------------------------------- .EQU EPWM11_RC, 0x4000035C // 0x4000 035C EPWM11_RC Bits------------------------------------- .EQU EPWM11_RC_EPWMRC31, 31 .EQU EPWM11_RC_EPWMRC30, 30 .EQU EPWM11_RC_EPWMRC29, 29 .EQU EPWM11_RC_EPWMRC28, 28 .EQU EPWM11_RC_EPWMRC27, 27 .EQU EPWM11_RC_EPWMRC26, 26 .EQU EPWM11_RC_EPWMRC25, 25 .EQU EPWM11_RC_EPWMRC24, 24 .EQU EPWM11_RC_EPWMRC23, 23 .EQU EPWM11_RC_EPWMRC22, 22 .EQU EPWM11_RC_EPWMRC21, 21 .EQU EPWM11_RC_EPWMRC20, 20 .EQU EPWM11_RC_EPWMRC19, 19 .EQU EPWM11_RC_EPWMRC18, 18 .EQU EPWM11_RC_EPWMRC17, 17 .EQU EPWM11_RC_EPWMRC16, 16 .EQU EPWM11_RC_EPWMRC15, 15 .EQU EPWM11_RC_EPWMRC14, 14 .EQU EPWM11_RC_EPWMRC13, 13 .EQU EPWM11_RC_EPWMRC12, 12 .EQU EPWM11_RC_EPWMRC11, 11 .EQU EPWM11_RC_EPWMRC10, 10 .EQU EPWM11_RC_EPWMRC9, 9 .EQU EPWM11_RC_EPWMRC8, 8 .EQU EPWM11_RC_EPWMRC7, 7 .EQU EPWM11_RC_EPWMRC6, 6 .EQU EPWM11_RC_EPWMRC5, 5 .EQU EPWM11_RC_EPWMRC4, 4 .EQU EPWM11_RC_EPWMRC3, 3 .EQU EPWM11_RC_EPWMRC2, 2 .EQU EPWM11_RC_EPWMRC1, 1 .EQU EPWM11_RC_EPWMRC0, 0 // register------------------------------------- .EQU EPWM11_RD, 0x40000360 // 0x4000 0360 EPWM11_RD Bits------------------------------------- .EQU EPWM11_RD_EPWMRD31, 31 .EQU EPWM11_RD_EPWMRD30, 30 .EQU EPWM11_RD_EPWMRD29, 29 .EQU EPWM11_RD_EPWMRD28, 28 .EQU EPWM11_RD_EPWMRD27, 27 .EQU EPWM11_RD_EPWMRD26, 26 .EQU EPWM11_RD_EPWMRD25, 25 .EQU EPWM11_RD_EPWMRD24, 24 .EQU EPWM11_RD_EPWMRD23, 23 .EQU EPWM11_RD_EPWMRD22, 22 .EQU EPWM11_RD_EPWMRD21, 21 .EQU EPWM11_RD_EPWMRD20, 20 .EQU EPWM11_RD_EPWMRD19, 19 .EQU EPWM11_RD_EPWMRD18, 18 .EQU EPWM11_RD_EPWMRD17, 17 .EQU EPWM11_RD_EPWMRD16, 16 .EQU EPWM11_RD_EPWMRD15, 15 .EQU EPWM11_RD_EPWMRD14, 14 .EQU EPWM11_RD_EPWMRD13, 13 .EQU EPWM11_RD_EPWMRD12, 12 .EQU EPWM11_RD_EPWMRD11, 11 .EQU EPWM11_RD_EPWMRD10, 10 .EQU EPWM11_RD_EPWMRD9, 9 .EQU EPWM11_RD_EPWMRD8, 8 .EQU EPWM11_RD_EPWMRD7, 7 .EQU EPWM11_RD_EPWMRD6, 6 .EQU EPWM11_RD_EPWMRD5, 5 .EQU EPWM11_RD_EPWMRD4, 4 .EQU EPWM11_RD_EPWMRD3, 3 .EQU EPWM11_RD_EPWMRD2, 2 .EQU EPWM11_RD_EPWMRD1, 1 .EQU EPWM11_RD_EPWMRD0, 0 // register------------------------------------- .EQU EPWM11_UDCTL, 0x40000364 // 0x4000 0364 EPWM11_UDCTL Bits------------------------------------- .EQU EPWM11_UDCTL_GBUDEN, 27 .EQU EPWM11_UDCTL_HRPUDSEL1, 26 .EQU EPWM11_UDCTL_HRPUDSEL0, 25 .EQU EPWM11_UDCTL_HRPUDEN, 24 .EQU EPWM11_UDCTL_EBUDSEL1, 23 .EQU EPWM11_UDCTL_EBUDSEL0, 22 .EQU EPWM11_UDCTL_EBUDEN, 21 .EQU EPWM11_UDCTL_EAUDSEL1, 20 .EQU EPWM11_UDCTL_EAUDSEL0, 19 .EQU EPWM11_UDCTL_EAUDEN, 18 .EQU EPWM11_UDCTL_CMDUDSEL1, 17 .EQU EPWM11_UDCTL_CMDUDSEL0, 16 .EQU EPWM11_UDCTL_CMDUDEN, 15 .EQU EPWM11_UDCTL_CMCUDSEL1, 14 .EQU EPWM11_UDCTL_CMCUDSEL0, 13 .EQU EPWM11_UDCTL_CMCUDEN, 12 .EQU EPWM11_UDCTL_CMBUDSEL1, 11 .EQU EPWM11_UDCTL_CMBUDSEL0, 10 .EQU EPWM11_UDCTL_CMBUDEN, 9 .EQU EPWM11_UDCTL_CMAUDSEL1, 8 .EQU EPWM11_UDCTL_CMAUDSEL0, 7 .EQU EPWM11_UDCTL_CMAUDEN, 6 .EQU EPWM11_UDCTL_PRUDSEL1, 5 .EQU EPWM11_UDCTL_PRUDSEL0, 4 .EQU EPWM11_UDCTL_PRUDEN, 3 .EQU EPWM11_UDCTL_PPUDSEL1, 2 .EQU EPWM11_UDCTL_PPUDSEL0, 1 .EQU EPWM11_UDCTL_PPUDEN, 0 // register------------------------------------- .EQU EPWM11_SRT, 0x40000368 // 0x4000 0368 EPWM11_SRT Bits------------------------------------- .EQU EPWM11_SRT_T31, 31 .EQU EPWM11_SRT_T30, 30 .EQU EPWM11_SRT_T29, 29 .EQU EPWM11_SRT_T28, 28 .EQU EPWM11_SRT_T27, 27 .EQU EPWM11_SRT_T26, 26 .EQU EPWM11_SRT_T25, 25 .EQU EPWM11_SRT_T24, 24 .EQU EPWM11_SRT_T23, 23 .EQU EPWM11_SRT_T22, 22 .EQU EPWM11_SRT_T21, 21 .EQU EPWM11_SRT_T20, 20 .EQU EPWM11_SRT_T19, 19 .EQU EPWM11_SRT_T18, 18 .EQU EPWM11_SRT_T17, 17 .EQU EPWM11_SRT_T16, 16 .EQU EPWM11_SRT_T15, 15 .EQU EPWM11_SRT_T14, 14 .EQU EPWM11_SRT_T13, 13 .EQU EPWM11_SRT_T12, 12 .EQU EPWM11_SRT_T11, 11 .EQU EPWM11_SRT_T10, 10 .EQU EPWM11_SRT_T9, 9 .EQU EPWM11_SRT_T8, 8 .EQU EPWM11_SRT_T7, 7 .EQU EPWM11_SRT_T6, 6 .EQU EPWM11_SRT_T5, 5 .EQU EPWM11_SRT_T4, 4 .EQU EPWM11_SRT_T3, 3 .EQU EPWM11_SRT_T2, 2 .EQU EPWM11_SRT_T1, 1 .EQU EPWM11_SRT_T0, 0 // register------------------------------------- .EQU EPWM11_HRPWMCTLB, 0x4000036C // 0x4000 036C EPWM11_HRPWMCTLB Bits------------------------------------- .EQU EPWM11_HRPWMCTLB_HRPHSENB, 6 .EQU EPWM11_HRPWMCTLB_HRFENB, 5 .EQU EPWM11_HRPWMCTLB_HRRENB, 4 .EQU EPWM11_HRPWMCTLB_HRPENB, 3 .EQU EPWM11_HRPWMCTLB_HRDENB, 2 .EQU EPWM11_HRPWMCTLB_HRSELB, 1 .EQU EPWM11_HRPWMCTLB_HRENB, 0 // register------------------------------------- .EQU EPWM11_HRCMPB, 0x40000370 // 0x4000 0370 EPWM11_HRCMPB Bits------------------------------------- .EQU EPWM11_HRCMPB_HRCMPB7, 7 .EQU EPWM11_HRCMPB_HRCMPB6, 6 .EQU EPWM11_HRCMPB_HRCMPB5, 5 .EQU EPWM11_HRCMPB_HRCMPB4, 4 .EQU EPWM11_HRCMPB_HRCMPB3, 3 .EQU EPWM11_HRCMPB_HRCMPB2, 2 .EQU EPWM11_HRCMPB_HRCMPB1, 1 .EQU EPWM11_HRCMPB_HRCMPB0, 0 // register------------------------------------- .EQU EPWM11_HRDB, 0x40000374 // 0x4000 0374 EPWM11_HRDB Bits------------------------------------- .EQU EPWM11_HRDB_HRR7, 15 .EQU EPWM11_HRDB_HRR6, 14 .EQU EPWM11_HRDB_HRR5, 13 .EQU EPWM11_HRDB_HRR4, 12 .EQU EPWM11_HRDB_HRR3, 11 .EQU EPWM11_HRDB_HRR2, 10 .EQU EPWM11_HRDB_HRR1, 9 .EQU EPWM11_HRDB_HRR0, 8 .EQU EPWM11_HRDB_HRF7, 7 .EQU EPWM11_HRDB_HRF6, 6 .EQU EPWM11_HRDB_HRF5, 5 .EQU EPWM11_HRDB_HRF4, 4 .EQU EPWM11_HRDB_HRF3, 3 .EQU EPWM11_HRDB_HRF2, 2 .EQU EPWM11_HRDB_HRF1, 1 .EQU EPWM11_HRDB_HRF0, 0 // register------------------------------------- .EQU EPWM11_HRPHS, 0x40000378 // 0x4000 0378 EPWM11_HRPHS Bits------------------------------------- .EQU EPWM11_HRPHS_HRPRE7, 15 .EQU EPWM11_HRPHS_HRPRE6, 14 .EQU EPWM11_HRPHS_HRPRE5, 13 .EQU EPWM11_HRPHS_HRPRE4, 12 .EQU EPWM11_HRPHS_HRPRE3, 11 .EQU EPWM11_HRPHS_HRPRE2, 10 .EQU EPWM11_HRPHS_HRPRE1, 9 .EQU EPWM11_HRPHS_HRPRE0, 8 .EQU EPWM11_HRPHS_HRPHS7, 7 .EQU EPWM11_HRPHS_HRPHS6, 6 .EQU EPWM11_HRPHS_HRPHS5, 5 .EQU EPWM11_HRPHS_HRPHS4, 4 .EQU EPWM11_HRPHS_HRPHS3, 3 .EQU EPWM11_HRPHS_HRPHS2, 2 .EQU EPWM11_HRPHS_HRPHS1, 1 .EQU EPWM11_HRPHS_HRPHS0, 0 // register------------------------------------- .EQU EPWM11_HRCFG, 0x4000037C // 0x4000 037C EPWM11_HRCFG Bits------------------------------------- .EQU EPWM11_HRCFG_STEP7, 15 .EQU EPWM11_HRCFG_STEP6, 14 .EQU EPWM11_HRCFG_STEP5, 13 .EQU EPWM11_HRCFG_STEP4, 12 .EQU EPWM11_HRCFG_STEP3, 11 .EQU EPWM11_HRCFG_STEP2, 10 .EQU EPWM11_HRCFG_STEP1, 9 .EQU EPWM11_HRCFG_STEP0, 8 .EQU EPWM11_HRCFG_TIMS7, 7 .EQU EPWM11_HRCFG_TIMS6, 6 .EQU EPWM11_HRCFG_TIMS5, 5 .EQU EPWM11_HRCFG_TIMS4, 4 .EQU EPWM11_HRCFG_TIMS3, 3 .EQU EPWM11_HRCFG_TIMS2, 2 .EQU EPWM11_HRCFG_TIMS1, 1 .EQU EPWM11_HRCFG_TIMS0, 0 // register------------------------------------- .EQU EPWM11_HRDELAY, 0x40000380 // 0x4000 0380 EPWM11_HRDELAY Bits------------------------------------- .EQU EPWM11_HRDELAY_REDBHR7, 31 .EQU EPWM11_HRDELAY_REDBHR6, 30 .EQU EPWM11_HRDELAY_REDBHR5, 29 .EQU EPWM11_HRDELAY_REDBHR4, 28 .EQU EPWM11_HRDELAY_REDBHR3, 27 .EQU EPWM11_HRDELAY_REDBHR2, 26 .EQU EPWM11_HRDELAY_REDBHR1, 25 .EQU EPWM11_HRDELAY_REDBHR0, 24 .EQU EPWM11_HRDELAY_FEDBHR7, 23 .EQU EPWM11_HRDELAY_FEDBHR6, 22 .EQU EPWM11_HRDELAY_FEDBHR5, 21 .EQU EPWM11_HRDELAY_FEDBHR4, 20 .EQU EPWM11_HRDELAY_FEDBHR3, 19 .EQU EPWM11_HRDELAY_FEDBHR2, 18 .EQU EPWM11_HRDELAY_FEDBHR1, 17 .EQU EPWM11_HRDELAY_FEDBHR0, 16 .EQU EPWM11_HRDELAY_REDAHR7, 15 .EQU EPWM11_HRDELAY_REDAHR6, 14 .EQU EPWM11_HRDELAY_REDAHR5, 13 .EQU EPWM11_HRDELAY_REDAHR4, 12 .EQU EPWM11_HRDELAY_REDAHR3, 11 .EQU EPWM11_HRDELAY_REDAHR2, 10 .EQU EPWM11_HRDELAY_REDAHR1, 9 .EQU EPWM11_HRDELAY_REDAHR0, 8 .EQU EPWM11_HRDELAY_FEDAHR7, 7 .EQU EPWM11_HRDELAY_FEDAHR6, 6 .EQU EPWM11_HRDELAY_FEDAHR5, 5 .EQU EPWM11_HRDELAY_FEDAHR4, 4 .EQU EPWM11_HRDELAY_FEDAHR3, 3 .EQU EPWM11_HRDELAY_FEDAHR2, 2 .EQU EPWM11_HRDELAY_FEDAHR1, 1 .EQU EPWM11_HRDELAY_FEDAHR0, 0 // register------------------------------------- .EQU T11_CTL2, 0x40000384 // 0x4000 0384 T11_CTL2 Bits------------------------------------- .EQU T11_CTL2_LPHSEN, 24 .EQU T11_CTL2_CAPMOD, 23 .EQU T11_CTL2_CAPUF, 22 .EQU T11_CTL2_HRCFGUF, 21 .EQU T11_CTL2_HRPHSUF, 20 .EQU T11_CTL2_HRDBUF, 19 .EQU T11_CTL2_DBTUF, 18 .EQU T11_CTL2_HRPBUF, 17 .EQU T11_CTL2_HRPAUF, 16 .EQU T11_CTL2_EBFUF, 15 .EQU T11_CTL2_EAFUF, 14 .EQU T11_CTL2_PRFUF, 13 .EQU T11_CTL2_PPFUF, 12 .EQU T11_CTL2_CMDFUF, 11 .EQU T11_CTL2_CMCFUF, 10 .EQU T11_CTL2_CMBFUF, 9 .EQU T11_CTL2_CMAFUF, 8 .EQU T11_CTL2_TRGIOS, 7 .EQU T11_CTL2_SYNCIOS, 6 .EQU T11_CTL2_DUDBSEL, 5 .EQU T11_CTL2_DUDBEN, 4 .EQU T11_CTL2_BWINDTSEL, 3 .EQU T11_CTL2_BWINDPOL, 2 .EQU T11_CTL2_BWINDEN, 1 .EQU T11_CTL2_SWCLRPF, 0 // register------------------------------------- .EQU EPWM11_BWCFG, 0x40000388 // 0x4000 0388 EPWM11_BWCFG Bits------------------------------------- .EQU EPWM11_BWCFG_BWIDTH15, 31 .EQU EPWM11_BWCFG_BWIDTH14, 30 .EQU EPWM11_BWCFG_BWIDTH13, 29 .EQU EPWM11_BWCFG_BWIDTH12, 28 .EQU EPWM11_BWCFG_BWIDTH11, 27 .EQU EPWM11_BWCFG_BWIDTH10, 26 .EQU EPWM11_BWCFG_BWIDTH9, 25 .EQU EPWM11_BWCFG_BWIDTH8, 24 .EQU EPWM11_BWCFG_BWIDTH7, 23 .EQU EPWM11_BWCFG_BWIDTH6, 22 .EQU EPWM11_BWCFG_BWIDTH5, 21 .EQU EPWM11_BWCFG_BWIDTH4, 20 .EQU EPWM11_BWCFG_BWIDTH3, 19 .EQU EPWM11_BWCFG_BWIDTH2, 18 .EQU EPWM11_BWCFG_BWIDTH1, 17 .EQU EPWM11_BWCFG_BWIDTH0, 16 .EQU EPWM11_BWCFG_BWOFFSET15, 15 .EQU EPWM11_BWCFG_BWOFFSET14, 14 .EQU EPWM11_BWCFG_BWOFFSET13, 13 .EQU EPWM11_BWCFG_BWOFFSET12, 12 .EQU EPWM11_BWCFG_BWOFFSET11, 11 .EQU EPWM11_BWCFG_BWOFFSET10, 10 .EQU EPWM11_BWCFG_BWOFFSET9, 9 .EQU EPWM11_BWCFG_BWOFFSET8, 8 .EQU EPWM11_BWCFG_BWOFFSET7, 7 .EQU EPWM11_BWCFG_BWOFFSET6, 6 .EQU EPWM11_BWCFG_BWOFFSET5, 5 .EQU EPWM11_BWCFG_BWOFFSET4, 4 .EQU EPWM11_BWCFG_BWOFFSET3, 3 .EQU EPWM11_BWCFG_BWOFFSET2, 2 .EQU EPWM11_BWCFG_BWOFFSET1, 1 .EQU EPWM11_BWCFG_BWOFFSET0, 0 // register------------------------------------- .EQU EPWM11_BWCNT, 0x4000038C // 0x4000 038C EPWM11_BWCNT Bits------------------------------------- .EQU EPWM11_BWCNT_WITCNT15, 31 .EQU EPWM11_BWCNT_WITCNT14, 30 .EQU EPWM11_BWCNT_WITCNT13, 29 .EQU EPWM11_BWCNT_WITCNT12, 28 .EQU EPWM11_BWCNT_WITCNT11, 27 .EQU EPWM11_BWCNT_WITCNT10, 26 .EQU EPWM11_BWCNT_WITCNT9, 25 .EQU EPWM11_BWCNT_WITCNT8, 24 .EQU EPWM11_BWCNT_WITCNT7, 23 .EQU EPWM11_BWCNT_WITCNT6, 22 .EQU EPWM11_BWCNT_WITCNT5, 21 .EQU EPWM11_BWCNT_WITCNT4, 20 .EQU EPWM11_BWCNT_WITCNT3, 19 .EQU EPWM11_BWCNT_WITCNT2, 18 .EQU EPWM11_BWCNT_WITCNT1, 17 .EQU EPWM11_BWCNT_WITCNT0, 16 .EQU EPWM11_BWCNT_OFFCNT15, 15 .EQU EPWM11_BWCNT_OFFCNT14, 14 .EQU EPWM11_BWCNT_OFFCNT13, 13 .EQU EPWM11_BWCNT_OFFCNT12, 12 .EQU EPWM11_BWCNT_OFFCNT11, 11 .EQU EPWM11_BWCNT_OFFCNT10, 10 .EQU EPWM11_BWCNT_OFFCNT9, 9 .EQU EPWM11_BWCNT_OFFCNT8, 8 .EQU EPWM11_BWCNT_OFFCNT7, 7 .EQU EPWM11_BWCNT_OFFCNT6, 6 .EQU EPWM11_BWCNT_OFFCNT5, 5 .EQU EPWM11_BWCNT_OFFCNT4, 4 .EQU EPWM11_BWCNT_OFFCNT3, 3 .EQU EPWM11_BWCNT_OFFCNT2, 2 .EQU EPWM11_BWCNT_OFFCNT1, 1 .EQU EPWM11_BWCNT_OFFCNT0, 0 // register------------------------------------- .EQU EPWM11_ETCTL2, 0x40000390 // 0x4000 0390 EPWM11_ETCTL2 Bits------------------------------------- .EQU EPWM11_ETCTL2_BT3, 26 .EQU EPWM11_ETCTL2_BT2, 25 .EQU EPWM11_ETCTL2_BT1, 24 .EQU EPWM11_ETCTL2_BT0, 23 .EQU EPWM11_ETCTL2_BPP3, 22 .EQU EPWM11_ETCTL2_BPP2, 21 .EQU EPWM11_ETCTL2_BPP1, 20 .EQU EPWM11_ETCTL2_BPP0, 19 .EQU EPWM11_ETCTL2_SELB2, 18 .EQU EPWM11_ETCTL2_SELB1, 17 .EQU EPWM11_ETCTL2_SELB0, 16 .EQU EPWM11_ETCTL2_AT3, 10 .EQU EPWM11_ETCTL2_AT2, 9 .EQU EPWM11_ETCTL2_AT1, 8 .EQU EPWM11_ETCTL2_AT0, 7 .EQU EPWM11_ETCTL2_APP3, 6 .EQU EPWM11_ETCTL2_APP2, 5 .EQU EPWM11_ETCTL2_APP1, 4 .EQU EPWM11_ETCTL2_APP0, 3 .EQU EPWM11_ETCTL2_SELA2, 2 .EQU EPWM11_ETCTL2_SELA1, 1 .EQU EPWM11_ETCTL2_SELA0, 0 // register------------------------------------- .EQU EPWM11_GLDCTL, 0x40000394 // 0x4000 0394 EPWM11_GLDCTL Bits------------------------------------- .EQU EPWM11_GLDCTL_HRCFGUDSEL1, 22 .EQU EPWM11_GLDCTL_HRCFGUDSEL0, 21 .EQU EPWM11_GLDCTL_HRCFGUDEN, 20 .EQU EPWM11_GLDCTL_HRPHSUDSEL1, 19 .EQU EPWM11_GLDCTL_HRPHSUDSEL0, 18 .EQU EPWM11_GLDCTL_HRPHSUDEN, 17 .EQU EPWM11_GLDCTL_HRDBUDSEL1, 16 .EQU EPWM11_GLDCTL_HRDBUDSEL0, 15 .EQU EPWM11_GLDCTL_HRDBUDEN, 14 .EQU EPWM11_GLDCTL_DBUDSEL1, 13 .EQU EPWM11_GLDCTL_DBUDSEL0, 12 .EQU EPWM11_GLDCTL_DBUDEN, 11 .EQU EPWM11_GLDCTL_HRPBUDSEL1, 10 .EQU EPWM11_GLDCTL_HRPBUDSEL0, 9 .EQU EPWM11_GLDCTL_HRPBUDEN, 8 .EQU EPWM11_GLDCTL_CLDPRCS7, 7 .EQU EPWM11_GLDCTL_CLDPRCS6, 6 .EQU EPWM11_GLDCTL_CLDPRCS5, 5 .EQU EPWM11_GLDCTL_CLDPRCS4, 4 .EQU EPWM11_GLDCTL_CLDPRCS3, 3 .EQU EPWM11_GLDCTL_CLDPRCS2, 2 .EQU EPWM11_GLDCTL_CLDPRCS1, 1 .EQU EPWM11_GLDCTL_CLDPRCS0, 0 // register------------------------------------- .EQU EPWM11_FILTCTL, 0x40000398 // 0x4000 0398 EPWM11_FILTCTL Bits------------------------------------- .EQU EPWM11_FILTCTL_SYDELAY2, 23 .EQU EPWM11_FILTCTL_SYDELAY1, 22 .EQU EPWM11_FILTCTL_SYDELAY0, 21 .EQU EPWM11_FILTCTL_SYFDIV3, 20 .EQU EPWM11_FILTCTL_SYFDIV2, 19 .EQU EPWM11_FILTCTL_SYFDIV1, 18 .EQU EPWM11_FILTCTL_SYFDIV0, 17 .EQU EPWM11_FILTCTL_SYNCFEN, 16 .EQU EPWM11_FILTCTL_TCKDELAY2, 15 .EQU EPWM11_FILTCTL_TCKDELAY1, 14 .EQU EPWM11_FILTCTL_TCKDELAY0, 13 .EQU EPWM11_FILTCTL_TCKFDIV3, 12 .EQU EPWM11_FILTCTL_TCKFDIV2, 11 .EQU EPWM11_FILTCTL_TCKFDIV1, 10 .EQU EPWM11_FILTCTL_TCKFDIV0, 9 .EQU EPWM11_FILTCTL_TXCKFEN, 8 .EQU EPWM11_FILTCTL_CFDELAY2, 7 .EQU EPWM11_FILTCTL_CFDELAY1, 6 .EQU EPWM11_FILTCTL_CFDELAY0, 5 .EQU EPWM11_FILTCTL_CFDIV3, 4 .EQU EPWM11_FILTCTL_CFDIV2, 3 .EQU EPWM11_FILTCTL_CFDIV1, 2 .EQU EPWM11_FILTCTL_CFDIV0, 1 .EQU EPWM11_FILTCTL_CAPFEN, 0 // register------------------------------------- .EQU T12_CNT, 0x40000400 // 0x4000 0400 T12_CNT Bits------------------------------------- .EQU T12_CNT_TXCNT31, 31 .EQU T12_CNT_TXCNT30, 30 .EQU T12_CNT_TXCNT29, 29 .EQU T12_CNT_TXCNT28, 28 .EQU T12_CNT_TXCNT27, 27 .EQU T12_CNT_TXCNT26, 26 .EQU T12_CNT_TXCNT25, 25 .EQU T12_CNT_TXCNT24, 24 .EQU T12_CNT_TXCNT23, 23 .EQU T12_CNT_TXCNT22, 22 .EQU T12_CNT_TXCNT21, 21 .EQU T12_CNT_TXCNT20, 20 .EQU T12_CNT_TXCNT19, 19 .EQU T12_CNT_TXCNT18, 18 .EQU T12_CNT_TXCNT17, 17 .EQU T12_CNT_TXCNT16, 16 .EQU T12_CNT_TXCNT15, 15 .EQU T12_CNT_TXCNT14, 14 .EQU T12_CNT_TXCNT13, 13 .EQU T12_CNT_TXCNT12, 12 .EQU T12_CNT_TXCNT11, 11 .EQU T12_CNT_TXCNT10, 10 .EQU T12_CNT_TXCNT9, 9 .EQU T12_CNT_TXCNT8, 8 .EQU T12_CNT_TXCNT7, 7 .EQU T12_CNT_TXCNT6, 6 .EQU T12_CNT_TXCNT5, 5 .EQU T12_CNT_TXCNT4, 4 .EQU T12_CNT_TXCNT3, 3 .EQU T12_CNT_TXCNT2, 2 .EQU T12_CNT_TXCNT1, 1 .EQU T12_CNT_TXCNT0, 0 // register------------------------------------- .EQU T12_PHS, 0x40000404 // 0x4000 0404 T12_PHS Bits------------------------------------- .EQU T12_PHS_TXPHS31, 31 .EQU T12_PHS_TXPHS30, 30 .EQU T12_PHS_TXPHS29, 29 .EQU T12_PHS_TXPHS28, 28 .EQU T12_PHS_TXPHS27, 27 .EQU T12_PHS_TXPHS26, 26 .EQU T12_PHS_TXPHS25, 25 .EQU T12_PHS_TXPHS24, 24 .EQU T12_PHS_TXPHS23, 23 .EQU T12_PHS_TXPHS22, 22 .EQU T12_PHS_TXPHS21, 21 .EQU T12_PHS_TXPHS20, 20 .EQU T12_PHS_TXPHS19, 19 .EQU T12_PHS_TXPHS18, 18 .EQU T12_PHS_TXPHS17, 17 .EQU T12_PHS_TXPHS16, 16 .EQU T12_PHS_TXPHS15, 15 .EQU T12_PHS_TXPHS14, 14 .EQU T12_PHS_TXPHS13, 13 .EQU T12_PHS_TXPHS12, 12 .EQU T12_PHS_TXPHS11, 11 .EQU T12_PHS_TXPHS10, 10 .EQU T12_PHS_TXPHS9, 9 .EQU T12_PHS_TXPHS8, 8 .EQU T12_PHS_TXPHS7, 7 .EQU T12_PHS_TXPHS6, 6 .EQU T12_PHS_TXPHS5, 5 .EQU T12_PHS_TXPHS4, 4 .EQU T12_PHS_TXPHS3, 3 .EQU T12_PHS_TXPHS2, 2 .EQU T12_PHS_TXPHS1, 1 .EQU T12_PHS_TXPHS0, 0 // register------------------------------------- .EQU T12_PPX, 0x40000408 // 0x4000 0408 T12_PPX Bits------------------------------------- .EQU T12_PPX_PPX31, 31 .EQU T12_PPX_PPX30, 30 .EQU T12_PPX_PPX29, 29 .EQU T12_PPX_PPX28, 28 .EQU T12_PPX_PPX27, 27 .EQU T12_PPX_PPX26, 26 .EQU T12_PPX_PPX25, 25 .EQU T12_PPX_PPX24, 24 .EQU T12_PPX_PPX23, 23 .EQU T12_PPX_PPX22, 22 .EQU T12_PPX_PPX21, 21 .EQU T12_PPX_PPX20, 20 .EQU T12_PPX_PPX19, 19 .EQU T12_PPX_PPX18, 18 .EQU T12_PPX_PPX17, 17 .EQU T12_PPX_PPX16, 16 .EQU T12_PPX_PPX15, 15 .EQU T12_PPX_PPX14, 14 .EQU T12_PPX_PPX13, 13 .EQU T12_PPX_PPX12, 12 .EQU T12_PPX_PPX11, 11 .EQU T12_PPX_PPX10, 10 .EQU T12_PPX_PPX9, 9 .EQU T12_PPX_PPX8, 8 .EQU T12_PPX_PPX7, 7 .EQU T12_PPX_PPX6, 6 .EQU T12_PPX_PPX5, 5 .EQU T12_PPX_PPX4, 4 .EQU T12_PPX_PPX3, 3 .EQU T12_PPX_PPX2, 2 .EQU T12_PPX_PPX1, 1 .EQU T12_PPX_PPX0, 0 // register------------------------------------- .EQU T12_PRSC, 0x4000040C // 0x4000 040C T12_PRSC Bits------------------------------------- .EQU T12_PRSC_TXPRSC31, 31 .EQU T12_PRSC_TXPRSC30, 30 .EQU T12_PRSC_TXPRSC29, 29 .EQU T12_PRSC_TXPRSC28, 28 .EQU T12_PRSC_TXPRSC27, 27 .EQU T12_PRSC_TXPRSC26, 26 .EQU T12_PRSC_TXPRSC25, 25 .EQU T12_PRSC_TXPRSC24, 24 .EQU T12_PRSC_TXPRSC23, 23 .EQU T12_PRSC_TXPRSC22, 22 .EQU T12_PRSC_TXPRSC21, 21 .EQU T12_PRSC_TXPRSC20, 20 .EQU T12_PRSC_TXPRSC19, 19 .EQU T12_PRSC_TXPRSC18, 18 .EQU T12_PRSC_TXPRSC17, 17 .EQU T12_PRSC_TXPRSC16, 16 .EQU T12_PRSC_TXPRSC15, 15 .EQU T12_PRSC_TXPRSC14, 14 .EQU T12_PRSC_TXPRSC13, 13 .EQU T12_PRSC_TXPRSC12, 12 .EQU T12_PRSC_TXPRSC11, 11 .EQU T12_PRSC_TXPRSC10, 10 .EQU T12_PRSC_TXPRSC9, 9 .EQU T12_PRSC_TXPRSC8, 8 .EQU T12_PRSC_TXPRSC7, 7 .EQU T12_PRSC_TXPRSC6, 6 .EQU T12_PRSC_TXPRSC5, 5 .EQU T12_PRSC_TXPRSC4, 4 .EQU T12_PRSC_TXPRSC3, 3 .EQU T12_PRSC_TXPRSC2, 2 .EQU T12_PRSC_TXPRSC1, 1 .EQU T12_PRSC_TXPRSC0, 0 // register------------------------------------- .EQU T12_CTL, 0x40000410 // 0x4000 0410 T12_CTL Bits------------------------------------- .EQU T12_CTL_BLINKEN, 31 .EQU T12_CTL_UDSYNEN, 29 .EQU T12_CTL_HRLOCK, 28 .EQU T12_CTL_ETLOCK, 27 .EQU T12_CTL_PCLOCK, 26 .EQU T12_CTL_DBLOCK, 25 .EQU T12_CTL_AQLOCKB, 24 .EQU T12_CTL_AQLOCKA, 23 .EQU T12_CTL_CAPEN, 22 .EQU T12_CTL_CAPSEL, 21 .EQU T12_CTL_TXMAX, 19 .EQU T12_CTL_PHSDIR, 18 .EQU T12_CTL_SWFSYNC, 17 .EQU T12_CTL_SYNCOSEL1, 16 .EQU T12_CTL_SYNCOSEL0, 15 .EQU T12_CTL_PHSEN, 14 .EQU T12_CTL_SYNCI, 13 .EQU T12_CTL_TXUR, 12 .EQU T12_CTL_TXUDEVT, 11 .EQU T12_CTL_TXUDEN, 10 .EQU T12_CTL_TXCMS2, 9 .EQU T12_CTL_TXCMS1, 8 .EQU T12_CTL_TXCMS0, 7 .EQU T12_CTL_TXDIR, 6 .EQU T12_CTL_TXCLK1, 5 .EQU T12_CTL_TXCLK0, 4 .EQU T12_CTL_TXSY, 3 .EQU T12_CTL_TXGATE, 2 .EQU T12_CTL_TXCS, 1 .EQU T12_CTL_TXEN, 0 // register------------------------------------- .EQU EPWM12_RA, 0x40000414 // 0x4000 0414 EPWM12_RA Bits------------------------------------- .EQU EPWM12_RA_EPWMRA31, 31 .EQU EPWM12_RA_EPWMRA30, 30 .EQU EPWM12_RA_EPWMRA29, 29 .EQU EPWM12_RA_EPWMRA28, 28 .EQU EPWM12_RA_EPWMRA27, 27 .EQU EPWM12_RA_EPWMRA26, 26 .EQU EPWM12_RA_EPWMRA25, 25 .EQU EPWM12_RA_EPWMRA24, 24 .EQU EPWM12_RA_EPWMRA23, 23 .EQU EPWM12_RA_EPWMRA22, 22 .EQU EPWM12_RA_EPWMRA21, 21 .EQU EPWM12_RA_EPWMRA20, 20 .EQU EPWM12_RA_EPWMRA19, 19 .EQU EPWM12_RA_EPWMRA18, 18 .EQU EPWM12_RA_EPWMRA17, 17 .EQU EPWM12_RA_EPWMRA16, 16 .EQU EPWM12_RA_EPWMRA15, 15 .EQU EPWM12_RA_EPWMRA14, 14 .EQU EPWM12_RA_EPWMRA13, 13 .EQU EPWM12_RA_EPWMRA12, 12 .EQU EPWM12_RA_EPWMRA11, 11 .EQU EPWM12_RA_EPWMRA10, 10 .EQU EPWM12_RA_EPWMRA9, 9 .EQU EPWM12_RA_EPWMRA8, 8 .EQU EPWM12_RA_EPWMRA7, 7 .EQU EPWM12_RA_EPWMRA6, 6 .EQU EPWM12_RA_EPWMRA5, 5 .EQU EPWM12_RA_EPWMRA4, 4 .EQU EPWM12_RA_EPWMRA3, 3 .EQU EPWM12_RA_EPWMRA2, 2 .EQU EPWM12_RA_EPWMRA1, 1 .EQU EPWM12_RA_EPWMRA0, 0 // register------------------------------------- .EQU EPWM12_RB, 0x40000418 // 0x4000 0418 EPWM12_RB Bits------------------------------------- .EQU EPWM12_RB_EPWMRB31, 31 .EQU EPWM12_RB_EPWMRB30, 30 .EQU EPWM12_RB_EPWMRB29, 29 .EQU EPWM12_RB_EPWMRB28, 28 .EQU EPWM12_RB_EPWMRB27, 27 .EQU EPWM12_RB_EPWMRB26, 26 .EQU EPWM12_RB_EPWMRB25, 25 .EQU EPWM12_RB_EPWMRB24, 24 .EQU EPWM12_RB_EPWMRB23, 23 .EQU EPWM12_RB_EPWMRB22, 22 .EQU EPWM12_RB_EPWMRB21, 21 .EQU EPWM12_RB_EPWMRB20, 20 .EQU EPWM12_RB_EPWMRB19, 19 .EQU EPWM12_RB_EPWMRB18, 18 .EQU EPWM12_RB_EPWMRB17, 17 .EQU EPWM12_RB_EPWMRB16, 16 .EQU EPWM12_RB_EPWMRB15, 15 .EQU EPWM12_RB_EPWMRB14, 14 .EQU EPWM12_RB_EPWMRB13, 13 .EQU EPWM12_RB_EPWMRB12, 12 .EQU EPWM12_RB_EPWMRB11, 11 .EQU EPWM12_RB_EPWMRB10, 10 .EQU EPWM12_RB_EPWMRB9, 9 .EQU EPWM12_RB_EPWMRB8, 8 .EQU EPWM12_RB_EPWMRB7, 7 .EQU EPWM12_RB_EPWMRB6, 6 .EQU EPWM12_RB_EPWMRB5, 5 .EQU EPWM12_RB_EPWMRB4, 4 .EQU EPWM12_RB_EPWMRB3, 3 .EQU EPWM12_RB_EPWMRB2, 2 .EQU EPWM12_RB_EPWMRB1, 1 .EQU EPWM12_RB_EPWMRB0, 0 // register------------------------------------- .EQU EPWM12_CTLA, 0x4000041C // 0x4000 041C EPWM12_CTLA Bits------------------------------------- .EQU EPWM12_CTLA_OTSFA, 16 .EQU EPWM12_CTLA_ACTSFA1, 15 .EQU EPWM12_CTLA_ACTSFA0, 14 .EQU EPWM12_CTLA_CSFA1, 13 .EQU EPWM12_CTLA_CSFA0, 12 .EQU EPWM12_CTLA_ACBD1, 11 .EQU EPWM12_CTLA_ACBD0, 10 .EQU EPWM12_CTLA_ACBU1, 9 .EQU EPWM12_CTLA_ACBU0, 8 .EQU EPWM12_CTLA_ACAD1, 7 .EQU EPWM12_CTLA_ACAD0, 6 .EQU EPWM12_CTLA_ACAU1, 5 .EQU EPWM12_CTLA_ACAU0, 4 .EQU EPWM12_CTLA_APRD1, 3 .EQU EPWM12_CTLA_APRD0, 2 .EQU EPWM12_CTLA_AZRO1, 1 .EQU EPWM12_CTLA_AZRO0, 0 // register------------------------------------- .EQU EPWM12_CTLB, 0x40000420 // 0x4000 0420 EPWM12_CTLB Bits------------------------------------- .EQU EPWM12_CTLB_OTSFB, 16 .EQU EPWM12_CTLB_ACTSFB1, 15 .EQU EPWM12_CTLB_ACTSFB0, 14 .EQU EPWM12_CTLB_CSFB1, 13 .EQU EPWM12_CTLB_CSFB0, 12 .EQU EPWM12_CTLB_BCBD1, 11 .EQU EPWM12_CTLB_BCBD0, 10 .EQU EPWM12_CTLB_BCBU1, 9 .EQU EPWM12_CTLB_BCBU0, 8 .EQU EPWM12_CTLB_BCAD1, 7 .EQU EPWM12_CTLB_BCAD0, 6 .EQU EPWM12_CTLB_BCAU1, 5 .EQU EPWM12_CTLB_BCAU0, 4 .EQU EPWM12_CTLB_BPRD1, 3 .EQU EPWM12_CTLB_BPRD0, 2 .EQU EPWM12_CTLB_BZRO1, 1 .EQU EPWM12_CTLB_BZRO0, 0 // register------------------------------------- .EQU EPWM12_DBCTL, 0x40000424 // 0x4000 0424 EPWM12_DBCTL Bits------------------------------------- .EQU EPWM12_DBCTL_INMODE1, 5 .EQU EPWM12_DBCTL_INMODE0, 4 .EQU EPWM12_DBCTL_POLSEL1, 3 .EQU EPWM12_DBCTL_POLSEL0, 2 .EQU EPWM12_DBCTL_OUTMODE1, 1 .EQU EPWM12_DBCTL_OUTMODE0, 0 // register------------------------------------- .EQU EPWM12_DBT, 0x40000428 // 0x4000 0428 EPWM12_DBT Bits------------------------------------- .EQU EPWM12_DBT_RDBT15, 31 .EQU EPWM12_DBT_RDBT14, 30 .EQU EPWM12_DBT_RDBT13, 29 .EQU EPWM12_DBT_RDBT12, 28 .EQU EPWM12_DBT_RDBT11, 27 .EQU EPWM12_DBT_RDBT10, 26 .EQU EPWM12_DBT_RDBT9, 25 .EQU EPWM12_DBT_RDBT8, 24 .EQU EPWM12_DBT_RDBT7, 23 .EQU EPWM12_DBT_RDBT6, 22 .EQU EPWM12_DBT_RDBT5, 21 .EQU EPWM12_DBT_RDBT4, 20 .EQU EPWM12_DBT_RDBT3, 19 .EQU EPWM12_DBT_RDBT2, 18 .EQU EPWM12_DBT_RDBT1, 17 .EQU EPWM12_DBT_RDBT0, 16 .EQU EPWM12_DBT_FDBT15, 15 .EQU EPWM12_DBT_FDBT14, 14 .EQU EPWM12_DBT_FDBT13, 13 .EQU EPWM12_DBT_FDBT12, 12 .EQU EPWM12_DBT_FDBT11, 11 .EQU EPWM12_DBT_FDBT10, 10 .EQU EPWM12_DBT_FDBT9, 9 .EQU EPWM12_DBT_FDBT8, 8 .EQU EPWM12_DBT_FDBT7, 7 .EQU EPWM12_DBT_FDBT6, 6 .EQU EPWM12_DBT_FDBT5, 5 .EQU EPWM12_DBT_FDBT4, 4 .EQU EPWM12_DBT_FDBT3, 3 .EQU EPWM12_DBT_FDBT2, 2 .EQU EPWM12_DBT_FDBT1, 1 .EQU EPWM12_DBT_FDBT0, 0 // register------------------------------------- .EQU EPWM12_PCCTL, 0x4000042C // 0x4000 042C EPWM12_PCCTL Bits------------------------------------- .EQU EPWM12_PCCTL_CHPFREQ2, 10 .EQU EPWM12_PCCTL_CHPFREQ1, 9 .EQU EPWM12_PCCTL_CHPFREQ0, 8 .EQU EPWM12_PCCTL_CHPDUTY2, 7 .EQU EPWM12_PCCTL_CHPDUTY1, 6 .EQU EPWM12_PCCTL_CHPDUTY0, 5 .EQU EPWM12_PCCTL_OSHTWTH3, 4 .EQU EPWM12_PCCTL_OSHTWTH2, 3 .EQU EPWM12_PCCTL_OSHTWTH1, 2 .EQU EPWM12_PCCTL_OSHTWTH0, 1 .EQU EPWM12_PCCTL_CHPEN, 0 // register------------------------------------- .EQU EPWM12_PXASCTL, 0x40000430 // 0x4000 0430 EPWM12_PXASCTL Bits------------------------------------- .EQU EPWM12_PXASCTL_PXRSEN, 8 .EQU EPWM12_PXASCTL_PXSSA1, 7 .EQU EPWM12_PXASCTL_PXSSA0, 6 .EQU EPWM12_PXASCTL_PXSSB1, 5 .EQU EPWM12_PXASCTL_PXSSB0, 4 .EQU EPWM12_PXASCTL_PXASE, 3 .EQU EPWM12_PXASCTL_PXASS2, 2 .EQU EPWM12_PXASCTL_PXASS1, 1 .EQU EPWM12_PXASCTL_PXASS0, 0 // register------------------------------------- .EQU EPWM12_ETCTL, 0x40000434 // 0x4000 0434 EPWM12_ETCTL Bits------------------------------------- .EQU EPWM12_ETCTL_BTSEL1, 25 .EQU EPWM12_ETCTL_BTSEL0, 24 .EQU EPWM12_ETCTL_FRCB, 19 .EQU EPWM12_ETCTL_TOADENB, 16 .EQU EPWM12_ETCTL_ATSEL1, 9 .EQU EPWM12_ETCTL_ATSEL0, 8 .EQU EPWM12_ETCTL_FRCA, 3 .EQU EPWM12_ETCTL_TOADENA, 0 // register------------------------------------- .EQU EPWM12_IE, 0x40000438 // 0x4000 0438 EPWM12_IE Bits------------------------------------- .EQU EPWM12_IE_CAPIE, 9 .EQU EPWM12_IE_TXDIE, 8 .EQU EPWM12_IE_TXCIE, 7 .EQU EPWM12_IE_TXAIE, 6 .EQU EPWM12_IE_TXBIE, 5 .EQU EPWM12_IE_TXIE, 4 .EQU EPWM12_IE_TXUIE, 3 .EQU EPWM12_IE_TXGIE, 2 .EQU EPWM12_IE_TXTIE1, 1 .EQU EPWM12_IE_TXTIE0, 0 // register------------------------------------- .EQU EPWM12_IF, 0x4000043C // 0x4000 043C EPWM12_IF Bits------------------------------------- .EQU EPWM12_IF_CAPIF, 9 .EQU EPWM12_IF_TXDIF, 8 .EQU EPWM12_IF_TXCIF, 7 .EQU EPWM12_IF_TXAIF, 6 .EQU EPWM12_IF_TXBIF, 5 .EQU EPWM12_IF_TXIF, 4 .EQU EPWM12_IF_TXUIF, 3 .EQU EPWM12_IF_TXGIF, 2 .EQU EPWM12_IF_TXTIF1, 1 .EQU EPWM12_IF_TXTIF0, 0 // register------------------------------------- .EQU EPWM12_IC, 0x40000440 // 0x4000 0440 EPWM12_IC Bits------------------------------------- .EQU EPWM12_IC_CAPIC1, 10 .EQU EPWM12_IC_CAPIC0, 9 .EQU EPWM12_IC_TXDIC, 8 .EQU EPWM12_IC_TXCIC, 7 .EQU EPWM12_IC_TXAIC, 6 .EQU EPWM12_IC_TXBIC, 5 .EQU EPWM12_IC_TXIC, 4 .EQU EPWM12_IC_TXUIC, 3 .EQU EPWM12_IC_TXGIC, 2 .EQU EPWM12_IC_TXTIC1, 1 .EQU EPWM12_IC_TXTIC0, 0 // register------------------------------------- .EQU EPWM12_DE, 0x40000444 // 0x4000 0444 EPWM12_DE Bits------------------------------------- .EQU EPWM12_DE_TXDDE, 8 .EQU EPWM12_DE_TXCDE, 7 .EQU EPWM12_DE_TXADE, 6 .EQU EPWM12_DE_TXBDE, 5 .EQU EPWM12_DE_TXDE, 4 .EQU EPWM12_DE_TXUDE, 3 .EQU EPWM12_DE_TXGDE, 2 .EQU EPWM12_DE_TXTDE1, 1 .EQU EPWM12_DE_TXTDE0, 0 // register------------------------------------- .EQU EPWM12_DF, 0x40000448 // 0x4000 0448 EPWM12_DF Bits------------------------------------- .EQU EPWM12_DF_TXDDF, 8 .EQU EPWM12_DF_TXCDF, 7 .EQU EPWM12_DF_TXADF, 6 .EQU EPWM12_DF_TXBDF, 5 .EQU EPWM12_DF_TXDF, 4 .EQU EPWM12_DF_TXUDF, 3 .EQU EPWM12_DF_TXGDF, 2 .EQU EPWM12_DF_TXTDF1, 1 .EQU EPWM12_DF_TXTDF0, 0 // register------------------------------------- .EQU EPWM12_HRPWMCTLA, 0x40000450 // 0x4000 0450 EPWM12_HRPWMCTLA Bits------------------------------------- .EQU EPWM12_HRPWMCTLA_HRPHSENA, 6 .EQU EPWM12_HRPWMCTLA_HRFENA, 5 .EQU EPWM12_HRPWMCTLA_HRRENA, 4 .EQU EPWM12_HRPWMCTLA_HRPENA, 3 .EQU EPWM12_HRPWMCTLA_HRDENA, 2 .EQU EPWM12_HRPWMCTLA_HRSELA, 1 .EQU EPWM12_HRPWMCTLA_HRENA, 0 // register------------------------------------- .EQU EPWM12_HRCMPA, 0x40000454 // 0x4000 0454 EPWM12_HRCMPA Bits------------------------------------- .EQU EPWM12_HRCMPA_HRCMPA7, 7 .EQU EPWM12_HRCMPA_HRCMPA6, 6 .EQU EPWM12_HRCMPA_HRCMPA5, 5 .EQU EPWM12_HRCMPA_HRCMPA4, 4 .EQU EPWM12_HRCMPA_HRCMPA3, 3 .EQU EPWM12_HRCMPA_HRCMPA2, 2 .EQU EPWM12_HRCMPA_HRCMPA1, 1 .EQU EPWM12_HRCMPA_HRCMPA0, 0 // register------------------------------------- .EQU EPWM12_CAP, 0x40000458 // 0x4000 0458 EPWM12_CAP Bits------------------------------------- .EQU EPWM12_CAP_CAP31, 31 .EQU EPWM12_CAP_CAP30, 30 .EQU EPWM12_CAP_CAP29, 29 .EQU EPWM12_CAP_CAP28, 28 .EQU EPWM12_CAP_CAP27, 27 .EQU EPWM12_CAP_CAP26, 26 .EQU EPWM12_CAP_CAP25, 25 .EQU EPWM12_CAP_CAP24, 24 .EQU EPWM12_CAP_CAP23, 23 .EQU EPWM12_CAP_CAP22, 22 .EQU EPWM12_CAP_CAP21, 21 .EQU EPWM12_CAP_CAP20, 20 .EQU EPWM12_CAP_CAP19, 19 .EQU EPWM12_CAP_CAP18, 18 .EQU EPWM12_CAP_CAP17, 17 .EQU EPWM12_CAP_CAP16, 16 .EQU EPWM12_CAP_CAP15, 15 .EQU EPWM12_CAP_CAP14, 14 .EQU EPWM12_CAP_CAP13, 13 .EQU EPWM12_CAP_CAP12, 12 .EQU EPWM12_CAP_CAP11, 11 .EQU EPWM12_CAP_CAP10, 10 .EQU EPWM12_CAP_CAP9, 9 .EQU EPWM12_CAP_CAP8, 8 .EQU EPWM12_CAP_CAP7, 7 .EQU EPWM12_CAP_CAP6, 6 .EQU EPWM12_CAP_CAP5, 5 .EQU EPWM12_CAP_CAP4, 4 .EQU EPWM12_CAP_CAP3, 3 .EQU EPWM12_CAP_CAP2, 2 .EQU EPWM12_CAP_CAP1, 1 .EQU EPWM12_CAP_CAP0, 0 // register------------------------------------- .EQU EPWM12_RC, 0x4000045C // 0x4000 045C EPWM12_RC Bits------------------------------------- .EQU EPWM12_RC_EPWMRC31, 31 .EQU EPWM12_RC_EPWMRC30, 30 .EQU EPWM12_RC_EPWMRC29, 29 .EQU EPWM12_RC_EPWMRC28, 28 .EQU EPWM12_RC_EPWMRC27, 27 .EQU EPWM12_RC_EPWMRC26, 26 .EQU EPWM12_RC_EPWMRC25, 25 .EQU EPWM12_RC_EPWMRC24, 24 .EQU EPWM12_RC_EPWMRC23, 23 .EQU EPWM12_RC_EPWMRC22, 22 .EQU EPWM12_RC_EPWMRC21, 21 .EQU EPWM12_RC_EPWMRC20, 20 .EQU EPWM12_RC_EPWMRC19, 19 .EQU EPWM12_RC_EPWMRC18, 18 .EQU EPWM12_RC_EPWMRC17, 17 .EQU EPWM12_RC_EPWMRC16, 16 .EQU EPWM12_RC_EPWMRC15, 15 .EQU EPWM12_RC_EPWMRC14, 14 .EQU EPWM12_RC_EPWMRC13, 13 .EQU EPWM12_RC_EPWMRC12, 12 .EQU EPWM12_RC_EPWMRC11, 11 .EQU EPWM12_RC_EPWMRC10, 10 .EQU EPWM12_RC_EPWMRC9, 9 .EQU EPWM12_RC_EPWMRC8, 8 .EQU EPWM12_RC_EPWMRC7, 7 .EQU EPWM12_RC_EPWMRC6, 6 .EQU EPWM12_RC_EPWMRC5, 5 .EQU EPWM12_RC_EPWMRC4, 4 .EQU EPWM12_RC_EPWMRC3, 3 .EQU EPWM12_RC_EPWMRC2, 2 .EQU EPWM12_RC_EPWMRC1, 1 .EQU EPWM12_RC_EPWMRC0, 0 // register------------------------------------- .EQU EPWM12_RD, 0x40000460 // 0x4000 0460 EPWM12_RD Bits------------------------------------- .EQU EPWM12_RD_EPWMRD31, 31 .EQU EPWM12_RD_EPWMRD30, 30 .EQU EPWM12_RD_EPWMRD29, 29 .EQU EPWM12_RD_EPWMRD28, 28 .EQU EPWM12_RD_EPWMRD27, 27 .EQU EPWM12_RD_EPWMRD26, 26 .EQU EPWM12_RD_EPWMRD25, 25 .EQU EPWM12_RD_EPWMRD24, 24 .EQU EPWM12_RD_EPWMRD23, 23 .EQU EPWM12_RD_EPWMRD22, 22 .EQU EPWM12_RD_EPWMRD21, 21 .EQU EPWM12_RD_EPWMRD20, 20 .EQU EPWM12_RD_EPWMRD19, 19 .EQU EPWM12_RD_EPWMRD18, 18 .EQU EPWM12_RD_EPWMRD17, 17 .EQU EPWM12_RD_EPWMRD16, 16 .EQU EPWM12_RD_EPWMRD15, 15 .EQU EPWM12_RD_EPWMRD14, 14 .EQU EPWM12_RD_EPWMRD13, 13 .EQU EPWM12_RD_EPWMRD12, 12 .EQU EPWM12_RD_EPWMRD11, 11 .EQU EPWM12_RD_EPWMRD10, 10 .EQU EPWM12_RD_EPWMRD9, 9 .EQU EPWM12_RD_EPWMRD8, 8 .EQU EPWM12_RD_EPWMRD7, 7 .EQU EPWM12_RD_EPWMRD6, 6 .EQU EPWM12_RD_EPWMRD5, 5 .EQU EPWM12_RD_EPWMRD4, 4 .EQU EPWM12_RD_EPWMRD3, 3 .EQU EPWM12_RD_EPWMRD2, 2 .EQU EPWM12_RD_EPWMRD1, 1 .EQU EPWM12_RD_EPWMRD0, 0 // register------------------------------------- .EQU EPWM12_UDCTL, 0x40000464 // 0x4000 0464 EPWM12_UDCTL Bits------------------------------------- .EQU EPWM12_UDCTL_GBUDEN, 27 .EQU EPWM12_UDCTL_HRPUDSEL1, 26 .EQU EPWM12_UDCTL_HRPUDSEL0, 25 .EQU EPWM12_UDCTL_HRPUDEN, 24 .EQU EPWM12_UDCTL_EBUDSEL1, 23 .EQU EPWM12_UDCTL_EBUDSEL0, 22 .EQU EPWM12_UDCTL_EBUDEN, 21 .EQU EPWM12_UDCTL_EAUDSEL1, 20 .EQU EPWM12_UDCTL_EAUDSEL0, 19 .EQU EPWM12_UDCTL_EAUDEN, 18 .EQU EPWM12_UDCTL_CMDUDSEL1, 17 .EQU EPWM12_UDCTL_CMDUDSEL0, 16 .EQU EPWM12_UDCTL_CMDUDEN, 15 .EQU EPWM12_UDCTL_CMCUDSEL1, 14 .EQU EPWM12_UDCTL_CMCUDSEL0, 13 .EQU EPWM12_UDCTL_CMCUDEN, 12 .EQU EPWM12_UDCTL_CMBUDSEL1, 11 .EQU EPWM12_UDCTL_CMBUDSEL0, 10 .EQU EPWM12_UDCTL_CMBUDEN, 9 .EQU EPWM12_UDCTL_CMAUDSEL1, 8 .EQU EPWM12_UDCTL_CMAUDSEL0, 7 .EQU EPWM12_UDCTL_CMAUDEN, 6 .EQU EPWM12_UDCTL_PRUDSEL1, 5 .EQU EPWM12_UDCTL_PRUDSEL0, 4 .EQU EPWM12_UDCTL_PRUDEN, 3 .EQU EPWM12_UDCTL_PPUDSEL1, 2 .EQU EPWM12_UDCTL_PPUDSEL0, 1 .EQU EPWM12_UDCTL_PPUDEN, 0 // register------------------------------------- .EQU EPWM12_SRT, 0x40000468 // 0x4000 0468 EPWM12_SRT Bits------------------------------------- .EQU EPWM12_SRT_T31, 31 .EQU EPWM12_SRT_T30, 30 .EQU EPWM12_SRT_T29, 29 .EQU EPWM12_SRT_T28, 28 .EQU EPWM12_SRT_T27, 27 .EQU EPWM12_SRT_T26, 26 .EQU EPWM12_SRT_T25, 25 .EQU EPWM12_SRT_T24, 24 .EQU EPWM12_SRT_T23, 23 .EQU EPWM12_SRT_T22, 22 .EQU EPWM12_SRT_T21, 21 .EQU EPWM12_SRT_T20, 20 .EQU EPWM12_SRT_T19, 19 .EQU EPWM12_SRT_T18, 18 .EQU EPWM12_SRT_T17, 17 .EQU EPWM12_SRT_T16, 16 .EQU EPWM12_SRT_T15, 15 .EQU EPWM12_SRT_T14, 14 .EQU EPWM12_SRT_T13, 13 .EQU EPWM12_SRT_T12, 12 .EQU EPWM12_SRT_T11, 11 .EQU EPWM12_SRT_T10, 10 .EQU EPWM12_SRT_T9, 9 .EQU EPWM12_SRT_T8, 8 .EQU EPWM12_SRT_T7, 7 .EQU EPWM12_SRT_T6, 6 .EQU EPWM12_SRT_T5, 5 .EQU EPWM12_SRT_T4, 4 .EQU EPWM12_SRT_T3, 3 .EQU EPWM12_SRT_T2, 2 .EQU EPWM12_SRT_T1, 1 .EQU EPWM12_SRT_T0, 0 // register------------------------------------- .EQU EPWM12_HRPWMCTLB, 0x4000046C // 0x4000 046C EPWM12_HRPWMCTLB Bits------------------------------------- .EQU EPWM12_HRPWMCTLB_HRPHSENB, 6 .EQU EPWM12_HRPWMCTLB_HRFENB, 5 .EQU EPWM12_HRPWMCTLB_HRRENB, 4 .EQU EPWM12_HRPWMCTLB_HRPENB, 3 .EQU EPWM12_HRPWMCTLB_HRDENB, 2 .EQU EPWM12_HRPWMCTLB_HRSELB, 1 .EQU EPWM12_HRPWMCTLB_HRENB, 0 // register------------------------------------- .EQU EPWM12_HRCMPB, 0x40000470 // 0x4000 0470 EPWM12_HRCMPB Bits------------------------------------- .EQU EPWM12_HRCMPB_HRCMPB7, 7 .EQU EPWM12_HRCMPB_HRCMPB6, 6 .EQU EPWM12_HRCMPB_HRCMPB5, 5 .EQU EPWM12_HRCMPB_HRCMPB4, 4 .EQU EPWM12_HRCMPB_HRCMPB3, 3 .EQU EPWM12_HRCMPB_HRCMPB2, 2 .EQU EPWM12_HRCMPB_HRCMPB1, 1 .EQU EPWM12_HRCMPB_HRCMPB0, 0 // register------------------------------------- .EQU EPWM12_HRDB, 0x40000474 // 0x4000 0474 EPWM12_HRDB Bits------------------------------------- .EQU EPWM12_HRDB_HRR7, 15 .EQU EPWM12_HRDB_HRR6, 14 .EQU EPWM12_HRDB_HRR5, 13 .EQU EPWM12_HRDB_HRR4, 12 .EQU EPWM12_HRDB_HRR3, 11 .EQU EPWM12_HRDB_HRR2, 10 .EQU EPWM12_HRDB_HRR1, 9 .EQU EPWM12_HRDB_HRR0, 8 .EQU EPWM12_HRDB_HRF7, 7 .EQU EPWM12_HRDB_HRF6, 6 .EQU EPWM12_HRDB_HRF5, 5 .EQU EPWM12_HRDB_HRF4, 4 .EQU EPWM12_HRDB_HRF3, 3 .EQU EPWM12_HRDB_HRF2, 2 .EQU EPWM12_HRDB_HRF1, 1 .EQU EPWM12_HRDB_HRF0, 0 // register------------------------------------- .EQU EPWM12_HRPHS, 0x40000478 // 0x4000 0478 EPWM12_HRPHS Bits------------------------------------- .EQU EPWM12_HRPHS_HRPRE7, 15 .EQU EPWM12_HRPHS_HRPRE6, 14 .EQU EPWM12_HRPHS_HRPRE5, 13 .EQU EPWM12_HRPHS_HRPRE4, 12 .EQU EPWM12_HRPHS_HRPRE3, 11 .EQU EPWM12_HRPHS_HRPRE2, 10 .EQU EPWM12_HRPHS_HRPRE1, 9 .EQU EPWM12_HRPHS_HRPRE0, 8 .EQU EPWM12_HRPHS_HRPHS7, 7 .EQU EPWM12_HRPHS_HRPHS6, 6 .EQU EPWM12_HRPHS_HRPHS5, 5 .EQU EPWM12_HRPHS_HRPHS4, 4 .EQU EPWM12_HRPHS_HRPHS3, 3 .EQU EPWM12_HRPHS_HRPHS2, 2 .EQU EPWM12_HRPHS_HRPHS1, 1 .EQU EPWM12_HRPHS_HRPHS0, 0 // register------------------------------------- .EQU EPWM12_HRCFG, 0x4000047C // 0x4000 047C EPWM12_HRCFG Bits------------------------------------- .EQU EPWM12_HRCFG_STEP7, 15 .EQU EPWM12_HRCFG_STEP6, 14 .EQU EPWM12_HRCFG_STEP5, 13 .EQU EPWM12_HRCFG_STEP4, 12 .EQU EPWM12_HRCFG_STEP3, 11 .EQU EPWM12_HRCFG_STEP2, 10 .EQU EPWM12_HRCFG_STEP1, 9 .EQU EPWM12_HRCFG_STEP0, 8 .EQU EPWM12_HRCFG_TIMS7, 7 .EQU EPWM12_HRCFG_TIMS6, 6 .EQU EPWM12_HRCFG_TIMS5, 5 .EQU EPWM12_HRCFG_TIMS4, 4 .EQU EPWM12_HRCFG_TIMS3, 3 .EQU EPWM12_HRCFG_TIMS2, 2 .EQU EPWM12_HRCFG_TIMS1, 1 .EQU EPWM12_HRCFG_TIMS0, 0 // register------------------------------------- .EQU EPWM12_HRDELAY, 0x40000480 // 0x4000 0480 EPWM12_HRDELAY Bits------------------------------------- .EQU EPWM12_HRDELAY_REDBHR7, 31 .EQU EPWM12_HRDELAY_REDBHR6, 30 .EQU EPWM12_HRDELAY_REDBHR5, 29 .EQU EPWM12_HRDELAY_REDBHR4, 28 .EQU EPWM12_HRDELAY_REDBHR3, 27 .EQU EPWM12_HRDELAY_REDBHR2, 26 .EQU EPWM12_HRDELAY_REDBHR1, 25 .EQU EPWM12_HRDELAY_REDBHR0, 24 .EQU EPWM12_HRDELAY_FEDBHR7, 23 .EQU EPWM12_HRDELAY_FEDBHR6, 22 .EQU EPWM12_HRDELAY_FEDBHR5, 21 .EQU EPWM12_HRDELAY_FEDBHR4, 20 .EQU EPWM12_HRDELAY_FEDBHR3, 19 .EQU EPWM12_HRDELAY_FEDBHR2, 18 .EQU EPWM12_HRDELAY_FEDBHR1, 17 .EQU EPWM12_HRDELAY_FEDBHR0, 16 .EQU EPWM12_HRDELAY_REDAHR7, 15 .EQU EPWM12_HRDELAY_REDAHR6, 14 .EQU EPWM12_HRDELAY_REDAHR5, 13 .EQU EPWM12_HRDELAY_REDAHR4, 12 .EQU EPWM12_HRDELAY_REDAHR3, 11 .EQU EPWM12_HRDELAY_REDAHR2, 10 .EQU EPWM12_HRDELAY_REDAHR1, 9 .EQU EPWM12_HRDELAY_REDAHR0, 8 .EQU EPWM12_HRDELAY_FEDAHR7, 7 .EQU EPWM12_HRDELAY_FEDAHR6, 6 .EQU EPWM12_HRDELAY_FEDAHR5, 5 .EQU EPWM12_HRDELAY_FEDAHR4, 4 .EQU EPWM12_HRDELAY_FEDAHR3, 3 .EQU EPWM12_HRDELAY_FEDAHR2, 2 .EQU EPWM12_HRDELAY_FEDAHR1, 1 .EQU EPWM12_HRDELAY_FEDAHR0, 0 // register------------------------------------- .EQU T12_CTL2, 0x40000484 // 0x4000 0484 T12_CTL2 Bits------------------------------------- .EQU T12_CTL2_LPHSEN, 24 .EQU T12_CTL2_CAPMOD, 23 .EQU T12_CTL2_CAPUF, 22 .EQU T12_CTL2_HRCFGUF, 21 .EQU T12_CTL2_HRPHSUF, 20 .EQU T12_CTL2_HRDBUF, 19 .EQU T12_CTL2_DBTUF, 18 .EQU T12_CTL2_HRPBUF, 17 .EQU T12_CTL2_HRPAUF, 16 .EQU T12_CTL2_EBFUF, 15 .EQU T12_CTL2_EAFUF, 14 .EQU T12_CTL2_PRFUF, 13 .EQU T12_CTL2_PPFUF, 12 .EQU T12_CTL2_CMDFUF, 11 .EQU T12_CTL2_CMCFUF, 10 .EQU T12_CTL2_CMBFUF, 9 .EQU T12_CTL2_CMAFUF, 8 .EQU T12_CTL2_TRGIOS, 7 .EQU T12_CTL2_SYNCIOS, 6 .EQU T12_CTL2_DUDBSEL, 5 .EQU T12_CTL2_DUDBEN, 4 .EQU T12_CTL2_BWINDTSEL, 3 .EQU T12_CTL2_BWINDPOL, 2 .EQU T12_CTL2_BWINDEN, 1 .EQU T12_CTL2_SWCLRPF, 0 // register------------------------------------- .EQU EPWM12_BWCFG, 0x40000488 // 0x4000 0488 EPWM12_BWCFG Bits------------------------------------- .EQU EPWM12_BWCFG_BWOFFSET15, 31 .EQU EPWM12_BWCFG_BWOFFSET14, 30 .EQU EPWM12_BWCFG_BWOFFSET13, 29 .EQU EPWM12_BWCFG_BWOFFSET12, 28 .EQU EPWM12_BWCFG_BWOFFSET11, 27 .EQU EPWM12_BWCFG_BWOFFSET10, 26 .EQU EPWM12_BWCFG_BWOFFSET9, 25 .EQU EPWM12_BWCFG_BWOFFSET8, 24 .EQU EPWM12_BWCFG_BWOFFSET7, 23 .EQU EPWM12_BWCFG_BWOFFSET6, 22 .EQU EPWM12_BWCFG_BWOFFSET5, 21 .EQU EPWM12_BWCFG_BWOFFSET4, 20 .EQU EPWM12_BWCFG_BWOFFSET3, 19 .EQU EPWM12_BWCFG_BWOFFSET2, 18 .EQU EPWM12_BWCFG_BWOFFSET1, 17 .EQU EPWM12_BWCFG_BWOFFSET0, 16 .EQU EPWM12_BWCFG_BWIDTH15, 15 .EQU EPWM12_BWCFG_BWIDTH14, 14 .EQU EPWM12_BWCFG_BWIDTH13, 13 .EQU EPWM12_BWCFG_BWIDTH12, 12 .EQU EPWM12_BWCFG_BWIDTH11, 11 .EQU EPWM12_BWCFG_BWIDTH10, 10 .EQU EPWM12_BWCFG_BWIDTH9, 9 .EQU EPWM12_BWCFG_BWIDTH8, 8 .EQU EPWM12_BWCFG_BWIDTH7, 7 .EQU EPWM12_BWCFG_BWIDTH6, 6 .EQU EPWM12_BWCFG_BWIDTH5, 5 .EQU EPWM12_BWCFG_BWIDTH4, 4 .EQU EPWM12_BWCFG_BWIDTH3, 3 .EQU EPWM12_BWCFG_BWIDTH2, 2 .EQU EPWM12_BWCFG_BWIDTH1, 1 .EQU EPWM12_BWCFG_BWIDTH0, 0 // register------------------------------------- .EQU EPWM12_BWCNT, 0x4000048C // 0x4000 048C EPWM12_BWCNT Bits------------------------------------- .EQU EPWM12_BWCNT_WITCNT15, 31 .EQU EPWM12_BWCNT_WITCNT14, 30 .EQU EPWM12_BWCNT_WITCNT13, 29 .EQU EPWM12_BWCNT_WITCNT12, 28 .EQU EPWM12_BWCNT_WITCNT11, 27 .EQU EPWM12_BWCNT_WITCNT10, 26 .EQU EPWM12_BWCNT_WITCNT9, 25 .EQU EPWM12_BWCNT_WITCNT8, 24 .EQU EPWM12_BWCNT_WITCNT7, 23 .EQU EPWM12_BWCNT_WITCNT6, 22 .EQU EPWM12_BWCNT_WITCNT5, 21 .EQU EPWM12_BWCNT_WITCNT4, 20 .EQU EPWM12_BWCNT_WITCNT3, 19 .EQU EPWM12_BWCNT_WITCNT2, 18 .EQU EPWM12_BWCNT_WITCNT1, 17 .EQU EPWM12_BWCNT_WITCNT0, 16 .EQU EPWM12_BWCNT_OFFCNT15, 15 .EQU EPWM12_BWCNT_OFFCNT14, 14 .EQU EPWM12_BWCNT_OFFCNT13, 13 .EQU EPWM12_BWCNT_OFFCNT12, 12 .EQU EPWM12_BWCNT_OFFCNT11, 11 .EQU EPWM12_BWCNT_OFFCNT10, 10 .EQU EPWM12_BWCNT_OFFCNT9, 9 .EQU EPWM12_BWCNT_OFFCNT8, 8 .EQU EPWM12_BWCNT_OFFCNT7, 7 .EQU EPWM12_BWCNT_OFFCNT6, 6 .EQU EPWM12_BWCNT_OFFCNT5, 5 .EQU EPWM12_BWCNT_OFFCNT4, 4 .EQU EPWM12_BWCNT_OFFCNT3, 3 .EQU EPWM12_BWCNT_OFFCNT2, 2 .EQU EPWM12_BWCNT_OFFCNT1, 1 .EQU EPWM12_BWCNT_OFFCNT0, 0 // register------------------------------------- .EQU EPWM12_ETCTL2, 0x40000490 // 0x4000 0490 EPWM12_ETCTL2 Bits------------------------------------- .EQU EPWM12_ETCTL2_BT3, 26 .EQU EPWM12_ETCTL2_BT2, 25 .EQU EPWM12_ETCTL2_BT1, 24 .EQU EPWM12_ETCTL2_BT0, 23 .EQU EPWM12_ETCTL2_BPP3, 22 .EQU EPWM12_ETCTL2_BPP2, 21 .EQU EPWM12_ETCTL2_BPP1, 20 .EQU EPWM12_ETCTL2_BPP0, 19 .EQU EPWM12_ETCTL2_SELB2, 18 .EQU EPWM12_ETCTL2_SELB1, 17 .EQU EPWM12_ETCTL2_SELB0, 16 .EQU EPWM12_ETCTL2_AT3, 10 .EQU EPWM12_ETCTL2_AT2, 9 .EQU EPWM12_ETCTL2_AT1, 8 .EQU EPWM12_ETCTL2_AT0, 7 .EQU EPWM12_ETCTL2_APP3, 6 .EQU EPWM12_ETCTL2_APP2, 5 .EQU EPWM12_ETCTL2_APP1, 4 .EQU EPWM12_ETCTL2_APP0, 3 .EQU EPWM12_ETCTL2_SELA2, 2 .EQU EPWM12_ETCTL2_SELA1, 1 .EQU EPWM12_ETCTL2_SELA0, 0 // register------------------------------------- .EQU EPWM12_GLDCTL, 0x40000494 // 0x4000 0494 EPWM12_GLDCTL Bits------------------------------------- .EQU EPWM12_GLDCTL_HRCFGUDSEL1, 22 .EQU EPWM12_GLDCTL_HRCFGUDSEL0, 21 .EQU EPWM12_GLDCTL_HRCFGUDEN, 20 .EQU EPWM12_GLDCTL_HRPHSUDSEL1, 19 .EQU EPWM12_GLDCTL_HRPHSUDSEL0, 18 .EQU EPWM12_GLDCTL_HRPHSUDEN, 17 .EQU EPWM12_GLDCTL_HRDBUDSEL1, 16 .EQU EPWM12_GLDCTL_HRDBUDSEL0, 15 .EQU EPWM12_GLDCTL_HRDBUDEN, 14 .EQU EPWM12_GLDCTL_DBUDSEL1, 13 .EQU EPWM12_GLDCTL_DBUDSEL0, 12 .EQU EPWM12_GLDCTL_DBUDEN, 11 .EQU EPWM12_GLDCTL_HRPBUDSEL1, 10 .EQU EPWM12_GLDCTL_HRPBUDSEL0, 9 .EQU EPWM12_GLDCTL_HRPBUDEN, 8 .EQU EPWM12_GLDCTL_CLDPRCS7, 7 .EQU EPWM12_GLDCTL_CLDPRCS6, 6 .EQU EPWM12_GLDCTL_CLDPRCS5, 5 .EQU EPWM12_GLDCTL_CLDPRCS4, 4 .EQU EPWM12_GLDCTL_CLDPRCS3, 3 .EQU EPWM12_GLDCTL_CLDPRCS2, 2 .EQU EPWM12_GLDCTL_CLDPRCS1, 1 .EQU EPWM12_GLDCTL_CLDPRCS0, 0 // register------------------------------------- .EQU EPWM12_FILTCTL, 0x40000498 // 0x4000 0498 EPWM12_FILTCTL Bits------------------------------------- .EQU EPWM12_FILTCTL_SYDELAY2, 23 .EQU EPWM12_FILTCTL_SYDELAY1, 22 .EQU EPWM12_FILTCTL_SYDELAY0, 21 .EQU EPWM12_FILTCTL_SYFDIV3, 20 .EQU EPWM12_FILTCTL_SYFDIV2, 19 .EQU EPWM12_FILTCTL_SYFDIV1, 18 .EQU EPWM12_FILTCTL_SYFDIV0, 17 .EQU EPWM12_FILTCTL_SYNCFEN, 16 .EQU EPWM12_FILTCTL_TCKDELAY2, 15 .EQU EPWM12_FILTCTL_TCKDELAY1, 14 .EQU EPWM12_FILTCTL_TCKDELAY0, 13 .EQU EPWM12_FILTCTL_TCKFDIV3, 12 .EQU EPWM12_FILTCTL_TCKFDIV2, 11 .EQU EPWM12_FILTCTL_TCKFDIV1, 10 .EQU EPWM12_FILTCTL_TCKFDIV0, 9 .EQU EPWM12_FILTCTL_TXCKFEN, 8 .EQU EPWM12_FILTCTL_CFDELAY2, 7 .EQU EPWM12_FILTCTL_CFDELAY1, 6 .EQU EPWM12_FILTCTL_CFDELAY0, 5 .EQU EPWM12_FILTCTL_CFDIV3, 4 .EQU EPWM12_FILTCTL_CFDIV2, 3 .EQU EPWM12_FILTCTL_CFDIV1, 2 .EQU EPWM12_FILTCTL_CFDIV0, 1 .EQU EPWM12_FILTCTL_CAPFEN, 0 // register------------------------------------- .EQU QEI0_CTL0, 0x40000500 // 0x4000 0500 QEI0_CTL0 Bits------------------------------------- .EQU QEI0_CTL0_LPCLK, 11 .EQU QEI0_CTL0_TXIF, 10 .EQU QEI0_CTL0_PHEIF, 9 .EQU QEI0_CTL0_CNTERRIF, 8 .EQU QEI0_CTL0_QEIMOD2, 7 .EQU QEI0_CTL0_QEIMOD1, 6 .EQU QEI0_CTL0_QEIMOD0, 5 .EQU QEI0_CTL0_INDRES, 4 .EQU QEI0_CTL0_TXCS, 3 .EQU QEI0_CTL0_INDEX, 2 .EQU QEI0_CTL0_TXDIROUT, 1 .EQU QEI0_CTL0_TXDIR, 0 // register------------------------------------- .EQU QEI0_CTL1, 0x40000504 // 0x4000 0504 QEI0_CTL1 Bits------------------------------------- .EQU QEI0_CTL1_PHFSEL3, 12 .EQU QEI0_CTL1_PHFSEL2, 11 .EQU QEI0_CTL1_PHFSEL1, 10 .EQU QEI0_CTL1_PHFSEL0, 9 .EQU QEI0_CTL1_PHDFEN, 8 .EQU QEI0_CTL1_MODEN, 7 .EQU QEI0_CTL1_QEICLK1, 6 .EQU QEI0_CTL1_QEICLK0, 5 .EQU QEI0_CTL1_QEIOUT, 4 .EQU QEI0_CTL1_QEICK2, 3 .EQU QEI0_CTL1_QEICK1, 2 .EQU QEI0_CTL1_QEICK0, 1 .EQU QEI0_CTL1_SWPAB, 0 // register------------------------------------- .EQU T7_CNT, 0x40000508 // 0x4000 0508 T7_CNT Bits------------------------------------- .EQU T7_CNT_TXCNT15, 15 .EQU T7_CNT_TXCNT14, 14 .EQU T7_CNT_TXCNT13, 13 .EQU T7_CNT_TXCNT12, 12 .EQU T7_CNT_TXCNT11, 11 .EQU T7_CNT_TXCNT10, 10 .EQU T7_CNT_TXCNT9, 9 .EQU T7_CNT_TXCNT8, 8 .EQU T7_CNT_TXCNT7, 7 .EQU T7_CNT_TXCNT6, 6 .EQU T7_CNT_TXCNT5, 5 .EQU T7_CNT_TXCNT4, 4 .EQU T7_CNT_TXCNT3, 3 .EQU T7_CNT_TXCNT2, 2 .EQU T7_CNT_TXCNT1, 1 .EQU T7_CNT_TXCNT0, 0 // register------------------------------------- .EQU T7_PPX, 0x4000050C // 0x4000 050C T7_PPX Bits------------------------------------- .EQU T7_PPX_PPX15, 15 .EQU T7_PPX_PPX14, 14 .EQU T7_PPX_PPX13, 13 .EQU T7_PPX_PPX12, 12 .EQU T7_PPX_PPX11, 11 .EQU T7_PPX_PPX10, 10 .EQU T7_PPX_PPX9, 9 .EQU T7_PPX_PPX8, 8 .EQU T7_PPX_PPX7, 7 .EQU T7_PPX_PPX6, 6 .EQU T7_PPX_PPX5, 5 .EQU T7_PPX_PPX4, 4 .EQU T7_PPX_PPX3, 3 .EQU T7_PPX_PPX2, 2 .EQU T7_PPX_PPX1, 1 .EQU T7_PPX_PPX0, 0 // register------------------------------------- .EQU T7_PRSC, 0x40000510 // 0x4000 0510 T7_PRSC Bits------------------------------------- .EQU T7_PRSC_TXPRSC15, 15 .EQU T7_PRSC_TXPRSC14, 14 .EQU T7_PRSC_TXPRSC13, 13 .EQU T7_PRSC_TXPRSC12, 12 .EQU T7_PRSC_TXPRSC11, 11 .EQU T7_PRSC_TXPRSC10, 10 .EQU T7_PRSC_TXPRSC9, 9 .EQU T7_PRSC_TXPRSC8, 8 .EQU T7_PRSC_TXPRSC7, 7 .EQU T7_PRSC_TXPRSC6, 6 .EQU T7_PRSC_TXPRSC5, 5 .EQU T7_PRSC_TXPRSC4, 4 .EQU T7_PRSC_TXPRSC3, 3 .EQU T7_PRSC_TXPRSC2, 2 .EQU T7_PRSC_TXPRSC1, 1 .EQU T7_PRSC_TXPRSC0, 0 // register------------------------------------- .EQU QEI0_DIER, 0x40000514 // 0x4000 0514 QEI0_DIER Bits------------------------------------- .EQU QEI0_DIER_TXIC, 5 .EQU QEI0_DIER_PHEIC, 4 .EQU QEI0_DIER_CNTERRIC, 3 .EQU QEI0_DIER_TXIE, 2 .EQU QEI0_DIER_PHEIE, 1 .EQU QEI0_DIER_CNTERRIE, 0 // register------------------------------------- .EQU ADC0_CTL0, 0x40000580 // 0x4000 0580 ADC0_CTL0 Bits------------------------------------- .EQU ADC0_CTL0_WDSCH, 31 .EQU ADC0_CTL0_HPWDEN, 30 .EQU ADC0_CTL0_WDEN, 29 .EQU ADC0_CTL0_DSNUM2, 28 .EQU ADC0_CTL0_DSNUM1, 27 .EQU ADC0_CTL0_DSNUM0, 26 .EQU ADC0_CTL0_HP3DMAEN, 25 .EQU ADC0_CTL0_HP2DMAEN, 24 .EQU ADC0_CTL0_HP1DMAEN, 23 .EQU ADC0_CTL0_HP0DMAEN, 22 .EQU ADC0_CTL0_HPDSEN, 21 .EQU ADC0_CTL0_DSEN, 20 .EQU ADC0_CTL0_HPAUTO, 19 .EQU ADC0_CTL0_CONT, 18 .EQU ADC0_CTL0_SCANEN, 17 .EQU ADC0_CTL0_BOSSSELCOMP, 16 .EQU ADC0_CTL0_BOSSSEL, 15 .EQU ADC0_CTL0_TRIMIBIAS, 14 .EQU ADC0_CTL0_NDMAEN, 13 .EQU ADC0_CTL0_ADCCLKS2, 10 .EQU ADC0_CTL0_ADCCLKS1, 9 .EQU ADC0_CTL0_ADCCLKS0, 8 .EQU ADC0_CTL0_LR, 3 .EQU ADC0_CTL0_CLKS1, 2 .EQU ADC0_CTL0_CLKS0, 1 .EQU ADC0_CTL0_EN, 0 // register------------------------------------- .EQU ADC0_CTL1, 0x40000584 // 0x4000 0584 ADC0_CTL1 Bits------------------------------------- .EQU ADC0_CTL1_DOUMOD3, 31 .EQU ADC0_CTL1_DOUMOD2, 30 .EQU ADC0_CTL1_DOUMOD1, 29 .EQU ADC0_CTL1_DOUMOD0, 28 .EQU ADC0_CTL1_HPEXTEN, 27 .EQU ADC0_CTL1_HCH6, 26 .EQU ADC0_CTL1_HCH5, 25 .EQU ADC0_CTL1_HCH4, 24 .EQU ADC0_CTL1_HCH3, 23 .EQU ADC0_CTL1_HCH2, 22 .EQU ADC0_CTL1_HCH1, 21 .EQU ADC0_CTL1_HCH0, 20 .EQU ADC0_CTL1_REF2, 19 .EQU ADC0_CTL1_REF1, 18 .EQU ADC0_CTL1_REF0, 17 .EQU ADC0_CTL1_EXTEN, 11 .EQU ADC0_CTL1_NCH6, 10 .EQU ADC0_CTL1_NCH5, 9 .EQU ADC0_CTL1_NCH4, 8 .EQU ADC0_CTL1_NCH3, 7 .EQU ADC0_CTL1_NCH2, 6 .EQU ADC0_CTL1_NCH1, 5 .EQU ADC0_CTL1_NCH0, 4 .EQU ADC0_CTL1_HPSTART, 3 .EQU ADC0_CTL1_START, 2 // register------------------------------------- .EQU ADC0_SCANSQ0, 0x40000588 // 0x4000 0588 ADC0_SCANSQ0 Bits------------------------------------- .EQU ADC0_SCANSQ0_SSQ3_7, 31 .EQU ADC0_SCANSQ0_SSQ3_6, 30 .EQU ADC0_SCANSQ0_SSQ3_5, 29 .EQU ADC0_SCANSQ0_SSQ3_4, 28 .EQU ADC0_SCANSQ0_SSQ3_3, 27 .EQU ADC0_SCANSQ0_SSQ3_2, 26 .EQU ADC0_SCANSQ0_SSQ3_1, 25 .EQU ADC0_SCANSQ0_SSQ3_0, 24 .EQU ADC0_SCANSQ0_SSQ2_7, 23 .EQU ADC0_SCANSQ0_SSQ2_6, 22 .EQU ADC0_SCANSQ0_SSQ2_5, 21 .EQU ADC0_SCANSQ0_SSQ2_4, 20 .EQU ADC0_SCANSQ0_SSQ2_3, 19 .EQU ADC0_SCANSQ0_SSQ2_2, 18 .EQU ADC0_SCANSQ0_SSQ2_1, 17 .EQU ADC0_SCANSQ0_SSQ2_0, 16 .EQU ADC0_SCANSQ0_SSQ1_7, 15 .EQU ADC0_SCANSQ0_SSQ1_6, 14 .EQU ADC0_SCANSQ0_SSQ1_5, 13 .EQU ADC0_SCANSQ0_SSQ1_4, 12 .EQU ADC0_SCANSQ0_SSQ1_3, 11 .EQU ADC0_SCANSQ0_SSQ1_2, 10 .EQU ADC0_SCANSQ0_SSQ1_1, 9 .EQU ADC0_SCANSQ0_SSQ1_0, 8 .EQU ADC0_SCANSQ0_SSQ0_7, 7 .EQU ADC0_SCANSQ0_SSQ0_6, 6 .EQU ADC0_SCANSQ0_SSQ0_5, 5 .EQU ADC0_SCANSQ0_SSQ0_4, 4 .EQU ADC0_SCANSQ0_SSQ0_3, 3 .EQU ADC0_SCANSQ0_SSQ0_2, 2 .EQU ADC0_SCANSQ0_SSQ0_1, 1 .EQU ADC0_SCANSQ0_SSQ0_0, 0 // register------------------------------------- .EQU ADC0_SCANSQ1, 0x4000058C // 0x4000 058C ADC0_SCANSQ1 Bits------------------------------------- .EQU ADC0_SCANSQ1_SSQ7_7, 31 .EQU ADC0_SCANSQ1_SSQ7_6, 30 .EQU ADC0_SCANSQ1_SSQ7_5, 29 .EQU ADC0_SCANSQ1_SSQ7_4, 28 .EQU ADC0_SCANSQ1_SSQ7_3, 27 .EQU ADC0_SCANSQ1_SSQ7_2, 26 .EQU ADC0_SCANSQ1_SSQ7_1, 25 .EQU ADC0_SCANSQ1_SSQ7_0, 24 .EQU ADC0_SCANSQ1_SSQ6_7, 23 .EQU ADC0_SCANSQ1_SSQ6_6, 22 .EQU ADC0_SCANSQ1_SSQ6_5, 21 .EQU ADC0_SCANSQ1_SSQ6_4, 20 .EQU ADC0_SCANSQ1_SSQ6_3, 19 .EQU ADC0_SCANSQ1_SSQ6_2, 18 .EQU ADC0_SCANSQ1_SSQ6_1, 17 .EQU ADC0_SCANSQ1_SSQ6_0, 16 .EQU ADC0_SCANSQ1_SSQ5_7, 15 .EQU ADC0_SCANSQ1_SSQ5_6, 14 .EQU ADC0_SCANSQ1_SSQ5_5, 13 .EQU ADC0_SCANSQ1_SSQ5_4, 12 .EQU ADC0_SCANSQ1_SSQ5_3, 11 .EQU ADC0_SCANSQ1_SSQ5_2, 10 .EQU ADC0_SCANSQ1_SSQ5_1, 9 .EQU ADC0_SCANSQ1_SSQ5_0, 8 .EQU ADC0_SCANSQ1_SSQ4_7, 7 .EQU ADC0_SCANSQ1_SSQ4_6, 6 .EQU ADC0_SCANSQ1_SSQ4_5, 5 .EQU ADC0_SCANSQ1_SSQ4_4, 4 .EQU ADC0_SCANSQ1_SSQ4_3, 3 .EQU ADC0_SCANSQ1_SSQ4_2, 2 .EQU ADC0_SCANSQ1_SSQ4_1, 1 .EQU ADC0_SCANSQ1_SSQ4_0, 0 // register------------------------------------- .EQU ADC0_SCANSQ2, 0x40000590 // 0x4000 0590 ADC0_SCANSQ2 Bits------------------------------------- .EQU ADC0_SCANSQ2_SSQ11_7, 31 .EQU ADC0_SCANSQ2_SSQ11_6, 30 .EQU ADC0_SCANSQ2_SSQ11_5, 29 .EQU ADC0_SCANSQ2_SSQ11_4, 28 .EQU ADC0_SCANSQ2_SSQ11_3, 27 .EQU ADC0_SCANSQ2_SSQ11_2, 26 .EQU ADC0_SCANSQ2_SSQ11_1, 25 .EQU ADC0_SCANSQ2_SSQ11_0, 24 .EQU ADC0_SCANSQ2_SSQ10_7, 23 .EQU ADC0_SCANSQ2_SSQ10_6, 22 .EQU ADC0_SCANSQ2_SSQ10_5, 21 .EQU ADC0_SCANSQ2_SSQ10_4, 20 .EQU ADC0_SCANSQ2_SSQ10_3, 19 .EQU ADC0_SCANSQ2_SSQ10_2, 18 .EQU ADC0_SCANSQ2_SSQ10_1, 17 .EQU ADC0_SCANSQ2_SSQ10_0, 16 .EQU ADC0_SCANSQ2_SSQ9_7, 15 .EQU ADC0_SCANSQ2_SSQ9_6, 14 .EQU ADC0_SCANSQ2_SSQ9_5, 13 .EQU ADC0_SCANSQ2_SSQ9_4, 12 .EQU ADC0_SCANSQ2_SSQ9_3, 11 .EQU ADC0_SCANSQ2_SSQ9_2, 10 .EQU ADC0_SCANSQ2_SSQ9_1, 9 .EQU ADC0_SCANSQ2_SSQ9_0, 8 .EQU ADC0_SCANSQ2_SSQ8_7, 7 .EQU ADC0_SCANSQ2_SSQ8_6, 6 .EQU ADC0_SCANSQ2_SSQ8_5, 5 .EQU ADC0_SCANSQ2_SSQ8_4, 4 .EQU ADC0_SCANSQ2_SSQ8_3, 3 .EQU ADC0_SCANSQ2_SSQ8_2, 2 .EQU ADC0_SCANSQ2_SSQ8_1, 1 .EQU ADC0_SCANSQ2_SSQ8_0, 0 // register------------------------------------- .EQU ADC0_SCANSQ3, 0x400005C4 // 0x4000 05C4 ADC0_SCANSQ3 Bits------------------------------------- .EQU ADC0_SCANSQ3_SSQ15_7, 31 .EQU ADC0_SCANSQ3_SSQ15_6, 30 .EQU ADC0_SCANSQ3_SSQ15_5, 29 .EQU ADC0_SCANSQ3_SSQ15_4, 28 .EQU ADC0_SCANSQ3_SSQ15_3, 27 .EQU ADC0_SCANSQ3_SSQ15_2, 26 .EQU ADC0_SCANSQ3_SSQ15_1, 25 .EQU ADC0_SCANSQ3_SSQ15_0, 24 .EQU ADC0_SCANSQ3_SSQ14_7, 23 .EQU ADC0_SCANSQ3_SSQ14_6, 22 .EQU ADC0_SCANSQ3_SSQ14_5, 21 .EQU ADC0_SCANSQ3_SSQ14_4, 20 .EQU ADC0_SCANSQ3_SSQ14_3, 19 .EQU ADC0_SCANSQ3_SSQ14_2, 18 .EQU ADC0_SCANSQ3_SSQ14_1, 17 .EQU ADC0_SCANSQ3_SSQ14_0, 16 .EQU ADC0_SCANSQ3_SSQ13_7, 15 .EQU ADC0_SCANSQ3_SSQ13_6, 14 .EQU ADC0_SCANSQ3_SSQ13_5, 13 .EQU ADC0_SCANSQ3_SSQ13_4, 12 .EQU ADC0_SCANSQ3_SSQ13_3, 11 .EQU ADC0_SCANSQ3_SSQ13_2, 10 .EQU ADC0_SCANSQ3_SSQ13_1, 9 .EQU ADC0_SCANSQ3_SSQ13_0, 8 .EQU ADC0_SCANSQ3_SSQ12_7, 7 .EQU ADC0_SCANSQ3_SSQ12_6, 6 .EQU ADC0_SCANSQ3_SSQ12_5, 5 .EQU ADC0_SCANSQ3_SSQ12_4, 4 .EQU ADC0_SCANSQ3_SSQ12_3, 3 .EQU ADC0_SCANSQ3_SSQ12_2, 2 .EQU ADC0_SCANSQ3_SSQ12_1, 1 .EQU ADC0_SCANSQ3_SSQ12_0, 0 // register------------------------------------- .EQU ADC0_HSCANSQ, 0x40000594 // 0x4000 0594 ADC0_HSCANSQ Bits------------------------------------- .EQU ADC0_HSCANSQ_HSSQ3_7, 31 .EQU ADC0_HSCANSQ_HSSQ3_6, 30 .EQU ADC0_HSCANSQ_HSSQ3_5, 29 .EQU ADC0_HSCANSQ_HSSQ3_4, 28 .EQU ADC0_HSCANSQ_HSSQ3_3, 27 .EQU ADC0_HSCANSQ_HSSQ3_2, 26 .EQU ADC0_HSCANSQ_HSSQ3_1, 25 .EQU ADC0_HSCANSQ_HSSQ3_0, 24 .EQU ADC0_HSCANSQ_HSSQ2_7, 23 .EQU ADC0_HSCANSQ_HSSQ2_6, 22 .EQU ADC0_HSCANSQ_HSSQ2_5, 21 .EQU ADC0_HSCANSQ_HSSQ2_4, 20 .EQU ADC0_HSCANSQ_HSSQ2_3, 19 .EQU ADC0_HSCANSQ_HSSQ2_2, 18 .EQU ADC0_HSCANSQ_HSSQ2_1, 17 .EQU ADC0_HSCANSQ_HSSQ2_0, 16 .EQU ADC0_HSCANSQ_HSSQ1_7, 15 .EQU ADC0_HSCANSQ_HSSQ1_6, 14 .EQU ADC0_HSCANSQ_HSSQ1_5, 13 .EQU ADC0_HSCANSQ_HSSQ1_4, 12 .EQU ADC0_HSCANSQ_HSSQ1_3, 11 .EQU ADC0_HSCANSQ_HSSQ1_2, 10 .EQU ADC0_HSCANSQ_HSSQ1_1, 9 .EQU ADC0_HSCANSQ_HSSQ1_0, 8 .EQU ADC0_HSCANSQ_HSSQ0_7, 7 .EQU ADC0_HSCANSQ_HSSQ0_6, 6 .EQU ADC0_HSCANSQ_HSSQ0_5, 5 .EQU ADC0_HSCANSQ_HSSQ0_4, 4 .EQU ADC0_HSCANSQ_HSSQ0_3, 3 .EQU ADC0_HSCANSQ_HSSQ0_2, 2 .EQU ADC0_HSCANSQ_HSSQ0_1, 1 .EQU ADC0_HSCANSQ_HSSQ0_0, 0 // register------------------------------------- .EQU ADC0_WDH, 0x40000598 // 0x4000 0598 ADC0_WDH Bits------------------------------------- .EQU ADC0_WDH_WDH11, 11 .EQU ADC0_WDH_WDH10, 10 .EQU ADC0_WDH_WDH9, 9 .EQU ADC0_WDH_WDH8, 8 .EQU ADC0_WDH_WDH7, 7 .EQU ADC0_WDH_WDH6, 6 .EQU ADC0_WDH_WDH5, 5 .EQU ADC0_WDH_WDH4, 4 .EQU ADC0_WDH_WDH3, 3 .EQU ADC0_WDH_WDH2, 2 .EQU ADC0_WDH_WDH1, 1 .EQU ADC0_WDH_WDH0, 0 // register------------------------------------- .EQU ADC0_WDL, 0x4000059C // 0x4000 059C ADC0_WDL Bits------------------------------------- .EQU ADC0_WDL_WDL11, 11 .EQU ADC0_WDL_WDL10, 10 .EQU ADC0_WDL_WDL9, 9 .EQU ADC0_WDL_WDL8, 8 .EQU ADC0_WDL_WDL7, 7 .EQU ADC0_WDL_WDL6, 6 .EQU ADC0_WDL_WDL5, 5 .EQU ADC0_WDL_WDL4, 4 .EQU ADC0_WDL_WDL3, 3 .EQU ADC0_WDL_WDL2, 2 .EQU ADC0_WDL_WDL1, 1 .EQU ADC0_WDL_WDL0, 0 // register------------------------------------- .EQU ADC0_DATA, 0x400005A0 // 0x4000 05A0 ADC0_DATA Bits------------------------------------- .EQU ADC0_DATA_DATA15, 15 .EQU ADC0_DATA_DATA14, 14 .EQU ADC0_DATA_DATA13, 13 .EQU ADC0_DATA_DATA12, 12 .EQU ADC0_DATA_DATA11, 11 .EQU ADC0_DATA_DATA10, 10 .EQU ADC0_DATA_DATA9, 9 .EQU ADC0_DATA_DATA8, 8 .EQU ADC0_DATA_DATA7, 7 .EQU ADC0_DATA_DATA6, 6 .EQU ADC0_DATA_DATA5, 5 .EQU ADC0_DATA_DATA4, 4 .EQU ADC0_DATA_DATA3, 3 .EQU ADC0_DATA_DATA2, 2 .EQU ADC0_DATA_DATA1, 1 .EQU ADC0_DATA_DATA0, 0 // register------------------------------------- .EQU ADC0_HPDATA0, 0x400005A4 // 0x4000 05A4 ADC0_HPDATA0 Bits------------------------------------- .EQU ADC0_HPDATA0_HPDATA15, 15 .EQU ADC0_HPDATA0_HPDATA14, 14 .EQU ADC0_HPDATA0_HPDATA13, 13 .EQU ADC0_HPDATA0_HPDATA12, 12 .EQU ADC0_HPDATA0_HPDATA11, 11 .EQU ADC0_HPDATA0_HPDATA10, 10 .EQU ADC0_HPDATA0_HPDATA9, 9 .EQU ADC0_HPDATA0_HPDATA8, 8 .EQU ADC0_HPDATA0_HPDATA7, 7 .EQU ADC0_HPDATA0_HPDATA6, 6 .EQU ADC0_HPDATA0_HPDATA5, 5 .EQU ADC0_HPDATA0_HPDATA4, 4 .EQU ADC0_HPDATA0_HPDATA3, 3 .EQU ADC0_HPDATA0_HPDATA2, 2 .EQU ADC0_HPDATA0_HPDATA1, 1 .EQU ADC0_HPDATA0_HPDATA0, 0 // register------------------------------------- .EQU ADC0_HPDATA1, 0x400005A8 // 0x4000 05A8 ADC0_HPDATA1 Bits------------------------------------- .EQU ADC0_HPDATA1_HPDATA15, 15 .EQU ADC0_HPDATA1_HPDATA14, 14 .EQU ADC0_HPDATA1_HPDATA13, 13 .EQU ADC0_HPDATA1_HPDATA12, 12 .EQU ADC0_HPDATA1_HPDATA11, 11 .EQU ADC0_HPDATA1_HPDATA10, 10 .EQU ADC0_HPDATA1_HPDATA9, 9 .EQU ADC0_HPDATA1_HPDATA8, 8 .EQU ADC0_HPDATA1_HPDATA7, 7 .EQU ADC0_HPDATA1_HPDATA6, 6 .EQU ADC0_HPDATA1_HPDATA5, 5 .EQU ADC0_HPDATA1_HPDATA4, 4 .EQU ADC0_HPDATA1_HPDATA3, 3 .EQU ADC0_HPDATA1_HPDATA2, 2 .EQU ADC0_HPDATA1_HPDATA1, 1 .EQU ADC0_HPDATA1_HPDATA0, 0 // register------------------------------------- .EQU ADC0_HPDATA2, 0x400005AC // 0x4000 05AC ADC0_HPDATA2 Bits------------------------------------- .EQU ADC0_HPDATA2_HPDATA15, 15 .EQU ADC0_HPDATA2_HPDATA14, 14 .EQU ADC0_HPDATA2_HPDATA13, 13 .EQU ADC0_HPDATA2_HPDATA12, 12 .EQU ADC0_HPDATA2_HPDATA11, 11 .EQU ADC0_HPDATA2_HPDATA10, 10 .EQU ADC0_HPDATA2_HPDATA9, 9 .EQU ADC0_HPDATA2_HPDATA8, 8 .EQU ADC0_HPDATA2_HPDATA7, 7 .EQU ADC0_HPDATA2_HPDATA6, 6 .EQU ADC0_HPDATA2_HPDATA5, 5 .EQU ADC0_HPDATA2_HPDATA4, 4 .EQU ADC0_HPDATA2_HPDATA3, 3 .EQU ADC0_HPDATA2_HPDATA2, 2 .EQU ADC0_HPDATA2_HPDATA1, 1 .EQU ADC0_HPDATA2_HPDATA0, 0 // register------------------------------------- .EQU ADC0_HPDATA3, 0x400005B0 // 0x4000 05B0 ADC0_HPDATA3 Bits------------------------------------- .EQU ADC0_HPDATA3_HPDATA15, 15 .EQU ADC0_HPDATA3_HPDATA14, 14 .EQU ADC0_HPDATA3_HPDATA13, 13 .EQU ADC0_HPDATA3_HPDATA12, 12 .EQU ADC0_HPDATA3_HPDATA11, 11 .EQU ADC0_HPDATA3_HPDATA10, 10 .EQU ADC0_HPDATA3_HPDATA9, 9 .EQU ADC0_HPDATA3_HPDATA8, 8 .EQU ADC0_HPDATA3_HPDATA7, 7 .EQU ADC0_HPDATA3_HPDATA6, 6 .EQU ADC0_HPDATA3_HPDATA5, 5 .EQU ADC0_HPDATA3_HPDATA4, 4 .EQU ADC0_HPDATA3_HPDATA3, 3 .EQU ADC0_HPDATA3_HPDATA2, 2 .EQU ADC0_HPDATA3_HPDATA1, 1 .EQU ADC0_HPDATA3_HPDATA0, 0 // register------------------------------------- .EQU ADC0_HPOFF0, 0x400005B4 // 0x4000 05B4 ADC0_HPOFF0 Bits------------------------------------- .EQU ADC0_HPOFF0_HPDOFF11, 11 .EQU ADC0_HPOFF0_HPDOFF10, 10 .EQU ADC0_HPOFF0_HPDOFF9, 9 .EQU ADC0_HPOFF0_HPDOFF8, 8 .EQU ADC0_HPOFF0_HPDOFF7, 7 .EQU ADC0_HPOFF0_HPDOFF6, 6 .EQU ADC0_HPOFF0_HPDOFF5, 5 .EQU ADC0_HPOFF0_HPDOFF4, 4 .EQU ADC0_HPOFF0_HPDOFF3, 3 .EQU ADC0_HPOFF0_HPDOFF2, 2 .EQU ADC0_HPOFF0_HPDOFF1, 1 .EQU ADC0_HPOFF0_HPDOFF0, 0 // register------------------------------------- .EQU ADC0_HPOFF1, 0x400005B8 // 0x4000 05B8 ADC0_HPOFF1 Bits------------------------------------- .EQU ADC0_HPOFF1_HPDOFF11, 11 .EQU ADC0_HPOFF1_HPDOFF10, 10 .EQU ADC0_HPOFF1_HPDOFF9, 9 .EQU ADC0_HPOFF1_HPDOFF8, 8 .EQU ADC0_HPOFF1_HPDOFF7, 7 .EQU ADC0_HPOFF1_HPDOFF6, 6 .EQU ADC0_HPOFF1_HPDOFF5, 5 .EQU ADC0_HPOFF1_HPDOFF4, 4 .EQU ADC0_HPOFF1_HPDOFF3, 3 .EQU ADC0_HPOFF1_HPDOFF2, 2 .EQU ADC0_HPOFF1_HPDOFF1, 1 .EQU ADC0_HPOFF1_HPDOFF0, 0 // register------------------------------------- .EQU ADC0_HPOFF2, 0x400005BC // 0x4000 05BC ADC0_HPOFF2 Bits------------------------------------- .EQU ADC0_HPOFF2_HPDOFF11, 11 .EQU ADC0_HPOFF2_HPDOFF10, 10 .EQU ADC0_HPOFF2_HPDOFF9, 9 .EQU ADC0_HPOFF2_HPDOFF8, 8 .EQU ADC0_HPOFF2_HPDOFF7, 7 .EQU ADC0_HPOFF2_HPDOFF6, 6 .EQU ADC0_HPOFF2_HPDOFF5, 5 .EQU ADC0_HPOFF2_HPDOFF4, 4 .EQU ADC0_HPOFF2_HPDOFF3, 3 .EQU ADC0_HPOFF2_HPDOFF2, 2 .EQU ADC0_HPOFF2_HPDOFF1, 1 .EQU ADC0_HPOFF2_HPDOFF0, 0 // register------------------------------------- .EQU ADC0_HPOFF3, 0x400005C0 // 0x4000 05C0 ADC0_HPOFF3 Bits------------------------------------- .EQU ADC0_HPOFF3_HPDOFF11, 11 .EQU ADC0_HPOFF3_HPDOFF10, 10 .EQU ADC0_HPOFF3_HPDOFF9, 9 .EQU ADC0_HPOFF3_HPDOFF8, 8 .EQU ADC0_HPOFF3_HPDOFF7, 7 .EQU ADC0_HPOFF3_HPDOFF6, 6 .EQU ADC0_HPOFF3_HPDOFF5, 5 .EQU ADC0_HPOFF3_HPDOFF4, 4 .EQU ADC0_HPOFF3_HPDOFF3, 3 .EQU ADC0_HPOFF3_HPDOFF2, 2 .EQU ADC0_HPOFF3_HPDOFF1, 1 .EQU ADC0_HPOFF3_HPDOFF0, 0 // register------------------------------------- .EQU ADC0_STATE, 0x400005D0 // 0x4000 05D0 ADC0_STATE Bits------------------------------------- .EQU ADC0_STATE_TRIMERROR1, 31 .EQU ADC0_STATE_TRIMERROR0, 30 .EQU ADC0_STATE_TRIMIBIASOPA, 27 .EQU ADC0_STATE_EOCIE, 13 .EQU ADC0_STATE_EOCIC, 12 .EQU ADC0_STATE_EOCIF, 11 .EQU ADC0_STATE_WDIE, 10 .EQU ADC0_STATE_HPENDIE, 9 .EQU ADC0_STATE_ENDIE, 8 .EQU ADC0_STATE_WDIC, 7 .EQU ADC0_STATE_HPENDIC, 6 .EQU ADC0_STATE_ENDIC, 5 .EQU ADC0_STATE_WDIF, 4 .EQU ADC0_STATE_HPENDIF, 3 .EQU ADC0_STATE_ENDIF, 2 .EQU ADC0_STATE_HPSTARTIF, 1 .EQU ADC0_STATE_STARTIF, 0 // register------------------------------------- .EQU ADC0_DELAY, 0x400005D4 // 0x4000 05D4 ADC0_DELAY Bits------------------------------------- .EQU ADC0_DELAY_FDELAY5, 5 .EQU ADC0_DELAY_FDELAY4, 4 .EQU ADC0_DELAY_FDELAY3, 3 .EQU ADC0_DELAY_FDELAY2, 2 .EQU ADC0_DELAY_FDELAY1, 1 .EQU ADC0_DELAY_FDELAY0, 0 // register------------------------------------- .EQU ADC0_SCANCTL, 0x400005D8 // 0x4000 05D8 ADC0_SCANCTL Bits------------------------------------- .EQU ADC0_SCANCTL_SAMSEL3, 27 .EQU ADC0_SCANCTL_SAMSEL2, 26 .EQU ADC0_SCANCTL_SAMSEL1, 25 .EQU ADC0_SCANCTL_SAMSEL0, 24 .EQU ADC0_SCANCTL_WDCH6, 22 .EQU ADC0_SCANCTL_WDCH5, 21 .EQU ADC0_SCANCTL_WDCH4, 20 .EQU ADC0_SCANCTL_WDCH3, 19 .EQU ADC0_SCANCTL_WDCH2, 18 .EQU ADC0_SCANCTL_WDCH1, 17 .EQU ADC0_SCANCTL_WDCH0, 16 .EQU ADC0_SCANCTL_HSLEN1, 5 .EQU ADC0_SCANCTL_HSLEN0, 4 .EQU ADC0_SCANCTL_SLEN3, 3 .EQU ADC0_SCANCTL_SLEN2, 2 .EQU ADC0_SCANCTL_SLEN1, 1 .EQU ADC0_SCANCTL_SLEN0, 0 // register------------------------------------- .EQU ADC0_CCR, 0x400005DC // 0x4000 05DC ADC0_CCR Bits------------------------------------- .EQU ADC0_CCR_CCR8H, 17 .EQU ADC0_CCR_CCR8N, 16 .EQU ADC0_CCR_CCR7H, 15 .EQU ADC0_CCR_CCR7N, 14 .EQU ADC0_CCR_CCR6H, 13 .EQU ADC0_CCR_CCR6N, 12 .EQU ADC0_CCR_CCR5H, 11 .EQU ADC0_CCR_CCR5N, 10 .EQU ADC0_CCR_CCR4H, 9 .EQU ADC0_CCR_CCR4N, 8 .EQU ADC0_CCR_CCR3H, 7 .EQU ADC0_CCR_CCR3N, 6 .EQU ADC0_CCR_CCR2H, 5 .EQU ADC0_CCR_CCR2N, 4 .EQU ADC0_CCR_CCR1H, 3 .EQU ADC0_CCR_CCR1N, 2 .EQU ADC0_CCR_CCR0H, 1 .EQU ADC0_CCR_CCR0N, 0 // register------------------------------------- .EQU ADC1_CTL0, 0x40000600 // 0x4000 0600 ADC1_CTL0 Bits------------------------------------- .EQU ADC1_CTL0_WDSCH, 31 .EQU ADC1_CTL0_HPWDEN, 30 .EQU ADC1_CTL0_WDEN, 29 .EQU ADC1_CTL0_DSNUM2, 28 .EQU ADC1_CTL0_DSNUM1, 27 .EQU ADC1_CTL0_DSNUM0, 26 .EQU ADC1_CTL0_HP3DMAEN, 25 .EQU ADC1_CTL0_HP2DMAEN, 24 .EQU ADC1_CTL0_HP1DMAEN, 23 .EQU ADC1_CTL0_HP0DMAEN, 22 .EQU ADC1_CTL0_HPDSEN, 21 .EQU ADC1_CTL0_DSEN, 20 .EQU ADC1_CTL0_HPAUTO, 19 .EQU ADC1_CTL0_CONT, 18 .EQU ADC1_CTL0_SCANEN, 17 .EQU ADC1_CTL0_BOSSSELCOMP, 16 .EQU ADC1_CTL0_BOSSSEL, 15 .EQU ADC1_CTL0_TRIMIBIAS, 14 .EQU ADC1_CTL0_NDMAEN, 13 .EQU ADC1_CTL0_ADCCLKS2, 10 .EQU ADC1_CTL0_ADCCLKS1, 9 .EQU ADC1_CTL0_ADCCLKS0, 8 .EQU ADC1_CTL0_LR, 3 .EQU ADC1_CTL0_CLKS1, 2 .EQU ADC1_CTL0_CLKS0, 1 .EQU ADC1_CTL0_EN, 0 // register------------------------------------- .EQU ADC1_CTL1, 0x40000604 // 0x4000 0604 ADC1_CTL1 Bits------------------------------------- .EQU ADC1_CTL1_HPEXTEN, 27 .EQU ADC1_CTL1_HCH6, 26 .EQU ADC1_CTL1_HCH5, 25 .EQU ADC1_CTL1_HCH4, 24 .EQU ADC1_CTL1_HCH3, 23 .EQU ADC1_CTL1_HCH2, 22 .EQU ADC1_CTL1_HCH1, 21 .EQU ADC1_CTL1_HCH0, 20 .EQU ADC1_CTL1_REF2, 19 .EQU ADC1_CTL1_REF1, 18 .EQU ADC1_CTL1_REF0, 17 .EQU ADC1_CTL1_EXTEN, 11 .EQU ADC1_CTL1_NCH6, 10 .EQU ADC1_CTL1_NCH5, 9 .EQU ADC1_CTL1_NCH4, 8 .EQU ADC1_CTL1_NCH3, 7 .EQU ADC1_CTL1_NCH2, 6 .EQU ADC1_CTL1_NCH1, 5 .EQU ADC1_CTL1_NCH0, 4 .EQU ADC1_CTL1_HPSTART, 3 .EQU ADC1_CTL1_START, 2 // register------------------------------------- .EQU ADC1_SCANSQ0, 0x40000608 // 0x4000 0608 ADC1_SCANSQ0 Bits------------------------------------- .EQU ADC1_SCANSQ0_SSQ3_7, 31 .EQU ADC1_SCANSQ0_SSQ3_6, 30 .EQU ADC1_SCANSQ0_SSQ3_5, 29 .EQU ADC1_SCANSQ0_SSQ3_4, 28 .EQU ADC1_SCANSQ0_SSQ3_3, 27 .EQU ADC1_SCANSQ0_SSQ3_2, 26 .EQU ADC1_SCANSQ0_SSQ3_1, 25 .EQU ADC1_SCANSQ0_SSQ3_0, 24 .EQU ADC1_SCANSQ0_SSQ2_7, 23 .EQU ADC1_SCANSQ0_SSQ2_6, 22 .EQU ADC1_SCANSQ0_SSQ2_5, 21 .EQU ADC1_SCANSQ0_SSQ2_4, 20 .EQU ADC1_SCANSQ0_SSQ2_3, 19 .EQU ADC1_SCANSQ0_SSQ2_2, 18 .EQU ADC1_SCANSQ0_SSQ2_1, 17 .EQU ADC1_SCANSQ0_SSQ2_0, 16 .EQU ADC1_SCANSQ0_SSQ1_7, 15 .EQU ADC1_SCANSQ0_SSQ1_6, 14 .EQU ADC1_SCANSQ0_SSQ1_5, 13 .EQU ADC1_SCANSQ0_SSQ1_4, 12 .EQU ADC1_SCANSQ0_SSQ1_3, 11 .EQU ADC1_SCANSQ0_SSQ1_2, 10 .EQU ADC1_SCANSQ0_SSQ1_1, 9 .EQU ADC1_SCANSQ0_SSQ1_0, 8 .EQU ADC1_SCANSQ0_SSQ0_7, 7 .EQU ADC1_SCANSQ0_SSQ0_6, 6 .EQU ADC1_SCANSQ0_SSQ0_5, 5 .EQU ADC1_SCANSQ0_SSQ0_4, 4 .EQU ADC1_SCANSQ0_SSQ0_3, 3 .EQU ADC1_SCANSQ0_SSQ0_2, 2 .EQU ADC1_SCANSQ0_SSQ0_1, 1 .EQU ADC1_SCANSQ0_SSQ0_0, 0 // register------------------------------------- .EQU ADC1_SCANSQ1, 0x4000060C // 0x4000 060C ADC1_SCANSQ1 Bits------------------------------------- .EQU ADC1_SCANSQ1_SSQ7_7, 31 .EQU ADC1_SCANSQ1_SSQ7_6, 30 .EQU ADC1_SCANSQ1_SSQ7_5, 29 .EQU ADC1_SCANSQ1_SSQ7_4, 28 .EQU ADC1_SCANSQ1_SSQ7_3, 27 .EQU ADC1_SCANSQ1_SSQ7_2, 26 .EQU ADC1_SCANSQ1_SSQ7_1, 25 .EQU ADC1_SCANSQ1_SSQ7_0, 24 .EQU ADC1_SCANSQ1_SSQ6_7, 23 .EQU ADC1_SCANSQ1_SSQ6_6, 22 .EQU ADC1_SCANSQ1_SSQ6_5, 21 .EQU ADC1_SCANSQ1_SSQ6_4, 20 .EQU ADC1_SCANSQ1_SSQ6_3, 19 .EQU ADC1_SCANSQ1_SSQ6_2, 18 .EQU ADC1_SCANSQ1_SSQ6_1, 17 .EQU ADC1_SCANSQ1_SSQ6_0, 16 .EQU ADC1_SCANSQ1_SSQ5_7, 15 .EQU ADC1_SCANSQ1_SSQ5_6, 14 .EQU ADC1_SCANSQ1_SSQ5_5, 13 .EQU ADC1_SCANSQ1_SSQ5_4, 12 .EQU ADC1_SCANSQ1_SSQ5_3, 11 .EQU ADC1_SCANSQ1_SSQ5_2, 10 .EQU ADC1_SCANSQ1_SSQ5_1, 9 .EQU ADC1_SCANSQ1_SSQ5_0, 8 .EQU ADC1_SCANSQ1_SSQ4_7, 7 .EQU ADC1_SCANSQ1_SSQ4_6, 6 .EQU ADC1_SCANSQ1_SSQ4_5, 5 .EQU ADC1_SCANSQ1_SSQ4_4, 4 .EQU ADC1_SCANSQ1_SSQ4_3, 3 .EQU ADC1_SCANSQ1_SSQ4_2, 2 .EQU ADC1_SCANSQ1_SSQ4_1, 1 .EQU ADC1_SCANSQ1_SSQ4_0, 0 // register------------------------------------- .EQU ADC1_SCANSQ2, 0x40000610 // 0x4000 0610 ADC1_SCANSQ2 Bits------------------------------------- .EQU ADC1_SCANSQ2_SSQ11_7, 31 .EQU ADC1_SCANSQ2_SSQ11_6, 30 .EQU ADC1_SCANSQ2_SSQ11_5, 29 .EQU ADC1_SCANSQ2_SSQ11_4, 28 .EQU ADC1_SCANSQ2_SSQ11_3, 27 .EQU ADC1_SCANSQ2_SSQ11_2, 26 .EQU ADC1_SCANSQ2_SSQ11_1, 25 .EQU ADC1_SCANSQ2_SSQ11_0, 24 .EQU ADC1_SCANSQ2_SSQ10_7, 23 .EQU ADC1_SCANSQ2_SSQ10_6, 22 .EQU ADC1_SCANSQ2_SSQ10_5, 21 .EQU ADC1_SCANSQ2_SSQ10_4, 20 .EQU ADC1_SCANSQ2_SSQ10_3, 19 .EQU ADC1_SCANSQ2_SSQ10_2, 18 .EQU ADC1_SCANSQ2_SSQ10_1, 17 .EQU ADC1_SCANSQ2_SSQ10_0, 16 .EQU ADC1_SCANSQ2_SSQ9_7, 15 .EQU ADC1_SCANSQ2_SSQ9_6, 14 .EQU ADC1_SCANSQ2_SSQ9_5, 13 .EQU ADC1_SCANSQ2_SSQ9_4, 12 .EQU ADC1_SCANSQ2_SSQ9_3, 11 .EQU ADC1_SCANSQ2_SSQ9_2, 10 .EQU ADC1_SCANSQ2_SSQ9_1, 9 .EQU ADC1_SCANSQ2_SSQ9_0, 8 .EQU ADC1_SCANSQ2_SSQ8_7, 7 .EQU ADC1_SCANSQ2_SSQ8_6, 6 .EQU ADC1_SCANSQ2_SSQ8_5, 5 .EQU ADC1_SCANSQ2_SSQ8_4, 4 .EQU ADC1_SCANSQ2_SSQ8_3, 3 .EQU ADC1_SCANSQ2_SSQ8_2, 2 .EQU ADC1_SCANSQ2_SSQ8_1, 1 .EQU ADC1_SCANSQ2_SSQ8_0, 0 // register------------------------------------- .EQU ADC1_SCANSQ3, 0x40000644 // 0x4000 0644 ADC1_SCANSQ3 Bits------------------------------------- .EQU ADC1_SCANSQ3_SSQ15_7, 31 .EQU ADC1_SCANSQ3_SSQ15_6, 30 .EQU ADC1_SCANSQ3_SSQ15_5, 29 .EQU ADC1_SCANSQ3_SSQ15_4, 28 .EQU ADC1_SCANSQ3_SSQ15_3, 27 .EQU ADC1_SCANSQ3_SSQ15_2, 26 .EQU ADC1_SCANSQ3_SSQ15_1, 25 .EQU ADC1_SCANSQ3_SSQ15_0, 24 .EQU ADC1_SCANSQ3_SSQ14_7, 23 .EQU ADC1_SCANSQ3_SSQ14_6, 22 .EQU ADC1_SCANSQ3_SSQ14_5, 21 .EQU ADC1_SCANSQ3_SSQ14_4, 20 .EQU ADC1_SCANSQ3_SSQ14_3, 19 .EQU ADC1_SCANSQ3_SSQ14_2, 18 .EQU ADC1_SCANSQ3_SSQ14_1, 17 .EQU ADC1_SCANSQ3_SSQ14_0, 16 .EQU ADC1_SCANSQ3_SSQ13_7, 15 .EQU ADC1_SCANSQ3_SSQ13_6, 14 .EQU ADC1_SCANSQ3_SSQ13_5, 13 .EQU ADC1_SCANSQ3_SSQ13_4, 12 .EQU ADC1_SCANSQ3_SSQ13_3, 11 .EQU ADC1_SCANSQ3_SSQ13_2, 10 .EQU ADC1_SCANSQ3_SSQ13_1, 9 .EQU ADC1_SCANSQ3_SSQ13_0, 8 .EQU ADC1_SCANSQ3_SSQ12_7, 7 .EQU ADC1_SCANSQ3_SSQ12_6, 6 .EQU ADC1_SCANSQ3_SSQ12_5, 5 .EQU ADC1_SCANSQ3_SSQ12_4, 4 .EQU ADC1_SCANSQ3_SSQ12_3, 3 .EQU ADC1_SCANSQ3_SSQ12_2, 2 .EQU ADC1_SCANSQ3_SSQ12_1, 1 .EQU ADC1_SCANSQ3_SSQ12_0, 0 // register------------------------------------- .EQU ADC1_HSCANSQ, 0x40000614 // 0x4000 0614 ADC1_HSCANSQ Bits------------------------------------- .EQU ADC1_HSCANSQ_HSSQ3_7, 31 .EQU ADC1_HSCANSQ_HSSQ3_6, 30 .EQU ADC1_HSCANSQ_HSSQ3_5, 29 .EQU ADC1_HSCANSQ_HSSQ3_4, 28 .EQU ADC1_HSCANSQ_HSSQ3_3, 27 .EQU ADC1_HSCANSQ_HSSQ3_2, 26 .EQU ADC1_HSCANSQ_HSSQ3_1, 25 .EQU ADC1_HSCANSQ_HSSQ3_0, 24 .EQU ADC1_HSCANSQ_HSSQ2_7, 23 .EQU ADC1_HSCANSQ_HSSQ2_6, 22 .EQU ADC1_HSCANSQ_HSSQ2_5, 21 .EQU ADC1_HSCANSQ_HSSQ2_4, 20 .EQU ADC1_HSCANSQ_HSSQ2_3, 19 .EQU ADC1_HSCANSQ_HSSQ2_2, 18 .EQU ADC1_HSCANSQ_HSSQ2_1, 17 .EQU ADC1_HSCANSQ_HSSQ2_0, 16 .EQU ADC1_HSCANSQ_HSSQ1_7, 15 .EQU ADC1_HSCANSQ_HSSQ1_6, 14 .EQU ADC1_HSCANSQ_HSSQ1_5, 13 .EQU ADC1_HSCANSQ_HSSQ1_4, 12 .EQU ADC1_HSCANSQ_HSSQ1_3, 11 .EQU ADC1_HSCANSQ_HSSQ1_2, 10 .EQU ADC1_HSCANSQ_HSSQ1_1, 9 .EQU ADC1_HSCANSQ_HSSQ1_0, 8 .EQU ADC1_HSCANSQ_HSSQ0_7, 7 .EQU ADC1_HSCANSQ_HSSQ0_6, 6 .EQU ADC1_HSCANSQ_HSSQ0_5, 5 .EQU ADC1_HSCANSQ_HSSQ0_4, 4 .EQU ADC1_HSCANSQ_HSSQ0_3, 3 .EQU ADC1_HSCANSQ_HSSQ0_2, 2 .EQU ADC1_HSCANSQ_HSSQ0_1, 1 .EQU ADC1_HSCANSQ_HSSQ0_0, 0 // register------------------------------------- .EQU ADC1_WDH, 0x40000618 // 0x4000 0618 ADC1_WDH Bits------------------------------------- .EQU ADC1_WDH_WDH11, 11 .EQU ADC1_WDH_WDH10, 10 .EQU ADC1_WDH_WDH9, 9 .EQU ADC1_WDH_WDH8, 8 .EQU ADC1_WDH_WDH7, 7 .EQU ADC1_WDH_WDH6, 6 .EQU ADC1_WDH_WDH5, 5 .EQU ADC1_WDH_WDH4, 4 .EQU ADC1_WDH_WDH3, 3 .EQU ADC1_WDH_WDH2, 2 .EQU ADC1_WDH_WDH1, 1 .EQU ADC1_WDH_WDH0, 0 // register------------------------------------- .EQU ADC1_WDL, 0x4000061C // 0x4000 061C ADC1_WDL Bits------------------------------------- .EQU ADC1_WDL_WDL11, 11 .EQU ADC1_WDL_WDL10, 10 .EQU ADC1_WDL_WDL9, 9 .EQU ADC1_WDL_WDL8, 8 .EQU ADC1_WDL_WDL7, 7 .EQU ADC1_WDL_WDL6, 6 .EQU ADC1_WDL_WDL5, 5 .EQU ADC1_WDL_WDL4, 4 .EQU ADC1_WDL_WDL3, 3 .EQU ADC1_WDL_WDL2, 2 .EQU ADC1_WDL_WDL1, 1 .EQU ADC1_WDL_WDL0, 0 // register------------------------------------- .EQU ADC1_DATA, 0x40000620 // 0x4000 0620 ADC1_DATA Bits------------------------------------- .EQU ADC1_DATA_DATA15, 15 .EQU ADC1_DATA_DATA14, 14 .EQU ADC1_DATA_DATA13, 13 .EQU ADC1_DATA_DATA12, 12 .EQU ADC1_DATA_DATA11, 11 .EQU ADC1_DATA_DATA10, 10 .EQU ADC1_DATA_DATA9, 9 .EQU ADC1_DATA_DATA8, 8 .EQU ADC1_DATA_DATA7, 7 .EQU ADC1_DATA_DATA6, 6 .EQU ADC1_DATA_DATA5, 5 .EQU ADC1_DATA_DATA4, 4 .EQU ADC1_DATA_DATA3, 3 .EQU ADC1_DATA_DATA2, 2 .EQU ADC1_DATA_DATA1, 1 .EQU ADC1_DATA_DATA0, 0 // register------------------------------------- .EQU ADC1_HPDATA0, 0x40000624 // 0x4000 0624 ADC1_HPDATA0 Bits------------------------------------- .EQU ADC1_HPDATA0_HPDATA15, 15 .EQU ADC1_HPDATA0_HPDATA14, 14 .EQU ADC1_HPDATA0_HPDATA13, 13 .EQU ADC1_HPDATA0_HPDATA12, 12 .EQU ADC1_HPDATA0_HPDATA11, 11 .EQU ADC1_HPDATA0_HPDATA10, 10 .EQU ADC1_HPDATA0_HPDATA9, 9 .EQU ADC1_HPDATA0_HPDATA8, 8 .EQU ADC1_HPDATA0_HPDATA7, 7 .EQU ADC1_HPDATA0_HPDATA6, 6 .EQU ADC1_HPDATA0_HPDATA5, 5 .EQU ADC1_HPDATA0_HPDATA4, 4 .EQU ADC1_HPDATA0_HPDATA3, 3 .EQU ADC1_HPDATA0_HPDATA2, 2 .EQU ADC1_HPDATA0_HPDATA1, 1 .EQU ADC1_HPDATA0_HPDATA0, 0 // register------------------------------------- .EQU ADC1_HPDATA1, 0x40000628 // 0x4000 0628 ADC1_HPDATA1 Bits------------------------------------- .EQU ADC1_HPDATA1_HPDATA15, 15 .EQU ADC1_HPDATA1_HPDATA14, 14 .EQU ADC1_HPDATA1_HPDATA13, 13 .EQU ADC1_HPDATA1_HPDATA12, 12 .EQU ADC1_HPDATA1_HPDATA11, 11 .EQU ADC1_HPDATA1_HPDATA10, 10 .EQU ADC1_HPDATA1_HPDATA9, 9 .EQU ADC1_HPDATA1_HPDATA8, 8 .EQU ADC1_HPDATA1_HPDATA7, 7 .EQU ADC1_HPDATA1_HPDATA6, 6 .EQU ADC1_HPDATA1_HPDATA5, 5 .EQU ADC1_HPDATA1_HPDATA4, 4 .EQU ADC1_HPDATA1_HPDATA3, 3 .EQU ADC1_HPDATA1_HPDATA2, 2 .EQU ADC1_HPDATA1_HPDATA1, 1 .EQU ADC1_HPDATA1_HPDATA0, 0 // register------------------------------------- .EQU ADC1_HPDATA2, 0x4000062C // 0x4000 062C ADC1_HPDATA2 Bits------------------------------------- .EQU ADC1_HPDATA2_HPDATA15, 15 .EQU ADC1_HPDATA2_HPDATA14, 14 .EQU ADC1_HPDATA2_HPDATA13, 13 .EQU ADC1_HPDATA2_HPDATA12, 12 .EQU ADC1_HPDATA2_HPDATA11, 11 .EQU ADC1_HPDATA2_HPDATA10, 10 .EQU ADC1_HPDATA2_HPDATA9, 9 .EQU ADC1_HPDATA2_HPDATA8, 8 .EQU ADC1_HPDATA2_HPDATA7, 7 .EQU ADC1_HPDATA2_HPDATA6, 6 .EQU ADC1_HPDATA2_HPDATA5, 5 .EQU ADC1_HPDATA2_HPDATA4, 4 .EQU ADC1_HPDATA2_HPDATA3, 3 .EQU ADC1_HPDATA2_HPDATA2, 2 .EQU ADC1_HPDATA2_HPDATA1, 1 .EQU ADC1_HPDATA2_HPDATA0, 0 // register------------------------------------- .EQU ADC1_HPDATA3, 0x40000630 // 0x4000 0630 ADC1_HPDATA3 Bits------------------------------------- .EQU ADC1_HPDATA3_HPDATA15, 15 .EQU ADC1_HPDATA3_HPDATA14, 14 .EQU ADC1_HPDATA3_HPDATA13, 13 .EQU ADC1_HPDATA3_HPDATA12, 12 .EQU ADC1_HPDATA3_HPDATA11, 11 .EQU ADC1_HPDATA3_HPDATA10, 10 .EQU ADC1_HPDATA3_HPDATA9, 9 .EQU ADC1_HPDATA3_HPDATA8, 8 .EQU ADC1_HPDATA3_HPDATA7, 7 .EQU ADC1_HPDATA3_HPDATA6, 6 .EQU ADC1_HPDATA3_HPDATA5, 5 .EQU ADC1_HPDATA3_HPDATA4, 4 .EQU ADC1_HPDATA3_HPDATA3, 3 .EQU ADC1_HPDATA3_HPDATA2, 2 .EQU ADC1_HPDATA3_HPDATA1, 1 .EQU ADC1_HPDATA3_HPDATA0, 0 // register------------------------------------- .EQU ADC1_HPOFF0, 0x40000634 // 0x4000 0634 ADC1_HPOFF0 Bits------------------------------------- .EQU ADC1_HPOFF0_HPDOFF11, 11 .EQU ADC1_HPOFF0_HPDOFF10, 10 .EQU ADC1_HPOFF0_HPDOFF9, 9 .EQU ADC1_HPOFF0_HPDOFF8, 8 .EQU ADC1_HPOFF0_HPDOFF7, 7 .EQU ADC1_HPOFF0_HPDOFF6, 6 .EQU ADC1_HPOFF0_HPDOFF5, 5 .EQU ADC1_HPOFF0_HPDOFF4, 4 .EQU ADC1_HPOFF0_HPDOFF3, 3 .EQU ADC1_HPOFF0_HPDOFF2, 2 .EQU ADC1_HPOFF0_HPDOFF1, 1 .EQU ADC1_HPOFF0_HPDOFF0, 0 // register------------------------------------- .EQU ADC1_HPOFF1, 0x40000638 // 0x4000 0638 ADC1_HPOFF1 Bits------------------------------------- .EQU ADC1_HPOFF1_HPDOFF11, 11 .EQU ADC1_HPOFF1_HPDOFF10, 10 .EQU ADC1_HPOFF1_HPDOFF9, 9 .EQU ADC1_HPOFF1_HPDOFF8, 8 .EQU ADC1_HPOFF1_HPDOFF7, 7 .EQU ADC1_HPOFF1_HPDOFF6, 6 .EQU ADC1_HPOFF1_HPDOFF5, 5 .EQU ADC1_HPOFF1_HPDOFF4, 4 .EQU ADC1_HPOFF1_HPDOFF3, 3 .EQU ADC1_HPOFF1_HPDOFF2, 2 .EQU ADC1_HPOFF1_HPDOFF1, 1 .EQU ADC1_HPOFF1_HPDOFF0, 0 // register------------------------------------- .EQU ADC1_HPOFF2, 0x4000063C // 0x4000 063C ADC1_HPOFF2 Bits------------------------------------- .EQU ADC1_HPOFF2_HPDOFF11, 11 .EQU ADC1_HPOFF2_HPDOFF10, 10 .EQU ADC1_HPOFF2_HPDOFF9, 9 .EQU ADC1_HPOFF2_HPDOFF8, 8 .EQU ADC1_HPOFF2_HPDOFF7, 7 .EQU ADC1_HPOFF2_HPDOFF6, 6 .EQU ADC1_HPOFF2_HPDOFF5, 5 .EQU ADC1_HPOFF2_HPDOFF4, 4 .EQU ADC1_HPOFF2_HPDOFF3, 3 .EQU ADC1_HPOFF2_HPDOFF2, 2 .EQU ADC1_HPOFF2_HPDOFF1, 1 .EQU ADC1_HPOFF2_HPDOFF0, 0 // register------------------------------------- .EQU ADC1_HPOFF3, 0x40000640 // 0x4000 0640 ADC1_HPOFF3 Bits------------------------------------- .EQU ADC1_HPOFF3_HPDOFF11, 11 .EQU ADC1_HPOFF3_HPDOFF10, 10 .EQU ADC1_HPOFF3_HPDOFF9, 9 .EQU ADC1_HPOFF3_HPDOFF8, 8 .EQU ADC1_HPOFF3_HPDOFF7, 7 .EQU ADC1_HPOFF3_HPDOFF6, 6 .EQU ADC1_HPOFF3_HPDOFF5, 5 .EQU ADC1_HPOFF3_HPDOFF4, 4 .EQU ADC1_HPOFF3_HPDOFF3, 3 .EQU ADC1_HPOFF3_HPDOFF2, 2 .EQU ADC1_HPOFF3_HPDOFF1, 1 .EQU ADC1_HPOFF3_HPDOFF0, 0 // register------------------------------------- .EQU ADC1_STATE, 0x40000650 // 0x4000 0650 ADC1_STATE Bits------------------------------------- .EQU ADC1_STATE_TRIMERROR1, 31 .EQU ADC1_STATE_TRIMERROR0, 30 .EQU ADC1_STATE_TRIMIBIASOPA, 27 .EQU ADC1_STATE_EOCIE, 13 .EQU ADC1_STATE_EOCIC, 12 .EQU ADC1_STATE_EOCIF, 11 .EQU ADC1_STATE_WDIE, 10 .EQU ADC1_STATE_HPENDIE, 9 .EQU ADC1_STATE_ENDIE, 8 .EQU ADC1_STATE_WDIC, 7 .EQU ADC1_STATE_HPENDIC, 6 .EQU ADC1_STATE_ENDIC, 5 .EQU ADC1_STATE_WDIF, 4 .EQU ADC1_STATE_HPENDIF, 3 .EQU ADC1_STATE_ENDIF, 2 .EQU ADC1_STATE_HPSTARTIF, 1 .EQU ADC1_STATE_STARTIF, 0 // register------------------------------------- .EQU ADC1_SCANCTL, 0x40000658 // 0x4000 0658 ADC1_SCANCTL Bits------------------------------------- .EQU ADC1_SCANCTL_SAMSEL3, 27 .EQU ADC1_SCANCTL_SAMSEL2, 26 .EQU ADC1_SCANCTL_SAMSEL1, 25 .EQU ADC1_SCANCTL_SAMSEL0, 24 .EQU ADC1_SCANCTL_WDCH6, 22 .EQU ADC1_SCANCTL_WDCH5, 21 .EQU ADC1_SCANCTL_WDCH4, 20 .EQU ADC1_SCANCTL_WDCH3, 19 .EQU ADC1_SCANCTL_WDCH2, 18 .EQU ADC1_SCANCTL_WDCH1, 17 .EQU ADC1_SCANCTL_WDCH0, 16 .EQU ADC1_SCANCTL_HSLEN1, 5 .EQU ADC1_SCANCTL_HSLEN0, 4 .EQU ADC1_SCANCTL_SLEN3, 3 .EQU ADC1_SCANCTL_SLEN2, 2 .EQU ADC1_SCANCTL_SLEN1, 1 .EQU ADC1_SCANCTL_SLEN0, 0 // register------------------------------------- .EQU ADC1_CCR, 0x4000065C // 0x4000 065C ADC1_CCR Bits------------------------------------- .EQU ADC1_CCR_CCR8H, 17 .EQU ADC1_CCR_CCR8N, 16 .EQU ADC1_CCR_CCR7H, 15 .EQU ADC1_CCR_CCR7N, 14 .EQU ADC1_CCR_CCR6H, 13 .EQU ADC1_CCR_CCR6N, 12 .EQU ADC1_CCR_CCR5H, 11 .EQU ADC1_CCR_CCR5N, 10 .EQU ADC1_CCR_CCR4H, 9 .EQU ADC1_CCR_CCR4N, 8 .EQU ADC1_CCR_CCR3H, 7 .EQU ADC1_CCR_CCR3N, 6 .EQU ADC1_CCR_CCR2H, 5 .EQU ADC1_CCR_CCR2N, 4 .EQU ADC1_CCR_CCR1H, 3 .EQU ADC1_CCR_CCR1N, 2 .EQU ADC1_CCR_CCR0H, 1 .EQU ADC1_CCR_CCR0N, 0 // register------------------------------------- .EQU ADC2_CTL0, 0x40000680 // 0x4000 0680 ADC2_CTL0 Bits------------------------------------- .EQU ADC2_CTL0_WDSCH, 31 .EQU ADC2_CTL0_HPWDEN, 30 .EQU ADC2_CTL0_WDEN, 29 .EQU ADC2_CTL0_DSNUM2, 28 .EQU ADC2_CTL0_DSNUM1, 27 .EQU ADC2_CTL0_DSNUM0, 26 .EQU ADC2_CTL0_HP3DMAEN, 25 .EQU ADC2_CTL0_HP2DMAEN, 24 .EQU ADC2_CTL0_HP1DMAEN, 23 .EQU ADC2_CTL0_HP0DMAEN, 22 .EQU ADC2_CTL0_HPDSEN, 21 .EQU ADC2_CTL0_DSEN, 20 .EQU ADC2_CTL0_HPAUTO, 19 .EQU ADC2_CTL0_CONT, 18 .EQU ADC2_CTL0_SCANEN, 17 .EQU ADC2_CTL0_BOSSSELCOMP, 16 .EQU ADC2_CTL0_BOSSSEL, 15 .EQU ADC2_CTL0_TRIMIBIAS, 14 .EQU ADC2_CTL0_NDMAEN, 13 .EQU ADC2_CTL0_ADCCLKS2, 10 .EQU ADC2_CTL0_ADCCLKS1, 9 .EQU ADC2_CTL0_ADCCLKS0, 8 .EQU ADC2_CTL0_LR, 3 .EQU ADC2_CTL0_CLKS1, 2 .EQU ADC2_CTL0_CLKS0, 1 .EQU ADC2_CTL0_EN, 0 // register------------------------------------- .EQU ADC2_CTL1, 0x40000684 // 0x4000 0684 ADC2_CTL1 Bits------------------------------------- .EQU ADC2_CTL1_HPEXTEN, 27 .EQU ADC2_CTL1_HCH6, 26 .EQU ADC2_CTL1_HCH5, 25 .EQU ADC2_CTL1_HCH4, 24 .EQU ADC2_CTL1_HCH3, 23 .EQU ADC2_CTL1_HCH2, 22 .EQU ADC2_CTL1_HCH1, 21 .EQU ADC2_CTL1_HCH0, 20 .EQU ADC2_CTL1_REF2, 19 .EQU ADC2_CTL1_REF1, 18 .EQU ADC2_CTL1_REF0, 17 .EQU ADC2_CTL1_AVGS1, 14 .EQU ADC2_CTL1_AVGS0, 13 .EQU ADC2_CTL1_AVGEN, 12 .EQU ADC2_CTL1_EXTEN, 11 .EQU ADC2_CTL1_NCH6, 10 .EQU ADC2_CTL1_NCH5, 9 .EQU ADC2_CTL1_NCH4, 8 .EQU ADC2_CTL1_NCH3, 7 .EQU ADC2_CTL1_NCH2, 6 .EQU ADC2_CTL1_NCH1, 5 .EQU ADC2_CTL1_NCH0, 4 .EQU ADC2_CTL1_HPSTART, 3 .EQU ADC2_CTL1_START, 2 // register------------------------------------- .EQU ADC2_SCANSQ0, 0x40000688 // 0x4000 0688 ADC2_SCANSQ0 Bits------------------------------------- .EQU ADC2_SCANSQ0_SSQ3_7, 31 .EQU ADC2_SCANSQ0_SSQ3_6, 30 .EQU ADC2_SCANSQ0_SSQ3_5, 29 .EQU ADC2_SCANSQ0_SSQ3_4, 28 .EQU ADC2_SCANSQ0_SSQ3_3, 27 .EQU ADC2_SCANSQ0_SSQ3_2, 26 .EQU ADC2_SCANSQ0_SSQ3_1, 25 .EQU ADC2_SCANSQ0_SSQ3_0, 24 .EQU ADC2_SCANSQ0_SSQ2_7, 23 .EQU ADC2_SCANSQ0_SSQ2_6, 22 .EQU ADC2_SCANSQ0_SSQ2_5, 21 .EQU ADC2_SCANSQ0_SSQ2_4, 20 .EQU ADC2_SCANSQ0_SSQ2_3, 19 .EQU ADC2_SCANSQ0_SSQ2_2, 18 .EQU ADC2_SCANSQ0_SSQ2_1, 17 .EQU ADC2_SCANSQ0_SSQ2_0, 16 .EQU ADC2_SCANSQ0_SSQ1_7, 15 .EQU ADC2_SCANSQ0_SSQ1_6, 14 .EQU ADC2_SCANSQ0_SSQ1_5, 13 .EQU ADC2_SCANSQ0_SSQ1_4, 12 .EQU ADC2_SCANSQ0_SSQ1_3, 11 .EQU ADC2_SCANSQ0_SSQ1_2, 10 .EQU ADC2_SCANSQ0_SSQ1_1, 9 .EQU ADC2_SCANSQ0_SSQ1_0, 8 .EQU ADC2_SCANSQ0_SSQ0_7, 7 .EQU ADC2_SCANSQ0_SSQ0_6, 6 .EQU ADC2_SCANSQ0_SSQ0_5, 5 .EQU ADC2_SCANSQ0_SSQ0_4, 4 .EQU ADC2_SCANSQ0_SSQ0_3, 3 .EQU ADC2_SCANSQ0_SSQ0_2, 2 .EQU ADC2_SCANSQ0_SSQ0_1, 1 .EQU ADC2_SCANSQ0_SSQ0_0, 0 // register------------------------------------- .EQU ADC2_SCANSQ1, 0x4000068C // 0x4000 068C ADC2_SCANSQ1 Bits------------------------------------- .EQU ADC2_SCANSQ1_SSQ7_7, 31 .EQU ADC2_SCANSQ1_SSQ7_6, 30 .EQU ADC2_SCANSQ1_SSQ7_5, 29 .EQU ADC2_SCANSQ1_SSQ7_4, 28 .EQU ADC2_SCANSQ1_SSQ7_3, 27 .EQU ADC2_SCANSQ1_SSQ7_2, 26 .EQU ADC2_SCANSQ1_SSQ7_1, 25 .EQU ADC2_SCANSQ1_SSQ7_0, 24 .EQU ADC2_SCANSQ1_SSQ6_7, 23 .EQU ADC2_SCANSQ1_SSQ6_6, 22 .EQU ADC2_SCANSQ1_SSQ6_5, 21 .EQU ADC2_SCANSQ1_SSQ6_4, 20 .EQU ADC2_SCANSQ1_SSQ6_3, 19 .EQU ADC2_SCANSQ1_SSQ6_2, 18 .EQU ADC2_SCANSQ1_SSQ6_1, 17 .EQU ADC2_SCANSQ1_SSQ6_0, 16 .EQU ADC2_SCANSQ1_SSQ5_7, 15 .EQU ADC2_SCANSQ1_SSQ5_6, 14 .EQU ADC2_SCANSQ1_SSQ5_5, 13 .EQU ADC2_SCANSQ1_SSQ5_4, 12 .EQU ADC2_SCANSQ1_SSQ5_3, 11 .EQU ADC2_SCANSQ1_SSQ5_2, 10 .EQU ADC2_SCANSQ1_SSQ5_1, 9 .EQU ADC2_SCANSQ1_SSQ5_0, 8 .EQU ADC2_SCANSQ1_SSQ4_7, 7 .EQU ADC2_SCANSQ1_SSQ4_6, 6 .EQU ADC2_SCANSQ1_SSQ4_5, 5 .EQU ADC2_SCANSQ1_SSQ4_4, 4 .EQU ADC2_SCANSQ1_SSQ4_3, 3 .EQU ADC2_SCANSQ1_SSQ4_2, 2 .EQU ADC2_SCANSQ1_SSQ4_1, 1 .EQU ADC2_SCANSQ1_SSQ4_0, 0 // register------------------------------------- .EQU ADC2_SCANSQ2, 0x40000690 // 0x4000 0690 ADC2_SCANSQ2 Bits------------------------------------- .EQU ADC2_SCANSQ2_SSQ11_7, 31 .EQU ADC2_SCANSQ2_SSQ11_6, 30 .EQU ADC2_SCANSQ2_SSQ11_5, 29 .EQU ADC2_SCANSQ2_SSQ11_4, 28 .EQU ADC2_SCANSQ2_SSQ11_3, 27 .EQU ADC2_SCANSQ2_SSQ11_2, 26 .EQU ADC2_SCANSQ2_SSQ11_1, 25 .EQU ADC2_SCANSQ2_SSQ11_0, 24 .EQU ADC2_SCANSQ2_SSQ10_7, 23 .EQU ADC2_SCANSQ2_SSQ10_6, 22 .EQU ADC2_SCANSQ2_SSQ10_5, 21 .EQU ADC2_SCANSQ2_SSQ10_4, 20 .EQU ADC2_SCANSQ2_SSQ10_3, 19 .EQU ADC2_SCANSQ2_SSQ10_2, 18 .EQU ADC2_SCANSQ2_SSQ10_1, 17 .EQU ADC2_SCANSQ2_SSQ10_0, 16 .EQU ADC2_SCANSQ2_SSQ9_7, 15 .EQU ADC2_SCANSQ2_SSQ9_6, 14 .EQU ADC2_SCANSQ2_SSQ9_5, 13 .EQU ADC2_SCANSQ2_SSQ9_4, 12 .EQU ADC2_SCANSQ2_SSQ9_3, 11 .EQU ADC2_SCANSQ2_SSQ9_2, 10 .EQU ADC2_SCANSQ2_SSQ9_1, 9 .EQU ADC2_SCANSQ2_SSQ9_0, 8 .EQU ADC2_SCANSQ2_SSQ8_7, 7 .EQU ADC2_SCANSQ2_SSQ8_6, 6 .EQU ADC2_SCANSQ2_SSQ8_5, 5 .EQU ADC2_SCANSQ2_SSQ8_4, 4 .EQU ADC2_SCANSQ2_SSQ8_3, 3 .EQU ADC2_SCANSQ2_SSQ8_2, 2 .EQU ADC2_SCANSQ2_SSQ8_1, 1 .EQU ADC2_SCANSQ2_SSQ8_0, 0 // register------------------------------------- .EQU ADC2_SCANSQ3, 0x400006C4 // 0x4000 06C4 ADC2_SCANSQ3 Bits------------------------------------- .EQU ADC2_SCANSQ3_SSQ15_7, 31 .EQU ADC2_SCANSQ3_SSQ15_6, 30 .EQU ADC2_SCANSQ3_SSQ15_5, 29 .EQU ADC2_SCANSQ3_SSQ15_4, 28 .EQU ADC2_SCANSQ3_SSQ15_3, 27 .EQU ADC2_SCANSQ3_SSQ15_2, 26 .EQU ADC2_SCANSQ3_SSQ15_1, 25 .EQU ADC2_SCANSQ3_SSQ15_0, 24 .EQU ADC2_SCANSQ3_SSQ14_7, 23 .EQU ADC2_SCANSQ3_SSQ14_6, 22 .EQU ADC2_SCANSQ3_SSQ14_5, 21 .EQU ADC2_SCANSQ3_SSQ14_4, 20 .EQU ADC2_SCANSQ3_SSQ14_3, 19 .EQU ADC2_SCANSQ3_SSQ14_2, 18 .EQU ADC2_SCANSQ3_SSQ14_1, 17 .EQU ADC2_SCANSQ3_SSQ14_0, 16 .EQU ADC2_SCANSQ3_SSQ13_7, 15 .EQU ADC2_SCANSQ3_SSQ13_6, 14 .EQU ADC2_SCANSQ3_SSQ13_5, 13 .EQU ADC2_SCANSQ3_SSQ13_4, 12 .EQU ADC2_SCANSQ3_SSQ13_3, 11 .EQU ADC2_SCANSQ3_SSQ13_2, 10 .EQU ADC2_SCANSQ3_SSQ13_1, 9 .EQU ADC2_SCANSQ3_SSQ13_0, 8 .EQU ADC2_SCANSQ3_SSQ12_7, 7 .EQU ADC2_SCANSQ3_SSQ12_6, 6 .EQU ADC2_SCANSQ3_SSQ12_5, 5 .EQU ADC2_SCANSQ3_SSQ12_4, 4 .EQU ADC2_SCANSQ3_SSQ12_3, 3 .EQU ADC2_SCANSQ3_SSQ12_2, 2 .EQU ADC2_SCANSQ3_SSQ12_1, 1 .EQU ADC2_SCANSQ3_SSQ12_0, 0 // register------------------------------------- .EQU ADC2_HSCANSQ, 0x40000694 // 0x4000 0694 ADC2_HSCANSQ Bits------------------------------------- .EQU ADC2_HSCANSQ_HSSQ3_7, 31 .EQU ADC2_HSCANSQ_HSSQ3_6, 30 .EQU ADC2_HSCANSQ_HSSQ3_5, 29 .EQU ADC2_HSCANSQ_HSSQ3_4, 28 .EQU ADC2_HSCANSQ_HSSQ3_3, 27 .EQU ADC2_HSCANSQ_HSSQ3_2, 26 .EQU ADC2_HSCANSQ_HSSQ3_1, 25 .EQU ADC2_HSCANSQ_HSSQ3_0, 24 .EQU ADC2_HSCANSQ_HSSQ2_7, 23 .EQU ADC2_HSCANSQ_HSSQ2_6, 22 .EQU ADC2_HSCANSQ_HSSQ2_5, 21 .EQU ADC2_HSCANSQ_HSSQ2_4, 20 .EQU ADC2_HSCANSQ_HSSQ2_3, 19 .EQU ADC2_HSCANSQ_HSSQ2_2, 18 .EQU ADC2_HSCANSQ_HSSQ2_1, 17 .EQU ADC2_HSCANSQ_HSSQ2_0, 16 .EQU ADC2_HSCANSQ_HSSQ1_7, 15 .EQU ADC2_HSCANSQ_HSSQ1_6, 14 .EQU ADC2_HSCANSQ_HSSQ1_5, 13 .EQU ADC2_HSCANSQ_HSSQ1_4, 12 .EQU ADC2_HSCANSQ_HSSQ1_3, 11 .EQU ADC2_HSCANSQ_HSSQ1_2, 10 .EQU ADC2_HSCANSQ_HSSQ1_1, 9 .EQU ADC2_HSCANSQ_HSSQ1_0, 8 .EQU ADC2_HSCANSQ_HSSQ0_7, 7 .EQU ADC2_HSCANSQ_HSSQ0_6, 6 .EQU ADC2_HSCANSQ_HSSQ0_5, 5 .EQU ADC2_HSCANSQ_HSSQ0_4, 4 .EQU ADC2_HSCANSQ_HSSQ0_3, 3 .EQU ADC2_HSCANSQ_HSSQ0_2, 2 .EQU ADC2_HSCANSQ_HSSQ0_1, 1 .EQU ADC2_HSCANSQ_HSSQ0_0, 0 // register------------------------------------- .EQU ADC2_WDH, 0x40000698 // 0x4000 0698 ADC2_WDH Bits------------------------------------- .EQU ADC2_WDH_WDH11, 11 .EQU ADC2_WDH_WDH10, 10 .EQU ADC2_WDH_WDH9, 9 .EQU ADC2_WDH_WDH8, 8 .EQU ADC2_WDH_WDH7, 7 .EQU ADC2_WDH_WDH6, 6 .EQU ADC2_WDH_WDH5, 5 .EQU ADC2_WDH_WDH4, 4 .EQU ADC2_WDH_WDH3, 3 .EQU ADC2_WDH_WDH2, 2 .EQU ADC2_WDH_WDH1, 1 .EQU ADC2_WDH_WDH0, 0 // register------------------------------------- .EQU ADC2_WDL, 0x4000069C // 0x4000 069C ADC2_WDL Bits------------------------------------- .EQU ADC2_WDL_WDL11, 11 .EQU ADC2_WDL_WDL10, 10 .EQU ADC2_WDL_WDL9, 9 .EQU ADC2_WDL_WDL8, 8 .EQU ADC2_WDL_WDL7, 7 .EQU ADC2_WDL_WDL6, 6 .EQU ADC2_WDL_WDL5, 5 .EQU ADC2_WDL_WDL4, 4 .EQU ADC2_WDL_WDL3, 3 .EQU ADC2_WDL_WDL2, 2 .EQU ADC2_WDL_WDL1, 1 .EQU ADC2_WDL_WDL0, 0 // register------------------------------------- .EQU ADC2_DATA, 0x400006A0 // 0x4000 06A0 ADC2_DATA Bits------------------------------------- .EQU ADC2_DATA_DATA15, 15 .EQU ADC2_DATA_DATA14, 14 .EQU ADC2_DATA_DATA13, 13 .EQU ADC2_DATA_DATA12, 12 .EQU ADC2_DATA_DATA11, 11 .EQU ADC2_DATA_DATA10, 10 .EQU ADC2_DATA_DATA9, 9 .EQU ADC2_DATA_DATA8, 8 .EQU ADC2_DATA_DATA7, 7 .EQU ADC2_DATA_DATA6, 6 .EQU ADC2_DATA_DATA5, 5 .EQU ADC2_DATA_DATA4, 4 .EQU ADC2_DATA_DATA3, 3 .EQU ADC2_DATA_DATA2, 2 .EQU ADC2_DATA_DATA1, 1 .EQU ADC2_DATA_DATA0, 0 // register------------------------------------- .EQU ADC2_HPDATA0, 0x400006A4 // 0x4000 06A4 ADC2_HPDATA0 Bits------------------------------------- .EQU ADC2_HPDATA0_HPDATA15, 15 .EQU ADC2_HPDATA0_HPDATA14, 14 .EQU ADC2_HPDATA0_HPDATA13, 13 .EQU ADC2_HPDATA0_HPDATA12, 12 .EQU ADC2_HPDATA0_HPDATA11, 11 .EQU ADC2_HPDATA0_HPDATA10, 10 .EQU ADC2_HPDATA0_HPDATA9, 9 .EQU ADC2_HPDATA0_HPDATA8, 8 .EQU ADC2_HPDATA0_HPDATA7, 7 .EQU ADC2_HPDATA0_HPDATA6, 6 .EQU ADC2_HPDATA0_HPDATA5, 5 .EQU ADC2_HPDATA0_HPDATA4, 4 .EQU ADC2_HPDATA0_HPDATA3, 3 .EQU ADC2_HPDATA0_HPDATA2, 2 .EQU ADC2_HPDATA0_HPDATA1, 1 .EQU ADC2_HPDATA0_HPDATA0, 0 // register------------------------------------- .EQU ADC2_HPDATA1, 0x400006A8 // 0x4000 06A8 ADC2_HPDATA1 Bits------------------------------------- .EQU ADC2_HPDATA1_HPDATA15, 15 .EQU ADC2_HPDATA1_HPDATA14, 14 .EQU ADC2_HPDATA1_HPDATA13, 13 .EQU ADC2_HPDATA1_HPDATA12, 12 .EQU ADC2_HPDATA1_HPDATA11, 11 .EQU ADC2_HPDATA1_HPDATA10, 10 .EQU ADC2_HPDATA1_HPDATA9, 9 .EQU ADC2_HPDATA1_HPDATA8, 8 .EQU ADC2_HPDATA1_HPDATA7, 7 .EQU ADC2_HPDATA1_HPDATA6, 6 .EQU ADC2_HPDATA1_HPDATA5, 5 .EQU ADC2_HPDATA1_HPDATA4, 4 .EQU ADC2_HPDATA1_HPDATA3, 3 .EQU ADC2_HPDATA1_HPDATA2, 2 .EQU ADC2_HPDATA1_HPDATA1, 1 .EQU ADC2_HPDATA1_HPDATA0, 0 // register------------------------------------- .EQU ADC2_HPDATA2, 0x400006AC // 0x4000 06AC ADC2_HPDATA2 Bits------------------------------------- .EQU ADC2_HPDATA2_HPDATA15, 15 .EQU ADC2_HPDATA2_HPDATA14, 14 .EQU ADC2_HPDATA2_HPDATA13, 13 .EQU ADC2_HPDATA2_HPDATA12, 12 .EQU ADC2_HPDATA2_HPDATA11, 11 .EQU ADC2_HPDATA2_HPDATA10, 10 .EQU ADC2_HPDATA2_HPDATA9, 9 .EQU ADC2_HPDATA2_HPDATA8, 8 .EQU ADC2_HPDATA2_HPDATA7, 7 .EQU ADC2_HPDATA2_HPDATA6, 6 .EQU ADC2_HPDATA2_HPDATA5, 5 .EQU ADC2_HPDATA2_HPDATA4, 4 .EQU ADC2_HPDATA2_HPDATA3, 3 .EQU ADC2_HPDATA2_HPDATA2, 2 .EQU ADC2_HPDATA2_HPDATA1, 1 .EQU ADC2_HPDATA2_HPDATA0, 0 // register------------------------------------- .EQU ADC2_HPDATA3, 0x400006B0 // 0x4000 06B0 ADC2_HPDATA3 Bits------------------------------------- .EQU ADC2_HPDATA3_HPDATA15, 15 .EQU ADC2_HPDATA3_HPDATA14, 14 .EQU ADC2_HPDATA3_HPDATA13, 13 .EQU ADC2_HPDATA3_HPDATA12, 12 .EQU ADC2_HPDATA3_HPDATA11, 11 .EQU ADC2_HPDATA3_HPDATA10, 10 .EQU ADC2_HPDATA3_HPDATA9, 9 .EQU ADC2_HPDATA3_HPDATA8, 8 .EQU ADC2_HPDATA3_HPDATA7, 7 .EQU ADC2_HPDATA3_HPDATA6, 6 .EQU ADC2_HPDATA3_HPDATA5, 5 .EQU ADC2_HPDATA3_HPDATA4, 4 .EQU ADC2_HPDATA3_HPDATA3, 3 .EQU ADC2_HPDATA3_HPDATA2, 2 .EQU ADC2_HPDATA3_HPDATA1, 1 .EQU ADC2_HPDATA3_HPDATA0, 0 // register------------------------------------- .EQU ADC2_HPOFF0, 0x400006B4 // 0x4000 06B4 ADC2_HPOFF0 Bits------------------------------------- .EQU ADC2_HPOFF0_HPDOFF11, 11 .EQU ADC2_HPOFF0_HPDOFF10, 10 .EQU ADC2_HPOFF0_HPDOFF9, 9 .EQU ADC2_HPOFF0_HPDOFF8, 8 .EQU ADC2_HPOFF0_HPDOFF7, 7 .EQU ADC2_HPOFF0_HPDOFF6, 6 .EQU ADC2_HPOFF0_HPDOFF5, 5 .EQU ADC2_HPOFF0_HPDOFF4, 4 .EQU ADC2_HPOFF0_HPDOFF3, 3 .EQU ADC2_HPOFF0_HPDOFF2, 2 .EQU ADC2_HPOFF0_HPDOFF1, 1 .EQU ADC2_HPOFF0_HPDOFF0, 0 // register------------------------------------- .EQU ADC2_HPOFF1, 0x400006B8 // 0x4000 06B8 ADC2_HPOFF1 Bits------------------------------------- .EQU ADC2_HPOFF1_HPDOFF11, 11 .EQU ADC2_HPOFF1_HPDOFF10, 10 .EQU ADC2_HPOFF1_HPDOFF9, 9 .EQU ADC2_HPOFF1_HPDOFF8, 8 .EQU ADC2_HPOFF1_HPDOFF7, 7 .EQU ADC2_HPOFF1_HPDOFF6, 6 .EQU ADC2_HPOFF1_HPDOFF5, 5 .EQU ADC2_HPOFF1_HPDOFF4, 4 .EQU ADC2_HPOFF1_HPDOFF3, 3 .EQU ADC2_HPOFF1_HPDOFF2, 2 .EQU ADC2_HPOFF1_HPDOFF1, 1 .EQU ADC2_HPOFF1_HPDOFF0, 0 // register------------------------------------- .EQU ADC2_HPOFF2, 0x400006BC // 0x4000 06BC ADC2_HPOFF2 Bits------------------------------------- .EQU ADC2_HPOFF2_HPDOFF11, 11 .EQU ADC2_HPOFF2_HPDOFF10, 10 .EQU ADC2_HPOFF2_HPDOFF9, 9 .EQU ADC2_HPOFF2_HPDOFF8, 8 .EQU ADC2_HPOFF2_HPDOFF7, 7 .EQU ADC2_HPOFF2_HPDOFF6, 6 .EQU ADC2_HPOFF2_HPDOFF5, 5 .EQU ADC2_HPOFF2_HPDOFF4, 4 .EQU ADC2_HPOFF2_HPDOFF3, 3 .EQU ADC2_HPOFF2_HPDOFF2, 2 .EQU ADC2_HPOFF2_HPDOFF1, 1 .EQU ADC2_HPOFF2_HPDOFF0, 0 // register------------------------------------- .EQU ADC2_HPOFF3, 0x400006C0 // 0x4000 06C0 ADC2_HPOFF3 Bits------------------------------------- .EQU ADC2_HPOFF3_HPDOFF11, 11 .EQU ADC2_HPOFF3_HPDOFF10, 10 .EQU ADC2_HPOFF3_HPDOFF9, 9 .EQU ADC2_HPOFF3_HPDOFF8, 8 .EQU ADC2_HPOFF3_HPDOFF7, 7 .EQU ADC2_HPOFF3_HPDOFF6, 6 .EQU ADC2_HPOFF3_HPDOFF5, 5 .EQU ADC2_HPOFF3_HPDOFF4, 4 .EQU ADC2_HPOFF3_HPDOFF3, 3 .EQU ADC2_HPOFF3_HPDOFF2, 2 .EQU ADC2_HPOFF3_HPDOFF1, 1 .EQU ADC2_HPOFF3_HPDOFF0, 0 // register------------------------------------- .EQU ADC2_STATE, 0x400006D0 // 0x4000 06D0 ADC2_STATE Bits------------------------------------- .EQU ADC2_STATE_TRIMERROR1, 31 .EQU ADC2_STATE_TRIMERROR0, 30 .EQU ADC2_STATE_TRIMIBIASOPA, 27 .EQU ADC2_STATE_EOCIE, 13 .EQU ADC2_STATE_EOCIC, 12 .EQU ADC2_STATE_EOCIF, 11 .EQU ADC2_STATE_WDIE, 10 .EQU ADC2_STATE_HPENDIE, 9 .EQU ADC2_STATE_ENDIE, 8 .EQU ADC2_STATE_WDIC, 7 .EQU ADC2_STATE_HPENDIC, 6 .EQU ADC2_STATE_ENDIC, 5 .EQU ADC2_STATE_WDIF, 4 .EQU ADC2_STATE_HPENDIF, 3 .EQU ADC2_STATE_ENDIF, 2 .EQU ADC2_STATE_HPSTARTIF, 1 .EQU ADC2_STATE_STARTIF, 0 // register------------------------------------- .EQU ADC2_SCANCTL, 0x400006D8 // 0x4000 06D8 ADC2_SCANCTL Bits------------------------------------- .EQU ADC2_SCANCTL_SAMSEL3, 27 .EQU ADC2_SCANCTL_SAMSEL2, 26 .EQU ADC2_SCANCTL_SAMSEL1, 25 .EQU ADC2_SCANCTL_SAMSEL0, 24 .EQU ADC2_SCANCTL_WDCH6, 22 .EQU ADC2_SCANCTL_WDCH5, 21 .EQU ADC2_SCANCTL_WDCH4, 20 .EQU ADC2_SCANCTL_WDCH3, 19 .EQU ADC2_SCANCTL_WDCH2, 18 .EQU ADC2_SCANCTL_WDCH1, 17 .EQU ADC2_SCANCTL_WDCH0, 16 .EQU ADC2_SCANCTL_HSLEN1, 5 .EQU ADC2_SCANCTL_HSLEN0, 4 .EQU ADC2_SCANCTL_SLEN3, 3 .EQU ADC2_SCANCTL_SLEN2, 2 .EQU ADC2_SCANCTL_SLEN1, 1 .EQU ADC2_SCANCTL_SLEN0, 0 // register------------------------------------- .EQU ADC2_CCR, 0x400006DC // 0x4000 06DC ADC2_CCR Bits------------------------------------- .EQU ADC2_CCR_CCR8H, 17 .EQU ADC2_CCR_CCR8N, 16 .EQU ADC2_CCR_CCR7H, 15 .EQU ADC2_CCR_CCR7N, 14 .EQU ADC2_CCR_CCR6H, 13 .EQU ADC2_CCR_CCR6N, 12 .EQU ADC2_CCR_CCR5H, 11 .EQU ADC2_CCR_CCR5N, 10 .EQU ADC2_CCR_CCR4H, 9 .EQU ADC2_CCR_CCR4N, 8 .EQU ADC2_CCR_CCR3H, 7 .EQU ADC2_CCR_CCR3N, 6 .EQU ADC2_CCR_CCR2H, 5 .EQU ADC2_CCR_CCR2N, 4 .EQU ADC2_CCR_CCR1H, 3 .EQU ADC2_CCR_CCR1N, 2 .EQU ADC2_CCR_CCR0H, 1 .EQU ADC2_CCR_CCR0N, 0 // register------------------------------------- .EQU DAC0_CTL, 0x40000700 // 0x4000 0700 DAC0_CTL Bits------------------------------------- .EQU DAC0_CTL_DF, 15 .EQU DAC0_CTL_SWTRIG, 14 .EQU DAC0_CTL_MAS3, 13 .EQU DAC0_CTL_MAS2, 12 .EQU DAC0_CTL_MAS1, 11 .EQU DAC0_CTL_MAS0, 10 .EQU DAC0_CTL_WAVE1, 9 .EQU DAC0_CTL_WAVE0, 8 .EQU DAC0_CTL_TREVT3, 7 .EQU DAC0_CTL_TREVT2, 6 .EQU DAC0_CTL_TREVT1, 5 .EQU DAC0_CTL_TREVT0, 4 .EQU DAC0_CTL_TRIGEN, 3 .EQU DAC0_CTL_DE, 1 .EQU DAC0_CTL_EN, 0 // register------------------------------------- .EQU DAC0_DAHD, 0x40000704 // 0x4000 0704 DAC0_DAHD Bits------------------------------------- .EQU DAC0_DAHD_DAHD11, 11 .EQU DAC0_DAHD_DAHD10, 10 .EQU DAC0_DAHD_DAHD9, 9 .EQU DAC0_DAHD_DAHD8, 8 .EQU DAC0_DAHD_DAHD7, 7 .EQU DAC0_DAHD_DAHD6, 6 .EQU DAC0_DAHD_DAHD5, 5 .EQU DAC0_DAHD_DAHD4, 4 .EQU DAC0_DAHD_DAHD3, 3 .EQU DAC0_DAHD_DAHD2, 2 .EQU DAC0_DAHD_DAHD1, 1 .EQU DAC0_DAHD_DAHD0, 0 // register------------------------------------- .EQU DAC0_DATA, 0x40000708 // 0x4000 0708 DAC0_DATA Bits------------------------------------- .EQU DAC0_DATA_DATA11, 11 .EQU DAC0_DATA_DATA10, 10 .EQU DAC0_DATA_DATA9, 9 .EQU DAC0_DATA_DATA8, 8 .EQU DAC0_DATA_DATA7, 7 .EQU DAC0_DATA_DATA6, 6 .EQU DAC0_DATA_DATA5, 5 .EQU DAC0_DATA_DATA4, 4 .EQU DAC0_DATA_DATA3, 3 .EQU DAC0_DATA_DATA2, 2 .EQU DAC0_DATA_DATA1, 1 .EQU DAC0_DATA_DATA0, 0 // register------------------------------------- .EQU DAC0_CTL1, 0x4000070C // 0x4000 070C DAC0_CTL1 Bits------------------------------------- .EQU DAC0_CTL1_CLKDIV2, 11 .EQU DAC0_CTL1_CLKDIV1, 10 .EQU DAC0_CTL1_CLKDIV0, 9 .EQU DAC0_CTL1_BUFEN, 6 .EQU DAC0_CTL1_CLK1, 5 .EQU DAC0_CTL1_CLK0, 4 .EQU DAC0_CTL1_RFS1, 3 .EQU DAC0_CTL1_RFS0, 2 .EQU DAC0_CTL1_SEL1, 1 .EQU DAC0_CTL1_SEL0, 0 // register------------------------------------- .EQU DAC0_CAL, 0x40000714 // 0x4000 0714 DAC0_CAL Bits------------------------------------- .EQU DAC0_CAL_PPOTRIM10, 31 .EQU DAC0_CAL_PPOTRIM9, 30 .EQU DAC0_CAL_PPOTRIM8, 29 .EQU DAC0_CAL_PPOTRIM7, 28 .EQU DAC0_CAL_PPOTRIM6, 27 .EQU DAC0_CAL_PPOTRIM5, 26 .EQU DAC0_CAL_PPOTRIM4, 25 .EQU DAC0_CAL_PPOTRIM3, 24 .EQU DAC0_CAL_PPOTRIM2, 23 .EQU DAC0_CAL_PPOTRIM1, 22 .EQU DAC0_CAL_PPOTRIM0, 21 .EQU DAC0_CAL_FEND, 20 .EQU DAC0_CAL_FOVER, 19 .EQU DAC0_CAL_BIGBIASEN, 17 .EQU DAC0_CAL_TRIMSTART, 16 .EQU DAC0_CAL_BUFTRIM, 15 .EQU DAC0_CAL_CS3, 14 .EQU DAC0_CAL_CS2, 13 .EQU DAC0_CAL_CS1, 12 .EQU DAC0_CAL_CS0, 11 // register------------------------------------- .EQU DAC1_CTL, 0x40000780 // 0x4000 0780 DAC1_CTL Bits------------------------------------- .EQU DAC1_CTL_DF, 15 .EQU DAC1_CTL_SWTRIG, 14 .EQU DAC1_CTL_MAS3, 13 .EQU DAC1_CTL_MAS2, 12 .EQU DAC1_CTL_MAS1, 11 .EQU DAC1_CTL_MAS0, 10 .EQU DAC1_CTL_WAVE1, 9 .EQU DAC1_CTL_WAVE0, 8 .EQU DAC1_CTL_TREVT3, 7 .EQU DAC1_CTL_TREVT2, 6 .EQU DAC1_CTL_TREVT1, 5 .EQU DAC1_CTL_TREVT0, 4 .EQU DAC1_CTL_TRIGEN, 3 .EQU DAC1_CTL_DE, 1 .EQU DAC1_CTL_EN, 0 // register------------------------------------- .EQU DAC1_DAHD, 0x40000784 // 0x4000 0784 DAC1_DAHD Bits------------------------------------- .EQU DAC1_DAHD_DAHD11, 11 .EQU DAC1_DAHD_DAHD10, 10 .EQU DAC1_DAHD_DAHD9, 9 .EQU DAC1_DAHD_DAHD8, 8 .EQU DAC1_DAHD_DAHD7, 7 .EQU DAC1_DAHD_DAHD6, 6 .EQU DAC1_DAHD_DAHD5, 5 .EQU DAC1_DAHD_DAHD4, 4 .EQU DAC1_DAHD_DAHD3, 3 .EQU DAC1_DAHD_DAHD2, 2 .EQU DAC1_DAHD_DAHD1, 1 .EQU DAC1_DAHD_DAHD0, 0 // register------------------------------------- .EQU DAC1_DATA, 0x40000788 // 0x4000 0788 DAC1_DATA Bits------------------------------------- .EQU DAC1_DATA_DATA11, 11 .EQU DAC1_DATA_DATA10, 10 .EQU DAC1_DATA_DATA9, 9 .EQU DAC1_DATA_DATA8, 8 .EQU DAC1_DATA_DATA7, 7 .EQU DAC1_DATA_DATA6, 6 .EQU DAC1_DATA_DATA5, 5 .EQU DAC1_DATA_DATA4, 4 .EQU DAC1_DATA_DATA3, 3 .EQU DAC1_DATA_DATA2, 2 .EQU DAC1_DATA_DATA1, 1 .EQU DAC1_DATA_DATA0, 0 // register------------------------------------- .EQU DAC1_CTL1, 0x4000078C // 0x4000 078C DAC1_CTL1 Bits------------------------------------- .EQU DAC1_CTL1_CLKDIV2, 11 .EQU DAC1_CTL1_CLKDIV1, 10 .EQU DAC1_CTL1_CLKDIV0, 9 .EQU DAC1_CTL1_BUFEN, 6 .EQU DAC1_CTL1_CLK1, 5 .EQU DAC1_CTL1_CLK0, 4 .EQU DAC1_CTL1_RFS1, 3 .EQU DAC1_CTL1_RFS0, 2 .EQU DAC1_CTL1_SEL1, 1 .EQU DAC1_CTL1_SEL0, 0 // register------------------------------------- .EQU DAC1_CAL, 0x40000794 // 0x4000 0794 DAC1_CAL Bits------------------------------------- .EQU DAC1_CAL_PPOTRIM10, 31 .EQU DAC1_CAL_PPOTRIM9, 30 .EQU DAC1_CAL_PPOTRIM8, 29 .EQU DAC1_CAL_PPOTRIM7, 28 .EQU DAC1_CAL_PPOTRIM6, 27 .EQU DAC1_CAL_PPOTRIM5, 26 .EQU DAC1_CAL_PPOTRIM4, 25 .EQU DAC1_CAL_PPOTRIM3, 24 .EQU DAC1_CAL_PPOTRIM2, 23 .EQU DAC1_CAL_PPOTRIM1, 22 .EQU DAC1_CAL_PPOTRIM0, 21 .EQU DAC1_CAL_FEND, 20 .EQU DAC1_CAL_FOVER, 19 .EQU DAC1_CAL_BIGBIASEN, 17 .EQU DAC1_CAL_TRIMSTART, 16 .EQU DAC1_CAL_BUFTRIM, 15 .EQU DAC1_CAL_CS3, 14 .EQU DAC1_CAL_CS2, 13 .EQU DAC1_CAL_CS1, 12 .EQU DAC1_CAL_CS0, 11 // register------------------------------------- .EQU CMP_CTL0, 0x40000800 // 0x4000 0800 CMP_CTL0 Bits------------------------------------- .EQU CMP_CTL0_PMOD3, 31 .EQU CMP_CTL0_PMOD2, 30 .EQU CMP_CTL0_PMOD1, 29 .EQU CMP_CTL0_PMOD0, 28 .EQU CMP_CTL0_NMOD3, 27 .EQU CMP_CTL0_NMOD2, 26 .EQU CMP_CTL0_NMOD1, 25 .EQU CMP_CTL0_NMOD0, 24 .EQU CMP_CTL0_IFFEN, 19 .EQU CMP_CTL0_IFREN, 18 .EQU CMP_CTL0_FLTCS1, 17 .EQU CMP_CTL0_FLTCS0, 16 .EQU CMP_CTL0_FLTDIV7, 15 .EQU CMP_CTL0_FLTDIV6, 14 .EQU CMP_CTL0_FLTDIV5, 13 .EQU CMP_CTL0_FLTDIV4, 12 .EQU CMP_CTL0_FLTDIV3, 11 .EQU CMP_CTL0_FLTDIV2, 10 .EQU CMP_CTL0_FLTDIV1, 9 .EQU CMP_CTL0_FLTDIV0, 8 .EQU CMP_CTL0_WINCLKSEL, 7 .EQU CMP_CTL0_FLTCNT2, 6 .EQU CMP_CTL0_FLTCNT1, 5 .EQU CMP_CTL0_FLTCNT0, 4 .EQU CMP_CTL0_FLTEN, 3 .EQU CMP_CTL0_WINEN, 2 .EQU CMP_CTL0_POL, 1 // register------------------------------------- .EQU CMP_CTL1, 0x40000804 // 0x4000 0804 CMP_CTL1 Bits------------------------------------- .EQU CMP_CTL1_PMOD3, 31 .EQU CMP_CTL1_PMOD2, 30 .EQU CMP_CTL1_PMOD1, 29 .EQU CMP_CTL1_PMOD0, 28 .EQU CMP_CTL1_NMOD3, 27 .EQU CMP_CTL1_NMOD2, 26 .EQU CMP_CTL1_NMOD1, 25 .EQU CMP_CTL1_NMOD0, 24 .EQU CMP_CTL1_IFFEN, 19 .EQU CMP_CTL1_IFREN, 18 .EQU CMP_CTL1_FLTCS1, 17 .EQU CMP_CTL1_FLTCS0, 16 .EQU CMP_CTL1_FLTDIV7, 15 .EQU CMP_CTL1_FLTDIV6, 14 .EQU CMP_CTL1_FLTDIV5, 13 .EQU CMP_CTL1_FLTDIV4, 12 .EQU CMP_CTL1_FLTDIV3, 11 .EQU CMP_CTL1_FLTDIV2, 10 .EQU CMP_CTL1_FLTDIV1, 9 .EQU CMP_CTL1_FLTDIV0, 8 .EQU CMP_CTL1_WINCLKSEL, 7 .EQU CMP_CTL1_FLTCNT2, 6 .EQU CMP_CTL1_FLTCNT1, 5 .EQU CMP_CTL1_FLTCNT0, 4 .EQU CMP_CTL1_FLTEN, 3 .EQU CMP_CTL1_WINEN, 2 .EQU CMP_CTL1_POL, 1 // register------------------------------------- .EQU CMP_CTL2, 0x40000808 // 0x4000 0808 CMP_CTL2 Bits------------------------------------- .EQU CMP_CTL2_PMOD3, 31 .EQU CMP_CTL2_PMOD2, 30 .EQU CMP_CTL2_PMOD1, 29 .EQU CMP_CTL2_PMOD0, 28 .EQU CMP_CTL2_NMOD3, 27 .EQU CMP_CTL2_NMOD2, 26 .EQU CMP_CTL2_NMOD1, 25 .EQU CMP_CTL2_NMOD0, 24 .EQU CMP_CTL2_IFFEN, 19 .EQU CMP_CTL2_IFREN, 18 .EQU CMP_CTL2_FLTCS1, 17 .EQU CMP_CTL2_FLTCS0, 16 .EQU CMP_CTL2_FLTDIV7, 15 .EQU CMP_CTL2_FLTDIV6, 14 .EQU CMP_CTL2_FLTDIV5, 13 .EQU CMP_CTL2_FLTDIV4, 12 .EQU CMP_CTL2_FLTDIV3, 11 .EQU CMP_CTL2_FLTDIV2, 10 .EQU CMP_CTL2_FLTDIV1, 9 .EQU CMP_CTL2_FLTDIV0, 8 .EQU CMP_CTL2_WINCLKSEL, 7 .EQU CMP_CTL2_FLTCNT2, 6 .EQU CMP_CTL2_FLTCNT1, 5 .EQU CMP_CTL2_FLTCNT0, 4 .EQU CMP_CTL2_FLTEN, 3 .EQU CMP_CTL2_WINEN, 2 .EQU CMP_CTL2_POL, 1 // register------------------------------------- .EQU CMP_CTL3, 0x4000080C // 0x4000 080C CMP_CTL3 Bits------------------------------------- .EQU CMP_CTL3_PMOD3, 31 .EQU CMP_CTL3_PMOD2, 30 .EQU CMP_CTL3_PMOD1, 29 .EQU CMP_CTL3_PMOD0, 28 .EQU CMP_CTL3_NMOD3, 27 .EQU CMP_CTL3_NMOD2, 26 .EQU CMP_CTL3_NMOD1, 25 .EQU CMP_CTL3_NMOD0, 24 .EQU CMP_CTL3_IFFEN, 19 .EQU CMP_CTL3_IFREN, 18 .EQU CMP_CTL3_FLTCS1, 17 .EQU CMP_CTL3_FLTCS0, 16 .EQU CMP_CTL3_FLTDIV7, 15 .EQU CMP_CTL3_FLTDIV6, 14 .EQU CMP_CTL3_FLTDIV5, 13 .EQU CMP_CTL3_FLTDIV4, 12 .EQU CMP_CTL3_FLTDIV3, 11 .EQU CMP_CTL3_FLTDIV2, 10 .EQU CMP_CTL3_FLTDIV1, 9 .EQU CMP_CTL3_FLTDIV0, 8 .EQU CMP_CTL3_WINCLKSEL, 7 .EQU CMP_CTL3_FLTCNT2, 6 .EQU CMP_CTL3_FLTCNT1, 5 .EQU CMP_CTL3_FLTCNT0, 4 .EQU CMP_CTL3_FLTEN, 3 .EQU CMP_CTL3_WINEN, 2 .EQU CMP_CTL3_POL, 1 .EQU CMP_CTL3_EN, 0 // register------------------------------------- .EQU CMP_CTL4, 0x40000810 // 0x4000 0810 CMP_CTL4 Bits------------------------------------- .EQU CMP_CTL4_C3OUT, 31 .EQU CMP_CTL4_C2OUT, 30 .EQU CMP_CTL4_C1OUT, 29 .EQU CMP_CTL4_C0OUT, 28 .EQU CMP_CTL4_C3IF, 27 .EQU CMP_CTL4_C2IF, 26 .EQU CMP_CTL4_C1IF, 25 .EQU CMP_CTL4_C0IF, 24 .EQU CMP_CTL4_CIFMS, 23 .EQU CMP_CTL4_PWMCMP, 22 .EQU CMP_CTL4_CMPOUTASEL1, 21 .EQU CMP_CTL4_CMPOUTASEL0, 20 .EQU CMP_CTL4_C3IC, 19 .EQU CMP_CTL4_C2IC, 18 .EQU CMP_CTL4_C1IC, 17 .EQU CMP_CTL4_C0IC, 16 .EQU CMP_CTL4_C3IE, 15 .EQU CMP_CTL4_C2IE, 14 .EQU CMP_CTL4_C1IE, 13 .EQU CMP_CTL4_C0IE, 12 .EQU CMP_CTL4_CMP3ANALOGOUTEN, 11 .EQU CMP_CTL4_IOEN, 10 .EQU CMP_CTL4_CMPOUTDSEL1, 9 .EQU CMP_CTL4_CMPOUTDSEL0, 8 .EQU CMP_CTL4_DELAYVOL1, 7 .EQU CMP_CTL4_DELAYVOL0, 6 .EQU CMP_CTL4_HALLSEL, 5 .EQU CMP_CTL4_BEMFEN, 4 .EQU CMP_CTL4_FLTINSEL, 3 .EQU CMP_CTL4_C2EN, 2 .EQU CMP_CTL4_C1EN, 1 .EQU CMP_CTL4_C0EN, 0 // register------------------------------------- .EQU CMP_CTL5, 0x40000814 // 0x4000 0814 CMP_CTL5 Bits------------------------------------- .EQU CMP_CTL5_INSCM, 31 .EQU CMP_CTL5_MOTORSEL, 30 .EQU CMP_CTL5_COPSEL1, 29 .EQU CMP_CTL5_COPSEL0, 28 .EQU CMP_CTL5_CMP3DMAEN, 27 .EQU CMP_CTL5_CMP2DMAEN, 26 .EQU CMP_CTL5_CMP1DMAEN, 25 .EQU CMP_CTL5_CMP0DMAEN, 24 .EQU CMP_CTL5_CMP3DMAIF, 23 .EQU CMP_CTL5_CMP2DMAIF, 22 .EQU CMP_CTL5_CMP1DMAIF, 21 .EQU CMP_CTL5_CMP0DMAIF, 20 .EQU CMP_CTL5_CMPLPEN, 8 .EQU CMP_CTL5_C3TRGSEL1, 7 .EQU CMP_CTL5_C3TRGSEL0, 6 .EQU CMP_CTL5_C2TRGSEL1, 5 .EQU CMP_CTL5_C2TRGSEL0, 4 .EQU CMP_CTL5_C1TRGSEL1, 3 .EQU CMP_CTL5_C1TRGSEL0, 2 .EQU CMP_CTL5_C0TRGSEL1, 1 .EQU CMP_CTL5_C0TRGSEL0, 0 // register------------------------------------- .EQU CMP_TRIM0, 0x40000818 // 0x4000 0818 CMP_TRIM0 Bits------------------------------------- .EQU CMP_TRIM0_CMPTRIMLOWEN, 31 .EQU CMP_TRIM0_CMPTRIMHIGHEN, 30 .EQU CMP_TRIM0_C0TRIMP5, 13 .EQU CMP_TRIM0_C0TRIMP4, 12 .EQU CMP_TRIM0_C0TRIMP3, 11 .EQU CMP_TRIM0_C0TRIMP2, 10 .EQU CMP_TRIM0_C0TRIMP1, 9 .EQU CMP_TRIM0_C0TRIMP0, 8 .EQU CMP_TRIM0_C0TRIMPPOL, 7 .EQU CMP_TRIM0_C0TRIMN5, 6 .EQU CMP_TRIM0_C0TRIMN4, 5 .EQU CMP_TRIM0_C0TRIMN3, 4 .EQU CMP_TRIM0_C0TRIMN2, 3 .EQU CMP_TRIM0_C0TRIMN1, 2 .EQU CMP_TRIM0_C0TRIMN0, 1 .EQU CMP_TRIM0_C0TRIMNPOL, 0 // register------------------------------------- .EQU CMP_TRIM1, 0x4000081C // 0x4000 081C CMP_TRIM1 Bits------------------------------------- .EQU CMP_TRIM1_C1TRIMP5, 13 .EQU CMP_TRIM1_C1TRIMP4, 12 .EQU CMP_TRIM1_C1TRIMP3, 11 .EQU CMP_TRIM1_C1TRIMP2, 10 .EQU CMP_TRIM1_C1TRIMP1, 9 .EQU CMP_TRIM1_C1TRIMP0, 8 .EQU CMP_TRIM1_C1TRIMPPOL, 7 .EQU CMP_TRIM1_C1TRIMN5, 6 .EQU CMP_TRIM1_C1TRIMN4, 5 .EQU CMP_TRIM1_C1TRIMN3, 4 .EQU CMP_TRIM1_C1TRIMN2, 3 .EQU CMP_TRIM1_C1TRIMN1, 2 .EQU CMP_TRIM1_C1TRIMN0, 1 .EQU CMP_TRIM1_C1TRIMNPOL, 0 // register------------------------------------- .EQU CMP_TRIM2, 0x40000820 // 0x4000 0820 CMP_TRIM2 Bits------------------------------------- .EQU CMP_TRIM2_C2TRIMP5, 13 .EQU CMP_TRIM2_C2TRIMP4, 12 .EQU CMP_TRIM2_C2TRIMP3, 11 .EQU CMP_TRIM2_C2TRIMP2, 10 .EQU CMP_TRIM2_C2TRIMP1, 9 .EQU CMP_TRIM2_C2TRIMP0, 8 .EQU CMP_TRIM2_C2TRIMPPOL, 7 .EQU CMP_TRIM2_C2TRIMN5, 6 .EQU CMP_TRIM2_C2TRIMN4, 5 .EQU CMP_TRIM2_C2TRIMN3, 4 .EQU CMP_TRIM2_C2TRIMN2, 3 .EQU CMP_TRIM2_C2TRIMN1, 2 .EQU CMP_TRIM2_C2TRIMN0, 1 .EQU CMP_TRIM2_C2TRIMNPOL, 0 // register------------------------------------- .EQU CMP_TRIM3, 0x40000824 // 0x4000 0824 CMP_TRIM3 Bits------------------------------------- .EQU CMP_TRIM3_ENCMP3VREF1V, 31 .EQU CMP_TRIM3_VREF1VTRIM5, 30 .EQU CMP_TRIM3_VREF1VTRIM4, 29 .EQU CMP_TRIM3_VREF1VTRIM3, 28 .EQU CMP_TRIM3_VREF1VTRIM2, 27 .EQU CMP_TRIM3_VREF1VTRIM1, 26 .EQU CMP_TRIM3_VREF1VTRIM0, 25 .EQU CMP_TRIM3_C3TRIMP5, 13 .EQU CMP_TRIM3_C3TRIMP4, 12 .EQU CMP_TRIM3_C3TRIMP3, 11 .EQU CMP_TRIM3_C3TRIMP2, 10 .EQU CMP_TRIM3_C3TRIMP1, 9 .EQU CMP_TRIM3_C3TRIMP0, 8 .EQU CMP_TRIM3_C3TRIMPPOL, 7 .EQU CMP_TRIM3_C3TRIMN5, 6 .EQU CMP_TRIM3_C3TRIMN4, 5 .EQU CMP_TRIM3_C3TRIMN3, 4 .EQU CMP_TRIM3_C3TRIMN2, 3 .EQU CMP_TRIM3_C3TRIMN1, 2 .EQU CMP_TRIM3_C3TRIMN0, 1 .EQU CMP_TRIM3_C3TRIMNPOL, 0 // register------------------------------------- .EQU CMP_CTL6, 0x40000828 // 0x4000 0828 CMP_CTL6 Bits------------------------------------- .EQU CMP_CTL6_RREN, 31 .EQU CMP_CTL6_RRIE, 30 .EQU CMP_CTL6_FXPORTSEL, 29 .EQU CMP_CTL6_FXPCHSEL3, 28 .EQU CMP_CTL6_FXPCHSEL2, 27 .EQU CMP_CTL6_FXPCHSEL1, 26 .EQU CMP_CTL6_FXPCHSEL0, 25 .EQU CMP_CTL6_FXNCHSEL3, 24 .EQU CMP_CTL6_FXNCHSEL2, 23 .EQU CMP_CTL6_FXNCHSEL1, 22 .EQU CMP_CTL6_FXNCHSEL0, 21 .EQU CMP_CTL6_NSAM1, 20 .EQU CMP_CTL6_NSAM0, 19 .EQU CMP_CTL6_INITIALDLYMOD5, 18 .EQU CMP_CTL6_INITIALDLYMOD4, 17 .EQU CMP_CTL6_INITIALDLYMOD3, 16 .EQU CMP_CTL6_INITIALDLYMOD2, 15 .EQU CMP_CTL6_INITIALDLYMOD1, 14 .EQU CMP_CTL6_INITIALDLYMOD0, 13 .EQU CMP_CTL6_SCAN, 4 .EQU CMP_CTL6_LEN3, 3 .EQU CMP_CTL6_LEN2, 2 .EQU CMP_CTL6_LEN1, 1 .EQU CMP_CTL6_LEN0, 0 // register------------------------------------- .EQU CMP_PSCANSQ0, 0x4000082C // 0x4000 082C CMP_PSCANSQ0 Bits------------------------------------- .EQU CMP_PSCANSQ0_PSCAN7_3, 31 .EQU CMP_PSCANSQ0_PSCAN7_2, 30 .EQU CMP_PSCANSQ0_PSCAN7_1, 29 .EQU CMP_PSCANSQ0_PSCAN7_0, 28 .EQU CMP_PSCANSQ0_PSCAN6_3, 27 .EQU CMP_PSCANSQ0_PSCAN6_2, 26 .EQU CMP_PSCANSQ0_PSCAN6_1, 25 .EQU CMP_PSCANSQ0_PSCAN6_0, 24 .EQU CMP_PSCANSQ0_PSCAN5_3, 23 .EQU CMP_PSCANSQ0_PSCAN5_2, 22 .EQU CMP_PSCANSQ0_PSCAN5_1, 21 .EQU CMP_PSCANSQ0_PSCAN5_0, 20 .EQU CMP_PSCANSQ0_PSCAN4_3, 19 .EQU CMP_PSCANSQ0_PSCAN4_2, 18 .EQU CMP_PSCANSQ0_PSCAN4_1, 17 .EQU CMP_PSCANSQ0_PSCAN4_0, 16 .EQU CMP_PSCANSQ0_PSCAN3_3, 15 .EQU CMP_PSCANSQ0_PSCAN3_2, 14 .EQU CMP_PSCANSQ0_PSCAN3_1, 13 .EQU CMP_PSCANSQ0_PSCAN3_0, 12 .EQU CMP_PSCANSQ0_PSCAN2_3, 11 .EQU CMP_PSCANSQ0_PSCAN2_2, 10 .EQU CMP_PSCANSQ0_PSCAN2_1, 9 .EQU CMP_PSCANSQ0_PSCAN2_0, 8 .EQU CMP_PSCANSQ0_PSCAN1_3, 7 .EQU CMP_PSCANSQ0_PSCAN1_2, 6 .EQU CMP_PSCANSQ0_PSCAN1_1, 5 .EQU CMP_PSCANSQ0_PSCAN1_0, 4 .EQU CMP_PSCANSQ0_PSCAN0_3, 3 .EQU CMP_PSCANSQ0_PSCAN0_2, 2 .EQU CMP_PSCANSQ0_PSCAN0_1, 1 .EQU CMP_PSCANSQ0_PSCAN0_0, 0 // register------------------------------------- .EQU CMP_PSCANSQ1, 0x40000830 // 0x4000 0830 CMP_PSCANSQ1 Bits------------------------------------- .EQU CMP_PSCANSQ1_PSCAN15_3, 31 .EQU CMP_PSCANSQ1_PSCAN15_2, 30 .EQU CMP_PSCANSQ1_PSCAN15_1, 29 .EQU CMP_PSCANSQ1_PSCAN15_0, 28 .EQU CMP_PSCANSQ1_PSCAN14_3, 27 .EQU CMP_PSCANSQ1_PSCAN14_2, 26 .EQU CMP_PSCANSQ1_PSCAN14_1, 25 .EQU CMP_PSCANSQ1_PSCAN14_0, 24 .EQU CMP_PSCANSQ1_PSCAN13_3, 23 .EQU CMP_PSCANSQ1_PSCAN13_2, 22 .EQU CMP_PSCANSQ1_PSCAN13_1, 21 .EQU CMP_PSCANSQ1_PSCAN13_0, 20 .EQU CMP_PSCANSQ1_PSCAN12_3, 19 .EQU CMP_PSCANSQ1_PSCAN12_2, 18 .EQU CMP_PSCANSQ1_PSCAN12_1, 17 .EQU CMP_PSCANSQ1_PSCAN12_0, 16 .EQU CMP_PSCANSQ1_PSCAN11_3, 15 .EQU CMP_PSCANSQ1_PSCAN11_2, 14 .EQU CMP_PSCANSQ1_PSCAN11_1, 13 .EQU CMP_PSCANSQ1_PSCAN11_0, 12 .EQU CMP_PSCANSQ1_PSCAN10_3, 11 .EQU CMP_PSCANSQ1_PSCAN10_2, 10 .EQU CMP_PSCANSQ1_PSCAN10_1, 9 .EQU CMP_PSCANSQ1_PSCAN10_0, 8 .EQU CMP_PSCANSQ1_PSCAN9_3, 7 .EQU CMP_PSCANSQ1_PSCAN9_2, 6 .EQU CMP_PSCANSQ1_PSCAN9_1, 5 .EQU CMP_PSCANSQ1_PSCAN9_0, 4 .EQU CMP_PSCANSQ1_PSCAN8_3, 3 .EQU CMP_PSCANSQ1_PSCAN8_2, 2 .EQU CMP_PSCANSQ1_PSCAN8_1, 1 .EQU CMP_PSCANSQ1_PSCAN8_0, 0 // register------------------------------------- .EQU CMP_NSCANSQ0, 0x40000834 // 0x4000 0834 CMP_NSCANSQ0 Bits------------------------------------- .EQU CMP_NSCANSQ0_NSCAN7_3, 31 .EQU CMP_NSCANSQ0_NSCAN7_2, 30 .EQU CMP_NSCANSQ0_NSCAN7_1, 29 .EQU CMP_NSCANSQ0_NSCAN7_0, 28 .EQU CMP_NSCANSQ0_NSCAN6_3, 27 .EQU CMP_NSCANSQ0_NSCAN6_2, 26 .EQU CMP_NSCANSQ0_NSCAN6_1, 25 .EQU CMP_NSCANSQ0_NSCAN6_0, 24 .EQU CMP_NSCANSQ0_NSCAN5_3, 23 .EQU CMP_NSCANSQ0_NSCAN5_2, 22 .EQU CMP_NSCANSQ0_NSCAN5_1, 21 .EQU CMP_NSCANSQ0_NSCAN5_0, 20 .EQU CMP_NSCANSQ0_NSCAN4_3, 19 .EQU CMP_NSCANSQ0_NSCAN4_2, 18 .EQU CMP_NSCANSQ0_NSCAN4_1, 17 .EQU CMP_NSCANSQ0_NSCAN4_0, 16 .EQU CMP_NSCANSQ0_NSCAN3_3, 15 .EQU CMP_NSCANSQ0_NSCAN3_2, 14 .EQU CMP_NSCANSQ0_NSCAN3_1, 13 .EQU CMP_NSCANSQ0_NSCAN3_0, 12 .EQU CMP_NSCANSQ0_NSCAN2_3, 11 .EQU CMP_NSCANSQ0_NSCAN2_2, 10 .EQU CMP_NSCANSQ0_NSCAN2_1, 9 .EQU CMP_NSCANSQ0_NSCAN2_0, 8 .EQU CMP_NSCANSQ0_NSCAN1_3, 7 .EQU CMP_NSCANSQ0_NSCAN1_2, 6 .EQU CMP_NSCANSQ0_NSCAN1_1, 5 .EQU CMP_NSCANSQ0_NSCAN1_0, 4 .EQU CMP_NSCANSQ0_NSCAN0_3, 3 .EQU CMP_NSCANSQ0_NSCAN0_2, 2 .EQU CMP_NSCANSQ0_NSCAN0_1, 1 .EQU CMP_NSCANSQ0_NSCAN0_0, 0 // register------------------------------------- .EQU CMP_NSCANSQ1, 0x40000838 // 0x4000 0838 CMP_NSCANSQ1 Bits------------------------------------- .EQU CMP_NSCANSQ1_NSCAN15_3, 31 .EQU CMP_NSCANSQ1_NSCAN15_2, 30 .EQU CMP_NSCANSQ1_NSCAN15_1, 29 .EQU CMP_NSCANSQ1_NSCAN15_0, 28 .EQU CMP_NSCANSQ1_NSCAN14_3, 27 .EQU CMP_NSCANSQ1_NSCAN14_2, 26 .EQU CMP_NSCANSQ1_NSCAN14_1, 25 .EQU CMP_NSCANSQ1_NSCAN14_0, 24 .EQU CMP_NSCANSQ1_NSCAN13_3, 23 .EQU CMP_NSCANSQ1_NSCAN13_2, 22 .EQU CMP_NSCANSQ1_NSCAN13_1, 21 .EQU CMP_NSCANSQ1_NSCAN13_0, 20 .EQU CMP_NSCANSQ1_NSCAN12_3, 19 .EQU CMP_NSCANSQ1_NSCAN12_2, 18 .EQU CMP_NSCANSQ1_NSCAN12_1, 17 .EQU CMP_NSCANSQ1_NSCAN12_0, 16 .EQU CMP_NSCANSQ1_NSCAN11_3, 15 .EQU CMP_NSCANSQ1_NSCAN11_2, 14 .EQU CMP_NSCANSQ1_NSCAN11_1, 13 .EQU CMP_NSCANSQ1_NSCAN11_0, 12 .EQU CMP_NSCANSQ1_NSCAN10_3, 11 .EQU CMP_NSCANSQ1_NSCAN10_2, 10 .EQU CMP_NSCANSQ1_NSCAN10_1, 9 .EQU CMP_NSCANSQ1_NSCAN10_0, 8 .EQU CMP_NSCANSQ1_NSCAN9_3, 7 .EQU CMP_NSCANSQ1_NSCAN9_2, 6 .EQU CMP_NSCANSQ1_NSCAN9_1, 5 .EQU CMP_NSCANSQ1_NSCAN9_0, 4 .EQU CMP_NSCANSQ1_NSCAN8_3, 3 .EQU CMP_NSCANSQ1_NSCAN8_2, 2 .EQU CMP_NSCANSQ1_NSCAN8_1, 1 .EQU CMP_NSCANSQ1_NSCAN8_0, 0 // register------------------------------------- .EQU CMP_SR, 0x4000083C // 0x4000 083C CMP_SR Bits------------------------------------- .EQU CMP_SR_NCHOUT15, 31 .EQU CMP_SR_NCHOUT14, 30 .EQU CMP_SR_NCHOUT13, 29 .EQU CMP_SR_NCHOUT12, 28 .EQU CMP_SR_NCHOUT11, 27 .EQU CMP_SR_NCHOUT10, 26 .EQU CMP_SR_NCHOUT9, 25 .EQU CMP_SR_NCHOUT8, 24 .EQU CMP_SR_NCHOUT7, 23 .EQU CMP_SR_NCHOUT6, 22 .EQU CMP_SR_NCHOUT5, 21 .EQU CMP_SR_NCHOUT4, 20 .EQU CMP_SR_NCHOUT3, 19 .EQU CMP_SR_NCHOUT2, 18 .EQU CMP_SR_NCHOUT1, 17 .EQU CMP_SR_NCHOUT0, 16 .EQU CMP_SR_PCHOUT15, 15 .EQU CMP_SR_PCHOUT14, 14 .EQU CMP_SR_PCHOUT13, 13 .EQU CMP_SR_PCHOUT12, 12 .EQU CMP_SR_PCHOUT11, 11 .EQU CMP_SR_PCHOUT10, 10 .EQU CMP_SR_PCHOUT9, 9 .EQU CMP_SR_PCHOUT8, 8 .EQU CMP_SR_PCHOUT7, 7 .EQU CMP_SR_PCHOUT6, 6 .EQU CMP_SR_PCHOUT5, 5 .EQU CMP_SR_PCHOUT4, 4 .EQU CMP_SR_PCHOUT3, 3 .EQU CMP_SR_PCHOUT2, 2 .EQU CMP_SR_PCHOUT1, 1 .EQU CMP_SR_PCHOUT0, 0 // register------------------------------------- .EQU CMP_CHFLAG, 0x40000840 // 0x4000 0840 CMP_CHFLAG Bits------------------------------------- .EQU CMP_CHFLAG_NCHFLAG15, 31 .EQU CMP_CHFLAG_NCHFLAG14, 30 .EQU CMP_CHFLAG_NCHFLAG13, 29 .EQU CMP_CHFLAG_NCHFLAG12, 28 .EQU CMP_CHFLAG_NCHFLAG11, 27 .EQU CMP_CHFLAG_NCHFLAG10, 26 .EQU CMP_CHFLAG_NCHFLAG9, 25 .EQU CMP_CHFLAG_NCHFLAG8, 24 .EQU CMP_CHFLAG_NCHFLAG7, 23 .EQU CMP_CHFLAG_NCHFLAG6, 22 .EQU CMP_CHFLAG_NCHFLAG5, 21 .EQU CMP_CHFLAG_NCHFLAG4, 20 .EQU CMP_CHFLAG_NCHFLAG3, 19 .EQU CMP_CHFLAG_NCHFLAG2, 18 .EQU CMP_CHFLAG_NCHFLAG1, 17 .EQU CMP_CHFLAG_NCHFLAG0, 16 .EQU CMP_CHFLAG_PCHFLAG15, 15 .EQU CMP_CHFLAG_PCHFLAG14, 14 .EQU CMP_CHFLAG_PCHFLAG13, 13 .EQU CMP_CHFLAG_PCHFLAG12, 12 .EQU CMP_CHFLAG_PCHFLAG11, 11 .EQU CMP_CHFLAG_PCHFLAG10, 10 .EQU CMP_CHFLAG_PCHFLAG9, 9 .EQU CMP_CHFLAG_PCHFLAG8, 8 .EQU CMP_CHFLAG_PCHFLAG7, 7 .EQU CMP_CHFLAG_PCHFLAG6, 6 .EQU CMP_CHFLAG_PCHFLAG5, 5 .EQU CMP_CHFLAG_PCHFLAG4, 4 .EQU CMP_CHFLAG_PCHFLAG3, 3 .EQU CMP_CHFLAG_PCHFLAG2, 2 .EQU CMP_CHFLAG_PCHFLAG1, 1 .EQU CMP_CHFLAG_PCHFLAG0, 0 // register------------------------------------- .EQU CMP_CHIC, 0x40000844 // 0x4000 0844 CMP_CHIC Bits------------------------------------- .EQU CMP_CHIC_NCH15IC, 31 .EQU CMP_CHIC_NCH14IC, 30 .EQU CMP_CHIC_NCH13IC, 29 .EQU CMP_CHIC_NCH12IC, 28 .EQU CMP_CHIC_NCH11IC, 27 .EQU CMP_CHIC_NCH10IC, 26 .EQU CMP_CHIC_NCH9IC, 25 .EQU CMP_CHIC_NCH8IC, 24 .EQU CMP_CHIC_NCH7IC, 23 .EQU CMP_CHIC_NCH6IC, 22 .EQU CMP_CHIC_NCH5IC, 21 .EQU CMP_CHIC_NCH4IC, 20 .EQU CMP_CHIC_NCH3IC, 19 .EQU CMP_CHIC_NCH2IC, 18 .EQU CMP_CHIC_NCH1IC, 17 .EQU CMP_CHIC_NCH0IC, 16 .EQU CMP_CHIC_PCH15IC, 15 .EQU CMP_CHIC_PCH14IC, 14 .EQU CMP_CHIC_PCH13IC, 13 .EQU CMP_CHIC_PCH12IC, 12 .EQU CMP_CHIC_PCH11IC, 11 .EQU CMP_CHIC_PCH10IC, 10 .EQU CMP_CHIC_PCH9IC, 9 .EQU CMP_CHIC_PCH8IC, 8 .EQU CMP_CHIC_PCH7IC, 7 .EQU CMP_CHIC_PCH6IC, 6 .EQU CMP_CHIC_PCH5IC, 5 .EQU CMP_CHIC_PCH4IC, 4 .EQU CMP_CHIC_PCH3IC, 3 .EQU CMP_CHIC_PCH2IC, 2 .EQU CMP_CHIC_PCH1IC, 1 .EQU CMP_CHIC_PCH0IC, 0 // register------------------------------------- .EQU T0_CNT, 0x40000880 // 0x4000 0880 T0_CNT Bits------------------------------------- .EQU T0_CNT_TXCNT15, 15 .EQU T0_CNT_TXCNT14, 14 .EQU T0_CNT_TXCNT13, 13 .EQU T0_CNT_TXCNT12, 12 .EQU T0_CNT_TXCNT11, 11 .EQU T0_CNT_TXCNT10, 10 .EQU T0_CNT_TXCNT9, 9 .EQU T0_CNT_TXCNT8, 8 .EQU T0_CNT_TXCNT7, 7 .EQU T0_CNT_TXCNT6, 6 .EQU T0_CNT_TXCNT5, 5 .EQU T0_CNT_TXCNT4, 4 .EQU T0_CNT_TXCNT3, 3 .EQU T0_CNT_TXCNT2, 2 .EQU T0_CNT_TXCNT1, 1 .EQU T0_CNT_TXCNT0, 0 // register------------------------------------- .EQU T0_CTL1, 0x40000884 // 0x4000 0884 T0_CTL1 Bits------------------------------------- .EQU T0_CTL1_TXIF, 13 .EQU T0_CTL1_TXIE, 12 .EQU T0_CTL1_TXCMS2, 10 .EQU T0_CTL1_TXCMS1, 9 .EQU T0_CTL1_TXCMS0, 8 .EQU T0_CTL1_TXDIR, 7 .EQU T0_CTL1_TXCLK1, 6 .EQU T0_CTL1_TXCLK0, 5 .EQU T0_CTL1_TXSY, 3 .EQU T0_CTL1_TXCS, 1 .EQU T0_CTL1_TXEN, 0 // register------------------------------------- .EQU T0_CTL2, 0x40000888 // 0x4000 0888 T0_CTL2 Bits------------------------------------- .EQU T0_CTL2_TRGSEL1, 15 .EQU T0_CTL2_TRGSEL0, 14 .EQU T0_CTL2_TXUR, 13 .EQU T0_CTL2_TXMSSYNC, 12 .EQU T0_CTL2_TXTS3, 11 .EQU T0_CTL2_TXTS2, 10 .EQU T0_CTL2_TXTS1, 9 .EQU T0_CTL2_TXTS0, 8 .EQU T0_CTL2_TXSMS2, 7 .EQU T0_CTL2_TXSMS1, 6 .EQU T0_CTL2_TXSMS0, 5 .EQU T0_CTL2_TXMMS2, 4 .EQU T0_CTL2_TXMMS1, 3 .EQU T0_CTL2_TXMMS0, 2 .EQU T0_CTL2_TXUDEVT, 1 .EQU T0_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T0_PRSC, 0x4000088C // 0x4000 088C T0_PRSC Bits------------------------------------- .EQU T0_PRSC_TXCKS15, 15 .EQU T0_PRSC_TXCKS14, 14 .EQU T0_PRSC_TXCKS13, 13 .EQU T0_PRSC_TXCKS12, 12 .EQU T0_PRSC_TXCKS11, 11 .EQU T0_PRSC_TXCKS10, 10 .EQU T0_PRSC_TXCKS9, 9 .EQU T0_PRSC_TXCKS8, 8 .EQU T0_PRSC_TXCKS7, 7 .EQU T0_PRSC_TXCKS6, 6 .EQU T0_PRSC_TXCKS5, 5 .EQU T0_PRSC_TXCKS4, 4 .EQU T0_PRSC_TXCKS3, 3 .EQU T0_PRSC_TXCKS2, 2 .EQU T0_PRSC_TXCKS1, 1 .EQU T0_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T0_PPX, 0x40000890 // 0x4000 0890 T0_PPX Bits------------------------------------- .EQU T0_PPX_PPX15, 15 .EQU T0_PPX_PPX14, 14 .EQU T0_PPX_PPX13, 13 .EQU T0_PPX_PPX12, 12 .EQU T0_PPX_PPX11, 11 .EQU T0_PPX_PPX10, 10 .EQU T0_PPX_PPX9, 9 .EQU T0_PPX_PPX8, 8 .EQU T0_PPX_PPX7, 7 .EQU T0_PPX_PPX6, 6 .EQU T0_PPX_PPX5, 5 .EQU T0_PPX_PPX4, 4 .EQU T0_PPX_PPX3, 3 .EQU T0_PPX_PPX2, 2 .EQU T0_PPX_PPX1, 1 .EQU T0_PPX_PPX0, 0 // register------------------------------------- .EQU T0_UDTIM, 0x40000894 // 0x4000 0894 T0_UDTIM Bits------------------------------------- .EQU T0_UDTIM_TXUD7, 7 .EQU T0_UDTIM_TXUD6, 6 .EQU T0_UDTIM_TXUD5, 5 .EQU T0_UDTIM_TXUD4, 4 .EQU T0_UDTIM_TXUD3, 3 .EQU T0_UDTIM_TXUD2, 2 .EQU T0_UDTIM_TXUD1, 1 .EQU T0_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP0_C1, 0x400008A0 // 0x4000 08A0 CCP0_C1 Bits------------------------------------- .EQU CCP0_C1_CCPXCY15, 15 .EQU CCP0_C1_CCPXCY14, 14 .EQU CCP0_C1_CCPXCY13, 13 .EQU CCP0_C1_CCPXCY12, 12 .EQU CCP0_C1_CCPXCY11, 11 .EQU CCP0_C1_CCPXCY10, 10 .EQU CCP0_C1_CCPXCY9, 9 .EQU CCP0_C1_CCPXCY8, 8 .EQU CCP0_C1_CCPXCY7, 7 .EQU CCP0_C1_CCPXCY6, 6 .EQU CCP0_C1_CCPXCY5, 5 .EQU CCP0_C1_CCPXCY4, 4 .EQU CCP0_C1_CCPXCY3, 3 .EQU CCP0_C1_CCPXCY2, 2 .EQU CCP0_C1_CCPXCY1, 1 .EQU CCP0_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP0_C2, 0x400008A4 // 0x4000 08A4 CCP0_C2 Bits------------------------------------- .EQU CCP0_C2_CCPXCY15, 15 .EQU CCP0_C2_CCPXCY14, 14 .EQU CCP0_C2_CCPXCY13, 13 .EQU CCP0_C2_CCPXCY12, 12 .EQU CCP0_C2_CCPXCY11, 11 .EQU CCP0_C2_CCPXCY10, 10 .EQU CCP0_C2_CCPXCY9, 9 .EQU CCP0_C2_CCPXCY8, 8 .EQU CCP0_C2_CCPXCY7, 7 .EQU CCP0_C2_CCPXCY6, 6 .EQU CCP0_C2_CCPXCY5, 5 .EQU CCP0_C2_CCPXCY4, 4 .EQU CCP0_C2_CCPXCY3, 3 .EQU CCP0_C2_CCPXCY2, 2 .EQU CCP0_C2_CCPXCY1, 1 .EQU CCP0_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP0_C3, 0x400008A8 // 0x4000 08A8 CCP0_C3 Bits------------------------------------- .EQU CCP0_C3_CCPXCY15, 15 .EQU CCP0_C3_CCPXCY14, 14 .EQU CCP0_C3_CCPXCY13, 13 .EQU CCP0_C3_CCPXCY12, 12 .EQU CCP0_C3_CCPXCY11, 11 .EQU CCP0_C3_CCPXCY10, 10 .EQU CCP0_C3_CCPXCY9, 9 .EQU CCP0_C3_CCPXCY8, 8 .EQU CCP0_C3_CCPXCY7, 7 .EQU CCP0_C3_CCPXCY6, 6 .EQU CCP0_C3_CCPXCY5, 5 .EQU CCP0_C3_CCPXCY4, 4 .EQU CCP0_C3_CCPXCY3, 3 .EQU CCP0_C3_CCPXCY2, 2 .EQU CCP0_C3_CCPXCY1, 1 .EQU CCP0_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP0_C4, 0x400008AC // 0x4000 08AC CCP0_C4 Bits------------------------------------- .EQU CCP0_C4_CCPXCY15, 15 .EQU CCP0_C4_CCPXCY14, 14 .EQU CCP0_C4_CCPXCY13, 13 .EQU CCP0_C4_CCPXCY12, 12 .EQU CCP0_C4_CCPXCY11, 11 .EQU CCP0_C4_CCPXCY10, 10 .EQU CCP0_C4_CCPXCY9, 9 .EQU CCP0_C4_CCPXCY8, 8 .EQU CCP0_C4_CCPXCY7, 7 .EQU CCP0_C4_CCPXCY6, 6 .EQU CCP0_C4_CCPXCY5, 5 .EQU CCP0_C4_CCPXCY4, 4 .EQU CCP0_C4_CCPXCY3, 3 .EQU CCP0_C4_CCPXCY2, 2 .EQU CCP0_C4_CCPXCY1, 1 .EQU CCP0_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP0_SRIC, 0x400008B0 // 0x4000 08B0 CCP0_SRIC Bits------------------------------------- .EQU CCP0_SRIC_TXIC, 6 .EQU CCP0_SRIC_TXUIC, 5 .EQU CCP0_SRIC_TXTIC, 4 .EQU CCP0_SRIC_CC4IC, 3 .EQU CCP0_SRIC_CC3IC, 2 .EQU CCP0_SRIC_CC2IC, 1 .EQU CCP0_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP0_DF, 0x400008B4 // 0x4000 08B4 CCP0_DF Bits------------------------------------- .EQU CCP0_DF_TXUDF, 5 .EQU CCP0_DF_TXTDF, 4 .EQU CCP0_DF_CC4DF, 3 .EQU CCP0_DF_CC3DF, 2 .EQU CCP0_DF_CC2DF, 1 .EQU CCP0_DF_CC1DF, 0 // register------------------------------------- .EQU CCP0_CTL1, 0x400008C0 // 0x4000 08C0 CCP0_CTL1 Bits------------------------------------- .EQU CCP0_CTL1_CH4M3, 15 .EQU CCP0_CTL1_CH4M2, 14 .EQU CCP0_CTL1_CH4M1, 13 .EQU CCP0_CTL1_CH4M0, 12 .EQU CCP0_CTL1_CH3M3, 11 .EQU CCP0_CTL1_CH3M2, 10 .EQU CCP0_CTL1_CH3M1, 9 .EQU CCP0_CTL1_CH3M0, 8 .EQU CCP0_CTL1_CH2M3, 7 .EQU CCP0_CTL1_CH2M2, 6 .EQU CCP0_CTL1_CH2M1, 5 .EQU CCP0_CTL1_CH2M0, 4 .EQU CCP0_CTL1_CH1M3, 3 .EQU CCP0_CTL1_CH1M2, 2 .EQU CCP0_CTL1_CH1M1, 1 .EQU CCP0_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP0_R1, 0x400008C4 // 0x4000 08C4 CCP0_R1 Bits------------------------------------- .EQU CCP0_R1_CCPXRY15, 15 .EQU CCP0_R1_CCPXRY14, 14 .EQU CCP0_R1_CCPXRY13, 13 .EQU CCP0_R1_CCPXRY12, 12 .EQU CCP0_R1_CCPXRY11, 11 .EQU CCP0_R1_CCPXRY10, 10 .EQU CCP0_R1_CCPXRY9, 9 .EQU CCP0_R1_CCPXRY8, 8 .EQU CCP0_R1_CCPXRY7, 7 .EQU CCP0_R1_CCPXRY6, 6 .EQU CCP0_R1_CCPXRY5, 5 .EQU CCP0_R1_CCPXRY4, 4 .EQU CCP0_R1_CCPXRY3, 3 .EQU CCP0_R1_CCPXRY2, 2 .EQU CCP0_R1_CCPXRY1, 1 .EQU CCP0_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP0_R2, 0x400008C8 // 0x4000 08C8 CCP0_R2 Bits------------------------------------- .EQU CCP0_R2_CCPXRY15, 15 .EQU CCP0_R2_CCPXRY14, 14 .EQU CCP0_R2_CCPXRY13, 13 .EQU CCP0_R2_CCPXRY12, 12 .EQU CCP0_R2_CCPXRY11, 11 .EQU CCP0_R2_CCPXRY10, 10 .EQU CCP0_R2_CCPXRY9, 9 .EQU CCP0_R2_CCPXRY8, 8 .EQU CCP0_R2_CCPXRY7, 7 .EQU CCP0_R2_CCPXRY6, 6 .EQU CCP0_R2_CCPXRY5, 5 .EQU CCP0_R2_CCPXRY4, 4 .EQU CCP0_R2_CCPXRY3, 3 .EQU CCP0_R2_CCPXRY2, 2 .EQU CCP0_R2_CCPXRY1, 1 .EQU CCP0_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP0_R3, 0x400008CC // 0x4000 08CC CCP0_R3 Bits------------------------------------- .EQU CCP0_R3_CCPXRY15, 15 .EQU CCP0_R3_CCPXRY14, 14 .EQU CCP0_R3_CCPXRY13, 13 .EQU CCP0_R3_CCPXRY12, 12 .EQU CCP0_R3_CCPXRY11, 11 .EQU CCP0_R3_CCPXRY10, 10 .EQU CCP0_R3_CCPXRY9, 9 .EQU CCP0_R3_CCPXRY8, 8 .EQU CCP0_R3_CCPXRY7, 7 .EQU CCP0_R3_CCPXRY6, 6 .EQU CCP0_R3_CCPXRY5, 5 .EQU CCP0_R3_CCPXRY4, 4 .EQU CCP0_R3_CCPXRY3, 3 .EQU CCP0_R3_CCPXRY2, 2 .EQU CCP0_R3_CCPXRY1, 1 .EQU CCP0_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP0_R4, 0x400008D0 // 0x4000 08D0 CCP0_R4 Bits------------------------------------- .EQU CCP0_R4_CCPXRY15, 15 .EQU CCP0_R4_CCPXRY14, 14 .EQU CCP0_R4_CCPXRY13, 13 .EQU CCP0_R4_CCPXRY12, 12 .EQU CCP0_R4_CCPXRY11, 11 .EQU CCP0_R4_CCPXRY10, 10 .EQU CCP0_R4_CCPXRY9, 9 .EQU CCP0_R4_CCPXRY8, 8 .EQU CCP0_R4_CCPXRY7, 7 .EQU CCP0_R4_CCPXRY6, 6 .EQU CCP0_R4_CCPXRY5, 5 .EQU CCP0_R4_CCPXRY4, 4 .EQU CCP0_R4_CCPXRY3, 3 .EQU CCP0_R4_CCPXRY2, 2 .EQU CCP0_R4_CCPXRY1, 1 .EQU CCP0_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP0_CTL2, 0x400008D4 // 0x4000 08D4 CCP0_CTL2 Bits------------------------------------- .EQU CCP0_CTL2_PXOC4CE, 15 .EQU CCP0_CTL2_PXOC3CE, 14 .EQU CCP0_CTL2_PXOC2CE, 13 .EQU CCP0_CTL2_PXOC1CE, 12 .EQU CCP0_CTL2_PXASS1, 11 .EQU CCP0_CTL2_PXASS0, 10 .EQU CCP0_CTL2_TCKSEL1, 9 .EQU CCP0_CTL2_TCKSEL0, 8 .EQU CCP0_CTL2_PXOC4_1, 7 .EQU CCP0_CTL2_PXOC4_0, 6 .EQU CCP0_CTL2_PXOC3_1, 5 .EQU CCP0_CTL2_PXOC3_0, 4 .EQU CCP0_CTL2_PXOC2_1, 3 .EQU CCP0_CTL2_PXOC2_0, 2 .EQU CCP0_CTL2_PXOC1_1, 1 .EQU CCP0_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP0_CTL3, 0x400008D8 // 0x4000 08D8 CCP0_CTL3 Bits------------------------------------- .EQU CCP0_CTL3_PXSPMST, 15 .EQU CCP0_CTL3_PXPWMI, 14 .EQU CCP0_CTL3_PXXORM, 13 .EQU CCP0_CTL3_PXSPM, 12 .EQU CCP0_CTL3_TXTDE, 11 .EQU CCP0_CTL3_CC4DE, 10 .EQU CCP0_CTL3_CC3DE, 9 .EQU CCP0_CTL3_CC2DE, 8 .EQU CCP0_CTL3_CC1DE, 7 .EQU CCP0_CTL3_TXUDE, 6 .EQU CCP0_CTL3_TXUIE, 5 .EQU CCP0_CTL3_TXTIE, 4 .EQU CCP0_CTL3_CC4IE, 3 .EQU CCP0_CTL3_CC3IE, 2 .EQU CCP0_CTL3_CC2IE, 1 .EQU CCP0_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP0_EGIF, 0x400008DC // 0x4000 08DC CCP0_EGIF Bits------------------------------------- .EQU CCP0_EGIF_POSSEL, 13 .EQU CCP0_EGIF_PXSEL, 12 .EQU CCP0_EGIF_TXUIF, 11 .EQU CCP0_EGIF_TXTIF, 10 .EQU CCP0_EGIF_CC4IF, 9 .EQU CCP0_EGIF_CC3IF, 8 .EQU CCP0_EGIF_CC2IF, 7 .EQU CCP0_EGIF_CC1IF, 6 .EQU CCP0_EGIF_TXTRG, 5 .EQU CCP0_EGIF_CC4G, 4 .EQU CCP0_EGIF_CC3G, 3 .EQU CCP0_EGIF_CC2G, 2 .EQU CCP0_EGIF_CC1G, 1 .EQU CCP0_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU CT_ACFG, 0x40000900 // 0x4000 0900 CT_ACFG Bits------------------------------------- .EQU CT_ACFG_CTTEST2, 31 .EQU CT_ACFG_CTTEST1, 30 .EQU CT_ACFG_CTTEST0, 29 .EQU CT_ACFG_RECCMPEX, 28 .EQU CT_ACFG_SCANSGVAL, 26 .EQU CT_ACFG_COARSEMODE, 25 .EQU CT_ACFG_CTSPCH3, 24 .EQU CT_ACFG_CTSPCH2, 23 .EQU CT_ACFG_CTSPCH1, 22 .EQU CT_ACFG_CTSPCH0, 21 .EQU CT_ACFG_CTSTCH3, 20 .EQU CT_ACFG_CTSTCH2, 19 .EQU CT_ACFG_CTSTCH1, 18 .EQU CT_ACFG_CTSTCH0, 17 .EQU CT_ACFG_CTCTC2, 16 .EQU CT_ACFG_CTCTC1, 15 .EQU CT_ACFG_CTCTC0, 14 .EQU CT_ACFG_CTSCAN, 13 .EQU CT_ACFG_TMODE, 12 .EQU CT_ACFG_MUTUALMODE, 11 .EQU CT_ACFG_TOUCHEN, 10 .EQU CT_ACFG_RESVALIWIN, 8 .EQU CT_ACFG_GPIOCHARGEEN, 7 .EQU CT_ACFG_SNSCKEN, 6 .EQU CT_ACFG_VALCMPSEL, 5 .EQU CT_ACFG_CMPFILTDL2, 2 .EQU CT_ACFG_CMPFILTDL1, 1 .EQU CT_ACFG_CMPFILTDL0, 0 // register------------------------------------- .EQU CT_CMPCFG, 0x40000904 // 0x4000 0904 CT_CMPCFG Bits------------------------------------- .EQU CT_CMPCFG_TAZSKIP, 26 .EQU CT_CMPCFG_AZ1SKIP, 25 .EQU CT_CMPCFG_AZ0SKIP, 24 .EQU CT_CMPCFG_AZTIME7, 23 .EQU CT_CMPCFG_AZTIME6, 22 .EQU CT_CMPCFG_AZTIME5, 21 .EQU CT_CMPCFG_AZTIME4, 20 .EQU CT_CMPCFG_AZTIME3, 19 .EQU CT_CMPCFG_AZTIME2, 18 .EQU CT_CMPCFG_AZTIME1, 17 .EQU CT_CMPCFG_AZTIME0, 16 .EQU CT_CMPCFG_CMPPHASE, 15 .EQU CT_CMPCFG_HSDUMEN, 10 .EQU CT_CMPCFG_RECAZEN, 9 .EQU CT_CMPCFG_FBMODE, 8 .EQU CT_CMPCFG_RECCMPPHASE1, 7 .EQU CT_CMPCFG_RECCMPPHASE0, 6 .EQU CT_CMPCFG_RECCMPPOL1, 5 .EQU CT_CMPCFG_RECCMPPOL0, 4 .EQU CT_CMPCFG_RECCMPEN, 3 .EQU CT_CMPCFG_HSAZEN, 2 .EQU CT_CMPCFG_HSCMPINV, 1 .EQU CT_CMPCFG_HSCMPEN, 0 // register------------------------------------- .EQU CT_STIE, 0x40000908 // 0x4000 0908 CT_STIE Bits------------------------------------- .EQU CT_STIE_SCANIE, 13 .EQU CT_STIE_CONNORMIE, 12 .EQU CT_STIE_CONINITIE, 11 .EQU CT_STIE_WREGDONE, 8 .EQU CT_STIE_CTSENSE, 7 .EQU CT_STIE_SCANIF, 6 .EQU CT_STIE_CONNORMIF, 5 .EQU CT_STIE_CONINITIF, 4 .EQU CT_STIE_CHARGESIG, 3 .EQU CT_STIE_SYNHSCMPOUT, 2 .EQU CT_STIE_CONWST, 1 .EQU CT_STIE_SYNCSDCMPOUT, 0 // register------------------------------------- .EQU CT_SCANVALCFG0, 0x4000090C // 0x4000 090C CT_SCANVALCFG0 Bits------------------------------------- .EQU CT_SCANVALCFG0_SCANVAL1_15, 31 .EQU CT_SCANVALCFG0_SCANVAL1_14, 30 .EQU CT_SCANVALCFG0_SCANVAL1_13, 29 .EQU CT_SCANVALCFG0_SCANVAL1_12, 28 .EQU CT_SCANVALCFG0_SCANVAL1_11, 27 .EQU CT_SCANVALCFG0_SCANVAL1_10, 26 .EQU CT_SCANVALCFG0_SCANVAL1_9, 25 .EQU CT_SCANVALCFG0_SCANVAL1_8, 24 .EQU CT_SCANVALCFG0_SCANVAL1_7, 23 .EQU CT_SCANVALCFG0_SCANVAL1_6, 22 .EQU CT_SCANVALCFG0_SCANVAL1_5, 21 .EQU CT_SCANVALCFG0_SCANVAL1_4, 20 .EQU CT_SCANVALCFG0_SCANVAL1_3, 19 .EQU CT_SCANVALCFG0_SCANVAL1_2, 18 .EQU CT_SCANVALCFG0_SCANVAL1_1, 17 .EQU CT_SCANVALCFG0_SCANVAL1_0, 16 .EQU CT_SCANVALCFG0_SCANVAL0_15, 15 .EQU CT_SCANVALCFG0_SCANVAL0_14, 14 .EQU CT_SCANVALCFG0_SCANVAL0_13, 13 .EQU CT_SCANVALCFG0_SCANVAL0_12, 12 .EQU CT_SCANVALCFG0_SCANVAL0_11, 11 .EQU CT_SCANVALCFG0_SCANVAL0_10, 10 .EQU CT_SCANVALCFG0_SCANVAL0_9, 9 .EQU CT_SCANVALCFG0_SCANVAL0_8, 8 .EQU CT_SCANVALCFG0_SCANVAL0_7, 7 .EQU CT_SCANVALCFG0_SCANVAL0_6, 6 .EQU CT_SCANVALCFG0_SCANVAL0_5, 5 .EQU CT_SCANVALCFG0_SCANVAL0_4, 4 .EQU CT_SCANVALCFG0_SCANVAL0_3, 3 .EQU CT_SCANVALCFG0_SCANVAL0_2, 2 .EQU CT_SCANVALCFG0_SCANVAL0_1, 1 .EQU CT_SCANVALCFG0_SCANVAL0_0, 0 // register------------------------------------- .EQU CT_SCANVALCFG1, 0x40000910 // 0x4000 0910 CT_SCANVALCFG1 Bits------------------------------------- .EQU CT_SCANVALCFG1_SCANVAL3_15, 31 .EQU CT_SCANVALCFG1_SCANVAL3_14, 30 .EQU CT_SCANVALCFG1_SCANVAL3_13, 29 .EQU CT_SCANVALCFG1_SCANVAL3_12, 28 .EQU CT_SCANVALCFG1_SCANVAL3_11, 27 .EQU CT_SCANVALCFG1_SCANVAL3_10, 26 .EQU CT_SCANVALCFG1_SCANVAL3_9, 25 .EQU CT_SCANVALCFG1_SCANVAL3_8, 24 .EQU CT_SCANVALCFG1_SCANVAL3_7, 23 .EQU CT_SCANVALCFG1_SCANVAL3_6, 22 .EQU CT_SCANVALCFG1_SCANVAL3_5, 21 .EQU CT_SCANVALCFG1_SCANVAL3_4, 20 .EQU CT_SCANVALCFG1_SCANVAL3_3, 19 .EQU CT_SCANVALCFG1_SCANVAL3_2, 18 .EQU CT_SCANVALCFG1_SCANVAL3_1, 17 .EQU CT_SCANVALCFG1_SCANVAL3_0, 16 .EQU CT_SCANVALCFG1_SCANVAL2_15, 15 .EQU CT_SCANVALCFG1_SCANVAL2_14, 14 .EQU CT_SCANVALCFG1_SCANVAL2_13, 13 .EQU CT_SCANVALCFG1_SCANVAL2_12, 12 .EQU CT_SCANVALCFG1_SCANVAL2_11, 11 .EQU CT_SCANVALCFG1_SCANVAL2_10, 10 .EQU CT_SCANVALCFG1_SCANVAL2_9, 9 .EQU CT_SCANVALCFG1_SCANVAL2_8, 8 .EQU CT_SCANVALCFG1_SCANVAL2_7, 7 .EQU CT_SCANVALCFG1_SCANVAL2_6, 6 .EQU CT_SCANVALCFG1_SCANVAL2_5, 5 .EQU CT_SCANVALCFG1_SCANVAL2_4, 4 .EQU CT_SCANVALCFG1_SCANVAL2_3, 3 .EQU CT_SCANVALCFG1_SCANVAL2_2, 2 .EQU CT_SCANVALCFG1_SCANVAL2_1, 1 .EQU CT_SCANVALCFG1_SCANVAL2_0, 0 // register------------------------------------- .EQU CT_CONSAM, 0x40000914 // 0x4000 0914 CT_CONSAM Bits------------------------------------- .EQU CT_CONSAM_CONNORM15, 31 .EQU CT_CONSAM_CONNORM14, 30 .EQU CT_CONSAM_CONNORM13, 29 .EQU CT_CONSAM_CONNORM12, 28 .EQU CT_CONSAM_CONNORM11, 27 .EQU CT_CONSAM_CONNORM10, 26 .EQU CT_CONSAM_CONNORM9, 25 .EQU CT_CONSAM_CONNORM8, 24 .EQU CT_CONSAM_CONNORM7, 23 .EQU CT_CONSAM_CONNORM6, 22 .EQU CT_CONSAM_CONNORM5, 21 .EQU CT_CONSAM_CONNORM4, 20 .EQU CT_CONSAM_CONNORM3, 19 .EQU CT_CONSAM_CONNORM2, 18 .EQU CT_CONSAM_CONNORM1, 17 .EQU CT_CONSAM_CONNORM0, 16 .EQU CT_CONSAM_CONINIT15, 15 .EQU CT_CONSAM_CONINIT14, 14 .EQU CT_CONSAM_CONINIT13, 13 .EQU CT_CONSAM_CONINIT12, 12 .EQU CT_CONSAM_CONINIT11, 11 .EQU CT_CONSAM_CONINIT10, 10 .EQU CT_CONSAM_CONINIT9, 9 .EQU CT_CONSAM_CONINIT8, 8 .EQU CT_CONSAM_CONINIT7, 7 .EQU CT_CONSAM_CONINIT6, 6 .EQU CT_CONSAM_CONINIT5, 5 .EQU CT_CONSAM_CONINIT4, 4 .EQU CT_CONSAM_CONINIT3, 3 .EQU CT_CONSAM_CONINIT2, 2 .EQU CT_CONSAM_CONINIT1, 1 .EQU CT_CONSAM_CONINIT0, 0 // register------------------------------------- .EQU CT_RESULT, 0x40000918 // 0x4000 0918 CT_RESULT Bits------------------------------------- .EQU CT_RESULT_RESULTVAL2_15, 31 .EQU CT_RESULT_RESULTVAL2_14, 30 .EQU CT_RESULT_RESULTVAL2_13, 29 .EQU CT_RESULT_RESULTVAL2_12, 28 .EQU CT_RESULT_RESULTVAL2_11, 27 .EQU CT_RESULT_RESULTVAL2_10, 26 .EQU CT_RESULT_RESULTVAL2_9, 25 .EQU CT_RESULT_RESULTVAL2_8, 24 .EQU CT_RESULT_RESULTVAL2_7, 23 .EQU CT_RESULT_RESULTVAL2_6, 22 .EQU CT_RESULT_RESULTVAL2_5, 21 .EQU CT_RESULT_RESULTVAL2_4, 20 .EQU CT_RESULT_RESULTVAL2_3, 19 .EQU CT_RESULT_RESULTVAL2_2, 18 .EQU CT_RESULT_RESULTVAL2_1, 17 .EQU CT_RESULT_RESULTVAL2_0, 16 .EQU CT_RESULT_RESULTVAL1_15, 15 .EQU CT_RESULT_RESULTVAL1_14, 14 .EQU CT_RESULT_RESULTVAL1_13, 13 .EQU CT_RESULT_RESULTVAL1_12, 12 .EQU CT_RESULT_RESULTVAL1_11, 11 .EQU CT_RESULT_RESULTVAL1_10, 10 .EQU CT_RESULT_RESULTVAL1_9, 9 .EQU CT_RESULT_RESULTVAL1_8, 8 .EQU CT_RESULT_RESULTVAL1_7, 7 .EQU CT_RESULT_RESULTVAL1_6, 6 .EQU CT_RESULT_RESULTVAL1_5, 5 .EQU CT_RESULT_RESULTVAL1_4, 4 .EQU CT_RESULT_RESULTVAL1_3, 3 .EQU CT_RESULT_RESULTVAL1_2, 2 .EQU CT_RESULT_RESULTVAL1_1, 1 .EQU CT_RESULT_RESULTVAL1_0, 0 // register------------------------------------- .EQU CT_STATE, 0x4000091C // 0x4000 091C CT_STATE Bits------------------------------------- .EQU CT_STATE_TCHANNEL3, 31 .EQU CT_STATE_TCHANNEL2, 30 .EQU CT_STATE_TCHANNEL1, 29 .EQU CT_STATE_TCHANNEL0, 28 .EQU CT_STATE_SYNCONSTATE3, 27 .EQU CT_STATE_SYNCONSTATE2, 26 .EQU CT_STATE_SYNCONSTATE1, 25 .EQU CT_STATE_SYNCONSTATE0, 24 .EQU CT_STATE_BADSENSECNT7, 23 .EQU CT_STATE_BADSENSECNT6, 22 .EQU CT_STATE_BADSENSECNT5, 21 .EQU CT_STATE_BADSENSECNT4, 20 .EQU CT_STATE_BADSENSECNT3, 19 .EQU CT_STATE_BADSENSECNT2, 18 .EQU CT_STATE_BADSENSECNT1, 17 .EQU CT_STATE_BADSENSECNT0, 16 .EQU CT_STATE_SYNSTATECNT15, 15 .EQU CT_STATE_SYNSTATECNT14, 14 .EQU CT_STATE_SYNSTATECNT13, 13 .EQU CT_STATE_SYNSTATECNT12, 12 .EQU CT_STATE_SYNSTATECNT11, 11 .EQU CT_STATE_SYNSTATECNT10, 10 .EQU CT_STATE_SYNSTATECNT9, 9 .EQU CT_STATE_SYNSTATECNT8, 8 .EQU CT_STATE_SYNSTATECNT7, 7 .EQU CT_STATE_SYNSTATECNT6, 6 .EQU CT_STATE_SYNSTATECNT5, 5 .EQU CT_STATE_SYNSTATECNT4, 4 .EQU CT_STATE_SYNSTATECNT3, 3 .EQU CT_STATE_SYNSTATECNT2, 2 .EQU CT_STATE_SYNSTATECNT1, 1 .EQU CT_STATE_SYNSTATECNT0, 0 // register------------------------------------- .EQU CT_LFSRCTL, 0x40000920 // 0x4000 0920 CT_LFSRCTL Bits------------------------------------- .EQU CT_LFSRCTL_PDCKSEL, 24 .EQU CT_LFSRCTL_SNSCKSEL1, 23 .EQU CT_LFSRCTL_SNSCKSEL0, 22 .EQU CT_LFSRCTL_LFSRBITUSE1, 21 .EQU CT_LFSRCTL_LFSRBITUSE0, 20 .EQU CT_LFSRCTL_LFSRMSBSEL, 19 .EQU CT_LFSRCTL_LFSRSHIFT3, 18 .EQU CT_LFSRCTL_LFSRSHIFT2, 17 .EQU CT_LFSRCTL_LFSRSHIFT1, 16 .EQU CT_LFSRCTL_LFSRSHIFT0, 15 .EQU CT_LFSRCTL_LFSRSIZE2, 14 .EQU CT_LFSRCTL_LFSRSIZE1, 13 .EQU CT_LFSRCTL_LFSRSIZE0, 12 .EQU CT_LFSRCTL_SNSDIV11, 11 .EQU CT_LFSRCTL_SNSDIV10, 10 .EQU CT_LFSRCTL_SNSDIV9, 9 .EQU CT_LFSRCTL_SNSDIV8, 8 .EQU CT_LFSRCTL_SNSDIV7, 7 .EQU CT_LFSRCTL_SNSDIV6, 6 .EQU CT_LFSRCTL_SNSDIV5, 5 .EQU CT_LFSRCTL_SNSDIV4, 4 .EQU CT_LFSRCTL_SNSDIV3, 3 .EQU CT_LFSRCTL_SNSDIV2, 2 .EQU CT_LFSRCTL_SNSDIV1, 1 .EQU CT_LFSRCTL_SNSDIV0, 0 // register------------------------------------- .EQU CT_SNSWID, 0x40000924 // 0x4000 0924 CT_SNSWID Bits------------------------------------- .EQU CT_SNSWID_SELWID, 15 .EQU CT_SNSWID_PHI10VERLAP, 14 .EQU CT_SNSWID_PHI20VERLAP, 13 .EQU CT_SNSWID_SNSPOL, 12 .EQU CT_SNSWID_SNSWID11, 11 .EQU CT_SNSWID_SNSWID10, 10 .EQU CT_SNSWID_SNSWID9, 9 .EQU CT_SNSWID_SNSWID8, 8 .EQU CT_SNSWID_SNSWID7, 7 .EQU CT_SNSWID_SNSWID6, 6 .EQU CT_SNSWID_SNSWID5, 5 .EQU CT_SNSWID_SNSWID4, 4 .EQU CT_SNSWID_SNSWID3, 3 .EQU CT_SNSWID_SNSWID2, 2 .EQU CT_SNSWID_SNSWID1, 1 .EQU CT_SNSWID_SNSWID0, 0 // register------------------------------------- .EQU CT_REFBUF, 0x40000928 // 0x4000 0928 CT_REFBUF Bits------------------------------------- .EQU CT_REFBUF_REFISHRINK, 31 .EQU CT_REFBUF_REFBYPASS, 30 .EQU CT_REFBUF_VREFLSEL4, 29 .EQU CT_REFBUF_VREFLSEL3, 28 .EQU CT_REFBUF_VREFLSEL2, 27 .EQU CT_REFBUF_VREFLSEL1, 26 .EQU CT_REFBUF_VREFLSEL0, 25 .EQU CT_REFBUF_REFGAIN4, 24 .EQU CT_REFBUF_REFGAIN3, 23 .EQU CT_REFBUF_REFGAIN2, 22 .EQU CT_REFBUF_REFGAIN1, 21 .EQU CT_REFBUF_REFGAIN0, 20 .EQU CT_REFBUF_REFGENEN, 19 .EQU CT_REFBUF_REFFOLLEN, 18 .EQU CT_REFBUF_REFIBOOST1, 17 .EQU CT_REFBUF_REFIBOOST0, 16 .EQU CT_REFBUF_REFVDDEN, 15 .EQU CT_REFBUF_BUFIBOOST1, 3 .EQU CT_REFBUF_BUFIBOOST0, 2 .EQU CT_REFBUF_BUFISHRINK, 1 .EQU CT_REFBUF_BUFEN, 0 // register------------------------------------- .EQU CT_IDACCTL0, 0x4000092C // 0x4000 092C CT_IDACCTL0 Bits------------------------------------- .EQU CT_IDACCTL0_IDACSBIASEN, 31 .EQU CT_IDACCTL0_IAEXTDUMEN, 30 .EQU CT_IDACCTL0_IDACAEN, 29 .EQU CT_IDACCTL0_IARANGE1, 28 .EQU CT_IDACCTL0_IARANGE0, 27 .EQU CT_IDACCTL0_IAVAL6, 26 .EQU CT_IDACCTL0_IAVAL5, 25 .EQU CT_IDACCTL0_IAVAL4, 24 .EQU CT_IDACCTL0_IAVAL3, 23 .EQU CT_IDACCTL0_IAVAL2, 22 .EQU CT_IDACCTL0_IAVAL1, 21 .EQU CT_IDACCTL0_IAVAL0, 20 .EQU CT_IDACCTL0_IAPOL1, 19 .EQU CT_IDACCTL0_IAPOL0, 18 .EQU CT_IDACCTL0_IAPOLDYN, 17 .EQU CT_IDACCTL0_IASWMODE2, 16 .EQU CT_IDACCTL0_IASWMODE1, 15 .EQU CT_IDACCTL0_IASWMODE0, 14 .EQU CT_IDACCTL0_IALEG2MODE, 13 .EQU CT_IDACCTL0_IALEG2MDCTL, 12 .EQU CT_IDACCTL0_IALEG1MODE, 11 .EQU CT_IDACCTL0_IALEG1MDCTL, 10 .EQU CT_IDACCTL0_IALEG2EN, 9 .EQU CT_IDACCTL0_IALEG1EN, 8 .EQU CT_IDACCTL0_IDACTRIM7, 7 .EQU CT_IDACCTL0_IDACTRIM6, 6 .EQU CT_IDACCTL0_IDACTRIM5, 5 .EQU CT_IDACCTL0_IDACTRIM4, 4 .EQU CT_IDACCTL0_IDACTRIM3, 3 .EQU CT_IDACCTL0_IDACTRIM2, 2 .EQU CT_IDACCTL0_IDACTRIM1, 1 .EQU CT_IDACCTL0_IDACTRIM0, 0 // register------------------------------------- .EQU CT_IDACCTL1, 0x40000930 // 0x4000 0930 CT_IDACCTL1 Bits------------------------------------- .EQU CT_IDACCTL1_IDACPCEN, 31 .EQU CT_IDACCTL1_IBEXTDUMEN, 30 .EQU CT_IDACCTL1_IDACBEN, 29 .EQU CT_IDACCTL1_IBRANGE1, 28 .EQU CT_IDACCTL1_IBRANGE0, 27 .EQU CT_IDACCTL1_IBVAL6, 26 .EQU CT_IDACCTL1_IBVAL5, 25 .EQU CT_IDACCTL1_IBVAL4, 24 .EQU CT_IDACCTL1_IBVAL3, 23 .EQU CT_IDACCTL1_IBVAL2, 22 .EQU CT_IDACCTL1_IBVAL1, 21 .EQU CT_IDACCTL1_IBVAL0, 20 .EQU CT_IDACCTL1_IBPOL1, 19 .EQU CT_IDACCTL1_IBPOL0, 18 .EQU CT_IDACCTL1_LBPOLDYN, 17 .EQU CT_IDACCTL1_IBSWMODE2, 16 .EQU CT_IDACCTL1_IBSWMODE1, 15 .EQU CT_IDACCTL1_IBSWMODE0, 14 .EQU CT_IDACCTL1_IBLEG2MODE, 13 .EQU CT_IDACCTL1_IBLEG2MDCTL, 12 .EQU CT_IDACCTL1_IBLEG1MODE, 11 .EQU CT_IDACCTL1_IBLEG1MDCTL, 10 .EQU CT_IDACCTL1_IBLEG2EN, 9 .EQU CT_IDACCTL1_IBLEG1EN, 8 .EQU CT_IDACCTL1_LBGPEN, 7 .EQU CT_IDACCTL1_LAGPEN, 6 .EQU CT_IDACCTL1_IBHSCMPEN, 5 // register------------------------------------- .EQU CT_SWCTL3, 0x40000934 // 0x4000 0934 CT_SWCTL3 Bits------------------------------------- .EQU CT_SWCTL3_SWSMTB1, 31 .EQU CT_SWCTL3_SWSMTB0, 30 .EQU CT_SWCTL3_SWHMTB1, 29 .EQU CT_SWCTL3_SWHMTB0, 28 .EQU CT_SWCTL3_SWSMBB1, 27 .EQU CT_SWCTL3_SWSMBB0, 26 .EQU CT_SWCTL3_SWIAIB, 25 .EQU CT_SWCTL3_SWIBCB, 24 .EQU CT_SWCTL3_SWBAID, 23 .EQU CT_SWCTL3_SWBBID, 22 .EQU CT_SWCTL3_SWREFSEL1, 21 .EQU CT_SWCTL3_SWREFSEL0, 20 .EQU CT_SWCTL3_SWBBPD2, 19 .EQU CT_SWCTL3_SWBBPD1, 18 .EQU CT_SWCTL3_SWBBPD0, 17 .EQU CT_SWCTL3_SWBBPU2, 16 .EQU CT_SWCTL3_SWBBPU1, 15 .EQU CT_SWCTL3_SWBBPU0, 14 .EQU CT_SWCTL3_SWBAPD2, 13 .EQU CT_SWCTL3_SWBAPD1, 12 .EQU CT_SWCTL3_SWBAPD0, 11 .EQU CT_SWCTL3_SWBAPU2, 10 .EQU CT_SWCTL3_SWBAPU1, 9 .EQU CT_SWCTL3_SWBAPU0, 8 .EQU CT_SWCTL3_RESBBPD1, 7 .EQU CT_SWCTL3_RESBBPD0, 6 .EQU CT_SWCTL3_RESBBPU1, 5 .EQU CT_SWCTL3_RESBBPU0, 4 .EQU CT_SWCTL3_RESBAPD1, 3 .EQU CT_SWCTL3_RESBAPD0, 2 .EQU CT_SWCTL3_RESBAPU1, 1 .EQU CT_SWCTL3_RESBAPU0, 0 // register------------------------------------- .EQU CT_SWCTL2, 0x40000938 // 0x4000 0938 CT_SWCTL2 Bits------------------------------------- .EQU CT_SWCTL2_SWSMOP, 31 .EQU CT_SWCTL2_SWSMCM1, 30 .EQU CT_SWCTL2_SWSMCM0, 29 .EQU CT_SWCTL2_SWSMCT1, 28 .EQU CT_SWCTL2_SWSMCT0, 27 .EQU CT_SWCTL2_SWSMBA1, 26 .EQU CT_SWCTL2_SWSMBA0, 25 .EQU CT_SWCTL2_SWSMCA, 24 .EQU CT_SWCTL2_SWSMCB, 23 .EQU CT_SWCTL2_SWSMVH, 22 .EQU CT_SWCTL2_SWSMCG, 21 .EQU CT_SWCTL2_SWSMXT, 20 .EQU CT_SWCTL2_SWSMSH, 19 .EQU CT_SWCTL2_SWSMTA1, 18 .EQU CT_SWCTL2_SWSMTA0, 17 .EQU CT_SWCTL2_SWSNBU, 16 .EQU CT_SWCTL2_SWSNVL, 15 .EQU CT_SWCTL2_SWSNVH, 14 .EQU CT_SWCTL2_SWHNBU, 13 .EQU CT_SWCTL2_SWHNBB, 12 .EQU CT_SWCTL2_SWHNBA, 11 .EQU CT_SWCTL2_SWHNVL, 10 .EQU CT_SWCTL2_SWHNVH, 9 .EQU CT_SWCTL2_SWHMTA1, 8 .EQU CT_SWCTL2_SWHMTA0, 7 .EQU CT_SWCTL2_SWHMCG, 6 .EQU CT_SWCTL2_SWHMCB, 5 .EQU CT_SWCTL2_SWHMCA, 4 .EQU CT_SWCTL2_SWHMBB, 3 .EQU CT_SWCTL2_SWHMCT, 1 .EQU CT_SWCTL2_SWHMCM, 0 // register------------------------------------- .EQU CT_SWCTL1, 0x4000093C // 0x4000 093C CT_SWCTL1 Bits------------------------------------- .EQU CT_SWCTL1_FXIDACAND, 31 .EQU CT_SWCTL1_SWBUCT1, 27 .EQU CT_SWCTL1_SWBUCT0, 26 .EQU CT_SWCTL1_SWBUHI, 25 .EQU CT_SWCTL1_SWBULO, 24 .EQU CT_SWCTL1_SWBUBY, 23 .EQU CT_SWCTL1_SWCTCB1, 22 .EQU CT_SWCTL1_SWCTCB0, 21 .EQU CT_SWCTL1_SWIBCM2, 20 .EQU CT_SWCTL1_SWIBCM1, 19 .EQU CT_SWCTL1_SWIBCM0, 18 .EQU CT_SWCTL1_SWIACT2, 17 .EQU CT_SWCTL1_SWIACT1, 16 .EQU CT_SWCTL1_SWIACT0, 15 .EQU CT_SWCTL1_SWIACM2, 14 .EQU CT_SWCTL1_SWIACM1, 13 .EQU CT_SWCTL1_SWIACM0, 12 .EQU CT_SWCTL1_SWCTBA2, 11 .EQU CT_SWCTL1_SWCTBA1, 10 .EQU CT_SWCTL1_SWCTBA0, 9 .EQU CT_SWCTL1_SWCTCP, 8 .EQU CT_SWCTL1_RESCTCP1, 7 .EQU CT_SWCTL1_RESCTCP0, 6 .EQU CT_SWCTL1_SWCMBA2, 5 .EQU CT_SWCTL1_SWCMBA1, 4 .EQU CT_SWCTL1_SWCMBA0, 3 .EQU CT_SWCTL1_SWCMCP, 2 .EQU CT_SWCTL1_RESCMCP1, 1 .EQU CT_SWCTL1_RESCMCP0, 0 // register------------------------------------- .EQU CT_SPECIAL, 0x40000940 // 0x4000 0940 CT_SPECIAL Bits------------------------------------- .EQU CT_SPECIAL_SCANIC, 6 .EQU CT_SPECIAL_CONNORMIC, 5 .EQU CT_SPECIAL_CONINITIC, 4 .EQU CT_SPECIAL_SYNUPDATE, 3 .EQU CT_SPECIAL_CONABORT, 2 .EQU CT_SPECIAL_CONSTART, 1 .EQU CT_SPECIAL_LFSRCLEAR, 0 // register------------------------------------- .EQU CT_SCANVALCFG2, 0x40000944 // 0x4000 0944 CT_SCANVALCFG2 Bits------------------------------------- .EQU CT_SCANVALCFG2_SCANVAL5_15, 31 .EQU CT_SCANVALCFG2_SCANVAL5_14, 30 .EQU CT_SCANVALCFG2_SCANVAL5_13, 29 .EQU CT_SCANVALCFG2_SCANVAL5_12, 28 .EQU CT_SCANVALCFG2_SCANVAL5_11, 27 .EQU CT_SCANVALCFG2_SCANVAL5_10, 26 .EQU CT_SCANVALCFG2_SCANVAL5_9, 25 .EQU CT_SCANVALCFG2_SCANVAL5_8, 24 .EQU CT_SCANVALCFG2_SCANVAL5_7, 23 .EQU CT_SCANVALCFG2_SCANVAL5_6, 22 .EQU CT_SCANVALCFG2_SCANVAL5_5, 21 .EQU CT_SCANVALCFG2_SCANVAL5_4, 20 .EQU CT_SCANVALCFG2_SCANVAL5_3, 19 .EQU CT_SCANVALCFG2_SCANVAL5_2, 18 .EQU CT_SCANVALCFG2_SCANVAL5_1, 17 .EQU CT_SCANVALCFG2_SCANVAL5_0, 16 .EQU CT_SCANVALCFG2_SCANVAL4_15, 15 .EQU CT_SCANVALCFG2_SCANVAL4_14, 14 .EQU CT_SCANVALCFG2_SCANVAL4_13, 13 .EQU CT_SCANVALCFG2_SCANVAL4_12, 12 .EQU CT_SCANVALCFG2_SCANVAL4_11, 11 .EQU CT_SCANVALCFG2_SCANVAL4_10, 10 .EQU CT_SCANVALCFG2_SCANVAL4_9, 9 .EQU CT_SCANVALCFG2_SCANVAL4_8, 8 .EQU CT_SCANVALCFG2_SCANVAL4_7, 7 .EQU CT_SCANVALCFG2_SCANVAL4_6, 6 .EQU CT_SCANVALCFG2_SCANVAL4_5, 5 .EQU CT_SCANVALCFG2_SCANVAL4_4, 4 .EQU CT_SCANVALCFG2_SCANVAL4_3, 3 .EQU CT_SCANVALCFG2_SCANVAL4_2, 2 .EQU CT_SCANVALCFG2_SCANVAL4_1, 1 .EQU CT_SCANVALCFG2_SCANVAL4_0, 0 // register------------------------------------- .EQU CT_SCANVALCFG3, 0x40000948 // 0x4000 0948 CT_SCANVALCFG3 Bits------------------------------------- .EQU CT_SCANVALCFG3_SCANVAL7_15, 31 .EQU CT_SCANVALCFG3_SCANVAL7_14, 30 .EQU CT_SCANVALCFG3_SCANVAL7_13, 29 .EQU CT_SCANVALCFG3_SCANVAL7_12, 28 .EQU CT_SCANVALCFG3_SCANVAL7_11, 27 .EQU CT_SCANVALCFG3_SCANVAL7_10, 26 .EQU CT_SCANVALCFG3_SCANVAL7_9, 25 .EQU CT_SCANVALCFG3_SCANVAL7_8, 24 .EQU CT_SCANVALCFG3_SCANVAL7_7, 23 .EQU CT_SCANVALCFG3_SCANVAL7_6, 22 .EQU CT_SCANVALCFG3_SCANVAL7_5, 21 .EQU CT_SCANVALCFG3_SCANVAL7_4, 20 .EQU CT_SCANVALCFG3_SCANVAL7_3, 19 .EQU CT_SCANVALCFG3_SCANVAL7_2, 18 .EQU CT_SCANVALCFG3_SCANVAL7_1, 17 .EQU CT_SCANVALCFG3_SCANVAL7_0, 16 .EQU CT_SCANVALCFG3_SCANVAL6_15, 15 .EQU CT_SCANVALCFG3_SCANVAL6_14, 14 .EQU CT_SCANVALCFG3_SCANVAL6_13, 13 .EQU CT_SCANVALCFG3_SCANVAL6_12, 12 .EQU CT_SCANVALCFG3_SCANVAL6_11, 11 .EQU CT_SCANVALCFG3_SCANVAL6_10, 10 .EQU CT_SCANVALCFG3_SCANVAL6_9, 9 .EQU CT_SCANVALCFG3_SCANVAL6_8, 8 .EQU CT_SCANVALCFG3_SCANVAL6_7, 7 .EQU CT_SCANVALCFG3_SCANVAL6_6, 6 .EQU CT_SCANVALCFG3_SCANVAL6_5, 5 .EQU CT_SCANVALCFG3_SCANVAL6_4, 4 .EQU CT_SCANVALCFG3_SCANVAL6_3, 3 .EQU CT_SCANVALCFG3_SCANVAL6_2, 2 .EQU CT_SCANVALCFG3_SCANVAL6_1, 1 .EQU CT_SCANVALCFG3_SCANVAL6_0, 0 // register------------------------------------- .EQU CT_SCANVALCFG4, 0x4000094C // 0x4000 094C CT_SCANVALCFG4 Bits------------------------------------- .EQU CT_SCANVALCFG4_SCANVAL9_15, 31 .EQU CT_SCANVALCFG4_SCANVAL9_14, 30 .EQU CT_SCANVALCFG4_SCANVAL9_13, 29 .EQU CT_SCANVALCFG4_SCANVAL9_12, 28 .EQU CT_SCANVALCFG4_SCANVAL9_11, 27 .EQU CT_SCANVALCFG4_SCANVAL9_10, 26 .EQU CT_SCANVALCFG4_SCANVAL9_9, 25 .EQU CT_SCANVALCFG4_SCANVAL9_8, 24 .EQU CT_SCANVALCFG4_SCANVAL9_7, 23 .EQU CT_SCANVALCFG4_SCANVAL9_6, 22 .EQU CT_SCANVALCFG4_SCANVAL9_5, 21 .EQU CT_SCANVALCFG4_SCANVAL9_4, 20 .EQU CT_SCANVALCFG4_SCANVAL9_3, 19 .EQU CT_SCANVALCFG4_SCANVAL9_2, 18 .EQU CT_SCANVALCFG4_SCANVAL9_1, 17 .EQU CT_SCANVALCFG4_SCANVAL9_0, 16 .EQU CT_SCANVALCFG4_SCANVAL8_15, 15 .EQU CT_SCANVALCFG4_SCANVAL8_14, 14 .EQU CT_SCANVALCFG4_SCANVAL8_13, 13 .EQU CT_SCANVALCFG4_SCANVAL8_12, 12 .EQU CT_SCANVALCFG4_SCANVAL8_11, 11 .EQU CT_SCANVALCFG4_SCANVAL8_10, 10 .EQU CT_SCANVALCFG4_SCANVAL8_9, 9 .EQU CT_SCANVALCFG4_SCANVAL8_8, 8 .EQU CT_SCANVALCFG4_SCANVAL8_7, 7 .EQU CT_SCANVALCFG4_SCANVAL8_6, 6 .EQU CT_SCANVALCFG4_SCANVAL8_5, 5 .EQU CT_SCANVALCFG4_SCANVAL8_4, 4 .EQU CT_SCANVALCFG4_SCANVAL8_3, 3 .EQU CT_SCANVALCFG4_SCANVAL8_2, 2 .EQU CT_SCANVALCFG4_SCANVAL8_1, 1 .EQU CT_SCANVALCFG4_SCANVAL8_0, 0 // register------------------------------------- .EQU CT_SCANVALCFG5, 0x40000950 // 0x4000 0950 CT_SCANVALCFG5 Bits------------------------------------- .EQU CT_SCANVALCFG5_SCANVAL11_15, 31 .EQU CT_SCANVALCFG5_SCANVAL11_14, 30 .EQU CT_SCANVALCFG5_SCANVAL11_13, 29 .EQU CT_SCANVALCFG5_SCANVAL11_12, 28 .EQU CT_SCANVALCFG5_SCANVAL11_11, 27 .EQU CT_SCANVALCFG5_SCANVAL11_10, 26 .EQU CT_SCANVALCFG5_SCANVAL11_9, 25 .EQU CT_SCANVALCFG5_SCANVAL11_8, 24 .EQU CT_SCANVALCFG5_SCANVAL11_7, 23 .EQU CT_SCANVALCFG5_SCANVAL11_6, 22 .EQU CT_SCANVALCFG5_SCANVAL11_5, 21 .EQU CT_SCANVALCFG5_SCANVAL11_4, 20 .EQU CT_SCANVALCFG5_SCANVAL11_3, 19 .EQU CT_SCANVALCFG5_SCANVAL11_2, 18 .EQU CT_SCANVALCFG5_SCANVAL11_1, 17 .EQU CT_SCANVALCFG5_SCANVAL11_0, 16 .EQU CT_SCANVALCFG5_SCANVAL10_15, 15 .EQU CT_SCANVALCFG5_SCANVAL10_14, 14 .EQU CT_SCANVALCFG5_SCANVAL10_13, 13 .EQU CT_SCANVALCFG5_SCANVAL10_12, 12 .EQU CT_SCANVALCFG5_SCANVAL10_11, 11 .EQU CT_SCANVALCFG5_SCANVAL10_10, 10 .EQU CT_SCANVALCFG5_SCANVAL10_9, 9 .EQU CT_SCANVALCFG5_SCANVAL10_8, 8 .EQU CT_SCANVALCFG5_SCANVAL10_7, 7 .EQU CT_SCANVALCFG5_SCANVAL10_6, 6 .EQU CT_SCANVALCFG5_SCANVAL10_5, 5 .EQU CT_SCANVALCFG5_SCANVAL10_4, 4 .EQU CT_SCANVALCFG5_SCANVAL10_3, 3 .EQU CT_SCANVALCFG5_SCANVAL10_2, 2 .EQU CT_SCANVALCFG5_SCANVAL10_1, 1 .EQU CT_SCANVALCFG5_SCANVAL10_0, 0 // register------------------------------------- .EQU CT_DELTAVAL, 0x40000954 // 0x4000 0954 CT_DELTAVAL Bits------------------------------------- .EQU CT_DELTAVAL_DELTAVAL15, 15 .EQU CT_DELTAVAL_DELTAVAL14, 14 .EQU CT_DELTAVAL_DELTAVAL13, 13 .EQU CT_DELTAVAL_DELTAVAL12, 12 .EQU CT_DELTAVAL_DELTAVAL11, 11 .EQU CT_DELTAVAL_DELTAVAL10, 10 .EQU CT_DELTAVAL_DELTAVAL9, 9 .EQU CT_DELTAVAL_DELTAVAL8, 8 .EQU CT_DELTAVAL_DELTAVAL7, 7 .EQU CT_DELTAVAL_DELTAVAL6, 6 .EQU CT_DELTAVAL_DELTAVAL5, 5 .EQU CT_DELTAVAL_DELTAVAL4, 4 .EQU CT_DELTAVAL_DELTAVAL3, 3 .EQU CT_DELTAVAL_DELTAVAL2, 2 .EQU CT_DELTAVAL_DELTAVAL1, 1 .EQU CT_DELTAVAL_DELTAVAL0, 0 // register------------------------------------- .EQU CT_IOCTL0, 0x40000958 // 0x4000 0958 CT_IOCTL0 Bits------------------------------------- .EQU CT_IOCTL0_CT9MODE2, 29 .EQU CT_IOCTL0_CT9MODE1, 28 .EQU CT_IOCTL0_CT9MODE0, 27 .EQU CT_IOCTL0_CT8MODE2, 26 .EQU CT_IOCTL0_CT8MODE1, 25 .EQU CT_IOCTL0_CT8MODE0, 24 .EQU CT_IOCTL0_CT7MODE2, 23 .EQU CT_IOCTL0_CT7MODE1, 22 .EQU CT_IOCTL0_CT7MODE0, 21 .EQU CT_IOCTL0_CT6MODE2, 20 .EQU CT_IOCTL0_CT6MODE1, 19 .EQU CT_IOCTL0_CT6MODE0, 18 .EQU CT_IOCTL0_CT5MODE2, 17 .EQU CT_IOCTL0_CT5MODE1, 16 .EQU CT_IOCTL0_CT5MODE0, 15 .EQU CT_IOCTL0_CT4MODE2, 14 .EQU CT_IOCTL0_CT4MODE1, 13 .EQU CT_IOCTL0_CT4MODE0, 12 .EQU CT_IOCTL0_CT3MODE2, 11 .EQU CT_IOCTL0_CT3MODE1, 10 .EQU CT_IOCTL0_CT3MODE0, 9 .EQU CT_IOCTL0_CT2MODE2, 8 .EQU CT_IOCTL0_CT2MODE1, 7 .EQU CT_IOCTL0_CT2MODE0, 6 .EQU CT_IOCTL0_CT1MODE2, 5 .EQU CT_IOCTL0_CT1MODE1, 4 .EQU CT_IOCTL0_CT1MODE0, 3 .EQU CT_IOCTL0_CT0MODE2, 2 .EQU CT_IOCTL0_CT0MODE1, 1 .EQU CT_IOCTL0_CT0MODE0, 0 // register------------------------------------- .EQU CT_IOCTL1, 0x4000095C // 0x4000 095C CT_IOCTL1 Bits------------------------------------- .EQU CT_IOCTL1_CT19MODE2, 29 .EQU CT_IOCTL1_CT19MODE1, 28 .EQU CT_IOCTL1_CT19MODE0, 27 .EQU CT_IOCTL1_CT18MODE2, 26 .EQU CT_IOCTL1_CT18MODE1, 25 .EQU CT_IOCTL1_CT18MODE0, 24 .EQU CT_IOCTL1_CT17MODE2, 23 .EQU CT_IOCTL1_CT17MODE1, 22 .EQU CT_IOCTL1_CT17MODE0, 21 .EQU CT_IOCTL1_CT16MODE2, 20 .EQU CT_IOCTL1_CT16MODE1, 19 .EQU CT_IOCTL1_CT16MODE0, 18 .EQU CT_IOCTL1_CT15MODE2, 17 .EQU CT_IOCTL1_CT15MODE1, 16 .EQU CT_IOCTL1_CT15MODE0, 15 .EQU CT_IOCTL1_CT14MODE2, 14 .EQU CT_IOCTL1_CT14MODE1, 13 .EQU CT_IOCTL1_CT14MODE0, 12 .EQU CT_IOCTL1_CT13MODE2, 11 .EQU CT_IOCTL1_CT13MODE1, 10 .EQU CT_IOCTL1_CT13MODE0, 9 .EQU CT_IOCTL1_CT12MODE2, 8 .EQU CT_IOCTL1_CT12MODE1, 7 .EQU CT_IOCTL1_CT12MODE0, 6 .EQU CT_IOCTL1_CT11MODE2, 5 .EQU CT_IOCTL1_CT11MODE1, 4 .EQU CT_IOCTL1_CT11MODE0, 3 .EQU CT_IOCTL1_CT10MODE2, 2 .EQU CT_IOCTL1_CT10MODE1, 1 .EQU CT_IOCTL1_CT10MODE0, 0 // register------------------------------------- .EQU CT_IOCTL2, 0x40000960 // 0x4000 0960 CT_IOCTL2 Bits------------------------------------- .EQU CT_IOCTL2_CT29MODE2, 29 .EQU CT_IOCTL2_CT29MODE1, 28 .EQU CT_IOCTL2_CT29MODE0, 27 .EQU CT_IOCTL2_CT28MODE2, 26 .EQU CT_IOCTL2_CT28MODE1, 25 .EQU CT_IOCTL2_CT28MODE0, 24 .EQU CT_IOCTL2_CT27MODE2, 23 .EQU CT_IOCTL2_CT27MODE1, 22 .EQU CT_IOCTL2_CT27MODE0, 21 .EQU CT_IOCTL2_CT26MODE2, 20 .EQU CT_IOCTL2_CT26MODE1, 19 .EQU CT_IOCTL2_CT26MODE0, 18 .EQU CT_IOCTL2_CT25MODE2, 17 .EQU CT_IOCTL2_CT25MODE1, 16 .EQU CT_IOCTL2_CT25MODE0, 15 .EQU CT_IOCTL2_CT24MODE2, 14 .EQU CT_IOCTL2_CT24MODE1, 13 .EQU CT_IOCTL2_CT24MODE0, 12 .EQU CT_IOCTL2_CT23MODE2, 11 .EQU CT_IOCTL2_CT23MODE1, 10 .EQU CT_IOCTL2_CT23MODE0, 9 .EQU CT_IOCTL2_CT22MODE2, 8 .EQU CT_IOCTL2_CT22MODE1, 7 .EQU CT_IOCTL2_CT22MODE0, 6 .EQU CT_IOCTL2_CT21MODE2, 5 .EQU CT_IOCTL2_CT21MODE1, 4 .EQU CT_IOCTL2_CT21MODE0, 3 .EQU CT_IOCTL2_CT20MODE2, 2 .EQU CT_IOCTL2_CT20MODE1, 1 .EQU CT_IOCTL2_CT20MODE0, 0 // register------------------------------------- .EQU CT_IOCTL3, 0x40000964 // 0x4000 0964 CT_IOCTL3 Bits------------------------------------- .EQU CT_IOCTL3_CT32MODE2, 8 .EQU CT_IOCTL3_CT32MODE1, 7 .EQU CT_IOCTL3_CT32MODE0, 6 .EQU CT_IOCTL3_CT31MODE2, 5 .EQU CT_IOCTL3_CT31MODE1, 4 .EQU CT_IOCTL3_CT31MODE0, 3 .EQU CT_IOCTL3_CT30MODE2, 2 .EQU CT_IOCTL3_CT30MODE1, 1 .EQU CT_IOCTL3_CT30MODE0, 0 // register------------------------------------- .EQU CT_IOCTMD, 0x40000968 // 0x4000 0968 CT_IOCTMD Bits------------------------------------- .EQU CT_IOCTMD_DRVCAS1, 9 .EQU CT_IOCTMD_DRVCAS0, 8 .EQU CT_IOCTMD_POLCAS, 7 .EQU CT_IOCTMD_DRVCX1, 6 .EQU CT_IOCTMD_DRVCX0, 5 .EQU CT_IOCTMD_POLCX, 4 .EQU CT_IOCTMD_DRVP1, 3 .EQU CT_IOCTMD_DRVP0, 2 .EQU CT_IOCTMD_POLSEL, 1 .EQU CT_IOCTMD_BUSGDSEL, 0 // register------------------------------------- .EQU USART0_CTLR, 0x40000980 // 0x4000 0980 USART0_CTLR Bits------------------------------------- .EQU USART0_CTLR_SLMEN, 31 .EQU USART0_CTLR_RESHD, 30 .EQU USART0_CTLR_IRDAEN, 29 .EQU USART0_CTLR_BKPWS, 26 .EQU USART0_CTLR_RTSE, 25 .EQU USART0_CTLR_CTSE, 24 .EQU USART0_CTLR_TRGSEL1, 23 .EQU USART0_CTLR_TRGSEL0, 22 .EQU USART0_CTLR_DT9EN, 21 .EQU USART0_CTLR_PARM, 20 .EQU USART0_CTLR_TX9SEL, 19 .EQU USART0_CTLR_STPW, 18 .EQU USART0_CTLR_TIDLEEN, 17 .EQU USART0_CTLR_RXEN, 16 .EQU USART0_CTLR_TXEN, 15 .EQU USART0_CTLR_SYNC, 14 .EQU USART0_CTLR_SENDB, 13 .EQU USART0_CTLR_RIDLES, 12 .EQU USART0_CTLR_ABRDEN, 11 .EQU USART0_CTLR_ADREN, 9 .EQU USART0_CTLR_CSRS, 8 .EQU USART0_CTLR_WUEN, 7 .EQU USART0_CTLR_DINV, 6 .EQU USART0_CTLR_RCONV, 5 .EQU USART0_CTLR_TCONV, 4 .EQU USART0_CTLR_SCKPS, 3 .EQU USART0_CTLR_BRCKS1, 2 .EQU USART0_CTLR_BRCKS0, 1 .EQU USART0_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART0_BRGR, 0x40000984 // 0x4000 0984 USART0_BRGR Bits------------------------------------- .EQU USART0_BRGR_BRGF2_3, 23 .EQU USART0_BRGR_BRGF2_2, 22 .EQU USART0_BRGR_BRGF2_1, 21 .EQU USART0_BRGR_BRGF2_0, 20 .EQU USART0_BRGR_BRGF1_3, 19 .EQU USART0_BRGR_BRGF1_2, 18 .EQU USART0_BRGR_BRGF1_1, 17 .EQU USART0_BRGR_BRGF1_0, 16 .EQU USART0_BRGR_BRGM15, 15 .EQU USART0_BRGR_BRGM14, 14 .EQU USART0_BRGR_BRGM13, 13 .EQU USART0_BRGR_BRGM12, 12 .EQU USART0_BRGR_BRGM11, 11 .EQU USART0_BRGR_BRGM10, 10 .EQU USART0_BRGR_BRGM9, 9 .EQU USART0_BRGR_BRGM8, 8 .EQU USART0_BRGR_BRGM7, 7 .EQU USART0_BRGR_BRGM6, 6 .EQU USART0_BRGR_BRGM5, 5 .EQU USART0_BRGR_BRGM4, 4 .EQU USART0_BRGR_BRGM3, 3 .EQU USART0_BRGR_BRGM2, 2 .EQU USART0_BRGR_BRGM1, 1 .EQU USART0_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART0_STR, 0x40000988 // 0x4000 0988 USART0_STR Bits------------------------------------- .EQU USART0_STR_TX0SEL, 31 .EQU USART0_STR_TX1SEL, 30 .EQU USART0_STR_RXDSEL, 29 .EQU USART0_STR_CTSSEL, 28 .EQU USART0_STR_TXFIF, 27 .EQU USART0_STR_IDLEIC, 26 .EQU USART0_STR_UADMIC, 25 .EQU USART0_STR_CTSIC, 24 .EQU USART0_STR_REIC, 23 .EQU USART0_STR_TEIC, 22 .EQU USART0_STR_WUIC, 21 .EQU USART0_STR_ABTOIC, 20 .EQU USART0_STR_BRIC, 19 .EQU USART0_STR_FREIC, 18 .EQU USART0_STR_PAREIC, 17 .EQU USART0_STR_OVFEIC, 16 .EQU USART0_STR_IDLFIF, 15 .EQU USART0_STR_UADMIF, 14 .EQU USART0_STR_TXEIF, 13 .EQU USART0_STR_TFEIF, 12 .EQU USART0_STR_RDRIF, 11 .EQU USART0_STR_TXFR, 10 .EQU USART0_STR_RCFR, 9 .EQU USART0_STR_CTSIF, 8 .EQU USART0_STR_REIF, 7 .EQU USART0_STR_TEIF, 6 .EQU USART0_STR_WUIF, 5 .EQU USART0_STR_ABTOIF, 4 .EQU USART0_STR_BRIF, 3 .EQU USART0_STR_FREIF, 2 .EQU USART0_STR_PAREIF, 1 .EQU USART0_STR_OVFEIF, 0 // register------------------------------------- .EQU USART0_TBUFR, 0x4000098C // 0x4000 098C USART0_TBUFR Bits------------------------------------- .EQU USART0_TBUFR_TBUF7, 7 .EQU USART0_TBUFR_TBUF6, 6 .EQU USART0_TBUFR_TBUF5, 5 .EQU USART0_TBUFR_TBUF4, 4 .EQU USART0_TBUFR_TBUF3, 3 .EQU USART0_TBUFR_TBUF2, 2 .EQU USART0_TBUFR_TBUF1, 1 .EQU USART0_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART0_RBUFR, 0x4000098C // 0x4000 098C USART0_RBUFR Bits------------------------------------- .EQU USART0_RBUFR_RBUF8, 8 .EQU USART0_RBUFR_RBUF7, 7 .EQU USART0_RBUFR_RBUF6, 6 .EQU USART0_RBUFR_RBUF5, 5 .EQU USART0_RBUFR_RBUF4, 4 .EQU USART0_RBUFR_RBUF3, 3 .EQU USART0_RBUFR_RBUF2, 2 .EQU USART0_RBUFR_RBUF1, 1 .EQU USART0_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART0_U7816R, 0x40000990 // 0x4000 0990 USART0_U7816R Bits------------------------------------- .EQU USART0_U7816R_EGT7, 31 .EQU USART0_U7816R_EGT6, 30 .EQU USART0_U7816R_EGT5, 29 .EQU USART0_U7816R_EGT4, 28 .EQU USART0_U7816R_EGT3, 27 .EQU USART0_U7816R_EGT2, 26 .EQU USART0_U7816R_EGT1, 25 .EQU USART0_U7816R_EGT0, 24 .EQU USART0_U7816R_CLKDIV7, 22 .EQU USART0_U7816R_CLKDIV6, 21 .EQU USART0_U7816R_CLKDIV5, 20 .EQU USART0_U7816R_CLKDIV4, 19 .EQU USART0_U7816R_CLKDIV3, 18 .EQU USART0_U7816R_CLKDIV2, 17 .EQU USART0_U7816R_CLKDIV1, 16 .EQU USART0_U7816R_CLKDIV0, 15 .EQU USART0_U7816R_TREPMS, 14 .EQU USART0_U7816R_RXRE1, 13 .EQU USART0_U7816R_RXRE0, 12 .EQU USART0_U7816R_TXRE1, 11 .EQU USART0_U7816R_TXRE0, 10 .EQU USART0_U7816R_RREPEN, 9 .EQU USART0_U7816R_TREPEN, 8 .EQU USART0_U7816R_BGTEN, 5 .EQU USART0_U7816R_PSEL, 4 .EQU USART0_U7816R_ERSW1, 3 .EQU USART0_U7816R_ERSW0, 2 .EQU USART0_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART0_IER, 0x40000994 // 0x4000 0994 USART0_IER Bits------------------------------------- .EQU USART0_IER_UADMIE, 18 .EQU USART0_IER_UTXDE, 17 .EQU USART0_IER_URCDE, 16 .EQU USART0_IER_IDLEIE, 12 .EQU USART0_IER_TXEIE, 11 .EQU USART0_IER_TFEIE, 10 .EQU USART0_IER_RDRIE, 9 .EQU USART0_IER_CTSIE, 8 .EQU USART0_IER_REIE, 7 .EQU USART0_IER_TEIE, 6 .EQU USART0_IER_WUIE, 5 .EQU USART0_IER_ABTOIE, 4 .EQU USART0_IER_BRIE, 3 .EQU USART0_IER_FREIE, 2 .EQU USART0_IER_PAREIE, 1 .EQU USART0_IER_OVFEIE, 0 // register------------------------------------- .EQU USART0_ADM, 0x40000998 // 0x4000 0998 USART0_ADM Bits------------------------------------- .EQU USART0_ADM_ADM7, 7 .EQU USART0_ADM_ADM6, 6 .EQU USART0_ADM_ADM5, 5 .EQU USART0_ADM_ADM4, 4 .EQU USART0_ADM_ADM3, 3 .EQU USART0_ADM_ADM2, 2 .EQU USART0_ADM_ADM1, 1 .EQU USART0_ADM_ADM0, 0 // register------------------------------------- .EQU USART1_CTLR, 0x40000A00 // 0x4000 0A00 USART1_CTLR Bits------------------------------------- .EQU USART1_CTLR_SLMEN, 31 .EQU USART1_CTLR_RESHD, 30 .EQU USART1_CTLR_IRDAEN, 29 .EQU USART1_CTLR_BKPWS, 26 .EQU USART1_CTLR_RTSE, 25 .EQU USART1_CTLR_CTSE, 24 .EQU USART1_CTLR_TRGSEL1, 23 .EQU USART1_CTLR_TRGSEL0, 22 .EQU USART1_CTLR_DT9EN, 21 .EQU USART1_CTLR_PARM, 20 .EQU USART1_CTLR_TX9SEL, 19 .EQU USART1_CTLR_STPW, 18 .EQU USART1_CTLR_TIDLEEN, 17 .EQU USART1_CTLR_RXEN, 16 .EQU USART1_CTLR_TXEN, 15 .EQU USART1_CTLR_SYNC, 14 .EQU USART1_CTLR_SENDB, 13 .EQU USART1_CTLR_RIDLES, 12 .EQU USART1_CTLR_ABRDEN, 11 .EQU USART1_CTLR_ADREN, 9 .EQU USART1_CTLR_CSRS, 8 .EQU USART1_CTLR_WUEN, 7 .EQU USART1_CTLR_DINV, 6 .EQU USART1_CTLR_RCONV, 5 .EQU USART1_CTLR_TCONV, 4 .EQU USART1_CTLR_SCKPS, 3 .EQU USART1_CTLR_BRCKS1, 2 .EQU USART1_CTLR_BRCKS0, 1 .EQU USART1_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART1_BRGR, 0x40000A04 // 0x4000 0A04 USART1_BRGR Bits------------------------------------- .EQU USART1_BRGR_BRGF2_3, 23 .EQU USART1_BRGR_BRGF2_2, 22 .EQU USART1_BRGR_BRGF2_1, 21 .EQU USART1_BRGR_BRGF2_0, 20 .EQU USART1_BRGR_BRGF1_3, 19 .EQU USART1_BRGR_BRGF1_2, 18 .EQU USART1_BRGR_BRGF1_1, 17 .EQU USART1_BRGR_BRGF1_0, 16 .EQU USART1_BRGR_BRGM15, 15 .EQU USART1_BRGR_BRGM14, 14 .EQU USART1_BRGR_BRGM13, 13 .EQU USART1_BRGR_BRGM12, 12 .EQU USART1_BRGR_BRGM11, 11 .EQU USART1_BRGR_BRGM10, 10 .EQU USART1_BRGR_BRGM9, 9 .EQU USART1_BRGR_BRGM8, 8 .EQU USART1_BRGR_BRGM7, 7 .EQU USART1_BRGR_BRGM6, 6 .EQU USART1_BRGR_BRGM5, 5 .EQU USART1_BRGR_BRGM4, 4 .EQU USART1_BRGR_BRGM3, 3 .EQU USART1_BRGR_BRGM2, 2 .EQU USART1_BRGR_BRGM1, 1 .EQU USART1_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART1_STR, 0x40000A08 // 0x4000 0A08 USART1_STR Bits------------------------------------- .EQU USART1_STR_TX0SEL, 31 .EQU USART1_STR_TX1SEL, 30 .EQU USART1_STR_RXDSEL, 29 .EQU USART1_STR_CTSSEL, 28 .EQU USART1_STR_TXFIF, 27 .EQU USART1_STR_IDLEIC, 26 .EQU USART1_STR_UADMIC, 25 .EQU USART1_STR_CTSIC, 24 .EQU USART1_STR_REIC, 23 .EQU USART1_STR_TEIC, 22 .EQU USART1_STR_WUIC, 21 .EQU USART1_STR_ABTOIC, 20 .EQU USART1_STR_BRIC, 19 .EQU USART1_STR_FREIC, 18 .EQU USART1_STR_PAREIC, 17 .EQU USART1_STR_OVFEIC, 16 .EQU USART1_STR_IDLFIF, 15 .EQU USART1_STR_UADMIF, 14 .EQU USART1_STR_TXEIF, 13 .EQU USART1_STR_TFEIF, 12 .EQU USART1_STR_RDRIF, 11 .EQU USART1_STR_TXFR, 10 .EQU USART1_STR_RCFR, 9 .EQU USART1_STR_CTSIF, 8 .EQU USART1_STR_REIF, 7 .EQU USART1_STR_TEIF, 6 .EQU USART1_STR_WUIF, 5 .EQU USART1_STR_ABTOIF, 4 .EQU USART1_STR_BRIF, 3 .EQU USART1_STR_FREIF, 2 .EQU USART1_STR_PAREIF, 1 .EQU USART1_STR_OVFEIF, 0 // register------------------------------------- .EQU USART1_TBUFR, 0x40000A0C // 0x4000 0A0C USART1_TBUFR Bits------------------------------------- .EQU USART1_TBUFR_TBUF7, 7 .EQU USART1_TBUFR_TBUF6, 6 .EQU USART1_TBUFR_TBUF5, 5 .EQU USART1_TBUFR_TBUF4, 4 .EQU USART1_TBUFR_TBUF3, 3 .EQU USART1_TBUFR_TBUF2, 2 .EQU USART1_TBUFR_TBUF1, 1 .EQU USART1_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART1_RBUFR, 0x40000A0C // 0x4000 0A0C USART1_RBUFR Bits------------------------------------- .EQU USART1_RBUFR_RBUF8, 8 .EQU USART1_RBUFR_RBUF7, 7 .EQU USART1_RBUFR_RBUF6, 6 .EQU USART1_RBUFR_RBUF5, 5 .EQU USART1_RBUFR_RBUF4, 4 .EQU USART1_RBUFR_RBUF3, 3 .EQU USART1_RBUFR_RBUF2, 2 .EQU USART1_RBUFR_RBUF1, 1 .EQU USART1_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART1_U7816R, 0x40000A10 // 0x4000 0A10 USART1_U7816R Bits------------------------------------- .EQU USART1_U7816R_EGT7, 31 .EQU USART1_U7816R_EGT6, 30 .EQU USART1_U7816R_EGT5, 29 .EQU USART1_U7816R_EGT4, 28 .EQU USART1_U7816R_EGT3, 27 .EQU USART1_U7816R_EGT2, 26 .EQU USART1_U7816R_EGT1, 25 .EQU USART1_U7816R_EGT0, 24 .EQU USART1_U7816R_CLKDIV7, 22 .EQU USART1_U7816R_CLKDIV6, 21 .EQU USART1_U7816R_CLKDIV5, 20 .EQU USART1_U7816R_CLKDIV4, 19 .EQU USART1_U7816R_CLKDIV3, 18 .EQU USART1_U7816R_CLKDIV2, 17 .EQU USART1_U7816R_CLKDIV1, 16 .EQU USART1_U7816R_CLKDIV0, 15 .EQU USART1_U7816R_TREPMS, 14 .EQU USART1_U7816R_RXRE1, 13 .EQU USART1_U7816R_RXRE0, 12 .EQU USART1_U7816R_TXRE1, 11 .EQU USART1_U7816R_TXRE0, 10 .EQU USART1_U7816R_RREPEN, 9 .EQU USART1_U7816R_TREPEN, 8 .EQU USART1_U7816R_BGTEN, 5 .EQU USART1_U7816R_PSEL, 4 .EQU USART1_U7816R_ERSW1, 3 .EQU USART1_U7816R_ERSW0, 2 .EQU USART1_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART1_IER, 0x40000A14 // 0x4000 0A14 USART1_IER Bits------------------------------------- .EQU USART1_IER_UADMIE, 18 .EQU USART1_IER_UTXDE, 17 .EQU USART1_IER_URCDE, 16 .EQU USART1_IER_IDLEIE, 12 .EQU USART1_IER_TXEIE, 11 .EQU USART1_IER_TFEIE, 10 .EQU USART1_IER_RDRIE, 9 .EQU USART1_IER_CTSIE, 8 .EQU USART1_IER_REIE, 7 .EQU USART1_IER_TEIE, 6 .EQU USART1_IER_WUIE, 5 .EQU USART1_IER_ABTOIE, 4 .EQU USART1_IER_BRIE, 3 .EQU USART1_IER_FREIE, 2 .EQU USART1_IER_PAREIE, 1 .EQU USART1_IER_OVFEIE, 0 // register------------------------------------- .EQU USART1_ADM, 0x40000A18 // 0x4000 0A18 USART1_ADM Bits------------------------------------- .EQU USART1_ADM_ADM7, 7 .EQU USART1_ADM_ADM6, 6 .EQU USART1_ADM_ADM5, 5 .EQU USART1_ADM_ADM4, 4 .EQU USART1_ADM_ADM3, 3 .EQU USART1_ADM_ADM2, 2 .EQU USART1_ADM_ADM1, 1 .EQU USART1_ADM_ADM0, 0 // register------------------------------------- .EQU USART2_CTLR, 0x40000A80 // 0x4000 0A80 USART2_CTLR Bits------------------------------------- .EQU USART2_CTLR_SLMEN, 31 .EQU USART2_CTLR_RESHD, 30 .EQU USART2_CTLR_IRDAEN, 29 .EQU USART2_CTLR_BKPWS, 26 .EQU USART2_CTLR_RTSE, 25 .EQU USART2_CTLR_CTSE, 24 .EQU USART2_CTLR_TRGSEL1, 23 .EQU USART2_CTLR_TRGSEL0, 22 .EQU USART2_CTLR_DT9EN, 21 .EQU USART2_CTLR_PARM, 20 .EQU USART2_CTLR_TX9SEL, 19 .EQU USART2_CTLR_STPW, 18 .EQU USART2_CTLR_TIDLEEN, 17 .EQU USART2_CTLR_RXEN, 16 .EQU USART2_CTLR_TXEN, 15 .EQU USART2_CTLR_SYNC, 14 .EQU USART2_CTLR_SENDB, 13 .EQU USART2_CTLR_RIDLES, 12 .EQU USART2_CTLR_ABRDEN, 11 .EQU USART2_CTLR_ADREN, 9 .EQU USART2_CTLR_CSRS, 8 .EQU USART2_CTLR_WUEN, 7 .EQU USART2_CTLR_DINV, 6 .EQU USART2_CTLR_RCONV, 5 .EQU USART2_CTLR_TCONV, 4 .EQU USART2_CTLR_SCKPS, 3 .EQU USART2_CTLR_BRCKS1, 2 .EQU USART2_CTLR_BRCKS0, 1 .EQU USART2_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART2_BRGR, 0x40000A84 // 0x4000 0A84 USART2_BRGR Bits------------------------------------- .EQU USART2_BRGR_BRGF2_3, 23 .EQU USART2_BRGR_BRGF2_2, 22 .EQU USART2_BRGR_BRGF2_1, 21 .EQU USART2_BRGR_BRGF2_0, 20 .EQU USART2_BRGR_BRGF1_3, 19 .EQU USART2_BRGR_BRGF1_2, 18 .EQU USART2_BRGR_BRGF1_1, 17 .EQU USART2_BRGR_BRGF1_0, 16 .EQU USART2_BRGR_BRGM15, 15 .EQU USART2_BRGR_BRGM14, 14 .EQU USART2_BRGR_BRGM13, 13 .EQU USART2_BRGR_BRGM12, 12 .EQU USART2_BRGR_BRGM11, 11 .EQU USART2_BRGR_BRGM10, 10 .EQU USART2_BRGR_BRGM9, 9 .EQU USART2_BRGR_BRGM8, 8 .EQU USART2_BRGR_BRGM7, 7 .EQU USART2_BRGR_BRGM6, 6 .EQU USART2_BRGR_BRGM5, 5 .EQU USART2_BRGR_BRGM4, 4 .EQU USART2_BRGR_BRGM3, 3 .EQU USART2_BRGR_BRGM2, 2 .EQU USART2_BRGR_BRGM1, 1 .EQU USART2_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART2_STR, 0x40000A88 // 0x4000 0A88 USART2_STR Bits------------------------------------- .EQU USART2_STR_TX0SEL, 31 .EQU USART2_STR_TX1SEL, 30 .EQU USART2_STR_RXDSEL, 29 .EQU USART2_STR_CTSSEL, 28 .EQU USART2_STR_TXFIF, 27 .EQU USART2_STR_IDLEIC, 26 .EQU USART2_STR_UADMIC, 25 .EQU USART2_STR_CTSIC, 24 .EQU USART2_STR_REIC, 23 .EQU USART2_STR_TEIC, 22 .EQU USART2_STR_WUIC, 21 .EQU USART2_STR_ABTOIC, 20 .EQU USART2_STR_BRIC, 19 .EQU USART2_STR_FREIC, 18 .EQU USART2_STR_PAREIC, 17 .EQU USART2_STR_OVFEIC, 16 .EQU USART2_STR_IDLFIF, 15 .EQU USART2_STR_UADMIF, 14 .EQU USART2_STR_TXEIF, 13 .EQU USART2_STR_TFEIF, 12 .EQU USART2_STR_RDRIF, 11 .EQU USART2_STR_TXFR, 10 .EQU USART2_STR_RCFR, 9 .EQU USART2_STR_CTSIF, 8 .EQU USART2_STR_REIF, 7 .EQU USART2_STR_TEIF, 6 .EQU USART2_STR_WUIF, 5 .EQU USART2_STR_ABTOIF, 4 .EQU USART2_STR_BRIF, 3 .EQU USART2_STR_FREIF, 2 .EQU USART2_STR_PAREIF, 1 .EQU USART2_STR_OVFEIF, 0 // register------------------------------------- .EQU USART2_TBUFR, 0x40000A8C // 0x4000 0A8C USART2_TBUFR Bits------------------------------------- .EQU USART2_TBUFR_TBUF7, 7 .EQU USART2_TBUFR_TBUF6, 6 .EQU USART2_TBUFR_TBUF5, 5 .EQU USART2_TBUFR_TBUF4, 4 .EQU USART2_TBUFR_TBUF3, 3 .EQU USART2_TBUFR_TBUF2, 2 .EQU USART2_TBUFR_TBUF1, 1 .EQU USART2_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART2_RBUFR, 0x40000A8C // 0x4000 0A8C USART2_RBUFR Bits------------------------------------- .EQU USART2_RBUFR_RBUF8, 8 .EQU USART2_RBUFR_RBUF7, 7 .EQU USART2_RBUFR_RBUF6, 6 .EQU USART2_RBUFR_RBUF5, 5 .EQU USART2_RBUFR_RBUF4, 4 .EQU USART2_RBUFR_RBUF3, 3 .EQU USART2_RBUFR_RBUF2, 2 .EQU USART2_RBUFR_RBUF1, 1 .EQU USART2_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART2_U7816R, 0x40000A90 // 0x4000 0A90 USART2_U7816R Bits------------------------------------- .EQU USART2_U7816R_EGT7, 31 .EQU USART2_U7816R_EGT6, 30 .EQU USART2_U7816R_EGT5, 29 .EQU USART2_U7816R_EGT4, 28 .EQU USART2_U7816R_EGT3, 27 .EQU USART2_U7816R_EGT2, 26 .EQU USART2_U7816R_EGT1, 25 .EQU USART2_U7816R_EGT0, 24 .EQU USART2_U7816R_CLKDIV7, 22 .EQU USART2_U7816R_CLKDIV6, 21 .EQU USART2_U7816R_CLKDIV5, 20 .EQU USART2_U7816R_CLKDIV4, 19 .EQU USART2_U7816R_CLKDIV3, 18 .EQU USART2_U7816R_CLKDIV2, 17 .EQU USART2_U7816R_CLKDIV1, 16 .EQU USART2_U7816R_CLKDIV0, 15 .EQU USART2_U7816R_TREPMS, 14 .EQU USART2_U7816R_RXRE1, 13 .EQU USART2_U7816R_RXRE0, 12 .EQU USART2_U7816R_TXRE1, 11 .EQU USART2_U7816R_TXRE0, 10 .EQU USART2_U7816R_RREPEN, 9 .EQU USART2_U7816R_TREPEN, 8 .EQU USART2_U7816R_BGTEN, 5 .EQU USART2_U7816R_PSEL, 4 .EQU USART2_U7816R_ERSW1, 3 .EQU USART2_U7816R_ERSW0, 2 .EQU USART2_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART2_IER, 0x40000A94 // 0x4000 0A94 USART2_IER Bits------------------------------------- .EQU USART2_IER_UADMIE, 18 .EQU USART2_IER_UTXDE, 17 .EQU USART2_IER_URCDE, 16 .EQU USART2_IER_IDLEIE, 12 .EQU USART2_IER_TXEIE, 11 .EQU USART2_IER_TFEIE, 10 .EQU USART2_IER_RDRIE, 9 .EQU USART2_IER_CTSIE, 8 .EQU USART2_IER_REIE, 7 .EQU USART2_IER_TEIE, 6 .EQU USART2_IER_WUIE, 5 .EQU USART2_IER_ABTOIE, 4 .EQU USART2_IER_BRIE, 3 .EQU USART2_IER_FREIE, 2 .EQU USART2_IER_PAREIE, 1 .EQU USART2_IER_OVFEIE, 0 // register------------------------------------- .EQU USART2_ADM, 0x40000A98 // 0x4000 0A98 USART2_ADM Bits------------------------------------- .EQU USART2_ADM_ADM7, 7 .EQU USART2_ADM_ADM6, 6 .EQU USART2_ADM_ADM5, 5 .EQU USART2_ADM_ADM4, 4 .EQU USART2_ADM_ADM3, 3 .EQU USART2_ADM_ADM2, 2 .EQU USART2_ADM_ADM1, 1 .EQU USART2_ADM_ADM0, 0 // register------------------------------------- .EQU USART3_CTLR, 0x40000B00 // 0x4000 0B00 USART3_CTLR Bits------------------------------------- .EQU USART3_CTLR_SLMEN, 31 .EQU USART3_CTLR_RESHD, 30 .EQU USART3_CTLR_IRDAEN, 29 .EQU USART3_CTLR_BKPWS, 26 .EQU USART3_CTLR_RTSE, 25 .EQU USART3_CTLR_CTSE, 24 .EQU USART3_CTLR_TRGSEL1, 23 .EQU USART3_CTLR_TRGSEL0, 22 .EQU USART3_CTLR_DT9EN, 21 .EQU USART3_CTLR_PARM, 20 .EQU USART3_CTLR_TX9SEL, 19 .EQU USART3_CTLR_STPW, 18 .EQU USART3_CTLR_TIDLEEN, 17 .EQU USART3_CTLR_RXEN, 16 .EQU USART3_CTLR_TXEN, 15 .EQU USART3_CTLR_SYNC, 14 .EQU USART3_CTLR_SENDB, 13 .EQU USART3_CTLR_RIDLES, 12 .EQU USART3_CTLR_ABRDEN, 11 .EQU USART3_CTLR_ADREN, 9 .EQU USART3_CTLR_CSRS, 8 .EQU USART3_CTLR_WUEN, 7 .EQU USART3_CTLR_DINV, 6 .EQU USART3_CTLR_RCONV, 5 .EQU USART3_CTLR_TCONV, 4 .EQU USART3_CTLR_SCKPS, 3 .EQU USART3_CTLR_BRCKS1, 2 .EQU USART3_CTLR_BRCKS0, 1 .EQU USART3_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART3_BRGR, 0x40000B04 // 0x4000 0B04 USART3_BRGR Bits------------------------------------- .EQU USART3_BRGR_BRGF2_3, 23 .EQU USART3_BRGR_BRGF2_2, 22 .EQU USART3_BRGR_BRGF2_1, 21 .EQU USART3_BRGR_BRGF2_0, 20 .EQU USART3_BRGR_BRGF1_3, 19 .EQU USART3_BRGR_BRGF1_2, 18 .EQU USART3_BRGR_BRGF1_1, 17 .EQU USART3_BRGR_BRGF1_0, 16 .EQU USART3_BRGR_BRGM15, 15 .EQU USART3_BRGR_BRGM14, 14 .EQU USART3_BRGR_BRGM13, 13 .EQU USART3_BRGR_BRGM12, 12 .EQU USART3_BRGR_BRGM11, 11 .EQU USART3_BRGR_BRGM10, 10 .EQU USART3_BRGR_BRGM9, 9 .EQU USART3_BRGR_BRGM8, 8 .EQU USART3_BRGR_BRGM7, 7 .EQU USART3_BRGR_BRGM6, 6 .EQU USART3_BRGR_BRGM5, 5 .EQU USART3_BRGR_BRGM4, 4 .EQU USART3_BRGR_BRGM3, 3 .EQU USART3_BRGR_BRGM2, 2 .EQU USART3_BRGR_BRGM1, 1 .EQU USART3_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART3_STR, 0x40000B08 // 0x4000 0B08 USART3_STR Bits------------------------------------- .EQU USART3_STR_TX0SEL, 31 .EQU USART3_STR_TX1SEL, 30 .EQU USART3_STR_RXDSEL, 29 .EQU USART3_STR_CTSSEL, 28 .EQU USART3_STR_TXFIF, 27 .EQU USART3_STR_IDLEIC, 26 .EQU USART3_STR_UADMIC, 25 .EQU USART3_STR_CTSIC, 24 .EQU USART3_STR_REIC, 23 .EQU USART3_STR_TEIC, 22 .EQU USART3_STR_WUIC, 21 .EQU USART3_STR_ABTOIC, 20 .EQU USART3_STR_BRIC, 19 .EQU USART3_STR_FREIC, 18 .EQU USART3_STR_PAREIC, 17 .EQU USART3_STR_OVFEIC, 16 .EQU USART3_STR_IDLFIF, 15 .EQU USART3_STR_UADMIF, 14 .EQU USART3_STR_TXEIF, 13 .EQU USART3_STR_TFEIF, 12 .EQU USART3_STR_RDRIF, 11 .EQU USART3_STR_TXFR, 10 .EQU USART3_STR_RCFR, 9 .EQU USART3_STR_CTSIF, 8 .EQU USART3_STR_REIF, 7 .EQU USART3_STR_TEIF, 6 .EQU USART3_STR_WUIF, 5 .EQU USART3_STR_ABTOIF, 4 .EQU USART3_STR_BRIF, 3 .EQU USART3_STR_FREIF, 2 .EQU USART3_STR_PAREIF, 1 .EQU USART3_STR_OVFEIF, 0 // register------------------------------------- .EQU USART3_TBUFR, 0x40000B0C // 0x4000 0B0C USART3_TBUFR Bits------------------------------------- .EQU USART3_TBUFR_TBUF7, 7 .EQU USART3_TBUFR_TBUF6, 6 .EQU USART3_TBUFR_TBUF5, 5 .EQU USART3_TBUFR_TBUF4, 4 .EQU USART3_TBUFR_TBUF3, 3 .EQU USART3_TBUFR_TBUF2, 2 .EQU USART3_TBUFR_TBUF1, 1 .EQU USART3_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART3_RBUFR, 0x40000B0C // 0x4000 0B0C USART3_RBUFR Bits------------------------------------- .EQU USART3_RBUFR_RBUF8, 8 .EQU USART3_RBUFR_RBUF7, 7 .EQU USART3_RBUFR_RBUF6, 6 .EQU USART3_RBUFR_RBUF5, 5 .EQU USART3_RBUFR_RBUF4, 4 .EQU USART3_RBUFR_RBUF3, 3 .EQU USART3_RBUFR_RBUF2, 2 .EQU USART3_RBUFR_RBUF1, 1 .EQU USART3_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART3_U7816R, 0x40000B10 // 0x4000 0B10 USART3_U7816R Bits------------------------------------- .EQU USART3_U7816R_EGT7, 31 .EQU USART3_U7816R_EGT6, 30 .EQU USART3_U7816R_EGT5, 29 .EQU USART3_U7816R_EGT4, 28 .EQU USART3_U7816R_EGT3, 27 .EQU USART3_U7816R_EGT2, 26 .EQU USART3_U7816R_EGT1, 25 .EQU USART3_U7816R_EGT0, 24 .EQU USART3_U7816R_CLKDIV7, 22 .EQU USART3_U7816R_CLKDIV6, 21 .EQU USART3_U7816R_CLKDIV5, 20 .EQU USART3_U7816R_CLKDIV4, 19 .EQU USART3_U7816R_CLKDIV3, 18 .EQU USART3_U7816R_CLKDIV2, 17 .EQU USART3_U7816R_CLKDIV1, 16 .EQU USART3_U7816R_CLKDIV0, 15 .EQU USART3_U7816R_TREPMS, 14 .EQU USART3_U7816R_RXRE1, 13 .EQU USART3_U7816R_RXRE0, 12 .EQU USART3_U7816R_TXRE1, 11 .EQU USART3_U7816R_TXRE0, 10 .EQU USART3_U7816R_RREPEN, 9 .EQU USART3_U7816R_TREPEN, 8 .EQU USART3_U7816R_BGTEN, 5 .EQU USART3_U7816R_PSEL, 4 .EQU USART3_U7816R_ERSW1, 3 .EQU USART3_U7816R_ERSW0, 2 .EQU USART3_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART3_IER, 0x40000B14 // 0x4000 0B14 USART3_IER Bits------------------------------------- .EQU USART3_IER_UADMIE, 18 .EQU USART3_IER_UTXDE, 17 .EQU USART3_IER_URCDE, 16 .EQU USART3_IER_IDLEIE, 12 .EQU USART3_IER_TXEIE, 11 .EQU USART3_IER_TFEIE, 10 .EQU USART3_IER_RDRIE, 9 .EQU USART3_IER_CTSIE, 8 .EQU USART3_IER_REIE, 7 .EQU USART3_IER_TEIE, 6 .EQU USART3_IER_WUIE, 5 .EQU USART3_IER_ABTOIE, 4 .EQU USART3_IER_BRIE, 3 .EQU USART3_IER_FREIE, 2 .EQU USART3_IER_PAREIE, 1 .EQU USART3_IER_OVFEIE, 0 // register------------------------------------- .EQU USART3_ADM, 0x40000B18 // 0x4000 0B18 USART3_ADM Bits------------------------------------- .EQU USART3_ADM_ADM7, 7 .EQU USART3_ADM_ADM6, 6 .EQU USART3_ADM_ADM5, 5 .EQU USART3_ADM_ADM4, 4 .EQU USART3_ADM_ADM3, 3 .EQU USART3_ADM_ADM2, 2 .EQU USART3_ADM_ADM1, 1 .EQU USART3_ADM_ADM0, 0 // register------------------------------------- .EQU USART4_CTLR, 0x40000B80 // 0x4000 0B80 USART4_CTLR Bits------------------------------------- .EQU USART4_CTLR_SLMEN, 31 .EQU USART4_CTLR_RESHD, 30 .EQU USART4_CTLR_IRDAEN, 29 .EQU USART4_CTLR_BKPWS, 26 .EQU USART4_CTLR_RTSE, 25 .EQU USART4_CTLR_CTSE, 24 .EQU USART4_CTLR_TRGSEL1, 23 .EQU USART4_CTLR_TRGSEL0, 22 .EQU USART4_CTLR_DT9EN, 21 .EQU USART4_CTLR_PARM, 20 .EQU USART4_CTLR_TX9SEL, 19 .EQU USART4_CTLR_STPW, 18 .EQU USART4_CTLR_TIDLEEN, 17 .EQU USART4_CTLR_RXEN, 16 .EQU USART4_CTLR_TXEN, 15 .EQU USART4_CTLR_SYNC, 14 .EQU USART4_CTLR_SENDB, 13 .EQU USART4_CTLR_RIDLES, 12 .EQU USART4_CTLR_ABRDEN, 11 .EQU USART4_CTLR_ADREN, 9 .EQU USART4_CTLR_CSRS, 8 .EQU USART4_CTLR_WUEN, 7 .EQU USART4_CTLR_DINV, 6 .EQU USART4_CTLR_RCONV, 5 .EQU USART4_CTLR_TCONV, 4 .EQU USART4_CTLR_SCKPS, 3 .EQU USART4_CTLR_BRCKS1, 2 .EQU USART4_CTLR_BRCKS0, 1 .EQU USART4_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART4_BRGR, 0x40000B84 // 0x4000 0B84 USART4_BRGR Bits------------------------------------- .EQU USART4_BRGR_BRGF2_3, 23 .EQU USART4_BRGR_BRGF2_2, 22 .EQU USART4_BRGR_BRGF2_1, 21 .EQU USART4_BRGR_BRGF2_0, 20 .EQU USART4_BRGR_BRGF1_3, 19 .EQU USART4_BRGR_BRGF1_2, 18 .EQU USART4_BRGR_BRGF1_1, 17 .EQU USART4_BRGR_BRGF1_0, 16 .EQU USART4_BRGR_BRGM15, 15 .EQU USART4_BRGR_BRGM14, 14 .EQU USART4_BRGR_BRGM13, 13 .EQU USART4_BRGR_BRGM12, 12 .EQU USART4_BRGR_BRGM11, 11 .EQU USART4_BRGR_BRGM10, 10 .EQU USART4_BRGR_BRGM9, 9 .EQU USART4_BRGR_BRGM8, 8 .EQU USART4_BRGR_BRGM7, 7 .EQU USART4_BRGR_BRGM6, 6 .EQU USART4_BRGR_BRGM5, 5 .EQU USART4_BRGR_BRGM4, 4 .EQU USART4_BRGR_BRGM3, 3 .EQU USART4_BRGR_BRGM2, 2 .EQU USART4_BRGR_BRGM1, 1 .EQU USART4_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART4_STR, 0x40000B88 // 0x4000 0B88 USART4_STR Bits------------------------------------- .EQU USART4_STR_TX0SEL, 31 .EQU USART4_STR_TX1SEL, 30 .EQU USART4_STR_RXDSEL, 29 .EQU USART4_STR_CTSSEL, 28 .EQU USART4_STR_TXFIF, 27 .EQU USART4_STR_IDLEIC, 26 .EQU USART4_STR_UADMIC, 25 .EQU USART4_STR_CTSIC, 24 .EQU USART4_STR_REIC, 23 .EQU USART4_STR_TEIC, 22 .EQU USART4_STR_WUIC, 21 .EQU USART4_STR_ABTOIC, 20 .EQU USART4_STR_BRIC, 19 .EQU USART4_STR_FREIC, 18 .EQU USART4_STR_PAREIC, 17 .EQU USART4_STR_OVFEIC, 16 .EQU USART4_STR_IDLFIF, 15 .EQU USART4_STR_UADMIF, 14 .EQU USART4_STR_TXEIF, 13 .EQU USART4_STR_TFEIF, 12 .EQU USART4_STR_RDRIF, 11 .EQU USART4_STR_TXFR, 10 .EQU USART4_STR_RCFR, 9 .EQU USART4_STR_CTSIF, 8 .EQU USART4_STR_REIF, 7 .EQU USART4_STR_TEIF, 6 .EQU USART4_STR_WUIF, 5 .EQU USART4_STR_ABTOIF, 4 .EQU USART4_STR_BRIF, 3 .EQU USART4_STR_FREIF, 2 .EQU USART4_STR_PAREIF, 1 .EQU USART4_STR_OVFEIF, 0 // register------------------------------------- .EQU USART4_TBUFR, 0x40000B8C // 0x4000 0B8C USART4_TBUFR Bits------------------------------------- .EQU USART4_TBUFR_TBUF7, 7 .EQU USART4_TBUFR_TBUF6, 6 .EQU USART4_TBUFR_TBUF5, 5 .EQU USART4_TBUFR_TBUF4, 4 .EQU USART4_TBUFR_TBUF3, 3 .EQU USART4_TBUFR_TBUF2, 2 .EQU USART4_TBUFR_TBUF1, 1 .EQU USART4_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART4_RBUFR, 0x40000B8C // 0x4000 0B8C USART4_RBUFR Bits------------------------------------- .EQU USART4_RBUFR_RBUF8, 8 .EQU USART4_RBUFR_RBUF7, 7 .EQU USART4_RBUFR_RBUF6, 6 .EQU USART4_RBUFR_RBUF5, 5 .EQU USART4_RBUFR_RBUF4, 4 .EQU USART4_RBUFR_RBUF3, 3 .EQU USART4_RBUFR_RBUF2, 2 .EQU USART4_RBUFR_RBUF1, 1 .EQU USART4_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART4_U7816R, 0x40000B90 // 0x4000 0B90 USART4_U7816R Bits------------------------------------- .EQU USART4_U7816R_EGT7, 31 .EQU USART4_U7816R_EGT6, 30 .EQU USART4_U7816R_EGT5, 29 .EQU USART4_U7816R_EGT4, 28 .EQU USART4_U7816R_EGT3, 27 .EQU USART4_U7816R_EGT2, 26 .EQU USART4_U7816R_EGT1, 25 .EQU USART4_U7816R_EGT0, 24 .EQU USART4_U7816R_CLKDIV7, 22 .EQU USART4_U7816R_CLKDIV6, 21 .EQU USART4_U7816R_CLKDIV5, 20 .EQU USART4_U7816R_CLKDIV4, 19 .EQU USART4_U7816R_CLKDIV3, 18 .EQU USART4_U7816R_CLKDIV2, 17 .EQU USART4_U7816R_CLKDIV1, 16 .EQU USART4_U7816R_CLKDIV0, 15 .EQU USART4_U7816R_TREPMS, 14 .EQU USART4_U7816R_RXRE1, 13 .EQU USART4_U7816R_RXRE0, 12 .EQU USART4_U7816R_TXRE1, 11 .EQU USART4_U7816R_TXRE0, 10 .EQU USART4_U7816R_RREPEN, 9 .EQU USART4_U7816R_TREPEN, 8 .EQU USART4_U7816R_BGTEN, 5 .EQU USART4_U7816R_PSEL, 4 .EQU USART4_U7816R_ERSW1, 3 .EQU USART4_U7816R_ERSW0, 2 .EQU USART4_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART4_IER, 0x40000B94 // 0x4000 0B94 USART4_IER Bits------------------------------------- .EQU USART4_IER_UADMIE, 18 .EQU USART4_IER_UTXDE, 17 .EQU USART4_IER_URCDE, 16 .EQU USART4_IER_IDLEIE, 12 .EQU USART4_IER_TXEIE, 11 .EQU USART4_IER_TFEIE, 10 .EQU USART4_IER_RDRIE, 9 .EQU USART4_IER_CTSIE, 8 .EQU USART4_IER_REIE, 7 .EQU USART4_IER_TEIE, 6 .EQU USART4_IER_WUIE, 5 .EQU USART4_IER_ABTOIE, 4 .EQU USART4_IER_BRIE, 3 .EQU USART4_IER_FREIE, 2 .EQU USART4_IER_PAREIE, 1 .EQU USART4_IER_OVFEIE, 0 // register------------------------------------- .EQU USART4_ADM, 0x40000B98 // 0x4000 0B98 USART4_ADM Bits------------------------------------- .EQU USART4_ADM_ADM7, 7 .EQU USART4_ADM_ADM6, 6 .EQU USART4_ADM_ADM5, 5 .EQU USART4_ADM_ADM4, 4 .EQU USART4_ADM_ADM3, 3 .EQU USART4_ADM_ADM2, 2 .EQU USART4_ADM_ADM1, 1 .EQU USART4_ADM_ADM0, 0 // register------------------------------------- .EQU SPI0_BRGR, 0x40000C00 // 0x4000 0C00 SPI0_BRGR Bits------------------------------------- .EQU SPI0_BRGR_I2SODD, 25 .EQU SPI0_BRGR_MCKEN, 24 .EQU SPI0_BRGR_I2SIDV7, 23 .EQU SPI0_BRGR_I2SIDV6, 22 .EQU SPI0_BRGR_I2SIDV5, 21 .EQU SPI0_BRGR_I2SIDV4, 20 .EQU SPI0_BRGR_I2SIDV3, 19 .EQU SPI0_BRGR_I2SIDV2, 18 .EQU SPI0_BRGR_I2SIDV1, 17 .EQU SPI0_BRGR_I2SIDV0, 16 .EQU SPI0_BRGR_SPIBRG15, 15 .EQU SPI0_BRGR_SPIBRG14, 14 .EQU SPI0_BRGR_SPIBRG13, 13 .EQU SPI0_BRGR_SPIBRG12, 12 .EQU SPI0_BRGR_SPIBRG11, 11 .EQU SPI0_BRGR_SPIBRG10, 10 .EQU SPI0_BRGR_SPIBRG9, 9 .EQU SPI0_BRGR_SPIBRG8, 8 .EQU SPI0_BRGR_SPIBRG7, 7 .EQU SPI0_BRGR_SPIBRG6, 6 .EQU SPI0_BRGR_SPIBRG5, 5 .EQU SPI0_BRGR_SPIBRG4, 4 .EQU SPI0_BRGR_SPIBRG3, 3 .EQU SPI0_BRGR_SPIBRG2, 2 .EQU SPI0_BRGR_SPIBRG1, 1 .EQU SPI0_BRGR_SPIBRG0, 0 // register------------------------------------- .EQU SPI0_CTLR, 0x40000C04 // 0x4000 0C04 SPI0_CTLR Bits------------------------------------- .EQU SPI0_CTLR_I2SCKS1, 26 .EQU SPI0_CTLR_I2SCKS0, 25 .EQU SPI0_CTLR_PCMS, 24 .EQU SPI0_CTLR_I2SSS1, 23 .EQU SPI0_CTLR_I2SSS0, 22 .EQU SPI0_CTLR_I2SMC1, 21 .EQU SPI0_CTLR_I2SMC0, 20 .EQU SPI0_CTLR_MCKOS, 18 .EQU SPI0_CTLR_I2SMD, 16 .EQU SPI0_CTLR_SSEL1, 15 .EQU SPI0_CTLR_SSEL0, 14 .EQU SPI0_CTLR_SPIBS1, 13 .EQU SPI0_CTLR_SPIBS0, 12 .EQU SPI0_CTLR_SPICKE, 9 .EQU SPI0_CTLR_SPICKP, 8 .EQU SPI0_CTLR_SPIIOS, 7 .EQU SPI0_CTLR_SPIDS, 6 .EQU SPI0_CTLR_SPICKS1, 5 .EQU SPI0_CTLR_SPICKS0, 4 .EQU SPI0_CTLR_SPIMS2, 3 .EQU SPI0_CTLR_SPIMS1, 2 .EQU SPI0_CTLR_SPIMS0, 1 .EQU SPI0_CTLR_SPIEN, 0 // register------------------------------------- .EQU SPI0_BUFR, 0x40000C08 // 0x4000 0C08 SPI0_BUFR Bits------------------------------------- .EQU SPI0_BUFR_SPIBUF31, 31 .EQU SPI0_BUFR_SPIBUF30, 30 .EQU SPI0_BUFR_SPIBUF29, 29 .EQU SPI0_BUFR_SPIBUF28, 28 .EQU SPI0_BUFR_SPIBUF27, 27 .EQU SPI0_BUFR_SPIBUF26, 26 .EQU SPI0_BUFR_SPIBUF25, 25 .EQU SPI0_BUFR_SPIBUF24, 24 .EQU SPI0_BUFR_SPIBUF23, 23 .EQU SPI0_BUFR_SPIBUF22, 22 .EQU SPI0_BUFR_SPIBUF21, 21 .EQU SPI0_BUFR_SPIBUF20, 20 .EQU SPI0_BUFR_SPIBUF19, 19 .EQU SPI0_BUFR_SPIBUF18, 18 .EQU SPI0_BUFR_SPIBUF17, 17 .EQU SPI0_BUFR_SPIBUF16, 16 .EQU SPI0_BUFR_SPIBUF15, 15 .EQU SPI0_BUFR_SPIBUF14, 14 .EQU SPI0_BUFR_SPIBUF13, 13 .EQU SPI0_BUFR_SPIBUF12, 12 .EQU SPI0_BUFR_SPIBUF11, 11 .EQU SPI0_BUFR_SPIBUF10, 10 .EQU SPI0_BUFR_SPIBUF9, 9 .EQU SPI0_BUFR_SPIBUF8, 8 .EQU SPI0_BUFR_SPIBUF7, 7 .EQU SPI0_BUFR_SPIBUF6, 6 .EQU SPI0_BUFR_SPIBUF5, 5 .EQU SPI0_BUFR_SPIBUF4, 4 .EQU SPI0_BUFR_SPIBUF3, 3 .EQU SPI0_BUFR_SPIBUF2, 2 .EQU SPI0_BUFR_SPIBUF1, 1 .EQU SPI0_BUFR_SPIBUF0, 0 // register------------------------------------- .EQU SPI0_STR, 0x40000C0C // 0x4000 0C0C SPI0_STR Bits------------------------------------- .EQU SPI0_STR_STXDE, 21 .EQU SPI0_STR_SRCDE, 20 .EQU SPI0_STR_UDRIC, 18 .EQU SPI0_STR_TOVFIC, 17 .EQU SPI0_STR_ROVFIC, 16 .EQU SPI0_STR_TNEIE, 15 .EQU SPI0_STR_RNEIE, 14 .EQU SPI0_STR_TOVFIE, 13 .EQU SPI0_STR_ROVFIE, 12 .EQU SPI0_STR_UDRIE, 11 .EQU SPI0_STR_UDRIF, 6 .EQU SPI0_STR_TOVFIF, 5 .EQU SPI0_STR_ROVFIF, 4 .EQU SPI0_STR_CHSIDE, 3 .EQU SPI0_STR_TNE, 2 .EQU SPI0_STR_RNE, 1 .EQU SPI0_STR_SPIBUSY, 0 // register------------------------------------- .EQU SPI1_BRGR, 0x40000C80 // 0x4000 0C80 SPI1_BRGR Bits------------------------------------- .EQU SPI1_BRGR_I2SODD, 25 .EQU SPI1_BRGR_MCKEN, 24 .EQU SPI1_BRGR_I2SIDV7, 23 .EQU SPI1_BRGR_I2SIDV6, 22 .EQU SPI1_BRGR_I2SIDV5, 21 .EQU SPI1_BRGR_I2SIDV4, 20 .EQU SPI1_BRGR_I2SIDV3, 19 .EQU SPI1_BRGR_I2SIDV2, 18 .EQU SPI1_BRGR_I2SIDV1, 17 .EQU SPI1_BRGR_I2SIDV0, 16 .EQU SPI1_BRGR_SPIBRG15, 15 .EQU SPI1_BRGR_SPIBRG14, 14 .EQU SPI1_BRGR_SPIBRG13, 13 .EQU SPI1_BRGR_SPIBRG12, 12 .EQU SPI1_BRGR_SPIBRG11, 11 .EQU SPI1_BRGR_SPIBRG10, 10 .EQU SPI1_BRGR_SPIBRG9, 9 .EQU SPI1_BRGR_SPIBRG8, 8 .EQU SPI1_BRGR_SPIBRG7, 7 .EQU SPI1_BRGR_SPIBRG6, 6 .EQU SPI1_BRGR_SPIBRG5, 5 .EQU SPI1_BRGR_SPIBRG4, 4 .EQU SPI1_BRGR_SPIBRG3, 3 .EQU SPI1_BRGR_SPIBRG2, 2 .EQU SPI1_BRGR_SPIBRG1, 1 .EQU SPI1_BRGR_SPIBRG0, 0 // register------------------------------------- .EQU SPI1_CTLR, 0x40000C84 // 0x4000 0C84 SPI1_CTLR Bits------------------------------------- .EQU SPI1_CTLR_I2SCKS1, 26 .EQU SPI1_CTLR_I2SCKS0, 25 .EQU SPI1_CTLR_PCMS, 24 .EQU SPI1_CTLR_I2SSS1, 23 .EQU SPI1_CTLR_I2SSS0, 22 .EQU SPI1_CTLR_I2SMC1, 21 .EQU SPI1_CTLR_I2SMC0, 20 .EQU SPI1_CTLR_MCKOS, 18 .EQU SPI1_CTLR_I2SMD, 16 .EQU SPI1_CTLR_SSEL1, 15 .EQU SPI1_CTLR_SSEL0, 14 .EQU SPI1_CTLR_SPIBS1, 13 .EQU SPI1_CTLR_SPIBS0, 12 .EQU SPI1_CTLR_SPICKE, 9 .EQU SPI1_CTLR_SPICKP, 8 .EQU SPI1_CTLR_SPIIOS, 7 .EQU SPI1_CTLR_SPIDS, 6 .EQU SPI1_CTLR_SPICKS1, 5 .EQU SPI1_CTLR_SPICKS0, 4 .EQU SPI1_CTLR_SPIMS2, 3 .EQU SPI1_CTLR_SPIMS1, 2 .EQU SPI1_CTLR_SPIMS0, 1 .EQU SPI1_CTLR_SPIEN, 0 // register------------------------------------- .EQU SPI1_BUFR, 0x40000C88 // 0x4000 0C88 SPI1_BUFR Bits------------------------------------- .EQU SPI1_BUFR_SPIBUF31, 31 .EQU SPI1_BUFR_SPIBUF30, 30 .EQU SPI1_BUFR_SPIBUF29, 29 .EQU SPI1_BUFR_SPIBUF28, 28 .EQU SPI1_BUFR_SPIBUF27, 27 .EQU SPI1_BUFR_SPIBUF26, 26 .EQU SPI1_BUFR_SPIBUF25, 25 .EQU SPI1_BUFR_SPIBUF24, 24 .EQU SPI1_BUFR_SPIBUF23, 23 .EQU SPI1_BUFR_SPIBUF22, 22 .EQU SPI1_BUFR_SPIBUF21, 21 .EQU SPI1_BUFR_SPIBUF20, 20 .EQU SPI1_BUFR_SPIBUF19, 19 .EQU SPI1_BUFR_SPIBUF18, 18 .EQU SPI1_BUFR_SPIBUF17, 17 .EQU SPI1_BUFR_SPIBUF16, 16 .EQU SPI1_BUFR_SPIBUF15, 15 .EQU SPI1_BUFR_SPIBUF14, 14 .EQU SPI1_BUFR_SPIBUF13, 13 .EQU SPI1_BUFR_SPIBUF12, 12 .EQU SPI1_BUFR_SPIBUF11, 11 .EQU SPI1_BUFR_SPIBUF10, 10 .EQU SPI1_BUFR_SPIBUF9, 9 .EQU SPI1_BUFR_SPIBUF8, 8 .EQU SPI1_BUFR_SPIBUF7, 7 .EQU SPI1_BUFR_SPIBUF6, 6 .EQU SPI1_BUFR_SPIBUF5, 5 .EQU SPI1_BUFR_SPIBUF4, 4 .EQU SPI1_BUFR_SPIBUF3, 3 .EQU SPI1_BUFR_SPIBUF2, 2 .EQU SPI1_BUFR_SPIBUF1, 1 .EQU SPI1_BUFR_SPIBUF0, 0 // register------------------------------------- .EQU SPI1_STR, 0x40000C8C // 0x4000 0C8C SPI1_STR Bits------------------------------------- .EQU SPI1_STR_STXDE, 21 .EQU SPI1_STR_SRCDE, 20 .EQU SPI1_STR_UDRIC, 18 .EQU SPI1_STR_TOVFIC, 17 .EQU SPI1_STR_ROVFIC, 16 .EQU SPI1_STR_TNEIE, 15 .EQU SPI1_STR_RNEIE, 14 .EQU SPI1_STR_TOVFIE, 13 .EQU SPI1_STR_ROVFIE, 12 .EQU SPI1_STR_UDRIE, 11 .EQU SPI1_STR_UDRIF, 6 .EQU SPI1_STR_TOVFIF, 5 .EQU SPI1_STR_ROVFIF, 4 .EQU SPI1_STR_CHSIDE, 3 .EQU SPI1_STR_TNE, 2 .EQU SPI1_STR_RNE, 1 .EQU SPI1_STR_SPIBUSY, 0 // register------------------------------------- .EQU I2C0_CTLR, 0x40000D00 // 0x4000 0D00 I2C0_CTLR Bits------------------------------------- .EQU I2C0_CTLR_ADRL, 31 .EQU I2C0_CTLR_ALERT, 27 .EQU I2C0_CTLR_ARPEN, 26 .EQU I2C0_CTLR_SMBT, 25 .EQU I2C0_CTLR_SMBUS, 24 .EQU I2C0_CTLR_NMENA, 22 .EQU I2C0_CTLR_ENASCL, 21 .EQU I2C0_CTLR_MTHALL, 20 .EQU I2C0_CTLR_I2CCKDIV1, 19 .EQU I2C0_CTLR_I2CCKDIV0, 18 .EQU I2C0_CTLR_I2CCKS1, 17 .EQU I2C0_CTLR_I2CCKS0, 16 .EQU I2C0_CTLR_GCEN, 14 .EQU I2C0_CTLR_ACKDT, 13 .EQU I2C0_CTLR_ACKEN, 12 .EQU I2C0_CTLR_SCLNOSTR, 11 .EQU I2C0_CTLR_PEN, 10 .EQU I2C0_CTLR_SEN, 8 .EQU I2C0_CTLR_DHCNT3, 5 .EQU I2C0_CTLR_DHCNT2, 4 .EQU I2C0_CTLR_DHCNT1, 3 .EQU I2C0_CTLR_DHCNT0, 2 .EQU I2C0_CTLR_BADR10, 1 .EQU I2C0_CTLR_I2CEN, 0 // register------------------------------------- .EQU I2C0_SR, 0x40000D04 // 0x4000 0D04 I2C0_SR Bits------------------------------------- .EQU I2C0_SR_OVERIF, 19 .EQU I2C0_SR_BERRIF, 18 .EQU I2C0_SR_ITXDF, 17 .EQU I2C0_SR_IRCDF, 16 .EQU I2C0_SR_TXBE, 13 .EQU I2C0_SR_RCBF, 12 .EQU I2C0_SR_ISIF, 11 .EQU I2C0_SR_SMBDIF, 10 .EQU I2C0_SR_SMBHIF, 9 .EQU I2C0_SR_SMBAIF, 8 .EQU I2C0_SR_RNW, 7 .EQU I2C0_SR_ARBLIF, 6 .EQU I2C0_SR_AFIF, 5 .EQU I2C0_SR_DATA, 4 .EQU I2C0_SR_ADD10, 3 .EQU I2C0_SR_ADDR, 2 .EQU I2C0_SR_PIF, 1 .EQU I2C0_SR_SIF, 0 // register------------------------------------- .EQU I2C0_BUFR, 0x40000D08 // 0x4000 0D08 I2C0_BUFR Bits------------------------------------- .EQU I2C0_BUFR_I2CBUF9, 9 .EQU I2C0_BUFR_I2CBUF8, 8 .EQU I2C0_BUFR_I2CBUF7, 7 .EQU I2C0_BUFR_I2CBUF6, 6 .EQU I2C0_BUFR_I2CBUF5, 5 .EQU I2C0_BUFR_I2CBUF4, 4 .EQU I2C0_BUFR_I2CBUF3, 3 .EQU I2C0_BUFR_I2CBUF2, 2 .EQU I2C0_BUFR_I2CBUF1, 1 .EQU I2C0_BUFR_I2CBUF0, 0 // register------------------------------------- .EQU I2C0_ADDR0, 0x40000D0C // 0x4000 0D0C I2C0_ADDR0 Bits------------------------------------- .EQU I2C0_ADDR0_I2CMSK9, 25 .EQU I2C0_ADDR0_I2CMSK8, 24 .EQU I2C0_ADDR0_I2CMSK7, 23 .EQU I2C0_ADDR0_I2CMSK6, 22 .EQU I2C0_ADDR0_I2CMSK5, 21 .EQU I2C0_ADDR0_I2CMSK4, 20 .EQU I2C0_ADDR0_I2CMSK3, 19 .EQU I2C0_ADDR0_I2CMSK2, 18 .EQU I2C0_ADDR0_I2CMSK1, 17 .EQU I2C0_ADDR0_I2CMSK0, 16 .EQU I2C0_ADDR0_I2CADD9, 9 .EQU I2C0_ADDR0_I2CADD8, 8 .EQU I2C0_ADDR0_I2CADD7, 7 .EQU I2C0_ADDR0_I2CADD6, 6 .EQU I2C0_ADDR0_I2CADD5, 5 .EQU I2C0_ADDR0_I2CADD4, 4 .EQU I2C0_ADDR0_I2CADD3, 3 .EQU I2C0_ADDR0_I2CADD2, 2 .EQU I2C0_ADDR0_I2CADD1, 1 .EQU I2C0_ADDR0_I2CADD0, 0 // register------------------------------------- .EQU I2C0_BRGR, 0x40000D10 // 0x4000 0D10 I2C0_BRGR Bits------------------------------------- .EQU I2C0_BRGR_I2CBRGL15, 31 .EQU I2C0_BRGR_I2CBRGL14, 30 .EQU I2C0_BRGR_I2CBRGL13, 29 .EQU I2C0_BRGR_I2CBRGL12, 28 .EQU I2C0_BRGR_I2CBRGL11, 27 .EQU I2C0_BRGR_I2CBRGL10, 26 .EQU I2C0_BRGR_I2CBRGL9, 25 .EQU I2C0_BRGR_I2CBRGL8, 24 .EQU I2C0_BRGR_I2CBRGL7, 23 .EQU I2C0_BRGR_I2CBRGL6, 22 .EQU I2C0_BRGR_I2CBRGL5, 21 .EQU I2C0_BRGR_I2CBRGL4, 20 .EQU I2C0_BRGR_I2CBRGL3, 19 .EQU I2C0_BRGR_I2CBRGL2, 18 .EQU I2C0_BRGR_I2CBRGL1, 17 .EQU I2C0_BRGR_I2CBRGL0, 16 .EQU I2C0_BRGR_I2CBRGH15, 15 .EQU I2C0_BRGR_I2CBRGH14, 14 .EQU I2C0_BRGR_I2CBRGH13, 13 .EQU I2C0_BRGR_I2CBRGH12, 12 .EQU I2C0_BRGR_I2CBRGH11, 11 .EQU I2C0_BRGR_I2CBRGH10, 10 .EQU I2C0_BRGR_I2CBRGH9, 9 .EQU I2C0_BRGR_I2CBRGH8, 8 .EQU I2C0_BRGR_I2CBRGH7, 7 .EQU I2C0_BRGR_I2CBRGH6, 6 .EQU I2C0_BRGR_I2CBRGH5, 5 .EQU I2C0_BRGR_I2CBRGH4, 4 .EQU I2C0_BRGR_I2CBRGH3, 3 .EQU I2C0_BRGR_I2CBRGH2, 2 .EQU I2C0_BRGR_I2CBRGH1, 1 .EQU I2C0_BRGR_I2CBRGH0, 0 // register------------------------------------- .EQU I2C0_ADDR1, 0x40000D14 // 0x4000 0D14 I2C0_ADDR1 Bits------------------------------------- .EQU I2C0_ADDR1_I2CMSK9, 25 .EQU I2C0_ADDR1_I2CMSK8, 24 .EQU I2C0_ADDR1_I2CMSK7, 23 .EQU I2C0_ADDR1_I2CMSK6, 22 .EQU I2C0_ADDR1_I2CMSK5, 21 .EQU I2C0_ADDR1_I2CMSK4, 20 .EQU I2C0_ADDR1_I2CMSK3, 19 .EQU I2C0_ADDR1_I2CMSK2, 18 .EQU I2C0_ADDR1_I2CMSK1, 17 .EQU I2C0_ADDR1_I2CMSK0, 16 .EQU I2C0_ADDR1_I2CADD9, 9 .EQU I2C0_ADDR1_I2CADD8, 8 .EQU I2C0_ADDR1_I2CADD7, 7 .EQU I2C0_ADDR1_I2CADD6, 6 .EQU I2C0_ADDR1_I2CADD5, 5 .EQU I2C0_ADDR1_I2CADD4, 4 .EQU I2C0_ADDR1_I2CADD3, 3 .EQU I2C0_ADDR1_I2CADD2, 2 .EQU I2C0_ADDR1_I2CADD1, 1 .EQU I2C0_ADDR1_I2CADD0, 0 // register------------------------------------- .EQU I2C0_ADDR2, 0x40000D18 // 0x4000 0D18 I2C0_ADDR2 Bits------------------------------------- .EQU I2C0_ADDR2_I2CMSK9, 25 .EQU I2C0_ADDR2_I2CMSK8, 24 .EQU I2C0_ADDR2_I2CMSK7, 23 .EQU I2C0_ADDR2_I2CMSK6, 22 .EQU I2C0_ADDR2_I2CMSK5, 21 .EQU I2C0_ADDR2_I2CMSK4, 20 .EQU I2C0_ADDR2_I2CMSK3, 19 .EQU I2C0_ADDR2_I2CMSK2, 18 .EQU I2C0_ADDR2_I2CMSK1, 17 .EQU I2C0_ADDR2_I2CMSK0, 16 .EQU I2C0_ADDR2_I2CADD9, 9 .EQU I2C0_ADDR2_I2CADD8, 8 .EQU I2C0_ADDR2_I2CADD7, 7 .EQU I2C0_ADDR2_I2CADD6, 6 .EQU I2C0_ADDR2_I2CADD5, 5 .EQU I2C0_ADDR2_I2CADD4, 4 .EQU I2C0_ADDR2_I2CADD3, 3 .EQU I2C0_ADDR2_I2CADD2, 2 .EQU I2C0_ADDR2_I2CADD1, 1 .EQU I2C0_ADDR2_I2CADD0, 0 // register------------------------------------- .EQU I2C0_ADDR3, 0x40000D1C // 0x4000 0D1C I2C0_ADDR3 Bits------------------------------------- .EQU I2C0_ADDR3_I2CMSK9, 25 .EQU I2C0_ADDR3_I2CMSK8, 24 .EQU I2C0_ADDR3_I2CMSK7, 23 .EQU I2C0_ADDR3_I2CMSK6, 22 .EQU I2C0_ADDR3_I2CMSK5, 21 .EQU I2C0_ADDR3_I2CMSK4, 20 .EQU I2C0_ADDR3_I2CMSK3, 19 .EQU I2C0_ADDR3_I2CMSK2, 18 .EQU I2C0_ADDR3_I2CMSK1, 17 .EQU I2C0_ADDR3_I2CMSK0, 16 .EQU I2C0_ADDR3_I2CADD9, 9 .EQU I2C0_ADDR3_I2CADD8, 8 .EQU I2C0_ADDR3_I2CADD7, 7 .EQU I2C0_ADDR3_I2CADD6, 6 .EQU I2C0_ADDR3_I2CADD5, 5 .EQU I2C0_ADDR3_I2CADD4, 4 .EQU I2C0_ADDR3_I2CADD3, 3 .EQU I2C0_ADDR3_I2CADD2, 2 .EQU I2C0_ADDR3_I2CADD1, 1 .EQU I2C0_ADDR3_I2CADD0, 0 // register------------------------------------- .EQU I2C0_IER, 0x40000D20 // 0x4000 0D20 I2C0_IER Bits------------------------------------- .EQU I2C0_IER_OVERIE, 19 .EQU I2C0_IER_BERRIE, 18 .EQU I2C0_IER_ITXDE, 17 .EQU I2C0_IER_IRCDE, 16 .EQU I2C0_IER_ISIE, 11 .EQU I2C0_IER_SMBDIE, 10 .EQU I2C0_IER_SMBHIE, 9 .EQU I2C0_IER_SMBAIE, 8 .EQU I2C0_IER_ARBLIE, 6 .EQU I2C0_IER_AFIE, 5 .EQU I2C0_IER_PIE, 1 .EQU I2C0_IER_SIE, 0 // register------------------------------------- .EQU I2C1_CTLR, 0x40000D80 // 0x4000 0D80 I2C1_CTLR Bits------------------------------------- .EQU I2C1_CTLR_ADRL, 31 .EQU I2C1_CTLR_ALERT, 27 .EQU I2C1_CTLR_ARPEN, 26 .EQU I2C1_CTLR_SMBT, 25 .EQU I2C1_CTLR_SMBUS, 24 .EQU I2C1_CTLR_NMENA, 22 .EQU I2C1_CTLR_ENASCL, 21 .EQU I2C1_CTLR_MTHALL, 20 .EQU I2C1_CTLR_I2CCKDIV1, 19 .EQU I2C1_CTLR_I2CCKDIV0, 18 .EQU I2C1_CTLR_I2CCKS1, 17 .EQU I2C1_CTLR_I2CCKS0, 16 .EQU I2C1_CTLR_GCEN, 14 .EQU I2C1_CTLR_ACKDT, 13 .EQU I2C1_CTLR_ACKEN, 12 .EQU I2C1_CTLR_SCLNOSTR, 11 .EQU I2C1_CTLR_PEN, 10 .EQU I2C1_CTLR_SEN, 8 .EQU I2C1_CTLR_DHCNT3, 5 .EQU I2C1_CTLR_DHCNT2, 4 .EQU I2C1_CTLR_DHCNT1, 3 .EQU I2C1_CTLR_DHCNT0, 2 .EQU I2C1_CTLR_BADR10, 1 .EQU I2C1_CTLR_I2CEN, 0 // register------------------------------------- .EQU I2C1_SR, 0x40000D84 // 0x4000 0D84 I2C1_SR Bits------------------------------------- .EQU I2C1_SR_OVERIF, 19 .EQU I2C1_SR_BERRIF, 18 .EQU I2C1_SR_ITXDF, 17 .EQU I2C1_SR_IRCDF, 16 .EQU I2C1_SR_TXBE, 13 .EQU I2C1_SR_RCBF, 12 .EQU I2C1_SR_ISIF, 11 .EQU I2C1_SR_SMBDIF, 10 .EQU I2C1_SR_SMBHIF, 9 .EQU I2C1_SR_SMBAIF, 8 .EQU I2C1_SR_RNW, 7 .EQU I2C1_SR_ARBLIF, 6 .EQU I2C1_SR_AFIF, 5 .EQU I2C1_SR_DATA, 4 .EQU I2C1_SR_ADD10, 3 .EQU I2C1_SR_ADDR, 2 .EQU I2C1_SR_PIF, 1 .EQU I2C1_SR_SIF, 0 // register------------------------------------- .EQU I2C1_BUFR, 0x40000D88 // 0x4000 0D88 I2C1_BUFR Bits------------------------------------- .EQU I2C1_BUFR_I2CBUF9, 9 .EQU I2C1_BUFR_I2CBUF8, 8 .EQU I2C1_BUFR_I2CBUF7, 7 .EQU I2C1_BUFR_I2CBUF6, 6 .EQU I2C1_BUFR_I2CBUF5, 5 .EQU I2C1_BUFR_I2CBUF4, 4 .EQU I2C1_BUFR_I2CBUF3, 3 .EQU I2C1_BUFR_I2CBUF2, 2 .EQU I2C1_BUFR_I2CBUF1, 1 .EQU I2C1_BUFR_I2CBUF0, 0 // register------------------------------------- .EQU I2C1_ADDR0, 0x40000D8C // 0x4000 0D8C I2C1_ADDR0 Bits------------------------------------- .EQU I2C1_ADDR0_I2CMSK9, 25 .EQU I2C1_ADDR0_I2CMSK8, 24 .EQU I2C1_ADDR0_I2CMSK7, 23 .EQU I2C1_ADDR0_I2CMSK6, 22 .EQU I2C1_ADDR0_I2CMSK5, 21 .EQU I2C1_ADDR0_I2CMSK4, 20 .EQU I2C1_ADDR0_I2CMSK3, 19 .EQU I2C1_ADDR0_I2CMSK2, 18 .EQU I2C1_ADDR0_I2CMSK1, 17 .EQU I2C1_ADDR0_I2CMSK0, 16 .EQU I2C1_ADDR0_I2CADD9, 9 .EQU I2C1_ADDR0_I2CADD8, 8 .EQU I2C1_ADDR0_I2CADD7, 7 .EQU I2C1_ADDR0_I2CADD6, 6 .EQU I2C1_ADDR0_I2CADD5, 5 .EQU I2C1_ADDR0_I2CADD4, 4 .EQU I2C1_ADDR0_I2CADD3, 3 .EQU I2C1_ADDR0_I2CADD2, 2 .EQU I2C1_ADDR0_I2CADD1, 1 .EQU I2C1_ADDR0_I2CADD0, 0 // register------------------------------------- .EQU I2C1_BRGR, 0x40000D90 // 0x4000 0D90 I2C1_BRGR Bits------------------------------------- .EQU I2C1_BRGR_I2CBRGL15, 31 .EQU I2C1_BRGR_I2CBRGL14, 30 .EQU I2C1_BRGR_I2CBRGL13, 29 .EQU I2C1_BRGR_I2CBRGL12, 28 .EQU I2C1_BRGR_I2CBRGL11, 27 .EQU I2C1_BRGR_I2CBRGL10, 26 .EQU I2C1_BRGR_I2CBRGL9, 25 .EQU I2C1_BRGR_I2CBRGL8, 24 .EQU I2C1_BRGR_I2CBRGL7, 23 .EQU I2C1_BRGR_I2CBRGL6, 22 .EQU I2C1_BRGR_I2CBRGL5, 21 .EQU I2C1_BRGR_I2CBRGL4, 20 .EQU I2C1_BRGR_I2CBRGL3, 19 .EQU I2C1_BRGR_I2CBRGL2, 18 .EQU I2C1_BRGR_I2CBRGL1, 17 .EQU I2C1_BRGR_I2CBRGL0, 16 .EQU I2C1_BRGR_I2CBRGH15, 15 .EQU I2C1_BRGR_I2CBRGH14, 14 .EQU I2C1_BRGR_I2CBRGH13, 13 .EQU I2C1_BRGR_I2CBRGH12, 12 .EQU I2C1_BRGR_I2CBRGH11, 11 .EQU I2C1_BRGR_I2CBRGH10, 10 .EQU I2C1_BRGR_I2CBRGH9, 9 .EQU I2C1_BRGR_I2CBRGH8, 8 .EQU I2C1_BRGR_I2CBRGH7, 7 .EQU I2C1_BRGR_I2CBRGH6, 6 .EQU I2C1_BRGR_I2CBRGH5, 5 .EQU I2C1_BRGR_I2CBRGH4, 4 .EQU I2C1_BRGR_I2CBRGH3, 3 .EQU I2C1_BRGR_I2CBRGH2, 2 .EQU I2C1_BRGR_I2CBRGH1, 1 .EQU I2C1_BRGR_I2CBRGH0, 0 // register------------------------------------- .EQU I2C1_ADDR1, 0x40000D94 // 0x4000 0D94 I2C1_ADDR1 Bits------------------------------------- .EQU I2C1_ADDR1_I2CMSK9, 25 .EQU I2C1_ADDR1_I2CMSK8, 24 .EQU I2C1_ADDR1_I2CMSK7, 23 .EQU I2C1_ADDR1_I2CMSK6, 22 .EQU I2C1_ADDR1_I2CMSK5, 21 .EQU I2C1_ADDR1_I2CMSK4, 20 .EQU I2C1_ADDR1_I2CMSK3, 19 .EQU I2C1_ADDR1_I2CMSK2, 18 .EQU I2C1_ADDR1_I2CMSK1, 17 .EQU I2C1_ADDR1_I2CMSK0, 16 .EQU I2C1_ADDR1_I2CADD9, 9 .EQU I2C1_ADDR1_I2CADD8, 8 .EQU I2C1_ADDR1_I2CADD7, 7 .EQU I2C1_ADDR1_I2CADD6, 6 .EQU I2C1_ADDR1_I2CADD5, 5 .EQU I2C1_ADDR1_I2CADD4, 4 .EQU I2C1_ADDR1_I2CADD3, 3 .EQU I2C1_ADDR1_I2CADD2, 2 .EQU I2C1_ADDR1_I2CADD1, 1 .EQU I2C1_ADDR1_I2CADD0, 0 // register------------------------------------- .EQU I2C1_ADDR2, 0x40000D98 // 0x4000 0D98 I2C1_ADDR2 Bits------------------------------------- .EQU I2C1_ADDR2_I2CMSK9, 25 .EQU I2C1_ADDR2_I2CMSK8, 24 .EQU I2C1_ADDR2_I2CMSK7, 23 .EQU I2C1_ADDR2_I2CMSK6, 22 .EQU I2C1_ADDR2_I2CMSK5, 21 .EQU I2C1_ADDR2_I2CMSK4, 20 .EQU I2C1_ADDR2_I2CMSK3, 19 .EQU I2C1_ADDR2_I2CMSK2, 18 .EQU I2C1_ADDR2_I2CMSK1, 17 .EQU I2C1_ADDR2_I2CMSK0, 16 .EQU I2C1_ADDR2_I2CADD9, 9 .EQU I2C1_ADDR2_I2CADD8, 8 .EQU I2C1_ADDR2_I2CADD7, 7 .EQU I2C1_ADDR2_I2CADD6, 6 .EQU I2C1_ADDR2_I2CADD5, 5 .EQU I2C1_ADDR2_I2CADD4, 4 .EQU I2C1_ADDR2_I2CADD3, 3 .EQU I2C1_ADDR2_I2CADD2, 2 .EQU I2C1_ADDR2_I2CADD1, 1 .EQU I2C1_ADDR2_I2CADD0, 0 // register------------------------------------- .EQU I2C1_ADDR3, 0x40000D9C // 0x4000 0D9C I2C1_ADDR3 Bits------------------------------------- .EQU I2C1_ADDR3_I2CMSK9, 25 .EQU I2C1_ADDR3_I2CMSK8, 24 .EQU I2C1_ADDR3_I2CMSK7, 23 .EQU I2C1_ADDR3_I2CMSK6, 22 .EQU I2C1_ADDR3_I2CMSK5, 21 .EQU I2C1_ADDR3_I2CMSK4, 20 .EQU I2C1_ADDR3_I2CMSK3, 19 .EQU I2C1_ADDR3_I2CMSK2, 18 .EQU I2C1_ADDR3_I2CMSK1, 17 .EQU I2C1_ADDR3_I2CMSK0, 16 .EQU I2C1_ADDR3_I2CADD9, 9 .EQU I2C1_ADDR3_I2CADD8, 8 .EQU I2C1_ADDR3_I2CADD7, 7 .EQU I2C1_ADDR3_I2CADD6, 6 .EQU I2C1_ADDR3_I2CADD5, 5 .EQU I2C1_ADDR3_I2CADD4, 4 .EQU I2C1_ADDR3_I2CADD3, 3 .EQU I2C1_ADDR3_I2CADD2, 2 .EQU I2C1_ADDR3_I2CADD1, 1 .EQU I2C1_ADDR3_I2CADD0, 0 // register------------------------------------- .EQU I2C1_IER, 0x40000DA0 // 0x4000 0DA0 I2C1_IER Bits------------------------------------- .EQU I2C1_IER_OVERIE, 19 .EQU I2C1_IER_BERRIE, 18 .EQU I2C1_IER_ITXDE, 17 .EQU I2C1_IER_IRCDE, 16 .EQU I2C1_IER_ISIE, 11 .EQU I2C1_IER_SMBDIE, 10 .EQU I2C1_IER_SMBHIE, 9 .EQU I2C1_IER_SMBAIE, 8 .EQU I2C1_IER_ARBLIE, 6 .EQU I2C1_IER_AFIE, 5 .EQU I2C1_IER_PIE, 1 .EQU I2C1_IER_SIE, 0 // register------------------------------------- .EQU I2C2_CTLR, 0x40000E00 // 0x4000 0E00 I2C2_CTLR Bits------------------------------------- .EQU I2C2_CTLR_ADRL, 31 .EQU I2C2_CTLR_ALERT, 27 .EQU I2C2_CTLR_ARPEN, 26 .EQU I2C2_CTLR_SMBT, 25 .EQU I2C2_CTLR_SMBUS, 24 .EQU I2C2_CTLR_NMENA, 22 .EQU I2C2_CTLR_ENASCL, 21 .EQU I2C2_CTLR_MTHALL, 20 .EQU I2C2_CTLR_I2CCKDIV1, 19 .EQU I2C2_CTLR_I2CCKDIV0, 18 .EQU I2C2_CTLR_I2CCKS1, 17 .EQU I2C2_CTLR_I2CCKS0, 16 .EQU I2C2_CTLR_GCEN, 14 .EQU I2C2_CTLR_ACKDT, 13 .EQU I2C2_CTLR_ACKEN, 12 .EQU I2C2_CTLR_SCLNOSTR, 11 .EQU I2C2_CTLR_PEN, 10 .EQU I2C2_CTLR_SEN, 8 .EQU I2C2_CTLR_DHCNT3, 5 .EQU I2C2_CTLR_DHCNT2, 4 .EQU I2C2_CTLR_DHCNT1, 3 .EQU I2C2_CTLR_DHCNT0, 2 .EQU I2C2_CTLR_BADR10, 1 .EQU I2C2_CTLR_I2CEN, 0 // register------------------------------------- .EQU I2C2_SR, 0x40000E04 // 0x4000 0E04 I2C2_SR Bits------------------------------------- .EQU I2C2_SR_OVERIF, 19 .EQU I2C2_SR_BERRIF, 18 .EQU I2C2_SR_ITXDF, 17 .EQU I2C2_SR_IRCDF, 16 .EQU I2C2_SR_TXBE, 13 .EQU I2C2_SR_RCBF, 12 .EQU I2C2_SR_ISIF, 11 .EQU I2C2_SR_SMBDIF, 10 .EQU I2C2_SR_SMBHIF, 9 .EQU I2C2_SR_SMBAIF, 8 .EQU I2C2_SR_RNW, 7 .EQU I2C2_SR_ARBLIF, 6 .EQU I2C2_SR_AFIF, 5 .EQU I2C2_SR_DATA, 4 .EQU I2C2_SR_ADD10, 3 .EQU I2C2_SR_ADDR, 2 .EQU I2C2_SR_PIF, 1 .EQU I2C2_SR_SIF, 0 // register------------------------------------- .EQU I2C2_BUFR, 0x40000E08 // 0x4000 0E08 I2C2_BUFR Bits------------------------------------- .EQU I2C2_BUFR_I2CBUF9, 9 .EQU I2C2_BUFR_I2CBUF8, 8 .EQU I2C2_BUFR_I2CBUF7, 7 .EQU I2C2_BUFR_I2CBUF6, 6 .EQU I2C2_BUFR_I2CBUF5, 5 .EQU I2C2_BUFR_I2CBUF4, 4 .EQU I2C2_BUFR_I2CBUF3, 3 .EQU I2C2_BUFR_I2CBUF2, 2 .EQU I2C2_BUFR_I2CBUF1, 1 .EQU I2C2_BUFR_I2CBUF0, 0 // register------------------------------------- .EQU I2C2_ADDR0, 0x40000E0C // 0x4000 0E0C I2C2_ADDR0 Bits------------------------------------- .EQU I2C2_ADDR0_I2CMSK9, 25 .EQU I2C2_ADDR0_I2CMSK8, 24 .EQU I2C2_ADDR0_I2CMSK7, 23 .EQU I2C2_ADDR0_I2CMSK6, 22 .EQU I2C2_ADDR0_I2CMSK5, 21 .EQU I2C2_ADDR0_I2CMSK4, 20 .EQU I2C2_ADDR0_I2CMSK3, 19 .EQU I2C2_ADDR0_I2CMSK2, 18 .EQU I2C2_ADDR0_I2CMSK1, 17 .EQU I2C2_ADDR0_I2CMSK0, 16 .EQU I2C2_ADDR0_I2CADD9, 9 .EQU I2C2_ADDR0_I2CADD8, 8 .EQU I2C2_ADDR0_I2CADD7, 7 .EQU I2C2_ADDR0_I2CADD6, 6 .EQU I2C2_ADDR0_I2CADD5, 5 .EQU I2C2_ADDR0_I2CADD4, 4 .EQU I2C2_ADDR0_I2CADD3, 3 .EQU I2C2_ADDR0_I2CADD2, 2 .EQU I2C2_ADDR0_I2CADD1, 1 .EQU I2C2_ADDR0_I2CADD0, 0 // register------------------------------------- .EQU I2C2_BRGR, 0x40000E10 // 0x4000 0E10 I2C2_BRGR Bits------------------------------------- .EQU I2C2_BRGR_I2CBRGL15, 31 .EQU I2C2_BRGR_I2CBRGL14, 30 .EQU I2C2_BRGR_I2CBRGL13, 29 .EQU I2C2_BRGR_I2CBRGL12, 28 .EQU I2C2_BRGR_I2CBRGL11, 27 .EQU I2C2_BRGR_I2CBRGL10, 26 .EQU I2C2_BRGR_I2CBRGL9, 25 .EQU I2C2_BRGR_I2CBRGL8, 24 .EQU I2C2_BRGR_I2CBRGL7, 23 .EQU I2C2_BRGR_I2CBRGL6, 22 .EQU I2C2_BRGR_I2CBRGL5, 21 .EQU I2C2_BRGR_I2CBRGL4, 20 .EQU I2C2_BRGR_I2CBRGL3, 19 .EQU I2C2_BRGR_I2CBRGL2, 18 .EQU I2C2_BRGR_I2CBRGL1, 17 .EQU I2C2_BRGR_I2CBRGL0, 16 .EQU I2C2_BRGR_I2CBRGH15, 15 .EQU I2C2_BRGR_I2CBRGH14, 14 .EQU I2C2_BRGR_I2CBRGH13, 13 .EQU I2C2_BRGR_I2CBRGH12, 12 .EQU I2C2_BRGR_I2CBRGH11, 11 .EQU I2C2_BRGR_I2CBRGH10, 10 .EQU I2C2_BRGR_I2CBRGH9, 9 .EQU I2C2_BRGR_I2CBRGH8, 8 .EQU I2C2_BRGR_I2CBRGH7, 7 .EQU I2C2_BRGR_I2CBRGH6, 6 .EQU I2C2_BRGR_I2CBRGH5, 5 .EQU I2C2_BRGR_I2CBRGH4, 4 .EQU I2C2_BRGR_I2CBRGH3, 3 .EQU I2C2_BRGR_I2CBRGH2, 2 .EQU I2C2_BRGR_I2CBRGH1, 1 .EQU I2C2_BRGR_I2CBRGH0, 0 // register------------------------------------- .EQU I2C2_ADDR1, 0x40000E14 // 0x4000 0E14 I2C2_ADDR1 Bits------------------------------------- .EQU I2C2_ADDR1_I2CMSK9, 25 .EQU I2C2_ADDR1_I2CMSK8, 24 .EQU I2C2_ADDR1_I2CMSK7, 23 .EQU I2C2_ADDR1_I2CMSK6, 22 .EQU I2C2_ADDR1_I2CMSK5, 21 .EQU I2C2_ADDR1_I2CMSK4, 20 .EQU I2C2_ADDR1_I2CMSK3, 19 .EQU I2C2_ADDR1_I2CMSK2, 18 .EQU I2C2_ADDR1_I2CMSK1, 17 .EQU I2C2_ADDR1_I2CMSK0, 16 .EQU I2C2_ADDR1_I2CADD9, 9 .EQU I2C2_ADDR1_I2CADD8, 8 .EQU I2C2_ADDR1_I2CADD7, 7 .EQU I2C2_ADDR1_I2CADD6, 6 .EQU I2C2_ADDR1_I2CADD5, 5 .EQU I2C2_ADDR1_I2CADD4, 4 .EQU I2C2_ADDR1_I2CADD3, 3 .EQU I2C2_ADDR1_I2CADD2, 2 .EQU I2C2_ADDR1_I2CADD1, 1 .EQU I2C2_ADDR1_I2CADD0, 0 // register------------------------------------- .EQU I2C2_ADDR2, 0x40000E18 // 0x4000 0E18 I2C2_ADDR2 Bits------------------------------------- .EQU I2C2_ADDR2_I2CMSK9, 25 .EQU I2C2_ADDR2_I2CMSK8, 24 .EQU I2C2_ADDR2_I2CMSK7, 23 .EQU I2C2_ADDR2_I2CMSK6, 22 .EQU I2C2_ADDR2_I2CMSK5, 21 .EQU I2C2_ADDR2_I2CMSK4, 20 .EQU I2C2_ADDR2_I2CMSK3, 19 .EQU I2C2_ADDR2_I2CMSK2, 18 .EQU I2C2_ADDR2_I2CMSK1, 17 .EQU I2C2_ADDR2_I2CMSK0, 16 .EQU I2C2_ADDR2_I2CADD9, 9 .EQU I2C2_ADDR2_I2CADD8, 8 .EQU I2C2_ADDR2_I2CADD7, 7 .EQU I2C2_ADDR2_I2CADD6, 6 .EQU I2C2_ADDR2_I2CADD5, 5 .EQU I2C2_ADDR2_I2CADD4, 4 .EQU I2C2_ADDR2_I2CADD3, 3 .EQU I2C2_ADDR2_I2CADD2, 2 .EQU I2C2_ADDR2_I2CADD1, 1 .EQU I2C2_ADDR2_I2CADD0, 0 // register------------------------------------- .EQU I2C2_ADDR3, 0x40000E1C // 0x4000 0E1C I2C2_ADDR3 Bits------------------------------------- .EQU I2C2_ADDR3_I2CMSK9, 25 .EQU I2C2_ADDR3_I2CMSK8, 24 .EQU I2C2_ADDR3_I2CMSK7, 23 .EQU I2C2_ADDR3_I2CMSK6, 22 .EQU I2C2_ADDR3_I2CMSK5, 21 .EQU I2C2_ADDR3_I2CMSK4, 20 .EQU I2C2_ADDR3_I2CMSK3, 19 .EQU I2C2_ADDR3_I2CMSK2, 18 .EQU I2C2_ADDR3_I2CMSK1, 17 .EQU I2C2_ADDR3_I2CMSK0, 16 .EQU I2C2_ADDR3_I2CADD9, 9 .EQU I2C2_ADDR3_I2CADD8, 8 .EQU I2C2_ADDR3_I2CADD7, 7 .EQU I2C2_ADDR3_I2CADD6, 6 .EQU I2C2_ADDR3_I2CADD5, 5 .EQU I2C2_ADDR3_I2CADD4, 4 .EQU I2C2_ADDR3_I2CADD3, 3 .EQU I2C2_ADDR3_I2CADD2, 2 .EQU I2C2_ADDR3_I2CADD1, 1 .EQU I2C2_ADDR3_I2CADD0, 0 // register------------------------------------- .EQU I2C2_IER, 0x40000E20 // 0x4000 0E20 I2C2_IER Bits------------------------------------- .EQU I2C2_IER_OVERIE, 19 .EQU I2C2_IER_BERRIE, 18 .EQU I2C2_IER_ITXDE, 17 .EQU I2C2_IER_IRCDE, 16 .EQU I2C2_IER_ISIE, 11 .EQU I2C2_IER_SMBDIE, 10 .EQU I2C2_IER_SMBHIE, 9 .EQU I2C2_IER_SMBAIE, 8 .EQU I2C2_IER_ARBLIE, 6 .EQU I2C2_IER_AFIE, 5 .EQU I2C2_IER_PIE, 1 .EQU I2C2_IER_SIE, 0 // register------------------------------------- .EQU RTC_CR, 0x40000F00 // 0x4000 0F00 RTC_CR Bits------------------------------------- .EQU RTC_CR_RTCCAL7, 31 .EQU RTC_CR_RTCCAL6, 30 .EQU RTC_CR_RTCCAL5, 29 .EQU RTC_CR_RTCCAL4, 28 .EQU RTC_CR_RTCCAL3, 27 .EQU RTC_CR_RTCCAL2, 26 .EQU RTC_CR_RTCCAL1, 25 .EQU RTC_CR_RTCCAL0, 24 .EQU RTC_CR_TSEDGE, 22 .EQU RTC_CR_TSEN, 21 .EQU RTC_CR_ADD1H, 20 .EQU RTC_CR_SUB1H, 19 .EQU RTC_CR_RTCTT2, 18 .EQU RTC_CR_RTCTT1, 17 .EQU RTC_CR_RTCTT0, 16 .EQU RTC_CR_RTCTSCH5, 13 .EQU RTC_CR_RTCTSCH4, 12 .EQU RTC_CR_RTCTSCH3, 11 .EQU RTC_CR_RTCTSCH2, 10 .EQU RTC_CR_RTCTSCH1, 9 .EQU RTC_CR_RTCTSCH0, 8 .EQU RTC_CR_RESET, 6 .EQU RTC_CR_LIF, 5 .EQU RTC_CR_HT, 4 .EQU RTC_CR_CNF, 3 .EQU RTC_CR_RTOFF, 2 .EQU RTC_CR_LD, 1 .EQU RTC_CR_RTCEN, 0 // register------------------------------------- .EQU RTC_ALRA, 0x40000F04 // 0x4000 0F04 RTC_ALRA Bits------------------------------------- .EQU RTC_ALRA_ALRENA, 31 .EQU RTC_ALRA_AWENA, 27 .EQU RTC_ALRA_ALRWA2, 26 .EQU RTC_ALRA_ALRWA1, 25 .EQU RTC_ALRA_ALRWA0, 24 .EQU RTC_ALRA_AHENA, 23 .EQU RTC_ALRA_AMPMA, 22 .EQU RTC_ALRA_ALRHA5, 21 .EQU RTC_ALRA_ALRHA4, 20 .EQU RTC_ALRA_ALRHA3, 19 .EQU RTC_ALRA_ALRHA2, 18 .EQU RTC_ALRA_ALRHA1, 17 .EQU RTC_ALRA_ALRHA0, 16 .EQU RTC_ALRA_AMENA, 15 .EQU RTC_ALRA_ALRMA6, 14 .EQU RTC_ALRA_ALRMA5, 13 .EQU RTC_ALRA_ALRMA4, 12 .EQU RTC_ALRA_ALRMA3, 11 .EQU RTC_ALRA_ALRMA2, 10 .EQU RTC_ALRA_ALRMA1, 9 .EQU RTC_ALRA_ALRMA0, 8 .EQU RTC_ALRA_ASENA, 7 .EQU RTC_ALRA_ALRSA6, 6 .EQU RTC_ALRA_ALRSA5, 5 .EQU RTC_ALRA_ALRSA4, 4 .EQU RTC_ALRA_ALRSA3, 3 .EQU RTC_ALRA_ALRSA2, 2 .EQU RTC_ALRA_ALRSA1, 1 .EQU RTC_ALRA_ALRSA0, 0 // register------------------------------------- .EQU RTC_TMR, 0x40000F08 // 0x4000 0F08 RTC_TMR Bits------------------------------------- .EQU RTC_TMR_WEK2, 26 .EQU RTC_TMR_WEK1, 25 .EQU RTC_TMR_WEK0, 24 .EQU RTC_TMR_AMPM, 22 .EQU RTC_TMR_HOUR5, 21 .EQU RTC_TMR_HOUR4, 20 .EQU RTC_TMR_HOUR3, 19 .EQU RTC_TMR_HOUR2, 18 .EQU RTC_TMR_HOUR1, 17 .EQU RTC_TMR_HOUR0, 16 .EQU RTC_TMR_MIN6, 14 .EQU RTC_TMR_MIN5, 13 .EQU RTC_TMR_MIN4, 12 .EQU RTC_TMR_MIN3, 11 .EQU RTC_TMR_MIN2, 10 .EQU RTC_TMR_MIN1, 9 .EQU RTC_TMR_MIN0, 8 .EQU RTC_TMR_SEC6, 6 .EQU RTC_TMR_SEC5, 5 .EQU RTC_TMR_SEC4, 4 .EQU RTC_TMR_SEC3, 3 .EQU RTC_TMR_SEC2, 2 .EQU RTC_TMR_SEC1, 1 .EQU RTC_TMR_SEC0, 0 // register------------------------------------- .EQU RTC_DTR, 0x40000F0C // 0x4000 0F0C RTC_DTR Bits------------------------------------- .EQU RTC_DTR_YEAR7, 23 .EQU RTC_DTR_YEAR6, 22 .EQU RTC_DTR_YEAR5, 21 .EQU RTC_DTR_YEAR4, 20 .EQU RTC_DTR_YEAR3, 19 .EQU RTC_DTR_YEAR2, 18 .EQU RTC_DTR_YEAR1, 17 .EQU RTC_DTR_YEAR0, 16 .EQU RTC_DTR_MTH4, 12 .EQU RTC_DTR_MTH3, 11 .EQU RTC_DTR_MTH2, 10 .EQU RTC_DTR_MTH1, 9 .EQU RTC_DTR_MTH0, 8 .EQU RTC_DTR_DAY5, 5 .EQU RTC_DTR_DAY4, 4 .EQU RTC_DTR_DAY3, 3 .EQU RTC_DTR_DAY2, 2 .EQU RTC_DTR_DAY1, 1 .EQU RTC_DTR_DAY0, 0 // register------------------------------------- .EQU RTC_ALRB, 0x40000F10 // 0x4000 0F10 RTC_ALRB Bits------------------------------------- .EQU RTC_ALRB_ALRENB, 31 .EQU RTC_ALRB_AWENB, 27 .EQU RTC_ALRB_ALRWB2, 26 .EQU RTC_ALRB_ALRWB1, 25 .EQU RTC_ALRB_ALRWB0, 24 .EQU RTC_ALRB_AHENB, 23 .EQU RTC_ALRB_AMPMB, 22 .EQU RTC_ALRB_ALRHB5, 21 .EQU RTC_ALRB_ALRHB4, 20 .EQU RTC_ALRB_ALRHB3, 19 .EQU RTC_ALRB_ALRHB2, 18 .EQU RTC_ALRB_ALRHB1, 17 .EQU RTC_ALRB_ALRHB0, 16 .EQU RTC_ALRB_AMENB, 15 .EQU RTC_ALRB_ALRMB6, 14 .EQU RTC_ALRB_ALRMB5, 13 .EQU RTC_ALRB_ALRMB4, 12 .EQU RTC_ALRB_ALRMB3, 11 .EQU RTC_ALRB_ALRMB2, 10 .EQU RTC_ALRB_ALRMB1, 9 .EQU RTC_ALRB_ALRMB0, 8 .EQU RTC_ALRB_ASENB, 7 .EQU RTC_ALRB_ALRSB6, 6 .EQU RTC_ALRB_ALRSB5, 5 .EQU RTC_ALRB_ALRSB4, 4 .EQU RTC_ALRB_ALRSB3, 3 .EQU RTC_ALRB_ALRSB2, 2 .EQU RTC_ALRB_ALRSB1, 1 .EQU RTC_ALRB_ALRSB0, 0 // register------------------------------------- .EQU RTC_TMER, 0x40000F14 // 0x4000 0F14 RTC_TMER Bits------------------------------------- .EQU RTC_TMER_TMR1_15, 31 .EQU RTC_TMER_TMR1_14, 30 .EQU RTC_TMER_TMR1_13, 29 .EQU RTC_TMER_TMR1_12, 28 .EQU RTC_TMER_TMR1_11, 27 .EQU RTC_TMER_TMR1_10, 26 .EQU RTC_TMER_TMR1_9, 25 .EQU RTC_TMER_TMR1_8, 24 .EQU RTC_TMER_TMR1_7, 23 .EQU RTC_TMER_TMR1_6, 22 .EQU RTC_TMER_TMR1_5, 21 .EQU RTC_TMER_TMR1_4, 20 .EQU RTC_TMER_TMR1_3, 19 .EQU RTC_TMER_TMR1_2, 18 .EQU RTC_TMER_TMR1_1, 17 .EQU RTC_TMER_TMR1_0, 16 .EQU RTC_TMER_TMR0_15, 15 .EQU RTC_TMER_TMR0_14, 14 .EQU RTC_TMER_TMR0_13, 13 .EQU RTC_TMER_TMR0_12, 12 .EQU RTC_TMER_TMR0_11, 11 .EQU RTC_TMER_TMR0_10, 10 .EQU RTC_TMER_TMR0_9, 9 .EQU RTC_TMER_TMR0_8, 8 .EQU RTC_TMER_TMR0_7, 7 .EQU RTC_TMER_TMR0_6, 6 .EQU RTC_TMER_TMR0_5, 5 .EQU RTC_TMER_TMR0_4, 4 .EQU RTC_TMER_TMR0_3, 3 .EQU RTC_TMER_TMR0_2, 2 .EQU RTC_TMER_TMR0_1, 1 .EQU RTC_TMER_TMR0_0, 0 // register------------------------------------- .EQU RTC_TCR, 0x40000F18 // 0x4000 0F18 RTC_TCR Bits------------------------------------- .EQU RTC_TCR_TMR1EN, 9 .EQU RTC_TCR_TMR0EN, 8 .EQU RTC_TCR_TMR1C3, 7 .EQU RTC_TCR_TMR1C2, 6 .EQU RTC_TCR_TMR1C1, 5 .EQU RTC_TCR_TMR1C0, 4 .EQU RTC_TCR_TMR0C3, 3 .EQU RTC_TCR_TMR0C2, 2 .EQU RTC_TCR_TMR0C1, 1 .EQU RTC_TCR_TMR0C0, 0 // register------------------------------------- .EQU RTC_IER, 0x40000F1C // 0x4000 0F1C RTC_IER Bits------------------------------------- .EQU RTC_IER_YEARIE, 15 .EQU RTC_IER_MONTHIE, 14 .EQU RTC_IER_WEEKIE, 13 .EQU RTC_IER_TSIE, 11 .EQU RTC_IER_TSOVFIE, 10 .EQU RTC_IER_RTCT1IE, 9 .EQU RTC_IER_RTCT0IE, 8 .EQU RTC_IER_TTIE, 6 .EQU RTC_IER_ALRBIE, 5 .EQU RTC_IER_ALRAIE, 4 .EQU RTC_IER_DAYIE, 3 .EQU RTC_IER_HOURIE, 2 .EQU RTC_IER_MINIE, 1 .EQU RTC_IER_SECIE, 0 // register------------------------------------- .EQU RTC_IFR, 0x40000F20 // 0x4000 0F20 RTC_IFR Bits------------------------------------- .EQU RTC_IFR_YEARIC, 31 .EQU RTC_IFR_MONTHIC, 30 .EQU RTC_IFR_WEEKIC, 29 .EQU RTC_IFR_TSIC, 27 .EQU RTC_IFR_TSOVFIC, 26 .EQU RTC_IFR_RTCT1IC, 25 .EQU RTC_IFR_RTCT0IC, 24 .EQU RTC_IFR_TTIC, 22 .EQU RTC_IFR_ALRBIC, 21 .EQU RTC_IFR_ALRAIC, 20 .EQU RTC_IFR_DAYIC, 19 .EQU RTC_IFR_HOURIC, 18 .EQU RTC_IFR_MINIC, 17 .EQU RTC_IFR_SECIC, 16 .EQU RTC_IFR_YEARIF, 15 .EQU RTC_IFR_MONTHIF, 14 .EQU RTC_IFR_WEEKIF, 13 .EQU RTC_IFR_TSIF, 11 .EQU RTC_IFR_TSOVFIF, 10 .EQU RTC_IFR_RTCT1IF, 9 .EQU RTC_IFR_RTCT0IF, 8 .EQU RTC_IFR_TTIF, 6 .EQU RTC_IFR_ALRBIF, 5 .EQU RTC_IFR_ALRAIF, 4 .EQU RTC_IFR_DAYIF, 3 .EQU RTC_IFR_HOURIF, 2 .EQU RTC_IFR_MINIF, 1 .EQU RTC_IFR_SECIF, 0 // register------------------------------------- .EQU RTC_TMBR, 0x40000F24 // 0x4000 0F24 RTC_TMBR Bits------------------------------------- .EQU RTC_TMBR_WEKB2, 26 .EQU RTC_TMBR_WEKB1, 25 .EQU RTC_TMBR_WEKB0, 24 .EQU RTC_TMBR_AMPMB, 22 .EQU RTC_TMBR_HOURB5, 21 .EQU RTC_TMBR_HOURB4, 20 .EQU RTC_TMBR_HOURB3, 19 .EQU RTC_TMBR_HOURB2, 18 .EQU RTC_TMBR_HOURB1, 17 .EQU RTC_TMBR_HOURB0, 16 .EQU RTC_TMBR_MINB6, 14 .EQU RTC_TMBR_MINB5, 13 .EQU RTC_TMBR_MINB4, 12 .EQU RTC_TMBR_MINB3, 11 .EQU RTC_TMBR_MINB2, 10 .EQU RTC_TMBR_MINB1, 9 .EQU RTC_TMBR_MINB0, 8 .EQU RTC_TMBR_SECB6, 6 .EQU RTC_TMBR_SECB5, 5 .EQU RTC_TMBR_SECB4, 4 .EQU RTC_TMBR_SECB3, 3 .EQU RTC_TMBR_SECB2, 2 .EQU RTC_TMBR_SECB1, 1 .EQU RTC_TMBR_SECB0, 0 // register------------------------------------- .EQU RTC_DTBR, 0x40000F28 // 0x4000 0F28 RTC_DTBR Bits------------------------------------- .EQU RTC_DTBR_YEARB7, 23 .EQU RTC_DTBR_YEARB6, 22 .EQU RTC_DTBR_YEARB5, 21 .EQU RTC_DTBR_YEARB4, 20 .EQU RTC_DTBR_YEARB3, 19 .EQU RTC_DTBR_YEARB2, 18 .EQU RTC_DTBR_YEARB1, 17 .EQU RTC_DTBR_YEARB0, 16 .EQU RTC_DTBR_MTHB4, 12 .EQU RTC_DTBR_MTHB3, 11 .EQU RTC_DTBR_MTHB2, 10 .EQU RTC_DTBR_MTHB1, 9 .EQU RTC_DTBR_MTHB0, 8 .EQU RTC_DTBR_DAYB5, 5 .EQU RTC_DTBR_DAYB4, 4 .EQU RTC_DTBR_DAYB3, 3 .EQU RTC_DTBR_DAYB2, 2 .EQU RTC_DTBR_DAYB1, 1 .EQU RTC_DTBR_DAYB0, 0 // register------------------------------------- .EQU RTC_FASTEST, 0x40000F2C // 0x4000 0F2C RTC_FASTEST Bits------------------------------------- .EQU RTC_FASTEST_YEARTESTEN, 31 .EQU RTC_FASTEST_MONTHTESTEN, 30 .EQU RTC_FASTEST_WEEKTESTEN, 29 .EQU RTC_FASTEST_DAYTESTEN, 28 .EQU RTC_FASTEST_HOURTESTEN, 27 .EQU RTC_FASTEST_MINTESTEN, 26 .EQU RTC_FASTEST_FASTTESTEN, 24 // register------------------------------------- .EQU T13_CNT, 0x40001000 // 0x4000 1000 T13_CNT Bits------------------------------------- .EQU T13_CNT_TXCNT31, 31 .EQU T13_CNT_TXCNT30, 30 .EQU T13_CNT_TXCNT29, 29 .EQU T13_CNT_TXCNT28, 28 .EQU T13_CNT_TXCNT27, 27 .EQU T13_CNT_TXCNT26, 26 .EQU T13_CNT_TXCNT25, 25 .EQU T13_CNT_TXCNT24, 24 .EQU T13_CNT_TXCNT23, 23 .EQU T13_CNT_TXCNT22, 22 .EQU T13_CNT_TXCNT21, 21 .EQU T13_CNT_TXCNT20, 20 .EQU T13_CNT_TXCNT19, 19 .EQU T13_CNT_TXCNT18, 18 .EQU T13_CNT_TXCNT17, 17 .EQU T13_CNT_TXCNT16, 16 .EQU T13_CNT_TXCNT15, 15 .EQU T13_CNT_TXCNT14, 14 .EQU T13_CNT_TXCNT13, 13 .EQU T13_CNT_TXCNT12, 12 .EQU T13_CNT_TXCNT11, 11 .EQU T13_CNT_TXCNT10, 10 .EQU T13_CNT_TXCNT9, 9 .EQU T13_CNT_TXCNT8, 8 .EQU T13_CNT_TXCNT7, 7 .EQU T13_CNT_TXCNT6, 6 .EQU T13_CNT_TXCNT5, 5 .EQU T13_CNT_TXCNT4, 4 .EQU T13_CNT_TXCNT3, 3 .EQU T13_CNT_TXCNT2, 2 .EQU T13_CNT_TXCNT1, 1 .EQU T13_CNT_TXCNT0, 0 // register------------------------------------- .EQU T13_PHS, 0x40001004 // 0x4000 1004 T13_PHS Bits------------------------------------- .EQU T13_PHS_TXPHS31, 31 .EQU T13_PHS_TXPHS30, 30 .EQU T13_PHS_TXPHS29, 29 .EQU T13_PHS_TXPHS28, 28 .EQU T13_PHS_TXPHS27, 27 .EQU T13_PHS_TXPHS26, 26 .EQU T13_PHS_TXPHS25, 25 .EQU T13_PHS_TXPHS24, 24 .EQU T13_PHS_TXPHS23, 23 .EQU T13_PHS_TXPHS22, 22 .EQU T13_PHS_TXPHS21, 21 .EQU T13_PHS_TXPHS20, 20 .EQU T13_PHS_TXPHS19, 19 .EQU T13_PHS_TXPHS18, 18 .EQU T13_PHS_TXPHS17, 17 .EQU T13_PHS_TXPHS16, 16 .EQU T13_PHS_TXPHS15, 15 .EQU T13_PHS_TXPHS14, 14 .EQU T13_PHS_TXPHS13, 13 .EQU T13_PHS_TXPHS12, 12 .EQU T13_PHS_TXPHS11, 11 .EQU T13_PHS_TXPHS10, 10 .EQU T13_PHS_TXPHS9, 9 .EQU T13_PHS_TXPHS8, 8 .EQU T13_PHS_TXPHS7, 7 .EQU T13_PHS_TXPHS6, 6 .EQU T13_PHS_TXPHS5, 5 .EQU T13_PHS_TXPHS4, 4 .EQU T13_PHS_TXPHS3, 3 .EQU T13_PHS_TXPHS2, 2 .EQU T13_PHS_TXPHS1, 1 .EQU T13_PHS_TXPHS0, 0 // register------------------------------------- .EQU T13_PPX, 0x40001008 // 0x4000 1008 T13_PPX Bits------------------------------------- .EQU T13_PPX_PPX31, 31 .EQU T13_PPX_PPX30, 30 .EQU T13_PPX_PPX29, 29 .EQU T13_PPX_PPX28, 28 .EQU T13_PPX_PPX27, 27 .EQU T13_PPX_PPX26, 26 .EQU T13_PPX_PPX25, 25 .EQU T13_PPX_PPX24, 24 .EQU T13_PPX_PPX23, 23 .EQU T13_PPX_PPX22, 22 .EQU T13_PPX_PPX21, 21 .EQU T13_PPX_PPX20, 20 .EQU T13_PPX_PPX19, 19 .EQU T13_PPX_PPX18, 18 .EQU T13_PPX_PPX17, 17 .EQU T13_PPX_PPX16, 16 .EQU T13_PPX_PPX15, 15 .EQU T13_PPX_PPX14, 14 .EQU T13_PPX_PPX13, 13 .EQU T13_PPX_PPX12, 12 .EQU T13_PPX_PPX11, 11 .EQU T13_PPX_PPX10, 10 .EQU T13_PPX_PPX9, 9 .EQU T13_PPX_PPX8, 8 .EQU T13_PPX_PPX7, 7 .EQU T13_PPX_PPX6, 6 .EQU T13_PPX_PPX5, 5 .EQU T13_PPX_PPX4, 4 .EQU T13_PPX_PPX3, 3 .EQU T13_PPX_PPX2, 2 .EQU T13_PPX_PPX1, 1 .EQU T13_PPX_PPX0, 0 // register------------------------------------- .EQU T13_PRSC, 0x4000100C // 0x4000 100C T13_PRSC Bits------------------------------------- .EQU T13_PRSC_TXPRSC31, 31 .EQU T13_PRSC_TXPRSC30, 30 .EQU T13_PRSC_TXPRSC29, 29 .EQU T13_PRSC_TXPRSC28, 28 .EQU T13_PRSC_TXPRSC27, 27 .EQU T13_PRSC_TXPRSC26, 26 .EQU T13_PRSC_TXPRSC25, 25 .EQU T13_PRSC_TXPRSC24, 24 .EQU T13_PRSC_TXPRSC23, 23 .EQU T13_PRSC_TXPRSC22, 22 .EQU T13_PRSC_TXPRSC21, 21 .EQU T13_PRSC_TXPRSC20, 20 .EQU T13_PRSC_TXPRSC19, 19 .EQU T13_PRSC_TXPRSC18, 18 .EQU T13_PRSC_TXPRSC17, 17 .EQU T13_PRSC_TXPRSC16, 16 .EQU T13_PRSC_TXPRSC15, 15 .EQU T13_PRSC_TXPRSC14, 14 .EQU T13_PRSC_TXPRSC13, 13 .EQU T13_PRSC_TXPRSC12, 12 .EQU T13_PRSC_TXPRSC11, 11 .EQU T13_PRSC_TXPRSC10, 10 .EQU T13_PRSC_TXPRSC9, 9 .EQU T13_PRSC_TXPRSC8, 8 .EQU T13_PRSC_TXPRSC7, 7 .EQU T13_PRSC_TXPRSC6, 6 .EQU T13_PRSC_TXPRSC5, 5 .EQU T13_PRSC_TXPRSC4, 4 .EQU T13_PRSC_TXPRSC3, 3 .EQU T13_PRSC_TXPRSC2, 2 .EQU T13_PRSC_TXPRSC1, 1 .EQU T13_PRSC_TXPRSC0, 0 // register------------------------------------- .EQU T13_CTL, 0x40001010 // 0x4000 1010 T13_CTL Bits------------------------------------- .EQU T13_CTL_BLINKEN, 31 .EQU T13_CTL_UDSYNEN, 29 .EQU T13_CTL_HRLOCK, 28 .EQU T13_CTL_ETLOCK, 27 .EQU T13_CTL_PCLOCK, 26 .EQU T13_CTL_DBLOCK, 25 .EQU T13_CTL_AQLOCKB, 24 .EQU T13_CTL_AQLOCKA, 23 .EQU T13_CTL_CAPEN, 22 .EQU T13_CTL_CAPSEL, 21 .EQU T13_CTL_TXMAX, 19 .EQU T13_CTL_PHSDIR, 18 .EQU T13_CTL_SWFSYNC, 17 .EQU T13_CTL_SYNCOSEL1, 16 .EQU T13_CTL_SYNCOSEL0, 15 .EQU T13_CTL_PHSEN, 14 .EQU T13_CTL_SYNCI, 13 .EQU T13_CTL_TXUR, 12 .EQU T13_CTL_TXUDEVT, 11 .EQU T13_CTL_TXUDEN, 10 .EQU T13_CTL_TXCMS2, 9 .EQU T13_CTL_TXCMS1, 8 .EQU T13_CTL_TXCMS0, 7 .EQU T13_CTL_TXDIR, 6 .EQU T13_CTL_TXCLK1, 5 .EQU T13_CTL_TXCLK0, 4 .EQU T13_CTL_TXSY, 3 .EQU T13_CTL_TXGATE, 2 .EQU T13_CTL_TXCS, 1 .EQU T13_CTL_TXEN, 0 // register------------------------------------- .EQU EPWM13_RA, 0x40001014 // 0x4000 1014 EPWM13_RA Bits------------------------------------- .EQU EPWM13_RA_EPWMRA31, 31 .EQU EPWM13_RA_EPWMRA30, 30 .EQU EPWM13_RA_EPWMRA29, 29 .EQU EPWM13_RA_EPWMRA28, 28 .EQU EPWM13_RA_EPWMRA27, 27 .EQU EPWM13_RA_EPWMRA26, 26 .EQU EPWM13_RA_EPWMRA25, 25 .EQU EPWM13_RA_EPWMRA24, 24 .EQU EPWM13_RA_EPWMRA23, 23 .EQU EPWM13_RA_EPWMRA22, 22 .EQU EPWM13_RA_EPWMRA21, 21 .EQU EPWM13_RA_EPWMRA20, 20 .EQU EPWM13_RA_EPWMRA19, 19 .EQU EPWM13_RA_EPWMRA18, 18 .EQU EPWM13_RA_EPWMRA17, 17 .EQU EPWM13_RA_EPWMRA16, 16 .EQU EPWM13_RA_EPWMRA15, 15 .EQU EPWM13_RA_EPWMRA14, 14 .EQU EPWM13_RA_EPWMRA13, 13 .EQU EPWM13_RA_EPWMRA12, 12 .EQU EPWM13_RA_EPWMRA11, 11 .EQU EPWM13_RA_EPWMRA10, 10 .EQU EPWM13_RA_EPWMRA9, 9 .EQU EPWM13_RA_EPWMRA8, 8 .EQU EPWM13_RA_EPWMRA7, 7 .EQU EPWM13_RA_EPWMRA6, 6 .EQU EPWM13_RA_EPWMRA5, 5 .EQU EPWM13_RA_EPWMRA4, 4 .EQU EPWM13_RA_EPWMRA3, 3 .EQU EPWM13_RA_EPWMRA2, 2 .EQU EPWM13_RA_EPWMRA1, 1 .EQU EPWM13_RA_EPWMRA0, 0 // register------------------------------------- .EQU EPWM13_RB, 0x40001018 // 0x4000 1018 EPWM13_RB Bits------------------------------------- .EQU EPWM13_RB_EPWMRB31, 31 .EQU EPWM13_RB_EPWMRB30, 30 .EQU EPWM13_RB_EPWMRB29, 29 .EQU EPWM13_RB_EPWMRB28, 28 .EQU EPWM13_RB_EPWMRB27, 27 .EQU EPWM13_RB_EPWMRB26, 26 .EQU EPWM13_RB_EPWMRB25, 25 .EQU EPWM13_RB_EPWMRB24, 24 .EQU EPWM13_RB_EPWMRB23, 23 .EQU EPWM13_RB_EPWMRB22, 22 .EQU EPWM13_RB_EPWMRB21, 21 .EQU EPWM13_RB_EPWMRB20, 20 .EQU EPWM13_RB_EPWMRB19, 19 .EQU EPWM13_RB_EPWMRB18, 18 .EQU EPWM13_RB_EPWMRB17, 17 .EQU EPWM13_RB_EPWMRB16, 16 .EQU EPWM13_RB_EPWMRB15, 15 .EQU EPWM13_RB_EPWMRB14, 14 .EQU EPWM13_RB_EPWMRB13, 13 .EQU EPWM13_RB_EPWMRB12, 12 .EQU EPWM13_RB_EPWMRB11, 11 .EQU EPWM13_RB_EPWMRB10, 10 .EQU EPWM13_RB_EPWMRB9, 9 .EQU EPWM13_RB_EPWMRB8, 8 .EQU EPWM13_RB_EPWMRB7, 7 .EQU EPWM13_RB_EPWMRB6, 6 .EQU EPWM13_RB_EPWMRB5, 5 .EQU EPWM13_RB_EPWMRB4, 4 .EQU EPWM13_RB_EPWMRB3, 3 .EQU EPWM13_RB_EPWMRB2, 2 .EQU EPWM13_RB_EPWMRB1, 1 .EQU EPWM13_RB_EPWMRB0, 0 // register------------------------------------- .EQU EPWM13_CTLA, 0x4000101C // 0x4000 101C EPWM13_CTLA Bits------------------------------------- .EQU EPWM13_CTLA_OTSFA, 16 .EQU EPWM13_CTLA_ACTSFA1, 15 .EQU EPWM13_CTLA_ACTSFA0, 14 .EQU EPWM13_CTLA_CSFA1, 13 .EQU EPWM13_CTLA_CSFA0, 12 .EQU EPWM13_CTLA_ACBD1, 11 .EQU EPWM13_CTLA_ACBD0, 10 .EQU EPWM13_CTLA_ACBU1, 9 .EQU EPWM13_CTLA_ACBU0, 8 .EQU EPWM13_CTLA_ACAD1, 7 .EQU EPWM13_CTLA_ACAD0, 6 .EQU EPWM13_CTLA_ACAU1, 5 .EQU EPWM13_CTLA_ACAU0, 4 .EQU EPWM13_CTLA_APRD1, 3 .EQU EPWM13_CTLA_APRD0, 2 .EQU EPWM13_CTLA_AZRO1, 1 .EQU EPWM13_CTLA_AZRO0, 0 // register------------------------------------- .EQU EPWM13_CTLB, 0x40001020 // 0x4000 1020 EPWM13_CTLB Bits------------------------------------- .EQU EPWM13_CTLB_OTSFB, 16 .EQU EPWM13_CTLB_ACTSFB1, 15 .EQU EPWM13_CTLB_ACTSFB0, 14 .EQU EPWM13_CTLB_CSFB1, 13 .EQU EPWM13_CTLB_CSFB0, 12 .EQU EPWM13_CTLB_BCBD1, 11 .EQU EPWM13_CTLB_BCBD0, 10 .EQU EPWM13_CTLB_BCBU1, 9 .EQU EPWM13_CTLB_BCBU0, 8 .EQU EPWM13_CTLB_BCAD1, 7 .EQU EPWM13_CTLB_BCAD0, 6 .EQU EPWM13_CTLB_BCAU1, 5 .EQU EPWM13_CTLB_BCAU0, 4 .EQU EPWM13_CTLB_BPRD1, 3 .EQU EPWM13_CTLB_BPRD0, 2 .EQU EPWM13_CTLB_BZRO1, 1 .EQU EPWM13_CTLB_BZRO0, 0 // register------------------------------------- .EQU EPWM13_DBCTL, 0x40001024 // 0x4000 1024 EPWM13_DBCTL Bits------------------------------------- .EQU EPWM13_DBCTL_INMODE1, 5 .EQU EPWM13_DBCTL_INMODE0, 4 .EQU EPWM13_DBCTL_POLSEL1, 3 .EQU EPWM13_DBCTL_POLSEL0, 2 .EQU EPWM13_DBCTL_OUTMODE1, 1 .EQU EPWM13_DBCTL_OUTMODE0, 0 // register------------------------------------- .EQU EPWM13_DBT, 0x40001028 // 0x4000 1028 EPWM13_DBT Bits------------------------------------- .EQU EPWM13_DBT_RDBT15, 31 .EQU EPWM13_DBT_RDBT14, 30 .EQU EPWM13_DBT_RDBT13, 29 .EQU EPWM13_DBT_RDBT12, 28 .EQU EPWM13_DBT_RDBT11, 27 .EQU EPWM13_DBT_RDBT10, 26 .EQU EPWM13_DBT_RDBT9, 25 .EQU EPWM13_DBT_RDBT8, 24 .EQU EPWM13_DBT_RDBT7, 23 .EQU EPWM13_DBT_RDBT6, 22 .EQU EPWM13_DBT_RDBT5, 21 .EQU EPWM13_DBT_RDBT4, 20 .EQU EPWM13_DBT_RDBT3, 19 .EQU EPWM13_DBT_RDBT2, 18 .EQU EPWM13_DBT_RDBT1, 17 .EQU EPWM13_DBT_RDBT0, 16 .EQU EPWM13_DBT_FDBT15, 15 .EQU EPWM13_DBT_FDBT14, 14 .EQU EPWM13_DBT_FDBT13, 13 .EQU EPWM13_DBT_FDBT12, 12 .EQU EPWM13_DBT_FDBT11, 11 .EQU EPWM13_DBT_FDBT10, 10 .EQU EPWM13_DBT_FDBT9, 9 .EQU EPWM13_DBT_FDBT8, 8 .EQU EPWM13_DBT_FDBT7, 7 .EQU EPWM13_DBT_FDBT6, 6 .EQU EPWM13_DBT_FDBT5, 5 .EQU EPWM13_DBT_FDBT4, 4 .EQU EPWM13_DBT_FDBT3, 3 .EQU EPWM13_DBT_FDBT2, 2 .EQU EPWM13_DBT_FDBT1, 1 .EQU EPWM13_DBT_FDBT0, 0 // register------------------------------------- .EQU EPWM13_PCCTL, 0x4000102C // 0x4000 102C EPWM13_PCCTL Bits------------------------------------- .EQU EPWM13_PCCTL_CHPFREQ2, 10 .EQU EPWM13_PCCTL_CHPFREQ1, 9 .EQU EPWM13_PCCTL_CHPFREQ0, 8 .EQU EPWM13_PCCTL_CHPDUTY2, 7 .EQU EPWM13_PCCTL_CHPDUTY1, 6 .EQU EPWM13_PCCTL_CHPDUTY0, 5 .EQU EPWM13_PCCTL_OSHTWTH3, 4 .EQU EPWM13_PCCTL_OSHTWTH2, 3 .EQU EPWM13_PCCTL_OSHTWTH1, 2 .EQU EPWM13_PCCTL_OSHTWTH0, 1 .EQU EPWM13_PCCTL_CHPEN, 0 // register------------------------------------- .EQU EPWM13_PXASCTL, 0x40001030 // 0x4000 1030 EPWM13_PXASCTL Bits------------------------------------- .EQU EPWM13_PXASCTL_PXRSEN, 8 .EQU EPWM13_PXASCTL_PXSSA1, 7 .EQU EPWM13_PXASCTL_PXSSA0, 6 .EQU EPWM13_PXASCTL_PXSSB1, 5 .EQU EPWM13_PXASCTL_PXSSB0, 4 .EQU EPWM13_PXASCTL_PXASE, 3 .EQU EPWM13_PXASCTL_PXASS2, 2 .EQU EPWM13_PXASCTL_PXASS1, 1 .EQU EPWM13_PXASCTL_PXASS0, 0 // register------------------------------------- .EQU EPWM13_ETCTL, 0x40001034 // 0x4000 1034 EPWM13_ETCTL Bits------------------------------------- .EQU EPWM13_ETCTL_BTSEL1, 25 .EQU EPWM13_ETCTL_BTSEL0, 24 .EQU EPWM13_ETCTL_FRCB, 19 .EQU EPWM13_ETCTL_TOADENB, 16 .EQU EPWM13_ETCTL_ATSEL1, 9 .EQU EPWM13_ETCTL_ATSEL0, 8 .EQU EPWM13_ETCTL_FRCA, 3 .EQU EPWM13_ETCTL_TOADENA, 0 // register------------------------------------- .EQU EPWM13_IE, 0x40001038 // 0x4000 1038 EPWM13_IE Bits------------------------------------- .EQU EPWM13_IE_CAPIE, 9 .EQU EPWM13_IE_TXDIE, 8 .EQU EPWM13_IE_TXCIE, 7 .EQU EPWM13_IE_TXAIE, 6 .EQU EPWM13_IE_TXBIE, 5 .EQU EPWM13_IE_TXIE, 4 .EQU EPWM13_IE_TXUIE, 3 .EQU EPWM13_IE_TXGIE, 2 .EQU EPWM13_IE_TXTIE1, 1 .EQU EPWM13_IE_TXTIE0, 0 // register------------------------------------- .EQU EPWM13_IF, 0x4000103C // 0x4000 103C EPWM13_IF Bits------------------------------------- .EQU EPWM13_IF_CAPIF, 9 .EQU EPWM13_IF_TXDIF, 8 .EQU EPWM13_IF_TXCIF, 7 .EQU EPWM13_IF_TXAIF, 6 .EQU EPWM13_IF_TXBIF, 5 .EQU EPWM13_IF_TXIF, 4 .EQU EPWM13_IF_TXUIF, 3 .EQU EPWM13_IF_TXGIF, 2 .EQU EPWM13_IF_TXTIF1, 1 .EQU EPWM13_IF_TXTIF0, 0 // register------------------------------------- .EQU EPWM13_IC, 0x40001040 // 0x4000 1040 EPWM13_IC Bits------------------------------------- .EQU EPWM13_IC_CAPIC1, 10 .EQU EPWM13_IC_CAPIC0, 9 .EQU EPWM13_IC_TXDIC, 8 .EQU EPWM13_IC_TXCIC, 7 .EQU EPWM13_IC_TXAIC, 6 .EQU EPWM13_IC_TXBIC, 5 .EQU EPWM13_IC_TXIC, 4 .EQU EPWM13_IC_TXUIC, 3 .EQU EPWM13_IC_TXGIC, 2 .EQU EPWM13_IC_TXTIC1, 1 .EQU EPWM13_IC_TXTIC0, 0 // register------------------------------------- .EQU EPWM13_DE, 0x40001044 // 0x4000 1044 EPWM13_DE Bits------------------------------------- .EQU EPWM13_DE_TXDDE, 8 .EQU EPWM13_DE_TXCDE, 7 .EQU EPWM13_DE_TXADE, 6 .EQU EPWM13_DE_TXBDE, 5 .EQU EPWM13_DE_TXDE, 4 .EQU EPWM13_DE_TXUDE, 3 .EQU EPWM13_DE_TXGDE, 2 .EQU EPWM13_DE_TXTDE1, 1 .EQU EPWM13_DE_TXTDE0, 0 // register------------------------------------- .EQU EPWM13_DF, 0x40001048 // 0x4000 1048 EPWM13_DF Bits------------------------------------- .EQU EPWM13_DF_TXDDF, 8 .EQU EPWM13_DF_TXCDF, 7 .EQU EPWM13_DF_TXADF, 6 .EQU EPWM13_DF_TXBDF, 5 .EQU EPWM13_DF_TXDF, 4 .EQU EPWM13_DF_TXUDF, 3 .EQU EPWM13_DF_TXGDF, 2 .EQU EPWM13_DF_TXTDF1, 1 .EQU EPWM13_DF_TXTDF0, 0 // register------------------------------------- .EQU EPWM13_HRPWMCTLA, 0x40001050 // 0x4000 1050 EPWM13_HRPWMCTLA Bits------------------------------------- .EQU EPWM13_HRPWMCTLA_HRPHSENA, 6 .EQU EPWM13_HRPWMCTLA_HRFENA, 5 .EQU EPWM13_HRPWMCTLA_HRRENA, 4 .EQU EPWM13_HRPWMCTLA_HRPENA, 3 .EQU EPWM13_HRPWMCTLA_HRDENA, 2 .EQU EPWM13_HRPWMCTLA_HRSELA, 1 .EQU EPWM13_HRPWMCTLA_HRENA, 0 // register------------------------------------- .EQU EPWM13_HRCMPA, 0x40001054 // 0x4000 1054 EPWM13_HRCMPA Bits------------------------------------- .EQU EPWM13_HRCMPA_HRCMPA7, 7 .EQU EPWM13_HRCMPA_HRCMPA6, 6 .EQU EPWM13_HRCMPA_HRCMPA5, 5 .EQU EPWM13_HRCMPA_HRCMPA4, 4 .EQU EPWM13_HRCMPA_HRCMPA3, 3 .EQU EPWM13_HRCMPA_HRCMPA2, 2 .EQU EPWM13_HRCMPA_HRCMPA1, 1 .EQU EPWM13_HRCMPA_HRCMPA0, 0 // register------------------------------------- .EQU EPWM13_CAP, 0x40001058 // 0x4000 1058 EPWM13_CAP Bits------------------------------------- .EQU EPWM13_CAP_CAP31, 31 .EQU EPWM13_CAP_CAP30, 30 .EQU EPWM13_CAP_CAP29, 29 .EQU EPWM13_CAP_CAP28, 28 .EQU EPWM13_CAP_CAP27, 27 .EQU EPWM13_CAP_CAP26, 26 .EQU EPWM13_CAP_CAP25, 25 .EQU EPWM13_CAP_CAP24, 24 .EQU EPWM13_CAP_CAP23, 23 .EQU EPWM13_CAP_CAP22, 22 .EQU EPWM13_CAP_CAP21, 21 .EQU EPWM13_CAP_CAP20, 20 .EQU EPWM13_CAP_CAP19, 19 .EQU EPWM13_CAP_CAP18, 18 .EQU EPWM13_CAP_CAP17, 17 .EQU EPWM13_CAP_CAP16, 16 .EQU EPWM13_CAP_CAP15, 15 .EQU EPWM13_CAP_CAP14, 14 .EQU EPWM13_CAP_CAP13, 13 .EQU EPWM13_CAP_CAP12, 12 .EQU EPWM13_CAP_CAP11, 11 .EQU EPWM13_CAP_CAP10, 10 .EQU EPWM13_CAP_CAP9, 9 .EQU EPWM13_CAP_CAP8, 8 .EQU EPWM13_CAP_CAP7, 7 .EQU EPWM13_CAP_CAP6, 6 .EQU EPWM13_CAP_CAP5, 5 .EQU EPWM13_CAP_CAP4, 4 .EQU EPWM13_CAP_CAP3, 3 .EQU EPWM13_CAP_CAP2, 2 .EQU EPWM13_CAP_CAP1, 1 .EQU EPWM13_CAP_CAP0, 0 // register------------------------------------- .EQU EPWM13_RC, 0x4000105C // 0x4000 105C EPWM13_RC Bits------------------------------------- .EQU EPWM13_RC_EPWMRC31, 31 .EQU EPWM13_RC_EPWMRC30, 30 .EQU EPWM13_RC_EPWMRC29, 29 .EQU EPWM13_RC_EPWMRC28, 28 .EQU EPWM13_RC_EPWMRC27, 27 .EQU EPWM13_RC_EPWMRC26, 26 .EQU EPWM13_RC_EPWMRC25, 25 .EQU EPWM13_RC_EPWMRC24, 24 .EQU EPWM13_RC_EPWMRC23, 23 .EQU EPWM13_RC_EPWMRC22, 22 .EQU EPWM13_RC_EPWMRC21, 21 .EQU EPWM13_RC_EPWMRC20, 20 .EQU EPWM13_RC_EPWMRC19, 19 .EQU EPWM13_RC_EPWMRC18, 18 .EQU EPWM13_RC_EPWMRC17, 17 .EQU EPWM13_RC_EPWMRC16, 16 .EQU EPWM13_RC_EPWMRC15, 15 .EQU EPWM13_RC_EPWMRC14, 14 .EQU EPWM13_RC_EPWMRC13, 13 .EQU EPWM13_RC_EPWMRC12, 12 .EQU EPWM13_RC_EPWMRC11, 11 .EQU EPWM13_RC_EPWMRC10, 10 .EQU EPWM13_RC_EPWMRC9, 9 .EQU EPWM13_RC_EPWMRC8, 8 .EQU EPWM13_RC_EPWMRC7, 7 .EQU EPWM13_RC_EPWMRC6, 6 .EQU EPWM13_RC_EPWMRC5, 5 .EQU EPWM13_RC_EPWMRC4, 4 .EQU EPWM13_RC_EPWMRC3, 3 .EQU EPWM13_RC_EPWMRC2, 2 .EQU EPWM13_RC_EPWMRC1, 1 .EQU EPWM13_RC_EPWMRC0, 0 // register------------------------------------- .EQU EPWM13_RD, 0x40001060 // 0x4000 1060 EPWM13_RD Bits------------------------------------- .EQU EPWM13_RD_EPWMRD31, 31 .EQU EPWM13_RD_EPWMRD30, 30 .EQU EPWM13_RD_EPWMRD29, 29 .EQU EPWM13_RD_EPWMRD28, 28 .EQU EPWM13_RD_EPWMRD27, 27 .EQU EPWM13_RD_EPWMRD26, 26 .EQU EPWM13_RD_EPWMRD25, 25 .EQU EPWM13_RD_EPWMRD24, 24 .EQU EPWM13_RD_EPWMRD23, 23 .EQU EPWM13_RD_EPWMRD22, 22 .EQU EPWM13_RD_EPWMRD21, 21 .EQU EPWM13_RD_EPWMRD20, 20 .EQU EPWM13_RD_EPWMRD19, 19 .EQU EPWM13_RD_EPWMRD18, 18 .EQU EPWM13_RD_EPWMRD17, 17 .EQU EPWM13_RD_EPWMRD16, 16 .EQU EPWM13_RD_EPWMRD15, 15 .EQU EPWM13_RD_EPWMRD14, 14 .EQU EPWM13_RD_EPWMRD13, 13 .EQU EPWM13_RD_EPWMRD12, 12 .EQU EPWM13_RD_EPWMRD11, 11 .EQU EPWM13_RD_EPWMRD10, 10 .EQU EPWM13_RD_EPWMRD9, 9 .EQU EPWM13_RD_EPWMRD8, 8 .EQU EPWM13_RD_EPWMRD7, 7 .EQU EPWM13_RD_EPWMRD6, 6 .EQU EPWM13_RD_EPWMRD5, 5 .EQU EPWM13_RD_EPWMRD4, 4 .EQU EPWM13_RD_EPWMRD3, 3 .EQU EPWM13_RD_EPWMRD2, 2 .EQU EPWM13_RD_EPWMRD1, 1 .EQU EPWM13_RD_EPWMRD0, 0 // register------------------------------------- .EQU EPWM13_UDCTL, 0x40001064 // 0x4000 1064 EPWM13_UDCTL Bits------------------------------------- .EQU EPWM13_UDCTL_GBUDEN, 27 .EQU EPWM13_UDCTL_HRPUDSEL1, 26 .EQU EPWM13_UDCTL_HRPUDSEL0, 25 .EQU EPWM13_UDCTL_HRPUDEN, 24 .EQU EPWM13_UDCTL_EBUDSEL1, 23 .EQU EPWM13_UDCTL_EBUDSEL0, 22 .EQU EPWM13_UDCTL_EBUDEN, 21 .EQU EPWM13_UDCTL_EAUDSEL1, 20 .EQU EPWM13_UDCTL_EAUDSEL0, 19 .EQU EPWM13_UDCTL_EAUDEN, 18 .EQU EPWM13_UDCTL_CMDUDSEL1, 17 .EQU EPWM13_UDCTL_CMDUDSEL0, 16 .EQU EPWM13_UDCTL_CMDUDEN, 15 .EQU EPWM13_UDCTL_CMCUDSEL1, 14 .EQU EPWM13_UDCTL_CMCUDSEL0, 13 .EQU EPWM13_UDCTL_CMCUDEN, 12 .EQU EPWM13_UDCTL_CMBUDSEL1, 11 .EQU EPWM13_UDCTL_CMBUDSEL0, 10 .EQU EPWM13_UDCTL_CMBUDEN, 9 .EQU EPWM13_UDCTL_CMAUDSEL1, 8 .EQU EPWM13_UDCTL_CMAUDSEL0, 7 .EQU EPWM13_UDCTL_CMAUDEN, 6 .EQU EPWM13_UDCTL_PRUDSEL1, 5 .EQU EPWM13_UDCTL_PRUDSEL0, 4 .EQU EPWM13_UDCTL_PRUDEN, 3 .EQU EPWM13_UDCTL_PPUDSEL1, 2 .EQU EPWM13_UDCTL_PPUDSEL0, 1 .EQU EPWM13_UDCTL_PPUDEN, 0 // register------------------------------------- .EQU EPWM13_SRT, 0x40001068 // 0x4000 1068 EPWM13_SRT Bits------------------------------------- .EQU EPWM13_SRT_T31, 31 .EQU EPWM13_SRT_T30, 30 .EQU EPWM13_SRT_T29, 29 .EQU EPWM13_SRT_T28, 28 .EQU EPWM13_SRT_T27, 27 .EQU EPWM13_SRT_T26, 26 .EQU EPWM13_SRT_T25, 25 .EQU EPWM13_SRT_T24, 24 .EQU EPWM13_SRT_T23, 23 .EQU EPWM13_SRT_T22, 22 .EQU EPWM13_SRT_T21, 21 .EQU EPWM13_SRT_T20, 20 .EQU EPWM13_SRT_T19, 19 .EQU EPWM13_SRT_T18, 18 .EQU EPWM13_SRT_T17, 17 .EQU EPWM13_SRT_T16, 16 .EQU EPWM13_SRT_T15, 15 .EQU EPWM13_SRT_T14, 14 .EQU EPWM13_SRT_T13, 13 .EQU EPWM13_SRT_T12, 12 .EQU EPWM13_SRT_T11, 11 .EQU EPWM13_SRT_T10, 10 .EQU EPWM13_SRT_T9, 9 .EQU EPWM13_SRT_T8, 8 .EQU EPWM13_SRT_T7, 7 .EQU EPWM13_SRT_T6, 6 .EQU EPWM13_SRT_T5, 5 .EQU EPWM13_SRT_T4, 4 .EQU EPWM13_SRT_T3, 3 .EQU EPWM13_SRT_T2, 2 .EQU EPWM13_SRT_T1, 1 .EQU EPWM13_SRT_T0, 0 // register------------------------------------- .EQU EPWM13_HRPWMCTLB, 0x4000106C // 0x4000 106C EPWM13_HRPWMCTLB Bits------------------------------------- .EQU EPWM13_HRPWMCTLB_HRPHSENB, 6 .EQU EPWM13_HRPWMCTLB_HRFENB, 5 .EQU EPWM13_HRPWMCTLB_HRRENB, 4 .EQU EPWM13_HRPWMCTLB_HRPENB, 3 .EQU EPWM13_HRPWMCTLB_HRDENB, 2 .EQU EPWM13_HRPWMCTLB_HRSELB, 1 .EQU EPWM13_HRPWMCTLB_HRENB, 0 // register------------------------------------- .EQU EPWM13_HRCMPB, 0x40001070 // 0x4000 1070 EPWM13_HRCMPB Bits------------------------------------- .EQU EPWM13_HRCMPB_HRCMPB7, 7 .EQU EPWM13_HRCMPB_HRCMPB6, 6 .EQU EPWM13_HRCMPB_HRCMPB5, 5 .EQU EPWM13_HRCMPB_HRCMPB4, 4 .EQU EPWM13_HRCMPB_HRCMPB3, 3 .EQU EPWM13_HRCMPB_HRCMPB2, 2 .EQU EPWM13_HRCMPB_HRCMPB1, 1 .EQU EPWM13_HRCMPB_HRCMPB0, 0 // register------------------------------------- .EQU EPWM13_HRDB, 0x40001074 // 0x4000 1074 EPWM13_HRDB Bits------------------------------------- .EQU EPWM13_HRDB_HRR7, 15 .EQU EPWM13_HRDB_HRR6, 14 .EQU EPWM13_HRDB_HRR5, 13 .EQU EPWM13_HRDB_HRR4, 12 .EQU EPWM13_HRDB_HRR3, 11 .EQU EPWM13_HRDB_HRR2, 10 .EQU EPWM13_HRDB_HRR1, 9 .EQU EPWM13_HRDB_HRR0, 8 .EQU EPWM13_HRDB_HRF7, 7 .EQU EPWM13_HRDB_HRF6, 6 .EQU EPWM13_HRDB_HRF5, 5 .EQU EPWM13_HRDB_HRF4, 4 .EQU EPWM13_HRDB_HRF3, 3 .EQU EPWM13_HRDB_HRF2, 2 .EQU EPWM13_HRDB_HRF1, 1 .EQU EPWM13_HRDB_HRF0, 0 // register------------------------------------- .EQU EPWM13_HRPHS, 0x40001078 // 0x4000 1078 EPWM13_HRPHS Bits------------------------------------- .EQU EPWM13_HRPHS_HRPRE7, 15 .EQU EPWM13_HRPHS_HRPRE6, 14 .EQU EPWM13_HRPHS_HRPRE5, 13 .EQU EPWM13_HRPHS_HRPRE4, 12 .EQU EPWM13_HRPHS_HRPRE3, 11 .EQU EPWM13_HRPHS_HRPRE2, 10 .EQU EPWM13_HRPHS_HRPRE1, 9 .EQU EPWM13_HRPHS_HRPRE0, 8 .EQU EPWM13_HRPHS_HRPHS7, 7 .EQU EPWM13_HRPHS_HRPHS6, 6 .EQU EPWM13_HRPHS_HRPHS5, 5 .EQU EPWM13_HRPHS_HRPHS4, 4 .EQU EPWM13_HRPHS_HRPHS3, 3 .EQU EPWM13_HRPHS_HRPHS2, 2 .EQU EPWM13_HRPHS_HRPHS1, 1 .EQU EPWM13_HRPHS_HRPHS0, 0 // register------------------------------------- .EQU EPWM13_HRCFG, 0x4000107C // 0x4000 107C EPWM13_HRCFG Bits------------------------------------- .EQU EPWM13_HRCFG_STEP7, 15 .EQU EPWM13_HRCFG_STEP6, 14 .EQU EPWM13_HRCFG_STEP5, 13 .EQU EPWM13_HRCFG_STEP4, 12 .EQU EPWM13_HRCFG_STEP3, 11 .EQU EPWM13_HRCFG_STEP2, 10 .EQU EPWM13_HRCFG_STEP1, 9 .EQU EPWM13_HRCFG_STEP0, 8 .EQU EPWM13_HRCFG_TIMS7, 7 .EQU EPWM13_HRCFG_TIMS6, 6 .EQU EPWM13_HRCFG_TIMS5, 5 .EQU EPWM13_HRCFG_TIMS4, 4 .EQU EPWM13_HRCFG_TIMS3, 3 .EQU EPWM13_HRCFG_TIMS2, 2 .EQU EPWM13_HRCFG_TIMS1, 1 .EQU EPWM13_HRCFG_TIMS0, 0 // register------------------------------------- .EQU EPWM13_HRDELAY, 0x40001080 // 0x4000 1080 EPWM13_HRDELAY Bits------------------------------------- .EQU EPWM13_HRDELAY_REDBHR7, 31 .EQU EPWM13_HRDELAY_REDBHR6, 30 .EQU EPWM13_HRDELAY_REDBHR5, 29 .EQU EPWM13_HRDELAY_REDBHR4, 28 .EQU EPWM13_HRDELAY_REDBHR3, 27 .EQU EPWM13_HRDELAY_REDBHR2, 26 .EQU EPWM13_HRDELAY_REDBHR1, 25 .EQU EPWM13_HRDELAY_REDBHR0, 24 .EQU EPWM13_HRDELAY_FEDBHR7, 23 .EQU EPWM13_HRDELAY_FEDBHR6, 22 .EQU EPWM13_HRDELAY_FEDBHR5, 21 .EQU EPWM13_HRDELAY_FEDBHR4, 20 .EQU EPWM13_HRDELAY_FEDBHR3, 19 .EQU EPWM13_HRDELAY_FEDBHR2, 18 .EQU EPWM13_HRDELAY_FEDBHR1, 17 .EQU EPWM13_HRDELAY_FEDBHR0, 16 .EQU EPWM13_HRDELAY_REDAHR7, 15 .EQU EPWM13_HRDELAY_REDAHR6, 14 .EQU EPWM13_HRDELAY_REDAHR5, 13 .EQU EPWM13_HRDELAY_REDAHR4, 12 .EQU EPWM13_HRDELAY_REDAHR3, 11 .EQU EPWM13_HRDELAY_REDAHR2, 10 .EQU EPWM13_HRDELAY_REDAHR1, 9 .EQU EPWM13_HRDELAY_REDAHR0, 8 .EQU EPWM13_HRDELAY_FEDAHR7, 7 .EQU EPWM13_HRDELAY_FEDAHR6, 6 .EQU EPWM13_HRDELAY_FEDAHR5, 5 .EQU EPWM13_HRDELAY_FEDAHR4, 4 .EQU EPWM13_HRDELAY_FEDAHR3, 3 .EQU EPWM13_HRDELAY_FEDAHR2, 2 .EQU EPWM13_HRDELAY_FEDAHR1, 1 .EQU EPWM13_HRDELAY_FEDAHR0, 0 // register------------------------------------- .EQU T13_CTL2, 0x40001084 // 0x4000 1084 T13_CTL2 Bits------------------------------------- .EQU T13_CTL2_LPHSEN, 24 .EQU T13_CTL2_CAPMOD, 23 .EQU T13_CTL2_CAPUF, 22 .EQU T13_CTL2_HRCFGUF, 21 .EQU T13_CTL2_HRPHSUF, 20 .EQU T13_CTL2_HRDBUF, 19 .EQU T13_CTL2_DBTUF, 18 .EQU T13_CTL2_HRPBUF, 17 .EQU T13_CTL2_HRPAUF, 16 .EQU T13_CTL2_EBFUF, 15 .EQU T13_CTL2_EAFUF, 14 .EQU T13_CTL2_PRFUF, 13 .EQU T13_CTL2_PPFUF, 12 .EQU T13_CTL2_CMDFUF, 11 .EQU T13_CTL2_CMCFUF, 10 .EQU T13_CTL2_CMBFUF, 9 .EQU T13_CTL2_CMAFUF, 8 .EQU T13_CTL2_TRGIOS, 7 .EQU T13_CTL2_SYNCIOS, 6 .EQU T13_CTL2_DUDBSEL, 5 .EQU T13_CTL2_DUDBEN, 4 .EQU T13_CTL2_BWINDTSEL, 3 .EQU T13_CTL2_BWINDPOL, 2 .EQU T13_CTL2_BWINDEN, 1 .EQU T13_CTL2_SWCLRPF, 0 // register------------------------------------- .EQU EPWM13_BWCFG, 0x40001088 // 0x4000 1088 EPWM13_BWCFG Bits------------------------------------- .EQU EPWM13_BWCFG_BWOFFSET15, 31 .EQU EPWM13_BWCFG_BWOFFSET14, 30 .EQU EPWM13_BWCFG_BWOFFSET13, 29 .EQU EPWM13_BWCFG_BWOFFSET12, 28 .EQU EPWM13_BWCFG_BWOFFSET11, 27 .EQU EPWM13_BWCFG_BWOFFSET10, 26 .EQU EPWM13_BWCFG_BWOFFSET9, 25 .EQU EPWM13_BWCFG_BWOFFSET8, 24 .EQU EPWM13_BWCFG_BWOFFSET7, 23 .EQU EPWM13_BWCFG_BWOFFSET6, 22 .EQU EPWM13_BWCFG_BWOFFSET5, 21 .EQU EPWM13_BWCFG_BWOFFSET4, 20 .EQU EPWM13_BWCFG_BWOFFSET3, 19 .EQU EPWM13_BWCFG_BWOFFSET2, 18 .EQU EPWM13_BWCFG_BWOFFSET1, 17 .EQU EPWM13_BWCFG_BWOFFSET0, 16 .EQU EPWM13_BWCFG_BWIDTH15, 15 .EQU EPWM13_BWCFG_BWIDTH14, 14 .EQU EPWM13_BWCFG_BWIDTH13, 13 .EQU EPWM13_BWCFG_BWIDTH12, 12 .EQU EPWM13_BWCFG_BWIDTH11, 11 .EQU EPWM13_BWCFG_BWIDTH10, 10 .EQU EPWM13_BWCFG_BWIDTH9, 9 .EQU EPWM13_BWCFG_BWIDTH8, 8 .EQU EPWM13_BWCFG_BWIDTH7, 7 .EQU EPWM13_BWCFG_BWIDTH6, 6 .EQU EPWM13_BWCFG_BWIDTH5, 5 .EQU EPWM13_BWCFG_BWIDTH4, 4 .EQU EPWM13_BWCFG_BWIDTH3, 3 .EQU EPWM13_BWCFG_BWIDTH2, 2 .EQU EPWM13_BWCFG_BWIDTH1, 1 .EQU EPWM13_BWCFG_BWIDTH0, 0 // register------------------------------------- .EQU EPWM13_BWCNT, 0x4000108C // 0x4000 108C EPWM13_BWCNT Bits------------------------------------- .EQU EPWM13_BWCNT_WITCNT15, 31 .EQU EPWM13_BWCNT_WITCNT14, 30 .EQU EPWM13_BWCNT_WITCNT13, 29 .EQU EPWM13_BWCNT_WITCNT12, 28 .EQU EPWM13_BWCNT_WITCNT11, 27 .EQU EPWM13_BWCNT_WITCNT10, 26 .EQU EPWM13_BWCNT_WITCNT9, 25 .EQU EPWM13_BWCNT_WITCNT8, 24 .EQU EPWM13_BWCNT_WITCNT7, 23 .EQU EPWM13_BWCNT_WITCNT6, 22 .EQU EPWM13_BWCNT_WITCNT5, 21 .EQU EPWM13_BWCNT_WITCNT4, 20 .EQU EPWM13_BWCNT_WITCNT3, 19 .EQU EPWM13_BWCNT_WITCNT2, 18 .EQU EPWM13_BWCNT_WITCNT1, 17 .EQU EPWM13_BWCNT_WITCNT0, 16 .EQU EPWM13_BWCNT_OFFCNT15, 15 .EQU EPWM13_BWCNT_OFFCNT14, 14 .EQU EPWM13_BWCNT_OFFCNT13, 13 .EQU EPWM13_BWCNT_OFFCNT12, 12 .EQU EPWM13_BWCNT_OFFCNT11, 11 .EQU EPWM13_BWCNT_OFFCNT10, 10 .EQU EPWM13_BWCNT_OFFCNT9, 9 .EQU EPWM13_BWCNT_OFFCNT8, 8 .EQU EPWM13_BWCNT_OFFCNT7, 7 .EQU EPWM13_BWCNT_OFFCNT6, 6 .EQU EPWM13_BWCNT_OFFCNT5, 5 .EQU EPWM13_BWCNT_OFFCNT4, 4 .EQU EPWM13_BWCNT_OFFCNT3, 3 .EQU EPWM13_BWCNT_OFFCNT2, 2 .EQU EPWM13_BWCNT_OFFCNT1, 1 .EQU EPWM13_BWCNT_OFFCNT0, 0 // register------------------------------------- .EQU EPWM13_ETCTL2, 0x40001090 // 0x4000 1090 EPWM13_ETCTL2 Bits------------------------------------- .EQU EPWM13_ETCTL2_BT3, 26 .EQU EPWM13_ETCTL2_BT2, 25 .EQU EPWM13_ETCTL2_BT1, 24 .EQU EPWM13_ETCTL2_BT0, 23 .EQU EPWM13_ETCTL2_BPP3, 22 .EQU EPWM13_ETCTL2_BPP2, 21 .EQU EPWM13_ETCTL2_BPP1, 20 .EQU EPWM13_ETCTL2_BPP0, 19 .EQU EPWM13_ETCTL2_SELB2, 18 .EQU EPWM13_ETCTL2_SELB1, 17 .EQU EPWM13_ETCTL2_SELB0, 16 .EQU EPWM13_ETCTL2_AT3, 10 .EQU EPWM13_ETCTL2_AT2, 9 .EQU EPWM13_ETCTL2_AT1, 8 .EQU EPWM13_ETCTL2_AT0, 7 .EQU EPWM13_ETCTL2_APP3, 6 .EQU EPWM13_ETCTL2_APP2, 5 .EQU EPWM13_ETCTL2_APP1, 4 .EQU EPWM13_ETCTL2_APP0, 3 .EQU EPWM13_ETCTL2_SELA2, 2 .EQU EPWM13_ETCTL2_SELA1, 1 .EQU EPWM13_ETCTL2_SELA0, 0 // register------------------------------------- .EQU EPWM13_GLDCTL, 0x40001094 // 0x4000 1094 EPWM13_GLDCTL Bits------------------------------------- .EQU EPWM13_GLDCTL_HRCFGUDSEL1, 22 .EQU EPWM13_GLDCTL_HRCFGUDSEL0, 21 .EQU EPWM13_GLDCTL_HRCFGUDEN, 20 .EQU EPWM13_GLDCTL_HRPHSUDSEL1, 19 .EQU EPWM13_GLDCTL_HRPHSUDSEL0, 18 .EQU EPWM13_GLDCTL_HRPHSUDEN, 17 .EQU EPWM13_GLDCTL_HRDBUDSEL1, 16 .EQU EPWM13_GLDCTL_HRDBUDSEL0, 15 .EQU EPWM13_GLDCTL_HRDBUDEN, 14 .EQU EPWM13_GLDCTL_DBUDSEL1, 13 .EQU EPWM13_GLDCTL_DBUDSEL0, 12 .EQU EPWM13_GLDCTL_DBUDEN, 11 .EQU EPWM13_GLDCTL_HRPBUDSEL1, 10 .EQU EPWM13_GLDCTL_HRPBUDSEL0, 9 .EQU EPWM13_GLDCTL_HRPBUDEN, 8 .EQU EPWM13_GLDCTL_CLDPRCS7, 7 .EQU EPWM13_GLDCTL_CLDPRCS6, 6 .EQU EPWM13_GLDCTL_CLDPRCS5, 5 .EQU EPWM13_GLDCTL_CLDPRCS4, 4 .EQU EPWM13_GLDCTL_CLDPRCS3, 3 .EQU EPWM13_GLDCTL_CLDPRCS2, 2 .EQU EPWM13_GLDCTL_CLDPRCS1, 1 .EQU EPWM13_GLDCTL_CLDPRCS0, 0 // register------------------------------------- .EQU EPWM13_FILTCTL, 0x40001098 // 0x4000 1098 EPWM13_FILTCTL Bits------------------------------------- .EQU EPWM13_FILTCTL_SYDELAY2, 23 .EQU EPWM13_FILTCTL_SYDELAY1, 22 .EQU EPWM13_FILTCTL_SYDELAY0, 21 .EQU EPWM13_FILTCTL_SYFDIV3, 20 .EQU EPWM13_FILTCTL_SYFDIV2, 19 .EQU EPWM13_FILTCTL_SYFDIV1, 18 .EQU EPWM13_FILTCTL_SYFDIV0, 17 .EQU EPWM13_FILTCTL_SYNCFEN, 16 .EQU EPWM13_FILTCTL_TCKDELAY2, 15 .EQU EPWM13_FILTCTL_TCKDELAY1, 14 .EQU EPWM13_FILTCTL_TCKDELAY0, 13 .EQU EPWM13_FILTCTL_TCKFDIV3, 12 .EQU EPWM13_FILTCTL_TCKFDIV2, 11 .EQU EPWM13_FILTCTL_TCKFDIV1, 10 .EQU EPWM13_FILTCTL_TCKFDIV0, 9 .EQU EPWM13_FILTCTL_TXCKFEN, 8 .EQU EPWM13_FILTCTL_CFDELAY2, 7 .EQU EPWM13_FILTCTL_CFDELAY1, 6 .EQU EPWM13_FILTCTL_CFDELAY0, 5 .EQU EPWM13_FILTCTL_CFDIV3, 4 .EQU EPWM13_FILTCTL_CFDIV2, 3 .EQU EPWM13_FILTCTL_CFDIV1, 2 .EQU EPWM13_FILTCTL_CFDIV0, 1 .EQU EPWM13_FILTCTL_CAPFEN, 0 // register------------------------------------- .EQU IWDT_CTL, 0x40001200 // 0x4000 1200 IWDT_CTL Bits------------------------------------- .EQU IWDT_CTL_IWDTEN, 31 .EQU IWDT_CTL_IWDTTPEN, 30 .EQU IWDT_CTL_CLKS, 29 .EQU IWDT_CTL_IWDTOVF11, 15 .EQU IWDT_CTL_IWDTOVF10, 14 .EQU IWDT_CTL_IWDTOVF9, 13 .EQU IWDT_CTL_IWDTOVF8, 12 .EQU IWDT_CTL_IWDTOVF7, 11 .EQU IWDT_CTL_IWDTOVF6, 10 .EQU IWDT_CTL_IWDTOVF5, 9 .EQU IWDT_CTL_IWDTOVF4, 8 .EQU IWDT_CTL_IWDTOVF3, 7 .EQU IWDT_CTL_IWDTOVF2, 6 .EQU IWDT_CTL_IWDTOVF1, 5 .EQU IWDT_CTL_IWDTOVF0, 4 .EQU IWDT_CTL_IWDTPS3, 3 .EQU IWDT_CTL_IWDTPS2, 2 .EQU IWDT_CTL_IWDTPS1, 1 .EQU IWDT_CTL_IWDTPS0, 0 // register------------------------------------- .EQU IWDT_FD, 0x40001204 // 0x4000 1204 IWDT_FD Bits------------------------------------- .EQU IWDT_FD_IWDTFD31, 31 .EQU IWDT_FD_IWDTFD30, 30 .EQU IWDT_FD_IWDTFD29, 29 .EQU IWDT_FD_IWDTFD28, 28 .EQU IWDT_FD_IWDTFD27, 27 .EQU IWDT_FD_IWDTFD26, 26 .EQU IWDT_FD_IWDTFD25, 25 .EQU IWDT_FD_IWDTFD24, 24 .EQU IWDT_FD_IWDTFD23, 23 .EQU IWDT_FD_IWDTFD22, 22 .EQU IWDT_FD_IWDTFD21, 21 .EQU IWDT_FD_IWDTFD20, 20 .EQU IWDT_FD_IWDTFD19, 19 .EQU IWDT_FD_IWDTFD18, 18 .EQU IWDT_FD_IWDTFD17, 17 .EQU IWDT_FD_IWDTFD16, 16 .EQU IWDT_FD_IWDTFD15, 15 .EQU IWDT_FD_IWDTFD14, 14 .EQU IWDT_FD_IWDTFD13, 13 .EQU IWDT_FD_IWDTFD12, 12 .EQU IWDT_FD_IWDTFD11, 11 .EQU IWDT_FD_IWDTFD10, 10 .EQU IWDT_FD_IWDTFD9, 9 .EQU IWDT_FD_IWDTFD8, 8 .EQU IWDT_FD_IWDTFD7, 7 .EQU IWDT_FD_IWDTFD6, 6 .EQU IWDT_FD_IWDTFD5, 5 .EQU IWDT_FD_IWDTFD4, 4 .EQU IWDT_FD_IWDTFD3, 3 .EQU IWDT_FD_IWDTFD2, 2 .EQU IWDT_FD_IWDTFD1, 1 .EQU IWDT_FD_IWDTFD0, 0 // register------------------------------------- .EQU WWDT_CTL, 0x40001280 // 0x4000 1280 WWDT_CTL Bits------------------------------------- .EQU WWDT_CTL_WWDTIC, 15 .EQU WWDT_CTL_WW6, 14 .EQU WWDT_CTL_WW5, 13 .EQU WWDT_CTL_WW4, 12 .EQU WWDT_CTL_WW3, 11 .EQU WWDT_CTL_WW2, 10 .EQU WWDT_CTL_WW1, 9 .EQU WWDT_CTL_WW0, 8 .EQU WWDT_CTL_WPS4, 7 .EQU WWDT_CTL_WPS3, 6 .EQU WWDT_CTL_WPS2, 5 .EQU WWDT_CTL_WPS1, 4 .EQU WWDT_CTL_WPS0, 3 .EQU WWDT_CTL_WWDTIF, 2 .EQU WWDT_CTL_WWDTIE, 1 .EQU WWDT_CTL_WWDTEN, 0 // register------------------------------------- .EQU WWDT_CNT, 0x40001284 // 0x4000 1284 WWDT_CNT Bits------------------------------------- .EQU WWDT_CNT_WT6, 7 .EQU WWDT_CNT_WT5, 6 .EQU WWDT_CNT_WT4, 5 .EQU WWDT_CNT_WT3, 4 .EQU WWDT_CNT_WT2, 3 .EQU WWDT_CNT_WT1, 2 .EQU WWDT_CNT_WT0, 1 // register------------------------------------- .EQU WWDT_CTL1, 0x40001288 // 0x4000 1288 WWDT_CTL1 Bits------------------------------------- .EQU WWDT_CTL1_CLKS1, 1 .EQU WWDT_CTL1_CLKS0, 0 // register------------------------------------- .EQU BKP_DATA0, 0x40001440 // 0x4000 1440 BKP_DATA0 Bits------------------------------------- .EQU BKP_DATA0_BKPDATA0_31, 31 .EQU BKP_DATA0_BKPDATA0_30, 30 .EQU BKP_DATA0_BKPDATA0_29, 29 .EQU BKP_DATA0_BKPDATA0_28, 28 .EQU BKP_DATA0_BKPDATA0_27, 27 .EQU BKP_DATA0_BKPDATA0_26, 26 .EQU BKP_DATA0_BKPDATA0_25, 25 .EQU BKP_DATA0_BKPDATA0_24, 24 .EQU BKP_DATA0_BKPDATA0_23, 23 .EQU BKP_DATA0_BKPDATA0_22, 22 .EQU BKP_DATA0_BKPDATA0_21, 21 .EQU BKP_DATA0_BKPDATA0_20, 20 .EQU BKP_DATA0_BKPDATA0_19, 19 .EQU BKP_DATA0_BKPDATA0_18, 18 .EQU BKP_DATA0_BKPDATA0_17, 17 .EQU BKP_DATA0_BKPDATA0_16, 16 .EQU BKP_DATA0_BKPDATA0_15, 15 .EQU BKP_DATA0_BKPDATA0_14, 14 .EQU BKP_DATA0_BKPDATA0_13, 13 .EQU BKP_DATA0_BKPDATA0_12, 12 .EQU BKP_DATA0_BKPDATA0_11, 11 .EQU BKP_DATA0_BKPDATA0_10, 10 .EQU BKP_DATA0_BKPDATA0_9, 9 .EQU BKP_DATA0_BKPDATA0_8, 8 .EQU BKP_DATA0_BKPDATA0_7, 7 .EQU BKP_DATA0_BKPDATA0_6, 6 .EQU BKP_DATA0_BKPDATA0_5, 5 .EQU BKP_DATA0_BKPDATA0_4, 4 .EQU BKP_DATA0_BKPDATA0_3, 3 .EQU BKP_DATA0_BKPDATA0_2, 2 .EQU BKP_DATA0_BKPDATA0_1, 1 .EQU BKP_DATA0_BKPDATA0_0, 0 // register------------------------------------- .EQU BKP_DATA1, 0x40001444 // 0x4000 1444 BKP_DATA1 Bits------------------------------------- .EQU BKP_DATA1_BKPDATA1_31, 31 .EQU BKP_DATA1_BKPDATA1_30, 30 .EQU BKP_DATA1_BKPDATA1_29, 29 .EQU BKP_DATA1_BKPDATA1_28, 28 .EQU BKP_DATA1_BKPDATA1_27, 27 .EQU BKP_DATA1_BKPDATA1_26, 26 .EQU BKP_DATA1_BKPDATA1_25, 25 .EQU BKP_DATA1_BKPDATA1_24, 24 .EQU BKP_DATA1_BKPDATA1_23, 23 .EQU BKP_DATA1_BKPDATA1_22, 22 .EQU BKP_DATA1_BKPDATA1_21, 21 .EQU BKP_DATA1_BKPDATA1_20, 20 .EQU BKP_DATA1_BKPDATA1_19, 19 .EQU BKP_DATA1_BKPDATA1_18, 18 .EQU BKP_DATA1_BKPDATA1_17, 17 .EQU BKP_DATA1_BKPDATA1_16, 16 .EQU BKP_DATA1_BKPDATA1_15, 15 .EQU BKP_DATA1_BKPDATA1_14, 14 .EQU BKP_DATA1_BKPDATA1_13, 13 .EQU BKP_DATA1_BKPDATA1_12, 12 .EQU BKP_DATA1_BKPDATA1_11, 11 .EQU BKP_DATA1_BKPDATA1_10, 10 .EQU BKP_DATA1_BKPDATA1_9, 9 .EQU BKP_DATA1_BKPDATA1_8, 8 .EQU BKP_DATA1_BKPDATA1_7, 7 .EQU BKP_DATA1_BKPDATA1_6, 6 .EQU BKP_DATA1_BKPDATA1_5, 5 .EQU BKP_DATA1_BKPDATA1_4, 4 .EQU BKP_DATA1_BKPDATA1_3, 3 .EQU BKP_DATA1_BKPDATA1_2, 2 .EQU BKP_DATA1_BKPDATA1_1, 1 .EQU BKP_DATA1_BKPDATA1_0, 0 // register------------------------------------- .EQU BKP_DATA2, 0x40001448 // 0x4000 1448 BKP_DATA2 Bits------------------------------------- .EQU BKP_DATA2_BKPDATA2_31, 31 .EQU BKP_DATA2_BKPDATA2_30, 30 .EQU BKP_DATA2_BKPDATA2_29, 29 .EQU BKP_DATA2_BKPDATA2_28, 28 .EQU BKP_DATA2_BKPDATA2_27, 27 .EQU BKP_DATA2_BKPDATA2_26, 26 .EQU BKP_DATA2_BKPDATA2_25, 25 .EQU BKP_DATA2_BKPDATA2_24, 24 .EQU BKP_DATA2_BKPDATA2_23, 23 .EQU BKP_DATA2_BKPDATA2_22, 22 .EQU BKP_DATA2_BKPDATA2_21, 21 .EQU BKP_DATA2_BKPDATA2_20, 20 .EQU BKP_DATA2_BKPDATA2_19, 19 .EQU BKP_DATA2_BKPDATA2_18, 18 .EQU BKP_DATA2_BKPDATA2_17, 17 .EQU BKP_DATA2_BKPDATA2_16, 16 .EQU BKP_DATA2_BKPDATA2_15, 15 .EQU BKP_DATA2_BKPDATA2_14, 14 .EQU BKP_DATA2_BKPDATA2_13, 13 .EQU BKP_DATA2_BKPDATA2_12, 12 .EQU BKP_DATA2_BKPDATA2_11, 11 .EQU BKP_DATA2_BKPDATA2_10, 10 .EQU BKP_DATA2_BKPDATA2_9, 9 .EQU BKP_DATA2_BKPDATA2_8, 8 .EQU BKP_DATA2_BKPDATA2_7, 7 .EQU BKP_DATA2_BKPDATA2_6, 6 .EQU BKP_DATA2_BKPDATA2_5, 5 .EQU BKP_DATA2_BKPDATA2_4, 4 .EQU BKP_DATA2_BKPDATA2_3, 3 .EQU BKP_DATA2_BKPDATA2_2, 2 .EQU BKP_DATA2_BKPDATA2_1, 1 .EQU BKP_DATA2_BKPDATA2_0, 0 // register------------------------------------- .EQU BKP_DATA3, 0x4000144C // 0x4000 144C BKP_DATA3 Bits------------------------------------- .EQU BKP_DATA3_BKPDATA3_31, 31 .EQU BKP_DATA3_BKPDATA3_30, 30 .EQU BKP_DATA3_BKPDATA3_29, 29 .EQU BKP_DATA3_BKPDATA3_28, 28 .EQU BKP_DATA3_BKPDATA3_27, 27 .EQU BKP_DATA3_BKPDATA3_26, 26 .EQU BKP_DATA3_BKPDATA3_25, 25 .EQU BKP_DATA3_BKPDATA3_24, 24 .EQU BKP_DATA3_BKPDATA3_23, 23 .EQU BKP_DATA3_BKPDATA3_22, 22 .EQU BKP_DATA3_BKPDATA3_21, 21 .EQU BKP_DATA3_BKPDATA3_20, 20 .EQU BKP_DATA3_BKPDATA3_19, 19 .EQU BKP_DATA3_BKPDATA3_18, 18 .EQU BKP_DATA3_BKPDATA3_17, 17 .EQU BKP_DATA3_BKPDATA3_16, 16 .EQU BKP_DATA3_BKPDATA3_15, 15 .EQU BKP_DATA3_BKPDATA3_14, 14 .EQU BKP_DATA3_BKPDATA3_13, 13 .EQU BKP_DATA3_BKPDATA3_12, 12 .EQU BKP_DATA3_BKPDATA3_11, 11 .EQU BKP_DATA3_BKPDATA3_10, 10 .EQU BKP_DATA3_BKPDATA3_9, 9 .EQU BKP_DATA3_BKPDATA3_8, 8 .EQU BKP_DATA3_BKPDATA3_7, 7 .EQU BKP_DATA3_BKPDATA3_6, 6 .EQU BKP_DATA3_BKPDATA3_5, 5 .EQU BKP_DATA3_BKPDATA3_4, 4 .EQU BKP_DATA3_BKPDATA3_3, 3 .EQU BKP_DATA3_BKPDATA3_2, 2 .EQU BKP_DATA3_BKPDATA3_1, 1 .EQU BKP_DATA3_BKPDATA3_0, 0 // register------------------------------------- .EQU BKP_DATA4, 0x40001450 // 0x4000 1450 BKP_DATA4 Bits------------------------------------- .EQU BKP_DATA4_BKPDATA4_31, 31 .EQU BKP_DATA4_BKPDATA4_30, 30 .EQU BKP_DATA4_BKPDATA4_29, 29 .EQU BKP_DATA4_BKPDATA4_28, 28 .EQU BKP_DATA4_BKPDATA4_27, 27 .EQU BKP_DATA4_BKPDATA4_26, 26 .EQU BKP_DATA4_BKPDATA4_25, 25 .EQU BKP_DATA4_BKPDATA4_24, 24 .EQU BKP_DATA4_BKPDATA4_23, 23 .EQU BKP_DATA4_BKPDATA4_22, 22 .EQU BKP_DATA4_BKPDATA4_21, 21 .EQU BKP_DATA4_BKPDATA4_20, 20 .EQU BKP_DATA4_BKPDATA4_19, 19 .EQU BKP_DATA4_BKPDATA4_18, 18 .EQU BKP_DATA4_BKPDATA4_17, 17 .EQU BKP_DATA4_BKPDATA4_16, 16 .EQU BKP_DATA4_BKPDATA4_15, 15 .EQU BKP_DATA4_BKPDATA4_14, 14 .EQU BKP_DATA4_BKPDATA4_13, 13 .EQU BKP_DATA4_BKPDATA4_12, 12 .EQU BKP_DATA4_BKPDATA4_11, 11 .EQU BKP_DATA4_BKPDATA4_10, 10 .EQU BKP_DATA4_BKPDATA4_9, 9 .EQU BKP_DATA4_BKPDATA4_8, 8 .EQU BKP_DATA4_BKPDATA4_7, 7 .EQU BKP_DATA4_BKPDATA4_6, 6 .EQU BKP_DATA4_BKPDATA4_5, 5 .EQU BKP_DATA4_BKPDATA4_4, 4 .EQU BKP_DATA4_BKPDATA4_3, 3 .EQU BKP_DATA4_BKPDATA4_2, 2 .EQU BKP_DATA4_BKPDATA4_1, 1 .EQU BKP_DATA4_BKPDATA4_0, 0 // register------------------------------------- .EQU BKP_DATA5, 0x40001454 // 0x4000 1454 BKP_DATA5 Bits------------------------------------- .EQU BKP_DATA5_BKPDATA5_31, 31 .EQU BKP_DATA5_BKPDATA5_30, 30 .EQU BKP_DATA5_BKPDATA5_29, 29 .EQU BKP_DATA5_BKPDATA5_28, 28 .EQU BKP_DATA5_BKPDATA5_27, 27 .EQU BKP_DATA5_BKPDATA5_26, 26 .EQU BKP_DATA5_BKPDATA5_25, 25 .EQU BKP_DATA5_BKPDATA5_24, 24 .EQU BKP_DATA5_BKPDATA5_23, 23 .EQU BKP_DATA5_BKPDATA5_22, 22 .EQU BKP_DATA5_BKPDATA5_21, 21 .EQU BKP_DATA5_BKPDATA5_20, 20 .EQU BKP_DATA5_BKPDATA5_19, 19 .EQU BKP_DATA5_BKPDATA5_18, 18 .EQU BKP_DATA5_BKPDATA5_17, 17 .EQU BKP_DATA5_BKPDATA5_16, 16 .EQU BKP_DATA5_BKPDATA5_15, 15 .EQU BKP_DATA5_BKPDATA5_14, 14 .EQU BKP_DATA5_BKPDATA5_13, 13 .EQU BKP_DATA5_BKPDATA5_12, 12 .EQU BKP_DATA5_BKPDATA5_11, 11 .EQU BKP_DATA5_BKPDATA5_10, 10 .EQU BKP_DATA5_BKPDATA5_9, 9 .EQU BKP_DATA5_BKPDATA5_8, 8 .EQU BKP_DATA5_BKPDATA5_7, 7 .EQU BKP_DATA5_BKPDATA5_6, 6 .EQU BKP_DATA5_BKPDATA5_5, 5 .EQU BKP_DATA5_BKPDATA5_4, 4 .EQU BKP_DATA5_BKPDATA5_3, 3 .EQU BKP_DATA5_BKPDATA5_2, 2 .EQU BKP_DATA5_BKPDATA5_1, 1 .EQU BKP_DATA5_BKPDATA5_0, 0 // register------------------------------------- .EQU BKP_DATA6, 0x40001458 // 0x4000 1458 BKP_DATA6 Bits------------------------------------- .EQU BKP_DATA6_BKPDATA6_31, 31 .EQU BKP_DATA6_BKPDATA6_30, 30 .EQU BKP_DATA6_BKPDATA6_29, 29 .EQU BKP_DATA6_BKPDATA6_28, 28 .EQU BKP_DATA6_BKPDATA6_27, 27 .EQU BKP_DATA6_BKPDATA6_26, 26 .EQU BKP_DATA6_BKPDATA6_25, 25 .EQU BKP_DATA6_BKPDATA6_24, 24 .EQU BKP_DATA6_BKPDATA6_23, 23 .EQU BKP_DATA6_BKPDATA6_22, 22 .EQU BKP_DATA6_BKPDATA6_21, 21 .EQU BKP_DATA6_BKPDATA6_20, 20 .EQU BKP_DATA6_BKPDATA6_19, 19 .EQU BKP_DATA6_BKPDATA6_18, 18 .EQU BKP_DATA6_BKPDATA6_17, 17 .EQU BKP_DATA6_BKPDATA6_16, 16 .EQU BKP_DATA6_BKPDATA6_15, 15 .EQU BKP_DATA6_BKPDATA6_14, 14 .EQU BKP_DATA6_BKPDATA6_13, 13 .EQU BKP_DATA6_BKPDATA6_12, 12 .EQU BKP_DATA6_BKPDATA6_11, 11 .EQU BKP_DATA6_BKPDATA6_10, 10 .EQU BKP_DATA6_BKPDATA6_9, 9 .EQU BKP_DATA6_BKPDATA6_8, 8 .EQU BKP_DATA6_BKPDATA6_7, 7 .EQU BKP_DATA6_BKPDATA6_6, 6 .EQU BKP_DATA6_BKPDATA6_5, 5 .EQU BKP_DATA6_BKPDATA6_4, 4 .EQU BKP_DATA6_BKPDATA6_3, 3 .EQU BKP_DATA6_BKPDATA6_2, 2 .EQU BKP_DATA6_BKPDATA6_1, 1 .EQU BKP_DATA6_BKPDATA6_0, 0 // register------------------------------------- .EQU BKP_DATA7, 0x4000145C // 0x4000 145C BKP_DATA7 Bits------------------------------------- .EQU BKP_DATA7_BKPDATA7_31, 31 .EQU BKP_DATA7_BKPDATA7_30, 30 .EQU BKP_DATA7_BKPDATA7_29, 29 .EQU BKP_DATA7_BKPDATA7_28, 28 .EQU BKP_DATA7_BKPDATA7_27, 27 .EQU BKP_DATA7_BKPDATA7_26, 26 .EQU BKP_DATA7_BKPDATA7_25, 25 .EQU BKP_DATA7_BKPDATA7_24, 24 .EQU BKP_DATA7_BKPDATA7_23, 23 .EQU BKP_DATA7_BKPDATA7_22, 22 .EQU BKP_DATA7_BKPDATA7_21, 21 .EQU BKP_DATA7_BKPDATA7_20, 20 .EQU BKP_DATA7_BKPDATA7_19, 19 .EQU BKP_DATA7_BKPDATA7_18, 18 .EQU BKP_DATA7_BKPDATA7_17, 17 .EQU BKP_DATA7_BKPDATA7_16, 16 .EQU BKP_DATA7_BKPDATA7_15, 15 .EQU BKP_DATA7_BKPDATA7_14, 14 .EQU BKP_DATA7_BKPDATA7_13, 13 .EQU BKP_DATA7_BKPDATA7_12, 12 .EQU BKP_DATA7_BKPDATA7_11, 11 .EQU BKP_DATA7_BKPDATA7_10, 10 .EQU BKP_DATA7_BKPDATA7_9, 9 .EQU BKP_DATA7_BKPDATA7_8, 8 .EQU BKP_DATA7_BKPDATA7_7, 7 .EQU BKP_DATA7_BKPDATA7_6, 6 .EQU BKP_DATA7_BKPDATA7_5, 5 .EQU BKP_DATA7_BKPDATA7_4, 4 .EQU BKP_DATA7_BKPDATA7_3, 3 .EQU BKP_DATA7_BKPDATA7_2, 2 .EQU BKP_DATA7_BKPDATA7_1, 1 .EQU BKP_DATA7_BKPDATA7_0, 0 // register------------------------------------- .EQU BKP_DATA8, 0x40001460 // 0x4000 1460 BKP_DATA8 Bits------------------------------------- .EQU BKP_DATA8_BKPDATA8_31, 31 .EQU BKP_DATA8_BKPDATA8_30, 30 .EQU BKP_DATA8_BKPDATA8_29, 29 .EQU BKP_DATA8_BKPDATA8_28, 28 .EQU BKP_DATA8_BKPDATA8_27, 27 .EQU BKP_DATA8_BKPDATA8_26, 26 .EQU BKP_DATA8_BKPDATA8_25, 25 .EQU BKP_DATA8_BKPDATA8_24, 24 .EQU BKP_DATA8_BKPDATA8_23, 23 .EQU BKP_DATA8_BKPDATA8_22, 22 .EQU BKP_DATA8_BKPDATA8_21, 21 .EQU BKP_DATA8_BKPDATA8_20, 20 .EQU BKP_DATA8_BKPDATA8_19, 19 .EQU BKP_DATA8_BKPDATA8_18, 18 .EQU BKP_DATA8_BKPDATA8_17, 17 .EQU BKP_DATA8_BKPDATA8_16, 16 .EQU BKP_DATA8_BKPDATA8_15, 15 .EQU BKP_DATA8_BKPDATA8_14, 14 .EQU BKP_DATA8_BKPDATA8_13, 13 .EQU BKP_DATA8_BKPDATA8_12, 12 .EQU BKP_DATA8_BKPDATA8_11, 11 .EQU BKP_DATA8_BKPDATA8_10, 10 .EQU BKP_DATA8_BKPDATA8_9, 9 .EQU BKP_DATA8_BKPDATA8_8, 8 .EQU BKP_DATA8_BKPDATA8_7, 7 .EQU BKP_DATA8_BKPDATA8_6, 6 .EQU BKP_DATA8_BKPDATA8_5, 5 .EQU BKP_DATA8_BKPDATA8_4, 4 .EQU BKP_DATA8_BKPDATA8_3, 3 .EQU BKP_DATA8_BKPDATA8_2, 2 .EQU BKP_DATA8_BKPDATA8_1, 1 .EQU BKP_DATA8_BKPDATA8_0, 0 // register------------------------------------- .EQU BKP_DATA9, 0x40001464 // 0x4000 1464 BKP_DATA9 Bits------------------------------------- .EQU BKP_DATA9_BKPDATA9_31, 31 .EQU BKP_DATA9_BKPDATA9_30, 30 .EQU BKP_DATA9_BKPDATA9_29, 29 .EQU BKP_DATA9_BKPDATA9_28, 28 .EQU BKP_DATA9_BKPDATA9_27, 27 .EQU BKP_DATA9_BKPDATA9_26, 26 .EQU BKP_DATA9_BKPDATA9_25, 25 .EQU BKP_DATA9_BKPDATA9_24, 24 .EQU BKP_DATA9_BKPDATA9_23, 23 .EQU BKP_DATA9_BKPDATA9_22, 22 .EQU BKP_DATA9_BKPDATA9_21, 21 .EQU BKP_DATA9_BKPDATA9_20, 20 .EQU BKP_DATA9_BKPDATA9_19, 19 .EQU BKP_DATA9_BKPDATA9_18, 18 .EQU BKP_DATA9_BKPDATA9_17, 17 .EQU BKP_DATA9_BKPDATA9_16, 16 .EQU BKP_DATA9_BKPDATA9_15, 15 .EQU BKP_DATA9_BKPDATA9_14, 14 .EQU BKP_DATA9_BKPDATA9_13, 13 .EQU BKP_DATA9_BKPDATA9_12, 12 .EQU BKP_DATA9_BKPDATA9_11, 11 .EQU BKP_DATA9_BKPDATA9_10, 10 .EQU BKP_DATA9_BKPDATA9_9, 9 .EQU BKP_DATA9_BKPDATA9_8, 8 .EQU BKP_DATA9_BKPDATA9_7, 7 .EQU BKP_DATA9_BKPDATA9_6, 6 .EQU BKP_DATA9_BKPDATA9_5, 5 .EQU BKP_DATA9_BKPDATA9_4, 4 .EQU BKP_DATA9_BKPDATA9_3, 3 .EQU BKP_DATA9_BKPDATA9_2, 2 .EQU BKP_DATA9_BKPDATA9_1, 1 .EQU BKP_DATA9_BKPDATA9_0, 0 // register------------------------------------- .EQU BKP_DATA10, 0x40001468 // 0x4000 1468 BKP_DATA10 Bits------------------------------------- .EQU BKP_DATA10_BKPDATA10_31, 31 .EQU BKP_DATA10_BKPDATA10_30, 30 .EQU BKP_DATA10_BKPDATA10_29, 29 .EQU BKP_DATA10_BKPDATA10_28, 28 .EQU BKP_DATA10_BKPDATA10_27, 27 .EQU BKP_DATA10_BKPDATA10_26, 26 .EQU BKP_DATA10_BKPDATA10_25, 25 .EQU BKP_DATA10_BKPDATA10_24, 24 .EQU BKP_DATA10_BKPDATA10_23, 23 .EQU BKP_DATA10_BKPDATA10_22, 22 .EQU BKP_DATA10_BKPDATA10_21, 21 .EQU BKP_DATA10_BKPDATA10_20, 20 .EQU BKP_DATA10_BKPDATA10_19, 19 .EQU BKP_DATA10_BKPDATA10_18, 18 .EQU BKP_DATA10_BKPDATA10_17, 17 .EQU BKP_DATA10_BKPDATA10_16, 16 .EQU BKP_DATA10_BKPDATA10_15, 15 .EQU BKP_DATA10_BKPDATA10_14, 14 .EQU BKP_DATA10_BKPDATA10_13, 13 .EQU BKP_DATA10_BKPDATA10_12, 12 .EQU BKP_DATA10_BKPDATA10_11, 11 .EQU BKP_DATA10_BKPDATA10_10, 10 .EQU BKP_DATA10_BKPDATA10_9, 9 .EQU BKP_DATA10_BKPDATA10_8, 8 .EQU BKP_DATA10_BKPDATA10_7, 7 .EQU BKP_DATA10_BKPDATA10_6, 6 .EQU BKP_DATA10_BKPDATA10_5, 5 .EQU BKP_DATA10_BKPDATA10_4, 4 .EQU BKP_DATA10_BKPDATA10_3, 3 .EQU BKP_DATA10_BKPDATA10_2, 2 .EQU BKP_DATA10_BKPDATA10_1, 1 .EQU BKP_DATA10_BKPDATA10_0, 0 // register------------------------------------- .EQU BKP_DATA11, 0x4000146C // 0x4000 146C BKP_DATA11 Bits------------------------------------- .EQU BKP_DATA11_BKPDATA11_31, 31 .EQU BKP_DATA11_BKPDATA11_30, 30 .EQU BKP_DATA11_BKPDATA11_29, 29 .EQU BKP_DATA11_BKPDATA11_28, 28 .EQU BKP_DATA11_BKPDATA11_27, 27 .EQU BKP_DATA11_BKPDATA11_26, 26 .EQU BKP_DATA11_BKPDATA11_25, 25 .EQU BKP_DATA11_BKPDATA11_24, 24 .EQU BKP_DATA11_BKPDATA11_23, 23 .EQU BKP_DATA11_BKPDATA11_22, 22 .EQU BKP_DATA11_BKPDATA11_21, 21 .EQU BKP_DATA11_BKPDATA11_20, 20 .EQU BKP_DATA11_BKPDATA11_19, 19 .EQU BKP_DATA11_BKPDATA11_18, 18 .EQU BKP_DATA11_BKPDATA11_17, 17 .EQU BKP_DATA11_BKPDATA11_16, 16 .EQU BKP_DATA11_BKPDATA11_15, 15 .EQU BKP_DATA11_BKPDATA11_14, 14 .EQU BKP_DATA11_BKPDATA11_13, 13 .EQU BKP_DATA11_BKPDATA11_12, 12 .EQU BKP_DATA11_BKPDATA11_11, 11 .EQU BKP_DATA11_BKPDATA11_10, 10 .EQU BKP_DATA11_BKPDATA11_9, 9 .EQU BKP_DATA11_BKPDATA11_8, 8 .EQU BKP_DATA11_BKPDATA11_7, 7 .EQU BKP_DATA11_BKPDATA11_6, 6 .EQU BKP_DATA11_BKPDATA11_5, 5 .EQU BKP_DATA11_BKPDATA11_4, 4 .EQU BKP_DATA11_BKPDATA11_3, 3 .EQU BKP_DATA11_BKPDATA11_2, 2 .EQU BKP_DATA11_BKPDATA11_1, 1 .EQU BKP_DATA11_BKPDATA11_0, 0 // register------------------------------------- .EQU BKP_DATA12, 0x40001470 // 0x4000 1470 BKP_DATA12 Bits------------------------------------- .EQU BKP_DATA12_BKPDATA12_31, 31 .EQU BKP_DATA12_BKPDATA12_30, 30 .EQU BKP_DATA12_BKPDATA12_29, 29 .EQU BKP_DATA12_BKPDATA12_28, 28 .EQU BKP_DATA12_BKPDATA12_27, 27 .EQU BKP_DATA12_BKPDATA12_26, 26 .EQU BKP_DATA12_BKPDATA12_25, 25 .EQU BKP_DATA12_BKPDATA12_24, 24 .EQU BKP_DATA12_BKPDATA12_23, 23 .EQU BKP_DATA12_BKPDATA12_22, 22 .EQU BKP_DATA12_BKPDATA12_21, 21 .EQU BKP_DATA12_BKPDATA12_20, 20 .EQU BKP_DATA12_BKPDATA12_19, 19 .EQU BKP_DATA12_BKPDATA12_18, 18 .EQU BKP_DATA12_BKPDATA12_17, 17 .EQU BKP_DATA12_BKPDATA12_16, 16 .EQU BKP_DATA12_BKPDATA12_15, 15 .EQU BKP_DATA12_BKPDATA12_14, 14 .EQU BKP_DATA12_BKPDATA12_13, 13 .EQU BKP_DATA12_BKPDATA12_12, 12 .EQU BKP_DATA12_BKPDATA12_11, 11 .EQU BKP_DATA12_BKPDATA12_10, 10 .EQU BKP_DATA12_BKPDATA12_9, 9 .EQU BKP_DATA12_BKPDATA12_8, 8 .EQU BKP_DATA12_BKPDATA12_7, 7 .EQU BKP_DATA12_BKPDATA12_6, 6 .EQU BKP_DATA12_BKPDATA12_5, 5 .EQU BKP_DATA12_BKPDATA12_4, 4 .EQU BKP_DATA12_BKPDATA12_3, 3 .EQU BKP_DATA12_BKPDATA12_2, 2 .EQU BKP_DATA12_BKPDATA12_1, 1 .EQU BKP_DATA12_BKPDATA12_0, 0 // register------------------------------------- .EQU BKP_DATA13, 0x40001474 // 0x4000 1474 BKP_DATA13 Bits------------------------------------- .EQU BKP_DATA13_BKPDATA13_31, 31 .EQU BKP_DATA13_BKPDATA13_30, 30 .EQU BKP_DATA13_BKPDATA13_29, 29 .EQU BKP_DATA13_BKPDATA13_28, 28 .EQU BKP_DATA13_BKPDATA13_27, 27 .EQU BKP_DATA13_BKPDATA13_26, 26 .EQU BKP_DATA13_BKPDATA13_25, 25 .EQU BKP_DATA13_BKPDATA13_24, 24 .EQU BKP_DATA13_BKPDATA13_23, 23 .EQU BKP_DATA13_BKPDATA13_22, 22 .EQU BKP_DATA13_BKPDATA13_21, 21 .EQU BKP_DATA13_BKPDATA13_20, 20 .EQU BKP_DATA13_BKPDATA13_19, 19 .EQU BKP_DATA13_BKPDATA13_18, 18 .EQU BKP_DATA13_BKPDATA13_17, 17 .EQU BKP_DATA13_BKPDATA13_16, 16 .EQU BKP_DATA13_BKPDATA13_15, 15 .EQU BKP_DATA13_BKPDATA13_14, 14 .EQU BKP_DATA13_BKPDATA13_13, 13 .EQU BKP_DATA13_BKPDATA13_12, 12 .EQU BKP_DATA13_BKPDATA13_11, 11 .EQU BKP_DATA13_BKPDATA13_10, 10 .EQU BKP_DATA13_BKPDATA13_9, 9 .EQU BKP_DATA13_BKPDATA13_8, 8 .EQU BKP_DATA13_BKPDATA13_7, 7 .EQU BKP_DATA13_BKPDATA13_6, 6 .EQU BKP_DATA13_BKPDATA13_5, 5 .EQU BKP_DATA13_BKPDATA13_4, 4 .EQU BKP_DATA13_BKPDATA13_3, 3 .EQU BKP_DATA13_BKPDATA13_2, 2 .EQU BKP_DATA13_BKPDATA13_1, 1 .EQU BKP_DATA13_BKPDATA13_0, 0 // register------------------------------------- .EQU BKP_DATA14, 0x40001478 // 0x4000 1478 BKP_DATA14 Bits------------------------------------- .EQU BKP_DATA14_BKPDATA14_31, 31 .EQU BKP_DATA14_BKPDATA14_30, 30 .EQU BKP_DATA14_BKPDATA14_29, 29 .EQU BKP_DATA14_BKPDATA14_28, 28 .EQU BKP_DATA14_BKPDATA14_27, 27 .EQU BKP_DATA14_BKPDATA14_26, 26 .EQU BKP_DATA14_BKPDATA14_25, 25 .EQU BKP_DATA14_BKPDATA14_24, 24 .EQU BKP_DATA14_BKPDATA14_23, 23 .EQU BKP_DATA14_BKPDATA14_22, 22 .EQU BKP_DATA14_BKPDATA14_21, 21 .EQU BKP_DATA14_BKPDATA14_20, 20 .EQU BKP_DATA14_BKPDATA14_19, 19 .EQU BKP_DATA14_BKPDATA14_18, 18 .EQU BKP_DATA14_BKPDATA14_17, 17 .EQU BKP_DATA14_BKPDATA14_16, 16 .EQU BKP_DATA14_BKPDATA14_15, 15 .EQU BKP_DATA14_BKPDATA14_14, 14 .EQU BKP_DATA14_BKPDATA14_13, 13 .EQU BKP_DATA14_BKPDATA14_12, 12 .EQU BKP_DATA14_BKPDATA14_11, 11 .EQU BKP_DATA14_BKPDATA14_10, 10 .EQU BKP_DATA14_BKPDATA14_9, 9 .EQU BKP_DATA14_BKPDATA14_8, 8 .EQU BKP_DATA14_BKPDATA14_7, 7 .EQU BKP_DATA14_BKPDATA14_6, 6 .EQU BKP_DATA14_BKPDATA14_5, 5 .EQU BKP_DATA14_BKPDATA14_4, 4 .EQU BKP_DATA14_BKPDATA14_3, 3 .EQU BKP_DATA14_BKPDATA14_2, 2 .EQU BKP_DATA14_BKPDATA14_1, 1 .EQU BKP_DATA14_BKPDATA14_0, 0 // register------------------------------------- .EQU BKP_DATA15, 0x4000147C // 0x4000 147C BKP_DATA15 Bits------------------------------------- .EQU BKP_DATA15_BKPDATA15_31, 31 .EQU BKP_DATA15_BKPDATA15_30, 30 .EQU BKP_DATA15_BKPDATA15_29, 29 .EQU BKP_DATA15_BKPDATA15_28, 28 .EQU BKP_DATA15_BKPDATA15_27, 27 .EQU BKP_DATA15_BKPDATA15_26, 26 .EQU BKP_DATA15_BKPDATA15_25, 25 .EQU BKP_DATA15_BKPDATA15_24, 24 .EQU BKP_DATA15_BKPDATA15_23, 23 .EQU BKP_DATA15_BKPDATA15_22, 22 .EQU BKP_DATA15_BKPDATA15_21, 21 .EQU BKP_DATA15_BKPDATA15_20, 20 .EQU BKP_DATA15_BKPDATA15_19, 19 .EQU BKP_DATA15_BKPDATA15_18, 18 .EQU BKP_DATA15_BKPDATA15_17, 17 .EQU BKP_DATA15_BKPDATA15_16, 16 .EQU BKP_DATA15_BKPDATA15_15, 15 .EQU BKP_DATA15_BKPDATA15_14, 14 .EQU BKP_DATA15_BKPDATA15_13, 13 .EQU BKP_DATA15_BKPDATA15_12, 12 .EQU BKP_DATA15_BKPDATA15_11, 11 .EQU BKP_DATA15_BKPDATA15_10, 10 .EQU BKP_DATA15_BKPDATA15_9, 9 .EQU BKP_DATA15_BKPDATA15_8, 8 .EQU BKP_DATA15_BKPDATA15_7, 7 .EQU BKP_DATA15_BKPDATA15_6, 6 .EQU BKP_DATA15_BKPDATA15_5, 5 .EQU BKP_DATA15_BKPDATA15_4, 4 .EQU BKP_DATA15_BKPDATA15_3, 3 .EQU BKP_DATA15_BKPDATA15_2, 2 .EQU BKP_DATA15_BKPDATA15_1, 1 .EQU BKP_DATA15_BKPDATA15_0, 0 // register------------------------------------- .EQU BKP_DATA16, 0x40001480 // 0x4000 1480 BKP_DATA16 Bits------------------------------------- .EQU BKP_DATA16_BKPDATA16_31, 31 .EQU BKP_DATA16_BKPDATA16_30, 30 .EQU BKP_DATA16_BKPDATA16_29, 29 .EQU BKP_DATA16_BKPDATA16_28, 28 .EQU BKP_DATA16_BKPDATA16_27, 27 .EQU BKP_DATA16_BKPDATA16_26, 26 .EQU BKP_DATA16_BKPDATA16_25, 25 .EQU BKP_DATA16_BKPDATA16_24, 24 .EQU BKP_DATA16_BKPDATA16_23, 23 .EQU BKP_DATA16_BKPDATA16_22, 22 .EQU BKP_DATA16_BKPDATA16_21, 21 .EQU BKP_DATA16_BKPDATA16_20, 20 .EQU BKP_DATA16_BKPDATA16_19, 19 .EQU BKP_DATA16_BKPDATA16_18, 18 .EQU BKP_DATA16_BKPDATA16_17, 17 .EQU BKP_DATA16_BKPDATA16_16, 16 .EQU BKP_DATA16_BKPDATA16_15, 15 .EQU BKP_DATA16_BKPDATA16_14, 14 .EQU BKP_DATA16_BKPDATA16_13, 13 .EQU BKP_DATA16_BKPDATA16_12, 12 .EQU BKP_DATA16_BKPDATA16_11, 11 .EQU BKP_DATA16_BKPDATA16_10, 10 .EQU BKP_DATA16_BKPDATA16_9, 9 .EQU BKP_DATA16_BKPDATA16_8, 8 .EQU BKP_DATA16_BKPDATA16_7, 7 .EQU BKP_DATA16_BKPDATA16_6, 6 .EQU BKP_DATA16_BKPDATA16_5, 5 .EQU BKP_DATA16_BKPDATA16_4, 4 .EQU BKP_DATA16_BKPDATA16_3, 3 .EQU BKP_DATA16_BKPDATA16_2, 2 .EQU BKP_DATA16_BKPDATA16_1, 1 .EQU BKP_DATA16_BKPDATA16_0, 0 // register------------------------------------- .EQU BKP_DATA17, 0x40001484 // 0x4000 1484 BKP_DATA17 Bits------------------------------------- .EQU BKP_DATA17_BKPDATA17_31, 31 .EQU BKP_DATA17_BKPDATA17_30, 30 .EQU BKP_DATA17_BKPDATA17_29, 29 .EQU BKP_DATA17_BKPDATA17_28, 28 .EQU BKP_DATA17_BKPDATA17_27, 27 .EQU BKP_DATA17_BKPDATA17_26, 26 .EQU BKP_DATA17_BKPDATA17_25, 25 .EQU BKP_DATA17_BKPDATA17_24, 24 .EQU BKP_DATA17_BKPDATA17_23, 23 .EQU BKP_DATA17_BKPDATA17_22, 22 .EQU BKP_DATA17_BKPDATA17_21, 21 .EQU BKP_DATA17_BKPDATA17_20, 20 .EQU BKP_DATA17_BKPDATA17_19, 19 .EQU BKP_DATA17_BKPDATA17_18, 18 .EQU BKP_DATA17_BKPDATA17_17, 17 .EQU BKP_DATA17_BKPDATA17_16, 16 .EQU BKP_DATA17_BKPDATA17_15, 15 .EQU BKP_DATA17_BKPDATA17_14, 14 .EQU BKP_DATA17_BKPDATA17_13, 13 .EQU BKP_DATA17_BKPDATA17_12, 12 .EQU BKP_DATA17_BKPDATA17_11, 11 .EQU BKP_DATA17_BKPDATA17_10, 10 .EQU BKP_DATA17_BKPDATA17_9, 9 .EQU BKP_DATA17_BKPDATA17_8, 8 .EQU BKP_DATA17_BKPDATA17_7, 7 .EQU BKP_DATA17_BKPDATA17_6, 6 .EQU BKP_DATA17_BKPDATA17_5, 5 .EQU BKP_DATA17_BKPDATA17_4, 4 .EQU BKP_DATA17_BKPDATA17_3, 3 .EQU BKP_DATA17_BKPDATA17_2, 2 .EQU BKP_DATA17_BKPDATA17_1, 1 .EQU BKP_DATA17_BKPDATA17_0, 0 // register------------------------------------- .EQU BKP_DATA18, 0x40001488 // 0x4000 1488 BKP_DATA18 Bits------------------------------------- .EQU BKP_DATA18_BKPDATA18_31, 31 .EQU BKP_DATA18_BKPDATA18_30, 30 .EQU BKP_DATA18_BKPDATA18_29, 29 .EQU BKP_DATA18_BKPDATA18_28, 28 .EQU BKP_DATA18_BKPDATA18_27, 27 .EQU BKP_DATA18_BKPDATA18_26, 26 .EQU BKP_DATA18_BKPDATA18_25, 25 .EQU BKP_DATA18_BKPDATA18_24, 24 .EQU BKP_DATA18_BKPDATA18_23, 23 .EQU BKP_DATA18_BKPDATA18_22, 22 .EQU BKP_DATA18_BKPDATA18_21, 21 .EQU BKP_DATA18_BKPDATA18_20, 20 .EQU BKP_DATA18_BKPDATA18_19, 19 .EQU BKP_DATA18_BKPDATA18_18, 18 .EQU BKP_DATA18_BKPDATA18_17, 17 .EQU BKP_DATA18_BKPDATA18_16, 16 .EQU BKP_DATA18_BKPDATA18_15, 15 .EQU BKP_DATA18_BKPDATA18_14, 14 .EQU BKP_DATA18_BKPDATA18_13, 13 .EQU BKP_DATA18_BKPDATA18_12, 12 .EQU BKP_DATA18_BKPDATA18_11, 11 .EQU BKP_DATA18_BKPDATA18_10, 10 .EQU BKP_DATA18_BKPDATA18_9, 9 .EQU BKP_DATA18_BKPDATA18_8, 8 .EQU BKP_DATA18_BKPDATA18_7, 7 .EQU BKP_DATA18_BKPDATA18_6, 6 .EQU BKP_DATA18_BKPDATA18_5, 5 .EQU BKP_DATA18_BKPDATA18_4, 4 .EQU BKP_DATA18_BKPDATA18_3, 3 .EQU BKP_DATA18_BKPDATA18_2, 2 .EQU BKP_DATA18_BKPDATA18_1, 1 .EQU BKP_DATA18_BKPDATA18_0, 0 // register------------------------------------- .EQU BKP_DATA19, 0x4000148C // 0x4000 148C BKP_DATA19 Bits------------------------------------- .EQU BKP_DATA19_BKPDATA19_31, 31 .EQU BKP_DATA19_BKPDATA19_30, 30 .EQU BKP_DATA19_BKPDATA19_29, 29 .EQU BKP_DATA19_BKPDATA19_28, 28 .EQU BKP_DATA19_BKPDATA19_27, 27 .EQU BKP_DATA19_BKPDATA19_26, 26 .EQU BKP_DATA19_BKPDATA19_25, 25 .EQU BKP_DATA19_BKPDATA19_24, 24 .EQU BKP_DATA19_BKPDATA19_23, 23 .EQU BKP_DATA19_BKPDATA19_22, 22 .EQU BKP_DATA19_BKPDATA19_21, 21 .EQU BKP_DATA19_BKPDATA19_20, 20 .EQU BKP_DATA19_BKPDATA19_19, 19 .EQU BKP_DATA19_BKPDATA19_18, 18 .EQU BKP_DATA19_BKPDATA19_17, 17 .EQU BKP_DATA19_BKPDATA19_16, 16 .EQU BKP_DATA19_BKPDATA19_15, 15 .EQU BKP_DATA19_BKPDATA19_14, 14 .EQU BKP_DATA19_BKPDATA19_13, 13 .EQU BKP_DATA19_BKPDATA19_12, 12 .EQU BKP_DATA19_BKPDATA19_11, 11 .EQU BKP_DATA19_BKPDATA19_10, 10 .EQU BKP_DATA19_BKPDATA19_9, 9 .EQU BKP_DATA19_BKPDATA19_8, 8 .EQU BKP_DATA19_BKPDATA19_7, 7 .EQU BKP_DATA19_BKPDATA19_6, 6 .EQU BKP_DATA19_BKPDATA19_5, 5 .EQU BKP_DATA19_BKPDATA19_4, 4 .EQU BKP_DATA19_BKPDATA19_3, 3 .EQU BKP_DATA19_BKPDATA19_2, 2 .EQU BKP_DATA19_BKPDATA19_1, 1 .EQU BKP_DATA19_BKPDATA19_0, 0 // register------------------------------------- .EQU BKP_DATA20, 0x40001490 // 0x4000 1490 BKP_DATA20 Bits------------------------------------- .EQU BKP_DATA20_BKPDATA20_31, 31 .EQU BKP_DATA20_BKPDATA20_30, 30 .EQU BKP_DATA20_BKPDATA20_29, 29 .EQU BKP_DATA20_BKPDATA20_28, 28 .EQU BKP_DATA20_BKPDATA20_27, 27 .EQU BKP_DATA20_BKPDATA20_26, 26 .EQU BKP_DATA20_BKPDATA20_25, 25 .EQU BKP_DATA20_BKPDATA20_24, 24 .EQU BKP_DATA20_BKPDATA20_23, 23 .EQU BKP_DATA20_BKPDATA20_22, 22 .EQU BKP_DATA20_BKPDATA20_21, 21 .EQU BKP_DATA20_BKPDATA20_20, 20 .EQU BKP_DATA20_BKPDATA20_19, 19 .EQU BKP_DATA20_BKPDATA20_18, 18 .EQU BKP_DATA20_BKPDATA20_17, 17 .EQU BKP_DATA20_BKPDATA20_16, 16 .EQU BKP_DATA20_BKPDATA20_15, 15 .EQU BKP_DATA20_BKPDATA20_14, 14 .EQU BKP_DATA20_BKPDATA20_13, 13 .EQU BKP_DATA20_BKPDATA20_12, 12 .EQU BKP_DATA20_BKPDATA20_11, 11 .EQU BKP_DATA20_BKPDATA20_10, 10 .EQU BKP_DATA20_BKPDATA20_9, 9 .EQU BKP_DATA20_BKPDATA20_8, 8 .EQU BKP_DATA20_BKPDATA20_7, 7 .EQU BKP_DATA20_BKPDATA20_6, 6 .EQU BKP_DATA20_BKPDATA20_5, 5 .EQU BKP_DATA20_BKPDATA20_4, 4 .EQU BKP_DATA20_BKPDATA20_3, 3 .EQU BKP_DATA20_BKPDATA20_2, 2 .EQU BKP_DATA20_BKPDATA20_1, 1 .EQU BKP_DATA20_BKPDATA20_0, 0 // register------------------------------------- .EQU BKP_DATA21, 0x40001494 // 0x4000 1494 BKP_DATA21 Bits------------------------------------- .EQU BKP_DATA21_BKPDATA21_31, 31 .EQU BKP_DATA21_BKPDATA21_30, 30 .EQU BKP_DATA21_BKPDATA21_29, 29 .EQU BKP_DATA21_BKPDATA21_28, 28 .EQU BKP_DATA21_BKPDATA21_27, 27 .EQU BKP_DATA21_BKPDATA21_26, 26 .EQU BKP_DATA21_BKPDATA21_25, 25 .EQU BKP_DATA21_BKPDATA21_24, 24 .EQU BKP_DATA21_BKPDATA21_23, 23 .EQU BKP_DATA21_BKPDATA21_22, 22 .EQU BKP_DATA21_BKPDATA21_21, 21 .EQU BKP_DATA21_BKPDATA21_20, 20 .EQU BKP_DATA21_BKPDATA21_19, 19 .EQU BKP_DATA21_BKPDATA21_18, 18 .EQU BKP_DATA21_BKPDATA21_17, 17 .EQU BKP_DATA21_BKPDATA21_16, 16 .EQU BKP_DATA21_BKPDATA21_15, 15 .EQU BKP_DATA21_BKPDATA21_14, 14 .EQU BKP_DATA21_BKPDATA21_13, 13 .EQU BKP_DATA21_BKPDATA21_12, 12 .EQU BKP_DATA21_BKPDATA21_11, 11 .EQU BKP_DATA21_BKPDATA21_10, 10 .EQU BKP_DATA21_BKPDATA21_9, 9 .EQU BKP_DATA21_BKPDATA21_8, 8 .EQU BKP_DATA21_BKPDATA21_7, 7 .EQU BKP_DATA21_BKPDATA21_6, 6 .EQU BKP_DATA21_BKPDATA21_5, 5 .EQU BKP_DATA21_BKPDATA21_4, 4 .EQU BKP_DATA21_BKPDATA21_3, 3 .EQU BKP_DATA21_BKPDATA21_2, 2 .EQU BKP_DATA21_BKPDATA21_1, 1 .EQU BKP_DATA21_BKPDATA21_0, 0 // register------------------------------------- .EQU BKP_DATA22, 0x40001498 // 0x4000 1498 BKP_DATA22 Bits------------------------------------- .EQU BKP_DATA22_BKPDATA22_31, 31 .EQU BKP_DATA22_BKPDATA22_30, 30 .EQU BKP_DATA22_BKPDATA22_29, 29 .EQU BKP_DATA22_BKPDATA22_28, 28 .EQU BKP_DATA22_BKPDATA22_27, 27 .EQU BKP_DATA22_BKPDATA22_26, 26 .EQU BKP_DATA22_BKPDATA22_25, 25 .EQU BKP_DATA22_BKPDATA22_24, 24 .EQU BKP_DATA22_BKPDATA22_23, 23 .EQU BKP_DATA22_BKPDATA22_22, 22 .EQU BKP_DATA22_BKPDATA22_21, 21 .EQU BKP_DATA22_BKPDATA22_20, 20 .EQU BKP_DATA22_BKPDATA22_19, 19 .EQU BKP_DATA22_BKPDATA22_18, 18 .EQU BKP_DATA22_BKPDATA22_17, 17 .EQU BKP_DATA22_BKPDATA22_16, 16 .EQU BKP_DATA22_BKPDATA22_15, 15 .EQU BKP_DATA22_BKPDATA22_14, 14 .EQU BKP_DATA22_BKPDATA22_13, 13 .EQU BKP_DATA22_BKPDATA22_12, 12 .EQU BKP_DATA22_BKPDATA22_11, 11 .EQU BKP_DATA22_BKPDATA22_10, 10 .EQU BKP_DATA22_BKPDATA22_9, 9 .EQU BKP_DATA22_BKPDATA22_8, 8 .EQU BKP_DATA22_BKPDATA22_7, 7 .EQU BKP_DATA22_BKPDATA22_6, 6 .EQU BKP_DATA22_BKPDATA22_5, 5 .EQU BKP_DATA22_BKPDATA22_4, 4 .EQU BKP_DATA22_BKPDATA22_3, 3 .EQU BKP_DATA22_BKPDATA22_2, 2 .EQU BKP_DATA22_BKPDATA22_1, 1 .EQU BKP_DATA22_BKPDATA22_0, 0 // register------------------------------------- .EQU BKP_DATA23, 0x4000149C // 0x4000 149C BKP_DATA23 Bits------------------------------------- .EQU BKP_DATA23_BKPDATA23_31, 31 .EQU BKP_DATA23_BKPDATA23_30, 30 .EQU BKP_DATA23_BKPDATA23_29, 29 .EQU BKP_DATA23_BKPDATA23_28, 28 .EQU BKP_DATA23_BKPDATA23_27, 27 .EQU BKP_DATA23_BKPDATA23_26, 26 .EQU BKP_DATA23_BKPDATA23_25, 25 .EQU BKP_DATA23_BKPDATA23_24, 24 .EQU BKP_DATA23_BKPDATA23_23, 23 .EQU BKP_DATA23_BKPDATA23_22, 22 .EQU BKP_DATA23_BKPDATA23_21, 21 .EQU BKP_DATA23_BKPDATA23_20, 20 .EQU BKP_DATA23_BKPDATA23_19, 19 .EQU BKP_DATA23_BKPDATA23_18, 18 .EQU BKP_DATA23_BKPDATA23_17, 17 .EQU BKP_DATA23_BKPDATA23_16, 16 .EQU BKP_DATA23_BKPDATA23_15, 15 .EQU BKP_DATA23_BKPDATA23_14, 14 .EQU BKP_DATA23_BKPDATA23_13, 13 .EQU BKP_DATA23_BKPDATA23_12, 12 .EQU BKP_DATA23_BKPDATA23_11, 11 .EQU BKP_DATA23_BKPDATA23_10, 10 .EQU BKP_DATA23_BKPDATA23_9, 9 .EQU BKP_DATA23_BKPDATA23_8, 8 .EQU BKP_DATA23_BKPDATA23_7, 7 .EQU BKP_DATA23_BKPDATA23_6, 6 .EQU BKP_DATA23_BKPDATA23_5, 5 .EQU BKP_DATA23_BKPDATA23_4, 4 .EQU BKP_DATA23_BKPDATA23_3, 3 .EQU BKP_DATA23_BKPDATA23_2, 2 .EQU BKP_DATA23_BKPDATA23_1, 1 .EQU BKP_DATA23_BKPDATA23_0, 0 // register------------------------------------- .EQU BKP_DATA24, 0x400014A0 // 0x4000 14A0 BKP_DATA24 Bits------------------------------------- .EQU BKP_DATA24_BKPDATA24_31, 31 .EQU BKP_DATA24_BKPDATA24_30, 30 .EQU BKP_DATA24_BKPDATA24_29, 29 .EQU BKP_DATA24_BKPDATA24_28, 28 .EQU BKP_DATA24_BKPDATA24_27, 27 .EQU BKP_DATA24_BKPDATA24_26, 26 .EQU BKP_DATA24_BKPDATA24_25, 25 .EQU BKP_DATA24_BKPDATA24_24, 24 .EQU BKP_DATA24_BKPDATA24_23, 23 .EQU BKP_DATA24_BKPDATA24_22, 22 .EQU BKP_DATA24_BKPDATA24_21, 21 .EQU BKP_DATA24_BKPDATA24_20, 20 .EQU BKP_DATA24_BKPDATA24_19, 19 .EQU BKP_DATA24_BKPDATA24_18, 18 .EQU BKP_DATA24_BKPDATA24_17, 17 .EQU BKP_DATA24_BKPDATA24_16, 16 .EQU BKP_DATA24_BKPDATA24_15, 15 .EQU BKP_DATA24_BKPDATA24_14, 14 .EQU BKP_DATA24_BKPDATA24_13, 13 .EQU BKP_DATA24_BKPDATA24_12, 12 .EQU BKP_DATA24_BKPDATA24_11, 11 .EQU BKP_DATA24_BKPDATA24_10, 10 .EQU BKP_DATA24_BKPDATA24_9, 9 .EQU BKP_DATA24_BKPDATA24_8, 8 .EQU BKP_DATA24_BKPDATA24_7, 7 .EQU BKP_DATA24_BKPDATA24_6, 6 .EQU BKP_DATA24_BKPDATA24_5, 5 .EQU BKP_DATA24_BKPDATA24_4, 4 .EQU BKP_DATA24_BKPDATA24_3, 3 .EQU BKP_DATA24_BKPDATA24_2, 2 .EQU BKP_DATA24_BKPDATA24_1, 1 .EQU BKP_DATA24_BKPDATA24_0, 0 // register------------------------------------- .EQU BKP_DATA25, 0x400014A4 // 0x4000 14A4 BKP_DATA25 Bits------------------------------------- .EQU BKP_DATA25_BKPDATA25_31, 31 .EQU BKP_DATA25_BKPDATA25_30, 30 .EQU BKP_DATA25_BKPDATA25_29, 29 .EQU BKP_DATA25_BKPDATA25_28, 28 .EQU BKP_DATA25_BKPDATA25_27, 27 .EQU BKP_DATA25_BKPDATA25_26, 26 .EQU BKP_DATA25_BKPDATA25_25, 25 .EQU BKP_DATA25_BKPDATA25_24, 24 .EQU BKP_DATA25_BKPDATA25_23, 23 .EQU BKP_DATA25_BKPDATA25_22, 22 .EQU BKP_DATA25_BKPDATA25_21, 21 .EQU BKP_DATA25_BKPDATA25_20, 20 .EQU BKP_DATA25_BKPDATA25_19, 19 .EQU BKP_DATA25_BKPDATA25_18, 18 .EQU BKP_DATA25_BKPDATA25_17, 17 .EQU BKP_DATA25_BKPDATA25_16, 16 .EQU BKP_DATA25_BKPDATA25_15, 15 .EQU BKP_DATA25_BKPDATA25_14, 14 .EQU BKP_DATA25_BKPDATA25_13, 13 .EQU BKP_DATA25_BKPDATA25_12, 12 .EQU BKP_DATA25_BKPDATA25_11, 11 .EQU BKP_DATA25_BKPDATA25_10, 10 .EQU BKP_DATA25_BKPDATA25_9, 9 .EQU BKP_DATA25_BKPDATA25_8, 8 .EQU BKP_DATA25_BKPDATA25_7, 7 .EQU BKP_DATA25_BKPDATA25_6, 6 .EQU BKP_DATA25_BKPDATA25_5, 5 .EQU BKP_DATA25_BKPDATA25_4, 4 .EQU BKP_DATA25_BKPDATA25_3, 3 .EQU BKP_DATA25_BKPDATA25_2, 2 .EQU BKP_DATA25_BKPDATA25_1, 1 .EQU BKP_DATA25_BKPDATA25_0, 0 // register------------------------------------- .EQU BKP_DATA26, 0x400014A8 // 0x4000 14A8 BKP_DATA26 Bits------------------------------------- .EQU BKP_DATA26_BKPDATA26_31, 31 .EQU BKP_DATA26_BKPDATA26_30, 30 .EQU BKP_DATA26_BKPDATA26_29, 29 .EQU BKP_DATA26_BKPDATA26_28, 28 .EQU BKP_DATA26_BKPDATA26_27, 27 .EQU BKP_DATA26_BKPDATA26_26, 26 .EQU BKP_DATA26_BKPDATA26_25, 25 .EQU BKP_DATA26_BKPDATA26_24, 24 .EQU BKP_DATA26_BKPDATA26_23, 23 .EQU BKP_DATA26_BKPDATA26_22, 22 .EQU BKP_DATA26_BKPDATA26_21, 21 .EQU BKP_DATA26_BKPDATA26_20, 20 .EQU BKP_DATA26_BKPDATA26_19, 19 .EQU BKP_DATA26_BKPDATA26_18, 18 .EQU BKP_DATA26_BKPDATA26_17, 17 .EQU BKP_DATA26_BKPDATA26_16, 16 .EQU BKP_DATA26_BKPDATA26_15, 15 .EQU BKP_DATA26_BKPDATA26_14, 14 .EQU BKP_DATA26_BKPDATA26_13, 13 .EQU BKP_DATA26_BKPDATA26_12, 12 .EQU BKP_DATA26_BKPDATA26_11, 11 .EQU BKP_DATA26_BKPDATA26_10, 10 .EQU BKP_DATA26_BKPDATA26_9, 9 .EQU BKP_DATA26_BKPDATA26_8, 8 .EQU BKP_DATA26_BKPDATA26_7, 7 .EQU BKP_DATA26_BKPDATA26_6, 6 .EQU BKP_DATA26_BKPDATA26_5, 5 .EQU BKP_DATA26_BKPDATA26_4, 4 .EQU BKP_DATA26_BKPDATA26_3, 3 .EQU BKP_DATA26_BKPDATA26_2, 2 .EQU BKP_DATA26_BKPDATA26_1, 1 .EQU BKP_DATA26_BKPDATA26_0, 0 // register------------------------------------- .EQU BKP_DATA27, 0x400014AC // 0x4000 14AC BKP_DATA27 Bits------------------------------------- .EQU BKP_DATA27_BKPDATA27_31, 31 .EQU BKP_DATA27_BKPDATA27_30, 30 .EQU BKP_DATA27_BKPDATA27_29, 29 .EQU BKP_DATA27_BKPDATA27_28, 28 .EQU BKP_DATA27_BKPDATA27_27, 27 .EQU BKP_DATA27_BKPDATA27_26, 26 .EQU BKP_DATA27_BKPDATA27_25, 25 .EQU BKP_DATA27_BKPDATA27_24, 24 .EQU BKP_DATA27_BKPDATA27_23, 23 .EQU BKP_DATA27_BKPDATA27_22, 22 .EQU BKP_DATA27_BKPDATA27_21, 21 .EQU BKP_DATA27_BKPDATA27_20, 20 .EQU BKP_DATA27_BKPDATA27_19, 19 .EQU BKP_DATA27_BKPDATA27_18, 18 .EQU BKP_DATA27_BKPDATA27_17, 17 .EQU BKP_DATA27_BKPDATA27_16, 16 .EQU BKP_DATA27_BKPDATA27_15, 15 .EQU BKP_DATA27_BKPDATA27_14, 14 .EQU BKP_DATA27_BKPDATA27_13, 13 .EQU BKP_DATA27_BKPDATA27_12, 12 .EQU BKP_DATA27_BKPDATA27_11, 11 .EQU BKP_DATA27_BKPDATA27_10, 10 .EQU BKP_DATA27_BKPDATA27_9, 9 .EQU BKP_DATA27_BKPDATA27_8, 8 .EQU BKP_DATA27_BKPDATA27_7, 7 .EQU BKP_DATA27_BKPDATA27_6, 6 .EQU BKP_DATA27_BKPDATA27_5, 5 .EQU BKP_DATA27_BKPDATA27_4, 4 .EQU BKP_DATA27_BKPDATA27_3, 3 .EQU BKP_DATA27_BKPDATA27_2, 2 .EQU BKP_DATA27_BKPDATA27_1, 1 .EQU BKP_DATA27_BKPDATA27_0, 0 // register------------------------------------- .EQU BKP_DATA28, 0x400014B0 // 0x4000 14B0 BKP_DATA28 Bits------------------------------------- .EQU BKP_DATA28_BKPDATA28_31, 31 .EQU BKP_DATA28_BKPDATA28_30, 30 .EQU BKP_DATA28_BKPDATA28_29, 29 .EQU BKP_DATA28_BKPDATA28_28, 28 .EQU BKP_DATA28_BKPDATA28_27, 27 .EQU BKP_DATA28_BKPDATA28_26, 26 .EQU BKP_DATA28_BKPDATA28_25, 25 .EQU BKP_DATA28_BKPDATA28_24, 24 .EQU BKP_DATA28_BKPDATA28_23, 23 .EQU BKP_DATA28_BKPDATA28_22, 22 .EQU BKP_DATA28_BKPDATA28_21, 21 .EQU BKP_DATA28_BKPDATA28_20, 20 .EQU BKP_DATA28_BKPDATA28_19, 19 .EQU BKP_DATA28_BKPDATA28_18, 18 .EQU BKP_DATA28_BKPDATA28_17, 17 .EQU BKP_DATA28_BKPDATA28_16, 16 .EQU BKP_DATA28_BKPDATA28_15, 15 .EQU BKP_DATA28_BKPDATA28_14, 14 .EQU BKP_DATA28_BKPDATA28_13, 13 .EQU BKP_DATA28_BKPDATA28_12, 12 .EQU BKP_DATA28_BKPDATA28_11, 11 .EQU BKP_DATA28_BKPDATA28_10, 10 .EQU BKP_DATA28_BKPDATA28_9, 9 .EQU BKP_DATA28_BKPDATA28_8, 8 .EQU BKP_DATA28_BKPDATA28_7, 7 .EQU BKP_DATA28_BKPDATA28_6, 6 .EQU BKP_DATA28_BKPDATA28_5, 5 .EQU BKP_DATA28_BKPDATA28_4, 4 .EQU BKP_DATA28_BKPDATA28_3, 3 .EQU BKP_DATA28_BKPDATA28_2, 2 .EQU BKP_DATA28_BKPDATA28_1, 1 .EQU BKP_DATA28_BKPDATA28_0, 0 // register------------------------------------- .EQU BKP_DATA29, 0x400014B4 // 0x4000 14B4 BKP_DATA29 Bits------------------------------------- .EQU BKP_DATA29_BKPDATA29_31, 31 .EQU BKP_DATA29_BKPDATA29_30, 30 .EQU BKP_DATA29_BKPDATA29_29, 29 .EQU BKP_DATA29_BKPDATA29_28, 28 .EQU BKP_DATA29_BKPDATA29_27, 27 .EQU BKP_DATA29_BKPDATA29_26, 26 .EQU BKP_DATA29_BKPDATA29_25, 25 .EQU BKP_DATA29_BKPDATA29_24, 24 .EQU BKP_DATA29_BKPDATA29_23, 23 .EQU BKP_DATA29_BKPDATA29_22, 22 .EQU BKP_DATA29_BKPDATA29_21, 21 .EQU BKP_DATA29_BKPDATA29_20, 20 .EQU BKP_DATA29_BKPDATA29_19, 19 .EQU BKP_DATA29_BKPDATA29_18, 18 .EQU BKP_DATA29_BKPDATA29_17, 17 .EQU BKP_DATA29_BKPDATA29_16, 16 .EQU BKP_DATA29_BKPDATA29_15, 15 .EQU BKP_DATA29_BKPDATA29_14, 14 .EQU BKP_DATA29_BKPDATA29_13, 13 .EQU BKP_DATA29_BKPDATA29_12, 12 .EQU BKP_DATA29_BKPDATA29_11, 11 .EQU BKP_DATA29_BKPDATA29_10, 10 .EQU BKP_DATA29_BKPDATA29_9, 9 .EQU BKP_DATA29_BKPDATA29_8, 8 .EQU BKP_DATA29_BKPDATA29_7, 7 .EQU BKP_DATA29_BKPDATA29_6, 6 .EQU BKP_DATA29_BKPDATA29_5, 5 .EQU BKP_DATA29_BKPDATA29_4, 4 .EQU BKP_DATA29_BKPDATA29_3, 3 .EQU BKP_DATA29_BKPDATA29_2, 2 .EQU BKP_DATA29_BKPDATA29_1, 1 .EQU BKP_DATA29_BKPDATA29_0, 0 // register------------------------------------- .EQU BKP_DATA30, 0x400014B8 // 0x4000 14B8 BKP_DATA30 Bits------------------------------------- .EQU BKP_DATA30_BKPDATA30_31, 31 .EQU BKP_DATA30_BKPDATA30_30, 30 .EQU BKP_DATA30_BKPDATA30_29, 29 .EQU BKP_DATA30_BKPDATA30_28, 28 .EQU BKP_DATA30_BKPDATA30_27, 27 .EQU BKP_DATA30_BKPDATA30_26, 26 .EQU BKP_DATA30_BKPDATA30_25, 25 .EQU BKP_DATA30_BKPDATA30_24, 24 .EQU BKP_DATA30_BKPDATA30_23, 23 .EQU BKP_DATA30_BKPDATA30_22, 22 .EQU BKP_DATA30_BKPDATA30_21, 21 .EQU BKP_DATA30_BKPDATA30_20, 20 .EQU BKP_DATA30_BKPDATA30_19, 19 .EQU BKP_DATA30_BKPDATA30_18, 18 .EQU BKP_DATA30_BKPDATA30_17, 17 .EQU BKP_DATA30_BKPDATA30_16, 16 .EQU BKP_DATA30_BKPDATA30_15, 15 .EQU BKP_DATA30_BKPDATA30_14, 14 .EQU BKP_DATA30_BKPDATA30_13, 13 .EQU BKP_DATA30_BKPDATA30_12, 12 .EQU BKP_DATA30_BKPDATA30_11, 11 .EQU BKP_DATA30_BKPDATA30_10, 10 .EQU BKP_DATA30_BKPDATA30_9, 9 .EQU BKP_DATA30_BKPDATA30_8, 8 .EQU BKP_DATA30_BKPDATA30_7, 7 .EQU BKP_DATA30_BKPDATA30_6, 6 .EQU BKP_DATA30_BKPDATA30_5, 5 .EQU BKP_DATA30_BKPDATA30_4, 4 .EQU BKP_DATA30_BKPDATA30_3, 3 .EQU BKP_DATA30_BKPDATA30_2, 2 .EQU BKP_DATA30_BKPDATA30_1, 1 .EQU BKP_DATA30_BKPDATA30_0, 0 // register------------------------------------- .EQU BKP_DATA31, 0x400014BC // 0x4000 14BC BKP_DATA31 Bits------------------------------------- .EQU BKP_DATA31_BKPDATA31_31, 31 .EQU BKP_DATA31_BKPDATA31_30, 30 .EQU BKP_DATA31_BKPDATA31_29, 29 .EQU BKP_DATA31_BKPDATA31_28, 28 .EQU BKP_DATA31_BKPDATA31_27, 27 .EQU BKP_DATA31_BKPDATA31_26, 26 .EQU BKP_DATA31_BKPDATA31_25, 25 .EQU BKP_DATA31_BKPDATA31_24, 24 .EQU BKP_DATA31_BKPDATA31_23, 23 .EQU BKP_DATA31_BKPDATA31_22, 22 .EQU BKP_DATA31_BKPDATA31_21, 21 .EQU BKP_DATA31_BKPDATA31_20, 20 .EQU BKP_DATA31_BKPDATA31_19, 19 .EQU BKP_DATA31_BKPDATA31_18, 18 .EQU BKP_DATA31_BKPDATA31_17, 17 .EQU BKP_DATA31_BKPDATA31_16, 16 .EQU BKP_DATA31_BKPDATA31_15, 15 .EQU BKP_DATA31_BKPDATA31_14, 14 .EQU BKP_DATA31_BKPDATA31_13, 13 .EQU BKP_DATA31_BKPDATA31_12, 12 .EQU BKP_DATA31_BKPDATA31_11, 11 .EQU BKP_DATA31_BKPDATA31_10, 10 .EQU BKP_DATA31_BKPDATA31_9, 9 .EQU BKP_DATA31_BKPDATA31_8, 8 .EQU BKP_DATA31_BKPDATA31_7, 7 .EQU BKP_DATA31_BKPDATA31_6, 6 .EQU BKP_DATA31_BKPDATA31_5, 5 .EQU BKP_DATA31_BKPDATA31_4, 4 .EQU BKP_DATA31_BKPDATA31_3, 3 .EQU BKP_DATA31_BKPDATA31_2, 2 .EQU BKP_DATA31_BKPDATA31_1, 1 .EQU BKP_DATA31_BKPDATA31_0, 0 // register------------------------------------- .EQU RST_CTL0, 0x40001500 // 0x4000 1500 RST_CTL0 Bits------------------------------------- .EQU RST_CTL0_GPIOKRST, 9 .EQU RST_CTL0_GPIOJRST, 8 .EQU RST_CTL0_GPIOHRST, 7 .EQU RST_CTL0_GPIOGRST, 6 .EQU RST_CTL0_GPIOFRST, 5 .EQU RST_CTL0_GPIOERST, 4 .EQU RST_CTL0_GPIODRST, 3 .EQU RST_CTL0_GPIOCRST, 2 .EQU RST_CTL0_GPIOBRST, 1 .EQU RST_CTL0_GPIOARST, 0 // register------------------------------------- .EQU RST_CTL1, 0x40001504 // 0x4000 1504 RST_CTL1 Bits------------------------------------- .EQU RST_CTL1_MPURST, 30 .EQU RST_CTL1_I2C2RST, 28 .EQU RST_CTL1_I2C1RST, 27 .EQU RST_CTL1_I2C0RST, 26 .EQU RST_CTL1_SPI1RST, 25 .EQU RST_CTL1_SPI0RST, 24 .EQU RST_CTL1_USART4RST, 23 .EQU RST_CTL1_USART3RST, 22 .EQU RST_CTL1_USART2RST, 21 .EQU RST_CTL1_USART1RST, 20 .EQU RST_CTL1_USART0RST, 19 .EQU RST_CTL1_CTOUCHRST, 18 .EQU RST_CTL1_T0RST, 17 .EQU RST_CTL1_CMPRST, 16 .EQU RST_CTL1_DAC1RST, 15 .EQU RST_CTL1_DAC0RST, 14 .EQU RST_CTL1_ADC2RST, 13 .EQU RST_CTL1_ADC1RST, 12 .EQU RST_CTL1_ADC0RST, 11 .EQU RST_CTL1_QEI0RST, 10 .EQU RST_CTL1_T25T26RST, 9 .EQU RST_CTL1_T9T10RST, 8 .EQU RST_CTL1_EXMCRST, 7 .EQU RST_CTL1_T5T6RST, 6 .EQU RST_CTL1_T4RST, 5 .EQU RST_CTL1_T3RST, 4 .EQU RST_CTL1_T2RST, 3 .EQU RST_CTL1_T1RST, 2 .EQU RST_CTL1_QEI1RST, 1 .EQU RST_CTL1_QSPIRST, 0 // register------------------------------------- .EQU RST_CTL2, 0x40001508 // 0x4000 1508 RST_CTL2 Bits------------------------------------- .EQU RST_CTL2_USART7RST, 31 .EQU RST_CTL2_USART6RST, 30 .EQU RST_CTL2_USART5RST, 29 .EQU RST_CTL2_T23RST, 26 .EQU RST_CTL2_T22RST, 25 .EQU RST_CTL2_T21RST, 24 .EQU RST_CTL2_T20RST, 23 .EQU RST_CTL2_T19RST, 22 .EQU RST_CTL2_T18RST, 21 .EQU RST_CTL2_ECC16RST, 19 .EQU RST_CTL2_ECC17RST, 18 .EQU RST_CTL2_T14RST, 16 .EQU RST_CTL2_ECC18RST, 15 .EQU RST_CTL2_DMA1RST, 14 .EQU RST_CTL2_DMA0RST, 12 .EQU RST_CTL2_EPWM16RST, 11 .EQU RST_CTL2_EPWM13RST, 10 .EQU RST_CTL2_EPWM12RST, 9 .EQU RST_CTL2_EPWM11RST, 8 .EQU RST_CTL2_WWDTRST, 5 .EQU RST_CTL2_USART15RST, 3 .EQU RST_CTL2_USART14RST, 2 .EQU RST_CTL2_USART13RST, 1 .EQU RST_CTL2_USART12RST, 0 // register------------------------------------- .EQU RST_CTL3, 0x4000150C // 0x4000 150C RST_CTL3 Bits------------------------------------- .EQU RST_CTL3_ECC15RST, 31 .EQU RST_CTL3_CANFD7RST, 30 .EQU RST_CTL3_CANFD6RST, 29 .EQU RST_CTL3_EWDTRST, 27 .EQU RST_CTL3_ECFGLRST, 26 .EQU RST_CTL3_FLEXRMRST, 25 .EQU RST_CTL3_FDC2RST, 24 .EQU RST_CTL3_FDC1RST, 23 .EQU RST_CTL3_FDC0RST, 22 .EQU RST_CTL3_FLEXMUXRST, 21 .EQU RST_CTL3_CFGLRST, 19 .EQU RST_CTL3_CAN4RST, 17 .EQU RST_CTL3_AESRST, 14 .EQU RST_CTL3_CRCRST, 13 .EQU RST_CTL3_CMURST, 12 .EQU RST_CTL3_HRCAP2RST, 10 .EQU RST_CTL3_HRCAP1RST, 9 .EQU RST_CTL3_HRCAP0RST, 8 .EQU RST_CTL3_I2C3RST, 7 .EQU RST_CTL3_HRCAP5RST, 6 .EQU RST_CTL3_HRCAP4RST, 5 .EQU RST_CTL3_HRCAP3RST, 4 .EQU RST_CTL3_SPI3RST, 2 .EQU RST_CTL3_SPI2RST, 1 // register------------------------------------- .EQU RST_CTL4, 0x40001510 // 0x4000 1510 RST_CTL4 Bits------------------------------------- .EQU RST_CTL4_ECC14RST, 31 .EQU RST_CTL4_WRLOCKRST, 30 .EQU RST_CTL4_EPWM36RST, 29 .EQU RST_CTL4_EPWM33RST, 28 .EQU RST_CTL4_EPWM32RST, 27 .EQU RST_CTL4_EPWM31RST, 26 .EQU RST_CTL4_ECC20RST, 25 .EQU RST_CTL4_ECC19RST, 24 .EQU RST_CTL4_ECC3RST, 23 .EQU RST_CTL4_ECC2RST, 22 .EQU RST_CTL4_ECC1RST, 21 .EQU RST_CTL4_ECC0RST, 20 .EQU RST_CTL4_ECC13RST, 19 .EQU RST_CTL4_ECC12RST, 18 .EQU RST_CTL4_ECC11RST, 17 .EQU RST_CTL4_ECC10RST, 16 .EQU RST_CTL4_ECC9RST, 15 .EQU RST_CTL4_ECC8RST, 14 .EQU RST_CTL4_ECC7RST, 13 .EQU RST_CTL4_ECC6RST, 12 .EQU RST_CTL4_ECC5RST, 11 .EQU RST_CTL4_ECC4RST, 10 .EQU RST_CTL4_USART11RST, 9 .EQU RST_CTL4_USART10RST, 8 .EQU RST_CTL4_USART9RST, 7 .EQU RST_CTL4_USART8RST, 6 .EQU RST_CTL4_CANFD13RST, 5 .EQU RST_CTL4_CANFD12RST, 4 .EQU RST_CTL4_CANFD11RST, 3 .EQU RST_CTL4_CANFD10RST, 2 .EQU RST_CTL4_CANFD9RST, 1 .EQU RST_CTL4_CANFD8RST, 0 // register------------------------------------- .EQU PM_CTL0, 0x40001580 // 0x4000 1580 PM_CTL0 Bits------------------------------------- .EQU PM_CTL0_IOLATCH, 31 .EQU PM_CTL0_LSIEN, 29 .EQU PM_CTL0_LSEEN, 28 .EQU PM_CTL0_LSEEXEN, 27 .EQU PM_CTL0_MRBGEN, 25 .EQU PM_CTL0_LDO18EN, 24 .EQU PM_CTL0_LPBGON, 23 .EQU PM_CTL0_BKPREGCLR, 22 .EQU PM_CTL0_IWDTCLR, 21 .EQU PM_CTL0_DPRAMASEL, 20 .EQU PM_CTL0_LPRAMSEL, 19 .EQU PM_CTL0_LP16MEN, 18 .EQU PM_CTL0_LSECONF, 17 .EQU PM_CTL0_IWDTRMSEL, 16 .EQU PM_CTL0_BKPPORDELAYSEL, 15 .EQU PM_CTL0_PORDELAYSEL, 14 .EQU PM_CTL0_PHERIIOSEL, 13 .EQU PM_CTL0_VCOREPD12SELB, 12 .EQU PM_CTL0_HSIEN, 8 .EQU PM_CTL0_BKPWR, 7 .EQU PM_CTL0_OCALLOCK, 6 .EQU PM_CTL0_LPREN, 5 .EQU PM_CTL0_MEMSEL, 3 .EQU PM_CTL0_LPMS1, 2 .EQU PM_CTL0_LPMS0, 1 // register------------------------------------- .EQU PM_CTL1, 0x40001584 // 0x4000 1584 PM_CTL1 Bits------------------------------------- .EQU PM_CTL1_BOREN, 31 .EQU PM_CTL1_P18OE, 27 .EQU PM_CTL1_MONV24EN, 19 .EQU PM_CTL1_MONV18EN, 17 .EQU PM_CTL1_MONV12EN, 16 .EQU PM_CTL1_BATBOREN, 15 .EQU PM_CTL1_BATBORSEL2, 14 .EQU PM_CTL1_BATBORSEL1, 13 .EQU PM_CTL1_BATBORSEL0, 12 .EQU PM_CTL1_LPCANCLKS, 11 .EQU PM_CTL1_RAMECCEN, 10 .EQU PM_CTL1_P18LVLSENB, 9 .EQU PM_CTL1_LPDEBUG, 8 .EQU PM_CTL1_VREFSEL1, 7 .EQU PM_CTL1_VREFSEL0, 6 .EQU PM_CTL1_VREFEN, 5 .EQU PM_CTL1_PVDS2, 4 .EQU PM_CTL1_PVDS1, 3 .EQU PM_CTL1_PVDS0, 2 .EQU PM_CTL1_LPRTYPE, 1 .EQU PM_CTL1_PVDEN, 0 // register------------------------------------- .EQU PM_STA0, 0x40001588 // 0x4000 1588 PM_STA0 Bits------------------------------------- .EQU PM_STA0_RSTFC, 31 .EQU PM_STA0_IWDTF, 30 .EQU PM_STA0_RTCALRF, 29 .EQU PM_STA0_WKPPINF, 28 .EQU PM_STA0_PORF, 27 .EQU PM_STA0_BORF, 26 .EQU PM_STA0_WSRSTF, 25 .EQU PM_STA0_POR1IF, 24 .EQU PM_STA0_NRSTIF, 23 .EQU PM_STA0_BKPPORIF, 22 .EQU PM_STA0_LPRUNF, 1 .EQU PM_STA0_LPRSTA, 0 // register------------------------------------- .EQU PM_STA1, 0x4000158C // 0x4000 158C PM_STA1 Bits------------------------------------- .EQU PM_STA1_WKP5STA, 31 .EQU PM_STA1_WKP4STA, 30 .EQU PM_STA1_WKP3STA, 29 .EQU PM_STA1_WKP2STA, 28 .EQU PM_STA1_WKP1STA, 27 .EQU PM_STA1_PMCIF, 26 .EQU PM_STA1_VBATBORSTA, 23 .EQU PM_STA1_POR18FINISH, 22 .EQU PM_STA1_PMCERROR, 19 .EQU PM_STA1_STOPERROR, 18 .EQU PM_STA1_PVDSTA, 0 // register------------------------------------- .EQU PM_STAC, 0x40001590 // 0x4000 1590 PM_STAC Bits------------------------------------- .EQU PM_STAC_WKP5SC, 31 .EQU PM_STAC_WKP4SC, 30 .EQU PM_STAC_WKP3SC, 29 .EQU PM_STAC_WKP2SC, 28 .EQU PM_STAC_WKP1SC, 27 .EQU PM_STAC_PMCIC, 26 .EQU PM_STAC_INTLF4MEN, 24 .EQU PM_STAC_FVRMS1, 1 .EQU PM_STAC_FVRMS0, 0 // register------------------------------------- .EQU PM_CTL2, 0x40001594 // 0x4000 1594 PM_CTL2 Bits------------------------------------- .EQU PM_CTL2_WKP5EN, 31 .EQU PM_CTL2_WKP4EN, 30 .EQU PM_CTL2_WKP3EN, 29 .EQU PM_CTL2_WKP2EN, 28 .EQU PM_CTL2_WKP1EN, 27 .EQU PM_CTL2_WKP5P, 26 .EQU PM_CTL2_WKP4P, 25 .EQU PM_CTL2_WKP3P, 24 .EQU PM_CTL2_WKP2P, 23 .EQU PM_CTL2_WKP1P, 22 .EQU PM_CTL2_TRADNPORSHD, 20 .EQU PM_CTL2_PMCIE, 19 .EQU PM_CTL2_QEI0LPEN, 18 .EQU PM_CTL2_GPIOALPEN, 17 .EQU PM_CTL2_QEI0CLKLPEN, 16 .EQU PM_CTL2_TTWKPEN, 15 .EQU PM_CTL2_TTPRESEN, 14 .EQU PM_CTL2_TTSEL1, 13 .EQU PM_CTL2_TTSEL0, 12 .EQU PM_CTL2_VF12EN, 11 .EQU PM_CTL2_VF12INF1, 10 .EQU PM_CTL2_VF12INF0, 9 .EQU PM_CTL2_POR18SHD, 8 .EQU PM_CTL2_USART0CLKLPEN, 7 .EQU PM_CTL2_EWDTCLKLPEN, 6 .EQU PM_CTL2_CCP0CLKLPEN, 5 .EQU PM_CTL2_CAN6CLKLPEN, 4 .EQU PM_CTL2_USART0LPEN, 3 .EQU PM_CTL2_EWDTLPEN, 2 .EQU PM_CTL2_CCP0LPEN, 1 .EQU PM_CTL2_CAN6LPEN, 0 // register------------------------------------- .EQU PM_CTL3, 0x400015AC // 0x4000 15AC PM_CTL3 Bits------------------------------------- .EQU PM_CTL3_FVRCAPLESSMODE, 5 .EQU PM_CTL3_FVRCAPLESSEN, 4 .EQU PM_CTL3_BORHSEN, 3 .EQU PM_CTL3_BORSEL1, 2 .EQU PM_CTL3_BORSEL0, 1 .EQU PM_CTL3_PMIWDTEN, 0 // register------------------------------------- .EQU DMA0_CTLR1, 0x40001600 // 0x4000 1600 DMA0_CTLR1 Bits------------------------------------- .EQU DMA0_CTLR1_NUMODT15, 31 .EQU DMA0_CTLR1_NUMODT14, 30 .EQU DMA0_CTLR1_NUMODT13, 29 .EQU DMA0_CTLR1_NUMODT12, 28 .EQU DMA0_CTLR1_NUMODT11, 27 .EQU DMA0_CTLR1_NUMODT10, 26 .EQU DMA0_CTLR1_NUMODT9, 25 .EQU DMA0_CTLR1_NUMODT8, 24 .EQU DMA0_CTLR1_NUMODT7, 23 .EQU DMA0_CTLR1_NUMODT6, 22 .EQU DMA0_CTLR1_NUMODT5, 21 .EQU DMA0_CTLR1_NUMODT4, 20 .EQU DMA0_CTLR1_NUMODT3, 19 .EQU DMA0_CTLR1_NUMODT2, 18 .EQU DMA0_CTLR1_NUMODT1, 17 .EQU DMA0_CTLR1_NUMODT0, 16 .EQU DMA0_CTLR1_M2M, 15 .EQU DMA0_CTLR1_CPL1, 14 .EQU DMA0_CTLR1_CPL0, 13 .EQU DMA0_CTLR1_ONESHOT, 12 .EQU DMA0_CTLR1_PDS1, 11 .EQU DMA0_CTLR1_PDS0, 10 .EQU DMA0_CTLR1_MDS1, 9 .EQU DMA0_CTLR1_MDS0, 8 .EQU DMA0_CTLR1_PINC, 7 .EQU DMA0_CTLR1_MINC, 6 .EQU DMA0_CTLR1_LPM, 5 .EQU DMA0_CTLR1_DDIR, 4 .EQU DMA0_CTLR1_BLKM, 3 .EQU DMA0_CTLR1_DMAHALT, 1 .EQU DMA0_CTLR1_DMAEN, 0 // register------------------------------------- .EQU DMA0_CTLR2, 0x40001604 // 0x4000 1604 DMA0_CTLR2 Bits------------------------------------- .EQU DMA0_CTLR2_NUMODT15, 31 .EQU DMA0_CTLR2_NUMODT14, 30 .EQU DMA0_CTLR2_NUMODT13, 29 .EQU DMA0_CTLR2_NUMODT12, 28 .EQU DMA0_CTLR2_NUMODT11, 27 .EQU DMA0_CTLR2_NUMODT10, 26 .EQU DMA0_CTLR2_NUMODT9, 25 .EQU DMA0_CTLR2_NUMODT8, 24 .EQU DMA0_CTLR2_NUMODT7, 23 .EQU DMA0_CTLR2_NUMODT6, 22 .EQU DMA0_CTLR2_NUMODT5, 21 .EQU DMA0_CTLR2_NUMODT4, 20 .EQU DMA0_CTLR2_NUMODT3, 19 .EQU DMA0_CTLR2_NUMODT2, 18 .EQU DMA0_CTLR2_NUMODT1, 17 .EQU DMA0_CTLR2_NUMODT0, 16 .EQU DMA0_CTLR2_M2M, 15 .EQU DMA0_CTLR2_CPL1, 14 .EQU DMA0_CTLR2_CPL0, 13 .EQU DMA0_CTLR2_ONESHOT, 12 .EQU DMA0_CTLR2_PDS1, 11 .EQU DMA0_CTLR2_PDS0, 10 .EQU DMA0_CTLR2_MDS1, 9 .EQU DMA0_CTLR2_MDS0, 8 .EQU DMA0_CTLR2_PINC, 7 .EQU DMA0_CTLR2_MINC, 6 .EQU DMA0_CTLR2_LPM, 5 .EQU DMA0_CTLR2_DDIR, 4 .EQU DMA0_CTLR2_BLKM, 3 .EQU DMA0_CTLR2_DMAHALT, 1 .EQU DMA0_CTLR2_DMAEN, 0 // register------------------------------------- .EQU DMA0_CTLR3, 0x40001608 // 0x4000 1608 DMA0_CTLR3 Bits------------------------------------- .EQU DMA0_CTLR3_NUMODT15, 31 .EQU DMA0_CTLR3_NUMODT14, 30 .EQU DMA0_CTLR3_NUMODT13, 29 .EQU DMA0_CTLR3_NUMODT12, 28 .EQU DMA0_CTLR3_NUMODT11, 27 .EQU DMA0_CTLR3_NUMODT10, 26 .EQU DMA0_CTLR3_NUMODT9, 25 .EQU DMA0_CTLR3_NUMODT8, 24 .EQU DMA0_CTLR3_NUMODT7, 23 .EQU DMA0_CTLR3_NUMODT6, 22 .EQU DMA0_CTLR3_NUMODT5, 21 .EQU DMA0_CTLR3_NUMODT4, 20 .EQU DMA0_CTLR3_NUMODT3, 19 .EQU DMA0_CTLR3_NUMODT2, 18 .EQU DMA0_CTLR3_NUMODT1, 17 .EQU DMA0_CTLR3_NUMODT0, 16 .EQU DMA0_CTLR3_M2M, 15 .EQU DMA0_CTLR3_CPL1, 14 .EQU DMA0_CTLR3_CPL0, 13 .EQU DMA0_CTLR3_ONESHOT, 12 .EQU DMA0_CTLR3_PDS1, 11 .EQU DMA0_CTLR3_PDS0, 10 .EQU DMA0_CTLR3_MDS1, 9 .EQU DMA0_CTLR3_MDS0, 8 .EQU DMA0_CTLR3_PINC, 7 .EQU DMA0_CTLR3_MINC, 6 .EQU DMA0_CTLR3_LPM, 5 .EQU DMA0_CTLR3_DDIR, 4 .EQU DMA0_CTLR3_BLKM, 3 .EQU DMA0_CTLR3_DMAHALT, 1 .EQU DMA0_CTLR3_DMAEN, 0 // register------------------------------------- .EQU DMA0_CTLR4, 0x4000160C // 0x4000 160C DMA0_CTLR4 Bits------------------------------------- .EQU DMA0_CTLR4_NUMODT15, 31 .EQU DMA0_CTLR4_NUMODT14, 30 .EQU DMA0_CTLR4_NUMODT13, 29 .EQU DMA0_CTLR4_NUMODT12, 28 .EQU DMA0_CTLR4_NUMODT11, 27 .EQU DMA0_CTLR4_NUMODT10, 26 .EQU DMA0_CTLR4_NUMODT9, 25 .EQU DMA0_CTLR4_NUMODT8, 24 .EQU DMA0_CTLR4_NUMODT7, 23 .EQU DMA0_CTLR4_NUMODT6, 22 .EQU DMA0_CTLR4_NUMODT5, 21 .EQU DMA0_CTLR4_NUMODT4, 20 .EQU DMA0_CTLR4_NUMODT3, 19 .EQU DMA0_CTLR4_NUMODT2, 18 .EQU DMA0_CTLR4_NUMODT1, 17 .EQU DMA0_CTLR4_NUMODT0, 16 .EQU DMA0_CTLR4_M2M, 15 .EQU DMA0_CTLR4_CPL1, 14 .EQU DMA0_CTLR4_CPL0, 13 .EQU DMA0_CTLR4_ONESHOT, 12 .EQU DMA0_CTLR4_PDS1, 11 .EQU DMA0_CTLR4_PDS0, 10 .EQU DMA0_CTLR4_MDS1, 9 .EQU DMA0_CTLR4_MDS0, 8 .EQU DMA0_CTLR4_PINC, 7 .EQU DMA0_CTLR4_MINC, 6 .EQU DMA0_CTLR4_LPM, 5 .EQU DMA0_CTLR4_DDIR, 4 .EQU DMA0_CTLR4_BLKM, 3 .EQU DMA0_CTLR4_DMAHALT, 1 .EQU DMA0_CTLR4_DMAEN, 0 // register------------------------------------- .EQU DMA0_CTLR5, 0x40001610 // 0x4000 1610 DMA0_CTLR5 Bits------------------------------------- .EQU DMA0_CTLR5_NUMODT15, 31 .EQU DMA0_CTLR5_NUMODT14, 30 .EQU DMA0_CTLR5_NUMODT13, 29 .EQU DMA0_CTLR5_NUMODT12, 28 .EQU DMA0_CTLR5_NUMODT11, 27 .EQU DMA0_CTLR5_NUMODT10, 26 .EQU DMA0_CTLR5_NUMODT9, 25 .EQU DMA0_CTLR5_NUMODT8, 24 .EQU DMA0_CTLR5_NUMODT7, 23 .EQU DMA0_CTLR5_NUMODT6, 22 .EQU DMA0_CTLR5_NUMODT5, 21 .EQU DMA0_CTLR5_NUMODT4, 20 .EQU DMA0_CTLR5_NUMODT3, 19 .EQU DMA0_CTLR5_NUMODT2, 18 .EQU DMA0_CTLR5_NUMODT1, 17 .EQU DMA0_CTLR5_NUMODT0, 16 .EQU DMA0_CTLR5_M2M, 15 .EQU DMA0_CTLR5_CPL1, 14 .EQU DMA0_CTLR5_CPL0, 13 .EQU DMA0_CTLR5_ONESHOT, 12 .EQU DMA0_CTLR5_PDS1, 11 .EQU DMA0_CTLR5_PDS0, 10 .EQU DMA0_CTLR5_MDS1, 9 .EQU DMA0_CTLR5_MDS0, 8 .EQU DMA0_CTLR5_PINC, 7 .EQU DMA0_CTLR5_MINC, 6 .EQU DMA0_CTLR5_LPM, 5 .EQU DMA0_CTLR5_DDIR, 4 .EQU DMA0_CTLR5_BLKM, 3 .EQU DMA0_CTLR5_DMAHALT, 1 .EQU DMA0_CTLR5_DMAEN, 0 // register------------------------------------- .EQU DMA0_CTLR6, 0x40001614 // 0x4000 1614 DMA0_CTLR6 Bits------------------------------------- .EQU DMA0_CTLR6_NUMODT15, 31 .EQU DMA0_CTLR6_NUMODT14, 30 .EQU DMA0_CTLR6_NUMODT13, 29 .EQU DMA0_CTLR6_NUMODT12, 28 .EQU DMA0_CTLR6_NUMODT11, 27 .EQU DMA0_CTLR6_NUMODT10, 26 .EQU DMA0_CTLR6_NUMODT9, 25 .EQU DMA0_CTLR6_NUMODT8, 24 .EQU DMA0_CTLR6_NUMODT7, 23 .EQU DMA0_CTLR6_NUMODT6, 22 .EQU DMA0_CTLR6_NUMODT5, 21 .EQU DMA0_CTLR6_NUMODT4, 20 .EQU DMA0_CTLR6_NUMODT3, 19 .EQU DMA0_CTLR6_NUMODT2, 18 .EQU DMA0_CTLR6_NUMODT1, 17 .EQU DMA0_CTLR6_NUMODT0, 16 .EQU DMA0_CTLR6_M2M, 15 .EQU DMA0_CTLR6_CPL1, 14 .EQU DMA0_CTLR6_CPL0, 13 .EQU DMA0_CTLR6_ONESHOT, 12 .EQU DMA0_CTLR6_PDS1, 11 .EQU DMA0_CTLR6_PDS0, 10 .EQU DMA0_CTLR6_MDS1, 9 .EQU DMA0_CTLR6_MDS0, 8 .EQU DMA0_CTLR6_PINC, 7 .EQU DMA0_CTLR6_MINC, 6 .EQU DMA0_CTLR6_LPM, 5 .EQU DMA0_CTLR6_DDIR, 4 .EQU DMA0_CTLR6_BLKM, 3 .EQU DMA0_CTLR6_DMAHALT, 1 .EQU DMA0_CTLR6_DMAEN, 0 // register------------------------------------- .EQU DMA0_CTLR7, 0x40001618 // 0x4000 1618 DMA0_CTLR7 Bits------------------------------------- .EQU DMA0_CTLR7_NUMODT15, 31 .EQU DMA0_CTLR7_NUMODT14, 30 .EQU DMA0_CTLR7_NUMODT13, 29 .EQU DMA0_CTLR7_NUMODT12, 28 .EQU DMA0_CTLR7_NUMODT11, 27 .EQU DMA0_CTLR7_NUMODT10, 26 .EQU DMA0_CTLR7_NUMODT9, 25 .EQU DMA0_CTLR7_NUMODT8, 24 .EQU DMA0_CTLR7_NUMODT7, 23 .EQU DMA0_CTLR7_NUMODT6, 22 .EQU DMA0_CTLR7_NUMODT5, 21 .EQU DMA0_CTLR7_NUMODT4, 20 .EQU DMA0_CTLR7_NUMODT3, 19 .EQU DMA0_CTLR7_NUMODT2, 18 .EQU DMA0_CTLR7_NUMODT1, 17 .EQU DMA0_CTLR7_NUMODT0, 16 .EQU DMA0_CTLR7_M2M, 15 .EQU DMA0_CTLR7_CPL1, 14 .EQU DMA0_CTLR7_CPL0, 13 .EQU DMA0_CTLR7_ONESHOT, 12 .EQU DMA0_CTLR7_PDS1, 11 .EQU DMA0_CTLR7_PDS0, 10 .EQU DMA0_CTLR7_MDS1, 9 .EQU DMA0_CTLR7_MDS0, 8 .EQU DMA0_CTLR7_PINC, 7 .EQU DMA0_CTLR7_MINC, 6 .EQU DMA0_CTLR7_LPM, 5 .EQU DMA0_CTLR7_DDIR, 4 .EQU DMA0_CTLR7_BLKM, 3 .EQU DMA0_CTLR7_DMAHALT, 1 .EQU DMA0_CTLR7_DMAEN, 0 // register------------------------------------- .EQU DMA0_PADDR1, 0x40001620 // 0x4000 1620 DMA0_PADDR1 Bits------------------------------------- .EQU DMA0_PADDR1_PADDR31, 31 .EQU DMA0_PADDR1_PADDR30, 30 .EQU DMA0_PADDR1_PADDR29, 29 .EQU DMA0_PADDR1_PADDR28, 28 .EQU DMA0_PADDR1_PADDR27, 27 .EQU DMA0_PADDR1_PADDR26, 26 .EQU DMA0_PADDR1_PADDR25, 25 .EQU DMA0_PADDR1_PADDR24, 24 .EQU DMA0_PADDR1_PADDR23, 23 .EQU DMA0_PADDR1_PADDR22, 22 .EQU DMA0_PADDR1_PADDR21, 21 .EQU DMA0_PADDR1_PADDR20, 20 .EQU DMA0_PADDR1_PADDR19, 19 .EQU DMA0_PADDR1_PADDR18, 18 .EQU DMA0_PADDR1_PADDR17, 17 .EQU DMA0_PADDR1_PADDR16, 16 .EQU DMA0_PADDR1_PADDR15, 15 .EQU DMA0_PADDR1_PADDR14, 14 .EQU DMA0_PADDR1_PADDR13, 13 .EQU DMA0_PADDR1_PADDR12, 12 .EQU DMA0_PADDR1_PADDR11, 11 .EQU DMA0_PADDR1_PADDR10, 10 .EQU DMA0_PADDR1_PADDR9, 9 .EQU DMA0_PADDR1_PADDR8, 8 .EQU DMA0_PADDR1_PADDR7, 7 .EQU DMA0_PADDR1_PADDR6, 6 .EQU DMA0_PADDR1_PADDR5, 5 .EQU DMA0_PADDR1_PADDR4, 4 .EQU DMA0_PADDR1_PADDR3, 3 .EQU DMA0_PADDR1_PADDR2, 2 .EQU DMA0_PADDR1_PADDR1, 1 .EQU DMA0_PADDR1_PADDR0, 0 // register------------------------------------- .EQU DMA0_PADDR2, 0x40001624 // 0x4000 1624 DMA0_PADDR2 Bits------------------------------------- .EQU DMA0_PADDR2_PADDR31, 31 .EQU DMA0_PADDR2_PADDR30, 30 .EQU DMA0_PADDR2_PADDR29, 29 .EQU DMA0_PADDR2_PADDR28, 28 .EQU DMA0_PADDR2_PADDR27, 27 .EQU DMA0_PADDR2_PADDR26, 26 .EQU DMA0_PADDR2_PADDR25, 25 .EQU DMA0_PADDR2_PADDR24, 24 .EQU DMA0_PADDR2_PADDR23, 23 .EQU DMA0_PADDR2_PADDR22, 22 .EQU DMA0_PADDR2_PADDR21, 21 .EQU DMA0_PADDR2_PADDR20, 20 .EQU DMA0_PADDR2_PADDR19, 19 .EQU DMA0_PADDR2_PADDR18, 18 .EQU DMA0_PADDR2_PADDR17, 17 .EQU DMA0_PADDR2_PADDR16, 16 .EQU DMA0_PADDR2_PADDR15, 15 .EQU DMA0_PADDR2_PADDR14, 14 .EQU DMA0_PADDR2_PADDR13, 13 .EQU DMA0_PADDR2_PADDR12, 12 .EQU DMA0_PADDR2_PADDR11, 11 .EQU DMA0_PADDR2_PADDR10, 10 .EQU DMA0_PADDR2_PADDR9, 9 .EQU DMA0_PADDR2_PADDR8, 8 .EQU DMA0_PADDR2_PADDR7, 7 .EQU DMA0_PADDR2_PADDR6, 6 .EQU DMA0_PADDR2_PADDR5, 5 .EQU DMA0_PADDR2_PADDR4, 4 .EQU DMA0_PADDR2_PADDR3, 3 .EQU DMA0_PADDR2_PADDR2, 2 .EQU DMA0_PADDR2_PADDR1, 1 .EQU DMA0_PADDR2_PADDR0, 0 // register------------------------------------- .EQU DMA0_PADDR3, 0x40001628 // 0x4000 1628 DMA0_PADDR3 Bits------------------------------------- .EQU DMA0_PADDR3_PADDR31, 31 .EQU DMA0_PADDR3_PADDR30, 30 .EQU DMA0_PADDR3_PADDR29, 29 .EQU DMA0_PADDR3_PADDR28, 28 .EQU DMA0_PADDR3_PADDR27, 27 .EQU DMA0_PADDR3_PADDR26, 26 .EQU DMA0_PADDR3_PADDR25, 25 .EQU DMA0_PADDR3_PADDR24, 24 .EQU DMA0_PADDR3_PADDR23, 23 .EQU DMA0_PADDR3_PADDR22, 22 .EQU DMA0_PADDR3_PADDR21, 21 .EQU DMA0_PADDR3_PADDR20, 20 .EQU DMA0_PADDR3_PADDR19, 19 .EQU DMA0_PADDR3_PADDR18, 18 .EQU DMA0_PADDR3_PADDR17, 17 .EQU DMA0_PADDR3_PADDR16, 16 .EQU DMA0_PADDR3_PADDR15, 15 .EQU DMA0_PADDR3_PADDR14, 14 .EQU DMA0_PADDR3_PADDR13, 13 .EQU DMA0_PADDR3_PADDR12, 12 .EQU DMA0_PADDR3_PADDR11, 11 .EQU DMA0_PADDR3_PADDR10, 10 .EQU DMA0_PADDR3_PADDR9, 9 .EQU DMA0_PADDR3_PADDR8, 8 .EQU DMA0_PADDR3_PADDR7, 7 .EQU DMA0_PADDR3_PADDR6, 6 .EQU DMA0_PADDR3_PADDR5, 5 .EQU DMA0_PADDR3_PADDR4, 4 .EQU DMA0_PADDR3_PADDR3, 3 .EQU DMA0_PADDR3_PADDR2, 2 .EQU DMA0_PADDR3_PADDR1, 1 .EQU DMA0_PADDR3_PADDR0, 0 // register------------------------------------- .EQU DMA0_PADDR4, 0x4000162C // 0x4000 162C DMA0_PADDR4 Bits------------------------------------- .EQU DMA0_PADDR4_PADDR31, 31 .EQU DMA0_PADDR4_PADDR30, 30 .EQU DMA0_PADDR4_PADDR29, 29 .EQU DMA0_PADDR4_PADDR28, 28 .EQU DMA0_PADDR4_PADDR27, 27 .EQU DMA0_PADDR4_PADDR26, 26 .EQU DMA0_PADDR4_PADDR25, 25 .EQU DMA0_PADDR4_PADDR24, 24 .EQU DMA0_PADDR4_PADDR23, 23 .EQU DMA0_PADDR4_PADDR22, 22 .EQU DMA0_PADDR4_PADDR21, 21 .EQU DMA0_PADDR4_PADDR20, 20 .EQU DMA0_PADDR4_PADDR19, 19 .EQU DMA0_PADDR4_PADDR18, 18 .EQU DMA0_PADDR4_PADDR17, 17 .EQU DMA0_PADDR4_PADDR16, 16 .EQU DMA0_PADDR4_PADDR15, 15 .EQU DMA0_PADDR4_PADDR14, 14 .EQU DMA0_PADDR4_PADDR13, 13 .EQU DMA0_PADDR4_PADDR12, 12 .EQU DMA0_PADDR4_PADDR11, 11 .EQU DMA0_PADDR4_PADDR10, 10 .EQU DMA0_PADDR4_PADDR9, 9 .EQU DMA0_PADDR4_PADDR8, 8 .EQU DMA0_PADDR4_PADDR7, 7 .EQU DMA0_PADDR4_PADDR6, 6 .EQU DMA0_PADDR4_PADDR5, 5 .EQU DMA0_PADDR4_PADDR4, 4 .EQU DMA0_PADDR4_PADDR3, 3 .EQU DMA0_PADDR4_PADDR2, 2 .EQU DMA0_PADDR4_PADDR1, 1 .EQU DMA0_PADDR4_PADDR0, 0 // register------------------------------------- .EQU DMA0_PADDR5, 0x40001630 // 0x4000 1630 DMA0_PADDR5 Bits------------------------------------- .EQU DMA0_PADDR5_PADDR31, 31 .EQU DMA0_PADDR5_PADDR30, 30 .EQU DMA0_PADDR5_PADDR29, 29 .EQU DMA0_PADDR5_PADDR28, 28 .EQU DMA0_PADDR5_PADDR27, 27 .EQU DMA0_PADDR5_PADDR26, 26 .EQU DMA0_PADDR5_PADDR25, 25 .EQU DMA0_PADDR5_PADDR24, 24 .EQU DMA0_PADDR5_PADDR23, 23 .EQU DMA0_PADDR5_PADDR22, 22 .EQU DMA0_PADDR5_PADDR21, 21 .EQU DMA0_PADDR5_PADDR20, 20 .EQU DMA0_PADDR5_PADDR19, 19 .EQU DMA0_PADDR5_PADDR18, 18 .EQU DMA0_PADDR5_PADDR17, 17 .EQU DMA0_PADDR5_PADDR16, 16 .EQU DMA0_PADDR5_PADDR15, 15 .EQU DMA0_PADDR5_PADDR14, 14 .EQU DMA0_PADDR5_PADDR13, 13 .EQU DMA0_PADDR5_PADDR12, 12 .EQU DMA0_PADDR5_PADDR11, 11 .EQU DMA0_PADDR5_PADDR10, 10 .EQU DMA0_PADDR5_PADDR9, 9 .EQU DMA0_PADDR5_PADDR8, 8 .EQU DMA0_PADDR5_PADDR7, 7 .EQU DMA0_PADDR5_PADDR6, 6 .EQU DMA0_PADDR5_PADDR5, 5 .EQU DMA0_PADDR5_PADDR4, 4 .EQU DMA0_PADDR5_PADDR3, 3 .EQU DMA0_PADDR5_PADDR2, 2 .EQU DMA0_PADDR5_PADDR1, 1 .EQU DMA0_PADDR5_PADDR0, 0 // register------------------------------------- .EQU DMA0_PADDR6, 0x40001634 // 0x4000 1634 DMA0_PADDR6 Bits------------------------------------- .EQU DMA0_PADDR6_PADDR31, 31 .EQU DMA0_PADDR6_PADDR30, 30 .EQU DMA0_PADDR6_PADDR29, 29 .EQU DMA0_PADDR6_PADDR28, 28 .EQU DMA0_PADDR6_PADDR27, 27 .EQU DMA0_PADDR6_PADDR26, 26 .EQU DMA0_PADDR6_PADDR25, 25 .EQU DMA0_PADDR6_PADDR24, 24 .EQU DMA0_PADDR6_PADDR23, 23 .EQU DMA0_PADDR6_PADDR22, 22 .EQU DMA0_PADDR6_PADDR21, 21 .EQU DMA0_PADDR6_PADDR20, 20 .EQU DMA0_PADDR6_PADDR19, 19 .EQU DMA0_PADDR6_PADDR18, 18 .EQU DMA0_PADDR6_PADDR17, 17 .EQU DMA0_PADDR6_PADDR16, 16 .EQU DMA0_PADDR6_PADDR15, 15 .EQU DMA0_PADDR6_PADDR14, 14 .EQU DMA0_PADDR6_PADDR13, 13 .EQU DMA0_PADDR6_PADDR12, 12 .EQU DMA0_PADDR6_PADDR11, 11 .EQU DMA0_PADDR6_PADDR10, 10 .EQU DMA0_PADDR6_PADDR9, 9 .EQU DMA0_PADDR6_PADDR8, 8 .EQU DMA0_PADDR6_PADDR7, 7 .EQU DMA0_PADDR6_PADDR6, 6 .EQU DMA0_PADDR6_PADDR5, 5 .EQU DMA0_PADDR6_PADDR4, 4 .EQU DMA0_PADDR6_PADDR3, 3 .EQU DMA0_PADDR6_PADDR2, 2 .EQU DMA0_PADDR6_PADDR1, 1 .EQU DMA0_PADDR6_PADDR0, 0 // register------------------------------------- .EQU DMA0_PADDR7, 0x40001638 // 0x4000 1638 DMA0_PADDR7 Bits------------------------------------- .EQU DMA0_PADDR7_PADDR31, 31 .EQU DMA0_PADDR7_PADDR30, 30 .EQU DMA0_PADDR7_PADDR29, 29 .EQU DMA0_PADDR7_PADDR28, 28 .EQU DMA0_PADDR7_PADDR27, 27 .EQU DMA0_PADDR7_PADDR26, 26 .EQU DMA0_PADDR7_PADDR25, 25 .EQU DMA0_PADDR7_PADDR24, 24 .EQU DMA0_PADDR7_PADDR23, 23 .EQU DMA0_PADDR7_PADDR22, 22 .EQU DMA0_PADDR7_PADDR21, 21 .EQU DMA0_PADDR7_PADDR20, 20 .EQU DMA0_PADDR7_PADDR19, 19 .EQU DMA0_PADDR7_PADDR18, 18 .EQU DMA0_PADDR7_PADDR17, 17 .EQU DMA0_PADDR7_PADDR16, 16 .EQU DMA0_PADDR7_PADDR15, 15 .EQU DMA0_PADDR7_PADDR14, 14 .EQU DMA0_PADDR7_PADDR13, 13 .EQU DMA0_PADDR7_PADDR12, 12 .EQU DMA0_PADDR7_PADDR11, 11 .EQU DMA0_PADDR7_PADDR10, 10 .EQU DMA0_PADDR7_PADDR9, 9 .EQU DMA0_PADDR7_PADDR8, 8 .EQU DMA0_PADDR7_PADDR7, 7 .EQU DMA0_PADDR7_PADDR6, 6 .EQU DMA0_PADDR7_PADDR5, 5 .EQU DMA0_PADDR7_PADDR4, 4 .EQU DMA0_PADDR7_PADDR3, 3 .EQU DMA0_PADDR7_PADDR2, 2 .EQU DMA0_PADDR7_PADDR1, 1 .EQU DMA0_PADDR7_PADDR0, 0 // register------------------------------------- .EQU DMA0_MADDR1, 0x40001640 // 0x4000 1640 DMA0_MADDR1 Bits------------------------------------- .EQU DMA0_MADDR1_MADDR31, 31 .EQU DMA0_MADDR1_MADDR30, 30 .EQU DMA0_MADDR1_MADDR29, 29 .EQU DMA0_MADDR1_MADDR28, 28 .EQU DMA0_MADDR1_MADDR27, 27 .EQU DMA0_MADDR1_MADDR26, 26 .EQU DMA0_MADDR1_MADDR25, 25 .EQU DMA0_MADDR1_MADDR24, 24 .EQU DMA0_MADDR1_MADDR23, 23 .EQU DMA0_MADDR1_MADDR22, 22 .EQU DMA0_MADDR1_MADDR21, 21 .EQU DMA0_MADDR1_MADDR20, 20 .EQU DMA0_MADDR1_MADDR19, 19 .EQU DMA0_MADDR1_MADDR18, 18 .EQU DMA0_MADDR1_MADDR17, 17 .EQU DMA0_MADDR1_MADDR16, 16 .EQU DMA0_MADDR1_MADDR15, 15 .EQU DMA0_MADDR1_MADDR14, 14 .EQU DMA0_MADDR1_MADDR13, 13 .EQU DMA0_MADDR1_MADDR12, 12 .EQU DMA0_MADDR1_MADDR11, 11 .EQU DMA0_MADDR1_MADDR10, 10 .EQU DMA0_MADDR1_MADDR9, 9 .EQU DMA0_MADDR1_MADDR8, 8 .EQU DMA0_MADDR1_MADDR7, 7 .EQU DMA0_MADDR1_MADDR6, 6 .EQU DMA0_MADDR1_MADDR5, 5 .EQU DMA0_MADDR1_MADDR4, 4 .EQU DMA0_MADDR1_MADDR3, 3 .EQU DMA0_MADDR1_MADDR2, 2 .EQU DMA0_MADDR1_MADDR1, 1 .EQU DMA0_MADDR1_MADDR0, 0 // register------------------------------------- .EQU DMA0_MADDR2, 0x40001644 // 0x4000 1644 DMA0_MADDR2 Bits------------------------------------- .EQU DMA0_MADDR2_MADDR31, 31 .EQU DMA0_MADDR2_MADDR30, 30 .EQU DMA0_MADDR2_MADDR29, 29 .EQU DMA0_MADDR2_MADDR28, 28 .EQU DMA0_MADDR2_MADDR27, 27 .EQU DMA0_MADDR2_MADDR26, 26 .EQU DMA0_MADDR2_MADDR25, 25 .EQU DMA0_MADDR2_MADDR24, 24 .EQU DMA0_MADDR2_MADDR23, 23 .EQU DMA0_MADDR2_MADDR22, 22 .EQU DMA0_MADDR2_MADDR21, 21 .EQU DMA0_MADDR2_MADDR20, 20 .EQU DMA0_MADDR2_MADDR19, 19 .EQU DMA0_MADDR2_MADDR18, 18 .EQU DMA0_MADDR2_MADDR17, 17 .EQU DMA0_MADDR2_MADDR16, 16 .EQU DMA0_MADDR2_MADDR15, 15 .EQU DMA0_MADDR2_MADDR14, 14 .EQU DMA0_MADDR2_MADDR13, 13 .EQU DMA0_MADDR2_MADDR12, 12 .EQU DMA0_MADDR2_MADDR11, 11 .EQU DMA0_MADDR2_MADDR10, 10 .EQU DMA0_MADDR2_MADDR9, 9 .EQU DMA0_MADDR2_MADDR8, 8 .EQU DMA0_MADDR2_MADDR7, 7 .EQU DMA0_MADDR2_MADDR6, 6 .EQU DMA0_MADDR2_MADDR5, 5 .EQU DMA0_MADDR2_MADDR4, 4 .EQU DMA0_MADDR2_MADDR3, 3 .EQU DMA0_MADDR2_MADDR2, 2 .EQU DMA0_MADDR2_MADDR1, 1 .EQU DMA0_MADDR2_MADDR0, 0 // register------------------------------------- .EQU DMA0_MADDR3, 0x40001648 // 0x4000 1648 DMA0_MADDR3 Bits------------------------------------- .EQU DMA0_MADDR3_MADDR31, 31 .EQU DMA0_MADDR3_MADDR30, 30 .EQU DMA0_MADDR3_MADDR29, 29 .EQU DMA0_MADDR3_MADDR28, 28 .EQU DMA0_MADDR3_MADDR27, 27 .EQU DMA0_MADDR3_MADDR26, 26 .EQU DMA0_MADDR3_MADDR25, 25 .EQU DMA0_MADDR3_MADDR24, 24 .EQU DMA0_MADDR3_MADDR23, 23 .EQU DMA0_MADDR3_MADDR22, 22 .EQU DMA0_MADDR3_MADDR21, 21 .EQU DMA0_MADDR3_MADDR20, 20 .EQU DMA0_MADDR3_MADDR19, 19 .EQU DMA0_MADDR3_MADDR18, 18 .EQU DMA0_MADDR3_MADDR17, 17 .EQU DMA0_MADDR3_MADDR16, 16 .EQU DMA0_MADDR3_MADDR15, 15 .EQU DMA0_MADDR3_MADDR14, 14 .EQU DMA0_MADDR3_MADDR13, 13 .EQU DMA0_MADDR3_MADDR12, 12 .EQU DMA0_MADDR3_MADDR11, 11 .EQU DMA0_MADDR3_MADDR10, 10 .EQU DMA0_MADDR3_MADDR9, 9 .EQU DMA0_MADDR3_MADDR8, 8 .EQU DMA0_MADDR3_MADDR7, 7 .EQU DMA0_MADDR3_MADDR6, 6 .EQU DMA0_MADDR3_MADDR5, 5 .EQU DMA0_MADDR3_MADDR4, 4 .EQU DMA0_MADDR3_MADDR3, 3 .EQU DMA0_MADDR3_MADDR2, 2 .EQU DMA0_MADDR3_MADDR1, 1 .EQU DMA0_MADDR3_MADDR0, 0 // register------------------------------------- .EQU DMA0_MADDR4, 0x4000164C // 0x4000 164C DMA0_MADDR4 Bits------------------------------------- .EQU DMA0_MADDR4_MADDR31, 31 .EQU DMA0_MADDR4_MADDR30, 30 .EQU DMA0_MADDR4_MADDR29, 29 .EQU DMA0_MADDR4_MADDR28, 28 .EQU DMA0_MADDR4_MADDR27, 27 .EQU DMA0_MADDR4_MADDR26, 26 .EQU DMA0_MADDR4_MADDR25, 25 .EQU DMA0_MADDR4_MADDR24, 24 .EQU DMA0_MADDR4_MADDR23, 23 .EQU DMA0_MADDR4_MADDR22, 22 .EQU DMA0_MADDR4_MADDR21, 21 .EQU DMA0_MADDR4_MADDR20, 20 .EQU DMA0_MADDR4_MADDR19, 19 .EQU DMA0_MADDR4_MADDR18, 18 .EQU DMA0_MADDR4_MADDR17, 17 .EQU DMA0_MADDR4_MADDR16, 16 .EQU DMA0_MADDR4_MADDR15, 15 .EQU DMA0_MADDR4_MADDR14, 14 .EQU DMA0_MADDR4_MADDR13, 13 .EQU DMA0_MADDR4_MADDR12, 12 .EQU DMA0_MADDR4_MADDR11, 11 .EQU DMA0_MADDR4_MADDR10, 10 .EQU DMA0_MADDR4_MADDR9, 9 .EQU DMA0_MADDR4_MADDR8, 8 .EQU DMA0_MADDR4_MADDR7, 7 .EQU DMA0_MADDR4_MADDR6, 6 .EQU DMA0_MADDR4_MADDR5, 5 .EQU DMA0_MADDR4_MADDR4, 4 .EQU DMA0_MADDR4_MADDR3, 3 .EQU DMA0_MADDR4_MADDR2, 2 .EQU DMA0_MADDR4_MADDR1, 1 .EQU DMA0_MADDR4_MADDR0, 0 // register------------------------------------- .EQU DMA0_MADDR5, 0x40001650 // 0x4000 1650 DMA0_MADDR5 Bits------------------------------------- .EQU DMA0_MADDR5_MADDR31, 31 .EQU DMA0_MADDR5_MADDR30, 30 .EQU DMA0_MADDR5_MADDR29, 29 .EQU DMA0_MADDR5_MADDR28, 28 .EQU DMA0_MADDR5_MADDR27, 27 .EQU DMA0_MADDR5_MADDR26, 26 .EQU DMA0_MADDR5_MADDR25, 25 .EQU DMA0_MADDR5_MADDR24, 24 .EQU DMA0_MADDR5_MADDR23, 23 .EQU DMA0_MADDR5_MADDR22, 22 .EQU DMA0_MADDR5_MADDR21, 21 .EQU DMA0_MADDR5_MADDR20, 20 .EQU DMA0_MADDR5_MADDR19, 19 .EQU DMA0_MADDR5_MADDR18, 18 .EQU DMA0_MADDR5_MADDR17, 17 .EQU DMA0_MADDR5_MADDR16, 16 .EQU DMA0_MADDR5_MADDR15, 15 .EQU DMA0_MADDR5_MADDR14, 14 .EQU DMA0_MADDR5_MADDR13, 13 .EQU DMA0_MADDR5_MADDR12, 12 .EQU DMA0_MADDR5_MADDR11, 11 .EQU DMA0_MADDR5_MADDR10, 10 .EQU DMA0_MADDR5_MADDR9, 9 .EQU DMA0_MADDR5_MADDR8, 8 .EQU DMA0_MADDR5_MADDR7, 7 .EQU DMA0_MADDR5_MADDR6, 6 .EQU DMA0_MADDR5_MADDR5, 5 .EQU DMA0_MADDR5_MADDR4, 4 .EQU DMA0_MADDR5_MADDR3, 3 .EQU DMA0_MADDR5_MADDR2, 2 .EQU DMA0_MADDR5_MADDR1, 1 .EQU DMA0_MADDR5_MADDR0, 0 // register------------------------------------- .EQU DMA0_MADDR6, 0x40001654 // 0x4000 1654 DMA0_MADDR6 Bits------------------------------------- .EQU DMA0_MADDR6_MADDR31, 31 .EQU DMA0_MADDR6_MADDR30, 30 .EQU DMA0_MADDR6_MADDR29, 29 .EQU DMA0_MADDR6_MADDR28, 28 .EQU DMA0_MADDR6_MADDR27, 27 .EQU DMA0_MADDR6_MADDR26, 26 .EQU DMA0_MADDR6_MADDR25, 25 .EQU DMA0_MADDR6_MADDR24, 24 .EQU DMA0_MADDR6_MADDR23, 23 .EQU DMA0_MADDR6_MADDR22, 22 .EQU DMA0_MADDR6_MADDR21, 21 .EQU DMA0_MADDR6_MADDR20, 20 .EQU DMA0_MADDR6_MADDR19, 19 .EQU DMA0_MADDR6_MADDR18, 18 .EQU DMA0_MADDR6_MADDR17, 17 .EQU DMA0_MADDR6_MADDR16, 16 .EQU DMA0_MADDR6_MADDR15, 15 .EQU DMA0_MADDR6_MADDR14, 14 .EQU DMA0_MADDR6_MADDR13, 13 .EQU DMA0_MADDR6_MADDR12, 12 .EQU DMA0_MADDR6_MADDR11, 11 .EQU DMA0_MADDR6_MADDR10, 10 .EQU DMA0_MADDR6_MADDR9, 9 .EQU DMA0_MADDR6_MADDR8, 8 .EQU DMA0_MADDR6_MADDR7, 7 .EQU DMA0_MADDR6_MADDR6, 6 .EQU DMA0_MADDR6_MADDR5, 5 .EQU DMA0_MADDR6_MADDR4, 4 .EQU DMA0_MADDR6_MADDR3, 3 .EQU DMA0_MADDR6_MADDR2, 2 .EQU DMA0_MADDR6_MADDR1, 1 .EQU DMA0_MADDR6_MADDR0, 0 // register------------------------------------- .EQU DMA0_MADDR7, 0x40001658 // 0x4000 1658 DMA0_MADDR7 Bits------------------------------------- .EQU DMA0_MADDR7_MADDR31, 31 .EQU DMA0_MADDR7_MADDR30, 30 .EQU DMA0_MADDR7_MADDR29, 29 .EQU DMA0_MADDR7_MADDR28, 28 .EQU DMA0_MADDR7_MADDR27, 27 .EQU DMA0_MADDR7_MADDR26, 26 .EQU DMA0_MADDR7_MADDR25, 25 .EQU DMA0_MADDR7_MADDR24, 24 .EQU DMA0_MADDR7_MADDR23, 23 .EQU DMA0_MADDR7_MADDR22, 22 .EQU DMA0_MADDR7_MADDR21, 21 .EQU DMA0_MADDR7_MADDR20, 20 .EQU DMA0_MADDR7_MADDR19, 19 .EQU DMA0_MADDR7_MADDR18, 18 .EQU DMA0_MADDR7_MADDR17, 17 .EQU DMA0_MADDR7_MADDR16, 16 .EQU DMA0_MADDR7_MADDR15, 15 .EQU DMA0_MADDR7_MADDR14, 14 .EQU DMA0_MADDR7_MADDR13, 13 .EQU DMA0_MADDR7_MADDR12, 12 .EQU DMA0_MADDR7_MADDR11, 11 .EQU DMA0_MADDR7_MADDR10, 10 .EQU DMA0_MADDR7_MADDR9, 9 .EQU DMA0_MADDR7_MADDR8, 8 .EQU DMA0_MADDR7_MADDR7, 7 .EQU DMA0_MADDR7_MADDR6, 6 .EQU DMA0_MADDR7_MADDR5, 5 .EQU DMA0_MADDR7_MADDR4, 4 .EQU DMA0_MADDR7_MADDR3, 3 .EQU DMA0_MADDR7_MADDR2, 2 .EQU DMA0_MADDR7_MADDR1, 1 .EQU DMA0_MADDR7_MADDR0, 0 // register------------------------------------- .EQU DMA0_CPAR1, 0x40001660 // 0x4000 1660 DMA0_CPAR1 Bits------------------------------------- .EQU DMA0_CPAR1_CPAR31, 31 .EQU DMA0_CPAR1_CPAR30, 30 .EQU DMA0_CPAR1_CPAR29, 29 .EQU DMA0_CPAR1_CPAR28, 28 .EQU DMA0_CPAR1_CPAR27, 27 .EQU DMA0_CPAR1_CPAR26, 26 .EQU DMA0_CPAR1_CPAR25, 25 .EQU DMA0_CPAR1_CPAR24, 24 .EQU DMA0_CPAR1_CPAR23, 23 .EQU DMA0_CPAR1_CPAR22, 22 .EQU DMA0_CPAR1_CPAR21, 21 .EQU DMA0_CPAR1_CPAR20, 20 .EQU DMA0_CPAR1_CPAR19, 19 .EQU DMA0_CPAR1_CPAR18, 18 .EQU DMA0_CPAR1_CPAR17, 17 .EQU DMA0_CPAR1_CPAR16, 16 .EQU DMA0_CPAR1_CPAR15, 15 .EQU DMA0_CPAR1_CPAR14, 14 .EQU DMA0_CPAR1_CPAR13, 13 .EQU DMA0_CPAR1_CPAR12, 12 .EQU DMA0_CPAR1_CPAR11, 11 .EQU DMA0_CPAR1_CPAR10, 10 .EQU DMA0_CPAR1_CPAR9, 9 .EQU DMA0_CPAR1_CPAR8, 8 .EQU DMA0_CPAR1_CPAR7, 7 .EQU DMA0_CPAR1_CPAR6, 6 .EQU DMA0_CPAR1_CPAR5, 5 .EQU DMA0_CPAR1_CPAR4, 4 .EQU DMA0_CPAR1_CPAR3, 3 .EQU DMA0_CPAR1_CPAR2, 2 .EQU DMA0_CPAR1_CPAR1, 1 .EQU DMA0_CPAR1_CPAR0, 0 // register------------------------------------- .EQU DMA0_CPAR2, 0x40001664 // 0x4000 1664 DMA0_CPAR2 Bits------------------------------------- .EQU DMA0_CPAR2_CPAR31, 31 .EQU DMA0_CPAR2_CPAR30, 30 .EQU DMA0_CPAR2_CPAR29, 29 .EQU DMA0_CPAR2_CPAR28, 28 .EQU DMA0_CPAR2_CPAR27, 27 .EQU DMA0_CPAR2_CPAR26, 26 .EQU DMA0_CPAR2_CPAR25, 25 .EQU DMA0_CPAR2_CPAR24, 24 .EQU DMA0_CPAR2_CPAR23, 23 .EQU DMA0_CPAR2_CPAR22, 22 .EQU DMA0_CPAR2_CPAR21, 21 .EQU DMA0_CPAR2_CPAR20, 20 .EQU DMA0_CPAR2_CPAR19, 19 .EQU DMA0_CPAR2_CPAR18, 18 .EQU DMA0_CPAR2_CPAR17, 17 .EQU DMA0_CPAR2_CPAR16, 16 .EQU DMA0_CPAR2_CPAR15, 15 .EQU DMA0_CPAR2_CPAR14, 14 .EQU DMA0_CPAR2_CPAR13, 13 .EQU DMA0_CPAR2_CPAR12, 12 .EQU DMA0_CPAR2_CPAR11, 11 .EQU DMA0_CPAR2_CPAR10, 10 .EQU DMA0_CPAR2_CPAR9, 9 .EQU DMA0_CPAR2_CPAR8, 8 .EQU DMA0_CPAR2_CPAR7, 7 .EQU DMA0_CPAR2_CPAR6, 6 .EQU DMA0_CPAR2_CPAR5, 5 .EQU DMA0_CPAR2_CPAR4, 4 .EQU DMA0_CPAR2_CPAR3, 3 .EQU DMA0_CPAR2_CPAR2, 2 .EQU DMA0_CPAR2_CPAR1, 1 .EQU DMA0_CPAR2_CPAR0, 0 // register------------------------------------- .EQU DMA0_CPAR3, 0x40001668 // 0x4000 1668 DMA0_CPAR3 Bits------------------------------------- .EQU DMA0_CPAR3_CPAR31, 31 .EQU DMA0_CPAR3_CPAR30, 30 .EQU DMA0_CPAR3_CPAR29, 29 .EQU DMA0_CPAR3_CPAR28, 28 .EQU DMA0_CPAR3_CPAR27, 27 .EQU DMA0_CPAR3_CPAR26, 26 .EQU DMA0_CPAR3_CPAR25, 25 .EQU DMA0_CPAR3_CPAR24, 24 .EQU DMA0_CPAR3_CPAR23, 23 .EQU DMA0_CPAR3_CPAR22, 22 .EQU DMA0_CPAR3_CPAR21, 21 .EQU DMA0_CPAR3_CPAR20, 20 .EQU DMA0_CPAR3_CPAR19, 19 .EQU DMA0_CPAR3_CPAR18, 18 .EQU DMA0_CPAR3_CPAR17, 17 .EQU DMA0_CPAR3_CPAR16, 16 .EQU DMA0_CPAR3_CPAR15, 15 .EQU DMA0_CPAR3_CPAR14, 14 .EQU DMA0_CPAR3_CPAR13, 13 .EQU DMA0_CPAR3_CPAR12, 12 .EQU DMA0_CPAR3_CPAR11, 11 .EQU DMA0_CPAR3_CPAR10, 10 .EQU DMA0_CPAR3_CPAR9, 9 .EQU DMA0_CPAR3_CPAR8, 8 .EQU DMA0_CPAR3_CPAR7, 7 .EQU DMA0_CPAR3_CPAR6, 6 .EQU DMA0_CPAR3_CPAR5, 5 .EQU DMA0_CPAR3_CPAR4, 4 .EQU DMA0_CPAR3_CPAR3, 3 .EQU DMA0_CPAR3_CPAR2, 2 .EQU DMA0_CPAR3_CPAR1, 1 .EQU DMA0_CPAR3_CPAR0, 0 // register------------------------------------- .EQU DMA0_CPAR4, 0x4000166C // 0x4000 166C DMA0_CPAR4 Bits------------------------------------- .EQU DMA0_CPAR4_CPAR31, 31 .EQU DMA0_CPAR4_CPAR30, 30 .EQU DMA0_CPAR4_CPAR29, 29 .EQU DMA0_CPAR4_CPAR28, 28 .EQU DMA0_CPAR4_CPAR27, 27 .EQU DMA0_CPAR4_CPAR26, 26 .EQU DMA0_CPAR4_CPAR25, 25 .EQU DMA0_CPAR4_CPAR24, 24 .EQU DMA0_CPAR4_CPAR23, 23 .EQU DMA0_CPAR4_CPAR22, 22 .EQU DMA0_CPAR4_CPAR21, 21 .EQU DMA0_CPAR4_CPAR20, 20 .EQU DMA0_CPAR4_CPAR19, 19 .EQU DMA0_CPAR4_CPAR18, 18 .EQU DMA0_CPAR4_CPAR17, 17 .EQU DMA0_CPAR4_CPAR16, 16 .EQU DMA0_CPAR4_CPAR15, 15 .EQU DMA0_CPAR4_CPAR14, 14 .EQU DMA0_CPAR4_CPAR13, 13 .EQU DMA0_CPAR4_CPAR12, 12 .EQU DMA0_CPAR4_CPAR11, 11 .EQU DMA0_CPAR4_CPAR10, 10 .EQU DMA0_CPAR4_CPAR9, 9 .EQU DMA0_CPAR4_CPAR8, 8 .EQU DMA0_CPAR4_CPAR7, 7 .EQU DMA0_CPAR4_CPAR6, 6 .EQU DMA0_CPAR4_CPAR5, 5 .EQU DMA0_CPAR4_CPAR4, 4 .EQU DMA0_CPAR4_CPAR3, 3 .EQU DMA0_CPAR4_CPAR2, 2 .EQU DMA0_CPAR4_CPAR1, 1 .EQU DMA0_CPAR4_CPAR0, 0 // register------------------------------------- .EQU DMA0_CPAR5, 0x40001670 // 0x4000 1670 DMA0_CPAR5 Bits------------------------------------- .EQU DMA0_CPAR5_CPAR31, 31 .EQU DMA0_CPAR5_CPAR30, 30 .EQU DMA0_CPAR5_CPAR29, 29 .EQU DMA0_CPAR5_CPAR28, 28 .EQU DMA0_CPAR5_CPAR27, 27 .EQU DMA0_CPAR5_CPAR26, 26 .EQU DMA0_CPAR5_CPAR25, 25 .EQU DMA0_CPAR5_CPAR24, 24 .EQU DMA0_CPAR5_CPAR23, 23 .EQU DMA0_CPAR5_CPAR22, 22 .EQU DMA0_CPAR5_CPAR21, 21 .EQU DMA0_CPAR5_CPAR20, 20 .EQU DMA0_CPAR5_CPAR19, 19 .EQU DMA0_CPAR5_CPAR18, 18 .EQU DMA0_CPAR5_CPAR17, 17 .EQU DMA0_CPAR5_CPAR16, 16 .EQU DMA0_CPAR5_CPAR15, 15 .EQU DMA0_CPAR5_CPAR14, 14 .EQU DMA0_CPAR5_CPAR13, 13 .EQU DMA0_CPAR5_CPAR12, 12 .EQU DMA0_CPAR5_CPAR11, 11 .EQU DMA0_CPAR5_CPAR10, 10 .EQU DMA0_CPAR5_CPAR9, 9 .EQU DMA0_CPAR5_CPAR8, 8 .EQU DMA0_CPAR5_CPAR7, 7 .EQU DMA0_CPAR5_CPAR6, 6 .EQU DMA0_CPAR5_CPAR5, 5 .EQU DMA0_CPAR5_CPAR4, 4 .EQU DMA0_CPAR5_CPAR3, 3 .EQU DMA0_CPAR5_CPAR2, 2 .EQU DMA0_CPAR5_CPAR1, 1 .EQU DMA0_CPAR5_CPAR0, 0 // register------------------------------------- .EQU DMA0_CPAR6, 0x40001674 // 0x4000 1674 DMA0_CPAR6 Bits------------------------------------- .EQU DMA0_CPAR6_CPAR31, 31 .EQU DMA0_CPAR6_CPAR30, 30 .EQU DMA0_CPAR6_CPAR29, 29 .EQU DMA0_CPAR6_CPAR28, 28 .EQU DMA0_CPAR6_CPAR27, 27 .EQU DMA0_CPAR6_CPAR26, 26 .EQU DMA0_CPAR6_CPAR25, 25 .EQU DMA0_CPAR6_CPAR24, 24 .EQU DMA0_CPAR6_CPAR23, 23 .EQU DMA0_CPAR6_CPAR22, 22 .EQU DMA0_CPAR6_CPAR21, 21 .EQU DMA0_CPAR6_CPAR20, 20 .EQU DMA0_CPAR6_CPAR19, 19 .EQU DMA0_CPAR6_CPAR18, 18 .EQU DMA0_CPAR6_CPAR17, 17 .EQU DMA0_CPAR6_CPAR16, 16 .EQU DMA0_CPAR6_CPAR15, 15 .EQU DMA0_CPAR6_CPAR14, 14 .EQU DMA0_CPAR6_CPAR13, 13 .EQU DMA0_CPAR6_CPAR12, 12 .EQU DMA0_CPAR6_CPAR11, 11 .EQU DMA0_CPAR6_CPAR10, 10 .EQU DMA0_CPAR6_CPAR9, 9 .EQU DMA0_CPAR6_CPAR8, 8 .EQU DMA0_CPAR6_CPAR7, 7 .EQU DMA0_CPAR6_CPAR6, 6 .EQU DMA0_CPAR6_CPAR5, 5 .EQU DMA0_CPAR6_CPAR4, 4 .EQU DMA0_CPAR6_CPAR3, 3 .EQU DMA0_CPAR6_CPAR2, 2 .EQU DMA0_CPAR6_CPAR1, 1 .EQU DMA0_CPAR6_CPAR0, 0 // register------------------------------------- .EQU DMA0_CPAR7, 0x40001678 // 0x4000 1678 DMA0_CPAR7 Bits------------------------------------- .EQU DMA0_CPAR7_CPAR31, 31 .EQU DMA0_CPAR7_CPAR30, 30 .EQU DMA0_CPAR7_CPAR29, 29 .EQU DMA0_CPAR7_CPAR28, 28 .EQU DMA0_CPAR7_CPAR27, 27 .EQU DMA0_CPAR7_CPAR26, 26 .EQU DMA0_CPAR7_CPAR25, 25 .EQU DMA0_CPAR7_CPAR24, 24 .EQU DMA0_CPAR7_CPAR23, 23 .EQU DMA0_CPAR7_CPAR22, 22 .EQU DMA0_CPAR7_CPAR21, 21 .EQU DMA0_CPAR7_CPAR20, 20 .EQU DMA0_CPAR7_CPAR19, 19 .EQU DMA0_CPAR7_CPAR18, 18 .EQU DMA0_CPAR7_CPAR17, 17 .EQU DMA0_CPAR7_CPAR16, 16 .EQU DMA0_CPAR7_CPAR15, 15 .EQU DMA0_CPAR7_CPAR14, 14 .EQU DMA0_CPAR7_CPAR13, 13 .EQU DMA0_CPAR7_CPAR12, 12 .EQU DMA0_CPAR7_CPAR11, 11 .EQU DMA0_CPAR7_CPAR10, 10 .EQU DMA0_CPAR7_CPAR9, 9 .EQU DMA0_CPAR7_CPAR8, 8 .EQU DMA0_CPAR7_CPAR7, 7 .EQU DMA0_CPAR7_CPAR6, 6 .EQU DMA0_CPAR7_CPAR5, 5 .EQU DMA0_CPAR7_CPAR4, 4 .EQU DMA0_CPAR7_CPAR3, 3 .EQU DMA0_CPAR7_CPAR2, 2 .EQU DMA0_CPAR7_CPAR1, 1 .EQU DMA0_CPAR7_CPAR0, 0 // register------------------------------------- .EQU DMA0_CMAR1, 0x40001680 // 0x4000 1680 DMA0_CMAR1 Bits------------------------------------- .EQU DMA0_CMAR1_CMAR31, 31 .EQU DMA0_CMAR1_CMAR30, 30 .EQU DMA0_CMAR1_CMAR29, 29 .EQU DMA0_CMAR1_CMAR28, 28 .EQU DMA0_CMAR1_CMAR27, 27 .EQU DMA0_CMAR1_CMAR26, 26 .EQU DMA0_CMAR1_CMAR25, 25 .EQU DMA0_CMAR1_CMAR24, 24 .EQU DMA0_CMAR1_CMAR23, 23 .EQU DMA0_CMAR1_CMAR22, 22 .EQU DMA0_CMAR1_CMAR21, 21 .EQU DMA0_CMAR1_CMAR20, 20 .EQU DMA0_CMAR1_CMAR19, 19 .EQU DMA0_CMAR1_CMAR18, 18 .EQU DMA0_CMAR1_CMAR17, 17 .EQU DMA0_CMAR1_CMAR16, 16 .EQU DMA0_CMAR1_CMAR15, 15 .EQU DMA0_CMAR1_CMAR14, 14 .EQU DMA0_CMAR1_CMAR13, 13 .EQU DMA0_CMAR1_CMAR12, 12 .EQU DMA0_CMAR1_CMAR11, 11 .EQU DMA0_CMAR1_CMAR10, 10 .EQU DMA0_CMAR1_CMAR9, 9 .EQU DMA0_CMAR1_CMAR8, 8 .EQU DMA0_CMAR1_CMAR7, 7 .EQU DMA0_CMAR1_CMAR6, 6 .EQU DMA0_CMAR1_CMAR5, 5 .EQU DMA0_CMAR1_CMAR4, 4 .EQU DMA0_CMAR1_CMAR3, 3 .EQU DMA0_CMAR1_CMAR2, 2 .EQU DMA0_CMAR1_CMAR1, 1 .EQU DMA0_CMAR1_CMAR0, 0 // register------------------------------------- .EQU DMA0_CMAR2, 0x40001684 // 0x4000 1684 DMA0_CMAR2 Bits------------------------------------- .EQU DMA0_CMAR2_CMAR31, 31 .EQU DMA0_CMAR2_CMAR30, 30 .EQU DMA0_CMAR2_CMAR29, 29 .EQU DMA0_CMAR2_CMAR28, 28 .EQU DMA0_CMAR2_CMAR27, 27 .EQU DMA0_CMAR2_CMAR26, 26 .EQU DMA0_CMAR2_CMAR25, 25 .EQU DMA0_CMAR2_CMAR24, 24 .EQU DMA0_CMAR2_CMAR23, 23 .EQU DMA0_CMAR2_CMAR22, 22 .EQU DMA0_CMAR2_CMAR21, 21 .EQU DMA0_CMAR2_CMAR20, 20 .EQU DMA0_CMAR2_CMAR19, 19 .EQU DMA0_CMAR2_CMAR18, 18 .EQU DMA0_CMAR2_CMAR17, 17 .EQU DMA0_CMAR2_CMAR16, 16 .EQU DMA0_CMAR2_CMAR15, 15 .EQU DMA0_CMAR2_CMAR14, 14 .EQU DMA0_CMAR2_CMAR13, 13 .EQU DMA0_CMAR2_CMAR12, 12 .EQU DMA0_CMAR2_CMAR11, 11 .EQU DMA0_CMAR2_CMAR10, 10 .EQU DMA0_CMAR2_CMAR9, 9 .EQU DMA0_CMAR2_CMAR8, 8 .EQU DMA0_CMAR2_CMAR7, 7 .EQU DMA0_CMAR2_CMAR6, 6 .EQU DMA0_CMAR2_CMAR5, 5 .EQU DMA0_CMAR2_CMAR4, 4 .EQU DMA0_CMAR2_CMAR3, 3 .EQU DMA0_CMAR2_CMAR2, 2 .EQU DMA0_CMAR2_CMAR1, 1 .EQU DMA0_CMAR2_CMAR0, 0 // register------------------------------------- .EQU DMA0_CMAR3, 0x40001688 // 0x4000 1688 DMA0_CMAR3 Bits------------------------------------- .EQU DMA0_CMAR3_CMAR31, 31 .EQU DMA0_CMAR3_CMAR30, 30 .EQU DMA0_CMAR3_CMAR29, 29 .EQU DMA0_CMAR3_CMAR28, 28 .EQU DMA0_CMAR3_CMAR27, 27 .EQU DMA0_CMAR3_CMAR26, 26 .EQU DMA0_CMAR3_CMAR25, 25 .EQU DMA0_CMAR3_CMAR24, 24 .EQU DMA0_CMAR3_CMAR23, 23 .EQU DMA0_CMAR3_CMAR22, 22 .EQU DMA0_CMAR3_CMAR21, 21 .EQU DMA0_CMAR3_CMAR20, 20 .EQU DMA0_CMAR3_CMAR19, 19 .EQU DMA0_CMAR3_CMAR18, 18 .EQU DMA0_CMAR3_CMAR17, 17 .EQU DMA0_CMAR3_CMAR16, 16 .EQU DMA0_CMAR3_CMAR15, 15 .EQU DMA0_CMAR3_CMAR14, 14 .EQU DMA0_CMAR3_CMAR13, 13 .EQU DMA0_CMAR3_CMAR12, 12 .EQU DMA0_CMAR3_CMAR11, 11 .EQU DMA0_CMAR3_CMAR10, 10 .EQU DMA0_CMAR3_CMAR9, 9 .EQU DMA0_CMAR3_CMAR8, 8 .EQU DMA0_CMAR3_CMAR7, 7 .EQU DMA0_CMAR3_CMAR6, 6 .EQU DMA0_CMAR3_CMAR5, 5 .EQU DMA0_CMAR3_CMAR4, 4 .EQU DMA0_CMAR3_CMAR3, 3 .EQU DMA0_CMAR3_CMAR2, 2 .EQU DMA0_CMAR3_CMAR1, 1 .EQU DMA0_CMAR3_CMAR0, 0 // register------------------------------------- .EQU DMA0_CMAR4, 0x4000168C // 0x4000 168C DMA0_CMAR4 Bits------------------------------------- .EQU DMA0_CMAR4_CMAR31, 31 .EQU DMA0_CMAR4_CMAR30, 30 .EQU DMA0_CMAR4_CMAR29, 29 .EQU DMA0_CMAR4_CMAR28, 28 .EQU DMA0_CMAR4_CMAR27, 27 .EQU DMA0_CMAR4_CMAR26, 26 .EQU DMA0_CMAR4_CMAR25, 25 .EQU DMA0_CMAR4_CMAR24, 24 .EQU DMA0_CMAR4_CMAR23, 23 .EQU DMA0_CMAR4_CMAR22, 22 .EQU DMA0_CMAR4_CMAR21, 21 .EQU DMA0_CMAR4_CMAR20, 20 .EQU DMA0_CMAR4_CMAR19, 19 .EQU DMA0_CMAR4_CMAR18, 18 .EQU DMA0_CMAR4_CMAR17, 17 .EQU DMA0_CMAR4_CMAR16, 16 .EQU DMA0_CMAR4_CMAR15, 15 .EQU DMA0_CMAR4_CMAR14, 14 .EQU DMA0_CMAR4_CMAR13, 13 .EQU DMA0_CMAR4_CMAR12, 12 .EQU DMA0_CMAR4_CMAR11, 11 .EQU DMA0_CMAR4_CMAR10, 10 .EQU DMA0_CMAR4_CMAR9, 9 .EQU DMA0_CMAR4_CMAR8, 8 .EQU DMA0_CMAR4_CMAR7, 7 .EQU DMA0_CMAR4_CMAR6, 6 .EQU DMA0_CMAR4_CMAR5, 5 .EQU DMA0_CMAR4_CMAR4, 4 .EQU DMA0_CMAR4_CMAR3, 3 .EQU DMA0_CMAR4_CMAR2, 2 .EQU DMA0_CMAR4_CMAR1, 1 .EQU DMA0_CMAR4_CMAR0, 0 // register------------------------------------- .EQU DMA0_CMAR5, 0x40001690 // 0x4000 1690 DMA0_CMAR5 Bits------------------------------------- .EQU DMA0_CMAR5_CMAR31, 31 .EQU DMA0_CMAR5_CMAR30, 30 .EQU DMA0_CMAR5_CMAR29, 29 .EQU DMA0_CMAR5_CMAR28, 28 .EQU DMA0_CMAR5_CMAR27, 27 .EQU DMA0_CMAR5_CMAR26, 26 .EQU DMA0_CMAR5_CMAR25, 25 .EQU DMA0_CMAR5_CMAR24, 24 .EQU DMA0_CMAR5_CMAR23, 23 .EQU DMA0_CMAR5_CMAR22, 22 .EQU DMA0_CMAR5_CMAR21, 21 .EQU DMA0_CMAR5_CMAR20, 20 .EQU DMA0_CMAR5_CMAR19, 19 .EQU DMA0_CMAR5_CMAR18, 18 .EQU DMA0_CMAR5_CMAR17, 17 .EQU DMA0_CMAR5_CMAR16, 16 .EQU DMA0_CMAR5_CMAR15, 15 .EQU DMA0_CMAR5_CMAR14, 14 .EQU DMA0_CMAR5_CMAR13, 13 .EQU DMA0_CMAR5_CMAR12, 12 .EQU DMA0_CMAR5_CMAR11, 11 .EQU DMA0_CMAR5_CMAR10, 10 .EQU DMA0_CMAR5_CMAR9, 9 .EQU DMA0_CMAR5_CMAR8, 8 .EQU DMA0_CMAR5_CMAR7, 7 .EQU DMA0_CMAR5_CMAR6, 6 .EQU DMA0_CMAR5_CMAR5, 5 .EQU DMA0_CMAR5_CMAR4, 4 .EQU DMA0_CMAR5_CMAR3, 3 .EQU DMA0_CMAR5_CMAR2, 2 .EQU DMA0_CMAR5_CMAR1, 1 .EQU DMA0_CMAR5_CMAR0, 0 // register------------------------------------- .EQU DMA0_CMAR6, 0x40001694 // 0x4000 1694 DMA0_CMAR6 Bits------------------------------------- .EQU DMA0_CMAR6_CMAR31, 31 .EQU DMA0_CMAR6_CMAR30, 30 .EQU DMA0_CMAR6_CMAR29, 29 .EQU DMA0_CMAR6_CMAR28, 28 .EQU DMA0_CMAR6_CMAR27, 27 .EQU DMA0_CMAR6_CMAR26, 26 .EQU DMA0_CMAR6_CMAR25, 25 .EQU DMA0_CMAR6_CMAR24, 24 .EQU DMA0_CMAR6_CMAR23, 23 .EQU DMA0_CMAR6_CMAR22, 22 .EQU DMA0_CMAR6_CMAR21, 21 .EQU DMA0_CMAR6_CMAR20, 20 .EQU DMA0_CMAR6_CMAR19, 19 .EQU DMA0_CMAR6_CMAR18, 18 .EQU DMA0_CMAR6_CMAR17, 17 .EQU DMA0_CMAR6_CMAR16, 16 .EQU DMA0_CMAR6_CMAR15, 15 .EQU DMA0_CMAR6_CMAR14, 14 .EQU DMA0_CMAR6_CMAR13, 13 .EQU DMA0_CMAR6_CMAR12, 12 .EQU DMA0_CMAR6_CMAR11, 11 .EQU DMA0_CMAR6_CMAR10, 10 .EQU DMA0_CMAR6_CMAR9, 9 .EQU DMA0_CMAR6_CMAR8, 8 .EQU DMA0_CMAR6_CMAR7, 7 .EQU DMA0_CMAR6_CMAR6, 6 .EQU DMA0_CMAR6_CMAR5, 5 .EQU DMA0_CMAR6_CMAR4, 4 .EQU DMA0_CMAR6_CMAR3, 3 .EQU DMA0_CMAR6_CMAR2, 2 .EQU DMA0_CMAR6_CMAR1, 1 .EQU DMA0_CMAR6_CMAR0, 0 // register------------------------------------- .EQU DMA0_CMAR7, 0x40001698 // 0x4000 1698 DMA0_CMAR7 Bits------------------------------------- .EQU DMA0_CMAR7_CMAR31, 31 .EQU DMA0_CMAR7_CMAR30, 30 .EQU DMA0_CMAR7_CMAR29, 29 .EQU DMA0_CMAR7_CMAR28, 28 .EQU DMA0_CMAR7_CMAR27, 27 .EQU DMA0_CMAR7_CMAR26, 26 .EQU DMA0_CMAR7_CMAR25, 25 .EQU DMA0_CMAR7_CMAR24, 24 .EQU DMA0_CMAR7_CMAR23, 23 .EQU DMA0_CMAR7_CMAR22, 22 .EQU DMA0_CMAR7_CMAR21, 21 .EQU DMA0_CMAR7_CMAR20, 20 .EQU DMA0_CMAR7_CMAR19, 19 .EQU DMA0_CMAR7_CMAR18, 18 .EQU DMA0_CMAR7_CMAR17, 17 .EQU DMA0_CMAR7_CMAR16, 16 .EQU DMA0_CMAR7_CMAR15, 15 .EQU DMA0_CMAR7_CMAR14, 14 .EQU DMA0_CMAR7_CMAR13, 13 .EQU DMA0_CMAR7_CMAR12, 12 .EQU DMA0_CMAR7_CMAR11, 11 .EQU DMA0_CMAR7_CMAR10, 10 .EQU DMA0_CMAR7_CMAR9, 9 .EQU DMA0_CMAR7_CMAR8, 8 .EQU DMA0_CMAR7_CMAR7, 7 .EQU DMA0_CMAR7_CMAR6, 6 .EQU DMA0_CMAR7_CMAR5, 5 .EQU DMA0_CMAR7_CMAR4, 4 .EQU DMA0_CMAR7_CMAR3, 3 .EQU DMA0_CMAR7_CMAR2, 2 .EQU DMA0_CMAR7_CMAR1, 1 .EQU DMA0_CMAR7_CMAR0, 0 // register------------------------------------- .EQU DMA0_NCT1, 0x400016A0 // 0x4000 16A0 DMA0_NCT1 Bits------------------------------------- .EQU DMA0_NCT1_NCT31, 31 .EQU DMA0_NCT1_NCT30, 30 .EQU DMA0_NCT1_NCT29, 29 .EQU DMA0_NCT1_NCT28, 28 .EQU DMA0_NCT1_NCT27, 27 .EQU DMA0_NCT1_NCT26, 26 .EQU DMA0_NCT1_NCT25, 25 .EQU DMA0_NCT1_NCT24, 24 .EQU DMA0_NCT1_NCT23, 23 .EQU DMA0_NCT1_NCT22, 22 .EQU DMA0_NCT1_NCT21, 21 .EQU DMA0_NCT1_NCT20, 20 .EQU DMA0_NCT1_NCT19, 19 .EQU DMA0_NCT1_NCT18, 18 .EQU DMA0_NCT1_NCT17, 17 .EQU DMA0_NCT1_NCT16, 16 // register------------------------------------- .EQU DMA0_NCT2, 0x400016A4 // 0x4000 16A4 DMA0_NCT2 Bits------------------------------------- .EQU DMA0_NCT2_NCT31, 31 .EQU DMA0_NCT2_NCT30, 30 .EQU DMA0_NCT2_NCT29, 29 .EQU DMA0_NCT2_NCT28, 28 .EQU DMA0_NCT2_NCT27, 27 .EQU DMA0_NCT2_NCT26, 26 .EQU DMA0_NCT2_NCT25, 25 .EQU DMA0_NCT2_NCT24, 24 .EQU DMA0_NCT2_NCT23, 23 .EQU DMA0_NCT2_NCT22, 22 .EQU DMA0_NCT2_NCT21, 21 .EQU DMA0_NCT2_NCT20, 20 .EQU DMA0_NCT2_NCT19, 19 .EQU DMA0_NCT2_NCT18, 18 .EQU DMA0_NCT2_NCT17, 17 .EQU DMA0_NCT2_NCT16, 16 // register------------------------------------- .EQU DMA0_NCT3, 0x400016A8 // 0x4000 16A8 DMA0_NCT3 Bits------------------------------------- .EQU DMA0_NCT3_NCT31, 31 .EQU DMA0_NCT3_NCT30, 30 .EQU DMA0_NCT3_NCT29, 29 .EQU DMA0_NCT3_NCT28, 28 .EQU DMA0_NCT3_NCT27, 27 .EQU DMA0_NCT3_NCT26, 26 .EQU DMA0_NCT3_NCT25, 25 .EQU DMA0_NCT3_NCT24, 24 .EQU DMA0_NCT3_NCT23, 23 .EQU DMA0_NCT3_NCT22, 22 .EQU DMA0_NCT3_NCT21, 21 .EQU DMA0_NCT3_NCT20, 20 .EQU DMA0_NCT3_NCT19, 19 .EQU DMA0_NCT3_NCT18, 18 .EQU DMA0_NCT3_NCT17, 17 .EQU DMA0_NCT3_NCT16, 16 // register------------------------------------- .EQU DMA0_NCT4, 0x400016AC // 0x4000 16AC DMA0_NCT4 Bits------------------------------------- .EQU DMA0_NCT4_NCT31, 31 .EQU DMA0_NCT4_NCT30, 30 .EQU DMA0_NCT4_NCT29, 29 .EQU DMA0_NCT4_NCT28, 28 .EQU DMA0_NCT4_NCT27, 27 .EQU DMA0_NCT4_NCT26, 26 .EQU DMA0_NCT4_NCT25, 25 .EQU DMA0_NCT4_NCT24, 24 .EQU DMA0_NCT4_NCT23, 23 .EQU DMA0_NCT4_NCT22, 22 .EQU DMA0_NCT4_NCT21, 21 .EQU DMA0_NCT4_NCT20, 20 .EQU DMA0_NCT4_NCT19, 19 .EQU DMA0_NCT4_NCT18, 18 .EQU DMA0_NCT4_NCT17, 17 .EQU DMA0_NCT4_NCT16, 16 // register------------------------------------- .EQU DMA0_NCT5, 0x400016B0 // 0x4000 16B0 DMA0_NCT5 Bits------------------------------------- .EQU DMA0_NCT5_NCT31, 31 .EQU DMA0_NCT5_NCT30, 30 .EQU DMA0_NCT5_NCT29, 29 .EQU DMA0_NCT5_NCT28, 28 .EQU DMA0_NCT5_NCT27, 27 .EQU DMA0_NCT5_NCT26, 26 .EQU DMA0_NCT5_NCT25, 25 .EQU DMA0_NCT5_NCT24, 24 .EQU DMA0_NCT5_NCT23, 23 .EQU DMA0_NCT5_NCT22, 22 .EQU DMA0_NCT5_NCT21, 21 .EQU DMA0_NCT5_NCT20, 20 .EQU DMA0_NCT5_NCT19, 19 .EQU DMA0_NCT5_NCT18, 18 .EQU DMA0_NCT5_NCT17, 17 .EQU DMA0_NCT5_NCT16, 16 // register------------------------------------- .EQU DMA0_NCT6, 0x400016B4 // 0x4000 16B4 DMA0_NCT6 Bits------------------------------------- .EQU DMA0_NCT6_NCT31, 31 .EQU DMA0_NCT6_NCT30, 30 .EQU DMA0_NCT6_NCT29, 29 .EQU DMA0_NCT6_NCT28, 28 .EQU DMA0_NCT6_NCT27, 27 .EQU DMA0_NCT6_NCT26, 26 .EQU DMA0_NCT6_NCT25, 25 .EQU DMA0_NCT6_NCT24, 24 .EQU DMA0_NCT6_NCT23, 23 .EQU DMA0_NCT6_NCT22, 22 .EQU DMA0_NCT6_NCT21, 21 .EQU DMA0_NCT6_NCT20, 20 .EQU DMA0_NCT6_NCT19, 19 .EQU DMA0_NCT6_NCT18, 18 .EQU DMA0_NCT6_NCT17, 17 .EQU DMA0_NCT6_NCT16, 16 // register------------------------------------- .EQU DMA0_NCT7, 0x400016B8 // 0x4000 16B8 DMA0_NCT7 Bits------------------------------------- .EQU DMA0_NCT7_NCT31, 31 .EQU DMA0_NCT7_NCT30, 30 .EQU DMA0_NCT7_NCT29, 29 .EQU DMA0_NCT7_NCT28, 28 .EQU DMA0_NCT7_NCT27, 27 .EQU DMA0_NCT7_NCT26, 26 .EQU DMA0_NCT7_NCT25, 25 .EQU DMA0_NCT7_NCT24, 24 .EQU DMA0_NCT7_NCT23, 23 .EQU DMA0_NCT7_NCT22, 22 .EQU DMA0_NCT7_NCT21, 21 .EQU DMA0_NCT7_NCT20, 20 .EQU DMA0_NCT7_NCT19, 19 .EQU DMA0_NCT7_NCT18, 18 .EQU DMA0_NCT7_NCT17, 17 .EQU DMA0_NCT7_NCT16, 16 // register------------------------------------- .EQU DMA0_LIFR, 0x400016C0 // 0x4000 16C0 DMA0_LIFR Bits------------------------------------- .EQU DMA0_LIFR_ETIF7, 20 .EQU DMA0_LIFR_HTIF7, 19 .EQU DMA0_LIFR_FTIF7, 18 .EQU DMA0_LIFR_ETIF6, 17 .EQU DMA0_LIFR_HTIF6, 16 .EQU DMA0_LIFR_FTIF6, 15 .EQU DMA0_LIFR_ETIF5, 14 .EQU DMA0_LIFR_HTIF5, 13 .EQU DMA0_LIFR_FTIF5, 12 .EQU DMA0_LIFR_ETIF4, 11 .EQU DMA0_LIFR_HTIF4, 10 .EQU DMA0_LIFR_FTIF4, 9 .EQU DMA0_LIFR_ETIF3, 8 .EQU DMA0_LIFR_HTIF3, 7 .EQU DMA0_LIFR_FTIF3, 6 .EQU DMA0_LIFR_ETIF2, 5 .EQU DMA0_LIFR_HTIF2, 4 .EQU DMA0_LIFR_FTIF2, 3 .EQU DMA0_LIFR_ETIF1, 2 .EQU DMA0_LIFR_HTIF1, 1 .EQU DMA0_LIFR_FTIF1, 0 // register------------------------------------- .EQU DMA0_LIER, 0x400016C4 // 0x4000 16C4 DMA0_LIER Bits------------------------------------- .EQU DMA0_LIER_ETIE7, 20 .EQU DMA0_LIER_HTIE7, 19 .EQU DMA0_LIER_FTIE7, 18 .EQU DMA0_LIER_ETIE6, 17 .EQU DMA0_LIER_HTIE6, 16 .EQU DMA0_LIER_FTIE6, 15 .EQU DMA0_LIER_ETIE5, 14 .EQU DMA0_LIER_HTIE5, 13 .EQU DMA0_LIER_FTIE5, 12 .EQU DMA0_LIER_ETIE4, 11 .EQU DMA0_LIER_HTIE4, 10 .EQU DMA0_LIER_FTIE4, 9 .EQU DMA0_LIER_ETIE3, 8 .EQU DMA0_LIER_HTIE3, 7 .EQU DMA0_LIER_FTIE3, 6 .EQU DMA0_LIER_ETIE2, 5 .EQU DMA0_LIER_HTIE2, 4 .EQU DMA0_LIER_FTIE2, 3 .EQU DMA0_LIER_ETIE1, 2 .EQU DMA0_LIER_HTIE1, 1 .EQU DMA0_LIER_FTIE1, 0 // register------------------------------------- .EQU DMA0_MUXL, 0x400016C8 // 0x4000 16C8 DMA0_MUXL Bits------------------------------------- .EQU DMA0_MUXL_TRGEN4, 31 .EQU DMA0_MUXL_SOURCE4_5, 29 .EQU DMA0_MUXL_SOURCE4_4, 28 .EQU DMA0_MUXL_SOURCE4_3, 27 .EQU DMA0_MUXL_SOURCE4_2, 26 .EQU DMA0_MUXL_SOURCE4_1, 25 .EQU DMA0_MUXL_SOURCE4_0, 24 .EQU DMA0_MUXL_TRGEN3, 23 .EQU DMA0_MUXL_SOURCE3_5, 21 .EQU DMA0_MUXL_SOURCE3_4, 20 .EQU DMA0_MUXL_SOURCE3_3, 19 .EQU DMA0_MUXL_SOURCE3_2, 18 .EQU DMA0_MUXL_SOURCE3_1, 17 .EQU DMA0_MUXL_SOURCE3_0, 16 .EQU DMA0_MUXL_TRGEN2, 15 .EQU DMA0_MUXL_SOURCE2_5, 13 .EQU DMA0_MUXL_SOURCE2_4, 12 .EQU DMA0_MUXL_SOURCE2_3, 11 .EQU DMA0_MUXL_SOURCE2_2, 10 .EQU DMA0_MUXL_SOURCE2_1, 9 .EQU DMA0_MUXL_SOURCE2_0, 8 .EQU DMA0_MUXL_TRGEN1, 7 .EQU DMA0_MUXL_SOURCE1_5, 5 .EQU DMA0_MUXL_SOURCE1_4, 4 .EQU DMA0_MUXL_SOURCE1_3, 3 .EQU DMA0_MUXL_SOURCE1_2, 2 .EQU DMA0_MUXL_SOURCE1_1, 1 .EQU DMA0_MUXL_SOURCE1_0, 0 // register------------------------------------- .EQU DMA0_MUXH, 0x400016CC // 0x4000 16CC DMA0_MUXH Bits------------------------------------- .EQU DMA0_MUXH_TRGEN7, 23 .EQU DMA0_MUXH_SOURCE7_5, 21 .EQU DMA0_MUXH_SOURCE7_4, 20 .EQU DMA0_MUXH_SOURCE7_3, 19 .EQU DMA0_MUXH_SOURCE7_2, 18 .EQU DMA0_MUXH_SOURCE7_1, 17 .EQU DMA0_MUXH_SOURCE7_0, 16 .EQU DMA0_MUXH_TRGEN6, 15 .EQU DMA0_MUXH_SOURCE6_5, 13 .EQU DMA0_MUXH_SOURCE6_4, 12 .EQU DMA0_MUXH_SOURCE6_3, 11 .EQU DMA0_MUXH_SOURCE6_2, 10 .EQU DMA0_MUXH_SOURCE6_1, 9 .EQU DMA0_MUXH_SOURCE6_0, 8 .EQU DMA0_MUXH_TRGEN5, 7 .EQU DMA0_MUXH_SOURCE5_5, 5 .EQU DMA0_MUXH_SOURCE5_4, 4 .EQU DMA0_MUXH_SOURCE5_3, 3 .EQU DMA0_MUXH_SOURCE5_2, 2 .EQU DMA0_MUXH_SOURCE5_1, 1 .EQU DMA0_MUXH_SOURCE5_0, 0 // register------------------------------------- .EQU DMA1_CTLR1, 0x40001700 // 0x4000 1700 DMA1_CTLR1 Bits------------------------------------- .EQU DMA1_CTLR1_NUMODT15, 31 .EQU DMA1_CTLR1_NUMODT14, 30 .EQU DMA1_CTLR1_NUMODT13, 29 .EQU DMA1_CTLR1_NUMODT12, 28 .EQU DMA1_CTLR1_NUMODT11, 27 .EQU DMA1_CTLR1_NUMODT10, 26 .EQU DMA1_CTLR1_NUMODT9, 25 .EQU DMA1_CTLR1_NUMODT8, 24 .EQU DMA1_CTLR1_NUMODT7, 23 .EQU DMA1_CTLR1_NUMODT6, 22 .EQU DMA1_CTLR1_NUMODT5, 21 .EQU DMA1_CTLR1_NUMODT4, 20 .EQU DMA1_CTLR1_NUMODT3, 19 .EQU DMA1_CTLR1_NUMODT2, 18 .EQU DMA1_CTLR1_NUMODT1, 17 .EQU DMA1_CTLR1_NUMODT0, 16 .EQU DMA1_CTLR1_M2M, 15 .EQU DMA1_CTLR1_CPL1, 14 .EQU DMA1_CTLR1_CPL0, 13 .EQU DMA1_CTLR1_ONESHOT, 12 .EQU DMA1_CTLR1_PDS1, 11 .EQU DMA1_CTLR1_PDS0, 10 .EQU DMA1_CTLR1_MDS1, 9 .EQU DMA1_CTLR1_MDS0, 8 .EQU DMA1_CTLR1_PINC, 7 .EQU DMA1_CTLR1_MINC, 6 .EQU DMA1_CTLR1_LPM, 5 .EQU DMA1_CTLR1_DDIR, 4 .EQU DMA1_CTLR1_BLKM, 3 .EQU DMA1_CTLR1_DMAHALT, 1 .EQU DMA1_CTLR1_DMAEN, 0 // register------------------------------------- .EQU DMA1_CTLR2, 0x40001704 // 0x4000 1704 DMA1_CTLR2 Bits------------------------------------- .EQU DMA1_CTLR2_NUMODT15, 31 .EQU DMA1_CTLR2_NUMODT14, 30 .EQU DMA1_CTLR2_NUMODT13, 29 .EQU DMA1_CTLR2_NUMODT12, 28 .EQU DMA1_CTLR2_NUMODT11, 27 .EQU DMA1_CTLR2_NUMODT10, 26 .EQU DMA1_CTLR2_NUMODT9, 25 .EQU DMA1_CTLR2_NUMODT8, 24 .EQU DMA1_CTLR2_NUMODT7, 23 .EQU DMA1_CTLR2_NUMODT6, 22 .EQU DMA1_CTLR2_NUMODT5, 21 .EQU DMA1_CTLR2_NUMODT4, 20 .EQU DMA1_CTLR2_NUMODT3, 19 .EQU DMA1_CTLR2_NUMODT2, 18 .EQU DMA1_CTLR2_NUMODT1, 17 .EQU DMA1_CTLR2_NUMODT0, 16 .EQU DMA1_CTLR2_M2M, 15 .EQU DMA1_CTLR2_CPL1, 14 .EQU DMA1_CTLR2_CPL0, 13 .EQU DMA1_CTLR2_ONESHOT, 12 .EQU DMA1_CTLR2_PDS1, 11 .EQU DMA1_CTLR2_PDS0, 10 .EQU DMA1_CTLR2_MDS1, 9 .EQU DMA1_CTLR2_MDS0, 8 .EQU DMA1_CTLR2_PINC, 7 .EQU DMA1_CTLR2_MINC, 6 .EQU DMA1_CTLR2_LPM, 5 .EQU DMA1_CTLR2_DDIR, 4 .EQU DMA1_CTLR2_BLKM, 3 .EQU DMA1_CTLR2_DMAHALT, 1 .EQU DMA1_CTLR2_DMAEN, 0 // register------------------------------------- .EQU DMA1_CTLR3, 0x40001708 // 0x4000 1708 DMA1_CTLR3 Bits------------------------------------- .EQU DMA1_CTLR3_NUMODT15, 31 .EQU DMA1_CTLR3_NUMODT14, 30 .EQU DMA1_CTLR3_NUMODT13, 29 .EQU DMA1_CTLR3_NUMODT12, 28 .EQU DMA1_CTLR3_NUMODT11, 27 .EQU DMA1_CTLR3_NUMODT10, 26 .EQU DMA1_CTLR3_NUMODT9, 25 .EQU DMA1_CTLR3_NUMODT8, 24 .EQU DMA1_CTLR3_NUMODT7, 23 .EQU DMA1_CTLR3_NUMODT6, 22 .EQU DMA1_CTLR3_NUMODT5, 21 .EQU DMA1_CTLR3_NUMODT4, 20 .EQU DMA1_CTLR3_NUMODT3, 19 .EQU DMA1_CTLR3_NUMODT2, 18 .EQU DMA1_CTLR3_NUMODT1, 17 .EQU DMA1_CTLR3_NUMODT0, 16 .EQU DMA1_CTLR3_M2M, 15 .EQU DMA1_CTLR3_CPL1, 14 .EQU DMA1_CTLR3_CPL0, 13 .EQU DMA1_CTLR3_ONESHOT, 12 .EQU DMA1_CTLR3_PDS1, 11 .EQU DMA1_CTLR3_PDS0, 10 .EQU DMA1_CTLR3_MDS1, 9 .EQU DMA1_CTLR3_MDS0, 8 .EQU DMA1_CTLR3_PINC, 7 .EQU DMA1_CTLR3_MINC, 6 .EQU DMA1_CTLR3_LPM, 5 .EQU DMA1_CTLR3_DDIR, 4 .EQU DMA1_CTLR3_BLKM, 3 .EQU DMA1_CTLR3_DMAHALT, 1 .EQU DMA1_CTLR3_DMAEN, 0 // register------------------------------------- .EQU DMA1_CTLR4, 0x4000170C // 0x4000 170C DMA1_CTLR4 Bits------------------------------------- .EQU DMA1_CTLR4_NUMODT15, 31 .EQU DMA1_CTLR4_NUMODT14, 30 .EQU DMA1_CTLR4_NUMODT13, 29 .EQU DMA1_CTLR4_NUMODT12, 28 .EQU DMA1_CTLR4_NUMODT11, 27 .EQU DMA1_CTLR4_NUMODT10, 26 .EQU DMA1_CTLR4_NUMODT9, 25 .EQU DMA1_CTLR4_NUMODT8, 24 .EQU DMA1_CTLR4_NUMODT7, 23 .EQU DMA1_CTLR4_NUMODT6, 22 .EQU DMA1_CTLR4_NUMODT5, 21 .EQU DMA1_CTLR4_NUMODT4, 20 .EQU DMA1_CTLR4_NUMODT3, 19 .EQU DMA1_CTLR4_NUMODT2, 18 .EQU DMA1_CTLR4_NUMODT1, 17 .EQU DMA1_CTLR4_NUMODT0, 16 .EQU DMA1_CTLR4_M2M, 15 .EQU DMA1_CTLR4_CPL1, 14 .EQU DMA1_CTLR4_CPL0, 13 .EQU DMA1_CTLR4_ONESHOT, 12 .EQU DMA1_CTLR4_PDS1, 11 .EQU DMA1_CTLR4_PDS0, 10 .EQU DMA1_CTLR4_MDS1, 9 .EQU DMA1_CTLR4_MDS0, 8 .EQU DMA1_CTLR4_PINC, 7 .EQU DMA1_CTLR4_MINC, 6 .EQU DMA1_CTLR4_LPM, 5 .EQU DMA1_CTLR4_DDIR, 4 .EQU DMA1_CTLR4_BLKM, 3 .EQU DMA1_CTLR4_DMAHALT, 1 .EQU DMA1_CTLR4_DMAEN, 0 // register------------------------------------- .EQU DMA1_CTLR5, 0x40001710 // 0x4000 1710 DMA1_CTLR5 Bits------------------------------------- .EQU DMA1_CTLR5_NUMODT15, 31 .EQU DMA1_CTLR5_NUMODT14, 30 .EQU DMA1_CTLR5_NUMODT13, 29 .EQU DMA1_CTLR5_NUMODT12, 28 .EQU DMA1_CTLR5_NUMODT11, 27 .EQU DMA1_CTLR5_NUMODT10, 26 .EQU DMA1_CTLR5_NUMODT9, 25 .EQU DMA1_CTLR5_NUMODT8, 24 .EQU DMA1_CTLR5_NUMODT7, 23 .EQU DMA1_CTLR5_NUMODT6, 22 .EQU DMA1_CTLR5_NUMODT5, 21 .EQU DMA1_CTLR5_NUMODT4, 20 .EQU DMA1_CTLR5_NUMODT3, 19 .EQU DMA1_CTLR5_NUMODT2, 18 .EQU DMA1_CTLR5_NUMODT1, 17 .EQU DMA1_CTLR5_NUMODT0, 16 .EQU DMA1_CTLR5_M2M, 15 .EQU DMA1_CTLR5_CPL1, 14 .EQU DMA1_CTLR5_CPL0, 13 .EQU DMA1_CTLR5_ONESHOT, 12 .EQU DMA1_CTLR5_PDS1, 11 .EQU DMA1_CTLR5_PDS0, 10 .EQU DMA1_CTLR5_MDS1, 9 .EQU DMA1_CTLR5_MDS0, 8 .EQU DMA1_CTLR5_PINC, 7 .EQU DMA1_CTLR5_MINC, 6 .EQU DMA1_CTLR5_LPM, 5 .EQU DMA1_CTLR5_DDIR, 4 .EQU DMA1_CTLR5_BLKM, 3 .EQU DMA1_CTLR5_DMAHALT, 1 .EQU DMA1_CTLR5_DMAEN, 0 // register------------------------------------- .EQU DMA1_CTLR6, 0x40001714 // 0x4000 1714 DMA1_CTLR6 Bits------------------------------------- .EQU DMA1_CTLR6_NUMODT15, 31 .EQU DMA1_CTLR6_NUMODT14, 30 .EQU DMA1_CTLR6_NUMODT13, 29 .EQU DMA1_CTLR6_NUMODT12, 28 .EQU DMA1_CTLR6_NUMODT11, 27 .EQU DMA1_CTLR6_NUMODT10, 26 .EQU DMA1_CTLR6_NUMODT9, 25 .EQU DMA1_CTLR6_NUMODT8, 24 .EQU DMA1_CTLR6_NUMODT7, 23 .EQU DMA1_CTLR6_NUMODT6, 22 .EQU DMA1_CTLR6_NUMODT5, 21 .EQU DMA1_CTLR6_NUMODT4, 20 .EQU DMA1_CTLR6_NUMODT3, 19 .EQU DMA1_CTLR6_NUMODT2, 18 .EQU DMA1_CTLR6_NUMODT1, 17 .EQU DMA1_CTLR6_NUMODT0, 16 .EQU DMA1_CTLR6_M2M, 15 .EQU DMA1_CTLR6_CPL1, 14 .EQU DMA1_CTLR6_CPL0, 13 .EQU DMA1_CTLR6_ONESHOT, 12 .EQU DMA1_CTLR6_PDS1, 11 .EQU DMA1_CTLR6_PDS0, 10 .EQU DMA1_CTLR6_MDS1, 9 .EQU DMA1_CTLR6_MDS0, 8 .EQU DMA1_CTLR6_PINC, 7 .EQU DMA1_CTLR6_MINC, 6 .EQU DMA1_CTLR6_LPM, 5 .EQU DMA1_CTLR6_DDIR, 4 .EQU DMA1_CTLR6_BLKM, 3 .EQU DMA1_CTLR6_DMAHALT, 1 .EQU DMA1_CTLR6_DMAEN, 0 // register------------------------------------- .EQU DMA1_CTLR7, 0x40001718 // 0x4000 1718 DMA1_CTLR7 Bits------------------------------------- .EQU DMA1_CTLR7_NUMODT15, 31 .EQU DMA1_CTLR7_NUMODT14, 30 .EQU DMA1_CTLR7_NUMODT13, 29 .EQU DMA1_CTLR7_NUMODT12, 28 .EQU DMA1_CTLR7_NUMODT11, 27 .EQU DMA1_CTLR7_NUMODT10, 26 .EQU DMA1_CTLR7_NUMODT9, 25 .EQU DMA1_CTLR7_NUMODT8, 24 .EQU DMA1_CTLR7_NUMODT7, 23 .EQU DMA1_CTLR7_NUMODT6, 22 .EQU DMA1_CTLR7_NUMODT5, 21 .EQU DMA1_CTLR7_NUMODT4, 20 .EQU DMA1_CTLR7_NUMODT3, 19 .EQU DMA1_CTLR7_NUMODT2, 18 .EQU DMA1_CTLR7_NUMODT1, 17 .EQU DMA1_CTLR7_NUMODT0, 16 .EQU DMA1_CTLR7_M2M, 15 .EQU DMA1_CTLR7_CPL1, 14 .EQU DMA1_CTLR7_CPL0, 13 .EQU DMA1_CTLR7_ONESHOT, 12 .EQU DMA1_CTLR7_PDS1, 11 .EQU DMA1_CTLR7_PDS0, 10 .EQU DMA1_CTLR7_MDS1, 9 .EQU DMA1_CTLR7_MDS0, 8 .EQU DMA1_CTLR7_PINC, 7 .EQU DMA1_CTLR7_MINC, 6 .EQU DMA1_CTLR7_LPM, 5 .EQU DMA1_CTLR7_DDIR, 4 .EQU DMA1_CTLR7_BLKM, 3 .EQU DMA1_CTLR7_DMAHALT, 1 .EQU DMA1_CTLR7_DMAEN, 0 // register------------------------------------- .EQU DMA1_PADDR1, 0x40001720 // 0x4000 1720 DMA1_PADDR1 Bits------------------------------------- .EQU DMA1_PADDR1_PADDR31, 31 .EQU DMA1_PADDR1_PADDR30, 30 .EQU DMA1_PADDR1_PADDR29, 29 .EQU DMA1_PADDR1_PADDR28, 28 .EQU DMA1_PADDR1_PADDR27, 27 .EQU DMA1_PADDR1_PADDR26, 26 .EQU DMA1_PADDR1_PADDR25, 25 .EQU DMA1_PADDR1_PADDR24, 24 .EQU DMA1_PADDR1_PADDR23, 23 .EQU DMA1_PADDR1_PADDR22, 22 .EQU DMA1_PADDR1_PADDR21, 21 .EQU DMA1_PADDR1_PADDR20, 20 .EQU DMA1_PADDR1_PADDR19, 19 .EQU DMA1_PADDR1_PADDR18, 18 .EQU DMA1_PADDR1_PADDR17, 17 .EQU DMA1_PADDR1_PADDR16, 16 .EQU DMA1_PADDR1_PADDR15, 15 .EQU DMA1_PADDR1_PADDR14, 14 .EQU DMA1_PADDR1_PADDR13, 13 .EQU DMA1_PADDR1_PADDR12, 12 .EQU DMA1_PADDR1_PADDR11, 11 .EQU DMA1_PADDR1_PADDR10, 10 .EQU DMA1_PADDR1_PADDR9, 9 .EQU DMA1_PADDR1_PADDR8, 8 .EQU DMA1_PADDR1_PADDR7, 7 .EQU DMA1_PADDR1_PADDR6, 6 .EQU DMA1_PADDR1_PADDR5, 5 .EQU DMA1_PADDR1_PADDR4, 4 .EQU DMA1_PADDR1_PADDR3, 3 .EQU DMA1_PADDR1_PADDR2, 2 .EQU DMA1_PADDR1_PADDR1, 1 .EQU DMA1_PADDR1_PADDR0, 0 // register------------------------------------- .EQU DMA1_PADDR2, 0x40001724 // 0x4000 1724 DMA1_PADDR2 Bits------------------------------------- .EQU DMA1_PADDR2_PADDR31, 31 .EQU DMA1_PADDR2_PADDR30, 30 .EQU DMA1_PADDR2_PADDR29, 29 .EQU DMA1_PADDR2_PADDR28, 28 .EQU DMA1_PADDR2_PADDR27, 27 .EQU DMA1_PADDR2_PADDR26, 26 .EQU DMA1_PADDR2_PADDR25, 25 .EQU DMA1_PADDR2_PADDR24, 24 .EQU DMA1_PADDR2_PADDR23, 23 .EQU DMA1_PADDR2_PADDR22, 22 .EQU DMA1_PADDR2_PADDR21, 21 .EQU DMA1_PADDR2_PADDR20, 20 .EQU DMA1_PADDR2_PADDR19, 19 .EQU DMA1_PADDR2_PADDR18, 18 .EQU DMA1_PADDR2_PADDR17, 17 .EQU DMA1_PADDR2_PADDR16, 16 .EQU DMA1_PADDR2_PADDR15, 15 .EQU DMA1_PADDR2_PADDR14, 14 .EQU DMA1_PADDR2_PADDR13, 13 .EQU DMA1_PADDR2_PADDR12, 12 .EQU DMA1_PADDR2_PADDR11, 11 .EQU DMA1_PADDR2_PADDR10, 10 .EQU DMA1_PADDR2_PADDR9, 9 .EQU DMA1_PADDR2_PADDR8, 8 .EQU DMA1_PADDR2_PADDR7, 7 .EQU DMA1_PADDR2_PADDR6, 6 .EQU DMA1_PADDR2_PADDR5, 5 .EQU DMA1_PADDR2_PADDR4, 4 .EQU DMA1_PADDR2_PADDR3, 3 .EQU DMA1_PADDR2_PADDR2, 2 .EQU DMA1_PADDR2_PADDR1, 1 .EQU DMA1_PADDR2_PADDR0, 0 // register------------------------------------- .EQU DMA1_PADDR3, 0x40001728 // 0x4000 1728 DMA1_PADDR3 Bits------------------------------------- .EQU DMA1_PADDR3_PADDR31, 31 .EQU DMA1_PADDR3_PADDR30, 30 .EQU DMA1_PADDR3_PADDR29, 29 .EQU DMA1_PADDR3_PADDR28, 28 .EQU DMA1_PADDR3_PADDR27, 27 .EQU DMA1_PADDR3_PADDR26, 26 .EQU DMA1_PADDR3_PADDR25, 25 .EQU DMA1_PADDR3_PADDR24, 24 .EQU DMA1_PADDR3_PADDR23, 23 .EQU DMA1_PADDR3_PADDR22, 22 .EQU DMA1_PADDR3_PADDR21, 21 .EQU DMA1_PADDR3_PADDR20, 20 .EQU DMA1_PADDR3_PADDR19, 19 .EQU DMA1_PADDR3_PADDR18, 18 .EQU DMA1_PADDR3_PADDR17, 17 .EQU DMA1_PADDR3_PADDR16, 16 .EQU DMA1_PADDR3_PADDR15, 15 .EQU DMA1_PADDR3_PADDR14, 14 .EQU DMA1_PADDR3_PADDR13, 13 .EQU DMA1_PADDR3_PADDR12, 12 .EQU DMA1_PADDR3_PADDR11, 11 .EQU DMA1_PADDR3_PADDR10, 10 .EQU DMA1_PADDR3_PADDR9, 9 .EQU DMA1_PADDR3_PADDR8, 8 .EQU DMA1_PADDR3_PADDR7, 7 .EQU DMA1_PADDR3_PADDR6, 6 .EQU DMA1_PADDR3_PADDR5, 5 .EQU DMA1_PADDR3_PADDR4, 4 .EQU DMA1_PADDR3_PADDR3, 3 .EQU DMA1_PADDR3_PADDR2, 2 .EQU DMA1_PADDR3_PADDR1, 1 .EQU DMA1_PADDR3_PADDR0, 0 // register------------------------------------- .EQU DMA1_PADDR4, 0x4000172C // 0x4000 172C DMA1_PADDR4 Bits------------------------------------- .EQU DMA1_PADDR4_PADDR31, 31 .EQU DMA1_PADDR4_PADDR30, 30 .EQU DMA1_PADDR4_PADDR29, 29 .EQU DMA1_PADDR4_PADDR28, 28 .EQU DMA1_PADDR4_PADDR27, 27 .EQU DMA1_PADDR4_PADDR26, 26 .EQU DMA1_PADDR4_PADDR25, 25 .EQU DMA1_PADDR4_PADDR24, 24 .EQU DMA1_PADDR4_PADDR23, 23 .EQU DMA1_PADDR4_PADDR22, 22 .EQU DMA1_PADDR4_PADDR21, 21 .EQU DMA1_PADDR4_PADDR20, 20 .EQU DMA1_PADDR4_PADDR19, 19 .EQU DMA1_PADDR4_PADDR18, 18 .EQU DMA1_PADDR4_PADDR17, 17 .EQU DMA1_PADDR4_PADDR16, 16 .EQU DMA1_PADDR4_PADDR15, 15 .EQU DMA1_PADDR4_PADDR14, 14 .EQU DMA1_PADDR4_PADDR13, 13 .EQU DMA1_PADDR4_PADDR12, 12 .EQU DMA1_PADDR4_PADDR11, 11 .EQU DMA1_PADDR4_PADDR10, 10 .EQU DMA1_PADDR4_PADDR9, 9 .EQU DMA1_PADDR4_PADDR8, 8 .EQU DMA1_PADDR4_PADDR7, 7 .EQU DMA1_PADDR4_PADDR6, 6 .EQU DMA1_PADDR4_PADDR5, 5 .EQU DMA1_PADDR4_PADDR4, 4 .EQU DMA1_PADDR4_PADDR3, 3 .EQU DMA1_PADDR4_PADDR2, 2 .EQU DMA1_PADDR4_PADDR1, 1 .EQU DMA1_PADDR4_PADDR0, 0 // register------------------------------------- .EQU DMA1_PADDR5, 0x40001730 // 0x4000 1730 DMA1_PADDR5 Bits------------------------------------- .EQU DMA1_PADDR5_PADDR31, 31 .EQU DMA1_PADDR5_PADDR30, 30 .EQU DMA1_PADDR5_PADDR29, 29 .EQU DMA1_PADDR5_PADDR28, 28 .EQU DMA1_PADDR5_PADDR27, 27 .EQU DMA1_PADDR5_PADDR26, 26 .EQU DMA1_PADDR5_PADDR25, 25 .EQU DMA1_PADDR5_PADDR24, 24 .EQU DMA1_PADDR5_PADDR23, 23 .EQU DMA1_PADDR5_PADDR22, 22 .EQU DMA1_PADDR5_PADDR21, 21 .EQU DMA1_PADDR5_PADDR20, 20 .EQU DMA1_PADDR5_PADDR19, 19 .EQU DMA1_PADDR5_PADDR18, 18 .EQU DMA1_PADDR5_PADDR17, 17 .EQU DMA1_PADDR5_PADDR16, 16 .EQU DMA1_PADDR5_PADDR15, 15 .EQU DMA1_PADDR5_PADDR14, 14 .EQU DMA1_PADDR5_PADDR13, 13 .EQU DMA1_PADDR5_PADDR12, 12 .EQU DMA1_PADDR5_PADDR11, 11 .EQU DMA1_PADDR5_PADDR10, 10 .EQU DMA1_PADDR5_PADDR9, 9 .EQU DMA1_PADDR5_PADDR8, 8 .EQU DMA1_PADDR5_PADDR7, 7 .EQU DMA1_PADDR5_PADDR6, 6 .EQU DMA1_PADDR5_PADDR5, 5 .EQU DMA1_PADDR5_PADDR4, 4 .EQU DMA1_PADDR5_PADDR3, 3 .EQU DMA1_PADDR5_PADDR2, 2 .EQU DMA1_PADDR5_PADDR1, 1 .EQU DMA1_PADDR5_PADDR0, 0 // register------------------------------------- .EQU DMA1_PADDR6, 0x40001734 // 0x4000 1734 DMA1_PADDR6 Bits------------------------------------- .EQU DMA1_PADDR6_PADDR31, 31 .EQU DMA1_PADDR6_PADDR30, 30 .EQU DMA1_PADDR6_PADDR29, 29 .EQU DMA1_PADDR6_PADDR28, 28 .EQU DMA1_PADDR6_PADDR27, 27 .EQU DMA1_PADDR6_PADDR26, 26 .EQU DMA1_PADDR6_PADDR25, 25 .EQU DMA1_PADDR6_PADDR24, 24 .EQU DMA1_PADDR6_PADDR23, 23 .EQU DMA1_PADDR6_PADDR22, 22 .EQU DMA1_PADDR6_PADDR21, 21 .EQU DMA1_PADDR6_PADDR20, 20 .EQU DMA1_PADDR6_PADDR19, 19 .EQU DMA1_PADDR6_PADDR18, 18 .EQU DMA1_PADDR6_PADDR17, 17 .EQU DMA1_PADDR6_PADDR16, 16 .EQU DMA1_PADDR6_PADDR15, 15 .EQU DMA1_PADDR6_PADDR14, 14 .EQU DMA1_PADDR6_PADDR13, 13 .EQU DMA1_PADDR6_PADDR12, 12 .EQU DMA1_PADDR6_PADDR11, 11 .EQU DMA1_PADDR6_PADDR10, 10 .EQU DMA1_PADDR6_PADDR9, 9 .EQU DMA1_PADDR6_PADDR8, 8 .EQU DMA1_PADDR6_PADDR7, 7 .EQU DMA1_PADDR6_PADDR6, 6 .EQU DMA1_PADDR6_PADDR5, 5 .EQU DMA1_PADDR6_PADDR4, 4 .EQU DMA1_PADDR6_PADDR3, 3 .EQU DMA1_PADDR6_PADDR2, 2 .EQU DMA1_PADDR6_PADDR1, 1 .EQU DMA1_PADDR6_PADDR0, 0 // register------------------------------------- .EQU DMA1_PADDR7, 0x40001738 // 0x4000 1738 DMA1_PADDR7 Bits------------------------------------- .EQU DMA1_PADDR7_PADDR31, 31 .EQU DMA1_PADDR7_PADDR30, 30 .EQU DMA1_PADDR7_PADDR29, 29 .EQU DMA1_PADDR7_PADDR28, 28 .EQU DMA1_PADDR7_PADDR27, 27 .EQU DMA1_PADDR7_PADDR26, 26 .EQU DMA1_PADDR7_PADDR25, 25 .EQU DMA1_PADDR7_PADDR24, 24 .EQU DMA1_PADDR7_PADDR23, 23 .EQU DMA1_PADDR7_PADDR22, 22 .EQU DMA1_PADDR7_PADDR21, 21 .EQU DMA1_PADDR7_PADDR20, 20 .EQU DMA1_PADDR7_PADDR19, 19 .EQU DMA1_PADDR7_PADDR18, 18 .EQU DMA1_PADDR7_PADDR17, 17 .EQU DMA1_PADDR7_PADDR16, 16 .EQU DMA1_PADDR7_PADDR15, 15 .EQU DMA1_PADDR7_PADDR14, 14 .EQU DMA1_PADDR7_PADDR13, 13 .EQU DMA1_PADDR7_PADDR12, 12 .EQU DMA1_PADDR7_PADDR11, 11 .EQU DMA1_PADDR7_PADDR10, 10 .EQU DMA1_PADDR7_PADDR9, 9 .EQU DMA1_PADDR7_PADDR8, 8 .EQU DMA1_PADDR7_PADDR7, 7 .EQU DMA1_PADDR7_PADDR6, 6 .EQU DMA1_PADDR7_PADDR5, 5 .EQU DMA1_PADDR7_PADDR4, 4 .EQU DMA1_PADDR7_PADDR3, 3 .EQU DMA1_PADDR7_PADDR2, 2 .EQU DMA1_PADDR7_PADDR1, 1 .EQU DMA1_PADDR7_PADDR0, 0 // register------------------------------------- .EQU DMA1_MADDR1, 0x40001740 // 0x4000 1740 DMA1_MADDR1 Bits------------------------------------- .EQU DMA1_MADDR1_MADDR31, 31 .EQU DMA1_MADDR1_MADDR30, 30 .EQU DMA1_MADDR1_MADDR29, 29 .EQU DMA1_MADDR1_MADDR28, 28 .EQU DMA1_MADDR1_MADDR27, 27 .EQU DMA1_MADDR1_MADDR26, 26 .EQU DMA1_MADDR1_MADDR25, 25 .EQU DMA1_MADDR1_MADDR24, 24 .EQU DMA1_MADDR1_MADDR23, 23 .EQU DMA1_MADDR1_MADDR22, 22 .EQU DMA1_MADDR1_MADDR21, 21 .EQU DMA1_MADDR1_MADDR20, 20 .EQU DMA1_MADDR1_MADDR19, 19 .EQU DMA1_MADDR1_MADDR18, 18 .EQU DMA1_MADDR1_MADDR17, 17 .EQU DMA1_MADDR1_MADDR16, 16 .EQU DMA1_MADDR1_MADDR15, 15 .EQU DMA1_MADDR1_MADDR14, 14 .EQU DMA1_MADDR1_MADDR13, 13 .EQU DMA1_MADDR1_MADDR12, 12 .EQU DMA1_MADDR1_MADDR11, 11 .EQU DMA1_MADDR1_MADDR10, 10 .EQU DMA1_MADDR1_MADDR9, 9 .EQU DMA1_MADDR1_MADDR8, 8 .EQU DMA1_MADDR1_MADDR7, 7 .EQU DMA1_MADDR1_MADDR6, 6 .EQU DMA1_MADDR1_MADDR5, 5 .EQU DMA1_MADDR1_MADDR4, 4 .EQU DMA1_MADDR1_MADDR3, 3 .EQU DMA1_MADDR1_MADDR2, 2 .EQU DMA1_MADDR1_MADDR1, 1 .EQU DMA1_MADDR1_MADDR0, 0 // register------------------------------------- .EQU DMA1_MADDR2, 0x40001744 // 0x4000 1744 DMA1_MADDR2 Bits------------------------------------- .EQU DMA1_MADDR2_MADDR31, 31 .EQU DMA1_MADDR2_MADDR30, 30 .EQU DMA1_MADDR2_MADDR29, 29 .EQU DMA1_MADDR2_MADDR28, 28 .EQU DMA1_MADDR2_MADDR27, 27 .EQU DMA1_MADDR2_MADDR26, 26 .EQU DMA1_MADDR2_MADDR25, 25 .EQU DMA1_MADDR2_MADDR24, 24 .EQU DMA1_MADDR2_MADDR23, 23 .EQU DMA1_MADDR2_MADDR22, 22 .EQU DMA1_MADDR2_MADDR21, 21 .EQU DMA1_MADDR2_MADDR20, 20 .EQU DMA1_MADDR2_MADDR19, 19 .EQU DMA1_MADDR2_MADDR18, 18 .EQU DMA1_MADDR2_MADDR17, 17 .EQU DMA1_MADDR2_MADDR16, 16 .EQU DMA1_MADDR2_MADDR15, 15 .EQU DMA1_MADDR2_MADDR14, 14 .EQU DMA1_MADDR2_MADDR13, 13 .EQU DMA1_MADDR2_MADDR12, 12 .EQU DMA1_MADDR2_MADDR11, 11 .EQU DMA1_MADDR2_MADDR10, 10 .EQU DMA1_MADDR2_MADDR9, 9 .EQU DMA1_MADDR2_MADDR8, 8 .EQU DMA1_MADDR2_MADDR7, 7 .EQU DMA1_MADDR2_MADDR6, 6 .EQU DMA1_MADDR2_MADDR5, 5 .EQU DMA1_MADDR2_MADDR4, 4 .EQU DMA1_MADDR2_MADDR3, 3 .EQU DMA1_MADDR2_MADDR2, 2 .EQU DMA1_MADDR2_MADDR1, 1 .EQU DMA1_MADDR2_MADDR0, 0 // register------------------------------------- .EQU DMA1_MADDR3, 0x40001748 // 0x4000 1748 DMA1_MADDR3 Bits------------------------------------- .EQU DMA1_MADDR3_MADDR31, 31 .EQU DMA1_MADDR3_MADDR30, 30 .EQU DMA1_MADDR3_MADDR29, 29 .EQU DMA1_MADDR3_MADDR28, 28 .EQU DMA1_MADDR3_MADDR27, 27 .EQU DMA1_MADDR3_MADDR26, 26 .EQU DMA1_MADDR3_MADDR25, 25 .EQU DMA1_MADDR3_MADDR24, 24 .EQU DMA1_MADDR3_MADDR23, 23 .EQU DMA1_MADDR3_MADDR22, 22 .EQU DMA1_MADDR3_MADDR21, 21 .EQU DMA1_MADDR3_MADDR20, 20 .EQU DMA1_MADDR3_MADDR19, 19 .EQU DMA1_MADDR3_MADDR18, 18 .EQU DMA1_MADDR3_MADDR17, 17 .EQU DMA1_MADDR3_MADDR16, 16 .EQU DMA1_MADDR3_MADDR15, 15 .EQU DMA1_MADDR3_MADDR14, 14 .EQU DMA1_MADDR3_MADDR13, 13 .EQU DMA1_MADDR3_MADDR12, 12 .EQU DMA1_MADDR3_MADDR11, 11 .EQU DMA1_MADDR3_MADDR10, 10 .EQU DMA1_MADDR3_MADDR9, 9 .EQU DMA1_MADDR3_MADDR8, 8 .EQU DMA1_MADDR3_MADDR7, 7 .EQU DMA1_MADDR3_MADDR6, 6 .EQU DMA1_MADDR3_MADDR5, 5 .EQU DMA1_MADDR3_MADDR4, 4 .EQU DMA1_MADDR3_MADDR3, 3 .EQU DMA1_MADDR3_MADDR2, 2 .EQU DMA1_MADDR3_MADDR1, 1 .EQU DMA1_MADDR3_MADDR0, 0 // register------------------------------------- .EQU DMA1_MADDR4, 0x4000174C // 0x4000 174C DMA1_MADDR4 Bits------------------------------------- .EQU DMA1_MADDR4_MADDR31, 31 .EQU DMA1_MADDR4_MADDR30, 30 .EQU DMA1_MADDR4_MADDR29, 29 .EQU DMA1_MADDR4_MADDR28, 28 .EQU DMA1_MADDR4_MADDR27, 27 .EQU DMA1_MADDR4_MADDR26, 26 .EQU DMA1_MADDR4_MADDR25, 25 .EQU DMA1_MADDR4_MADDR24, 24 .EQU DMA1_MADDR4_MADDR23, 23 .EQU DMA1_MADDR4_MADDR22, 22 .EQU DMA1_MADDR4_MADDR21, 21 .EQU DMA1_MADDR4_MADDR20, 20 .EQU DMA1_MADDR4_MADDR19, 19 .EQU DMA1_MADDR4_MADDR18, 18 .EQU DMA1_MADDR4_MADDR17, 17 .EQU DMA1_MADDR4_MADDR16, 16 .EQU DMA1_MADDR4_MADDR15, 15 .EQU DMA1_MADDR4_MADDR14, 14 .EQU DMA1_MADDR4_MADDR13, 13 .EQU DMA1_MADDR4_MADDR12, 12 .EQU DMA1_MADDR4_MADDR11, 11 .EQU DMA1_MADDR4_MADDR10, 10 .EQU DMA1_MADDR4_MADDR9, 9 .EQU DMA1_MADDR4_MADDR8, 8 .EQU DMA1_MADDR4_MADDR7, 7 .EQU DMA1_MADDR4_MADDR6, 6 .EQU DMA1_MADDR4_MADDR5, 5 .EQU DMA1_MADDR4_MADDR4, 4 .EQU DMA1_MADDR4_MADDR3, 3 .EQU DMA1_MADDR4_MADDR2, 2 .EQU DMA1_MADDR4_MADDR1, 1 .EQU DMA1_MADDR4_MADDR0, 0 // register------------------------------------- .EQU DMA1_MADDR5, 0x40001750 // 0x4000 1750 DMA1_MADDR5 Bits------------------------------------- .EQU DMA1_MADDR5_MADDR31, 31 .EQU DMA1_MADDR5_MADDR30, 30 .EQU DMA1_MADDR5_MADDR29, 29 .EQU DMA1_MADDR5_MADDR28, 28 .EQU DMA1_MADDR5_MADDR27, 27 .EQU DMA1_MADDR5_MADDR26, 26 .EQU DMA1_MADDR5_MADDR25, 25 .EQU DMA1_MADDR5_MADDR24, 24 .EQU DMA1_MADDR5_MADDR23, 23 .EQU DMA1_MADDR5_MADDR22, 22 .EQU DMA1_MADDR5_MADDR21, 21 .EQU DMA1_MADDR5_MADDR20, 20 .EQU DMA1_MADDR5_MADDR19, 19 .EQU DMA1_MADDR5_MADDR18, 18 .EQU DMA1_MADDR5_MADDR17, 17 .EQU DMA1_MADDR5_MADDR16, 16 .EQU DMA1_MADDR5_MADDR15, 15 .EQU DMA1_MADDR5_MADDR14, 14 .EQU DMA1_MADDR5_MADDR13, 13 .EQU DMA1_MADDR5_MADDR12, 12 .EQU DMA1_MADDR5_MADDR11, 11 .EQU DMA1_MADDR5_MADDR10, 10 .EQU DMA1_MADDR5_MADDR9, 9 .EQU DMA1_MADDR5_MADDR8, 8 .EQU DMA1_MADDR5_MADDR7, 7 .EQU DMA1_MADDR5_MADDR6, 6 .EQU DMA1_MADDR5_MADDR5, 5 .EQU DMA1_MADDR5_MADDR4, 4 .EQU DMA1_MADDR5_MADDR3, 3 .EQU DMA1_MADDR5_MADDR2, 2 .EQU DMA1_MADDR5_MADDR1, 1 .EQU DMA1_MADDR5_MADDR0, 0 // register------------------------------------- .EQU DMA1_MADDR6, 0x40001754 // 0x4000 1754 DMA1_MADDR6 Bits------------------------------------- .EQU DMA1_MADDR6_MADDR31, 31 .EQU DMA1_MADDR6_MADDR30, 30 .EQU DMA1_MADDR6_MADDR29, 29 .EQU DMA1_MADDR6_MADDR28, 28 .EQU DMA1_MADDR6_MADDR27, 27 .EQU DMA1_MADDR6_MADDR26, 26 .EQU DMA1_MADDR6_MADDR25, 25 .EQU DMA1_MADDR6_MADDR24, 24 .EQU DMA1_MADDR6_MADDR23, 23 .EQU DMA1_MADDR6_MADDR22, 22 .EQU DMA1_MADDR6_MADDR21, 21 .EQU DMA1_MADDR6_MADDR20, 20 .EQU DMA1_MADDR6_MADDR19, 19 .EQU DMA1_MADDR6_MADDR18, 18 .EQU DMA1_MADDR6_MADDR17, 17 .EQU DMA1_MADDR6_MADDR16, 16 .EQU DMA1_MADDR6_MADDR15, 15 .EQU DMA1_MADDR6_MADDR14, 14 .EQU DMA1_MADDR6_MADDR13, 13 .EQU DMA1_MADDR6_MADDR12, 12 .EQU DMA1_MADDR6_MADDR11, 11 .EQU DMA1_MADDR6_MADDR10, 10 .EQU DMA1_MADDR6_MADDR9, 9 .EQU DMA1_MADDR6_MADDR8, 8 .EQU DMA1_MADDR6_MADDR7, 7 .EQU DMA1_MADDR6_MADDR6, 6 .EQU DMA1_MADDR6_MADDR5, 5 .EQU DMA1_MADDR6_MADDR4, 4 .EQU DMA1_MADDR6_MADDR3, 3 .EQU DMA1_MADDR6_MADDR2, 2 .EQU DMA1_MADDR6_MADDR1, 1 .EQU DMA1_MADDR6_MADDR0, 0 // register------------------------------------- .EQU DMA1_MADDR7, 0x40001758 // 0x4000 1758 DMA1_MADDR7 Bits------------------------------------- .EQU DMA1_MADDR7_MADDR31, 31 .EQU DMA1_MADDR7_MADDR30, 30 .EQU DMA1_MADDR7_MADDR29, 29 .EQU DMA1_MADDR7_MADDR28, 28 .EQU DMA1_MADDR7_MADDR27, 27 .EQU DMA1_MADDR7_MADDR26, 26 .EQU DMA1_MADDR7_MADDR25, 25 .EQU DMA1_MADDR7_MADDR24, 24 .EQU DMA1_MADDR7_MADDR23, 23 .EQU DMA1_MADDR7_MADDR22, 22 .EQU DMA1_MADDR7_MADDR21, 21 .EQU DMA1_MADDR7_MADDR20, 20 .EQU DMA1_MADDR7_MADDR19, 19 .EQU DMA1_MADDR7_MADDR18, 18 .EQU DMA1_MADDR7_MADDR17, 17 .EQU DMA1_MADDR7_MADDR16, 16 .EQU DMA1_MADDR7_MADDR15, 15 .EQU DMA1_MADDR7_MADDR14, 14 .EQU DMA1_MADDR7_MADDR13, 13 .EQU DMA1_MADDR7_MADDR12, 12 .EQU DMA1_MADDR7_MADDR11, 11 .EQU DMA1_MADDR7_MADDR10, 10 .EQU DMA1_MADDR7_MADDR9, 9 .EQU DMA1_MADDR7_MADDR8, 8 .EQU DMA1_MADDR7_MADDR7, 7 .EQU DMA1_MADDR7_MADDR6, 6 .EQU DMA1_MADDR7_MADDR5, 5 .EQU DMA1_MADDR7_MADDR4, 4 .EQU DMA1_MADDR7_MADDR3, 3 .EQU DMA1_MADDR7_MADDR2, 2 .EQU DMA1_MADDR7_MADDR1, 1 .EQU DMA1_MADDR7_MADDR0, 0 // register------------------------------------- .EQU DMA1_CPAR1, 0x40001760 // 0x4000 1760 DMA1_CPAR1 Bits------------------------------------- .EQU DMA1_CPAR1_CPAR31, 31 .EQU DMA1_CPAR1_CPAR30, 30 .EQU DMA1_CPAR1_CPAR29, 29 .EQU DMA1_CPAR1_CPAR28, 28 .EQU DMA1_CPAR1_CPAR27, 27 .EQU DMA1_CPAR1_CPAR26, 26 .EQU DMA1_CPAR1_CPAR25, 25 .EQU DMA1_CPAR1_CPAR24, 24 .EQU DMA1_CPAR1_CPAR23, 23 .EQU DMA1_CPAR1_CPAR22, 22 .EQU DMA1_CPAR1_CPAR21, 21 .EQU DMA1_CPAR1_CPAR20, 20 .EQU DMA1_CPAR1_CPAR19, 19 .EQU DMA1_CPAR1_CPAR18, 18 .EQU DMA1_CPAR1_CPAR17, 17 .EQU DMA1_CPAR1_CPAR16, 16 .EQU DMA1_CPAR1_CPAR15, 15 .EQU DMA1_CPAR1_CPAR14, 14 .EQU DMA1_CPAR1_CPAR13, 13 .EQU DMA1_CPAR1_CPAR12, 12 .EQU DMA1_CPAR1_CPAR11, 11 .EQU DMA1_CPAR1_CPAR10, 10 .EQU DMA1_CPAR1_CPAR9, 9 .EQU DMA1_CPAR1_CPAR8, 8 .EQU DMA1_CPAR1_CPAR7, 7 .EQU DMA1_CPAR1_CPAR6, 6 .EQU DMA1_CPAR1_CPAR5, 5 .EQU DMA1_CPAR1_CPAR4, 4 .EQU DMA1_CPAR1_CPAR3, 3 .EQU DMA1_CPAR1_CPAR2, 2 .EQU DMA1_CPAR1_CPAR1, 1 .EQU DMA1_CPAR1_CPAR0, 0 // register------------------------------------- .EQU DMA1_CPAR2, 0x40001764 // 0x4000 1764 DMA1_CPAR2 Bits------------------------------------- .EQU DMA1_CPAR2_CPAR31, 31 .EQU DMA1_CPAR2_CPAR30, 30 .EQU DMA1_CPAR2_CPAR29, 29 .EQU DMA1_CPAR2_CPAR28, 28 .EQU DMA1_CPAR2_CPAR27, 27 .EQU DMA1_CPAR2_CPAR26, 26 .EQU DMA1_CPAR2_CPAR25, 25 .EQU DMA1_CPAR2_CPAR24, 24 .EQU DMA1_CPAR2_CPAR23, 23 .EQU DMA1_CPAR2_CPAR22, 22 .EQU DMA1_CPAR2_CPAR21, 21 .EQU DMA1_CPAR2_CPAR20, 20 .EQU DMA1_CPAR2_CPAR19, 19 .EQU DMA1_CPAR2_CPAR18, 18 .EQU DMA1_CPAR2_CPAR17, 17 .EQU DMA1_CPAR2_CPAR16, 16 .EQU DMA1_CPAR2_CPAR15, 15 .EQU DMA1_CPAR2_CPAR14, 14 .EQU DMA1_CPAR2_CPAR13, 13 .EQU DMA1_CPAR2_CPAR12, 12 .EQU DMA1_CPAR2_CPAR11, 11 .EQU DMA1_CPAR2_CPAR10, 10 .EQU DMA1_CPAR2_CPAR9, 9 .EQU DMA1_CPAR2_CPAR8, 8 .EQU DMA1_CPAR2_CPAR7, 7 .EQU DMA1_CPAR2_CPAR6, 6 .EQU DMA1_CPAR2_CPAR5, 5 .EQU DMA1_CPAR2_CPAR4, 4 .EQU DMA1_CPAR2_CPAR3, 3 .EQU DMA1_CPAR2_CPAR2, 2 .EQU DMA1_CPAR2_CPAR1, 1 .EQU DMA1_CPAR2_CPAR0, 0 // register------------------------------------- .EQU DMA1_CPAR3, 0x40001768 // 0x4000 1768 DMA1_CPAR3 Bits------------------------------------- .EQU DMA1_CPAR3_CPAR31, 31 .EQU DMA1_CPAR3_CPAR30, 30 .EQU DMA1_CPAR3_CPAR29, 29 .EQU DMA1_CPAR3_CPAR28, 28 .EQU DMA1_CPAR3_CPAR27, 27 .EQU DMA1_CPAR3_CPAR26, 26 .EQU DMA1_CPAR3_CPAR25, 25 .EQU DMA1_CPAR3_CPAR24, 24 .EQU DMA1_CPAR3_CPAR23, 23 .EQU DMA1_CPAR3_CPAR22, 22 .EQU DMA1_CPAR3_CPAR21, 21 .EQU DMA1_CPAR3_CPAR20, 20 .EQU DMA1_CPAR3_CPAR19, 19 .EQU DMA1_CPAR3_CPAR18, 18 .EQU DMA1_CPAR3_CPAR17, 17 .EQU DMA1_CPAR3_CPAR16, 16 .EQU DMA1_CPAR3_CPAR15, 15 .EQU DMA1_CPAR3_CPAR14, 14 .EQU DMA1_CPAR3_CPAR13, 13 .EQU DMA1_CPAR3_CPAR12, 12 .EQU DMA1_CPAR3_CPAR11, 11 .EQU DMA1_CPAR3_CPAR10, 10 .EQU DMA1_CPAR3_CPAR9, 9 .EQU DMA1_CPAR3_CPAR8, 8 .EQU DMA1_CPAR3_CPAR7, 7 .EQU DMA1_CPAR3_CPAR6, 6 .EQU DMA1_CPAR3_CPAR5, 5 .EQU DMA1_CPAR3_CPAR4, 4 .EQU DMA1_CPAR3_CPAR3, 3 .EQU DMA1_CPAR3_CPAR2, 2 .EQU DMA1_CPAR3_CPAR1, 1 .EQU DMA1_CPAR3_CPAR0, 0 // register------------------------------------- .EQU DMA1_CPAR4, 0x4000176C // 0x4000 176C DMA1_CPAR4 Bits------------------------------------- .EQU DMA1_CPAR4_CPAR31, 31 .EQU DMA1_CPAR4_CPAR30, 30 .EQU DMA1_CPAR4_CPAR29, 29 .EQU DMA1_CPAR4_CPAR28, 28 .EQU DMA1_CPAR4_CPAR27, 27 .EQU DMA1_CPAR4_CPAR26, 26 .EQU DMA1_CPAR4_CPAR25, 25 .EQU DMA1_CPAR4_CPAR24, 24 .EQU DMA1_CPAR4_CPAR23, 23 .EQU DMA1_CPAR4_CPAR22, 22 .EQU DMA1_CPAR4_CPAR21, 21 .EQU DMA1_CPAR4_CPAR20, 20 .EQU DMA1_CPAR4_CPAR19, 19 .EQU DMA1_CPAR4_CPAR18, 18 .EQU DMA1_CPAR4_CPAR17, 17 .EQU DMA1_CPAR4_CPAR16, 16 .EQU DMA1_CPAR4_CPAR15, 15 .EQU DMA1_CPAR4_CPAR14, 14 .EQU DMA1_CPAR4_CPAR13, 13 .EQU DMA1_CPAR4_CPAR12, 12 .EQU DMA1_CPAR4_CPAR11, 11 .EQU DMA1_CPAR4_CPAR10, 10 .EQU DMA1_CPAR4_CPAR9, 9 .EQU DMA1_CPAR4_CPAR8, 8 .EQU DMA1_CPAR4_CPAR7, 7 .EQU DMA1_CPAR4_CPAR6, 6 .EQU DMA1_CPAR4_CPAR5, 5 .EQU DMA1_CPAR4_CPAR4, 4 .EQU DMA1_CPAR4_CPAR3, 3 .EQU DMA1_CPAR4_CPAR2, 2 .EQU DMA1_CPAR4_CPAR1, 1 .EQU DMA1_CPAR4_CPAR0, 0 // register------------------------------------- .EQU DMA1_CPAR5, 0x40001770 // 0x4000 1770 DMA1_CPAR5 Bits------------------------------------- .EQU DMA1_CPAR5_CPAR31, 31 .EQU DMA1_CPAR5_CPAR30, 30 .EQU DMA1_CPAR5_CPAR29, 29 .EQU DMA1_CPAR5_CPAR28, 28 .EQU DMA1_CPAR5_CPAR27, 27 .EQU DMA1_CPAR5_CPAR26, 26 .EQU DMA1_CPAR5_CPAR25, 25 .EQU DMA1_CPAR5_CPAR24, 24 .EQU DMA1_CPAR5_CPAR23, 23 .EQU DMA1_CPAR5_CPAR22, 22 .EQU DMA1_CPAR5_CPAR21, 21 .EQU DMA1_CPAR5_CPAR20, 20 .EQU DMA1_CPAR5_CPAR19, 19 .EQU DMA1_CPAR5_CPAR18, 18 .EQU DMA1_CPAR5_CPAR17, 17 .EQU DMA1_CPAR5_CPAR16, 16 .EQU DMA1_CPAR5_CPAR15, 15 .EQU DMA1_CPAR5_CPAR14, 14 .EQU DMA1_CPAR5_CPAR13, 13 .EQU DMA1_CPAR5_CPAR12, 12 .EQU DMA1_CPAR5_CPAR11, 11 .EQU DMA1_CPAR5_CPAR10, 10 .EQU DMA1_CPAR5_CPAR9, 9 .EQU DMA1_CPAR5_CPAR8, 8 .EQU DMA1_CPAR5_CPAR7, 7 .EQU DMA1_CPAR5_CPAR6, 6 .EQU DMA1_CPAR5_CPAR5, 5 .EQU DMA1_CPAR5_CPAR4, 4 .EQU DMA1_CPAR5_CPAR3, 3 .EQU DMA1_CPAR5_CPAR2, 2 .EQU DMA1_CPAR5_CPAR1, 1 .EQU DMA1_CPAR5_CPAR0, 0 // register------------------------------------- .EQU DMA1_CPAR6, 0x40001774 // 0x4000 1774 DMA1_CPAR6 Bits------------------------------------- .EQU DMA1_CPAR6_CPAR31, 31 .EQU DMA1_CPAR6_CPAR30, 30 .EQU DMA1_CPAR6_CPAR29, 29 .EQU DMA1_CPAR6_CPAR28, 28 .EQU DMA1_CPAR6_CPAR27, 27 .EQU DMA1_CPAR6_CPAR26, 26 .EQU DMA1_CPAR6_CPAR25, 25 .EQU DMA1_CPAR6_CPAR24, 24 .EQU DMA1_CPAR6_CPAR23, 23 .EQU DMA1_CPAR6_CPAR22, 22 .EQU DMA1_CPAR6_CPAR21, 21 .EQU DMA1_CPAR6_CPAR20, 20 .EQU DMA1_CPAR6_CPAR19, 19 .EQU DMA1_CPAR6_CPAR18, 18 .EQU DMA1_CPAR6_CPAR17, 17 .EQU DMA1_CPAR6_CPAR16, 16 .EQU DMA1_CPAR6_CPAR15, 15 .EQU DMA1_CPAR6_CPAR14, 14 .EQU DMA1_CPAR6_CPAR13, 13 .EQU DMA1_CPAR6_CPAR12, 12 .EQU DMA1_CPAR6_CPAR11, 11 .EQU DMA1_CPAR6_CPAR10, 10 .EQU DMA1_CPAR6_CPAR9, 9 .EQU DMA1_CPAR6_CPAR8, 8 .EQU DMA1_CPAR6_CPAR7, 7 .EQU DMA1_CPAR6_CPAR6, 6 .EQU DMA1_CPAR6_CPAR5, 5 .EQU DMA1_CPAR6_CPAR4, 4 .EQU DMA1_CPAR6_CPAR3, 3 .EQU DMA1_CPAR6_CPAR2, 2 .EQU DMA1_CPAR6_CPAR1, 1 .EQU DMA1_CPAR6_CPAR0, 0 // register------------------------------------- .EQU DMA1_CPAR7, 0x40001778 // 0x4000 1778 DMA1_CPAR7 Bits------------------------------------- .EQU DMA1_CPAR7_CPAR31, 31 .EQU DMA1_CPAR7_CPAR30, 30 .EQU DMA1_CPAR7_CPAR29, 29 .EQU DMA1_CPAR7_CPAR28, 28 .EQU DMA1_CPAR7_CPAR27, 27 .EQU DMA1_CPAR7_CPAR26, 26 .EQU DMA1_CPAR7_CPAR25, 25 .EQU DMA1_CPAR7_CPAR24, 24 .EQU DMA1_CPAR7_CPAR23, 23 .EQU DMA1_CPAR7_CPAR22, 22 .EQU DMA1_CPAR7_CPAR21, 21 .EQU DMA1_CPAR7_CPAR20, 20 .EQU DMA1_CPAR7_CPAR19, 19 .EQU DMA1_CPAR7_CPAR18, 18 .EQU DMA1_CPAR7_CPAR17, 17 .EQU DMA1_CPAR7_CPAR16, 16 .EQU DMA1_CPAR7_CPAR15, 15 .EQU DMA1_CPAR7_CPAR14, 14 .EQU DMA1_CPAR7_CPAR13, 13 .EQU DMA1_CPAR7_CPAR12, 12 .EQU DMA1_CPAR7_CPAR11, 11 .EQU DMA1_CPAR7_CPAR10, 10 .EQU DMA1_CPAR7_CPAR9, 9 .EQU DMA1_CPAR7_CPAR8, 8 .EQU DMA1_CPAR7_CPAR7, 7 .EQU DMA1_CPAR7_CPAR6, 6 .EQU DMA1_CPAR7_CPAR5, 5 .EQU DMA1_CPAR7_CPAR4, 4 .EQU DMA1_CPAR7_CPAR3, 3 .EQU DMA1_CPAR7_CPAR2, 2 .EQU DMA1_CPAR7_CPAR1, 1 .EQU DMA1_CPAR7_CPAR0, 0 // register------------------------------------- .EQU DMA1_CMAR1, 0x40001780 // 0x4000 1780 DMA1_CMAR1 Bits------------------------------------- .EQU DMA1_CMAR1_CMAR31, 31 .EQU DMA1_CMAR1_CMAR30, 30 .EQU DMA1_CMAR1_CMAR29, 29 .EQU DMA1_CMAR1_CMAR28, 28 .EQU DMA1_CMAR1_CMAR27, 27 .EQU DMA1_CMAR1_CMAR26, 26 .EQU DMA1_CMAR1_CMAR25, 25 .EQU DMA1_CMAR1_CMAR24, 24 .EQU DMA1_CMAR1_CMAR23, 23 .EQU DMA1_CMAR1_CMAR22, 22 .EQU DMA1_CMAR1_CMAR21, 21 .EQU DMA1_CMAR1_CMAR20, 20 .EQU DMA1_CMAR1_CMAR19, 19 .EQU DMA1_CMAR1_CMAR18, 18 .EQU DMA1_CMAR1_CMAR17, 17 .EQU DMA1_CMAR1_CMAR16, 16 .EQU DMA1_CMAR1_CMAR15, 15 .EQU DMA1_CMAR1_CMAR14, 14 .EQU DMA1_CMAR1_CMAR13, 13 .EQU DMA1_CMAR1_CMAR12, 12 .EQU DMA1_CMAR1_CMAR11, 11 .EQU DMA1_CMAR1_CMAR10, 10 .EQU DMA1_CMAR1_CMAR9, 9 .EQU DMA1_CMAR1_CMAR8, 8 .EQU DMA1_CMAR1_CMAR7, 7 .EQU DMA1_CMAR1_CMAR6, 6 .EQU DMA1_CMAR1_CMAR5, 5 .EQU DMA1_CMAR1_CMAR4, 4 .EQU DMA1_CMAR1_CMAR3, 3 .EQU DMA1_CMAR1_CMAR2, 2 .EQU DMA1_CMAR1_CMAR1, 1 .EQU DMA1_CMAR1_CMAR0, 0 // register------------------------------------- .EQU DMA1_CMAR2, 0x40001784 // 0x4000 1784 DMA1_CMAR2 Bits------------------------------------- .EQU DMA1_CMAR2_CMAR31, 31 .EQU DMA1_CMAR2_CMAR30, 30 .EQU DMA1_CMAR2_CMAR29, 29 .EQU DMA1_CMAR2_CMAR28, 28 .EQU DMA1_CMAR2_CMAR27, 27 .EQU DMA1_CMAR2_CMAR26, 26 .EQU DMA1_CMAR2_CMAR25, 25 .EQU DMA1_CMAR2_CMAR24, 24 .EQU DMA1_CMAR2_CMAR23, 23 .EQU DMA1_CMAR2_CMAR22, 22 .EQU DMA1_CMAR2_CMAR21, 21 .EQU DMA1_CMAR2_CMAR20, 20 .EQU DMA1_CMAR2_CMAR19, 19 .EQU DMA1_CMAR2_CMAR18, 18 .EQU DMA1_CMAR2_CMAR17, 17 .EQU DMA1_CMAR2_CMAR16, 16 .EQU DMA1_CMAR2_CMAR15, 15 .EQU DMA1_CMAR2_CMAR14, 14 .EQU DMA1_CMAR2_CMAR13, 13 .EQU DMA1_CMAR2_CMAR12, 12 .EQU DMA1_CMAR2_CMAR11, 11 .EQU DMA1_CMAR2_CMAR10, 10 .EQU DMA1_CMAR2_CMAR9, 9 .EQU DMA1_CMAR2_CMAR8, 8 .EQU DMA1_CMAR2_CMAR7, 7 .EQU DMA1_CMAR2_CMAR6, 6 .EQU DMA1_CMAR2_CMAR5, 5 .EQU DMA1_CMAR2_CMAR4, 4 .EQU DMA1_CMAR2_CMAR3, 3 .EQU DMA1_CMAR2_CMAR2, 2 .EQU DMA1_CMAR2_CMAR1, 1 .EQU DMA1_CMAR2_CMAR0, 0 // register------------------------------------- .EQU DMA1_CMAR3, 0x40001788 // 0x4000 1788 DMA1_CMAR3 Bits------------------------------------- .EQU DMA1_CMAR3_CMAR31, 31 .EQU DMA1_CMAR3_CMAR30, 30 .EQU DMA1_CMAR3_CMAR29, 29 .EQU DMA1_CMAR3_CMAR28, 28 .EQU DMA1_CMAR3_CMAR27, 27 .EQU DMA1_CMAR3_CMAR26, 26 .EQU DMA1_CMAR3_CMAR25, 25 .EQU DMA1_CMAR3_CMAR24, 24 .EQU DMA1_CMAR3_CMAR23, 23 .EQU DMA1_CMAR3_CMAR22, 22 .EQU DMA1_CMAR3_CMAR21, 21 .EQU DMA1_CMAR3_CMAR20, 20 .EQU DMA1_CMAR3_CMAR19, 19 .EQU DMA1_CMAR3_CMAR18, 18 .EQU DMA1_CMAR3_CMAR17, 17 .EQU DMA1_CMAR3_CMAR16, 16 .EQU DMA1_CMAR3_CMAR15, 15 .EQU DMA1_CMAR3_CMAR14, 14 .EQU DMA1_CMAR3_CMAR13, 13 .EQU DMA1_CMAR3_CMAR12, 12 .EQU DMA1_CMAR3_CMAR11, 11 .EQU DMA1_CMAR3_CMAR10, 10 .EQU DMA1_CMAR3_CMAR9, 9 .EQU DMA1_CMAR3_CMAR8, 8 .EQU DMA1_CMAR3_CMAR7, 7 .EQU DMA1_CMAR3_CMAR6, 6 .EQU DMA1_CMAR3_CMAR5, 5 .EQU DMA1_CMAR3_CMAR4, 4 .EQU DMA1_CMAR3_CMAR3, 3 .EQU DMA1_CMAR3_CMAR2, 2 .EQU DMA1_CMAR3_CMAR1, 1 .EQU DMA1_CMAR3_CMAR0, 0 // register------------------------------------- .EQU DMA1_CMAR4, 0x4000178C // 0x4000 178C DMA1_CMAR4 Bits------------------------------------- .EQU DMA1_CMAR4_CMAR31, 31 .EQU DMA1_CMAR4_CMAR30, 30 .EQU DMA1_CMAR4_CMAR29, 29 .EQU DMA1_CMAR4_CMAR28, 28 .EQU DMA1_CMAR4_CMAR27, 27 .EQU DMA1_CMAR4_CMAR26, 26 .EQU DMA1_CMAR4_CMAR25, 25 .EQU DMA1_CMAR4_CMAR24, 24 .EQU DMA1_CMAR4_CMAR23, 23 .EQU DMA1_CMAR4_CMAR22, 22 .EQU DMA1_CMAR4_CMAR21, 21 .EQU DMA1_CMAR4_CMAR20, 20 .EQU DMA1_CMAR4_CMAR19, 19 .EQU DMA1_CMAR4_CMAR18, 18 .EQU DMA1_CMAR4_CMAR17, 17 .EQU DMA1_CMAR4_CMAR16, 16 .EQU DMA1_CMAR4_CMAR15, 15 .EQU DMA1_CMAR4_CMAR14, 14 .EQU DMA1_CMAR4_CMAR13, 13 .EQU DMA1_CMAR4_CMAR12, 12 .EQU DMA1_CMAR4_CMAR11, 11 .EQU DMA1_CMAR4_CMAR10, 10 .EQU DMA1_CMAR4_CMAR9, 9 .EQU DMA1_CMAR4_CMAR8, 8 .EQU DMA1_CMAR4_CMAR7, 7 .EQU DMA1_CMAR4_CMAR6, 6 .EQU DMA1_CMAR4_CMAR5, 5 .EQU DMA1_CMAR4_CMAR4, 4 .EQU DMA1_CMAR4_CMAR3, 3 .EQU DMA1_CMAR4_CMAR2, 2 .EQU DMA1_CMAR4_CMAR1, 1 .EQU DMA1_CMAR4_CMAR0, 0 // register------------------------------------- .EQU DMA1_CMAR5, 0x40001790 // 0x4000 1790 DMA1_CMAR5 Bits------------------------------------- .EQU DMA1_CMAR5_CMAR31, 31 .EQU DMA1_CMAR5_CMAR30, 30 .EQU DMA1_CMAR5_CMAR29, 29 .EQU DMA1_CMAR5_CMAR28, 28 .EQU DMA1_CMAR5_CMAR27, 27 .EQU DMA1_CMAR5_CMAR26, 26 .EQU DMA1_CMAR5_CMAR25, 25 .EQU DMA1_CMAR5_CMAR24, 24 .EQU DMA1_CMAR5_CMAR23, 23 .EQU DMA1_CMAR5_CMAR22, 22 .EQU DMA1_CMAR5_CMAR21, 21 .EQU DMA1_CMAR5_CMAR20, 20 .EQU DMA1_CMAR5_CMAR19, 19 .EQU DMA1_CMAR5_CMAR18, 18 .EQU DMA1_CMAR5_CMAR17, 17 .EQU DMA1_CMAR5_CMAR16, 16 .EQU DMA1_CMAR5_CMAR15, 15 .EQU DMA1_CMAR5_CMAR14, 14 .EQU DMA1_CMAR5_CMAR13, 13 .EQU DMA1_CMAR5_CMAR12, 12 .EQU DMA1_CMAR5_CMAR11, 11 .EQU DMA1_CMAR5_CMAR10, 10 .EQU DMA1_CMAR5_CMAR9, 9 .EQU DMA1_CMAR5_CMAR8, 8 .EQU DMA1_CMAR5_CMAR7, 7 .EQU DMA1_CMAR5_CMAR6, 6 .EQU DMA1_CMAR5_CMAR5, 5 .EQU DMA1_CMAR5_CMAR4, 4 .EQU DMA1_CMAR5_CMAR3, 3 .EQU DMA1_CMAR5_CMAR2, 2 .EQU DMA1_CMAR5_CMAR1, 1 .EQU DMA1_CMAR5_CMAR0, 0 // register------------------------------------- .EQU DMA1_CMAR6, 0x40001794 // 0x4000 1794 DMA1_CMAR6 Bits------------------------------------- .EQU DMA1_CMAR6_CMAR31, 31 .EQU DMA1_CMAR6_CMAR30, 30 .EQU DMA1_CMAR6_CMAR29, 29 .EQU DMA1_CMAR6_CMAR28, 28 .EQU DMA1_CMAR6_CMAR27, 27 .EQU DMA1_CMAR6_CMAR26, 26 .EQU DMA1_CMAR6_CMAR25, 25 .EQU DMA1_CMAR6_CMAR24, 24 .EQU DMA1_CMAR6_CMAR23, 23 .EQU DMA1_CMAR6_CMAR22, 22 .EQU DMA1_CMAR6_CMAR21, 21 .EQU DMA1_CMAR6_CMAR20, 20 .EQU DMA1_CMAR6_CMAR19, 19 .EQU DMA1_CMAR6_CMAR18, 18 .EQU DMA1_CMAR6_CMAR17, 17 .EQU DMA1_CMAR6_CMAR16, 16 .EQU DMA1_CMAR6_CMAR15, 15 .EQU DMA1_CMAR6_CMAR14, 14 .EQU DMA1_CMAR6_CMAR13, 13 .EQU DMA1_CMAR6_CMAR12, 12 .EQU DMA1_CMAR6_CMAR11, 11 .EQU DMA1_CMAR6_CMAR10, 10 .EQU DMA1_CMAR6_CMAR9, 9 .EQU DMA1_CMAR6_CMAR8, 8 .EQU DMA1_CMAR6_CMAR7, 7 .EQU DMA1_CMAR6_CMAR6, 6 .EQU DMA1_CMAR6_CMAR5, 5 .EQU DMA1_CMAR6_CMAR4, 4 .EQU DMA1_CMAR6_CMAR3, 3 .EQU DMA1_CMAR6_CMAR2, 2 .EQU DMA1_CMAR6_CMAR1, 1 .EQU DMA1_CMAR6_CMAR0, 0 // register------------------------------------- .EQU DMA1_CMAR7, 0x40001798 // 0x4000 1798 DMA1_CMAR7 Bits------------------------------------- .EQU DMA1_CMAR7_CMAR31, 31 .EQU DMA1_CMAR7_CMAR30, 30 .EQU DMA1_CMAR7_CMAR29, 29 .EQU DMA1_CMAR7_CMAR28, 28 .EQU DMA1_CMAR7_CMAR27, 27 .EQU DMA1_CMAR7_CMAR26, 26 .EQU DMA1_CMAR7_CMAR25, 25 .EQU DMA1_CMAR7_CMAR24, 24 .EQU DMA1_CMAR7_CMAR23, 23 .EQU DMA1_CMAR7_CMAR22, 22 .EQU DMA1_CMAR7_CMAR21, 21 .EQU DMA1_CMAR7_CMAR20, 20 .EQU DMA1_CMAR7_CMAR19, 19 .EQU DMA1_CMAR7_CMAR18, 18 .EQU DMA1_CMAR7_CMAR17, 17 .EQU DMA1_CMAR7_CMAR16, 16 .EQU DMA1_CMAR7_CMAR15, 15 .EQU DMA1_CMAR7_CMAR14, 14 .EQU DMA1_CMAR7_CMAR13, 13 .EQU DMA1_CMAR7_CMAR12, 12 .EQU DMA1_CMAR7_CMAR11, 11 .EQU DMA1_CMAR7_CMAR10, 10 .EQU DMA1_CMAR7_CMAR9, 9 .EQU DMA1_CMAR7_CMAR8, 8 .EQU DMA1_CMAR7_CMAR7, 7 .EQU DMA1_CMAR7_CMAR6, 6 .EQU DMA1_CMAR7_CMAR5, 5 .EQU DMA1_CMAR7_CMAR4, 4 .EQU DMA1_CMAR7_CMAR3, 3 .EQU DMA1_CMAR7_CMAR2, 2 .EQU DMA1_CMAR7_CMAR1, 1 .EQU DMA1_CMAR7_CMAR0, 0 // register------------------------------------- .EQU DMA1_NCT1, 0x400017A0 // 0x4000 17A0 DMA1_NCT1 Bits------------------------------------- .EQU DMA1_NCT1_NCT31, 31 .EQU DMA1_NCT1_NCT30, 30 .EQU DMA1_NCT1_NCT29, 29 .EQU DMA1_NCT1_NCT28, 28 .EQU DMA1_NCT1_NCT27, 27 .EQU DMA1_NCT1_NCT26, 26 .EQU DMA1_NCT1_NCT25, 25 .EQU DMA1_NCT1_NCT24, 24 .EQU DMA1_NCT1_NCT23, 23 .EQU DMA1_NCT1_NCT22, 22 .EQU DMA1_NCT1_NCT21, 21 .EQU DMA1_NCT1_NCT20, 20 .EQU DMA1_NCT1_NCT19, 19 .EQU DMA1_NCT1_NCT18, 18 .EQU DMA1_NCT1_NCT17, 17 .EQU DMA1_NCT1_NCT16, 16 // register------------------------------------- .EQU DMA1_NCT2, 0x400017A4 // 0x4000 17A4 DMA1_NCT2 Bits------------------------------------- .EQU DMA1_NCT2_NCT31, 31 .EQU DMA1_NCT2_NCT30, 30 .EQU DMA1_NCT2_NCT29, 29 .EQU DMA1_NCT2_NCT28, 28 .EQU DMA1_NCT2_NCT27, 27 .EQU DMA1_NCT2_NCT26, 26 .EQU DMA1_NCT2_NCT25, 25 .EQU DMA1_NCT2_NCT24, 24 .EQU DMA1_NCT2_NCT23, 23 .EQU DMA1_NCT2_NCT22, 22 .EQU DMA1_NCT2_NCT21, 21 .EQU DMA1_NCT2_NCT20, 20 .EQU DMA1_NCT2_NCT19, 19 .EQU DMA1_NCT2_NCT18, 18 .EQU DMA1_NCT2_NCT17, 17 .EQU DMA1_NCT2_NCT16, 16 // register------------------------------------- .EQU DMA1_NCT3, 0x400017A8 // 0x4000 17A8 DMA1_NCT3 Bits------------------------------------- .EQU DMA1_NCT3_NCT31, 31 .EQU DMA1_NCT3_NCT30, 30 .EQU DMA1_NCT3_NCT29, 29 .EQU DMA1_NCT3_NCT28, 28 .EQU DMA1_NCT3_NCT27, 27 .EQU DMA1_NCT3_NCT26, 26 .EQU DMA1_NCT3_NCT25, 25 .EQU DMA1_NCT3_NCT24, 24 .EQU DMA1_NCT3_NCT23, 23 .EQU DMA1_NCT3_NCT22, 22 .EQU DMA1_NCT3_NCT21, 21 .EQU DMA1_NCT3_NCT20, 20 .EQU DMA1_NCT3_NCT19, 19 .EQU DMA1_NCT3_NCT18, 18 .EQU DMA1_NCT3_NCT17, 17 .EQU DMA1_NCT3_NCT16, 16 // register------------------------------------- .EQU DMA1_NCT4, 0x400017AC // 0x4000 17AC DMA1_NCT4 Bits------------------------------------- .EQU DMA1_NCT4_NCT31, 31 .EQU DMA1_NCT4_NCT30, 30 .EQU DMA1_NCT4_NCT29, 29 .EQU DMA1_NCT4_NCT28, 28 .EQU DMA1_NCT4_NCT27, 27 .EQU DMA1_NCT4_NCT26, 26 .EQU DMA1_NCT4_NCT25, 25 .EQU DMA1_NCT4_NCT24, 24 .EQU DMA1_NCT4_NCT23, 23 .EQU DMA1_NCT4_NCT22, 22 .EQU DMA1_NCT4_NCT21, 21 .EQU DMA1_NCT4_NCT20, 20 .EQU DMA1_NCT4_NCT19, 19 .EQU DMA1_NCT4_NCT18, 18 .EQU DMA1_NCT4_NCT17, 17 .EQU DMA1_NCT4_NCT16, 16 // register------------------------------------- .EQU DMA1_NCT5, 0x400017B0 // 0x4000 17B0 DMA1_NCT5 Bits------------------------------------- .EQU DMA1_NCT5_NCT31, 31 .EQU DMA1_NCT5_NCT30, 30 .EQU DMA1_NCT5_NCT29, 29 .EQU DMA1_NCT5_NCT28, 28 .EQU DMA1_NCT5_NCT27, 27 .EQU DMA1_NCT5_NCT26, 26 .EQU DMA1_NCT5_NCT25, 25 .EQU DMA1_NCT5_NCT24, 24 .EQU DMA1_NCT5_NCT23, 23 .EQU DMA1_NCT5_NCT22, 22 .EQU DMA1_NCT5_NCT21, 21 .EQU DMA1_NCT5_NCT20, 20 .EQU DMA1_NCT5_NCT19, 19 .EQU DMA1_NCT5_NCT18, 18 .EQU DMA1_NCT5_NCT17, 17 .EQU DMA1_NCT5_NCT16, 16 // register------------------------------------- .EQU DMA1_NCT6, 0x400017B4 // 0x4000 17B4 DMA1_NCT6 Bits------------------------------------- .EQU DMA1_NCT6_NCT31, 31 .EQU DMA1_NCT6_NCT30, 30 .EQU DMA1_NCT6_NCT29, 29 .EQU DMA1_NCT6_NCT28, 28 .EQU DMA1_NCT6_NCT27, 27 .EQU DMA1_NCT6_NCT26, 26 .EQU DMA1_NCT6_NCT25, 25 .EQU DMA1_NCT6_NCT24, 24 .EQU DMA1_NCT6_NCT23, 23 .EQU DMA1_NCT6_NCT22, 22 .EQU DMA1_NCT6_NCT21, 21 .EQU DMA1_NCT6_NCT20, 20 .EQU DMA1_NCT6_NCT19, 19 .EQU DMA1_NCT6_NCT18, 18 .EQU DMA1_NCT6_NCT17, 17 .EQU DMA1_NCT6_NCT16, 16 // register------------------------------------- .EQU DMA1_NCT7, 0x400017B8 // 0x4000 17B8 DMA1_NCT7 Bits------------------------------------- .EQU DMA1_NCT7_NCT31, 31 .EQU DMA1_NCT7_NCT30, 30 .EQU DMA1_NCT7_NCT29, 29 .EQU DMA1_NCT7_NCT28, 28 .EQU DMA1_NCT7_NCT27, 27 .EQU DMA1_NCT7_NCT26, 26 .EQU DMA1_NCT7_NCT25, 25 .EQU DMA1_NCT7_NCT24, 24 .EQU DMA1_NCT7_NCT23, 23 .EQU DMA1_NCT7_NCT22, 22 .EQU DMA1_NCT7_NCT21, 21 .EQU DMA1_NCT7_NCT20, 20 .EQU DMA1_NCT7_NCT19, 19 .EQU DMA1_NCT7_NCT18, 18 .EQU DMA1_NCT7_NCT17, 17 .EQU DMA1_NCT7_NCT16, 16 // register------------------------------------- .EQU DMA1_LIFR, 0x400017C0 // 0x4000 17C0 DMA1_LIFR Bits------------------------------------- .EQU DMA1_LIFR_ETIF7, 20 .EQU DMA1_LIFR_HTIF7, 19 .EQU DMA1_LIFR_FTIF7, 18 .EQU DMA1_LIFR_ETIF6, 17 .EQU DMA1_LIFR_HTIF6, 16 .EQU DMA1_LIFR_FTIF6, 15 .EQU DMA1_LIFR_ETIF5, 14 .EQU DMA1_LIFR_HTIF5, 13 .EQU DMA1_LIFR_FTIF5, 12 .EQU DMA1_LIFR_ETIF4, 11 .EQU DMA1_LIFR_HTIF4, 10 .EQU DMA1_LIFR_FTIF4, 9 .EQU DMA1_LIFR_ETIF3, 8 .EQU DMA1_LIFR_HTIF3, 7 .EQU DMA1_LIFR_FTIF3, 6 .EQU DMA1_LIFR_ETIF2, 5 .EQU DMA1_LIFR_HTIF2, 4 .EQU DMA1_LIFR_FTIF2, 3 .EQU DMA1_LIFR_ETIF1, 2 .EQU DMA1_LIFR_HTIF1, 1 .EQU DMA1_LIFR_FTIF1, 0 // register------------------------------------- .EQU DMA1_LIER, 0x400017C4 // 0x4000 17C4 DMA1_LIER Bits------------------------------------- .EQU DMA1_LIER_ETIE7, 20 .EQU DMA1_LIER_HTIE7, 19 .EQU DMA1_LIER_FTIE7, 18 .EQU DMA1_LIER_ETIE6, 17 .EQU DMA1_LIER_HTIE6, 16 .EQU DMA1_LIER_FTIE6, 15 .EQU DMA1_LIER_ETIE5, 14 .EQU DMA1_LIER_HTIE5, 13 .EQU DMA1_LIER_FTIE5, 12 .EQU DMA1_LIER_ETIE4, 11 .EQU DMA1_LIER_HTIE4, 10 .EQU DMA1_LIER_FTIE4, 9 .EQU DMA1_LIER_ETIE3, 8 .EQU DMA1_LIER_HTIE3, 7 .EQU DMA1_LIER_FTIE3, 6 .EQU DMA1_LIER_ETIE2, 5 .EQU DMA1_LIER_HTIE2, 4 .EQU DMA1_LIER_FTIE2, 3 .EQU DMA1_LIER_ETIE1, 2 .EQU DMA1_LIER_HTIE1, 1 .EQU DMA1_LIER_FTIE1, 0 // register------------------------------------- .EQU DMA1_MUXL, 0x400017C8 // 0x4000 17C8 DMA1_MUXL Bits------------------------------------- .EQU DMA1_MUXL_TRGEN4, 31 .EQU DMA1_MUXL_SOURCE4_5, 29 .EQU DMA1_MUXL_SOURCE4_4, 28 .EQU DMA1_MUXL_SOURCE4_3, 27 .EQU DMA1_MUXL_SOURCE4_2, 26 .EQU DMA1_MUXL_SOURCE4_1, 25 .EQU DMA1_MUXL_SOURCE4_0, 24 .EQU DMA1_MUXL_TRGEN3, 23 .EQU DMA1_MUXL_SOURCE3_5, 21 .EQU DMA1_MUXL_SOURCE3_4, 20 .EQU DMA1_MUXL_SOURCE3_3, 19 .EQU DMA1_MUXL_SOURCE3_2, 18 .EQU DMA1_MUXL_SOURCE3_1, 17 .EQU DMA1_MUXL_SOURCE3_0, 16 .EQU DMA1_MUXL_TRGEN2, 15 .EQU DMA1_MUXL_SOURCE2_5, 13 .EQU DMA1_MUXL_SOURCE2_4, 12 .EQU DMA1_MUXL_SOURCE2_3, 11 .EQU DMA1_MUXL_SOURCE2_2, 10 .EQU DMA1_MUXL_SOURCE2_1, 9 .EQU DMA1_MUXL_SOURCE2_0, 8 .EQU DMA1_MUXL_TRGEN1, 7 .EQU DMA1_MUXL_SOURCE1_5, 5 .EQU DMA1_MUXL_SOURCE1_4, 4 .EQU DMA1_MUXL_SOURCE1_3, 3 .EQU DMA1_MUXL_SOURCE1_2, 2 .EQU DMA1_MUXL_SOURCE1_1, 1 .EQU DMA1_MUXL_SOURCE1_0, 0 // register------------------------------------- .EQU DMA1_MUXH, 0x400017CC // 0x4000 17CC DMA1_MUXH Bits------------------------------------- .EQU DMA1_MUXH_TRGEN7, 23 .EQU DMA1_MUXH_SOURCE7_5, 21 .EQU DMA1_MUXH_SOURCE7_4, 20 .EQU DMA1_MUXH_SOURCE7_3, 19 .EQU DMA1_MUXH_SOURCE7_2, 18 .EQU DMA1_MUXH_SOURCE7_1, 17 .EQU DMA1_MUXH_SOURCE7_0, 16 .EQU DMA1_MUXH_TRGEN6, 15 .EQU DMA1_MUXH_SOURCE6_5, 13 .EQU DMA1_MUXH_SOURCE6_4, 12 .EQU DMA1_MUXH_SOURCE6_3, 11 .EQU DMA1_MUXH_SOURCE6_2, 10 .EQU DMA1_MUXH_SOURCE6_1, 9 .EQU DMA1_MUXH_SOURCE6_0, 8 .EQU DMA1_MUXH_TRGEN5, 7 .EQU DMA1_MUXH_SOURCE5_5, 5 .EQU DMA1_MUXH_SOURCE5_4, 4 .EQU DMA1_MUXH_SOURCE5_3, 3 .EQU DMA1_MUXH_SOURCE5_2, 2 .EQU DMA1_MUXH_SOURCE5_1, 1 .EQU DMA1_MUXH_SOURCE5_0, 0 // register------------------------------------- .EQU T14_CNT, 0x40001800 // 0x4000 1800 T14_CNT Bits------------------------------------- .EQU T14_CNT_TXCNT15, 15 .EQU T14_CNT_TXCNT14, 14 .EQU T14_CNT_TXCNT13, 13 .EQU T14_CNT_TXCNT12, 12 .EQU T14_CNT_TXCNT11, 11 .EQU T14_CNT_TXCNT10, 10 .EQU T14_CNT_TXCNT9, 9 .EQU T14_CNT_TXCNT8, 8 .EQU T14_CNT_TXCNT7, 7 .EQU T14_CNT_TXCNT6, 6 .EQU T14_CNT_TXCNT5, 5 .EQU T14_CNT_TXCNT4, 4 .EQU T14_CNT_TXCNT3, 3 .EQU T14_CNT_TXCNT2, 2 .EQU T14_CNT_TXCNT1, 1 .EQU T14_CNT_TXCNT0, 0 // register------------------------------------- .EQU T14_CTL1, 0x40001804 // 0x4000 1804 T14_CTL1 Bits------------------------------------- .EQU T14_CTL1_TCKSEL1, 12 .EQU T14_CTL1_TCKSEL0, 11 .EQU T14_CTL1_TRGSEL1, 10 .EQU T14_CTL1_TRGSEL0, 9 .EQU T14_CTL1_TXCMS2, 8 .EQU T14_CTL1_TXCMS1, 7 .EQU T14_CTL1_TXCMS0, 6 .EQU T14_CTL1_TXDIR, 5 .EQU T14_CTL1_TXCLK1, 4 .EQU T14_CTL1_TXCLK0, 3 .EQU T14_CTL1_TXSY, 2 .EQU T14_CTL1_TXCS, 1 .EQU T14_CTL1_TXEN, 0 // register------------------------------------- .EQU T14_CTL2, 0x40001808 // 0x4000 1808 T14_CTL2 Bits------------------------------------- .EQU T14_CTL2_TXTRG, 15 .EQU T14_CTL2_PXSPM, 14 .EQU T14_CTL2_PXSPMST, 13 .EQU T14_CTL2_TXUR, 12 .EQU T14_CTL2_TXMSSYNC, 11 .EQU T14_CTL2_TXTS3, 10 .EQU T14_CTL2_TXTS2, 9 .EQU T14_CTL2_TXTS1, 8 .EQU T14_CTL2_TXTS0, 7 .EQU T14_CTL2_TXSMS2, 6 .EQU T14_CTL2_TXSMS1, 5 .EQU T14_CTL2_TXSMS0, 4 .EQU T14_CTL2_TXMMS1, 3 .EQU T14_CTL2_TXMMS0, 2 .EQU T14_CTL2_TXUDEVT, 1 .EQU T14_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T14_PRSC, 0x4000180C // 0x4000 180C T14_PRSC Bits------------------------------------- .EQU T14_PRSC_TXCKS15, 15 .EQU T14_PRSC_TXCKS14, 14 .EQU T14_PRSC_TXCKS13, 13 .EQU T14_PRSC_TXCKS12, 12 .EQU T14_PRSC_TXCKS11, 11 .EQU T14_PRSC_TXCKS10, 10 .EQU T14_PRSC_TXCKS9, 9 .EQU T14_PRSC_TXCKS8, 8 .EQU T14_PRSC_TXCKS7, 7 .EQU T14_PRSC_TXCKS6, 6 .EQU T14_PRSC_TXCKS5, 5 .EQU T14_PRSC_TXCKS4, 4 .EQU T14_PRSC_TXCKS3, 3 .EQU T14_PRSC_TXCKS2, 2 .EQU T14_PRSC_TXCKS1, 1 .EQU T14_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T14_PPX, 0x40001810 // 0x4000 1810 T14_PPX Bits------------------------------------- .EQU T14_PPX_PPX15, 15 .EQU T14_PPX_PPX14, 14 .EQU T14_PPX_PPX13, 13 .EQU T14_PPX_PPX12, 12 .EQU T14_PPX_PPX11, 11 .EQU T14_PPX_PPX10, 10 .EQU T14_PPX_PPX9, 9 .EQU T14_PPX_PPX8, 8 .EQU T14_PPX_PPX7, 7 .EQU T14_PPX_PPX6, 6 .EQU T14_PPX_PPX5, 5 .EQU T14_PPX_PPX4, 4 .EQU T14_PPX_PPX3, 3 .EQU T14_PPX_PPX2, 2 .EQU T14_PPX_PPX1, 1 .EQU T14_PPX_PPX0, 0 // register------------------------------------- .EQU T14_DIER, 0x40001814 // 0x4000 1814 T14_DIER Bits------------------------------------- .EQU T14_DIER_TXTDE, 4 .EQU T14_DIER_TXUDE, 3 .EQU T14_DIER_TXIE, 2 .EQU T14_DIER_TXTIE, 1 .EQU T14_DIER_TXUIE, 0 // register------------------------------------- .EQU T14_SR, 0x40001818 // 0x4000 1818 T14_SR Bits------------------------------------- .EQU T14_SR_TXUDF, 4 .EQU T14_SR_TXTDF, 3 .EQU T14_SR_TXIF, 2 .EQU T14_SR_TXTIF, 1 .EQU T14_SR_TXUIF, 0 // register------------------------------------- .EQU T14_SRIC, 0x4000181C // 0x4000 181C T14_SRIC Bits------------------------------------- .EQU T14_SRIC_TXIC, 2 .EQU T14_SRIC_TXTIC, 1 .EQU T14_SRIC_TXUIC, 0 // register------------------------------------- .EQU T18_CNT, 0x40001A80 // 0x4000 1A80 T18_CNT Bits------------------------------------- .EQU T18_CNT_TXCNT15, 15 .EQU T18_CNT_TXCNT14, 14 .EQU T18_CNT_TXCNT13, 13 .EQU T18_CNT_TXCNT12, 12 .EQU T18_CNT_TXCNT11, 11 .EQU T18_CNT_TXCNT10, 10 .EQU T18_CNT_TXCNT9, 9 .EQU T18_CNT_TXCNT8, 8 .EQU T18_CNT_TXCNT7, 7 .EQU T18_CNT_TXCNT6, 6 .EQU T18_CNT_TXCNT5, 5 .EQU T18_CNT_TXCNT4, 4 .EQU T18_CNT_TXCNT3, 3 .EQU T18_CNT_TXCNT2, 2 .EQU T18_CNT_TXCNT1, 1 .EQU T18_CNT_TXCNT0, 0 // register------------------------------------- .EQU T18_CTL1, 0x40001A84 // 0x4000 1A84 T18_CTL1 Bits------------------------------------- .EQU T18_CTL1_TXIF, 13 .EQU T18_CTL1_TXIE, 12 .EQU T18_CTL1_TXCMS2, 10 .EQU T18_CTL1_TXCMS1, 9 .EQU T18_CTL1_TXCMS0, 8 .EQU T18_CTL1_TXDIR, 7 .EQU T18_CTL1_TXCLK1, 6 .EQU T18_CTL1_TXCLK0, 5 .EQU T18_CTL1_TXSY, 3 .EQU T18_CTL1_TXCS, 1 .EQU T18_CTL1_TXEN, 0 // register------------------------------------- .EQU T18_CTL2, 0x40001A88 // 0x4000 1A88 T18_CTL2 Bits------------------------------------- .EQU T18_CTL2_TRGSEL1, 15 .EQU T18_CTL2_TRGSEL0, 14 .EQU T18_CTL2_TXUR, 13 .EQU T18_CTL2_TXMSSYNC, 12 .EQU T18_CTL2_TXTS3, 11 .EQU T18_CTL2_TXTS2, 10 .EQU T18_CTL2_TXTS1, 9 .EQU T18_CTL2_TXTS0, 8 .EQU T18_CTL2_TXSMS2, 7 .EQU T18_CTL2_TXSMS1, 6 .EQU T18_CTL2_TXSMS0, 5 .EQU T18_CTL2_TXMMS2, 4 .EQU T18_CTL2_TXMMS1, 3 .EQU T18_CTL2_TXMMS0, 2 .EQU T18_CTL2_TXUDEVT, 1 .EQU T18_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T18_PRSC, 0x40001A8C // 0x4000 1A8C T18_PRSC Bits------------------------------------- .EQU T18_PRSC_TXCKS15, 15 .EQU T18_PRSC_TXCKS14, 14 .EQU T18_PRSC_TXCKS13, 13 .EQU T18_PRSC_TXCKS12, 12 .EQU T18_PRSC_TXCKS11, 11 .EQU T18_PRSC_TXCKS10, 10 .EQU T18_PRSC_TXCKS9, 9 .EQU T18_PRSC_TXCKS8, 8 .EQU T18_PRSC_TXCKS7, 7 .EQU T18_PRSC_TXCKS6, 6 .EQU T18_PRSC_TXCKS5, 5 .EQU T18_PRSC_TXCKS4, 4 .EQU T18_PRSC_TXCKS3, 3 .EQU T18_PRSC_TXCKS2, 2 .EQU T18_PRSC_TXCKS1, 1 .EQU T18_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T18_PPX, 0x40001A90 // 0x4000 1A90 T18_PPX Bits------------------------------------- .EQU T18_PPX_PPX15, 15 .EQU T18_PPX_PPX14, 14 .EQU T18_PPX_PPX13, 13 .EQU T18_PPX_PPX12, 12 .EQU T18_PPX_PPX11, 11 .EQU T18_PPX_PPX10, 10 .EQU T18_PPX_PPX9, 9 .EQU T18_PPX_PPX8, 8 .EQU T18_PPX_PPX7, 7 .EQU T18_PPX_PPX6, 6 .EQU T18_PPX_PPX5, 5 .EQU T18_PPX_PPX4, 4 .EQU T18_PPX_PPX3, 3 .EQU T18_PPX_PPX2, 2 .EQU T18_PPX_PPX1, 1 .EQU T18_PPX_PPX0, 0 // register------------------------------------- .EQU T18_UDTIM, 0x40001A94 // 0x4000 1A94 T18_UDTIM Bits------------------------------------- .EQU T18_UDTIM_TXUD7, 7 .EQU T18_UDTIM_TXUD6, 6 .EQU T18_UDTIM_TXUD5, 5 .EQU T18_UDTIM_TXUD4, 4 .EQU T18_UDTIM_TXUD3, 3 .EQU T18_UDTIM_TXUD2, 2 .EQU T18_UDTIM_TXUD1, 1 .EQU T18_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP18_C1, 0x40001AA0 // 0x4000 1AA0 CCP18_C1 Bits------------------------------------- .EQU CCP18_C1_CCPXCY15, 15 .EQU CCP18_C1_CCPXCY14, 14 .EQU CCP18_C1_CCPXCY13, 13 .EQU CCP18_C1_CCPXCY12, 12 .EQU CCP18_C1_CCPXCY11, 11 .EQU CCP18_C1_CCPXCY10, 10 .EQU CCP18_C1_CCPXCY9, 9 .EQU CCP18_C1_CCPXCY8, 8 .EQU CCP18_C1_CCPXCY7, 7 .EQU CCP18_C1_CCPXCY6, 6 .EQU CCP18_C1_CCPXCY5, 5 .EQU CCP18_C1_CCPXCY4, 4 .EQU CCP18_C1_CCPXCY3, 3 .EQU CCP18_C1_CCPXCY2, 2 .EQU CCP18_C1_CCPXCY1, 1 .EQU CCP18_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP18_C2, 0x40001AA4 // 0x4000 1AA4 CCP18_C2 Bits------------------------------------- .EQU CCP18_C2_CCPXCY15, 15 .EQU CCP18_C2_CCPXCY14, 14 .EQU CCP18_C2_CCPXCY13, 13 .EQU CCP18_C2_CCPXCY12, 12 .EQU CCP18_C2_CCPXCY11, 11 .EQU CCP18_C2_CCPXCY10, 10 .EQU CCP18_C2_CCPXCY9, 9 .EQU CCP18_C2_CCPXCY8, 8 .EQU CCP18_C2_CCPXCY7, 7 .EQU CCP18_C2_CCPXCY6, 6 .EQU CCP18_C2_CCPXCY5, 5 .EQU CCP18_C2_CCPXCY4, 4 .EQU CCP18_C2_CCPXCY3, 3 .EQU CCP18_C2_CCPXCY2, 2 .EQU CCP18_C2_CCPXCY1, 1 .EQU CCP18_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP18_C3, 0x40001AA8 // 0x4000 1AA8 CCP18_C3 Bits------------------------------------- .EQU CCP18_C3_CCPXCY15, 15 .EQU CCP18_C3_CCPXCY14, 14 .EQU CCP18_C3_CCPXCY13, 13 .EQU CCP18_C3_CCPXCY12, 12 .EQU CCP18_C3_CCPXCY11, 11 .EQU CCP18_C3_CCPXCY10, 10 .EQU CCP18_C3_CCPXCY9, 9 .EQU CCP18_C3_CCPXCY8, 8 .EQU CCP18_C3_CCPXCY7, 7 .EQU CCP18_C3_CCPXCY6, 6 .EQU CCP18_C3_CCPXCY5, 5 .EQU CCP18_C3_CCPXCY4, 4 .EQU CCP18_C3_CCPXCY3, 3 .EQU CCP18_C3_CCPXCY2, 2 .EQU CCP18_C3_CCPXCY1, 1 .EQU CCP18_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP18_C4, 0x40001AAC // 0x4000 1AAC CCP18_C4 Bits------------------------------------- .EQU CCP18_C4_CCPXCY15, 15 .EQU CCP18_C4_CCPXCY14, 14 .EQU CCP18_C4_CCPXCY13, 13 .EQU CCP18_C4_CCPXCY12, 12 .EQU CCP18_C4_CCPXCY11, 11 .EQU CCP18_C4_CCPXCY10, 10 .EQU CCP18_C4_CCPXCY9, 9 .EQU CCP18_C4_CCPXCY8, 8 .EQU CCP18_C4_CCPXCY7, 7 .EQU CCP18_C4_CCPXCY6, 6 .EQU CCP18_C4_CCPXCY5, 5 .EQU CCP18_C4_CCPXCY4, 4 .EQU CCP18_C4_CCPXCY3, 3 .EQU CCP18_C4_CCPXCY2, 2 .EQU CCP18_C4_CCPXCY1, 1 .EQU CCP18_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP18_SRIC, 0x40001AB0 // 0x4000 1AB0 CCP18_SRIC Bits------------------------------------- .EQU CCP18_SRIC_TXIC, 6 .EQU CCP18_SRIC_TXUIC, 5 .EQU CCP18_SRIC_TXTIC, 4 .EQU CCP18_SRIC_CC4IC, 3 .EQU CCP18_SRIC_CC3IC, 2 .EQU CCP18_SRIC_CC2IC, 1 .EQU CCP18_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP18_DF, 0x40001AB4 // 0x4000 1AB4 CCP18_DF Bits------------------------------------- .EQU CCP18_DF_TXUDF, 5 .EQU CCP18_DF_TXTDF, 4 .EQU CCP18_DF_CC4DF, 3 .EQU CCP18_DF_CC3DF, 2 .EQU CCP18_DF_CC2DF, 1 .EQU CCP18_DF_CC1DF, 0 // register------------------------------------- .EQU CCP18_CTL1, 0x40001AC0 // 0x4000 1AC0 CCP18_CTL1 Bits------------------------------------- .EQU CCP18_CTL1_CH4M3, 15 .EQU CCP18_CTL1_CH4M2, 14 .EQU CCP18_CTL1_CH4M1, 13 .EQU CCP18_CTL1_CH4M0, 12 .EQU CCP18_CTL1_CH3M3, 11 .EQU CCP18_CTL1_CH3M2, 10 .EQU CCP18_CTL1_CH3M1, 9 .EQU CCP18_CTL1_CH3M0, 8 .EQU CCP18_CTL1_CH2M3, 7 .EQU CCP18_CTL1_CH2M2, 6 .EQU CCP18_CTL1_CH2M1, 5 .EQU CCP18_CTL1_CH2M0, 4 .EQU CCP18_CTL1_CH1M3, 3 .EQU CCP18_CTL1_CH1M2, 2 .EQU CCP18_CTL1_CH1M1, 1 .EQU CCP18_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP18_R1, 0x40001AC4 // 0x4000 1AC4 CCP18_R1 Bits------------------------------------- .EQU CCP18_R1_CCPXRY15, 15 .EQU CCP18_R1_CCPXRY14, 14 .EQU CCP18_R1_CCPXRY13, 13 .EQU CCP18_R1_CCPXRY12, 12 .EQU CCP18_R1_CCPXRY11, 11 .EQU CCP18_R1_CCPXRY10, 10 .EQU CCP18_R1_CCPXRY9, 9 .EQU CCP18_R1_CCPXRY8, 8 .EQU CCP18_R1_CCPXRY7, 7 .EQU CCP18_R1_CCPXRY6, 6 .EQU CCP18_R1_CCPXRY5, 5 .EQU CCP18_R1_CCPXRY4, 4 .EQU CCP18_R1_CCPXRY3, 3 .EQU CCP18_R1_CCPXRY2, 2 .EQU CCP18_R1_CCPXRY1, 1 .EQU CCP18_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP18_R2, 0x40001AC8 // 0x4000 1AC8 CCP18_R2 Bits------------------------------------- .EQU CCP18_R2_CCPXRY15, 15 .EQU CCP18_R2_CCPXRY14, 14 .EQU CCP18_R2_CCPXRY13, 13 .EQU CCP18_R2_CCPXRY12, 12 .EQU CCP18_R2_CCPXRY11, 11 .EQU CCP18_R2_CCPXRY10, 10 .EQU CCP18_R2_CCPXRY9, 9 .EQU CCP18_R2_CCPXRY8, 8 .EQU CCP18_R2_CCPXRY7, 7 .EQU CCP18_R2_CCPXRY6, 6 .EQU CCP18_R2_CCPXRY5, 5 .EQU CCP18_R2_CCPXRY4, 4 .EQU CCP18_R2_CCPXRY3, 3 .EQU CCP18_R2_CCPXRY2, 2 .EQU CCP18_R2_CCPXRY1, 1 .EQU CCP18_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP18_R3, 0x40001ACC // 0x4000 1ACC CCP18_R3 Bits------------------------------------- .EQU CCP18_R3_CCPXRY15, 15 .EQU CCP18_R3_CCPXRY14, 14 .EQU CCP18_R3_CCPXRY13, 13 .EQU CCP18_R3_CCPXRY12, 12 .EQU CCP18_R3_CCPXRY11, 11 .EQU CCP18_R3_CCPXRY10, 10 .EQU CCP18_R3_CCPXRY9, 9 .EQU CCP18_R3_CCPXRY8, 8 .EQU CCP18_R3_CCPXRY7, 7 .EQU CCP18_R3_CCPXRY6, 6 .EQU CCP18_R3_CCPXRY5, 5 .EQU CCP18_R3_CCPXRY4, 4 .EQU CCP18_R3_CCPXRY3, 3 .EQU CCP18_R3_CCPXRY2, 2 .EQU CCP18_R3_CCPXRY1, 1 .EQU CCP18_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP18_R4, 0x40001AD0 // 0x4000 1AD0 CCP18_R4 Bits------------------------------------- .EQU CCP18_R4_CCPXRY15, 15 .EQU CCP18_R4_CCPXRY14, 14 .EQU CCP18_R4_CCPXRY13, 13 .EQU CCP18_R4_CCPXRY12, 12 .EQU CCP18_R4_CCPXRY11, 11 .EQU CCP18_R4_CCPXRY10, 10 .EQU CCP18_R4_CCPXRY9, 9 .EQU CCP18_R4_CCPXRY8, 8 .EQU CCP18_R4_CCPXRY7, 7 .EQU CCP18_R4_CCPXRY6, 6 .EQU CCP18_R4_CCPXRY5, 5 .EQU CCP18_R4_CCPXRY4, 4 .EQU CCP18_R4_CCPXRY3, 3 .EQU CCP18_R4_CCPXRY2, 2 .EQU CCP18_R4_CCPXRY1, 1 .EQU CCP18_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP18_CTL2, 0x40001AD4 // 0x4000 1AD4 CCP18_CTL2 Bits------------------------------------- .EQU CCP18_CTL2_PXOC4CE, 15 .EQU CCP18_CTL2_PXOC3CE, 14 .EQU CCP18_CTL2_PXOC2CE, 13 .EQU CCP18_CTL2_PXOC1CE, 12 .EQU CCP18_CTL2_PXASS1, 11 .EQU CCP18_CTL2_PXASS0, 10 .EQU CCP18_CTL2_TCKSEL1, 9 .EQU CCP18_CTL2_TCKSEL0, 8 .EQU CCP18_CTL2_PXOC4_1, 7 .EQU CCP18_CTL2_PXOC4_0, 6 .EQU CCP18_CTL2_PXOC3_1, 5 .EQU CCP18_CTL2_PXOC3_0, 4 .EQU CCP18_CTL2_PXOC2_1, 3 .EQU CCP18_CTL2_PXOC2_0, 2 .EQU CCP18_CTL2_PXOC1_1, 1 .EQU CCP18_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP18_CTL3, 0x40001AD8 // 0x4000 1AD8 CCP18_CTL3 Bits------------------------------------- .EQU CCP18_CTL3_PXSPMST, 15 .EQU CCP18_CTL3_PXPWMI, 14 .EQU CCP18_CTL3_PXXORM, 13 .EQU CCP18_CTL3_PXSPM, 12 .EQU CCP18_CTL3_TXTDE, 11 .EQU CCP18_CTL3_CC4DE, 10 .EQU CCP18_CTL3_CC3DE, 9 .EQU CCP18_CTL3_CC2DE, 8 .EQU CCP18_CTL3_CC1DE, 7 .EQU CCP18_CTL3_TXUDE, 6 .EQU CCP18_CTL3_TXUIE, 5 .EQU CCP18_CTL3_TXTIE, 4 .EQU CCP18_CTL3_CC4IE, 3 .EQU CCP18_CTL3_CC3IE, 2 .EQU CCP18_CTL3_CC2IE, 1 .EQU CCP18_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP18_EGIF, 0x40001ADC // 0x4000 1ADC CCP18_EGIF Bits------------------------------------- .EQU CCP18_EGIF_POSSEL, 13 .EQU CCP18_EGIF_PXSEL, 12 .EQU CCP18_EGIF_TXUIF, 11 .EQU CCP18_EGIF_TXTIF, 10 .EQU CCP18_EGIF_CC4IF, 9 .EQU CCP18_EGIF_CC3IF, 8 .EQU CCP18_EGIF_CC2IF, 7 .EQU CCP18_EGIF_CC1IF, 6 .EQU CCP18_EGIF_TXTRG, 5 .EQU CCP18_EGIF_CC4G, 4 .EQU CCP18_EGIF_CC3G, 3 .EQU CCP18_EGIF_CC2G, 2 .EQU CCP18_EGIF_CC1G, 1 .EQU CCP18_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU T19_CNT, 0x40001B00 // 0x4000 1B00 T19_CNT Bits------------------------------------- .EQU T19_CNT_TXCNT15, 15 .EQU T19_CNT_TXCNT14, 14 .EQU T19_CNT_TXCNT13, 13 .EQU T19_CNT_TXCNT12, 12 .EQU T19_CNT_TXCNT11, 11 .EQU T19_CNT_TXCNT10, 10 .EQU T19_CNT_TXCNT9, 9 .EQU T19_CNT_TXCNT8, 8 .EQU T19_CNT_TXCNT7, 7 .EQU T19_CNT_TXCNT6, 6 .EQU T19_CNT_TXCNT5, 5 .EQU T19_CNT_TXCNT4, 4 .EQU T19_CNT_TXCNT3, 3 .EQU T19_CNT_TXCNT2, 2 .EQU T19_CNT_TXCNT1, 1 .EQU T19_CNT_TXCNT0, 0 // register------------------------------------- .EQU T19_CTL1, 0x40001B04 // 0x4000 1B04 T19_CTL1 Bits------------------------------------- .EQU T19_CTL1_TXIF, 13 .EQU T19_CTL1_TXIE, 12 .EQU T19_CTL1_TXCMS2, 10 .EQU T19_CTL1_TXCMS1, 9 .EQU T19_CTL1_TXCMS0, 8 .EQU T19_CTL1_TXDIR, 7 .EQU T19_CTL1_TXCLK1, 6 .EQU T19_CTL1_TXCLK0, 5 .EQU T19_CTL1_TXSY, 3 .EQU T19_CTL1_TXCS, 1 .EQU T19_CTL1_TXEN, 0 // register------------------------------------- .EQU T19_CTL2, 0x40001B08 // 0x4000 1B08 T19_CTL2 Bits------------------------------------- .EQU T19_CTL2_TRGSEL1, 15 .EQU T19_CTL2_TRGSEL0, 14 .EQU T19_CTL2_TXUR, 13 .EQU T19_CTL2_TXMSSYNC, 12 .EQU T19_CTL2_TXTS3, 11 .EQU T19_CTL2_TXTS2, 10 .EQU T19_CTL2_TXTS1, 9 .EQU T19_CTL2_TXTS0, 8 .EQU T19_CTL2_TXSMS2, 7 .EQU T19_CTL2_TXSMS1, 6 .EQU T19_CTL2_TXSMS0, 5 .EQU T19_CTL2_TXMMS2, 4 .EQU T19_CTL2_TXMMS1, 3 .EQU T19_CTL2_TXMMS0, 2 .EQU T19_CTL2_TXUDEVT, 1 .EQU T19_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T19_PRSC, 0x40001B0C // 0x4000 1B0C T19_PRSC Bits------------------------------------- .EQU T19_PRSC_TXCKS15, 15 .EQU T19_PRSC_TXCKS14, 14 .EQU T19_PRSC_TXCKS13, 13 .EQU T19_PRSC_TXCKS12, 12 .EQU T19_PRSC_TXCKS11, 11 .EQU T19_PRSC_TXCKS10, 10 .EQU T19_PRSC_TXCKS9, 9 .EQU T19_PRSC_TXCKS8, 8 .EQU T19_PRSC_TXCKS7, 7 .EQU T19_PRSC_TXCKS6, 6 .EQU T19_PRSC_TXCKS5, 5 .EQU T19_PRSC_TXCKS4, 4 .EQU T19_PRSC_TXCKS3, 3 .EQU T19_PRSC_TXCKS2, 2 .EQU T19_PRSC_TXCKS1, 1 .EQU T19_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T19_PPX, 0x40001B10 // 0x4000 1B10 T19_PPX Bits------------------------------------- .EQU T19_PPX_PPX15, 15 .EQU T19_PPX_PPX14, 14 .EQU T19_PPX_PPX13, 13 .EQU T19_PPX_PPX12, 12 .EQU T19_PPX_PPX11, 11 .EQU T19_PPX_PPX10, 10 .EQU T19_PPX_PPX9, 9 .EQU T19_PPX_PPX8, 8 .EQU T19_PPX_PPX7, 7 .EQU T19_PPX_PPX6, 6 .EQU T19_PPX_PPX5, 5 .EQU T19_PPX_PPX4, 4 .EQU T19_PPX_PPX3, 3 .EQU T19_PPX_PPX2, 2 .EQU T19_PPX_PPX1, 1 .EQU T19_PPX_PPX0, 0 // register------------------------------------- .EQU T19_UDTIM, 0x40001B14 // 0x4000 1B14 T19_UDTIM Bits------------------------------------- .EQU T19_UDTIM_TXUD7, 7 .EQU T19_UDTIM_TXUD6, 6 .EQU T19_UDTIM_TXUD5, 5 .EQU T19_UDTIM_TXUD4, 4 .EQU T19_UDTIM_TXUD3, 3 .EQU T19_UDTIM_TXUD2, 2 .EQU T19_UDTIM_TXUD1, 1 .EQU T19_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP19_C1, 0x40001B20 // 0x4000 1B20 CCP19_C1 Bits------------------------------------- .EQU CCP19_C1_CCPXCY15, 15 .EQU CCP19_C1_CCPXCY14, 14 .EQU CCP19_C1_CCPXCY13, 13 .EQU CCP19_C1_CCPXCY12, 12 .EQU CCP19_C1_CCPXCY11, 11 .EQU CCP19_C1_CCPXCY10, 10 .EQU CCP19_C1_CCPXCY9, 9 .EQU CCP19_C1_CCPXCY8, 8 .EQU CCP19_C1_CCPXCY7, 7 .EQU CCP19_C1_CCPXCY6, 6 .EQU CCP19_C1_CCPXCY5, 5 .EQU CCP19_C1_CCPXCY4, 4 .EQU CCP19_C1_CCPXCY3, 3 .EQU CCP19_C1_CCPXCY2, 2 .EQU CCP19_C1_CCPXCY1, 1 .EQU CCP19_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP19_C2, 0x40001B24 // 0x4000 1B24 CCP19_C2 Bits------------------------------------- .EQU CCP19_C2_CCPXCY15, 15 .EQU CCP19_C2_CCPXCY14, 14 .EQU CCP19_C2_CCPXCY13, 13 .EQU CCP19_C2_CCPXCY12, 12 .EQU CCP19_C2_CCPXCY11, 11 .EQU CCP19_C2_CCPXCY10, 10 .EQU CCP19_C2_CCPXCY9, 9 .EQU CCP19_C2_CCPXCY8, 8 .EQU CCP19_C2_CCPXCY7, 7 .EQU CCP19_C2_CCPXCY6, 6 .EQU CCP19_C2_CCPXCY5, 5 .EQU CCP19_C2_CCPXCY4, 4 .EQU CCP19_C2_CCPXCY3, 3 .EQU CCP19_C2_CCPXCY2, 2 .EQU CCP19_C2_CCPXCY1, 1 .EQU CCP19_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP19_C3, 0x40001B28 // 0x4000 1B28 CCP19_C3 Bits------------------------------------- .EQU CCP19_C3_CCPXCY15, 15 .EQU CCP19_C3_CCPXCY14, 14 .EQU CCP19_C3_CCPXCY13, 13 .EQU CCP19_C3_CCPXCY12, 12 .EQU CCP19_C3_CCPXCY11, 11 .EQU CCP19_C3_CCPXCY10, 10 .EQU CCP19_C3_CCPXCY9, 9 .EQU CCP19_C3_CCPXCY8, 8 .EQU CCP19_C3_CCPXCY7, 7 .EQU CCP19_C3_CCPXCY6, 6 .EQU CCP19_C3_CCPXCY5, 5 .EQU CCP19_C3_CCPXCY4, 4 .EQU CCP19_C3_CCPXCY3, 3 .EQU CCP19_C3_CCPXCY2, 2 .EQU CCP19_C3_CCPXCY1, 1 .EQU CCP19_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP19_C4, 0x40001B2C // 0x4000 1B2C CCP19_C4 Bits------------------------------------- .EQU CCP19_C4_CCPXCY15, 15 .EQU CCP19_C4_CCPXCY14, 14 .EQU CCP19_C4_CCPXCY13, 13 .EQU CCP19_C4_CCPXCY12, 12 .EQU CCP19_C4_CCPXCY11, 11 .EQU CCP19_C4_CCPXCY10, 10 .EQU CCP19_C4_CCPXCY9, 9 .EQU CCP19_C4_CCPXCY8, 8 .EQU CCP19_C4_CCPXCY7, 7 .EQU CCP19_C4_CCPXCY6, 6 .EQU CCP19_C4_CCPXCY5, 5 .EQU CCP19_C4_CCPXCY4, 4 .EQU CCP19_C4_CCPXCY3, 3 .EQU CCP19_C4_CCPXCY2, 2 .EQU CCP19_C4_CCPXCY1, 1 .EQU CCP19_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP19_SRIC, 0x40001B30 // 0x4000 1B30 CCP19_SRIC Bits------------------------------------- .EQU CCP19_SRIC_TXIC, 6 .EQU CCP19_SRIC_TXUIC, 5 .EQU CCP19_SRIC_TXTIC, 4 .EQU CCP19_SRIC_CC4IC, 3 .EQU CCP19_SRIC_CC3IC, 2 .EQU CCP19_SRIC_CC2IC, 1 .EQU CCP19_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP19_DF, 0x40001B34 // 0x4000 1B34 CCP19_DF Bits------------------------------------- .EQU CCP19_DF_TXUDF, 5 .EQU CCP19_DF_TXTDF, 4 .EQU CCP19_DF_CC4DF, 3 .EQU CCP19_DF_CC3DF, 2 .EQU CCP19_DF_CC2DF, 1 .EQU CCP19_DF_CC1DF, 0 // register------------------------------------- .EQU CCP19_CTL1, 0x40001B40 // 0x4000 1B40 CCP19_CTL1 Bits------------------------------------- .EQU CCP19_CTL1_CH4M3, 15 .EQU CCP19_CTL1_CH4M2, 14 .EQU CCP19_CTL1_CH4M1, 13 .EQU CCP19_CTL1_CH4M0, 12 .EQU CCP19_CTL1_CH3M3, 11 .EQU CCP19_CTL1_CH3M2, 10 .EQU CCP19_CTL1_CH3M1, 9 .EQU CCP19_CTL1_CH3M0, 8 .EQU CCP19_CTL1_CH2M3, 7 .EQU CCP19_CTL1_CH2M2, 6 .EQU CCP19_CTL1_CH2M1, 5 .EQU CCP19_CTL1_CH2M0, 4 .EQU CCP19_CTL1_CH1M3, 3 .EQU CCP19_CTL1_CH1M2, 2 .EQU CCP19_CTL1_CH1M1, 1 .EQU CCP19_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP19_R1, 0x40001B44 // 0x4000 1B44 CCP19_R1 Bits------------------------------------- .EQU CCP19_R1_CCPXRY15, 15 .EQU CCP19_R1_CCPXRY14, 14 .EQU CCP19_R1_CCPXRY13, 13 .EQU CCP19_R1_CCPXRY12, 12 .EQU CCP19_R1_CCPXRY11, 11 .EQU CCP19_R1_CCPXRY10, 10 .EQU CCP19_R1_CCPXRY9, 9 .EQU CCP19_R1_CCPXRY8, 8 .EQU CCP19_R1_CCPXRY7, 7 .EQU CCP19_R1_CCPXRY6, 6 .EQU CCP19_R1_CCPXRY5, 5 .EQU CCP19_R1_CCPXRY4, 4 .EQU CCP19_R1_CCPXRY3, 3 .EQU CCP19_R1_CCPXRY2, 2 .EQU CCP19_R1_CCPXRY1, 1 .EQU CCP19_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP19_R2, 0x40001B48 // 0x4000 1B48 CCP19_R2 Bits------------------------------------- .EQU CCP19_R2_CCPXRY15, 15 .EQU CCP19_R2_CCPXRY14, 14 .EQU CCP19_R2_CCPXRY13, 13 .EQU CCP19_R2_CCPXRY12, 12 .EQU CCP19_R2_CCPXRY11, 11 .EQU CCP19_R2_CCPXRY10, 10 .EQU CCP19_R2_CCPXRY9, 9 .EQU CCP19_R2_CCPXRY8, 8 .EQU CCP19_R2_CCPXRY7, 7 .EQU CCP19_R2_CCPXRY6, 6 .EQU CCP19_R2_CCPXRY5, 5 .EQU CCP19_R2_CCPXRY4, 4 .EQU CCP19_R2_CCPXRY3, 3 .EQU CCP19_R2_CCPXRY2, 2 .EQU CCP19_R2_CCPXRY1, 1 .EQU CCP19_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP19_R3, 0x40001B4C // 0x4000 1B4C CCP19_R3 Bits------------------------------------- .EQU CCP19_R3_CCPXRY15, 15 .EQU CCP19_R3_CCPXRY14, 14 .EQU CCP19_R3_CCPXRY13, 13 .EQU CCP19_R3_CCPXRY12, 12 .EQU CCP19_R3_CCPXRY11, 11 .EQU CCP19_R3_CCPXRY10, 10 .EQU CCP19_R3_CCPXRY9, 9 .EQU CCP19_R3_CCPXRY8, 8 .EQU CCP19_R3_CCPXRY7, 7 .EQU CCP19_R3_CCPXRY6, 6 .EQU CCP19_R3_CCPXRY5, 5 .EQU CCP19_R3_CCPXRY4, 4 .EQU CCP19_R3_CCPXRY3, 3 .EQU CCP19_R3_CCPXRY2, 2 .EQU CCP19_R3_CCPXRY1, 1 .EQU CCP19_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP19_R4, 0x40001B50 // 0x4000 1B50 CCP19_R4 Bits------------------------------------- .EQU CCP19_R4_CCPXRY15, 15 .EQU CCP19_R4_CCPXRY14, 14 .EQU CCP19_R4_CCPXRY13, 13 .EQU CCP19_R4_CCPXRY12, 12 .EQU CCP19_R4_CCPXRY11, 11 .EQU CCP19_R4_CCPXRY10, 10 .EQU CCP19_R4_CCPXRY9, 9 .EQU CCP19_R4_CCPXRY8, 8 .EQU CCP19_R4_CCPXRY7, 7 .EQU CCP19_R4_CCPXRY6, 6 .EQU CCP19_R4_CCPXRY5, 5 .EQU CCP19_R4_CCPXRY4, 4 .EQU CCP19_R4_CCPXRY3, 3 .EQU CCP19_R4_CCPXRY2, 2 .EQU CCP19_R4_CCPXRY1, 1 .EQU CCP19_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP19_CTL2, 0x40001B54 // 0x4000 1B54 CCP19_CTL2 Bits------------------------------------- .EQU CCP19_CTL2_PXOC4CE, 15 .EQU CCP19_CTL2_PXOC3CE, 14 .EQU CCP19_CTL2_PXOC2CE, 13 .EQU CCP19_CTL2_PXOC1CE, 12 .EQU CCP19_CTL2_PXASS1, 11 .EQU CCP19_CTL2_PXASS0, 10 .EQU CCP19_CTL2_TCKSEL1, 9 .EQU CCP19_CTL2_TCKSEL0, 8 .EQU CCP19_CTL2_PXOC4_1, 7 .EQU CCP19_CTL2_PXOC4_0, 6 .EQU CCP19_CTL2_PXOC3_1, 5 .EQU CCP19_CTL2_PXOC3_0, 4 .EQU CCP19_CTL2_PXOC2_1, 3 .EQU CCP19_CTL2_PXOC2_0, 2 .EQU CCP19_CTL2_PXOC1_1, 1 .EQU CCP19_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP19_CTL3, 0x40001B58 // 0x4000 1B58 CCP19_CTL3 Bits------------------------------------- .EQU CCP19_CTL3_PXSPMST, 15 .EQU CCP19_CTL3_PXPWMI, 14 .EQU CCP19_CTL3_PXXORM, 13 .EQU CCP19_CTL3_PXSPM, 12 .EQU CCP19_CTL3_TXTDE, 11 .EQU CCP19_CTL3_CC4DE, 10 .EQU CCP19_CTL3_CC3DE, 9 .EQU CCP19_CTL3_CC2DE, 8 .EQU CCP19_CTL3_CC1DE, 7 .EQU CCP19_CTL3_TXUDE, 6 .EQU CCP19_CTL3_TXUIE, 5 .EQU CCP19_CTL3_TXTIE, 4 .EQU CCP19_CTL3_CC4IE, 3 .EQU CCP19_CTL3_CC3IE, 2 .EQU CCP19_CTL3_CC2IE, 1 .EQU CCP19_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP19_EGIF, 0x40001B5C // 0x4000 1B5C CCP19_EGIF Bits------------------------------------- .EQU CCP19_EGIF_POSSEL, 13 .EQU CCP19_EGIF_PXSEL, 12 .EQU CCP19_EGIF_TXUIF, 11 .EQU CCP19_EGIF_TXTIF, 10 .EQU CCP19_EGIF_CC4IF, 9 .EQU CCP19_EGIF_CC3IF, 8 .EQU CCP19_EGIF_CC2IF, 7 .EQU CCP19_EGIF_CC1IF, 6 .EQU CCP19_EGIF_TXTRG, 5 .EQU CCP19_EGIF_CC4G, 4 .EQU CCP19_EGIF_CC3G, 3 .EQU CCP19_EGIF_CC2G, 2 .EQU CCP19_EGIF_CC1G, 1 .EQU CCP19_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU T20_CNT, 0x40001B80 // 0x4000 1B80 T20_CNT Bits------------------------------------- .EQU T20_CNT_TXCNT31, 31 .EQU T20_CNT_TXCNT30, 30 .EQU T20_CNT_TXCNT29, 29 .EQU T20_CNT_TXCNT28, 28 .EQU T20_CNT_TXCNT27, 27 .EQU T20_CNT_TXCNT26, 26 .EQU T20_CNT_TXCNT25, 25 .EQU T20_CNT_TXCNT24, 24 .EQU T20_CNT_TXCNT23, 23 .EQU T20_CNT_TXCNT22, 22 .EQU T20_CNT_TXCNT21, 21 .EQU T20_CNT_TXCNT20, 20 .EQU T20_CNT_TXCNT19, 19 .EQU T20_CNT_TXCNT18, 18 .EQU T20_CNT_TXCNT17, 17 .EQU T20_CNT_TXCNT16, 16 .EQU T20_CNT_TXCNT15, 15 .EQU T20_CNT_TXCNT14, 14 .EQU T20_CNT_TXCNT13, 13 .EQU T20_CNT_TXCNT12, 12 .EQU T20_CNT_TXCNT11, 11 .EQU T20_CNT_TXCNT10, 10 .EQU T20_CNT_TXCNT9, 9 .EQU T20_CNT_TXCNT8, 8 .EQU T20_CNT_TXCNT7, 7 .EQU T20_CNT_TXCNT6, 6 .EQU T20_CNT_TXCNT5, 5 .EQU T20_CNT_TXCNT4, 4 .EQU T20_CNT_TXCNT3, 3 .EQU T20_CNT_TXCNT2, 2 .EQU T20_CNT_TXCNT1, 1 .EQU T20_CNT_TXCNT0, 0 // register------------------------------------- .EQU T20_CTL1, 0x40001B84 // 0x4000 1B84 T20_CTL1 Bits------------------------------------- .EQU T20_CTL1_TXIF, 13 .EQU T20_CTL1_TXIE, 12 .EQU T20_CTL1_TXCMS2, 10 .EQU T20_CTL1_TXCMS1, 9 .EQU T20_CTL1_TXCMS0, 8 .EQU T20_CTL1_TXDIR, 7 .EQU T20_CTL1_TXCLK1, 6 .EQU T20_CTL1_TXCLK0, 5 .EQU T20_CTL1_TXSY, 3 .EQU T20_CTL1_TXCS, 1 .EQU T20_CTL1_TXEN, 0 // register------------------------------------- .EQU T20_CTL2, 0x40001B88 // 0x4000 1B88 T20_CTL2 Bits------------------------------------- .EQU T20_CTL2_TRGSEL1, 15 .EQU T20_CTL2_TRGSEL0, 14 .EQU T20_CTL2_TXUR, 13 .EQU T20_CTL2_TXMSSYNC, 12 .EQU T20_CTL2_TXTS3, 11 .EQU T20_CTL2_TXTS2, 10 .EQU T20_CTL2_TXTS1, 9 .EQU T20_CTL2_TXTS0, 8 .EQU T20_CTL2_TXSMS2, 7 .EQU T20_CTL2_TXSMS1, 6 .EQU T20_CTL2_TXSMS0, 5 .EQU T20_CTL2_TXMMS2, 4 .EQU T20_CTL2_TXMMS1, 3 .EQU T20_CTL2_TXMMS0, 2 .EQU T20_CTL2_TXUDEVT, 1 .EQU T20_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T20_PRSC, 0x40001B8C // 0x4000 1B8C T20_PRSC Bits------------------------------------- .EQU T20_PRSC_TXCKS31, 31 .EQU T20_PRSC_TXCKS30, 30 .EQU T20_PRSC_TXCKS29, 29 .EQU T20_PRSC_TXCKS28, 28 .EQU T20_PRSC_TXCKS27, 27 .EQU T20_PRSC_TXCKS26, 26 .EQU T20_PRSC_TXCKS25, 25 .EQU T20_PRSC_TXCKS24, 24 .EQU T20_PRSC_TXCKS23, 23 .EQU T20_PRSC_TXCKS22, 22 .EQU T20_PRSC_TXCKS21, 21 .EQU T20_PRSC_TXCKS20, 20 .EQU T20_PRSC_TXCKS19, 19 .EQU T20_PRSC_TXCKS18, 18 .EQU T20_PRSC_TXCKS17, 17 .EQU T20_PRSC_TXCKS16, 16 .EQU T20_PRSC_TXCKS15, 15 .EQU T20_PRSC_TXCKS14, 14 .EQU T20_PRSC_TXCKS13, 13 .EQU T20_PRSC_TXCKS12, 12 .EQU T20_PRSC_TXCKS11, 11 .EQU T20_PRSC_TXCKS10, 10 .EQU T20_PRSC_TXCKS9, 9 .EQU T20_PRSC_TXCKS8, 8 .EQU T20_PRSC_TXCKS7, 7 .EQU T20_PRSC_TXCKS6, 6 .EQU T20_PRSC_TXCKS5, 5 .EQU T20_PRSC_TXCKS4, 4 .EQU T20_PRSC_TXCKS3, 3 .EQU T20_PRSC_TXCKS2, 2 .EQU T20_PRSC_TXCKS1, 1 .EQU T20_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T20_PPX, 0x40001B90 // 0x4000 1B90 T20_PPX Bits------------------------------------- .EQU T20_PPX_PPX31, 31 .EQU T20_PPX_PPX30, 30 .EQU T20_PPX_PPX29, 29 .EQU T20_PPX_PPX28, 28 .EQU T20_PPX_PPX27, 27 .EQU T20_PPX_PPX26, 26 .EQU T20_PPX_PPX25, 25 .EQU T20_PPX_PPX24, 24 .EQU T20_PPX_PPX23, 23 .EQU T20_PPX_PPX22, 22 .EQU T20_PPX_PPX21, 21 .EQU T20_PPX_PPX20, 20 .EQU T20_PPX_PPX19, 19 .EQU T20_PPX_PPX18, 18 .EQU T20_PPX_PPX17, 17 .EQU T20_PPX_PPX16, 16 .EQU T20_PPX_PPX15, 15 .EQU T20_PPX_PPX14, 14 .EQU T20_PPX_PPX13, 13 .EQU T20_PPX_PPX12, 12 .EQU T20_PPX_PPX11, 11 .EQU T20_PPX_PPX10, 10 .EQU T20_PPX_PPX9, 9 .EQU T20_PPX_PPX8, 8 .EQU T20_PPX_PPX7, 7 .EQU T20_PPX_PPX6, 6 .EQU T20_PPX_PPX5, 5 .EQU T20_PPX_PPX4, 4 .EQU T20_PPX_PPX3, 3 .EQU T20_PPX_PPX2, 2 .EQU T20_PPX_PPX1, 1 .EQU T20_PPX_PPX0, 0 // register------------------------------------- .EQU T20_UDTIM, 0x40001B94 // 0x4000 1B94 T20_UDTIM Bits------------------------------------- .EQU T20_UDTIM_TXUD7, 7 .EQU T20_UDTIM_TXUD6, 6 .EQU T20_UDTIM_TXUD5, 5 .EQU T20_UDTIM_TXUD4, 4 .EQU T20_UDTIM_TXUD3, 3 .EQU T20_UDTIM_TXUD2, 2 .EQU T20_UDTIM_TXUD1, 1 .EQU T20_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP20_C1, 0x40001BA0 // 0x4000 1BA0 CCP20_C1 Bits------------------------------------- .EQU CCP20_C1_CCPXCY31, 31 .EQU CCP20_C1_CCPXCY30, 30 .EQU CCP20_C1_CCPXCY29, 29 .EQU CCP20_C1_CCPXCY28, 28 .EQU CCP20_C1_CCPXCY27, 27 .EQU CCP20_C1_CCPXCY26, 26 .EQU CCP20_C1_CCPXCY25, 25 .EQU CCP20_C1_CCPXCY24, 24 .EQU CCP20_C1_CCPXCY23, 23 .EQU CCP20_C1_CCPXCY22, 22 .EQU CCP20_C1_CCPXCY21, 21 .EQU CCP20_C1_CCPXCY20, 20 .EQU CCP20_C1_CCPXCY19, 19 .EQU CCP20_C1_CCPXCY18, 18 .EQU CCP20_C1_CCPXCY17, 17 .EQU CCP20_C1_CCPXCY16, 16 .EQU CCP20_C1_CCPXCY15, 15 .EQU CCP20_C1_CCPXCY14, 14 .EQU CCP20_C1_CCPXCY13, 13 .EQU CCP20_C1_CCPXCY12, 12 .EQU CCP20_C1_CCPXCY11, 11 .EQU CCP20_C1_CCPXCY10, 10 .EQU CCP20_C1_CCPXCY9, 9 .EQU CCP20_C1_CCPXCY8, 8 .EQU CCP20_C1_CCPXCY7, 7 .EQU CCP20_C1_CCPXCY6, 6 .EQU CCP20_C1_CCPXCY5, 5 .EQU CCP20_C1_CCPXCY4, 4 .EQU CCP20_C1_CCPXCY3, 3 .EQU CCP20_C1_CCPXCY2, 2 .EQU CCP20_C1_CCPXCY1, 1 .EQU CCP20_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP20_C2, 0x40001BA4 // 0x4000 1BA4 CCP20_C2 Bits------------------------------------- .EQU CCP20_C2_CCPXCY31, 31 .EQU CCP20_C2_CCPXCY30, 30 .EQU CCP20_C2_CCPXCY29, 29 .EQU CCP20_C2_CCPXCY28, 28 .EQU CCP20_C2_CCPXCY27, 27 .EQU CCP20_C2_CCPXCY26, 26 .EQU CCP20_C2_CCPXCY25, 25 .EQU CCP20_C2_CCPXCY24, 24 .EQU CCP20_C2_CCPXCY23, 23 .EQU CCP20_C2_CCPXCY22, 22 .EQU CCP20_C2_CCPXCY21, 21 .EQU CCP20_C2_CCPXCY20, 20 .EQU CCP20_C2_CCPXCY19, 19 .EQU CCP20_C2_CCPXCY18, 18 .EQU CCP20_C2_CCPXCY17, 17 .EQU CCP20_C2_CCPXCY16, 16 .EQU CCP20_C2_CCPXCY15, 15 .EQU CCP20_C2_CCPXCY14, 14 .EQU CCP20_C2_CCPXCY13, 13 .EQU CCP20_C2_CCPXCY12, 12 .EQU CCP20_C2_CCPXCY11, 11 .EQU CCP20_C2_CCPXCY10, 10 .EQU CCP20_C2_CCPXCY9, 9 .EQU CCP20_C2_CCPXCY8, 8 .EQU CCP20_C2_CCPXCY7, 7 .EQU CCP20_C2_CCPXCY6, 6 .EQU CCP20_C2_CCPXCY5, 5 .EQU CCP20_C2_CCPXCY4, 4 .EQU CCP20_C2_CCPXCY3, 3 .EQU CCP20_C2_CCPXCY2, 2 .EQU CCP20_C2_CCPXCY1, 1 .EQU CCP20_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP20_C3, 0x40001BA8 // 0x4000 1BA8 CCP20_C3 Bits------------------------------------- .EQU CCP20_C3_CCPXCY31, 31 .EQU CCP20_C3_CCPXCY30, 30 .EQU CCP20_C3_CCPXCY29, 29 .EQU CCP20_C3_CCPXCY28, 28 .EQU CCP20_C3_CCPXCY27, 27 .EQU CCP20_C3_CCPXCY26, 26 .EQU CCP20_C3_CCPXCY25, 25 .EQU CCP20_C3_CCPXCY24, 24 .EQU CCP20_C3_CCPXCY23, 23 .EQU CCP20_C3_CCPXCY22, 22 .EQU CCP20_C3_CCPXCY21, 21 .EQU CCP20_C3_CCPXCY20, 20 .EQU CCP20_C3_CCPXCY19, 19 .EQU CCP20_C3_CCPXCY18, 18 .EQU CCP20_C3_CCPXCY17, 17 .EQU CCP20_C3_CCPXCY16, 16 .EQU CCP20_C3_CCPXCY15, 15 .EQU CCP20_C3_CCPXCY14, 14 .EQU CCP20_C3_CCPXCY13, 13 .EQU CCP20_C3_CCPXCY12, 12 .EQU CCP20_C3_CCPXCY11, 11 .EQU CCP20_C3_CCPXCY10, 10 .EQU CCP20_C3_CCPXCY9, 9 .EQU CCP20_C3_CCPXCY8, 8 .EQU CCP20_C3_CCPXCY7, 7 .EQU CCP20_C3_CCPXCY6, 6 .EQU CCP20_C3_CCPXCY5, 5 .EQU CCP20_C3_CCPXCY4, 4 .EQU CCP20_C3_CCPXCY3, 3 .EQU CCP20_C3_CCPXCY2, 2 .EQU CCP20_C3_CCPXCY1, 1 .EQU CCP20_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP20_C4, 0x40001BAC // 0x4000 1BAC CCP20_C4 Bits------------------------------------- .EQU CCP20_C4_CCPXCY31, 31 .EQU CCP20_C4_CCPXCY30, 30 .EQU CCP20_C4_CCPXCY29, 29 .EQU CCP20_C4_CCPXCY28, 28 .EQU CCP20_C4_CCPXCY27, 27 .EQU CCP20_C4_CCPXCY26, 26 .EQU CCP20_C4_CCPXCY25, 25 .EQU CCP20_C4_CCPXCY24, 24 .EQU CCP20_C4_CCPXCY23, 23 .EQU CCP20_C4_CCPXCY22, 22 .EQU CCP20_C4_CCPXCY21, 21 .EQU CCP20_C4_CCPXCY20, 20 .EQU CCP20_C4_CCPXCY19, 19 .EQU CCP20_C4_CCPXCY18, 18 .EQU CCP20_C4_CCPXCY17, 17 .EQU CCP20_C4_CCPXCY16, 16 .EQU CCP20_C4_CCPXCY15, 15 .EQU CCP20_C4_CCPXCY14, 14 .EQU CCP20_C4_CCPXCY13, 13 .EQU CCP20_C4_CCPXCY12, 12 .EQU CCP20_C4_CCPXCY11, 11 .EQU CCP20_C4_CCPXCY10, 10 .EQU CCP20_C4_CCPXCY9, 9 .EQU CCP20_C4_CCPXCY8, 8 .EQU CCP20_C4_CCPXCY7, 7 .EQU CCP20_C4_CCPXCY6, 6 .EQU CCP20_C4_CCPXCY5, 5 .EQU CCP20_C4_CCPXCY4, 4 .EQU CCP20_C4_CCPXCY3, 3 .EQU CCP20_C4_CCPXCY2, 2 .EQU CCP20_C4_CCPXCY1, 1 .EQU CCP20_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP20_SRIC, 0x40001BB0 // 0x4000 1BB0 CCP20_SRIC Bits------------------------------------- .EQU CCP20_SRIC_TXIC, 6 .EQU CCP20_SRIC_TXUIC, 5 .EQU CCP20_SRIC_TXTIC, 4 .EQU CCP20_SRIC_CC4IC, 3 .EQU CCP20_SRIC_CC3IC, 2 .EQU CCP20_SRIC_CC2IC, 1 .EQU CCP20_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP20_DF, 0x40001BB4 // 0x4000 1BB4 CCP20_DF Bits------------------------------------- .EQU CCP20_DF_TXUDF, 5 .EQU CCP20_DF_TXTDF, 4 .EQU CCP20_DF_CC4DF, 3 .EQU CCP20_DF_CC3DF, 2 .EQU CCP20_DF_CC2DF, 1 .EQU CCP20_DF_CC1DF, 0 // register------------------------------------- .EQU CCP20_CTL1, 0x40001BC0 // 0x4000 1BC0 CCP20_CTL1 Bits------------------------------------- .EQU CCP20_CTL1_CH4M3, 15 .EQU CCP20_CTL1_CH4M2, 14 .EQU CCP20_CTL1_CH4M1, 13 .EQU CCP20_CTL1_CH4M0, 12 .EQU CCP20_CTL1_CH3M3, 11 .EQU CCP20_CTL1_CH3M2, 10 .EQU CCP20_CTL1_CH3M1, 9 .EQU CCP20_CTL1_CH3M0, 8 .EQU CCP20_CTL1_CH2M3, 7 .EQU CCP20_CTL1_CH2M2, 6 .EQU CCP20_CTL1_CH2M1, 5 .EQU CCP20_CTL1_CH2M0, 4 .EQU CCP20_CTL1_CH1M3, 3 .EQU CCP20_CTL1_CH1M2, 2 .EQU CCP20_CTL1_CH1M1, 1 .EQU CCP20_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP20_R1, 0x40001BC4 // 0x4000 1BC4 CCP20_R1 Bits------------------------------------- .EQU CCP20_R1_CCPXRY31, 31 .EQU CCP20_R1_CCPXRY30, 30 .EQU CCP20_R1_CCPXRY29, 29 .EQU CCP20_R1_CCPXRY28, 28 .EQU CCP20_R1_CCPXRY27, 27 .EQU CCP20_R1_CCPXRY26, 26 .EQU CCP20_R1_CCPXRY25, 25 .EQU CCP20_R1_CCPXRY24, 24 .EQU CCP20_R1_CCPXRY23, 23 .EQU CCP20_R1_CCPXRY22, 22 .EQU CCP20_R1_CCPXRY21, 21 .EQU CCP20_R1_CCPXRY20, 20 .EQU CCP20_R1_CCPXRY19, 19 .EQU CCP20_R1_CCPXRY18, 18 .EQU CCP20_R1_CCPXRY17, 17 .EQU CCP20_R1_CCPXRY16, 16 .EQU CCP20_R1_CCPXRY15, 15 .EQU CCP20_R1_CCPXRY14, 14 .EQU CCP20_R1_CCPXRY13, 13 .EQU CCP20_R1_CCPXRY12, 12 .EQU CCP20_R1_CCPXRY11, 11 .EQU CCP20_R1_CCPXRY10, 10 .EQU CCP20_R1_CCPXRY9, 9 .EQU CCP20_R1_CCPXRY8, 8 .EQU CCP20_R1_CCPXRY7, 7 .EQU CCP20_R1_CCPXRY6, 6 .EQU CCP20_R1_CCPXRY5, 5 .EQU CCP20_R1_CCPXRY4, 4 .EQU CCP20_R1_CCPXRY3, 3 .EQU CCP20_R1_CCPXRY2, 2 .EQU CCP20_R1_CCPXRY1, 1 .EQU CCP20_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP20_R2, 0x40001BC8 // 0x4000 1BC8 CCP20_R2 Bits------------------------------------- .EQU CCP20_R2_CCPXRY31, 31 .EQU CCP20_R2_CCPXRY30, 30 .EQU CCP20_R2_CCPXRY29, 29 .EQU CCP20_R2_CCPXRY28, 28 .EQU CCP20_R2_CCPXRY27, 27 .EQU CCP20_R2_CCPXRY26, 26 .EQU CCP20_R2_CCPXRY25, 25 .EQU CCP20_R2_CCPXRY24, 24 .EQU CCP20_R2_CCPXRY23, 23 .EQU CCP20_R2_CCPXRY22, 22 .EQU CCP20_R2_CCPXRY21, 21 .EQU CCP20_R2_CCPXRY20, 20 .EQU CCP20_R2_CCPXRY19, 19 .EQU CCP20_R2_CCPXRY18, 18 .EQU CCP20_R2_CCPXRY17, 17 .EQU CCP20_R2_CCPXRY16, 16 .EQU CCP20_R2_CCPXRY15, 15 .EQU CCP20_R2_CCPXRY14, 14 .EQU CCP20_R2_CCPXRY13, 13 .EQU CCP20_R2_CCPXRY12, 12 .EQU CCP20_R2_CCPXRY11, 11 .EQU CCP20_R2_CCPXRY10, 10 .EQU CCP20_R2_CCPXRY9, 9 .EQU CCP20_R2_CCPXRY8, 8 .EQU CCP20_R2_CCPXRY7, 7 .EQU CCP20_R2_CCPXRY6, 6 .EQU CCP20_R2_CCPXRY5, 5 .EQU CCP20_R2_CCPXRY4, 4 .EQU CCP20_R2_CCPXRY3, 3 .EQU CCP20_R2_CCPXRY2, 2 .EQU CCP20_R2_CCPXRY1, 1 .EQU CCP20_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP20_R3, 0x40001BCC // 0x4000 1BCC CCP20_R3 Bits------------------------------------- .EQU CCP20_R3_CCPXRY31, 31 .EQU CCP20_R3_CCPXRY30, 30 .EQU CCP20_R3_CCPXRY29, 29 .EQU CCP20_R3_CCPXRY28, 28 .EQU CCP20_R3_CCPXRY27, 27 .EQU CCP20_R3_CCPXRY26, 26 .EQU CCP20_R3_CCPXRY25, 25 .EQU CCP20_R3_CCPXRY24, 24 .EQU CCP20_R3_CCPXRY23, 23 .EQU CCP20_R3_CCPXRY22, 22 .EQU CCP20_R3_CCPXRY21, 21 .EQU CCP20_R3_CCPXRY20, 20 .EQU CCP20_R3_CCPXRY19, 19 .EQU CCP20_R3_CCPXRY18, 18 .EQU CCP20_R3_CCPXRY17, 17 .EQU CCP20_R3_CCPXRY16, 16 .EQU CCP20_R3_CCPXRY15, 15 .EQU CCP20_R3_CCPXRY14, 14 .EQU CCP20_R3_CCPXRY13, 13 .EQU CCP20_R3_CCPXRY12, 12 .EQU CCP20_R3_CCPXRY11, 11 .EQU CCP20_R3_CCPXRY10, 10 .EQU CCP20_R3_CCPXRY9, 9 .EQU CCP20_R3_CCPXRY8, 8 .EQU CCP20_R3_CCPXRY7, 7 .EQU CCP20_R3_CCPXRY6, 6 .EQU CCP20_R3_CCPXRY5, 5 .EQU CCP20_R3_CCPXRY4, 4 .EQU CCP20_R3_CCPXRY3, 3 .EQU CCP20_R3_CCPXRY2, 2 .EQU CCP20_R3_CCPXRY1, 1 .EQU CCP20_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP20_R4, 0x40001BD0 // 0x4000 1BD0 CCP20_R4 Bits------------------------------------- .EQU CCP20_R4_CCPXRY31, 31 .EQU CCP20_R4_CCPXRY30, 30 .EQU CCP20_R4_CCPXRY29, 29 .EQU CCP20_R4_CCPXRY28, 28 .EQU CCP20_R4_CCPXRY27, 27 .EQU CCP20_R4_CCPXRY26, 26 .EQU CCP20_R4_CCPXRY25, 25 .EQU CCP20_R4_CCPXRY24, 24 .EQU CCP20_R4_CCPXRY23, 23 .EQU CCP20_R4_CCPXRY22, 22 .EQU CCP20_R4_CCPXRY21, 21 .EQU CCP20_R4_CCPXRY20, 20 .EQU CCP20_R4_CCPXRY19, 19 .EQU CCP20_R4_CCPXRY18, 18 .EQU CCP20_R4_CCPXRY17, 17 .EQU CCP20_R4_CCPXRY16, 16 .EQU CCP20_R4_CCPXRY15, 15 .EQU CCP20_R4_CCPXRY14, 14 .EQU CCP20_R4_CCPXRY13, 13 .EQU CCP20_R4_CCPXRY12, 12 .EQU CCP20_R4_CCPXRY11, 11 .EQU CCP20_R4_CCPXRY10, 10 .EQU CCP20_R4_CCPXRY9, 9 .EQU CCP20_R4_CCPXRY8, 8 .EQU CCP20_R4_CCPXRY7, 7 .EQU CCP20_R4_CCPXRY6, 6 .EQU CCP20_R4_CCPXRY5, 5 .EQU CCP20_R4_CCPXRY4, 4 .EQU CCP20_R4_CCPXRY3, 3 .EQU CCP20_R4_CCPXRY2, 2 .EQU CCP20_R4_CCPXRY1, 1 .EQU CCP20_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP20_CTL2, 0x40001BD4 // 0x4000 1BD4 CCP20_CTL2 Bits------------------------------------- .EQU CCP20_CTL2_PXOC4CE, 15 .EQU CCP20_CTL2_PXOC3CE, 14 .EQU CCP20_CTL2_PXOC2CE, 13 .EQU CCP20_CTL2_PXOC1CE, 12 .EQU CCP20_CTL2_PXASS1, 11 .EQU CCP20_CTL2_PXASS0, 10 .EQU CCP20_CTL2_TCKSEL1, 9 .EQU CCP20_CTL2_TCKSEL0, 8 .EQU CCP20_CTL2_PXOC4_1, 7 .EQU CCP20_CTL2_PXOC4_0, 6 .EQU CCP20_CTL2_PXOC3_1, 5 .EQU CCP20_CTL2_PXOC3_0, 4 .EQU CCP20_CTL2_PXOC2_1, 3 .EQU CCP20_CTL2_PXOC2_0, 2 .EQU CCP20_CTL2_PXOC1_1, 1 .EQU CCP20_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP20_CTL3, 0x40001BD8 // 0x4000 1BD8 CCP20_CTL3 Bits------------------------------------- .EQU CCP20_CTL3_PXSPMST, 15 .EQU CCP20_CTL3_PXPWMI, 14 .EQU CCP20_CTL3_PXXORM, 13 .EQU CCP20_CTL3_PXSPM, 12 .EQU CCP20_CTL3_TXTDE, 11 .EQU CCP20_CTL3_CC4DE, 10 .EQU CCP20_CTL3_CC3DE, 9 .EQU CCP20_CTL3_CC2DE, 8 .EQU CCP20_CTL3_CC1DE, 7 .EQU CCP20_CTL3_TXUDE, 6 .EQU CCP20_CTL3_TXUIE, 5 .EQU CCP20_CTL3_TXTIE, 4 .EQU CCP20_CTL3_CC4IE, 3 .EQU CCP20_CTL3_CC3IE, 2 .EQU CCP20_CTL3_CC2IE, 1 .EQU CCP20_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP20_EGIF, 0x40001BDC // 0x4000 1BDC CCP20_EGIF Bits------------------------------------- .EQU CCP20_EGIF_POSSEL, 13 .EQU CCP20_EGIF_PXSEL, 12 .EQU CCP20_EGIF_TXUIF, 11 .EQU CCP20_EGIF_TXTIF, 10 .EQU CCP20_EGIF_CC4IF, 9 .EQU CCP20_EGIF_CC3IF, 8 .EQU CCP20_EGIF_CC2IF, 7 .EQU CCP20_EGIF_CC1IF, 6 .EQU CCP20_EGIF_TXTRG, 5 .EQU CCP20_EGIF_CC4G, 4 .EQU CCP20_EGIF_CC3G, 3 .EQU CCP20_EGIF_CC2G, 2 .EQU CCP20_EGIF_CC1G, 1 .EQU CCP20_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU T21_CNT, 0x40001C00 // 0x4000 1C00 T21_CNT Bits------------------------------------- .EQU T21_CNT_TXCNT31, 31 .EQU T21_CNT_TXCNT30, 30 .EQU T21_CNT_TXCNT29, 29 .EQU T21_CNT_TXCNT28, 28 .EQU T21_CNT_TXCNT27, 27 .EQU T21_CNT_TXCNT26, 26 .EQU T21_CNT_TXCNT25, 25 .EQU T21_CNT_TXCNT24, 24 .EQU T21_CNT_TXCNT23, 23 .EQU T21_CNT_TXCNT22, 22 .EQU T21_CNT_TXCNT21, 21 .EQU T21_CNT_TXCNT20, 20 .EQU T21_CNT_TXCNT19, 19 .EQU T21_CNT_TXCNT18, 18 .EQU T21_CNT_TXCNT17, 17 .EQU T21_CNT_TXCNT16, 16 .EQU T21_CNT_TXCNT15, 15 .EQU T21_CNT_TXCNT14, 14 .EQU T21_CNT_TXCNT13, 13 .EQU T21_CNT_TXCNT12, 12 .EQU T21_CNT_TXCNT11, 11 .EQU T21_CNT_TXCNT10, 10 .EQU T21_CNT_TXCNT9, 9 .EQU T21_CNT_TXCNT8, 8 .EQU T21_CNT_TXCNT7, 7 .EQU T21_CNT_TXCNT6, 6 .EQU T21_CNT_TXCNT5, 5 .EQU T21_CNT_TXCNT4, 4 .EQU T21_CNT_TXCNT3, 3 .EQU T21_CNT_TXCNT2, 2 .EQU T21_CNT_TXCNT1, 1 .EQU T21_CNT_TXCNT0, 0 // register------------------------------------- .EQU T21_CTL1, 0x40001C04 // 0x4000 1C04 T21_CTL1 Bits------------------------------------- .EQU T21_CTL1_TXIF, 13 .EQU T21_CTL1_TXIE, 12 .EQU T21_CTL1_TXCMS2, 10 .EQU T21_CTL1_TXCMS1, 9 .EQU T21_CTL1_TXCMS0, 8 .EQU T21_CTL1_TXDIR, 7 .EQU T21_CTL1_TXCLK1, 6 .EQU T21_CTL1_TXCLK0, 5 .EQU T21_CTL1_TXSY, 3 .EQU T21_CTL1_TXCS, 1 .EQU T21_CTL1_TXEN, 0 // register------------------------------------- .EQU T21_CTL2, 0x40001C08 // 0x4000 1C08 T21_CTL2 Bits------------------------------------- .EQU T21_CTL2_TRGSEL1, 15 .EQU T21_CTL2_TRGSEL0, 14 .EQU T21_CTL2_TXUR, 13 .EQU T21_CTL2_TXMSSYNC, 12 .EQU T21_CTL2_TXTS3, 11 .EQU T21_CTL2_TXTS2, 10 .EQU T21_CTL2_TXTS1, 9 .EQU T21_CTL2_TXTS0, 8 .EQU T21_CTL2_TXSMS2, 7 .EQU T21_CTL2_TXSMS1, 6 .EQU T21_CTL2_TXSMS0, 5 .EQU T21_CTL2_TXMMS2, 4 .EQU T21_CTL2_TXMMS1, 3 .EQU T21_CTL2_TXMMS0, 2 .EQU T21_CTL2_TXUDEVT, 1 .EQU T21_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T21_PRSC, 0x40001C0C // 0x4000 1C0C T21_PRSC Bits------------------------------------- .EQU T21_PRSC_TXCKS31, 31 .EQU T21_PRSC_TXCKS30, 30 .EQU T21_PRSC_TXCKS29, 29 .EQU T21_PRSC_TXCKS28, 28 .EQU T21_PRSC_TXCKS27, 27 .EQU T21_PRSC_TXCKS26, 26 .EQU T21_PRSC_TXCKS25, 25 .EQU T21_PRSC_TXCKS24, 24 .EQU T21_PRSC_TXCKS23, 23 .EQU T21_PRSC_TXCKS22, 22 .EQU T21_PRSC_TXCKS21, 21 .EQU T21_PRSC_TXCKS20, 20 .EQU T21_PRSC_TXCKS19, 19 .EQU T21_PRSC_TXCKS18, 18 .EQU T21_PRSC_TXCKS17, 17 .EQU T21_PRSC_TXCKS16, 16 .EQU T21_PRSC_TXCKS15, 15 .EQU T21_PRSC_TXCKS14, 14 .EQU T21_PRSC_TXCKS13, 13 .EQU T21_PRSC_TXCKS12, 12 .EQU T21_PRSC_TXCKS11, 11 .EQU T21_PRSC_TXCKS10, 10 .EQU T21_PRSC_TXCKS9, 9 .EQU T21_PRSC_TXCKS8, 8 .EQU T21_PRSC_TXCKS7, 7 .EQU T21_PRSC_TXCKS6, 6 .EQU T21_PRSC_TXCKS5, 5 .EQU T21_PRSC_TXCKS4, 4 .EQU T21_PRSC_TXCKS3, 3 .EQU T21_PRSC_TXCKS2, 2 .EQU T21_PRSC_TXCKS1, 1 .EQU T21_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T21_PPX, 0x40001C10 // 0x4000 1C10 T21_PPX Bits------------------------------------- .EQU T21_PPX_PPX31, 31 .EQU T21_PPX_PPX30, 30 .EQU T21_PPX_PPX29, 29 .EQU T21_PPX_PPX28, 28 .EQU T21_PPX_PPX27, 27 .EQU T21_PPX_PPX26, 26 .EQU T21_PPX_PPX25, 25 .EQU T21_PPX_PPX24, 24 .EQU T21_PPX_PPX23, 23 .EQU T21_PPX_PPX22, 22 .EQU T21_PPX_PPX21, 21 .EQU T21_PPX_PPX20, 20 .EQU T21_PPX_PPX19, 19 .EQU T21_PPX_PPX18, 18 .EQU T21_PPX_PPX17, 17 .EQU T21_PPX_PPX16, 16 .EQU T21_PPX_PPX15, 15 .EQU T21_PPX_PPX14, 14 .EQU T21_PPX_PPX13, 13 .EQU T21_PPX_PPX12, 12 .EQU T21_PPX_PPX11, 11 .EQU T21_PPX_PPX10, 10 .EQU T21_PPX_PPX9, 9 .EQU T21_PPX_PPX8, 8 .EQU T21_PPX_PPX7, 7 .EQU T21_PPX_PPX6, 6 .EQU T21_PPX_PPX5, 5 .EQU T21_PPX_PPX4, 4 .EQU T21_PPX_PPX3, 3 .EQU T21_PPX_PPX2, 2 .EQU T21_PPX_PPX1, 1 .EQU T21_PPX_PPX0, 0 // register------------------------------------- .EQU T21_UDTIM, 0x40001C14 // 0x4000 1C14 T21_UDTIM Bits------------------------------------- .EQU T21_UDTIM_TXUD7, 7 .EQU T21_UDTIM_TXUD6, 6 .EQU T21_UDTIM_TXUD5, 5 .EQU T21_UDTIM_TXUD4, 4 .EQU T21_UDTIM_TXUD3, 3 .EQU T21_UDTIM_TXUD2, 2 .EQU T21_UDTIM_TXUD1, 1 .EQU T21_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP21_C1, 0x40001C20 // 0x4000 1C20 CCP21_C1 Bits------------------------------------- .EQU CCP21_C1_CCPXCY31, 31 .EQU CCP21_C1_CCPXCY30, 30 .EQU CCP21_C1_CCPXCY29, 29 .EQU CCP21_C1_CCPXCY28, 28 .EQU CCP21_C1_CCPXCY27, 27 .EQU CCP21_C1_CCPXCY26, 26 .EQU CCP21_C1_CCPXCY25, 25 .EQU CCP21_C1_CCPXCY24, 24 .EQU CCP21_C1_CCPXCY23, 23 .EQU CCP21_C1_CCPXCY22, 22 .EQU CCP21_C1_CCPXCY21, 21 .EQU CCP21_C1_CCPXCY20, 20 .EQU CCP21_C1_CCPXCY19, 19 .EQU CCP21_C1_CCPXCY18, 18 .EQU CCP21_C1_CCPXCY17, 17 .EQU CCP21_C1_CCPXCY16, 16 .EQU CCP21_C1_CCPXCY15, 15 .EQU CCP21_C1_CCPXCY14, 14 .EQU CCP21_C1_CCPXCY13, 13 .EQU CCP21_C1_CCPXCY12, 12 .EQU CCP21_C1_CCPXCY11, 11 .EQU CCP21_C1_CCPXCY10, 10 .EQU CCP21_C1_CCPXCY9, 9 .EQU CCP21_C1_CCPXCY8, 8 .EQU CCP21_C1_CCPXCY7, 7 .EQU CCP21_C1_CCPXCY6, 6 .EQU CCP21_C1_CCPXCY5, 5 .EQU CCP21_C1_CCPXCY4, 4 .EQU CCP21_C1_CCPXCY3, 3 .EQU CCP21_C1_CCPXCY2, 2 .EQU CCP21_C1_CCPXCY1, 1 .EQU CCP21_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP21_C2, 0x40001C24 // 0x4000 1C24 CCP21_C2 Bits------------------------------------- .EQU CCP21_C2_CCPXCY31, 31 .EQU CCP21_C2_CCPXCY30, 30 .EQU CCP21_C2_CCPXCY29, 29 .EQU CCP21_C2_CCPXCY28, 28 .EQU CCP21_C2_CCPXCY27, 27 .EQU CCP21_C2_CCPXCY26, 26 .EQU CCP21_C2_CCPXCY25, 25 .EQU CCP21_C2_CCPXCY24, 24 .EQU CCP21_C2_CCPXCY23, 23 .EQU CCP21_C2_CCPXCY22, 22 .EQU CCP21_C2_CCPXCY21, 21 .EQU CCP21_C2_CCPXCY20, 20 .EQU CCP21_C2_CCPXCY19, 19 .EQU CCP21_C2_CCPXCY18, 18 .EQU CCP21_C2_CCPXCY17, 17 .EQU CCP21_C2_CCPXCY16, 16 .EQU CCP21_C2_CCPXCY15, 15 .EQU CCP21_C2_CCPXCY14, 14 .EQU CCP21_C2_CCPXCY13, 13 .EQU CCP21_C2_CCPXCY12, 12 .EQU CCP21_C2_CCPXCY11, 11 .EQU CCP21_C2_CCPXCY10, 10 .EQU CCP21_C2_CCPXCY9, 9 .EQU CCP21_C2_CCPXCY8, 8 .EQU CCP21_C2_CCPXCY7, 7 .EQU CCP21_C2_CCPXCY6, 6 .EQU CCP21_C2_CCPXCY5, 5 .EQU CCP21_C2_CCPXCY4, 4 .EQU CCP21_C2_CCPXCY3, 3 .EQU CCP21_C2_CCPXCY2, 2 .EQU CCP21_C2_CCPXCY1, 1 .EQU CCP21_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP21_C3, 0x40001C28 // 0x4000 1C28 CCP21_C3 Bits------------------------------------- .EQU CCP21_C3_CCPXCY31, 31 .EQU CCP21_C3_CCPXCY30, 30 .EQU CCP21_C3_CCPXCY29, 29 .EQU CCP21_C3_CCPXCY28, 28 .EQU CCP21_C3_CCPXCY27, 27 .EQU CCP21_C3_CCPXCY26, 26 .EQU CCP21_C3_CCPXCY25, 25 .EQU CCP21_C3_CCPXCY24, 24 .EQU CCP21_C3_CCPXCY23, 23 .EQU CCP21_C3_CCPXCY22, 22 .EQU CCP21_C3_CCPXCY21, 21 .EQU CCP21_C3_CCPXCY20, 20 .EQU CCP21_C3_CCPXCY19, 19 .EQU CCP21_C3_CCPXCY18, 18 .EQU CCP21_C3_CCPXCY17, 17 .EQU CCP21_C3_CCPXCY16, 16 .EQU CCP21_C3_CCPXCY15, 15 .EQU CCP21_C3_CCPXCY14, 14 .EQU CCP21_C3_CCPXCY13, 13 .EQU CCP21_C3_CCPXCY12, 12 .EQU CCP21_C3_CCPXCY11, 11 .EQU CCP21_C3_CCPXCY10, 10 .EQU CCP21_C3_CCPXCY9, 9 .EQU CCP21_C3_CCPXCY8, 8 .EQU CCP21_C3_CCPXCY7, 7 .EQU CCP21_C3_CCPXCY6, 6 .EQU CCP21_C3_CCPXCY5, 5 .EQU CCP21_C3_CCPXCY4, 4 .EQU CCP21_C3_CCPXCY3, 3 .EQU CCP21_C3_CCPXCY2, 2 .EQU CCP21_C3_CCPXCY1, 1 .EQU CCP21_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP21_C4, 0x40001C2C // 0x4000 1C2C CCP21_C4 Bits------------------------------------- .EQU CCP21_C4_CCPXCY31, 31 .EQU CCP21_C4_CCPXCY30, 30 .EQU CCP21_C4_CCPXCY29, 29 .EQU CCP21_C4_CCPXCY28, 28 .EQU CCP21_C4_CCPXCY27, 27 .EQU CCP21_C4_CCPXCY26, 26 .EQU CCP21_C4_CCPXCY25, 25 .EQU CCP21_C4_CCPXCY24, 24 .EQU CCP21_C4_CCPXCY23, 23 .EQU CCP21_C4_CCPXCY22, 22 .EQU CCP21_C4_CCPXCY21, 21 .EQU CCP21_C4_CCPXCY20, 20 .EQU CCP21_C4_CCPXCY19, 19 .EQU CCP21_C4_CCPXCY18, 18 .EQU CCP21_C4_CCPXCY17, 17 .EQU CCP21_C4_CCPXCY16, 16 .EQU CCP21_C4_CCPXCY15, 15 .EQU CCP21_C4_CCPXCY14, 14 .EQU CCP21_C4_CCPXCY13, 13 .EQU CCP21_C4_CCPXCY12, 12 .EQU CCP21_C4_CCPXCY11, 11 .EQU CCP21_C4_CCPXCY10, 10 .EQU CCP21_C4_CCPXCY9, 9 .EQU CCP21_C4_CCPXCY8, 8 .EQU CCP21_C4_CCPXCY7, 7 .EQU CCP21_C4_CCPXCY6, 6 .EQU CCP21_C4_CCPXCY5, 5 .EQU CCP21_C4_CCPXCY4, 4 .EQU CCP21_C4_CCPXCY3, 3 .EQU CCP21_C4_CCPXCY2, 2 .EQU CCP21_C4_CCPXCY1, 1 .EQU CCP21_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP21_SRIC, 0x40001C30 // 0x4000 1C30 CCP21_SRIC Bits------------------------------------- .EQU CCP21_SRIC_TXIC, 6 .EQU CCP21_SRIC_TXUIC, 5 .EQU CCP21_SRIC_TXTIC, 4 .EQU CCP21_SRIC_CC4IC, 3 .EQU CCP21_SRIC_CC3IC, 2 .EQU CCP21_SRIC_CC2IC, 1 .EQU CCP21_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP21_DF, 0x40001C34 // 0x4000 1C34 CCP21_DF Bits------------------------------------- .EQU CCP21_DF_TXUDF, 5 .EQU CCP21_DF_TXTDF, 4 .EQU CCP21_DF_CC4DF, 3 .EQU CCP21_DF_CC3DF, 2 .EQU CCP21_DF_CC2DF, 1 .EQU CCP21_DF_CC1DF, 0 // register------------------------------------- .EQU CCP21_CTL1, 0x40001C40 // 0x4000 1C40 CCP21_CTL1 Bits------------------------------------- .EQU CCP21_CTL1_CH4M3, 15 .EQU CCP21_CTL1_CH4M2, 14 .EQU CCP21_CTL1_CH4M1, 13 .EQU CCP21_CTL1_CH4M0, 12 .EQU CCP21_CTL1_CH3M3, 11 .EQU CCP21_CTL1_CH3M2, 10 .EQU CCP21_CTL1_CH3M1, 9 .EQU CCP21_CTL1_CH3M0, 8 .EQU CCP21_CTL1_CH2M3, 7 .EQU CCP21_CTL1_CH2M2, 6 .EQU CCP21_CTL1_CH2M1, 5 .EQU CCP21_CTL1_CH2M0, 4 .EQU CCP21_CTL1_CH1M3, 3 .EQU CCP21_CTL1_CH1M2, 2 .EQU CCP21_CTL1_CH1M1, 1 .EQU CCP21_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP21_R1, 0x40001C44 // 0x4000 1C44 CCP21_R1 Bits------------------------------------- .EQU CCP21_R1_CCPXRY31, 31 .EQU CCP21_R1_CCPXRY30, 30 .EQU CCP21_R1_CCPXRY29, 29 .EQU CCP21_R1_CCPXRY28, 28 .EQU CCP21_R1_CCPXRY27, 27 .EQU CCP21_R1_CCPXRY26, 26 .EQU CCP21_R1_CCPXRY25, 25 .EQU CCP21_R1_CCPXRY24, 24 .EQU CCP21_R1_CCPXRY23, 23 .EQU CCP21_R1_CCPXRY22, 22 .EQU CCP21_R1_CCPXRY21, 21 .EQU CCP21_R1_CCPXRY20, 20 .EQU CCP21_R1_CCPXRY19, 19 .EQU CCP21_R1_CCPXRY18, 18 .EQU CCP21_R1_CCPXRY17, 17 .EQU CCP21_R1_CCPXRY16, 16 .EQU CCP21_R1_CCPXRY15, 15 .EQU CCP21_R1_CCPXRY14, 14 .EQU CCP21_R1_CCPXRY13, 13 .EQU CCP21_R1_CCPXRY12, 12 .EQU CCP21_R1_CCPXRY11, 11 .EQU CCP21_R1_CCPXRY10, 10 .EQU CCP21_R1_CCPXRY9, 9 .EQU CCP21_R1_CCPXRY8, 8 .EQU CCP21_R1_CCPXRY7, 7 .EQU CCP21_R1_CCPXRY6, 6 .EQU CCP21_R1_CCPXRY5, 5 .EQU CCP21_R1_CCPXRY4, 4 .EQU CCP21_R1_CCPXRY3, 3 .EQU CCP21_R1_CCPXRY2, 2 .EQU CCP21_R1_CCPXRY1, 1 .EQU CCP21_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP21_R2, 0x40001C48 // 0x4000 1C48 CCP21_R2 Bits------------------------------------- .EQU CCP21_R2_CCPXRY31, 31 .EQU CCP21_R2_CCPXRY30, 30 .EQU CCP21_R2_CCPXRY29, 29 .EQU CCP21_R2_CCPXRY28, 28 .EQU CCP21_R2_CCPXRY27, 27 .EQU CCP21_R2_CCPXRY26, 26 .EQU CCP21_R2_CCPXRY25, 25 .EQU CCP21_R2_CCPXRY24, 24 .EQU CCP21_R2_CCPXRY23, 23 .EQU CCP21_R2_CCPXRY22, 22 .EQU CCP21_R2_CCPXRY21, 21 .EQU CCP21_R2_CCPXRY20, 20 .EQU CCP21_R2_CCPXRY19, 19 .EQU CCP21_R2_CCPXRY18, 18 .EQU CCP21_R2_CCPXRY17, 17 .EQU CCP21_R2_CCPXRY16, 16 .EQU CCP21_R2_CCPXRY15, 15 .EQU CCP21_R2_CCPXRY14, 14 .EQU CCP21_R2_CCPXRY13, 13 .EQU CCP21_R2_CCPXRY12, 12 .EQU CCP21_R2_CCPXRY11, 11 .EQU CCP21_R2_CCPXRY10, 10 .EQU CCP21_R2_CCPXRY9, 9 .EQU CCP21_R2_CCPXRY8, 8 .EQU CCP21_R2_CCPXRY7, 7 .EQU CCP21_R2_CCPXRY6, 6 .EQU CCP21_R2_CCPXRY5, 5 .EQU CCP21_R2_CCPXRY4, 4 .EQU CCP21_R2_CCPXRY3, 3 .EQU CCP21_R2_CCPXRY2, 2 .EQU CCP21_R2_CCPXRY1, 1 .EQU CCP21_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP21_R3, 0x40001C4C // 0x4000 1C4C CCP21_R3 Bits------------------------------------- .EQU CCP21_R3_CCPXRY31, 31 .EQU CCP21_R3_CCPXRY30, 30 .EQU CCP21_R3_CCPXRY29, 29 .EQU CCP21_R3_CCPXRY28, 28 .EQU CCP21_R3_CCPXRY27, 27 .EQU CCP21_R3_CCPXRY26, 26 .EQU CCP21_R3_CCPXRY25, 25 .EQU CCP21_R3_CCPXRY24, 24 .EQU CCP21_R3_CCPXRY23, 23 .EQU CCP21_R3_CCPXRY22, 22 .EQU CCP21_R3_CCPXRY21, 21 .EQU CCP21_R3_CCPXRY20, 20 .EQU CCP21_R3_CCPXRY19, 19 .EQU CCP21_R3_CCPXRY18, 18 .EQU CCP21_R3_CCPXRY17, 17 .EQU CCP21_R3_CCPXRY16, 16 .EQU CCP21_R3_CCPXRY15, 15 .EQU CCP21_R3_CCPXRY14, 14 .EQU CCP21_R3_CCPXRY13, 13 .EQU CCP21_R3_CCPXRY12, 12 .EQU CCP21_R3_CCPXRY11, 11 .EQU CCP21_R3_CCPXRY10, 10 .EQU CCP21_R3_CCPXRY9, 9 .EQU CCP21_R3_CCPXRY8, 8 .EQU CCP21_R3_CCPXRY7, 7 .EQU CCP21_R3_CCPXRY6, 6 .EQU CCP21_R3_CCPXRY5, 5 .EQU CCP21_R3_CCPXRY4, 4 .EQU CCP21_R3_CCPXRY3, 3 .EQU CCP21_R3_CCPXRY2, 2 .EQU CCP21_R3_CCPXRY1, 1 .EQU CCP21_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP21_R4, 0x40001C50 // 0x4000 1C50 CCP21_R4 Bits------------------------------------- .EQU CCP21_R4_CCPXRY31, 31 .EQU CCP21_R4_CCPXRY30, 30 .EQU CCP21_R4_CCPXRY29, 29 .EQU CCP21_R4_CCPXRY28, 28 .EQU CCP21_R4_CCPXRY27, 27 .EQU CCP21_R4_CCPXRY26, 26 .EQU CCP21_R4_CCPXRY25, 25 .EQU CCP21_R4_CCPXRY24, 24 .EQU CCP21_R4_CCPXRY23, 23 .EQU CCP21_R4_CCPXRY22, 22 .EQU CCP21_R4_CCPXRY21, 21 .EQU CCP21_R4_CCPXRY20, 20 .EQU CCP21_R4_CCPXRY19, 19 .EQU CCP21_R4_CCPXRY18, 18 .EQU CCP21_R4_CCPXRY17, 17 .EQU CCP21_R4_CCPXRY16, 16 .EQU CCP21_R4_CCPXRY15, 15 .EQU CCP21_R4_CCPXRY14, 14 .EQU CCP21_R4_CCPXRY13, 13 .EQU CCP21_R4_CCPXRY12, 12 .EQU CCP21_R4_CCPXRY11, 11 .EQU CCP21_R4_CCPXRY10, 10 .EQU CCP21_R4_CCPXRY9, 9 .EQU CCP21_R4_CCPXRY8, 8 .EQU CCP21_R4_CCPXRY7, 7 .EQU CCP21_R4_CCPXRY6, 6 .EQU CCP21_R4_CCPXRY5, 5 .EQU CCP21_R4_CCPXRY4, 4 .EQU CCP21_R4_CCPXRY3, 3 .EQU CCP21_R4_CCPXRY2, 2 .EQU CCP21_R4_CCPXRY1, 1 .EQU CCP21_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP21_CTL2, 0x40001C54 // 0x4000 1C54 CCP21_CTL2 Bits------------------------------------- .EQU CCP21_CTL2_PXOC4CE, 15 .EQU CCP21_CTL2_PXOC3CE, 14 .EQU CCP21_CTL2_PXOC2CE, 13 .EQU CCP21_CTL2_PXOC1CE, 12 .EQU CCP21_CTL2_PXASS1, 11 .EQU CCP21_CTL2_PXASS0, 10 .EQU CCP21_CTL2_TCKSEL1, 9 .EQU CCP21_CTL2_TCKSEL0, 8 .EQU CCP21_CTL2_PXOC4_1, 7 .EQU CCP21_CTL2_PXOC4_0, 6 .EQU CCP21_CTL2_PXOC3_1, 5 .EQU CCP21_CTL2_PXOC3_0, 4 .EQU CCP21_CTL2_PXOC2_1, 3 .EQU CCP21_CTL2_PXOC2_0, 2 .EQU CCP21_CTL2_PXOC1_1, 1 .EQU CCP21_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP21_CTL3, 0x40001C58 // 0x4000 1C58 CCP21_CTL3 Bits------------------------------------- .EQU CCP21_CTL3_PXSPMST, 15 .EQU CCP21_CTL3_PXPWMI, 14 .EQU CCP21_CTL3_PXXORM, 13 .EQU CCP21_CTL3_PXSPM, 12 .EQU CCP21_CTL3_TXTDE, 11 .EQU CCP21_CTL3_CC4DE, 10 .EQU CCP21_CTL3_CC3DE, 9 .EQU CCP21_CTL3_CC2DE, 8 .EQU CCP21_CTL3_CC1DE, 7 .EQU CCP21_CTL3_TXUDE, 6 .EQU CCP21_CTL3_TXUIE, 5 .EQU CCP21_CTL3_TXTIE, 4 .EQU CCP21_CTL3_CC4IE, 3 .EQU CCP21_CTL3_CC3IE, 2 .EQU CCP21_CTL3_CC2IE, 1 .EQU CCP21_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP21_EGIF, 0x40001C5C // 0x4000 1C5C CCP21_EGIF Bits------------------------------------- .EQU CCP21_EGIF_POSSEL, 13 .EQU CCP21_EGIF_PXSEL, 12 .EQU CCP21_EGIF_TXUIF, 11 .EQU CCP21_EGIF_TXTIF, 10 .EQU CCP21_EGIF_CC4IF, 9 .EQU CCP21_EGIF_CC3IF, 8 .EQU CCP21_EGIF_CC2IF, 7 .EQU CCP21_EGIF_CC1IF, 6 .EQU CCP21_EGIF_TXTRG, 5 .EQU CCP21_EGIF_CC4G, 4 .EQU CCP21_EGIF_CC3G, 3 .EQU CCP21_EGIF_CC2G, 2 .EQU CCP21_EGIF_CC1G, 1 .EQU CCP21_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU T22_CNT, 0x40001C80 // 0x4000 1C80 T22_CNT Bits------------------------------------- .EQU T22_CNT_TXCNT15, 15 .EQU T22_CNT_TXCNT14, 14 .EQU T22_CNT_TXCNT13, 13 .EQU T22_CNT_TXCNT12, 12 .EQU T22_CNT_TXCNT11, 11 .EQU T22_CNT_TXCNT10, 10 .EQU T22_CNT_TXCNT9, 9 .EQU T22_CNT_TXCNT8, 8 .EQU T22_CNT_TXCNT7, 7 .EQU T22_CNT_TXCNT6, 6 .EQU T22_CNT_TXCNT5, 5 .EQU T22_CNT_TXCNT4, 4 .EQU T22_CNT_TXCNT3, 3 .EQU T22_CNT_TXCNT2, 2 .EQU T22_CNT_TXCNT1, 1 .EQU T22_CNT_TXCNT0, 0 // register------------------------------------- .EQU T22_CTL1, 0x40001C84 // 0x4000 1C84 T22_CTL1 Bits------------------------------------- .EQU T22_CTL1_TXIF, 13 .EQU T22_CTL1_TXIE, 12 .EQU T22_CTL1_TXCMS2, 10 .EQU T22_CTL1_TXCMS1, 9 .EQU T22_CTL1_TXCMS0, 8 .EQU T22_CTL1_TXDIR, 7 .EQU T22_CTL1_TXCLK1, 6 .EQU T22_CTL1_TXCLK0, 5 .EQU T22_CTL1_TXSY, 3 .EQU T22_CTL1_TXCS, 1 .EQU T22_CTL1_TXEN, 0 // register------------------------------------- .EQU T22_CTL2, 0x40001C88 // 0x4000 1C88 T22_CTL2 Bits------------------------------------- .EQU T22_CTL2_TRGSEL1, 15 .EQU T22_CTL2_TRGSEL0, 14 .EQU T22_CTL2_TXUR, 13 .EQU T22_CTL2_TXMSSYNC, 12 .EQU T22_CTL2_TXTS3, 11 .EQU T22_CTL2_TXTS2, 10 .EQU T22_CTL2_TXTS1, 9 .EQU T22_CTL2_TXTS0, 8 .EQU T22_CTL2_TXSMS2, 7 .EQU T22_CTL2_TXSMS1, 6 .EQU T22_CTL2_TXSMS0, 5 .EQU T22_CTL2_TXMMS2, 4 .EQU T22_CTL2_TXMMS1, 3 .EQU T22_CTL2_TXMMS0, 2 .EQU T22_CTL2_TXUDEVT, 1 .EQU T22_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T22_PRSC, 0x40001C8C // 0x4000 1C8C T22_PRSC Bits------------------------------------- .EQU T22_PRSC_TXCKS15, 15 .EQU T22_PRSC_TXCKS14, 14 .EQU T22_PRSC_TXCKS13, 13 .EQU T22_PRSC_TXCKS12, 12 .EQU T22_PRSC_TXCKS11, 11 .EQU T22_PRSC_TXCKS10, 10 .EQU T22_PRSC_TXCKS9, 9 .EQU T22_PRSC_TXCKS8, 8 .EQU T22_PRSC_TXCKS7, 7 .EQU T22_PRSC_TXCKS6, 6 .EQU T22_PRSC_TXCKS5, 5 .EQU T22_PRSC_TXCKS4, 4 .EQU T22_PRSC_TXCKS3, 3 .EQU T22_PRSC_TXCKS2, 2 .EQU T22_PRSC_TXCKS1, 1 .EQU T22_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T22_PPX, 0x40001C90 // 0x4000 1C90 T22_PPX Bits------------------------------------- .EQU T22_PPX_PPX15, 15 .EQU T22_PPX_PPX14, 14 .EQU T22_PPX_PPX13, 13 .EQU T22_PPX_PPX12, 12 .EQU T22_PPX_PPX11, 11 .EQU T22_PPX_PPX10, 10 .EQU T22_PPX_PPX9, 9 .EQU T22_PPX_PPX8, 8 .EQU T22_PPX_PPX7, 7 .EQU T22_PPX_PPX6, 6 .EQU T22_PPX_PPX5, 5 .EQU T22_PPX_PPX4, 4 .EQU T22_PPX_PPX3, 3 .EQU T22_PPX_PPX2, 2 .EQU T22_PPX_PPX1, 1 .EQU T22_PPX_PPX0, 0 // register------------------------------------- .EQU T22_UDTIM, 0x40001C94 // 0x4000 1C94 T22_UDTIM Bits------------------------------------- .EQU T22_UDTIM_TXUD7, 7 .EQU T22_UDTIM_TXUD6, 6 .EQU T22_UDTIM_TXUD5, 5 .EQU T22_UDTIM_TXUD4, 4 .EQU T22_UDTIM_TXUD3, 3 .EQU T22_UDTIM_TXUD2, 2 .EQU T22_UDTIM_TXUD1, 1 .EQU T22_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP22_C1, 0x40001CA0 // 0x4000 1CA0 CCP22_C1 Bits------------------------------------- .EQU CCP22_C1_CCPXCY15, 15 .EQU CCP22_C1_CCPXCY14, 14 .EQU CCP22_C1_CCPXCY13, 13 .EQU CCP22_C1_CCPXCY12, 12 .EQU CCP22_C1_CCPXCY11, 11 .EQU CCP22_C1_CCPXCY10, 10 .EQU CCP22_C1_CCPXCY9, 9 .EQU CCP22_C1_CCPXCY8, 8 .EQU CCP22_C1_CCPXCY7, 7 .EQU CCP22_C1_CCPXCY6, 6 .EQU CCP22_C1_CCPXCY5, 5 .EQU CCP22_C1_CCPXCY4, 4 .EQU CCP22_C1_CCPXCY3, 3 .EQU CCP22_C1_CCPXCY2, 2 .EQU CCP22_C1_CCPXCY1, 1 .EQU CCP22_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP22_C2, 0x40001CA4 // 0x4000 1CA4 CCP22_C2 Bits------------------------------------- .EQU CCP22_C2_CCPXCY15, 15 .EQU CCP22_C2_CCPXCY14, 14 .EQU CCP22_C2_CCPXCY13, 13 .EQU CCP22_C2_CCPXCY12, 12 .EQU CCP22_C2_CCPXCY11, 11 .EQU CCP22_C2_CCPXCY10, 10 .EQU CCP22_C2_CCPXCY9, 9 .EQU CCP22_C2_CCPXCY8, 8 .EQU CCP22_C2_CCPXCY7, 7 .EQU CCP22_C2_CCPXCY6, 6 .EQU CCP22_C2_CCPXCY5, 5 .EQU CCP22_C2_CCPXCY4, 4 .EQU CCP22_C2_CCPXCY3, 3 .EQU CCP22_C2_CCPXCY2, 2 .EQU CCP22_C2_CCPXCY1, 1 .EQU CCP22_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP22_C3, 0x40001CA8 // 0x4000 1CA8 CCP22_C3 Bits------------------------------------- .EQU CCP22_C3_CCPXCY15, 15 .EQU CCP22_C3_CCPXCY14, 14 .EQU CCP22_C3_CCPXCY13, 13 .EQU CCP22_C3_CCPXCY12, 12 .EQU CCP22_C3_CCPXCY11, 11 .EQU CCP22_C3_CCPXCY10, 10 .EQU CCP22_C3_CCPXCY9, 9 .EQU CCP22_C3_CCPXCY8, 8 .EQU CCP22_C3_CCPXCY7, 7 .EQU CCP22_C3_CCPXCY6, 6 .EQU CCP22_C3_CCPXCY5, 5 .EQU CCP22_C3_CCPXCY4, 4 .EQU CCP22_C3_CCPXCY3, 3 .EQU CCP22_C3_CCPXCY2, 2 .EQU CCP22_C3_CCPXCY1, 1 .EQU CCP22_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP22_C4, 0x40001CAC // 0x4000 1CAC CCP22_C4 Bits------------------------------------- .EQU CCP22_C4_CCPXCY15, 15 .EQU CCP22_C4_CCPXCY14, 14 .EQU CCP22_C4_CCPXCY13, 13 .EQU CCP22_C4_CCPXCY12, 12 .EQU CCP22_C4_CCPXCY11, 11 .EQU CCP22_C4_CCPXCY10, 10 .EQU CCP22_C4_CCPXCY9, 9 .EQU CCP22_C4_CCPXCY8, 8 .EQU CCP22_C4_CCPXCY7, 7 .EQU CCP22_C4_CCPXCY6, 6 .EQU CCP22_C4_CCPXCY5, 5 .EQU CCP22_C4_CCPXCY4, 4 .EQU CCP22_C4_CCPXCY3, 3 .EQU CCP22_C4_CCPXCY2, 2 .EQU CCP22_C4_CCPXCY1, 1 .EQU CCP22_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP22_SRIC, 0x40001CB0 // 0x4000 1CB0 CCP22_SRIC Bits------------------------------------- .EQU CCP22_SRIC_TXIC, 6 .EQU CCP22_SRIC_TXUIC, 5 .EQU CCP22_SRIC_TXTIC, 4 .EQU CCP22_SRIC_CC4IC, 3 .EQU CCP22_SRIC_CC3IC, 2 .EQU CCP22_SRIC_CC2IC, 1 .EQU CCP22_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP22_DF, 0x40001CB4 // 0x4000 1CB4 CCP22_DF Bits------------------------------------- .EQU CCP22_DF_TXUDF, 5 .EQU CCP22_DF_TXTDF, 4 .EQU CCP22_DF_CC4DF, 3 .EQU CCP22_DF_CC3DF, 2 .EQU CCP22_DF_CC2DF, 1 .EQU CCP22_DF_CC1DF, 0 // register------------------------------------- .EQU CCP22_CTL1, 0x40001CC0 // 0x4000 1CC0 CCP22_CTL1 Bits------------------------------------- .EQU CCP22_CTL1_CH4M3, 15 .EQU CCP22_CTL1_CH4M2, 14 .EQU CCP22_CTL1_CH4M1, 13 .EQU CCP22_CTL1_CH4M0, 12 .EQU CCP22_CTL1_CH3M3, 11 .EQU CCP22_CTL1_CH3M2, 10 .EQU CCP22_CTL1_CH3M1, 9 .EQU CCP22_CTL1_CH3M0, 8 .EQU CCP22_CTL1_CH2M3, 7 .EQU CCP22_CTL1_CH2M2, 6 .EQU CCP22_CTL1_CH2M1, 5 .EQU CCP22_CTL1_CH2M0, 4 .EQU CCP22_CTL1_CH1M3, 3 .EQU CCP22_CTL1_CH1M2, 2 .EQU CCP22_CTL1_CH1M1, 1 .EQU CCP22_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP22_R1, 0x40001CC4 // 0x4000 1CC4 CCP22_R1 Bits------------------------------------- .EQU CCP22_R1_CCPXRY15, 15 .EQU CCP22_R1_CCPXRY14, 14 .EQU CCP22_R1_CCPXRY13, 13 .EQU CCP22_R1_CCPXRY12, 12 .EQU CCP22_R1_CCPXRY11, 11 .EQU CCP22_R1_CCPXRY10, 10 .EQU CCP22_R1_CCPXRY9, 9 .EQU CCP22_R1_CCPXRY8, 8 .EQU CCP22_R1_CCPXRY7, 7 .EQU CCP22_R1_CCPXRY6, 6 .EQU CCP22_R1_CCPXRY5, 5 .EQU CCP22_R1_CCPXRY4, 4 .EQU CCP22_R1_CCPXRY3, 3 .EQU CCP22_R1_CCPXRY2, 2 .EQU CCP22_R1_CCPXRY1, 1 .EQU CCP22_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP22_R2, 0x40001CC8 // 0x4000 1CC8 CCP22_R2 Bits------------------------------------- .EQU CCP22_R2_CCPXRY15, 15 .EQU CCP22_R2_CCPXRY14, 14 .EQU CCP22_R2_CCPXRY13, 13 .EQU CCP22_R2_CCPXRY12, 12 .EQU CCP22_R2_CCPXRY11, 11 .EQU CCP22_R2_CCPXRY10, 10 .EQU CCP22_R2_CCPXRY9, 9 .EQU CCP22_R2_CCPXRY8, 8 .EQU CCP22_R2_CCPXRY7, 7 .EQU CCP22_R2_CCPXRY6, 6 .EQU CCP22_R2_CCPXRY5, 5 .EQU CCP22_R2_CCPXRY4, 4 .EQU CCP22_R2_CCPXRY3, 3 .EQU CCP22_R2_CCPXRY2, 2 .EQU CCP22_R2_CCPXRY1, 1 .EQU CCP22_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP22_R3, 0x40001CCC // 0x4000 1CCC CCP22_R3 Bits------------------------------------- .EQU CCP22_R3_CCPXRY15, 15 .EQU CCP22_R3_CCPXRY14, 14 .EQU CCP22_R3_CCPXRY13, 13 .EQU CCP22_R3_CCPXRY12, 12 .EQU CCP22_R3_CCPXRY11, 11 .EQU CCP22_R3_CCPXRY10, 10 .EQU CCP22_R3_CCPXRY9, 9 .EQU CCP22_R3_CCPXRY8, 8 .EQU CCP22_R3_CCPXRY7, 7 .EQU CCP22_R3_CCPXRY6, 6 .EQU CCP22_R3_CCPXRY5, 5 .EQU CCP22_R3_CCPXRY4, 4 .EQU CCP22_R3_CCPXRY3, 3 .EQU CCP22_R3_CCPXRY2, 2 .EQU CCP22_R3_CCPXRY1, 1 .EQU CCP22_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP22_R4, 0x40001CD0 // 0x4000 1CD0 CCP22_R4 Bits------------------------------------- .EQU CCP22_R4_CCPXRY15, 15 .EQU CCP22_R4_CCPXRY14, 14 .EQU CCP22_R4_CCPXRY13, 13 .EQU CCP22_R4_CCPXRY12, 12 .EQU CCP22_R4_CCPXRY11, 11 .EQU CCP22_R4_CCPXRY10, 10 .EQU CCP22_R4_CCPXRY9, 9 .EQU CCP22_R4_CCPXRY8, 8 .EQU CCP22_R4_CCPXRY7, 7 .EQU CCP22_R4_CCPXRY6, 6 .EQU CCP22_R4_CCPXRY5, 5 .EQU CCP22_R4_CCPXRY4, 4 .EQU CCP22_R4_CCPXRY3, 3 .EQU CCP22_R4_CCPXRY2, 2 .EQU CCP22_R4_CCPXRY1, 1 .EQU CCP22_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP22_CTL2, 0x40001CD4 // 0x4000 1CD4 CCP22_CTL2 Bits------------------------------------- .EQU CCP22_CTL2_PXOC4CE, 15 .EQU CCP22_CTL2_PXOC3CE, 14 .EQU CCP22_CTL2_PXOC2CE, 13 .EQU CCP22_CTL2_PXOC1CE, 12 .EQU CCP22_CTL2_PXASS1, 11 .EQU CCP22_CTL2_PXASS0, 10 .EQU CCP22_CTL2_TCKSEL1, 9 .EQU CCP22_CTL2_TCKSEL0, 8 .EQU CCP22_CTL2_PXOC4_1, 7 .EQU CCP22_CTL2_PXOC4_0, 6 .EQU CCP22_CTL2_PXOC3_1, 5 .EQU CCP22_CTL2_PXOC3_0, 4 .EQU CCP22_CTL2_PXOC2_1, 3 .EQU CCP22_CTL2_PXOC2_0, 2 .EQU CCP22_CTL2_PXOC1_1, 1 .EQU CCP22_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP22_CTL3, 0x40001CD8 // 0x4000 1CD8 CCP22_CTL3 Bits------------------------------------- .EQU CCP22_CTL3_PXSPMST, 15 .EQU CCP22_CTL3_PXPWMI, 14 .EQU CCP22_CTL3_PXXORM, 13 .EQU CCP22_CTL3_PXSPM, 12 .EQU CCP22_CTL3_TXTDE, 11 .EQU CCP22_CTL3_CC4DE, 10 .EQU CCP22_CTL3_CC3DE, 9 .EQU CCP22_CTL3_CC2DE, 8 .EQU CCP22_CTL3_CC1DE, 7 .EQU CCP22_CTL3_TXUDE, 6 .EQU CCP22_CTL3_TXUIE, 5 .EQU CCP22_CTL3_TXTIE, 4 .EQU CCP22_CTL3_CC4IE, 3 .EQU CCP22_CTL3_CC3IE, 2 .EQU CCP22_CTL3_CC2IE, 1 .EQU CCP22_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP22_EGIF, 0x40001CDC // 0x4000 1CDC CCP22_EGIF Bits------------------------------------- .EQU CCP22_EGIF_POSSEL, 13 .EQU CCP22_EGIF_PXSEL, 12 .EQU CCP22_EGIF_TXUIF, 11 .EQU CCP22_EGIF_TXTIF, 10 .EQU CCP22_EGIF_CC4IF, 9 .EQU CCP22_EGIF_CC3IF, 8 .EQU CCP22_EGIF_CC2IF, 7 .EQU CCP22_EGIF_CC1IF, 6 .EQU CCP22_EGIF_TXTRG, 5 .EQU CCP22_EGIF_CC4G, 4 .EQU CCP22_EGIF_CC3G, 3 .EQU CCP22_EGIF_CC2G, 2 .EQU CCP22_EGIF_CC1G, 1 .EQU CCP22_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU T23_CNT, 0x40001D00 // 0x4000 1D00 T23_CNT Bits------------------------------------- .EQU T23_CNT_TXCNT15, 15 .EQU T23_CNT_TXCNT14, 14 .EQU T23_CNT_TXCNT13, 13 .EQU T23_CNT_TXCNT12, 12 .EQU T23_CNT_TXCNT11, 11 .EQU T23_CNT_TXCNT10, 10 .EQU T23_CNT_TXCNT9, 9 .EQU T23_CNT_TXCNT8, 8 .EQU T23_CNT_TXCNT7, 7 .EQU T23_CNT_TXCNT6, 6 .EQU T23_CNT_TXCNT5, 5 .EQU T23_CNT_TXCNT4, 4 .EQU T23_CNT_TXCNT3, 3 .EQU T23_CNT_TXCNT2, 2 .EQU T23_CNT_TXCNT1, 1 .EQU T23_CNT_TXCNT0, 0 // register------------------------------------- .EQU T23_CTL1, 0x40001D04 // 0x4000 1D04 T23_CTL1 Bits------------------------------------- .EQU T23_CTL1_TXIF, 13 .EQU T23_CTL1_TXIE, 12 .EQU T23_CTL1_TXCMS2, 10 .EQU T23_CTL1_TXCMS1, 9 .EQU T23_CTL1_TXCMS0, 8 .EQU T23_CTL1_TXDIR, 7 .EQU T23_CTL1_TXCLK1, 6 .EQU T23_CTL1_TXCLK0, 5 .EQU T23_CTL1_TXSY, 3 .EQU T23_CTL1_TXCS, 1 .EQU T23_CTL1_TXEN, 0 // register------------------------------------- .EQU T23_CTL2, 0x40001D08 // 0x4000 1D08 T23_CTL2 Bits------------------------------------- .EQU T23_CTL2_TRGSEL1, 15 .EQU T23_CTL2_TRGSEL0, 14 .EQU T23_CTL2_TXUR, 13 .EQU T23_CTL2_TXMSSYNC, 12 .EQU T23_CTL2_TXTS3, 11 .EQU T23_CTL2_TXTS2, 10 .EQU T23_CTL2_TXTS1, 9 .EQU T23_CTL2_TXTS0, 8 .EQU T23_CTL2_TXSMS2, 7 .EQU T23_CTL2_TXSMS1, 6 .EQU T23_CTL2_TXSMS0, 5 .EQU T23_CTL2_TXMMS2, 4 .EQU T23_CTL2_TXMMS1, 3 .EQU T23_CTL2_TXMMS0, 2 .EQU T23_CTL2_TXUDEVT, 1 .EQU T23_CTL2_TXUDEN, 0 // register------------------------------------- .EQU T23_PRSC, 0x40001D0C // 0x4000 1D0C T23_PRSC Bits------------------------------------- .EQU T23_PRSC_TXCKS15, 15 .EQU T23_PRSC_TXCKS14, 14 .EQU T23_PRSC_TXCKS13, 13 .EQU T23_PRSC_TXCKS12, 12 .EQU T23_PRSC_TXCKS11, 11 .EQU T23_PRSC_TXCKS10, 10 .EQU T23_PRSC_TXCKS9, 9 .EQU T23_PRSC_TXCKS8, 8 .EQU T23_PRSC_TXCKS7, 7 .EQU T23_PRSC_TXCKS6, 6 .EQU T23_PRSC_TXCKS5, 5 .EQU T23_PRSC_TXCKS4, 4 .EQU T23_PRSC_TXCKS3, 3 .EQU T23_PRSC_TXCKS2, 2 .EQU T23_PRSC_TXCKS1, 1 .EQU T23_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T23_PPX, 0x40001D10 // 0x4000 1D10 T23_PPX Bits------------------------------------- .EQU T23_PPX_PPX15, 15 .EQU T23_PPX_PPX14, 14 .EQU T23_PPX_PPX13, 13 .EQU T23_PPX_PPX12, 12 .EQU T23_PPX_PPX11, 11 .EQU T23_PPX_PPX10, 10 .EQU T23_PPX_PPX9, 9 .EQU T23_PPX_PPX8, 8 .EQU T23_PPX_PPX7, 7 .EQU T23_PPX_PPX6, 6 .EQU T23_PPX_PPX5, 5 .EQU T23_PPX_PPX4, 4 .EQU T23_PPX_PPX3, 3 .EQU T23_PPX_PPX2, 2 .EQU T23_PPX_PPX1, 1 .EQU T23_PPX_PPX0, 0 // register------------------------------------- .EQU T23_UDTIM, 0x40001D14 // 0x4000 1D14 T23_UDTIM Bits------------------------------------- .EQU T23_UDTIM_TXUD7, 7 .EQU T23_UDTIM_TXUD6, 6 .EQU T23_UDTIM_TXUD5, 5 .EQU T23_UDTIM_TXUD4, 4 .EQU T23_UDTIM_TXUD3, 3 .EQU T23_UDTIM_TXUD2, 2 .EQU T23_UDTIM_TXUD1, 1 .EQU T23_UDTIM_TXUD0, 0 // register------------------------------------- .EQU CCP23_C1, 0x40001D20 // 0x4000 1D20 CCP23_C1 Bits------------------------------------- .EQU CCP23_C1_CCPXCY15, 15 .EQU CCP23_C1_CCPXCY14, 14 .EQU CCP23_C1_CCPXCY13, 13 .EQU CCP23_C1_CCPXCY12, 12 .EQU CCP23_C1_CCPXCY11, 11 .EQU CCP23_C1_CCPXCY10, 10 .EQU CCP23_C1_CCPXCY9, 9 .EQU CCP23_C1_CCPXCY8, 8 .EQU CCP23_C1_CCPXCY7, 7 .EQU CCP23_C1_CCPXCY6, 6 .EQU CCP23_C1_CCPXCY5, 5 .EQU CCP23_C1_CCPXCY4, 4 .EQU CCP23_C1_CCPXCY3, 3 .EQU CCP23_C1_CCPXCY2, 2 .EQU CCP23_C1_CCPXCY1, 1 .EQU CCP23_C1_CCPXCY0, 0 // register------------------------------------- .EQU CCP23_C2, 0x40001D24 // 0x4000 1D24 CCP23_C2 Bits------------------------------------- .EQU CCP23_C2_CCPXCY15, 15 .EQU CCP23_C2_CCPXCY14, 14 .EQU CCP23_C2_CCPXCY13, 13 .EQU CCP23_C2_CCPXCY12, 12 .EQU CCP23_C2_CCPXCY11, 11 .EQU CCP23_C2_CCPXCY10, 10 .EQU CCP23_C2_CCPXCY9, 9 .EQU CCP23_C2_CCPXCY8, 8 .EQU CCP23_C2_CCPXCY7, 7 .EQU CCP23_C2_CCPXCY6, 6 .EQU CCP23_C2_CCPXCY5, 5 .EQU CCP23_C2_CCPXCY4, 4 .EQU CCP23_C2_CCPXCY3, 3 .EQU CCP23_C2_CCPXCY2, 2 .EQU CCP23_C2_CCPXCY1, 1 .EQU CCP23_C2_CCPXCY0, 0 // register------------------------------------- .EQU CCP23_C3, 0x40001D28 // 0x4000 1D28 CCP23_C3 Bits------------------------------------- .EQU CCP23_C3_CCPXCY15, 15 .EQU CCP23_C3_CCPXCY14, 14 .EQU CCP23_C3_CCPXCY13, 13 .EQU CCP23_C3_CCPXCY12, 12 .EQU CCP23_C3_CCPXCY11, 11 .EQU CCP23_C3_CCPXCY10, 10 .EQU CCP23_C3_CCPXCY9, 9 .EQU CCP23_C3_CCPXCY8, 8 .EQU CCP23_C3_CCPXCY7, 7 .EQU CCP23_C3_CCPXCY6, 6 .EQU CCP23_C3_CCPXCY5, 5 .EQU CCP23_C3_CCPXCY4, 4 .EQU CCP23_C3_CCPXCY3, 3 .EQU CCP23_C3_CCPXCY2, 2 .EQU CCP23_C3_CCPXCY1, 1 .EQU CCP23_C3_CCPXCY0, 0 // register------------------------------------- .EQU CCP23_C4, 0x40001D2C // 0x4000 1D2C CCP23_C4 Bits------------------------------------- .EQU CCP23_C4_CCPXCY15, 15 .EQU CCP23_C4_CCPXCY14, 14 .EQU CCP23_C4_CCPXCY13, 13 .EQU CCP23_C4_CCPXCY12, 12 .EQU CCP23_C4_CCPXCY11, 11 .EQU CCP23_C4_CCPXCY10, 10 .EQU CCP23_C4_CCPXCY9, 9 .EQU CCP23_C4_CCPXCY8, 8 .EQU CCP23_C4_CCPXCY7, 7 .EQU CCP23_C4_CCPXCY6, 6 .EQU CCP23_C4_CCPXCY5, 5 .EQU CCP23_C4_CCPXCY4, 4 .EQU CCP23_C4_CCPXCY3, 3 .EQU CCP23_C4_CCPXCY2, 2 .EQU CCP23_C4_CCPXCY1, 1 .EQU CCP23_C4_CCPXCY0, 0 // register------------------------------------- .EQU CCP23_SRIC, 0x40001D30 // 0x4000 1D30 CCP23_SRIC Bits------------------------------------- .EQU CCP23_SRIC_TXIC, 6 .EQU CCP23_SRIC_TXUIC, 5 .EQU CCP23_SRIC_TXTIC, 4 .EQU CCP23_SRIC_CC4IC, 3 .EQU CCP23_SRIC_CC3IC, 2 .EQU CCP23_SRIC_CC2IC, 1 .EQU CCP23_SRIC_CC1IC, 0 // register------------------------------------- .EQU CCP23_DF, 0x40001D34 // 0x4000 1D34 CCP23_DF Bits------------------------------------- .EQU CCP23_DF_TXUDF, 5 .EQU CCP23_DF_TXTDF, 4 .EQU CCP23_DF_CC4DF, 3 .EQU CCP23_DF_CC3DF, 2 .EQU CCP23_DF_CC2DF, 1 .EQU CCP23_DF_CC1DF, 0 // register------------------------------------- .EQU CCP23_CTL1, 0x40001D40 // 0x4000 1D40 CCP23_CTL1 Bits------------------------------------- .EQU CCP23_CTL1_CH4M3, 15 .EQU CCP23_CTL1_CH4M2, 14 .EQU CCP23_CTL1_CH4M1, 13 .EQU CCP23_CTL1_CH4M0, 12 .EQU CCP23_CTL1_CH3M3, 11 .EQU CCP23_CTL1_CH3M2, 10 .EQU CCP23_CTL1_CH3M1, 9 .EQU CCP23_CTL1_CH3M0, 8 .EQU CCP23_CTL1_CH2M3, 7 .EQU CCP23_CTL1_CH2M2, 6 .EQU CCP23_CTL1_CH2M1, 5 .EQU CCP23_CTL1_CH2M0, 4 .EQU CCP23_CTL1_CH1M3, 3 .EQU CCP23_CTL1_CH1M2, 2 .EQU CCP23_CTL1_CH1M1, 1 .EQU CCP23_CTL1_CH1M0, 0 // register------------------------------------- .EQU CCP23_R1, 0x40001D44 // 0x4000 1D44 CCP23_R1 Bits------------------------------------- .EQU CCP23_R1_CCPXRY15, 15 .EQU CCP23_R1_CCPXRY14, 14 .EQU CCP23_R1_CCPXRY13, 13 .EQU CCP23_R1_CCPXRY12, 12 .EQU CCP23_R1_CCPXRY11, 11 .EQU CCP23_R1_CCPXRY10, 10 .EQU CCP23_R1_CCPXRY9, 9 .EQU CCP23_R1_CCPXRY8, 8 .EQU CCP23_R1_CCPXRY7, 7 .EQU CCP23_R1_CCPXRY6, 6 .EQU CCP23_R1_CCPXRY5, 5 .EQU CCP23_R1_CCPXRY4, 4 .EQU CCP23_R1_CCPXRY3, 3 .EQU CCP23_R1_CCPXRY2, 2 .EQU CCP23_R1_CCPXRY1, 1 .EQU CCP23_R1_CCPXRY0, 0 // register------------------------------------- .EQU CCP23_R2, 0x40001D48 // 0x4000 1D48 CCP23_R2 Bits------------------------------------- .EQU CCP23_R2_CCPXRY15, 15 .EQU CCP23_R2_CCPXRY14, 14 .EQU CCP23_R2_CCPXRY13, 13 .EQU CCP23_R2_CCPXRY12, 12 .EQU CCP23_R2_CCPXRY11, 11 .EQU CCP23_R2_CCPXRY10, 10 .EQU CCP23_R2_CCPXRY9, 9 .EQU CCP23_R2_CCPXRY8, 8 .EQU CCP23_R2_CCPXRY7, 7 .EQU CCP23_R2_CCPXRY6, 6 .EQU CCP23_R2_CCPXRY5, 5 .EQU CCP23_R2_CCPXRY4, 4 .EQU CCP23_R2_CCPXRY3, 3 .EQU CCP23_R2_CCPXRY2, 2 .EQU CCP23_R2_CCPXRY1, 1 .EQU CCP23_R2_CCPXRY0, 0 // register------------------------------------- .EQU CCP23_R3, 0x40001D4C // 0x4000 1D4C CCP23_R3 Bits------------------------------------- .EQU CCP23_R3_CCPXRY15, 15 .EQU CCP23_R3_CCPXRY14, 14 .EQU CCP23_R3_CCPXRY13, 13 .EQU CCP23_R3_CCPXRY12, 12 .EQU CCP23_R3_CCPXRY11, 11 .EQU CCP23_R3_CCPXRY10, 10 .EQU CCP23_R3_CCPXRY9, 9 .EQU CCP23_R3_CCPXRY8, 8 .EQU CCP23_R3_CCPXRY7, 7 .EQU CCP23_R3_CCPXRY6, 6 .EQU CCP23_R3_CCPXRY5, 5 .EQU CCP23_R3_CCPXRY4, 4 .EQU CCP23_R3_CCPXRY3, 3 .EQU CCP23_R3_CCPXRY2, 2 .EQU CCP23_R3_CCPXRY1, 1 .EQU CCP23_R3_CCPXRY0, 0 // register------------------------------------- .EQU CCP23_R4, 0x40001D50 // 0x4000 1D50 CCP23_R4 Bits------------------------------------- .EQU CCP23_R4_CCPXRY15, 15 .EQU CCP23_R4_CCPXRY14, 14 .EQU CCP23_R4_CCPXRY13, 13 .EQU CCP23_R4_CCPXRY12, 12 .EQU CCP23_R4_CCPXRY11, 11 .EQU CCP23_R4_CCPXRY10, 10 .EQU CCP23_R4_CCPXRY9, 9 .EQU CCP23_R4_CCPXRY8, 8 .EQU CCP23_R4_CCPXRY7, 7 .EQU CCP23_R4_CCPXRY6, 6 .EQU CCP23_R4_CCPXRY5, 5 .EQU CCP23_R4_CCPXRY4, 4 .EQU CCP23_R4_CCPXRY3, 3 .EQU CCP23_R4_CCPXRY2, 2 .EQU CCP23_R4_CCPXRY1, 1 .EQU CCP23_R4_CCPXRY0, 0 // register------------------------------------- .EQU CCP23_CTL2, 0x40001D54 // 0x4000 1D54 CCP23_CTL2 Bits------------------------------------- .EQU CCP23_CTL2_PXOC4CE, 15 .EQU CCP23_CTL2_PXOC3CE, 14 .EQU CCP23_CTL2_PXOC2CE, 13 .EQU CCP23_CTL2_PXOC1CE, 12 .EQU CCP23_CTL2_PXASS1, 11 .EQU CCP23_CTL2_PXASS0, 10 .EQU CCP23_CTL2_TCKSEL1, 9 .EQU CCP23_CTL2_TCKSEL0, 8 .EQU CCP23_CTL2_PXOC4_1, 7 .EQU CCP23_CTL2_PXOC4_0, 6 .EQU CCP23_CTL2_PXOC3_1, 5 .EQU CCP23_CTL2_PXOC3_0, 4 .EQU CCP23_CTL2_PXOC2_1, 3 .EQU CCP23_CTL2_PXOC2_0, 2 .EQU CCP23_CTL2_PXOC1_1, 1 .EQU CCP23_CTL2_PXOC1_0, 0 // register------------------------------------- .EQU CCP23_CTL3, 0x40001D58 // 0x4000 1D58 CCP23_CTL3 Bits------------------------------------- .EQU CCP23_CTL3_PXSPMST, 15 .EQU CCP23_CTL3_PXPWMI, 14 .EQU CCP23_CTL3_PXXORM, 13 .EQU CCP23_CTL3_PXSPM, 12 .EQU CCP23_CTL3_TXTDE, 11 .EQU CCP23_CTL3_CC4DE, 10 .EQU CCP23_CTL3_CC3DE, 9 .EQU CCP23_CTL3_CC2DE, 8 .EQU CCP23_CTL3_CC1DE, 7 .EQU CCP23_CTL3_TXUDE, 6 .EQU CCP23_CTL3_TXUIE, 5 .EQU CCP23_CTL3_TXTIE, 4 .EQU CCP23_CTL3_CC4IE, 3 .EQU CCP23_CTL3_CC3IE, 2 .EQU CCP23_CTL3_CC2IE, 1 .EQU CCP23_CTL3_CC1IE, 0 // register------------------------------------- .EQU CCP23_EGIF, 0x40001D5C // 0x4000 1D5C CCP23_EGIF Bits------------------------------------- .EQU CCP23_EGIF_POSSEL, 13 .EQU CCP23_EGIF_PXSEL, 12 .EQU CCP23_EGIF_TXUIF, 11 .EQU CCP23_EGIF_TXTIF, 10 .EQU CCP23_EGIF_CC4IF, 9 .EQU CCP23_EGIF_CC3IF, 8 .EQU CCP23_EGIF_CC2IF, 7 .EQU CCP23_EGIF_CC1IF, 6 .EQU CCP23_EGIF_TXTRG, 5 .EQU CCP23_EGIF_CC4G, 4 .EQU CCP23_EGIF_CC3G, 3 .EQU CCP23_EGIF_CC2G, 2 .EQU CCP23_EGIF_CC1G, 1 .EQU CCP23_EGIF_UARTRXEN, 0 // register------------------------------------- .EQU USART5_CTLR, 0x40001E80 // 0x4000 1E80 USART5_CTLR Bits------------------------------------- .EQU USART5_CTLR_SLMEN, 31 .EQU USART5_CTLR_RESHD, 30 .EQU USART5_CTLR_IRDAEN, 29 .EQU USART5_CTLR_BKPWS, 26 .EQU USART5_CTLR_RTSE, 25 .EQU USART5_CTLR_CTSE, 24 .EQU USART5_CTLR_TRGSEL1, 23 .EQU USART5_CTLR_TRGSEL0, 22 .EQU USART5_CTLR_DT9EN, 21 .EQU USART5_CTLR_PARM, 20 .EQU USART5_CTLR_TX9SEL, 19 .EQU USART5_CTLR_STPW, 18 .EQU USART5_CTLR_TIDLEEN, 17 .EQU USART5_CTLR_RXEN, 16 .EQU USART5_CTLR_TXEN, 15 .EQU USART5_CTLR_SYNC, 14 .EQU USART5_CTLR_SENDB, 13 .EQU USART5_CTLR_RIDLES, 12 .EQU USART5_CTLR_ABRDEN, 11 .EQU USART5_CTLR_ADREN, 9 .EQU USART5_CTLR_CSRS, 8 .EQU USART5_CTLR_WUEN, 7 .EQU USART5_CTLR_DINV, 6 .EQU USART5_CTLR_RCONV, 5 .EQU USART5_CTLR_TCONV, 4 .EQU USART5_CTLR_SCKPS, 3 .EQU USART5_CTLR_BRCKS1, 2 .EQU USART5_CTLR_BRCKS0, 1 .EQU USART5_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART5_BRGR, 0x40001E84 // 0x4000 1E84 USART5_BRGR Bits------------------------------------- .EQU USART5_BRGR_BRGF2_3, 23 .EQU USART5_BRGR_BRGF2_2, 22 .EQU USART5_BRGR_BRGF2_1, 21 .EQU USART5_BRGR_BRGF2_0, 20 .EQU USART5_BRGR_BRGF1_3, 19 .EQU USART5_BRGR_BRGF1_2, 18 .EQU USART5_BRGR_BRGF1_1, 17 .EQU USART5_BRGR_BRGF1_0, 16 .EQU USART5_BRGR_BRGM15, 15 .EQU USART5_BRGR_BRGM14, 14 .EQU USART5_BRGR_BRGM13, 13 .EQU USART5_BRGR_BRGM12, 12 .EQU USART5_BRGR_BRGM11, 11 .EQU USART5_BRGR_BRGM10, 10 .EQU USART5_BRGR_BRGM9, 9 .EQU USART5_BRGR_BRGM8, 8 .EQU USART5_BRGR_BRGM7, 7 .EQU USART5_BRGR_BRGM6, 6 .EQU USART5_BRGR_BRGM5, 5 .EQU USART5_BRGR_BRGM4, 4 .EQU USART5_BRGR_BRGM3, 3 .EQU USART5_BRGR_BRGM2, 2 .EQU USART5_BRGR_BRGM1, 1 .EQU USART5_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART5_STR, 0x40001E88 // 0x4000 1E88 USART5_STR Bits------------------------------------- .EQU USART5_STR_TX0SEL, 31 .EQU USART5_STR_TX1SEL, 30 .EQU USART5_STR_RXDSEL, 29 .EQU USART5_STR_CTSSEL, 28 .EQU USART5_STR_TXFIF, 27 .EQU USART5_STR_IDLEIC, 26 .EQU USART5_STR_UADMIC, 25 .EQU USART5_STR_CTSIC, 24 .EQU USART5_STR_REIC, 23 .EQU USART5_STR_TEIC, 22 .EQU USART5_STR_WUIC, 21 .EQU USART5_STR_ABTOIC, 20 .EQU USART5_STR_BRIC, 19 .EQU USART5_STR_FREIC, 18 .EQU USART5_STR_PAREIC, 17 .EQU USART5_STR_OVFEIC, 16 .EQU USART5_STR_IDLFIF, 15 .EQU USART5_STR_UADMIF, 14 .EQU USART5_STR_TXEIF, 13 .EQU USART5_STR_TFEIF, 12 .EQU USART5_STR_RDRIF, 11 .EQU USART5_STR_TXFR, 10 .EQU USART5_STR_RCFR, 9 .EQU USART5_STR_CTSIF, 8 .EQU USART5_STR_REIF, 7 .EQU USART5_STR_TEIF, 6 .EQU USART5_STR_WUIF, 5 .EQU USART5_STR_ABTOIF, 4 .EQU USART5_STR_BRIF, 3 .EQU USART5_STR_FREIF, 2 .EQU USART5_STR_PAREIF, 1 .EQU USART5_STR_OVFEIF, 0 // register------------------------------------- .EQU USART5_TBUFR, 0x40001E8C // 0x4000 1E8C USART5_TBUFR Bits------------------------------------- .EQU USART5_TBUFR_TBUF7, 7 .EQU USART5_TBUFR_TBUF6, 6 .EQU USART5_TBUFR_TBUF5, 5 .EQU USART5_TBUFR_TBUF4, 4 .EQU USART5_TBUFR_TBUF3, 3 .EQU USART5_TBUFR_TBUF2, 2 .EQU USART5_TBUFR_TBUF1, 1 .EQU USART5_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART5_RBUFR, 0x40001E8C // 0x4000 1E8C USART5_RBUFR Bits------------------------------------- .EQU USART5_RBUFR_RBUF8, 8 .EQU USART5_RBUFR_RBUF7, 7 .EQU USART5_RBUFR_RBUF6, 6 .EQU USART5_RBUFR_RBUF5, 5 .EQU USART5_RBUFR_RBUF4, 4 .EQU USART5_RBUFR_RBUF3, 3 .EQU USART5_RBUFR_RBUF2, 2 .EQU USART5_RBUFR_RBUF1, 1 .EQU USART5_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART5_U7816R, 0x40001E90 // 0x4000 1E90 USART5_U7816R Bits------------------------------------- .EQU USART5_U7816R_EGT7, 31 .EQU USART5_U7816R_EGT6, 30 .EQU USART5_U7816R_EGT5, 29 .EQU USART5_U7816R_EGT4, 28 .EQU USART5_U7816R_EGT3, 27 .EQU USART5_U7816R_EGT2, 26 .EQU USART5_U7816R_EGT1, 25 .EQU USART5_U7816R_EGT0, 24 .EQU USART5_U7816R_CLKDIV7, 22 .EQU USART5_U7816R_CLKDIV6, 21 .EQU USART5_U7816R_CLKDIV5, 20 .EQU USART5_U7816R_CLKDIV4, 19 .EQU USART5_U7816R_CLKDIV3, 18 .EQU USART5_U7816R_CLKDIV2, 17 .EQU USART5_U7816R_CLKDIV1, 16 .EQU USART5_U7816R_CLKDIV0, 15 .EQU USART5_U7816R_TREPMS, 14 .EQU USART5_U7816R_RXRE1, 13 .EQU USART5_U7816R_RXRE0, 12 .EQU USART5_U7816R_TXRE1, 11 .EQU USART5_U7816R_TXRE0, 10 .EQU USART5_U7816R_RREPEN, 9 .EQU USART5_U7816R_TREPEN, 8 .EQU USART5_U7816R_BGTEN, 5 .EQU USART5_U7816R_PSEL, 4 .EQU USART5_U7816R_ERSW1, 3 .EQU USART5_U7816R_ERSW0, 2 .EQU USART5_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART5_IER, 0x40001E94 // 0x4000 1E94 USART5_IER Bits------------------------------------- .EQU USART5_IER_UADMIE, 18 .EQU USART5_IER_UTXDE, 17 .EQU USART5_IER_URCDE, 16 .EQU USART5_IER_IDLEIE, 12 .EQU USART5_IER_TXEIE, 11 .EQU USART5_IER_TFEIE, 10 .EQU USART5_IER_RDRIE, 9 .EQU USART5_IER_CTSIE, 8 .EQU USART5_IER_REIE, 7 .EQU USART5_IER_TEIE, 6 .EQU USART5_IER_WUIE, 5 .EQU USART5_IER_ABTOIE, 4 .EQU USART5_IER_BRIE, 3 .EQU USART5_IER_FREIE, 2 .EQU USART5_IER_PAREIE, 1 .EQU USART5_IER_OVFEIE, 0 // register------------------------------------- .EQU USART5_ADM, 0x40001E98 // 0x4000 1E98 USART5_ADM Bits------------------------------------- .EQU USART5_ADM_ADM7, 7 .EQU USART5_ADM_ADM6, 6 .EQU USART5_ADM_ADM5, 5 .EQU USART5_ADM_ADM4, 4 .EQU USART5_ADM_ADM3, 3 .EQU USART5_ADM_ADM2, 2 .EQU USART5_ADM_ADM1, 1 .EQU USART5_ADM_ADM0, 0 // register------------------------------------- .EQU USART6_CTLR, 0x40001F00 // 0x4000 1F00 USART6_CTLR Bits------------------------------------- .EQU USART6_CTLR_SLMEN, 31 .EQU USART6_CTLR_RESHD, 30 .EQU USART6_CTLR_IRDAEN, 29 .EQU USART6_CTLR_BKPWS, 26 .EQU USART6_CTLR_RTSE, 25 .EQU USART6_CTLR_CTSE, 24 .EQU USART6_CTLR_TRGSEL1, 23 .EQU USART6_CTLR_TRGSEL0, 22 .EQU USART6_CTLR_DT9EN, 21 .EQU USART6_CTLR_PARM, 20 .EQU USART6_CTLR_TX9SEL, 19 .EQU USART6_CTLR_STPW, 18 .EQU USART6_CTLR_TIDLEEN, 17 .EQU USART6_CTLR_RXEN, 16 .EQU USART6_CTLR_TXEN, 15 .EQU USART6_CTLR_SYNC, 14 .EQU USART6_CTLR_SENDB, 13 .EQU USART6_CTLR_RIDLES, 12 .EQU USART6_CTLR_ABRDEN, 11 .EQU USART6_CTLR_ADREN, 9 .EQU USART6_CTLR_CSRS, 8 .EQU USART6_CTLR_WUEN, 7 .EQU USART6_CTLR_DINV, 6 .EQU USART6_CTLR_RCONV, 5 .EQU USART6_CTLR_TCONV, 4 .EQU USART6_CTLR_SCKPS, 3 .EQU USART6_CTLR_BRCKS1, 2 .EQU USART6_CTLR_BRCKS0, 1 .EQU USART6_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART6_BRGR, 0x40001F04 // 0x4000 1F04 USART6_BRGR Bits------------------------------------- .EQU USART6_BRGR_BRGF2_3, 23 .EQU USART6_BRGR_BRGF2_2, 22 .EQU USART6_BRGR_BRGF2_1, 21 .EQU USART6_BRGR_BRGF2_0, 20 .EQU USART6_BRGR_BRGF1_3, 19 .EQU USART6_BRGR_BRGF1_2, 18 .EQU USART6_BRGR_BRGF1_1, 17 .EQU USART6_BRGR_BRGF1_0, 16 .EQU USART6_BRGR_BRGM15, 15 .EQU USART6_BRGR_BRGM14, 14 .EQU USART6_BRGR_BRGM13, 13 .EQU USART6_BRGR_BRGM12, 12 .EQU USART6_BRGR_BRGM11, 11 .EQU USART6_BRGR_BRGM10, 10 .EQU USART6_BRGR_BRGM9, 9 .EQU USART6_BRGR_BRGM8, 8 .EQU USART6_BRGR_BRGM7, 7 .EQU USART6_BRGR_BRGM6, 6 .EQU USART6_BRGR_BRGM5, 5 .EQU USART6_BRGR_BRGM4, 4 .EQU USART6_BRGR_BRGM3, 3 .EQU USART6_BRGR_BRGM2, 2 .EQU USART6_BRGR_BRGM1, 1 .EQU USART6_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART6_STR, 0x40001F08 // 0x4000 1F08 USART6_STR Bits------------------------------------- .EQU USART6_STR_TX0SEL, 31 .EQU USART6_STR_TX1SEL, 30 .EQU USART6_STR_RXDSEL, 29 .EQU USART6_STR_CTSSEL, 28 .EQU USART6_STR_TXFIF, 27 .EQU USART6_STR_IDLEIC, 26 .EQU USART6_STR_UADMIC, 25 .EQU USART6_STR_CTSIC, 24 .EQU USART6_STR_REIC, 23 .EQU USART6_STR_TEIC, 22 .EQU USART6_STR_WUIC, 21 .EQU USART6_STR_ABTOIC, 20 .EQU USART6_STR_BRIC, 19 .EQU USART6_STR_FREIC, 18 .EQU USART6_STR_PAREIC, 17 .EQU USART6_STR_OVFEIC, 16 .EQU USART6_STR_IDLFIF, 15 .EQU USART6_STR_UADMIF, 14 .EQU USART6_STR_TXEIF, 13 .EQU USART6_STR_TFEIF, 12 .EQU USART6_STR_RDRIF, 11 .EQU USART6_STR_TXFR, 10 .EQU USART6_STR_RCFR, 9 .EQU USART6_STR_CTSIF, 8 .EQU USART6_STR_REIF, 7 .EQU USART6_STR_TEIF, 6 .EQU USART6_STR_WUIF, 5 .EQU USART6_STR_ABTOIF, 4 .EQU USART6_STR_BRIF, 3 .EQU USART6_STR_FREIF, 2 .EQU USART6_STR_PAREIF, 1 .EQU USART6_STR_OVFEIF, 0 // register------------------------------------- .EQU USART6_TBUFR, 0x40001F0C // 0x4000 1F0C USART6_TBUFR Bits------------------------------------- .EQU USART6_TBUFR_TBUF7, 7 .EQU USART6_TBUFR_TBUF6, 6 .EQU USART6_TBUFR_TBUF5, 5 .EQU USART6_TBUFR_TBUF4, 4 .EQU USART6_TBUFR_TBUF3, 3 .EQU USART6_TBUFR_TBUF2, 2 .EQU USART6_TBUFR_TBUF1, 1 .EQU USART6_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART6_RBUFR, 0x40001F0C // 0x4000 1F0C USART6_RBUFR Bits------------------------------------- .EQU USART6_RBUFR_RBUF8, 8 .EQU USART6_RBUFR_RBUF7, 7 .EQU USART6_RBUFR_RBUF6, 6 .EQU USART6_RBUFR_RBUF5, 5 .EQU USART6_RBUFR_RBUF4, 4 .EQU USART6_RBUFR_RBUF3, 3 .EQU USART6_RBUFR_RBUF2, 2 .EQU USART6_RBUFR_RBUF1, 1 .EQU USART6_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART6_U7816R, 0x40001F10 // 0x4000 1F10 USART6_U7816R Bits------------------------------------- .EQU USART6_U7816R_EGT7, 31 .EQU USART6_U7816R_EGT6, 30 .EQU USART6_U7816R_EGT5, 29 .EQU USART6_U7816R_EGT4, 28 .EQU USART6_U7816R_EGT3, 27 .EQU USART6_U7816R_EGT2, 26 .EQU USART6_U7816R_EGT1, 25 .EQU USART6_U7816R_EGT0, 24 .EQU USART6_U7816R_CLKDIV7, 22 .EQU USART6_U7816R_CLKDIV6, 21 .EQU USART6_U7816R_CLKDIV5, 20 .EQU USART6_U7816R_CLKDIV4, 19 .EQU USART6_U7816R_CLKDIV3, 18 .EQU USART6_U7816R_CLKDIV2, 17 .EQU USART6_U7816R_CLKDIV1, 16 .EQU USART6_U7816R_CLKDIV0, 15 .EQU USART6_U7816R_TREPMS, 14 .EQU USART6_U7816R_RXRE1, 13 .EQU USART6_U7816R_RXRE0, 12 .EQU USART6_U7816R_TXRE1, 11 .EQU USART6_U7816R_TXRE0, 10 .EQU USART6_U7816R_RREPEN, 9 .EQU USART6_U7816R_TREPEN, 8 .EQU USART6_U7816R_BGTEN, 5 .EQU USART6_U7816R_PSEL, 4 .EQU USART6_U7816R_ERSW1, 3 .EQU USART6_U7816R_ERSW0, 2 .EQU USART6_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART6_IER, 0x40001F14 // 0x4000 1F14 USART6_IER Bits------------------------------------- .EQU USART6_IER_UADMIE, 18 .EQU USART6_IER_UTXDE, 17 .EQU USART6_IER_URCDE, 16 .EQU USART6_IER_IDLEIE, 12 .EQU USART6_IER_TXEIE, 11 .EQU USART6_IER_TFEIE, 10 .EQU USART6_IER_RDRIE, 9 .EQU USART6_IER_CTSIE, 8 .EQU USART6_IER_REIE, 7 .EQU USART6_IER_TEIE, 6 .EQU USART6_IER_WUIE, 5 .EQU USART6_IER_ABTOIE, 4 .EQU USART6_IER_BRIE, 3 .EQU USART6_IER_FREIE, 2 .EQU USART6_IER_PAREIE, 1 .EQU USART6_IER_OVFEIE, 0 // register------------------------------------- .EQU USART6_ADM, 0x40001F18 // 0x4000 1F18 USART6_ADM Bits------------------------------------- .EQU USART6_ADM_ADM7, 7 .EQU USART6_ADM_ADM6, 6 .EQU USART6_ADM_ADM5, 5 .EQU USART6_ADM_ADM4, 4 .EQU USART6_ADM_ADM3, 3 .EQU USART6_ADM_ADM2, 2 .EQU USART6_ADM_ADM1, 1 .EQU USART6_ADM_ADM0, 0 // register------------------------------------- .EQU USART7_CTLR, 0x40001F80 // 0x4000 1F80 USART7_CTLR Bits------------------------------------- .EQU USART7_CTLR_SLMEN, 31 .EQU USART7_CTLR_RESHD, 30 .EQU USART7_CTLR_IRDAEN, 29 .EQU USART7_CTLR_BKPWS, 26 .EQU USART7_CTLR_RTSE, 25 .EQU USART7_CTLR_CTSE, 24 .EQU USART7_CTLR_TRGSEL1, 23 .EQU USART7_CTLR_TRGSEL0, 22 .EQU USART7_CTLR_DT9EN, 21 .EQU USART7_CTLR_PARM, 20 .EQU USART7_CTLR_TX9SEL, 19 .EQU USART7_CTLR_STPW, 18 .EQU USART7_CTLR_TIDLEEN, 17 .EQU USART7_CTLR_RXEN, 16 .EQU USART7_CTLR_TXEN, 15 .EQU USART7_CTLR_SYNC, 14 .EQU USART7_CTLR_SENDB, 13 .EQU USART7_CTLR_RIDLES, 12 .EQU USART7_CTLR_ABRDEN, 11 .EQU USART7_CTLR_ADREN, 9 .EQU USART7_CTLR_CSRS, 8 .EQU USART7_CTLR_WUEN, 7 .EQU USART7_CTLR_DINV, 6 .EQU USART7_CTLR_RCONV, 5 .EQU USART7_CTLR_TCONV, 4 .EQU USART7_CTLR_SCKPS, 3 .EQU USART7_CTLR_BRCKS1, 2 .EQU USART7_CTLR_BRCKS0, 1 .EQU USART7_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART7_BRGR, 0x40001F84 // 0x4000 1F84 USART7_BRGR Bits------------------------------------- .EQU USART7_BRGR_BRGF2_3, 23 .EQU USART7_BRGR_BRGF2_2, 22 .EQU USART7_BRGR_BRGF2_1, 21 .EQU USART7_BRGR_BRGF2_0, 20 .EQU USART7_BRGR_BRGF1_3, 19 .EQU USART7_BRGR_BRGF1_2, 18 .EQU USART7_BRGR_BRGF1_1, 17 .EQU USART7_BRGR_BRGF1_0, 16 .EQU USART7_BRGR_BRGM15, 15 .EQU USART7_BRGR_BRGM14, 14 .EQU USART7_BRGR_BRGM13, 13 .EQU USART7_BRGR_BRGM12, 12 .EQU USART7_BRGR_BRGM11, 11 .EQU USART7_BRGR_BRGM10, 10 .EQU USART7_BRGR_BRGM9, 9 .EQU USART7_BRGR_BRGM8, 8 .EQU USART7_BRGR_BRGM7, 7 .EQU USART7_BRGR_BRGM6, 6 .EQU USART7_BRGR_BRGM5, 5 .EQU USART7_BRGR_BRGM4, 4 .EQU USART7_BRGR_BRGM3, 3 .EQU USART7_BRGR_BRGM2, 2 .EQU USART7_BRGR_BRGM1, 1 .EQU USART7_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART7_STR, 0x40001F88 // 0x4000 1F88 USART7_STR Bits------------------------------------- .EQU USART7_STR_TX0SEL, 31 .EQU USART7_STR_TX1SEL, 30 .EQU USART7_STR_RXDSEL, 29 .EQU USART7_STR_CTSSEL, 28 .EQU USART7_STR_TXFIF, 27 .EQU USART7_STR_IDLEIC, 26 .EQU USART7_STR_UADMIC, 25 .EQU USART7_STR_CTSIC, 24 .EQU USART7_STR_REIC, 23 .EQU USART7_STR_TEIC, 22 .EQU USART7_STR_WUIC, 21 .EQU USART7_STR_ABTOIC, 20 .EQU USART7_STR_BRIC, 19 .EQU USART7_STR_FREIC, 18 .EQU USART7_STR_PAREIC, 17 .EQU USART7_STR_OVFEIC, 16 .EQU USART7_STR_IDLFIF, 15 .EQU USART7_STR_UADMIF, 14 .EQU USART7_STR_TXEIF, 13 .EQU USART7_STR_TFEIF, 12 .EQU USART7_STR_RDRIF, 11 .EQU USART7_STR_TXFR, 10 .EQU USART7_STR_RCFR, 9 .EQU USART7_STR_CTSIF, 8 .EQU USART7_STR_REIF, 7 .EQU USART7_STR_TEIF, 6 .EQU USART7_STR_WUIF, 5 .EQU USART7_STR_ABTOIF, 4 .EQU USART7_STR_BRIF, 3 .EQU USART7_STR_FREIF, 2 .EQU USART7_STR_PAREIF, 1 .EQU USART7_STR_OVFEIF, 0 // register------------------------------------- .EQU USART7_TBUFR, 0x40001F8C // 0x4000 1F8C USART7_TBUFR Bits------------------------------------- .EQU USART7_TBUFR_TBUF7, 7 .EQU USART7_TBUFR_TBUF6, 6 .EQU USART7_TBUFR_TBUF5, 5 .EQU USART7_TBUFR_TBUF4, 4 .EQU USART7_TBUFR_TBUF3, 3 .EQU USART7_TBUFR_TBUF2, 2 .EQU USART7_TBUFR_TBUF1, 1 .EQU USART7_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART7_RBUFR, 0x40001F8C // 0x4000 1F8C USART7_RBUFR Bits------------------------------------- .EQU USART7_RBUFR_RBUF8, 8 .EQU USART7_RBUFR_RBUF7, 7 .EQU USART7_RBUFR_RBUF6, 6 .EQU USART7_RBUFR_RBUF5, 5 .EQU USART7_RBUFR_RBUF4, 4 .EQU USART7_RBUFR_RBUF3, 3 .EQU USART7_RBUFR_RBUF2, 2 .EQU USART7_RBUFR_RBUF1, 1 .EQU USART7_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART7_U7816R, 0x40001F90 // 0x4000 1F90 USART7_U7816R Bits------------------------------------- .EQU USART7_U7816R_EGT7, 31 .EQU USART7_U7816R_EGT6, 30 .EQU USART7_U7816R_EGT5, 29 .EQU USART7_U7816R_EGT4, 28 .EQU USART7_U7816R_EGT3, 27 .EQU USART7_U7816R_EGT2, 26 .EQU USART7_U7816R_EGT1, 25 .EQU USART7_U7816R_EGT0, 24 .EQU USART7_U7816R_CLKDIV7, 22 .EQU USART7_U7816R_CLKDIV6, 21 .EQU USART7_U7816R_CLKDIV5, 20 .EQU USART7_U7816R_CLKDIV4, 19 .EQU USART7_U7816R_CLKDIV3, 18 .EQU USART7_U7816R_CLKDIV2, 17 .EQU USART7_U7816R_CLKDIV1, 16 .EQU USART7_U7816R_CLKDIV0, 15 .EQU USART7_U7816R_TREPMS, 14 .EQU USART7_U7816R_RXRE1, 13 .EQU USART7_U7816R_RXRE0, 12 .EQU USART7_U7816R_TXRE1, 11 .EQU USART7_U7816R_TXRE0, 10 .EQU USART7_U7816R_RREPEN, 9 .EQU USART7_U7816R_TREPEN, 8 .EQU USART7_U7816R_BGTEN, 5 .EQU USART7_U7816R_PSEL, 4 .EQU USART7_U7816R_ERSW1, 3 .EQU USART7_U7816R_ERSW0, 2 .EQU USART7_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART7_IER, 0x40001F94 // 0x4000 1F94 USART7_IER Bits------------------------------------- .EQU USART7_IER_UADMIE, 18 .EQU USART7_IER_UTXDE, 17 .EQU USART7_IER_URCDE, 16 .EQU USART7_IER_IDLEIE, 12 .EQU USART7_IER_TXEIE, 11 .EQU USART7_IER_TFEIE, 10 .EQU USART7_IER_RDRIE, 9 .EQU USART7_IER_CTSIE, 8 .EQU USART7_IER_REIE, 7 .EQU USART7_IER_TEIE, 6 .EQU USART7_IER_WUIE, 5 .EQU USART7_IER_ABTOIE, 4 .EQU USART7_IER_BRIE, 3 .EQU USART7_IER_FREIE, 2 .EQU USART7_IER_PAREIE, 1 .EQU USART7_IER_OVFEIE, 0 // register------------------------------------- .EQU USART7_ADM, 0x40001F98 // 0x4000 1F98 USART7_ADM Bits------------------------------------- .EQU USART7_ADM_ADM7, 7 .EQU USART7_ADM_ADM6, 6 .EQU USART7_ADM_ADM5, 5 .EQU USART7_ADM_ADM4, 4 .EQU USART7_ADM_ADM3, 3 .EQU USART7_ADM_ADM2, 2 .EQU USART7_ADM_ADM1, 1 .EQU USART7_ADM_ADM0, 0 // register------------------------------------- .EQU SPI2_BRGR, 0x40002080 // 0x4000 2080 SPI2_BRGR Bits------------------------------------- .EQU SPI2_BRGR_I2SODD, 25 .EQU SPI2_BRGR_MCKEN, 24 .EQU SPI2_BRGR_I2SIDV7, 23 .EQU SPI2_BRGR_I2SIDV6, 22 .EQU SPI2_BRGR_I2SIDV5, 21 .EQU SPI2_BRGR_I2SIDV4, 20 .EQU SPI2_BRGR_I2SIDV3, 19 .EQU SPI2_BRGR_I2SIDV2, 18 .EQU SPI2_BRGR_I2SIDV1, 17 .EQU SPI2_BRGR_I2SIDV0, 16 .EQU SPI2_BRGR_SPIBRG15, 15 .EQU SPI2_BRGR_SPIBRG14, 14 .EQU SPI2_BRGR_SPIBRG13, 13 .EQU SPI2_BRGR_SPIBRG12, 12 .EQU SPI2_BRGR_SPIBRG11, 11 .EQU SPI2_BRGR_SPIBRG10, 10 .EQU SPI2_BRGR_SPIBRG9, 9 .EQU SPI2_BRGR_SPIBRG8, 8 .EQU SPI2_BRGR_SPIBRG7, 7 .EQU SPI2_BRGR_SPIBRG6, 6 .EQU SPI2_BRGR_SPIBRG5, 5 .EQU SPI2_BRGR_SPIBRG4, 4 .EQU SPI2_BRGR_SPIBRG3, 3 .EQU SPI2_BRGR_SPIBRG2, 2 .EQU SPI2_BRGR_SPIBRG1, 1 .EQU SPI2_BRGR_SPIBRG0, 0 // register------------------------------------- .EQU SPI2_CTLR, 0x40002084 // 0x4000 2084 SPI2_CTLR Bits------------------------------------- .EQU SPI2_CTLR_I2SCKS1, 26 .EQU SPI2_CTLR_I2SCKS0, 25 .EQU SPI2_CTLR_PCMS, 24 .EQU SPI2_CTLR_I2SSS1, 23 .EQU SPI2_CTLR_I2SSS0, 22 .EQU SPI2_CTLR_I2SMC1, 21 .EQU SPI2_CTLR_I2SMC0, 20 .EQU SPI2_CTLR_MCKOS, 18 .EQU SPI2_CTLR_I2SMD, 16 .EQU SPI2_CTLR_SSEL1, 15 .EQU SPI2_CTLR_SSEL0, 14 .EQU SPI2_CTLR_SPIBS1, 13 .EQU SPI2_CTLR_SPIBS0, 12 .EQU SPI2_CTLR_SPICKE, 9 .EQU SPI2_CTLR_SPICKP, 8 .EQU SPI2_CTLR_SPIIOS, 7 .EQU SPI2_CTLR_SPIDS, 6 .EQU SPI2_CTLR_SPICKS1, 5 .EQU SPI2_CTLR_SPICKS0, 4 .EQU SPI2_CTLR_SPIMS2, 3 .EQU SPI2_CTLR_SPIMS1, 2 .EQU SPI2_CTLR_SPIMS0, 1 .EQU SPI2_CTLR_SPIEN, 0 // register------------------------------------- .EQU SPI2_BUFR, 0x40002088 // 0x4000 2088 SPI2_BUFR Bits------------------------------------- .EQU SPI2_BUFR_SPIBUF31, 31 .EQU SPI2_BUFR_SPIBUF30, 30 .EQU SPI2_BUFR_SPIBUF29, 29 .EQU SPI2_BUFR_SPIBUF28, 28 .EQU SPI2_BUFR_SPIBUF27, 27 .EQU SPI2_BUFR_SPIBUF26, 26 .EQU SPI2_BUFR_SPIBUF25, 25 .EQU SPI2_BUFR_SPIBUF24, 24 .EQU SPI2_BUFR_SPIBUF23, 23 .EQU SPI2_BUFR_SPIBUF22, 22 .EQU SPI2_BUFR_SPIBUF21, 21 .EQU SPI2_BUFR_SPIBUF20, 20 .EQU SPI2_BUFR_SPIBUF19, 19 .EQU SPI2_BUFR_SPIBUF18, 18 .EQU SPI2_BUFR_SPIBUF17, 17 .EQU SPI2_BUFR_SPIBUF16, 16 .EQU SPI2_BUFR_SPIBUF15, 15 .EQU SPI2_BUFR_SPIBUF14, 14 .EQU SPI2_BUFR_SPIBUF13, 13 .EQU SPI2_BUFR_SPIBUF12, 12 .EQU SPI2_BUFR_SPIBUF11, 11 .EQU SPI2_BUFR_SPIBUF10, 10 .EQU SPI2_BUFR_SPIBUF9, 9 .EQU SPI2_BUFR_SPIBUF8, 8 .EQU SPI2_BUFR_SPIBUF7, 7 .EQU SPI2_BUFR_SPIBUF6, 6 .EQU SPI2_BUFR_SPIBUF5, 5 .EQU SPI2_BUFR_SPIBUF4, 4 .EQU SPI2_BUFR_SPIBUF3, 3 .EQU SPI2_BUFR_SPIBUF2, 2 .EQU SPI2_BUFR_SPIBUF1, 1 .EQU SPI2_BUFR_SPIBUF0, 0 // register------------------------------------- .EQU SPI2_STR, 0x4000208C // 0x4000 208C SPI2_STR Bits------------------------------------- .EQU SPI2_STR_STXDE, 21 .EQU SPI2_STR_SRCDE, 20 .EQU SPI2_STR_UDRIC, 18 .EQU SPI2_STR_TOVFIC, 17 .EQU SPI2_STR_ROVFIC, 16 .EQU SPI2_STR_TNEIE, 15 .EQU SPI2_STR_RNEIE, 14 .EQU SPI2_STR_TOVFIE, 13 .EQU SPI2_STR_ROVFIE, 12 .EQU SPI2_STR_UDRIE, 11 .EQU SPI2_STR_UDRIF, 6 .EQU SPI2_STR_TOVFIF, 5 .EQU SPI2_STR_ROVFIF, 4 .EQU SPI2_STR_CHSIDE, 3 .EQU SPI2_STR_TNE, 2 .EQU SPI2_STR_RNE, 1 .EQU SPI2_STR_SPIBUSY, 0 // register------------------------------------- .EQU SPI3_BRGR, 0x40002100 // 0x4000 2100 SPI3_BRGR Bits------------------------------------- .EQU SPI3_BRGR_I2SODD, 25 .EQU SPI3_BRGR_MCKEN, 24 .EQU SPI3_BRGR_I2SIDV7, 23 .EQU SPI3_BRGR_I2SIDV6, 22 .EQU SPI3_BRGR_I2SIDV5, 21 .EQU SPI3_BRGR_I2SIDV4, 20 .EQU SPI3_BRGR_I2SIDV3, 19 .EQU SPI3_BRGR_I2SIDV2, 18 .EQU SPI3_BRGR_I2SIDV1, 17 .EQU SPI3_BRGR_I2SIDV0, 16 .EQU SPI3_BRGR_SPIBRG15, 15 .EQU SPI3_BRGR_SPIBRG14, 14 .EQU SPI3_BRGR_SPIBRG13, 13 .EQU SPI3_BRGR_SPIBRG12, 12 .EQU SPI3_BRGR_SPIBRG11, 11 .EQU SPI3_BRGR_SPIBRG10, 10 .EQU SPI3_BRGR_SPIBRG9, 9 .EQU SPI3_BRGR_SPIBRG8, 8 .EQU SPI3_BRGR_SPIBRG7, 7 .EQU SPI3_BRGR_SPIBRG6, 6 .EQU SPI3_BRGR_SPIBRG5, 5 .EQU SPI3_BRGR_SPIBRG4, 4 .EQU SPI3_BRGR_SPIBRG3, 3 .EQU SPI3_BRGR_SPIBRG2, 2 .EQU SPI3_BRGR_SPIBRG1, 1 .EQU SPI3_BRGR_SPIBRG0, 0 // register------------------------------------- .EQU SPI3_CTLR, 0x40002104 // 0x4000 2104 SPI3_CTLR Bits------------------------------------- .EQU SPI3_CTLR_I2SCKS1, 26 .EQU SPI3_CTLR_I2SCKS0, 25 .EQU SPI3_CTLR_PCMS, 24 .EQU SPI3_CTLR_I2SSS1, 23 .EQU SPI3_CTLR_I2SSS0, 22 .EQU SPI3_CTLR_I2SMC1, 21 .EQU SPI3_CTLR_I2SMC0, 20 .EQU SPI3_CTLR_MCKOS, 18 .EQU SPI3_CTLR_I2SMD, 16 .EQU SPI3_CTLR_SSEL1, 15 .EQU SPI3_CTLR_SSEL0, 14 .EQU SPI3_CTLR_SPIBS1, 13 .EQU SPI3_CTLR_SPIBS0, 12 .EQU SPI3_CTLR_SPICKE, 9 .EQU SPI3_CTLR_SPICKP, 8 .EQU SPI3_CTLR_SPIIOS, 7 .EQU SPI3_CTLR_SPIDS, 6 .EQU SPI3_CTLR_SPICKS1, 5 .EQU SPI3_CTLR_SPICKS0, 4 .EQU SPI3_CTLR_SPIMS2, 3 .EQU SPI3_CTLR_SPIMS1, 2 .EQU SPI3_CTLR_SPIMS0, 1 .EQU SPI3_CTLR_SPIEN, 0 // register------------------------------------- .EQU SPI3_BUFR, 0x40002108 // 0x4000 2108 SPI3_BUFR Bits------------------------------------- .EQU SPI3_BUFR_SPIBUF31, 31 .EQU SPI3_BUFR_SPIBUF30, 30 .EQU SPI3_BUFR_SPIBUF29, 29 .EQU SPI3_BUFR_SPIBUF28, 28 .EQU SPI3_BUFR_SPIBUF27, 27 .EQU SPI3_BUFR_SPIBUF26, 26 .EQU SPI3_BUFR_SPIBUF25, 25 .EQU SPI3_BUFR_SPIBUF24, 24 .EQU SPI3_BUFR_SPIBUF23, 23 .EQU SPI3_BUFR_SPIBUF22, 22 .EQU SPI3_BUFR_SPIBUF21, 21 .EQU SPI3_BUFR_SPIBUF20, 20 .EQU SPI3_BUFR_SPIBUF19, 19 .EQU SPI3_BUFR_SPIBUF18, 18 .EQU SPI3_BUFR_SPIBUF17, 17 .EQU SPI3_BUFR_SPIBUF16, 16 .EQU SPI3_BUFR_SPIBUF15, 15 .EQU SPI3_BUFR_SPIBUF14, 14 .EQU SPI3_BUFR_SPIBUF13, 13 .EQU SPI3_BUFR_SPIBUF12, 12 .EQU SPI3_BUFR_SPIBUF11, 11 .EQU SPI3_BUFR_SPIBUF10, 10 .EQU SPI3_BUFR_SPIBUF9, 9 .EQU SPI3_BUFR_SPIBUF8, 8 .EQU SPI3_BUFR_SPIBUF7, 7 .EQU SPI3_BUFR_SPIBUF6, 6 .EQU SPI3_BUFR_SPIBUF5, 5 .EQU SPI3_BUFR_SPIBUF4, 4 .EQU SPI3_BUFR_SPIBUF3, 3 .EQU SPI3_BUFR_SPIBUF2, 2 .EQU SPI3_BUFR_SPIBUF1, 1 .EQU SPI3_BUFR_SPIBUF0, 0 // register------------------------------------- .EQU SPI3_STR, 0x4000210C // 0x4000 210C SPI3_STR Bits------------------------------------- .EQU SPI3_STR_STXDE, 21 .EQU SPI3_STR_SRCDE, 20 .EQU SPI3_STR_UDRIC, 18 .EQU SPI3_STR_TOVFIC, 17 .EQU SPI3_STR_ROVFIC, 16 .EQU SPI3_STR_TNEIE, 15 .EQU SPI3_STR_RNEIE, 14 .EQU SPI3_STR_TOVFIE, 13 .EQU SPI3_STR_ROVFIE, 12 .EQU SPI3_STR_UDRIE, 11 .EQU SPI3_STR_UDRIF, 6 .EQU SPI3_STR_TOVFIF, 5 .EQU SPI3_STR_ROVFIF, 4 .EQU SPI3_STR_CHSIDE, 3 .EQU SPI3_STR_TNE, 2 .EQU SPI3_STR_RNE, 1 .EQU SPI3_STR_SPIBUSY, 0 // register------------------------------------- .EQU HC3_CTL, 0x40002180 // 0x4000 2180 HC3_CTL Bits------------------------------------- .EQU HC3_CTL_CLKSEL1, 6 .EQU HC3_CTL_CLKSEL0, 5 .EQU HC3_CTL_SOFTRESET, 4 .EQU HC3_CTL_OVERINTE, 3 .EQU HC3_CTL_FALLINTE, 2 .EQU HC3_CTL_RISEINTE, 1 .EQU HC3_CTL_HCINSEL, 0 // register------------------------------------- .EQU HC3_COUNTER, 0x40002184 // 0x4000 2184 HC3_COUNTER Bits------------------------------------- .EQU HC3_COUNTER_COUNTERSR15, 31 .EQU HC3_COUNTER_COUNTERSR14, 30 .EQU HC3_COUNTER_COUNTERSR13, 29 .EQU HC3_COUNTER_COUNTERSR12, 28 .EQU HC3_COUNTER_COUNTERSR11, 27 .EQU HC3_COUNTER_COUNTERSR10, 26 .EQU HC3_COUNTER_COUNTERSR9, 25 .EQU HC3_COUNTER_COUNTERSR8, 24 .EQU HC3_COUNTER_COUNTERSR7, 23 .EQU HC3_COUNTER_COUNTERSR6, 22 .EQU HC3_COUNTER_COUNTERSR5, 21 .EQU HC3_COUNTER_COUNTERSR4, 20 .EQU HC3_COUNTER_COUNTERSR3, 19 .EQU HC3_COUNTER_COUNTERSR2, 18 .EQU HC3_COUNTER_COUNTERSR1, 17 .EQU HC3_COUNTER_COUNTERSR0, 16 .EQU HC3_COUNTER_COUNTER15, 15 .EQU HC3_COUNTER_COUNTER14, 14 .EQU HC3_COUNTER_COUNTER13, 13 .EQU HC3_COUNTER_COUNTER12, 12 .EQU HC3_COUNTER_COUNTER11, 11 .EQU HC3_COUNTER_COUNTER10, 10 .EQU HC3_COUNTER_COUNTER9, 9 .EQU HC3_COUNTER_COUNTER8, 8 .EQU HC3_COUNTER_COUNTER7, 7 .EQU HC3_COUNTER_COUNTER6, 6 .EQU HC3_COUNTER_COUNTER5, 5 .EQU HC3_COUNTER_COUNTER4, 4 .EQU HC3_COUNTER_COUNTER3, 3 .EQU HC3_COUNTER_COUNTER2, 2 .EQU HC3_COUNTER_COUNTER1, 1 .EQU HC3_COUNTER_COUNTER0, 0 // register------------------------------------- .EQU HC3_RISE0, 0x40002188 // 0x4000 2188 HC3_RISE0 Bits------------------------------------- .EQU HC3_RISE0_RISE0_15, 15 .EQU HC3_RISE0_RISE0_14, 14 .EQU HC3_RISE0_RISE0_13, 13 .EQU HC3_RISE0_RISE0_12, 12 .EQU HC3_RISE0_RISE0_11, 11 .EQU HC3_RISE0_RISE0_10, 10 .EQU HC3_RISE0_RISE0_9, 9 .EQU HC3_RISE0_RISE0_8, 8 .EQU HC3_RISE0_RISE0_7, 7 .EQU HC3_RISE0_RISE0_6, 6 .EQU HC3_RISE0_RISE0_5, 5 .EQU HC3_RISE0_RISE0_4, 4 .EQU HC3_RISE0_RISE0_3, 3 .EQU HC3_RISE0_RISE0_2, 2 .EQU HC3_RISE0_RISE0_1, 1 .EQU HC3_RISE0_RISE0_0, 0 // register------------------------------------- .EQU HC3_RISE1, 0x4000218C // 0x4000 218C HC3_RISE1 Bits------------------------------------- .EQU HC3_RISE1_RISE1_15, 15 .EQU HC3_RISE1_RISE1_14, 14 .EQU HC3_RISE1_RISE1_13, 13 .EQU HC3_RISE1_RISE1_12, 12 .EQU HC3_RISE1_RISE1_11, 11 .EQU HC3_RISE1_RISE1_10, 10 .EQU HC3_RISE1_RISE1_9, 9 .EQU HC3_RISE1_RISE1_8, 8 .EQU HC3_RISE1_RISE1_7, 7 .EQU HC3_RISE1_RISE1_6, 6 .EQU HC3_RISE1_RISE1_5, 5 .EQU HC3_RISE1_RISE1_4, 4 .EQU HC3_RISE1_RISE1_3, 3 .EQU HC3_RISE1_RISE1_2, 2 .EQU HC3_RISE1_RISE1_1, 1 .EQU HC3_RISE1_RISE1_0, 0 // register------------------------------------- .EQU HC3_FALL0, 0x40002190 // 0x4000 2190 HC3_FALL0 Bits------------------------------------- .EQU HC3_FALL0_FALL0_15, 15 .EQU HC3_FALL0_FALL0_14, 14 .EQU HC3_FALL0_FALL0_13, 13 .EQU HC3_FALL0_FALL0_12, 12 .EQU HC3_FALL0_FALL0_11, 11 .EQU HC3_FALL0_FALL0_10, 10 .EQU HC3_FALL0_FALL0_9, 9 .EQU HC3_FALL0_FALL0_8, 8 .EQU HC3_FALL0_FALL0_7, 7 .EQU HC3_FALL0_FALL0_6, 6 .EQU HC3_FALL0_FALL0_5, 5 .EQU HC3_FALL0_FALL0_4, 4 .EQU HC3_FALL0_FALL0_3, 3 .EQU HC3_FALL0_FALL0_2, 2 .EQU HC3_FALL0_FALL0_1, 1 .EQU HC3_FALL0_FALL0_0, 0 // register------------------------------------- .EQU HC3_FALL1, 0x40002194 // 0x4000 2194 HC3_FALL1 Bits------------------------------------- .EQU HC3_FALL1_FALL1_15, 15 .EQU HC3_FALL1_FALL1_14, 14 .EQU HC3_FALL1_FALL1_13, 13 .EQU HC3_FALL1_FALL1_12, 12 .EQU HC3_FALL1_FALL1_11, 11 .EQU HC3_FALL1_FALL1_10, 10 .EQU HC3_FALL1_FALL1_9, 9 .EQU HC3_FALL1_FALL1_8, 8 .EQU HC3_FALL1_FALL1_7, 7 .EQU HC3_FALL1_FALL1_6, 6 .EQU HC3_FALL1_FALL1_5, 5 .EQU HC3_FALL1_FALL1_4, 4 .EQU HC3_FALL1_FALL1_3, 3 .EQU HC3_FALL1_FALL1_2, 2 .EQU HC3_FALL1_FALL1_1, 1 .EQU HC3_FALL1_FALL1_0, 0 // register------------------------------------- .EQU HC3_HRRISE0, 0x40002198 // 0x4000 2198 HC3_HRRISE0 Bits------------------------------------- .EQU HC3_HRRISE0_HRRISE0_15, 15 .EQU HC3_HRRISE0_HRRISE0_14, 14 .EQU HC3_HRRISE0_HRRISE0_13, 13 .EQU HC3_HRRISE0_HRRISE0_12, 12 .EQU HC3_HRRISE0_HRRISE0_11, 11 .EQU HC3_HRRISE0_HRRISE0_10, 10 .EQU HC3_HRRISE0_HRRISE0_9, 9 .EQU HC3_HRRISE0_HRRISE0_8, 8 .EQU HC3_HRRISE0_HRRISE0_7, 7 .EQU HC3_HRRISE0_HRRISE0_6, 6 .EQU HC3_HRRISE0_HRRISE0_5, 5 .EQU HC3_HRRISE0_HRRISE0_4, 4 .EQU HC3_HRRISE0_HRRISE0_3, 3 .EQU HC3_HRRISE0_HRRISE0_2, 2 .EQU HC3_HRRISE0_HRRISE0_1, 1 .EQU HC3_HRRISE0_HRRISE0_0, 0 // register------------------------------------- .EQU HC3_HRRISE1, 0x4000219C // 0x4000 219C HC3_HRRISE1 Bits------------------------------------- .EQU HC3_HRRISE1_HRRISE1_15, 15 .EQU HC3_HRRISE1_HRRISE1_14, 14 .EQU HC3_HRRISE1_HRRISE1_13, 13 .EQU HC3_HRRISE1_HRRISE1_12, 12 .EQU HC3_HRRISE1_HRRISE1_11, 11 .EQU HC3_HRRISE1_HRRISE1_10, 10 .EQU HC3_HRRISE1_HRRISE1_9, 9 .EQU HC3_HRRISE1_HRRISE1_8, 8 .EQU HC3_HRRISE1_HRRISE1_7, 7 .EQU HC3_HRRISE1_HRRISE1_6, 6 .EQU HC3_HRRISE1_HRRISE1_5, 5 .EQU HC3_HRRISE1_HRRISE1_4, 4 .EQU HC3_HRRISE1_HRRISE1_3, 3 .EQU HC3_HRRISE1_HRRISE1_2, 2 .EQU HC3_HRRISE1_HRRISE1_1, 1 .EQU HC3_HRRISE1_HRRISE1_0, 0 // register------------------------------------- .EQU HC3_HRFALL0, 0x400021A0 // 0x4000 21A0 HC3_HRFALL0 Bits------------------------------------- .EQU HC3_HRFALL0_HRFALL0_15, 15 .EQU HC3_HRFALL0_HRFALL0_14, 14 .EQU HC3_HRFALL0_HRFALL0_13, 13 .EQU HC3_HRFALL0_HRFALL0_12, 12 .EQU HC3_HRFALL0_HRFALL0_11, 11 .EQU HC3_HRFALL0_HRFALL0_10, 10 .EQU HC3_HRFALL0_HRFALL0_9, 9 .EQU HC3_HRFALL0_HRFALL0_8, 8 .EQU HC3_HRFALL0_HRFALL0_7, 7 .EQU HC3_HRFALL0_HRFALL0_6, 6 .EQU HC3_HRFALL0_HRFALL0_5, 5 .EQU HC3_HRFALL0_HRFALL0_4, 4 .EQU HC3_HRFALL0_HRFALL0_3, 3 .EQU HC3_HRFALL0_HRFALL0_2, 2 .EQU HC3_HRFALL0_HRFALL0_1, 1 .EQU HC3_HRFALL0_HRFALL0_0, 0 // register------------------------------------- .EQU HC3_HRFALL1, 0x400021A4 // 0x4000 21A4 HC3_HRFALL1 Bits------------------------------------- .EQU HC3_HRFALL1_HRFALL1_15, 15 .EQU HC3_HRFALL1_HRFALL1_14, 14 .EQU HC3_HRFALL1_HRFALL1_13, 13 .EQU HC3_HRFALL1_HRFALL1_12, 12 .EQU HC3_HRFALL1_HRFALL1_11, 11 .EQU HC3_HRFALL1_HRFALL1_10, 10 .EQU HC3_HRFALL1_HRFALL1_9, 9 .EQU HC3_HRFALL1_HRFALL1_8, 8 .EQU HC3_HRFALL1_HRFALL1_7, 7 .EQU HC3_HRFALL1_HRFALL1_6, 6 .EQU HC3_HRFALL1_HRFALL1_5, 5 .EQU HC3_HRFALL1_HRFALL1_4, 4 .EQU HC3_HRFALL1_HRFALL1_3, 3 .EQU HC3_HRFALL1_HRFALL1_2, 2 .EQU HC3_HRFALL1_HRFALL1_1, 1 .EQU HC3_HRFALL1_HRFALL1_0, 0 // register------------------------------------- .EQU HC3_SR, 0x400021A8 // 0x4000 21A8 HC3_SR Bits------------------------------------- .EQU HC3_SR_RISEOVF, 4 .EQU HC3_SR_COUNTEROVF, 3 .EQU HC3_SR_FALLIF, 2 .EQU HC3_SR_RISEIF, 1 // register------------------------------------- .EQU HC3_SRIC, 0x400021AC // 0x4000 21AC HC3_SRIC Bits------------------------------------- .EQU HC3_SRIC_RISEOVC, 4 .EQU HC3_SRIC_COUNTEROVC, 3 .EQU HC3_SRIC_FALLIC, 2 .EQU HC3_SRIC_RISEIC, 1 // register------------------------------------- .EQU HC3_IFRC, 0x400021B0 // 0x4000 21B0 HC3_IFRC Bits------------------------------------- .EQU HC3_IFRC_COUNTEROVFRC, 3 .EQU HC3_IFRC_FALLIFRC, 2 .EQU HC3_IFRC_RISEIFRC, 1 // register------------------------------------- .EQU HC4_CTL, 0x40002200 // 0x4000 2200 HC4_CTL Bits------------------------------------- .EQU HC4_CTL_CLKSEL1, 6 .EQU HC4_CTL_CLKSEL0, 5 .EQU HC4_CTL_SOFTRESET, 4 .EQU HC4_CTL_OVERINTE, 3 .EQU HC4_CTL_FALLINTE, 2 .EQU HC4_CTL_RISEINTE, 1 .EQU HC4_CTL_HCINSEL, 0 // register------------------------------------- .EQU HC4_COUNTER, 0x40002204 // 0x4000 2204 HC4_COUNTER Bits------------------------------------- .EQU HC4_COUNTER_COUNTERSR15, 31 .EQU HC4_COUNTER_COUNTERSR14, 30 .EQU HC4_COUNTER_COUNTERSR13, 29 .EQU HC4_COUNTER_COUNTERSR12, 28 .EQU HC4_COUNTER_COUNTERSR11, 27 .EQU HC4_COUNTER_COUNTERSR10, 26 .EQU HC4_COUNTER_COUNTERSR9, 25 .EQU HC4_COUNTER_COUNTERSR8, 24 .EQU HC4_COUNTER_COUNTERSR7, 23 .EQU HC4_COUNTER_COUNTERSR6, 22 .EQU HC4_COUNTER_COUNTERSR5, 21 .EQU HC4_COUNTER_COUNTERSR4, 20 .EQU HC4_COUNTER_COUNTERSR3, 19 .EQU HC4_COUNTER_COUNTERSR2, 18 .EQU HC4_COUNTER_COUNTERSR1, 17 .EQU HC4_COUNTER_COUNTERSR0, 16 .EQU HC4_COUNTER_COUNTER15, 15 .EQU HC4_COUNTER_COUNTER14, 14 .EQU HC4_COUNTER_COUNTER13, 13 .EQU HC4_COUNTER_COUNTER12, 12 .EQU HC4_COUNTER_COUNTER11, 11 .EQU HC4_COUNTER_COUNTER10, 10 .EQU HC4_COUNTER_COUNTER9, 9 .EQU HC4_COUNTER_COUNTER8, 8 .EQU HC4_COUNTER_COUNTER7, 7 .EQU HC4_COUNTER_COUNTER6, 6 .EQU HC4_COUNTER_COUNTER5, 5 .EQU HC4_COUNTER_COUNTER4, 4 .EQU HC4_COUNTER_COUNTER3, 3 .EQU HC4_COUNTER_COUNTER2, 2 .EQU HC4_COUNTER_COUNTER1, 1 .EQU HC4_COUNTER_COUNTER0, 0 // register------------------------------------- .EQU HC4_RISE0, 0x40002208 // 0x4000 2208 HC4_RISE0 Bits------------------------------------- .EQU HC4_RISE0_RISE0_15, 15 .EQU HC4_RISE0_RISE0_14, 14 .EQU HC4_RISE0_RISE0_13, 13 .EQU HC4_RISE0_RISE0_12, 12 .EQU HC4_RISE0_RISE0_11, 11 .EQU HC4_RISE0_RISE0_10, 10 .EQU HC4_RISE0_RISE0_9, 9 .EQU HC4_RISE0_RISE0_8, 8 .EQU HC4_RISE0_RISE0_7, 7 .EQU HC4_RISE0_RISE0_6, 6 .EQU HC4_RISE0_RISE0_5, 5 .EQU HC4_RISE0_RISE0_4, 4 .EQU HC4_RISE0_RISE0_3, 3 .EQU HC4_RISE0_RISE0_2, 2 .EQU HC4_RISE0_RISE0_1, 1 .EQU HC4_RISE0_RISE0_0, 0 // register------------------------------------- .EQU HC4_RISE1, 0x4000220C // 0x4000 220C HC4_RISE1 Bits------------------------------------- .EQU HC4_RISE1_RISE1_15, 15 .EQU HC4_RISE1_RISE1_14, 14 .EQU HC4_RISE1_RISE1_13, 13 .EQU HC4_RISE1_RISE1_12, 12 .EQU HC4_RISE1_RISE1_11, 11 .EQU HC4_RISE1_RISE1_10, 10 .EQU HC4_RISE1_RISE1_9, 9 .EQU HC4_RISE1_RISE1_8, 8 .EQU HC4_RISE1_RISE1_7, 7 .EQU HC4_RISE1_RISE1_6, 6 .EQU HC4_RISE1_RISE1_5, 5 .EQU HC4_RISE1_RISE1_4, 4 .EQU HC4_RISE1_RISE1_3, 3 .EQU HC4_RISE1_RISE1_2, 2 .EQU HC4_RISE1_RISE1_1, 1 .EQU HC4_RISE1_RISE1_0, 0 // register------------------------------------- .EQU HC4_FALL0, 0x40002210 // 0x4000 2210 HC4_FALL0 Bits------------------------------------- .EQU HC4_FALL0_FALL0_15, 15 .EQU HC4_FALL0_FALL0_14, 14 .EQU HC4_FALL0_FALL0_13, 13 .EQU HC4_FALL0_FALL0_12, 12 .EQU HC4_FALL0_FALL0_11, 11 .EQU HC4_FALL0_FALL0_10, 10 .EQU HC4_FALL0_FALL0_9, 9 .EQU HC4_FALL0_FALL0_8, 8 .EQU HC4_FALL0_FALL0_7, 7 .EQU HC4_FALL0_FALL0_6, 6 .EQU HC4_FALL0_FALL0_5, 5 .EQU HC4_FALL0_FALL0_4, 4 .EQU HC4_FALL0_FALL0_3, 3 .EQU HC4_FALL0_FALL0_2, 2 .EQU HC4_FALL0_FALL0_1, 1 .EQU HC4_FALL0_FALL0_0, 0 // register------------------------------------- .EQU HC4_FALL1, 0x40002214 // 0x4000 2214 HC4_FALL1 Bits------------------------------------- .EQU HC4_FALL1_FALL1_15, 15 .EQU HC4_FALL1_FALL1_14, 14 .EQU HC4_FALL1_FALL1_13, 13 .EQU HC4_FALL1_FALL1_12, 12 .EQU HC4_FALL1_FALL1_11, 11 .EQU HC4_FALL1_FALL1_10, 10 .EQU HC4_FALL1_FALL1_9, 9 .EQU HC4_FALL1_FALL1_8, 8 .EQU HC4_FALL1_FALL1_7, 7 .EQU HC4_FALL1_FALL1_6, 6 .EQU HC4_FALL1_FALL1_5, 5 .EQU HC4_FALL1_FALL1_4, 4 .EQU HC4_FALL1_FALL1_3, 3 .EQU HC4_FALL1_FALL1_2, 2 .EQU HC4_FALL1_FALL1_1, 1 .EQU HC4_FALL1_FALL1_0, 0 // register------------------------------------- .EQU HC4_HRRISE0, 0x40002218 // 0x4000 2218 HC4_HRRISE0 Bits------------------------------------- .EQU HC4_HRRISE0_HRRISE0_15, 15 .EQU HC4_HRRISE0_HRRISE0_14, 14 .EQU HC4_HRRISE0_HRRISE0_13, 13 .EQU HC4_HRRISE0_HRRISE0_12, 12 .EQU HC4_HRRISE0_HRRISE0_11, 11 .EQU HC4_HRRISE0_HRRISE0_10, 10 .EQU HC4_HRRISE0_HRRISE0_9, 9 .EQU HC4_HRRISE0_HRRISE0_8, 8 .EQU HC4_HRRISE0_HRRISE0_7, 7 .EQU HC4_HRRISE0_HRRISE0_6, 6 .EQU HC4_HRRISE0_HRRISE0_5, 5 .EQU HC4_HRRISE0_HRRISE0_4, 4 .EQU HC4_HRRISE0_HRRISE0_3, 3 .EQU HC4_HRRISE0_HRRISE0_2, 2 .EQU HC4_HRRISE0_HRRISE0_1, 1 .EQU HC4_HRRISE0_HRRISE0_0, 0 // register------------------------------------- .EQU HC4_HRRISE1, 0x4000221C // 0x4000 221C HC4_HRRISE1 Bits------------------------------------- .EQU HC4_HRRISE1_HRRISE1_15, 15 .EQU HC4_HRRISE1_HRRISE1_14, 14 .EQU HC4_HRRISE1_HRRISE1_13, 13 .EQU HC4_HRRISE1_HRRISE1_12, 12 .EQU HC4_HRRISE1_HRRISE1_11, 11 .EQU HC4_HRRISE1_HRRISE1_10, 10 .EQU HC4_HRRISE1_HRRISE1_9, 9 .EQU HC4_HRRISE1_HRRISE1_8, 8 .EQU HC4_HRRISE1_HRRISE1_7, 7 .EQU HC4_HRRISE1_HRRISE1_6, 6 .EQU HC4_HRRISE1_HRRISE1_5, 5 .EQU HC4_HRRISE1_HRRISE1_4, 4 .EQU HC4_HRRISE1_HRRISE1_3, 3 .EQU HC4_HRRISE1_HRRISE1_2, 2 .EQU HC4_HRRISE1_HRRISE1_1, 1 .EQU HC4_HRRISE1_HRRISE1_0, 0 // register------------------------------------- .EQU HC4_HRFALL0, 0x40002220 // 0x4000 2220 HC4_HRFALL0 Bits------------------------------------- .EQU HC4_HRFALL0_HRFALL0_15, 15 .EQU HC4_HRFALL0_HRFALL0_14, 14 .EQU HC4_HRFALL0_HRFALL0_13, 13 .EQU HC4_HRFALL0_HRFALL0_12, 12 .EQU HC4_HRFALL0_HRFALL0_11, 11 .EQU HC4_HRFALL0_HRFALL0_10, 10 .EQU HC4_HRFALL0_HRFALL0_9, 9 .EQU HC4_HRFALL0_HRFALL0_8, 8 .EQU HC4_HRFALL0_HRFALL0_7, 7 .EQU HC4_HRFALL0_HRFALL0_6, 6 .EQU HC4_HRFALL0_HRFALL0_5, 5 .EQU HC4_HRFALL0_HRFALL0_4, 4 .EQU HC4_HRFALL0_HRFALL0_3, 3 .EQU HC4_HRFALL0_HRFALL0_2, 2 .EQU HC4_HRFALL0_HRFALL0_1, 1 .EQU HC4_HRFALL0_HRFALL0_0, 0 // register------------------------------------- .EQU HC4_HRFALL1, 0x40002224 // 0x4000 2224 HC4_HRFALL1 Bits------------------------------------- .EQU HC4_HRFALL1_HRFALL1_15, 15 .EQU HC4_HRFALL1_HRFALL1_14, 14 .EQU HC4_HRFALL1_HRFALL1_13, 13 .EQU HC4_HRFALL1_HRFALL1_12, 12 .EQU HC4_HRFALL1_HRFALL1_11, 11 .EQU HC4_HRFALL1_HRFALL1_10, 10 .EQU HC4_HRFALL1_HRFALL1_9, 9 .EQU HC4_HRFALL1_HRFALL1_8, 8 .EQU HC4_HRFALL1_HRFALL1_7, 7 .EQU HC4_HRFALL1_HRFALL1_6, 6 .EQU HC4_HRFALL1_HRFALL1_5, 5 .EQU HC4_HRFALL1_HRFALL1_4, 4 .EQU HC4_HRFALL1_HRFALL1_3, 3 .EQU HC4_HRFALL1_HRFALL1_2, 2 .EQU HC4_HRFALL1_HRFALL1_1, 1 .EQU HC4_HRFALL1_HRFALL1_0, 0 // register------------------------------------- .EQU HC4_SR, 0x40002228 // 0x4000 2228 HC4_SR Bits------------------------------------- .EQU HC4_SR_RISEOVF, 4 .EQU HC4_SR_COUNTEROVF, 3 .EQU HC4_SR_FALLIF, 2 .EQU HC4_SR_RISEIF, 1 // register------------------------------------- .EQU HC4_SRIC, 0x4000222C // 0x4000 222C HC4_SRIC Bits------------------------------------- .EQU HC4_SRIC_RISEOVC, 4 .EQU HC4_SRIC_COUNTEROVC, 3 .EQU HC4_SRIC_FALLIC, 2 .EQU HC4_SRIC_RISEIC, 1 // register------------------------------------- .EQU HC4_IFRC, 0x40002230 // 0x4000 2230 HC4_IFRC Bits------------------------------------- .EQU HC4_IFRC_COUNTEROVFRC, 3 .EQU HC4_IFRC_FALLIFRC, 2 .EQU HC4_IFRC_RISEIFRC, 1 // register------------------------------------- .EQU HC5_CTL, 0x40002280 // 0x4000 2280 HC5_CTL Bits------------------------------------- .EQU HC5_CTL_CLKSEL1, 6 .EQU HC5_CTL_CLKSEL0, 5 .EQU HC5_CTL_SOFTRESET, 4 .EQU HC5_CTL_OVERINTE, 3 .EQU HC5_CTL_FALLINTE, 2 .EQU HC5_CTL_RISEINTE, 1 .EQU HC5_CTL_HCINSEL, 0 // register------------------------------------- .EQU HC5_COUNTER, 0x40002284 // 0x4000 2284 HC5_COUNTER Bits------------------------------------- .EQU HC5_COUNTER_COUNTERSR15, 31 .EQU HC5_COUNTER_COUNTERSR14, 30 .EQU HC5_COUNTER_COUNTERSR13, 29 .EQU HC5_COUNTER_COUNTERSR12, 28 .EQU HC5_COUNTER_COUNTERSR11, 27 .EQU HC5_COUNTER_COUNTERSR10, 26 .EQU HC5_COUNTER_COUNTERSR9, 25 .EQU HC5_COUNTER_COUNTERSR8, 24 .EQU HC5_COUNTER_COUNTERSR7, 23 .EQU HC5_COUNTER_COUNTERSR6, 22 .EQU HC5_COUNTER_COUNTERSR5, 21 .EQU HC5_COUNTER_COUNTERSR4, 20 .EQU HC5_COUNTER_COUNTERSR3, 19 .EQU HC5_COUNTER_COUNTERSR2, 18 .EQU HC5_COUNTER_COUNTERSR1, 17 .EQU HC5_COUNTER_COUNTERSR0, 16 .EQU HC5_COUNTER_COUNTER15, 15 .EQU HC5_COUNTER_COUNTER14, 14 .EQU HC5_COUNTER_COUNTER13, 13 .EQU HC5_COUNTER_COUNTER12, 12 .EQU HC5_COUNTER_COUNTER11, 11 .EQU HC5_COUNTER_COUNTER10, 10 .EQU HC5_COUNTER_COUNTER9, 9 .EQU HC5_COUNTER_COUNTER8, 8 .EQU HC5_COUNTER_COUNTER7, 7 .EQU HC5_COUNTER_COUNTER6, 6 .EQU HC5_COUNTER_COUNTER5, 5 .EQU HC5_COUNTER_COUNTER4, 4 .EQU HC5_COUNTER_COUNTER3, 3 .EQU HC5_COUNTER_COUNTER2, 2 .EQU HC5_COUNTER_COUNTER1, 1 .EQU HC5_COUNTER_COUNTER0, 0 // register------------------------------------- .EQU HC5_RISE0, 0x40002288 // 0x4000 2288 HC5_RISE0 Bits------------------------------------- .EQU HC5_RISE0_RISE0_15, 15 .EQU HC5_RISE0_RISE0_14, 14 .EQU HC5_RISE0_RISE0_13, 13 .EQU HC5_RISE0_RISE0_12, 12 .EQU HC5_RISE0_RISE0_11, 11 .EQU HC5_RISE0_RISE0_10, 10 .EQU HC5_RISE0_RISE0_9, 9 .EQU HC5_RISE0_RISE0_8, 8 .EQU HC5_RISE0_RISE0_7, 7 .EQU HC5_RISE0_RISE0_6, 6 .EQU HC5_RISE0_RISE0_5, 5 .EQU HC5_RISE0_RISE0_4, 4 .EQU HC5_RISE0_RISE0_3, 3 .EQU HC5_RISE0_RISE0_2, 2 .EQU HC5_RISE0_RISE0_1, 1 .EQU HC5_RISE0_RISE0_0, 0 // register------------------------------------- .EQU HC5_RISE1, 0x4000228C // 0x4000 228C HC5_RISE1 Bits------------------------------------- .EQU HC5_RISE1_RISE1_15, 15 .EQU HC5_RISE1_RISE1_14, 14 .EQU HC5_RISE1_RISE1_13, 13 .EQU HC5_RISE1_RISE1_12, 12 .EQU HC5_RISE1_RISE1_11, 11 .EQU HC5_RISE1_RISE1_10, 10 .EQU HC5_RISE1_RISE1_9, 9 .EQU HC5_RISE1_RISE1_8, 8 .EQU HC5_RISE1_RISE1_7, 7 .EQU HC5_RISE1_RISE1_6, 6 .EQU HC5_RISE1_RISE1_5, 5 .EQU HC5_RISE1_RISE1_4, 4 .EQU HC5_RISE1_RISE1_3, 3 .EQU HC5_RISE1_RISE1_2, 2 .EQU HC5_RISE1_RISE1_1, 1 .EQU HC5_RISE1_RISE1_0, 0 // register------------------------------------- .EQU HC5_FALL0, 0x40002290 // 0x4000 2290 HC5_FALL0 Bits------------------------------------- .EQU HC5_FALL0_FALL0_15, 15 .EQU HC5_FALL0_FALL0_14, 14 .EQU HC5_FALL0_FALL0_13, 13 .EQU HC5_FALL0_FALL0_12, 12 .EQU HC5_FALL0_FALL0_11, 11 .EQU HC5_FALL0_FALL0_10, 10 .EQU HC5_FALL0_FALL0_9, 9 .EQU HC5_FALL0_FALL0_8, 8 .EQU HC5_FALL0_FALL0_7, 7 .EQU HC5_FALL0_FALL0_6, 6 .EQU HC5_FALL0_FALL0_5, 5 .EQU HC5_FALL0_FALL0_4, 4 .EQU HC5_FALL0_FALL0_3, 3 .EQU HC5_FALL0_FALL0_2, 2 .EQU HC5_FALL0_FALL0_1, 1 .EQU HC5_FALL0_FALL0_0, 0 // register------------------------------------- .EQU HC5_FALL1, 0x40002294 // 0x4000 2294 HC5_FALL1 Bits------------------------------------- .EQU HC5_FALL1_FALL1_15, 15 .EQU HC5_FALL1_FALL1_14, 14 .EQU HC5_FALL1_FALL1_13, 13 .EQU HC5_FALL1_FALL1_12, 12 .EQU HC5_FALL1_FALL1_11, 11 .EQU HC5_FALL1_FALL1_10, 10 .EQU HC5_FALL1_FALL1_9, 9 .EQU HC5_FALL1_FALL1_8, 8 .EQU HC5_FALL1_FALL1_7, 7 .EQU HC5_FALL1_FALL1_6, 6 .EQU HC5_FALL1_FALL1_5, 5 .EQU HC5_FALL1_FALL1_4, 4 .EQU HC5_FALL1_FALL1_3, 3 .EQU HC5_FALL1_FALL1_2, 2 .EQU HC5_FALL1_FALL1_1, 1 .EQU HC5_FALL1_FALL1_0, 0 // register------------------------------------- .EQU HC5_HRRISE0, 0x40002298 // 0x4000 2298 HC5_HRRISE0 Bits------------------------------------- .EQU HC5_HRRISE0_HRRISE0_15, 15 .EQU HC5_HRRISE0_HRRISE0_14, 14 .EQU HC5_HRRISE0_HRRISE0_13, 13 .EQU HC5_HRRISE0_HRRISE0_12, 12 .EQU HC5_HRRISE0_HRRISE0_11, 11 .EQU HC5_HRRISE0_HRRISE0_10, 10 .EQU HC5_HRRISE0_HRRISE0_9, 9 .EQU HC5_HRRISE0_HRRISE0_8, 8 .EQU HC5_HRRISE0_HRRISE0_7, 7 .EQU HC5_HRRISE0_HRRISE0_6, 6 .EQU HC5_HRRISE0_HRRISE0_5, 5 .EQU HC5_HRRISE0_HRRISE0_4, 4 .EQU HC5_HRRISE0_HRRISE0_3, 3 .EQU HC5_HRRISE0_HRRISE0_2, 2 .EQU HC5_HRRISE0_HRRISE0_1, 1 .EQU HC5_HRRISE0_HRRISE0_0, 0 // register------------------------------------- .EQU HC5_HRRISE1, 0x4000229C // 0x4000 229C HC5_HRRISE1 Bits------------------------------------- .EQU HC5_HRRISE1_HRRISE1_15, 15 .EQU HC5_HRRISE1_HRRISE1_14, 14 .EQU HC5_HRRISE1_HRRISE1_13, 13 .EQU HC5_HRRISE1_HRRISE1_12, 12 .EQU HC5_HRRISE1_HRRISE1_11, 11 .EQU HC5_HRRISE1_HRRISE1_10, 10 .EQU HC5_HRRISE1_HRRISE1_9, 9 .EQU HC5_HRRISE1_HRRISE1_8, 8 .EQU HC5_HRRISE1_HRRISE1_7, 7 .EQU HC5_HRRISE1_HRRISE1_6, 6 .EQU HC5_HRRISE1_HRRISE1_5, 5 .EQU HC5_HRRISE1_HRRISE1_4, 4 .EQU HC5_HRRISE1_HRRISE1_3, 3 .EQU HC5_HRRISE1_HRRISE1_2, 2 .EQU HC5_HRRISE1_HRRISE1_1, 1 .EQU HC5_HRRISE1_HRRISE1_0, 0 // register------------------------------------- .EQU HC5_HRFALL0, 0x400022A0 // 0x4000 22A0 HC5_HRFALL0 Bits------------------------------------- .EQU HC5_HRFALL0_HRFALL0_15, 15 .EQU HC5_HRFALL0_HRFALL0_14, 14 .EQU HC5_HRFALL0_HRFALL0_13, 13 .EQU HC5_HRFALL0_HRFALL0_12, 12 .EQU HC5_HRFALL0_HRFALL0_11, 11 .EQU HC5_HRFALL0_HRFALL0_10, 10 .EQU HC5_HRFALL0_HRFALL0_9, 9 .EQU HC5_HRFALL0_HRFALL0_8, 8 .EQU HC5_HRFALL0_HRFALL0_7, 7 .EQU HC5_HRFALL0_HRFALL0_6, 6 .EQU HC5_HRFALL0_HRFALL0_5, 5 .EQU HC5_HRFALL0_HRFALL0_4, 4 .EQU HC5_HRFALL0_HRFALL0_3, 3 .EQU HC5_HRFALL0_HRFALL0_2, 2 .EQU HC5_HRFALL0_HRFALL0_1, 1 .EQU HC5_HRFALL0_HRFALL0_0, 0 // register------------------------------------- .EQU HC5_HRFALL1, 0x400022A4 // 0x4000 22A4 HC5_HRFALL1 Bits------------------------------------- .EQU HC5_HRFALL1_HRFALL1_15, 15 .EQU HC5_HRFALL1_HRFALL1_14, 14 .EQU HC5_HRFALL1_HRFALL1_13, 13 .EQU HC5_HRFALL1_HRFALL1_12, 12 .EQU HC5_HRFALL1_HRFALL1_11, 11 .EQU HC5_HRFALL1_HRFALL1_10, 10 .EQU HC5_HRFALL1_HRFALL1_9, 9 .EQU HC5_HRFALL1_HRFALL1_8, 8 .EQU HC5_HRFALL1_HRFALL1_7, 7 .EQU HC5_HRFALL1_HRFALL1_6, 6 .EQU HC5_HRFALL1_HRFALL1_5, 5 .EQU HC5_HRFALL1_HRFALL1_4, 4 .EQU HC5_HRFALL1_HRFALL1_3, 3 .EQU HC5_HRFALL1_HRFALL1_2, 2 .EQU HC5_HRFALL1_HRFALL1_1, 1 .EQU HC5_HRFALL1_HRFALL1_0, 0 // register------------------------------------- .EQU HC5_SR, 0x400022A8 // 0x4000 22A8 HC5_SR Bits------------------------------------- .EQU HC5_SR_RISEOVF, 4 .EQU HC5_SR_COUNTEROVF, 3 .EQU HC5_SR_FALLIF, 2 .EQU HC5_SR_RISEIF, 1 // register------------------------------------- .EQU HC5_SRIC, 0x400022AC // 0x4000 22AC HC5_SRIC Bits------------------------------------- .EQU HC5_SRIC_RISEOVC, 4 .EQU HC5_SRIC_COUNTEROVC, 3 .EQU HC5_SRIC_FALLIC, 2 .EQU HC5_SRIC_RISEIC, 1 // register------------------------------------- .EQU HC5_IFRC, 0x400022B0 // 0x4000 22B0 HC5_IFRC Bits------------------------------------- .EQU HC5_IFRC_COUNTEROVFRC, 3 .EQU HC5_IFRC_FALLIFRC, 2 .EQU HC5_IFRC_RISEIFRC, 1 // register------------------------------------- .EQU I2C3_CTLR, 0x40002380 // 0x4000 2380 I2C3_CTLR Bits------------------------------------- .EQU I2C3_CTLR_ADRL, 31 .EQU I2C3_CTLR_ALERT, 27 .EQU I2C3_CTLR_ARPEN, 26 .EQU I2C3_CTLR_SMBT, 25 .EQU I2C3_CTLR_SMBUS, 24 .EQU I2C3_CTLR_NMENA, 22 .EQU I2C3_CTLR_ENASCL, 21 .EQU I2C3_CTLR_MTHALL, 20 .EQU I2C3_CTLR_I2CCKDIV1, 19 .EQU I2C3_CTLR_I2CCKDIV0, 18 .EQU I2C3_CTLR_I2CCKS1, 17 .EQU I2C3_CTLR_I2CCKS0, 16 .EQU I2C3_CTLR_GCEN, 14 .EQU I2C3_CTLR_ACKDT, 13 .EQU I2C3_CTLR_ACKEN, 12 .EQU I2C3_CTLR_SCLNOSTR, 11 .EQU I2C3_CTLR_PEN, 10 .EQU I2C3_CTLR_SEN, 8 .EQU I2C3_CTLR_DHCNT3, 5 .EQU I2C3_CTLR_DHCNT2, 4 .EQU I2C3_CTLR_DHCNT1, 3 .EQU I2C3_CTLR_DHCNT0, 2 .EQU I2C3_CTLR_BADR10, 1 .EQU I2C3_CTLR_I2CEN, 0 // register------------------------------------- .EQU I2C3_SR, 0x40002384 // 0x4000 2384 I2C3_SR Bits------------------------------------- .EQU I2C3_SR_OVERIF, 19 .EQU I2C3_SR_BERRIF, 18 .EQU I2C3_SR_ITXDF, 17 .EQU I2C3_SR_IRCDF, 16 .EQU I2C3_SR_TXBE, 13 .EQU I2C3_SR_RCBF, 12 .EQU I2C3_SR_ISIF, 11 .EQU I2C3_SR_SMBDIF, 10 .EQU I2C3_SR_SMBHIF, 9 .EQU I2C3_SR_SMBAIF, 8 .EQU I2C3_SR_RNW, 7 .EQU I2C3_SR_ARBLIF, 6 .EQU I2C3_SR_AFIF, 5 .EQU I2C3_SR_DATA, 4 .EQU I2C3_SR_ADD10, 3 .EQU I2C3_SR_ADDR, 2 .EQU I2C3_SR_PIF, 1 .EQU I2C3_SR_SIF, 0 // register------------------------------------- .EQU I2C3_BUFR, 0x40002388 // 0x4000 2388 I2C3_BUFR Bits------------------------------------- .EQU I2C3_BUFR_I2CBUF9, 9 .EQU I2C3_BUFR_I2CBUF8, 8 .EQU I2C3_BUFR_I2CBUF7, 7 .EQU I2C3_BUFR_I2CBUF6, 6 .EQU I2C3_BUFR_I2CBUF5, 5 .EQU I2C3_BUFR_I2CBUF4, 4 .EQU I2C3_BUFR_I2CBUF3, 3 .EQU I2C3_BUFR_I2CBUF2, 2 .EQU I2C3_BUFR_I2CBUF1, 1 .EQU I2C3_BUFR_I2CBUF0, 0 // register------------------------------------- .EQU I2C3_ADDR0, 0x4000238C // 0x4000 238C I2C3_ADDR0 Bits------------------------------------- .EQU I2C3_ADDR0_I2CMSK9, 25 .EQU I2C3_ADDR0_I2CMSK8, 24 .EQU I2C3_ADDR0_I2CMSK7, 23 .EQU I2C3_ADDR0_I2CMSK6, 22 .EQU I2C3_ADDR0_I2CMSK5, 21 .EQU I2C3_ADDR0_I2CMSK4, 20 .EQU I2C3_ADDR0_I2CMSK3, 19 .EQU I2C3_ADDR0_I2CMSK2, 18 .EQU I2C3_ADDR0_I2CMSK1, 17 .EQU I2C3_ADDR0_I2CMSK0, 16 .EQU I2C3_ADDR0_I2CADD9, 9 .EQU I2C3_ADDR0_I2CADD8, 8 .EQU I2C3_ADDR0_I2CADD7, 7 .EQU I2C3_ADDR0_I2CADD6, 6 .EQU I2C3_ADDR0_I2CADD5, 5 .EQU I2C3_ADDR0_I2CADD4, 4 .EQU I2C3_ADDR0_I2CADD3, 3 .EQU I2C3_ADDR0_I2CADD2, 2 .EQU I2C3_ADDR0_I2CADD1, 1 .EQU I2C3_ADDR0_I2CADD0, 0 // register------------------------------------- .EQU I2C3_BRGR, 0x40002390 // 0x4000 2390 I2C3_BRGR Bits------------------------------------- .EQU I2C3_BRGR_I2CBRGL15, 31 .EQU I2C3_BRGR_I2CBRGL14, 30 .EQU I2C3_BRGR_I2CBRGL13, 29 .EQU I2C3_BRGR_I2CBRGL12, 28 .EQU I2C3_BRGR_I2CBRGL11, 27 .EQU I2C3_BRGR_I2CBRGL10, 26 .EQU I2C3_BRGR_I2CBRGL9, 25 .EQU I2C3_BRGR_I2CBRGL8, 24 .EQU I2C3_BRGR_I2CBRGL7, 23 .EQU I2C3_BRGR_I2CBRGL6, 22 .EQU I2C3_BRGR_I2CBRGL5, 21 .EQU I2C3_BRGR_I2CBRGL4, 20 .EQU I2C3_BRGR_I2CBRGL3, 19 .EQU I2C3_BRGR_I2CBRGL2, 18 .EQU I2C3_BRGR_I2CBRGL1, 17 .EQU I2C3_BRGR_I2CBRGL0, 16 .EQU I2C3_BRGR_I2CBRGH15, 15 .EQU I2C3_BRGR_I2CBRGH14, 14 .EQU I2C3_BRGR_I2CBRGH13, 13 .EQU I2C3_BRGR_I2CBRGH12, 12 .EQU I2C3_BRGR_I2CBRGH11, 11 .EQU I2C3_BRGR_I2CBRGH10, 10 .EQU I2C3_BRGR_I2CBRGH9, 9 .EQU I2C3_BRGR_I2CBRGH8, 8 .EQU I2C3_BRGR_I2CBRGH7, 7 .EQU I2C3_BRGR_I2CBRGH6, 6 .EQU I2C3_BRGR_I2CBRGH5, 5 .EQU I2C3_BRGR_I2CBRGH4, 4 .EQU I2C3_BRGR_I2CBRGH3, 3 .EQU I2C3_BRGR_I2CBRGH2, 2 .EQU I2C3_BRGR_I2CBRGH1, 1 .EQU I2C3_BRGR_I2CBRGH0, 0 // register------------------------------------- .EQU I2C3_ADDR1, 0x40002394 // 0x4000 2394 I2C3_ADDR1 Bits------------------------------------- .EQU I2C3_ADDR1_I2CMSK9, 25 .EQU I2C3_ADDR1_I2CMSK8, 24 .EQU I2C3_ADDR1_I2CMSK7, 23 .EQU I2C3_ADDR1_I2CMSK6, 22 .EQU I2C3_ADDR1_I2CMSK5, 21 .EQU I2C3_ADDR1_I2CMSK4, 20 .EQU I2C3_ADDR1_I2CMSK3, 19 .EQU I2C3_ADDR1_I2CMSK2, 18 .EQU I2C3_ADDR1_I2CMSK1, 17 .EQU I2C3_ADDR1_I2CMSK0, 16 .EQU I2C3_ADDR1_I2CADD9, 9 .EQU I2C3_ADDR1_I2CADD8, 8 .EQU I2C3_ADDR1_I2CADD7, 7 .EQU I2C3_ADDR1_I2CADD6, 6 .EQU I2C3_ADDR1_I2CADD5, 5 .EQU I2C3_ADDR1_I2CADD4, 4 .EQU I2C3_ADDR1_I2CADD3, 3 .EQU I2C3_ADDR1_I2CADD2, 2 .EQU I2C3_ADDR1_I2CADD1, 1 .EQU I2C3_ADDR1_I2CADD0, 0 // register------------------------------------- .EQU I2C3_ADDR2, 0x40002398 // 0x4000 2398 I2C3_ADDR2 Bits------------------------------------- .EQU I2C3_ADDR2_I2CMSK9, 25 .EQU I2C3_ADDR2_I2CMSK8, 24 .EQU I2C3_ADDR2_I2CMSK7, 23 .EQU I2C3_ADDR2_I2CMSK6, 22 .EQU I2C3_ADDR2_I2CMSK5, 21 .EQU I2C3_ADDR2_I2CMSK4, 20 .EQU I2C3_ADDR2_I2CMSK3, 19 .EQU I2C3_ADDR2_I2CMSK2, 18 .EQU I2C3_ADDR2_I2CMSK1, 17 .EQU I2C3_ADDR2_I2CMSK0, 16 .EQU I2C3_ADDR2_I2CADD9, 9 .EQU I2C3_ADDR2_I2CADD8, 8 .EQU I2C3_ADDR2_I2CADD7, 7 .EQU I2C3_ADDR2_I2CADD6, 6 .EQU I2C3_ADDR2_I2CADD5, 5 .EQU I2C3_ADDR2_I2CADD4, 4 .EQU I2C3_ADDR2_I2CADD3, 3 .EQU I2C3_ADDR2_I2CADD2, 2 .EQU I2C3_ADDR2_I2CADD1, 1 .EQU I2C3_ADDR2_I2CADD0, 0 // register------------------------------------- .EQU I2C3_ADDR3, 0x4000239C // 0x4000 239C I2C3_ADDR3 Bits------------------------------------- .EQU I2C3_ADDR3_I2CMSK9, 25 .EQU I2C3_ADDR3_I2CMSK8, 24 .EQU I2C3_ADDR3_I2CMSK7, 23 .EQU I2C3_ADDR3_I2CMSK6, 22 .EQU I2C3_ADDR3_I2CMSK5, 21 .EQU I2C3_ADDR3_I2CMSK4, 20 .EQU I2C3_ADDR3_I2CMSK3, 19 .EQU I2C3_ADDR3_I2CMSK2, 18 .EQU I2C3_ADDR3_I2CMSK1, 17 .EQU I2C3_ADDR3_I2CMSK0, 16 .EQU I2C3_ADDR3_I2CADD9, 9 .EQU I2C3_ADDR3_I2CADD8, 8 .EQU I2C3_ADDR3_I2CADD7, 7 .EQU I2C3_ADDR3_I2CADD6, 6 .EQU I2C3_ADDR3_I2CADD5, 5 .EQU I2C3_ADDR3_I2CADD4, 4 .EQU I2C3_ADDR3_I2CADD3, 3 .EQU I2C3_ADDR3_I2CADD2, 2 .EQU I2C3_ADDR3_I2CADD1, 1 .EQU I2C3_ADDR3_I2CADD0, 0 // register------------------------------------- .EQU I2C3_IER, 0x400023A0 // 0x4000 23A0 I2C3_IER Bits------------------------------------- .EQU I2C3_IER_OVERIE, 19 .EQU I2C3_IER_BERRIE, 18 .EQU I2C3_IER_ITXDE, 17 .EQU I2C3_IER_IRCDE, 16 .EQU I2C3_IER_ISIE, 11 .EQU I2C3_IER_SMBDIE, 10 .EQU I2C3_IER_SMBHIE, 9 .EQU I2C3_IER_SMBAIE, 8 .EQU I2C3_IER_ARBLIE, 6 .EQU I2C3_IER_AFIE, 5 .EQU I2C3_IER_PIE, 1 .EQU I2C3_IER_SIE, 0 // register------------------------------------- .EQU HC0_CTL, 0x40002400 // 0x4000 2400 HC0_CTL Bits------------------------------------- .EQU HC0_CTL_CLKSEL1, 6 .EQU HC0_CTL_CLKSEL0, 5 .EQU HC0_CTL_SOFTRESET, 4 .EQU HC0_CTL_OVERINTE, 3 .EQU HC0_CTL_FALLINTE, 2 .EQU HC0_CTL_RISEINTE, 1 .EQU HC0_CTL_HCINSEL, 0 // register------------------------------------- .EQU HC0_COUNTER, 0x40002404 // 0x4000 2404 HC0_COUNTER Bits------------------------------------- .EQU HC0_COUNTER_COUNTERSR15, 31 .EQU HC0_COUNTER_COUNTERSR14, 30 .EQU HC0_COUNTER_COUNTERSR13, 29 .EQU HC0_COUNTER_COUNTERSR12, 28 .EQU HC0_COUNTER_COUNTERSR11, 27 .EQU HC0_COUNTER_COUNTERSR10, 26 .EQU HC0_COUNTER_COUNTERSR9, 25 .EQU HC0_COUNTER_COUNTERSR8, 24 .EQU HC0_COUNTER_COUNTERSR7, 23 .EQU HC0_COUNTER_COUNTERSR6, 22 .EQU HC0_COUNTER_COUNTERSR5, 21 .EQU HC0_COUNTER_COUNTERSR4, 20 .EQU HC0_COUNTER_COUNTERSR3, 19 .EQU HC0_COUNTER_COUNTERSR2, 18 .EQU HC0_COUNTER_COUNTERSR1, 17 .EQU HC0_COUNTER_COUNTERSR0, 16 .EQU HC0_COUNTER_COUNTER15, 15 .EQU HC0_COUNTER_COUNTER14, 14 .EQU HC0_COUNTER_COUNTER13, 13 .EQU HC0_COUNTER_COUNTER12, 12 .EQU HC0_COUNTER_COUNTER11, 11 .EQU HC0_COUNTER_COUNTER10, 10 .EQU HC0_COUNTER_COUNTER9, 9 .EQU HC0_COUNTER_COUNTER8, 8 .EQU HC0_COUNTER_COUNTER7, 7 .EQU HC0_COUNTER_COUNTER6, 6 .EQU HC0_COUNTER_COUNTER5, 5 .EQU HC0_COUNTER_COUNTER4, 4 .EQU HC0_COUNTER_COUNTER3, 3 .EQU HC0_COUNTER_COUNTER2, 2 .EQU HC0_COUNTER_COUNTER1, 1 .EQU HC0_COUNTER_COUNTER0, 0 // register------------------------------------- .EQU HC0_RISE0, 0x40002408 // 0x4000 2408 HC0_RISE0 Bits------------------------------------- .EQU HC0_RISE0_RISE0_15, 15 .EQU HC0_RISE0_RISE0_14, 14 .EQU HC0_RISE0_RISE0_13, 13 .EQU HC0_RISE0_RISE0_12, 12 .EQU HC0_RISE0_RISE0_11, 11 .EQU HC0_RISE0_RISE0_10, 10 .EQU HC0_RISE0_RISE0_9, 9 .EQU HC0_RISE0_RISE0_8, 8 .EQU HC0_RISE0_RISE0_7, 7 .EQU HC0_RISE0_RISE0_6, 6 .EQU HC0_RISE0_RISE0_5, 5 .EQU HC0_RISE0_RISE0_4, 4 .EQU HC0_RISE0_RISE0_3, 3 .EQU HC0_RISE0_RISE0_2, 2 .EQU HC0_RISE0_RISE0_1, 1 .EQU HC0_RISE0_RISE0_0, 0 // register------------------------------------- .EQU HC0_RISE1, 0x4000240C // 0x4000 240C HC0_RISE1 Bits------------------------------------- .EQU HC0_RISE1_RISE1_15, 15 .EQU HC0_RISE1_RISE1_14, 14 .EQU HC0_RISE1_RISE1_13, 13 .EQU HC0_RISE1_RISE1_12, 12 .EQU HC0_RISE1_RISE1_11, 11 .EQU HC0_RISE1_RISE1_10, 10 .EQU HC0_RISE1_RISE1_9, 9 .EQU HC0_RISE1_RISE1_8, 8 .EQU HC0_RISE1_RISE1_7, 7 .EQU HC0_RISE1_RISE1_6, 6 .EQU HC0_RISE1_RISE1_5, 5 .EQU HC0_RISE1_RISE1_4, 4 .EQU HC0_RISE1_RISE1_3, 3 .EQU HC0_RISE1_RISE1_2, 2 .EQU HC0_RISE1_RISE1_1, 1 .EQU HC0_RISE1_RISE1_0, 0 // register------------------------------------- .EQU HC0_FALL0, 0x40002410 // 0x4000 2410 HC0_FALL0 Bits------------------------------------- .EQU HC0_FALL0_FALL0_15, 15 .EQU HC0_FALL0_FALL0_14, 14 .EQU HC0_FALL0_FALL0_13, 13 .EQU HC0_FALL0_FALL0_12, 12 .EQU HC0_FALL0_FALL0_11, 11 .EQU HC0_FALL0_FALL0_10, 10 .EQU HC0_FALL0_FALL0_9, 9 .EQU HC0_FALL0_FALL0_8, 8 .EQU HC0_FALL0_FALL0_7, 7 .EQU HC0_FALL0_FALL0_6, 6 .EQU HC0_FALL0_FALL0_5, 5 .EQU HC0_FALL0_FALL0_4, 4 .EQU HC0_FALL0_FALL0_3, 3 .EQU HC0_FALL0_FALL0_2, 2 .EQU HC0_FALL0_FALL0_1, 1 .EQU HC0_FALL0_FALL0_0, 0 // register------------------------------------- .EQU HC0_FALL1, 0x40002414 // 0x4000 2414 HC0_FALL1 Bits------------------------------------- .EQU HC0_FALL1_FALL1_15, 15 .EQU HC0_FALL1_FALL1_14, 14 .EQU HC0_FALL1_FALL1_13, 13 .EQU HC0_FALL1_FALL1_12, 12 .EQU HC0_FALL1_FALL1_11, 11 .EQU HC0_FALL1_FALL1_10, 10 .EQU HC0_FALL1_FALL1_9, 9 .EQU HC0_FALL1_FALL1_8, 8 .EQU HC0_FALL1_FALL1_7, 7 .EQU HC0_FALL1_FALL1_6, 6 .EQU HC0_FALL1_FALL1_5, 5 .EQU HC0_FALL1_FALL1_4, 4 .EQU HC0_FALL1_FALL1_3, 3 .EQU HC0_FALL1_FALL1_2, 2 .EQU HC0_FALL1_FALL1_1, 1 .EQU HC0_FALL1_FALL1_0, 0 // register------------------------------------- .EQU HC0_HRRISE0, 0x40002418 // 0x4000 2418 HC0_HRRISE0 Bits------------------------------------- .EQU HC0_HRRISE0_HRRISE0_15, 15 .EQU HC0_HRRISE0_HRRISE0_14, 14 .EQU HC0_HRRISE0_HRRISE0_13, 13 .EQU HC0_HRRISE0_HRRISE0_12, 12 .EQU HC0_HRRISE0_HRRISE0_11, 11 .EQU HC0_HRRISE0_HRRISE0_10, 10 .EQU HC0_HRRISE0_HRRISE0_9, 9 .EQU HC0_HRRISE0_HRRISE0_8, 8 .EQU HC0_HRRISE0_HRRISE0_7, 7 .EQU HC0_HRRISE0_HRRISE0_6, 6 .EQU HC0_HRRISE0_HRRISE0_5, 5 .EQU HC0_HRRISE0_HRRISE0_4, 4 .EQU HC0_HRRISE0_HRRISE0_3, 3 .EQU HC0_HRRISE0_HRRISE0_2, 2 .EQU HC0_HRRISE0_HRRISE0_1, 1 .EQU HC0_HRRISE0_HRRISE0_0, 0 // register------------------------------------- .EQU HC0_HRRISE1, 0x4000241C // 0x4000 241C HC0_HRRISE1 Bits------------------------------------- .EQU HC0_HRRISE1_HRRISE1_15, 15 .EQU HC0_HRRISE1_HRRISE1_14, 14 .EQU HC0_HRRISE1_HRRISE1_13, 13 .EQU HC0_HRRISE1_HRRISE1_12, 12 .EQU HC0_HRRISE1_HRRISE1_11, 11 .EQU HC0_HRRISE1_HRRISE1_10, 10 .EQU HC0_HRRISE1_HRRISE1_9, 9 .EQU HC0_HRRISE1_HRRISE1_8, 8 .EQU HC0_HRRISE1_HRRISE1_7, 7 .EQU HC0_HRRISE1_HRRISE1_6, 6 .EQU HC0_HRRISE1_HRRISE1_5, 5 .EQU HC0_HRRISE1_HRRISE1_4, 4 .EQU HC0_HRRISE1_HRRISE1_3, 3 .EQU HC0_HRRISE1_HRRISE1_2, 2 .EQU HC0_HRRISE1_HRRISE1_1, 1 .EQU HC0_HRRISE1_HRRISE1_0, 0 // register------------------------------------- .EQU HC0_HRFALL0, 0x40002420 // 0x4000 2420 HC0_HRFALL0 Bits------------------------------------- .EQU HC0_HRFALL0_HRFALL0_15, 15 .EQU HC0_HRFALL0_HRFALL0_14, 14 .EQU HC0_HRFALL0_HRFALL0_13, 13 .EQU HC0_HRFALL0_HRFALL0_12, 12 .EQU HC0_HRFALL0_HRFALL0_11, 11 .EQU HC0_HRFALL0_HRFALL0_10, 10 .EQU HC0_HRFALL0_HRFALL0_9, 9 .EQU HC0_HRFALL0_HRFALL0_8, 8 .EQU HC0_HRFALL0_HRFALL0_7, 7 .EQU HC0_HRFALL0_HRFALL0_6, 6 .EQU HC0_HRFALL0_HRFALL0_5, 5 .EQU HC0_HRFALL0_HRFALL0_4, 4 .EQU HC0_HRFALL0_HRFALL0_3, 3 .EQU HC0_HRFALL0_HRFALL0_2, 2 .EQU HC0_HRFALL0_HRFALL0_1, 1 .EQU HC0_HRFALL0_HRFALL0_0, 0 // register------------------------------------- .EQU HC0_HRFALL1, 0x40002424 // 0x4000 2424 HC0_HRFALL1 Bits------------------------------------- .EQU HC0_HRFALL1_HRFALL1_15, 15 .EQU HC0_HRFALL1_HRFALL1_14, 14 .EQU HC0_HRFALL1_HRFALL1_13, 13 .EQU HC0_HRFALL1_HRFALL1_12, 12 .EQU HC0_HRFALL1_HRFALL1_11, 11 .EQU HC0_HRFALL1_HRFALL1_10, 10 .EQU HC0_HRFALL1_HRFALL1_9, 9 .EQU HC0_HRFALL1_HRFALL1_8, 8 .EQU HC0_HRFALL1_HRFALL1_7, 7 .EQU HC0_HRFALL1_HRFALL1_6, 6 .EQU HC0_HRFALL1_HRFALL1_5, 5 .EQU HC0_HRFALL1_HRFALL1_4, 4 .EQU HC0_HRFALL1_HRFALL1_3, 3 .EQU HC0_HRFALL1_HRFALL1_2, 2 .EQU HC0_HRFALL1_HRFALL1_1, 1 .EQU HC0_HRFALL1_HRFALL1_0, 0 // register------------------------------------- .EQU HC0_SR, 0x40002428 // 0x4000 2428 HC0_SR Bits------------------------------------- .EQU HC0_SR_RISEOVF, 4 .EQU HC0_SR_COUNTEROVF, 3 .EQU HC0_SR_FALLIF, 2 .EQU HC0_SR_RISEIF, 1 // register------------------------------------- .EQU HC0_SRIC, 0x4000242C // 0x4000 242C HC0_SRIC Bits------------------------------------- .EQU HC0_SRIC_RISEOVC, 4 .EQU HC0_SRIC_COUNTEROVC, 3 .EQU HC0_SRIC_FALLIC, 2 .EQU HC0_SRIC_RISEIC, 1 // register------------------------------------- .EQU HC0_IFRC, 0x40002430 // 0x4000 2430 HC0_IFRC Bits------------------------------------- .EQU HC0_IFRC_COUNTEROVFRC, 3 .EQU HC0_IFRC_FALLIFRC, 2 .EQU HC0_IFRC_RISEIFRC, 1 // register------------------------------------- .EQU HC1_CTL, 0x40002480 // 0x4000 2480 HC1_CTL Bits------------------------------------- .EQU HC1_CTL_CLKSEL1, 6 .EQU HC1_CTL_CLKSEL0, 5 .EQU HC1_CTL_SOFTRESET, 4 .EQU HC1_CTL_OVERINTE, 3 .EQU HC1_CTL_FALLINTE, 2 .EQU HC1_CTL_RISEINTE, 1 .EQU HC1_CTL_HCINSEL, 0 // register------------------------------------- .EQU HC1_COUNTER, 0x40002484 // 0x4000 2484 HC1_COUNTER Bits------------------------------------- .EQU HC1_COUNTER_COUNTERSR15, 31 .EQU HC1_COUNTER_COUNTERSR14, 30 .EQU HC1_COUNTER_COUNTERSR13, 29 .EQU HC1_COUNTER_COUNTERSR12, 28 .EQU HC1_COUNTER_COUNTERSR11, 27 .EQU HC1_COUNTER_COUNTERSR10, 26 .EQU HC1_COUNTER_COUNTERSR9, 25 .EQU HC1_COUNTER_COUNTERSR8, 24 .EQU HC1_COUNTER_COUNTERSR7, 23 .EQU HC1_COUNTER_COUNTERSR6, 22 .EQU HC1_COUNTER_COUNTERSR5, 21 .EQU HC1_COUNTER_COUNTERSR4, 20 .EQU HC1_COUNTER_COUNTERSR3, 19 .EQU HC1_COUNTER_COUNTERSR2, 18 .EQU HC1_COUNTER_COUNTERSR1, 17 .EQU HC1_COUNTER_COUNTERSR0, 16 .EQU HC1_COUNTER_COUNTER15, 15 .EQU HC1_COUNTER_COUNTER14, 14 .EQU HC1_COUNTER_COUNTER13, 13 .EQU HC1_COUNTER_COUNTER12, 12 .EQU HC1_COUNTER_COUNTER11, 11 .EQU HC1_COUNTER_COUNTER10, 10 .EQU HC1_COUNTER_COUNTER9, 9 .EQU HC1_COUNTER_COUNTER8, 8 .EQU HC1_COUNTER_COUNTER7, 7 .EQU HC1_COUNTER_COUNTER6, 6 .EQU HC1_COUNTER_COUNTER5, 5 .EQU HC1_COUNTER_COUNTER4, 4 .EQU HC1_COUNTER_COUNTER3, 3 .EQU HC1_COUNTER_COUNTER2, 2 .EQU HC1_COUNTER_COUNTER1, 1 .EQU HC1_COUNTER_COUNTER0, 0 // register------------------------------------- .EQU HC1_RISE0, 0x40002488 // 0x4000 2488 HC1_RISE0 Bits------------------------------------- .EQU HC1_RISE0_RISE0_15, 15 .EQU HC1_RISE0_RISE0_14, 14 .EQU HC1_RISE0_RISE0_13, 13 .EQU HC1_RISE0_RISE0_12, 12 .EQU HC1_RISE0_RISE0_11, 11 .EQU HC1_RISE0_RISE0_10, 10 .EQU HC1_RISE0_RISE0_9, 9 .EQU HC1_RISE0_RISE0_8, 8 .EQU HC1_RISE0_RISE0_7, 7 .EQU HC1_RISE0_RISE0_6, 6 .EQU HC1_RISE0_RISE0_5, 5 .EQU HC1_RISE0_RISE0_4, 4 .EQU HC1_RISE0_RISE0_3, 3 .EQU HC1_RISE0_RISE0_2, 2 .EQU HC1_RISE0_RISE0_1, 1 .EQU HC1_RISE0_RISE0_0, 0 // register------------------------------------- .EQU HC1_RISE1, 0x4000248C // 0x4000 248C HC1_RISE1 Bits------------------------------------- .EQU HC1_RISE1_RISE1_15, 15 .EQU HC1_RISE1_RISE1_14, 14 .EQU HC1_RISE1_RISE1_13, 13 .EQU HC1_RISE1_RISE1_12, 12 .EQU HC1_RISE1_RISE1_11, 11 .EQU HC1_RISE1_RISE1_10, 10 .EQU HC1_RISE1_RISE1_9, 9 .EQU HC1_RISE1_RISE1_8, 8 .EQU HC1_RISE1_RISE1_7, 7 .EQU HC1_RISE1_RISE1_6, 6 .EQU HC1_RISE1_RISE1_5, 5 .EQU HC1_RISE1_RISE1_4, 4 .EQU HC1_RISE1_RISE1_3, 3 .EQU HC1_RISE1_RISE1_2, 2 .EQU HC1_RISE1_RISE1_1, 1 .EQU HC1_RISE1_RISE1_0, 0 // register------------------------------------- .EQU HC1_FALL0, 0x40002490 // 0x4000 2490 HC1_FALL0 Bits------------------------------------- .EQU HC1_FALL0_FALL0_15, 15 .EQU HC1_FALL0_FALL0_14, 14 .EQU HC1_FALL0_FALL0_13, 13 .EQU HC1_FALL0_FALL0_12, 12 .EQU HC1_FALL0_FALL0_11, 11 .EQU HC1_FALL0_FALL0_10, 10 .EQU HC1_FALL0_FALL0_9, 9 .EQU HC1_FALL0_FALL0_8, 8 .EQU HC1_FALL0_FALL0_7, 7 .EQU HC1_FALL0_FALL0_6, 6 .EQU HC1_FALL0_FALL0_5, 5 .EQU HC1_FALL0_FALL0_4, 4 .EQU HC1_FALL0_FALL0_3, 3 .EQU HC1_FALL0_FALL0_2, 2 .EQU HC1_FALL0_FALL0_1, 1 .EQU HC1_FALL0_FALL0_0, 0 // register------------------------------------- .EQU HC1_FALL1, 0x40002494 // 0x4000 2494 HC1_FALL1 Bits------------------------------------- .EQU HC1_FALL1_FALL1_15, 15 .EQU HC1_FALL1_FALL1_14, 14 .EQU HC1_FALL1_FALL1_13, 13 .EQU HC1_FALL1_FALL1_12, 12 .EQU HC1_FALL1_FALL1_11, 11 .EQU HC1_FALL1_FALL1_10, 10 .EQU HC1_FALL1_FALL1_9, 9 .EQU HC1_FALL1_FALL1_8, 8 .EQU HC1_FALL1_FALL1_7, 7 .EQU HC1_FALL1_FALL1_6, 6 .EQU HC1_FALL1_FALL1_5, 5 .EQU HC1_FALL1_FALL1_4, 4 .EQU HC1_FALL1_FALL1_3, 3 .EQU HC1_FALL1_FALL1_2, 2 .EQU HC1_FALL1_FALL1_1, 1 .EQU HC1_FALL1_FALL1_0, 0 // register------------------------------------- .EQU HC1_HRRISE0, 0x40002498 // 0x4000 2498 HC1_HRRISE0 Bits------------------------------------- .EQU HC1_HRRISE0_HRRISE0_15, 15 .EQU HC1_HRRISE0_HRRISE0_14, 14 .EQU HC1_HRRISE0_HRRISE0_13, 13 .EQU HC1_HRRISE0_HRRISE0_12, 12 .EQU HC1_HRRISE0_HRRISE0_11, 11 .EQU HC1_HRRISE0_HRRISE0_10, 10 .EQU HC1_HRRISE0_HRRISE0_9, 9 .EQU HC1_HRRISE0_HRRISE0_8, 8 .EQU HC1_HRRISE0_HRRISE0_7, 7 .EQU HC1_HRRISE0_HRRISE0_6, 6 .EQU HC1_HRRISE0_HRRISE0_5, 5 .EQU HC1_HRRISE0_HRRISE0_4, 4 .EQU HC1_HRRISE0_HRRISE0_3, 3 .EQU HC1_HRRISE0_HRRISE0_2, 2 .EQU HC1_HRRISE0_HRRISE0_1, 1 .EQU HC1_HRRISE0_HRRISE0_0, 0 // register------------------------------------- .EQU HC1_HRRISE1, 0x4000249C // 0x4000 249C HC1_HRRISE1 Bits------------------------------------- .EQU HC1_HRRISE1_HRRISE1_15, 15 .EQU HC1_HRRISE1_HRRISE1_14, 14 .EQU HC1_HRRISE1_HRRISE1_13, 13 .EQU HC1_HRRISE1_HRRISE1_12, 12 .EQU HC1_HRRISE1_HRRISE1_11, 11 .EQU HC1_HRRISE1_HRRISE1_10, 10 .EQU HC1_HRRISE1_HRRISE1_9, 9 .EQU HC1_HRRISE1_HRRISE1_8, 8 .EQU HC1_HRRISE1_HRRISE1_7, 7 .EQU HC1_HRRISE1_HRRISE1_6, 6 .EQU HC1_HRRISE1_HRRISE1_5, 5 .EQU HC1_HRRISE1_HRRISE1_4, 4 .EQU HC1_HRRISE1_HRRISE1_3, 3 .EQU HC1_HRRISE1_HRRISE1_2, 2 .EQU HC1_HRRISE1_HRRISE1_1, 1 .EQU HC1_HRRISE1_HRRISE1_0, 0 // register------------------------------------- .EQU HC1_HRFALL0, 0x400024A0 // 0x4000 24A0 HC1_HRFALL0 Bits------------------------------------- .EQU HC1_HRFALL0_HRFALL0_15, 15 .EQU HC1_HRFALL0_HRFALL0_14, 14 .EQU HC1_HRFALL0_HRFALL0_13, 13 .EQU HC1_HRFALL0_HRFALL0_12, 12 .EQU HC1_HRFALL0_HRFALL0_11, 11 .EQU HC1_HRFALL0_HRFALL0_10, 10 .EQU HC1_HRFALL0_HRFALL0_9, 9 .EQU HC1_HRFALL0_HRFALL0_8, 8 .EQU HC1_HRFALL0_HRFALL0_7, 7 .EQU HC1_HRFALL0_HRFALL0_6, 6 .EQU HC1_HRFALL0_HRFALL0_5, 5 .EQU HC1_HRFALL0_HRFALL0_4, 4 .EQU HC1_HRFALL0_HRFALL0_3, 3 .EQU HC1_HRFALL0_HRFALL0_2, 2 .EQU HC1_HRFALL0_HRFALL0_1, 1 .EQU HC1_HRFALL0_HRFALL0_0, 0 // register------------------------------------- .EQU HC1_HRFALL1, 0x400024A4 // 0x4000 24A4 HC1_HRFALL1 Bits------------------------------------- .EQU HC1_HRFALL1_HRFALL1_15, 15 .EQU HC1_HRFALL1_HRFALL1_14, 14 .EQU HC1_HRFALL1_HRFALL1_13, 13 .EQU HC1_HRFALL1_HRFALL1_12, 12 .EQU HC1_HRFALL1_HRFALL1_11, 11 .EQU HC1_HRFALL1_HRFALL1_10, 10 .EQU HC1_HRFALL1_HRFALL1_9, 9 .EQU HC1_HRFALL1_HRFALL1_8, 8 .EQU HC1_HRFALL1_HRFALL1_7, 7 .EQU HC1_HRFALL1_HRFALL1_6, 6 .EQU HC1_HRFALL1_HRFALL1_5, 5 .EQU HC1_HRFALL1_HRFALL1_4, 4 .EQU HC1_HRFALL1_HRFALL1_3, 3 .EQU HC1_HRFALL1_HRFALL1_2, 2 .EQU HC1_HRFALL1_HRFALL1_1, 1 .EQU HC1_HRFALL1_HRFALL1_0, 0 // register------------------------------------- .EQU HC1_SR, 0x400024A8 // 0x4000 24A8 HC1_SR Bits------------------------------------- .EQU HC1_SR_RISEOVF, 4 .EQU HC1_SR_COUNTEROVF, 3 .EQU HC1_SR_FALLIF, 2 .EQU HC1_SR_RISEIF, 1 // register------------------------------------- .EQU HC1_SRIC, 0x400024AC // 0x4000 24AC HC1_SRIC Bits------------------------------------- .EQU HC1_SRIC_RISEOVC, 4 .EQU HC1_SRIC_COUNTEROVC, 3 .EQU HC1_SRIC_FALLIC, 2 .EQU HC1_SRIC_RISEIC, 1 // register------------------------------------- .EQU HC1_IFRC, 0x400024B0 // 0x4000 24B0 HC1_IFRC Bits------------------------------------- .EQU HC1_IFRC_COUNTEROVFRC, 3 .EQU HC1_IFRC_FALLIFRC, 2 .EQU HC1_IFRC_RISEIFRC, 1 // register------------------------------------- .EQU HC2_CTL, 0x40002500 // 0x4000 2500 HC2_CTL Bits------------------------------------- .EQU HC2_CTL_CLKSEL1, 6 .EQU HC2_CTL_CLKSEL0, 5 .EQU HC2_CTL_SOFTRESET, 4 .EQU HC2_CTL_OVERINTE, 3 .EQU HC2_CTL_FALLINTE, 2 .EQU HC2_CTL_RISEINTE, 1 .EQU HC2_CTL_HCINSEL, 0 // register------------------------------------- .EQU HC2_COUNTER, 0x40002504 // 0x4000 2504 HC2_COUNTER Bits------------------------------------- .EQU HC2_COUNTER_COUNTERSR15, 31 .EQU HC2_COUNTER_COUNTERSR14, 30 .EQU HC2_COUNTER_COUNTERSR13, 29 .EQU HC2_COUNTER_COUNTERSR12, 28 .EQU HC2_COUNTER_COUNTERSR11, 27 .EQU HC2_COUNTER_COUNTERSR10, 26 .EQU HC2_COUNTER_COUNTERSR9, 25 .EQU HC2_COUNTER_COUNTERSR8, 24 .EQU HC2_COUNTER_COUNTERSR7, 23 .EQU HC2_COUNTER_COUNTERSR6, 22 .EQU HC2_COUNTER_COUNTERSR5, 21 .EQU HC2_COUNTER_COUNTERSR4, 20 .EQU HC2_COUNTER_COUNTERSR3, 19 .EQU HC2_COUNTER_COUNTERSR2, 18 .EQU HC2_COUNTER_COUNTERSR1, 17 .EQU HC2_COUNTER_COUNTERSR0, 16 .EQU HC2_COUNTER_COUNTER15, 15 .EQU HC2_COUNTER_COUNTER14, 14 .EQU HC2_COUNTER_COUNTER13, 13 .EQU HC2_COUNTER_COUNTER12, 12 .EQU HC2_COUNTER_COUNTER11, 11 .EQU HC2_COUNTER_COUNTER10, 10 .EQU HC2_COUNTER_COUNTER9, 9 .EQU HC2_COUNTER_COUNTER8, 8 .EQU HC2_COUNTER_COUNTER7, 7 .EQU HC2_COUNTER_COUNTER6, 6 .EQU HC2_COUNTER_COUNTER5, 5 .EQU HC2_COUNTER_COUNTER4, 4 .EQU HC2_COUNTER_COUNTER3, 3 .EQU HC2_COUNTER_COUNTER2, 2 .EQU HC2_COUNTER_COUNTER1, 1 .EQU HC2_COUNTER_COUNTER0, 0 // register------------------------------------- .EQU HC2_RISE0, 0x40002508 // 0x4000 2508 HC2_RISE0 Bits------------------------------------- .EQU HC2_RISE0_RISE0_15, 15 .EQU HC2_RISE0_RISE0_14, 14 .EQU HC2_RISE0_RISE0_13, 13 .EQU HC2_RISE0_RISE0_12, 12 .EQU HC2_RISE0_RISE0_11, 11 .EQU HC2_RISE0_RISE0_10, 10 .EQU HC2_RISE0_RISE0_9, 9 .EQU HC2_RISE0_RISE0_8, 8 .EQU HC2_RISE0_RISE0_7, 7 .EQU HC2_RISE0_RISE0_6, 6 .EQU HC2_RISE0_RISE0_5, 5 .EQU HC2_RISE0_RISE0_4, 4 .EQU HC2_RISE0_RISE0_3, 3 .EQU HC2_RISE0_RISE0_2, 2 .EQU HC2_RISE0_RISE0_1, 1 .EQU HC2_RISE0_RISE0_0, 0 // register------------------------------------- .EQU HC2_RISE1, 0x4000250C // 0x4000 250C HC2_RISE1 Bits------------------------------------- .EQU HC2_RISE1_RISE1_15, 15 .EQU HC2_RISE1_RISE1_14, 14 .EQU HC2_RISE1_RISE1_13, 13 .EQU HC2_RISE1_RISE1_12, 12 .EQU HC2_RISE1_RISE1_11, 11 .EQU HC2_RISE1_RISE1_10, 10 .EQU HC2_RISE1_RISE1_9, 9 .EQU HC2_RISE1_RISE1_8, 8 .EQU HC2_RISE1_RISE1_7, 7 .EQU HC2_RISE1_RISE1_6, 6 .EQU HC2_RISE1_RISE1_5, 5 .EQU HC2_RISE1_RISE1_4, 4 .EQU HC2_RISE1_RISE1_3, 3 .EQU HC2_RISE1_RISE1_2, 2 .EQU HC2_RISE1_RISE1_1, 1 .EQU HC2_RISE1_RISE1_0, 0 // register------------------------------------- .EQU HC2_FALL0, 0x40002510 // 0x4000 2510 HC2_FALL0 Bits------------------------------------- .EQU HC2_FALL0_FALL0_15, 15 .EQU HC2_FALL0_FALL0_14, 14 .EQU HC2_FALL0_FALL0_13, 13 .EQU HC2_FALL0_FALL0_12, 12 .EQU HC2_FALL0_FALL0_11, 11 .EQU HC2_FALL0_FALL0_10, 10 .EQU HC2_FALL0_FALL0_9, 9 .EQU HC2_FALL0_FALL0_8, 8 .EQU HC2_FALL0_FALL0_7, 7 .EQU HC2_FALL0_FALL0_6, 6 .EQU HC2_FALL0_FALL0_5, 5 .EQU HC2_FALL0_FALL0_4, 4 .EQU HC2_FALL0_FALL0_3, 3 .EQU HC2_FALL0_FALL0_2, 2 .EQU HC2_FALL0_FALL0_1, 1 .EQU HC2_FALL0_FALL0_0, 0 // register------------------------------------- .EQU HC2_FALL1, 0x40002514 // 0x4000 2514 HC2_FALL1 Bits------------------------------------- .EQU HC2_FALL1_FALL1_15, 15 .EQU HC2_FALL1_FALL1_14, 14 .EQU HC2_FALL1_FALL1_13, 13 .EQU HC2_FALL1_FALL1_12, 12 .EQU HC2_FALL1_FALL1_11, 11 .EQU HC2_FALL1_FALL1_10, 10 .EQU HC2_FALL1_FALL1_9, 9 .EQU HC2_FALL1_FALL1_8, 8 .EQU HC2_FALL1_FALL1_7, 7 .EQU HC2_FALL1_FALL1_6, 6 .EQU HC2_FALL1_FALL1_5, 5 .EQU HC2_FALL1_FALL1_4, 4 .EQU HC2_FALL1_FALL1_3, 3 .EQU HC2_FALL1_FALL1_2, 2 .EQU HC2_FALL1_FALL1_1, 1 .EQU HC2_FALL1_FALL1_0, 0 // register------------------------------------- .EQU HC2_HRRISE0, 0x40002518 // 0x4000 2518 HC2_HRRISE0 Bits------------------------------------- .EQU HC2_HRRISE0_HRRISE0_15, 15 .EQU HC2_HRRISE0_HRRISE0_14, 14 .EQU HC2_HRRISE0_HRRISE0_13, 13 .EQU HC2_HRRISE0_HRRISE0_12, 12 .EQU HC2_HRRISE0_HRRISE0_11, 11 .EQU HC2_HRRISE0_HRRISE0_10, 10 .EQU HC2_HRRISE0_HRRISE0_9, 9 .EQU HC2_HRRISE0_HRRISE0_8, 8 .EQU HC2_HRRISE0_HRRISE0_7, 7 .EQU HC2_HRRISE0_HRRISE0_6, 6 .EQU HC2_HRRISE0_HRRISE0_5, 5 .EQU HC2_HRRISE0_HRRISE0_4, 4 .EQU HC2_HRRISE0_HRRISE0_3, 3 .EQU HC2_HRRISE0_HRRISE0_2, 2 .EQU HC2_HRRISE0_HRRISE0_1, 1 .EQU HC2_HRRISE0_HRRISE0_0, 0 // register------------------------------------- .EQU HC2_HRRISE1, 0x4000251C // 0x4000 251C HC2_HRRISE1 Bits------------------------------------- .EQU HC2_HRRISE1_HRRISE1_15, 15 .EQU HC2_HRRISE1_HRRISE1_14, 14 .EQU HC2_HRRISE1_HRRISE1_13, 13 .EQU HC2_HRRISE1_HRRISE1_12, 12 .EQU HC2_HRRISE1_HRRISE1_11, 11 .EQU HC2_HRRISE1_HRRISE1_10, 10 .EQU HC2_HRRISE1_HRRISE1_9, 9 .EQU HC2_HRRISE1_HRRISE1_8, 8 .EQU HC2_HRRISE1_HRRISE1_7, 7 .EQU HC2_HRRISE1_HRRISE1_6, 6 .EQU HC2_HRRISE1_HRRISE1_5, 5 .EQU HC2_HRRISE1_HRRISE1_4, 4 .EQU HC2_HRRISE1_HRRISE1_3, 3 .EQU HC2_HRRISE1_HRRISE1_2, 2 .EQU HC2_HRRISE1_HRRISE1_1, 1 .EQU HC2_HRRISE1_HRRISE1_0, 0 // register------------------------------------- .EQU HC2_HRFALL0, 0x40002520 // 0x4000 2520 HC2_HRFALL0 Bits------------------------------------- .EQU HC2_HRFALL0_HRFALL0_15, 15 .EQU HC2_HRFALL0_HRFALL0_14, 14 .EQU HC2_HRFALL0_HRFALL0_13, 13 .EQU HC2_HRFALL0_HRFALL0_12, 12 .EQU HC2_HRFALL0_HRFALL0_11, 11 .EQU HC2_HRFALL0_HRFALL0_10, 10 .EQU HC2_HRFALL0_HRFALL0_9, 9 .EQU HC2_HRFALL0_HRFALL0_8, 8 .EQU HC2_HRFALL0_HRFALL0_7, 7 .EQU HC2_HRFALL0_HRFALL0_6, 6 .EQU HC2_HRFALL0_HRFALL0_5, 5 .EQU HC2_HRFALL0_HRFALL0_4, 4 .EQU HC2_HRFALL0_HRFALL0_3, 3 .EQU HC2_HRFALL0_HRFALL0_2, 2 .EQU HC2_HRFALL0_HRFALL0_1, 1 .EQU HC2_HRFALL0_HRFALL0_0, 0 // register------------------------------------- .EQU HC2_HRFALL1, 0x40002524 // 0x4000 2524 HC2_HRFALL1 Bits------------------------------------- .EQU HC2_HRFALL1_HRFALL1_15, 15 .EQU HC2_HRFALL1_HRFALL1_14, 14 .EQU HC2_HRFALL1_HRFALL1_13, 13 .EQU HC2_HRFALL1_HRFALL1_12, 12 .EQU HC2_HRFALL1_HRFALL1_11, 11 .EQU HC2_HRFALL1_HRFALL1_10, 10 .EQU HC2_HRFALL1_HRFALL1_9, 9 .EQU HC2_HRFALL1_HRFALL1_8, 8 .EQU HC2_HRFALL1_HRFALL1_7, 7 .EQU HC2_HRFALL1_HRFALL1_6, 6 .EQU HC2_HRFALL1_HRFALL1_5, 5 .EQU HC2_HRFALL1_HRFALL1_4, 4 .EQU HC2_HRFALL1_HRFALL1_3, 3 .EQU HC2_HRFALL1_HRFALL1_2, 2 .EQU HC2_HRFALL1_HRFALL1_1, 1 .EQU HC2_HRFALL1_HRFALL1_0, 0 // register------------------------------------- .EQU HC2_SR, 0x40002528 // 0x4000 2528 HC2_SR Bits------------------------------------- .EQU HC2_SR_RISEOVF, 4 .EQU HC2_SR_COUNTEROVF, 3 .EQU HC2_SR_FALLIF, 2 .EQU HC2_SR_RISEIF, 1 // register------------------------------------- .EQU HC2_SRIC, 0x4000252C // 0x4000 252C HC2_SRIC Bits------------------------------------- .EQU HC2_SRIC_RISEOVC, 4 .EQU HC2_SRIC_COUNTEROVC, 3 .EQU HC2_SRIC_FALLIC, 2 .EQU HC2_SRIC_RISEIC, 1 // register------------------------------------- .EQU HC2_IFRC, 0x40002530 // 0x4000 2530 HC2_IFRC Bits------------------------------------- .EQU HC2_IFRC_COUNTEROVFRC, 3 .EQU HC2_IFRC_FALLIFRC, 2 .EQU HC2_IFRC_RISEIFRC, 1 // register------------------------------------- .EQU PLL0_CTL, 0x40002580 // 0x4000 2580 PLL0_CTL Bits------------------------------------- .EQU PLL0_CTL_OD1, 21 .EQU PLL0_CTL_OD0, 20 .EQU PLL0_CTL_N3, 19 .EQU PLL0_CTL_N2, 18 .EQU PLL0_CTL_N1, 17 .EQU PLL0_CTL_N0, 16 .EQU PLL0_CTL_M13, 15 .EQU PLL0_CTL_M12, 14 .EQU PLL0_CTL_M11, 13 .EQU PLL0_CTL_M10, 12 .EQU PLL0_CTL_M9, 11 .EQU PLL0_CTL_M8, 10 .EQU PLL0_CTL_M7, 9 .EQU PLL0_CTL_M6, 8 .EQU PLL0_CTL_M5, 7 .EQU PLL0_CTL_M4, 6 .EQU PLL0_CTL_M3, 5 .EQU PLL0_CTL_M2, 4 .EQU PLL0_CTL_M1, 3 .EQU PLL0_CTL_M0, 2 .EQU PLL0_CTL_PDRST, 0 // register------------------------------------- .EQU PLL1_CTL, 0x40002584 // 0x4000 2584 PLL1_CTL Bits------------------------------------- .EQU PLL1_CTL_OD1, 21 .EQU PLL1_CTL_OD0, 20 .EQU PLL1_CTL_N3, 19 .EQU PLL1_CTL_N2, 18 .EQU PLL1_CTL_N1, 17 .EQU PLL1_CTL_N0, 16 .EQU PLL1_CTL_M13, 15 .EQU PLL1_CTL_M12, 14 .EQU PLL1_CTL_M11, 13 .EQU PLL1_CTL_M10, 12 .EQU PLL1_CTL_M9, 11 .EQU PLL1_CTL_M8, 10 .EQU PLL1_CTL_M7, 9 .EQU PLL1_CTL_M6, 8 .EQU PLL1_CTL_M5, 7 .EQU PLL1_CTL_M4, 6 .EQU PLL1_CTL_M3, 5 .EQU PLL1_CTL_M2, 4 .EQU PLL1_CTL_M1, 3 .EQU PLL1_CTL_M0, 2 .EQU PLL1_CTL_PDRST, 0 // register------------------------------------- .EQU PCLK_CTL0, 0x40002640 // 0x4000 2640 PCLK_CTL0 Bits------------------------------------- .EQU PCLK_CTL0_GPIOKCLKEN, 9 .EQU PCLK_CTL0_GPIOJCLKEN, 8 .EQU PCLK_CTL0_GPIOHCLKEN, 7 .EQU PCLK_CTL0_GPIOGCLKEN, 6 .EQU PCLK_CTL0_GPIOFCLKEN, 5 .EQU PCLK_CTL0_GPIOECLKEN, 4 .EQU PCLK_CTL0_GPIODCLKEN, 3 .EQU PCLK_CTL0_GPIOCCLKEN, 2 .EQU PCLK_CTL0_GPIOBCLKEN, 1 .EQU PCLK_CTL0_GPIOACLKEN, 0 // register------------------------------------- .EQU PCLK_CTL1, 0x40002644 // 0x4000 2644 PCLK_CTL1 Bits------------------------------------- .EQU PCLK_CTL1_MPUCLKEN, 30 .EQU PCLK_CTL1_I2C2CLKEN, 28 .EQU PCLK_CTL1_I2C1CLKEN, 27 .EQU PCLK_CTL1_I2C0CLKEN, 26 .EQU PCLK_CTL1_SPI1CLKEN, 25 .EQU PCLK_CTL1_SPI0CLKEN, 24 .EQU PCLK_CTL1_USART4CLKEN, 23 .EQU PCLK_CTL1_USART3CLKEN, 22 .EQU PCLK_CTL1_USART2CLKEN, 21 .EQU PCLK_CTL1_USART1CLKEN, 20 .EQU PCLK_CTL1_USART0CLKEN, 19 .EQU PCLK_CTL1_CTOUCHCLKEN, 18 .EQU PCLK_CTL1_T0CLKEN, 17 .EQU PCLK_CTL1_CMPCLKEN, 16 .EQU PCLK_CTL1_DAC1CLKEN, 15 .EQU PCLK_CTL1_DAC0CLKEN, 14 .EQU PCLK_CTL1_ADC2CLKEN, 13 .EQU PCLK_CTL1_ADC1CLKEN, 12 .EQU PCLK_CTL1_ADC0CLKEN, 11 .EQU PCLK_CTL1_QEI0CLKEN, 10 .EQU PCLK_CTL1_T25T26CLKEN, 9 .EQU PCLK_CTL1_T9T10CLKEN, 8 .EQU PCLK_CTL1_EXMCCLKEN, 7 .EQU PCLK_CTL1_T5T6CLKEN, 6 .EQU PCLK_CTL1_T4CLKEN, 5 .EQU PCLK_CTL1_T3CLKEN, 4 .EQU PCLK_CTL1_T2CLKEN, 3 .EQU PCLK_CTL1_T1CLKEN, 2 .EQU PCLK_CTL1_QEI1CLKEN, 1 .EQU PCLK_CTL1_QSPICLKEN, 0 // register------------------------------------- .EQU PCLK_CTL2, 0x40002648 // 0x4000 2648 PCLK_CTL2 Bits------------------------------------- .EQU PCLK_CTL2_USART7CLKEN, 31 .EQU PCLK_CTL2_USART6CLKEN, 30 .EQU PCLK_CTL2_USART5CLKEN, 29 .EQU PCLK_CTL2_T23CLKEN, 26 .EQU PCLK_CTL2_T22CLKEN, 25 .EQU PCLK_CTL2_T21CLKEN, 24 .EQU PCLK_CTL2_T20CLKEN, 23 .EQU PCLK_CTL2_T19CLKEN, 22 .EQU PCLK_CTL2_T18CLKEN, 21 .EQU PCLK_CTL2_ECC16CLKEN, 19 .EQU PCLK_CTL2_ECC17CLKEN, 18 .EQU PCLK_CTL2_T14CLKEN, 16 .EQU PCLK_CTL2_ECC18CLKEN, 15 .EQU PCLK_CTL2_DMA1CLKEN, 14 .EQU PCLK_CTL2_DMA0CLKEN, 12 .EQU PCLK_CTL2_EPWM16CLKEN, 11 .EQU PCLK_CTL2_EPWM13CLKEN, 10 .EQU PCLK_CTL2_EPWM12CLKEN, 9 .EQU PCLK_CTL2_EPWM11CLKEN, 8 .EQU PCLK_CTL2_WWDTCLKEN, 5 .EQU PCLK_CTL2_USART15CLKEN, 3 .EQU PCLK_CTL2_USART14CLKEN, 2 .EQU PCLK_CTL2_USART13CLKEN, 1 .EQU PCLK_CTL2_USART12CLKEN, 0 // register------------------------------------- .EQU PCLK_CTL3, 0x4000264C // 0x4000 264C PCLK_CTL3 Bits------------------------------------- .EQU PCLK_CTL3_ECC15CLKEN, 31 .EQU PCLK_CTL3_CANFD7CLKEN, 30 .EQU PCLK_CTL3_CANFD6CLKEN, 29 .EQU PCLK_CTL3_EWDTCLKEN, 27 .EQU PCLK_CTL3_ECFGLCLKEN, 26 .EQU PCLK_CTL3_FLEXRMCLKEN, 25 .EQU PCLK_CTL3_FDC2CLKEN, 24 .EQU PCLK_CTL3_FDC1CLKEN, 23 .EQU PCLK_CTL3_FDC0CLKEN, 22 .EQU PCLK_CTL3_FLEXMUXCLKEN, 21 .EQU PCLK_CTL3_CFGLCLKEN, 19 .EQU PCLK_CTL3_CAN4CLKEN, 17 .EQU PCLK_CTL3_AESCLKEN, 14 .EQU PCLK_CTL3_CRCCLKEN, 13 .EQU PCLK_CTL3_CMUCLKEN, 12 .EQU PCLK_CTL3_HRCAP2CLKEN, 10 .EQU PCLK_CTL3_HRCAP1CLKEN, 9 .EQU PCLK_CTL3_HRCAP0CLKEN, 8 .EQU PCLK_CTL3_I2C3CLKEN, 7 .EQU PCLK_CTL3_HRCAP5CLKEN, 6 .EQU PCLK_CTL3_HRCAP4CLKEN, 5 .EQU PCLK_CTL3_HRCAP3CLKEN, 4 .EQU PCLK_CTL3_SPI3CLKEN, 2 .EQU PCLK_CTL3_SPI2CLKEN, 1 // register------------------------------------- .EQU PCLK_CTL4, 0x40002650 // 0x4000 2650 PCLK_CTL4 Bits------------------------------------- .EQU PCLK_CTL4_ECC14CLKEN, 31 .EQU PCLK_CTL4_WRLOCKCLKEN, 30 .EQU PCLK_CTL4_EPWM36CLKEN, 29 .EQU PCLK_CTL4_EPWM33CLKEN, 28 .EQU PCLK_CTL4_EPWM32CLKEN, 27 .EQU PCLK_CTL4_EPWM31CLKEN, 26 .EQU PCLK_CTL4_ECC20CLKEN, 25 .EQU PCLK_CTL4_ECC19CLKEN, 24 .EQU PCLK_CTL4_ECC3CLKEN, 23 .EQU PCLK_CTL4_ECC2CLKEN, 22 .EQU PCLK_CTL4_ECC1CLKEN, 21 .EQU PCLK_CTL4_ECC0CLKEN, 20 .EQU PCLK_CTL4_ECC13CLKEN, 19 .EQU PCLK_CTL4_ECC12CLKEN, 18 .EQU PCLK_CTL4_ECC11CLKEN, 17 .EQU PCLK_CTL4_ECC10CLKEN, 16 .EQU PCLK_CTL4_ECC9CLKEN, 15 .EQU PCLK_CTL4_ECC8CLKEN, 14 .EQU PCLK_CTL4_ECC7CLKEN, 13 .EQU PCLK_CTL4_ECC6CLKEN, 12 .EQU PCLK_CTL4_ECC5CLKEN, 11 .EQU PCLK_CTL4_ECC4CLKEN, 10 .EQU PCLK_CTL4_USART11CLKEN, 9 .EQU PCLK_CTL4_USART10CLKEN, 8 .EQU PCLK_CTL4_USART9CLKEN, 7 .EQU PCLK_CTL4_USART8CLKEN, 6 .EQU PCLK_CTL4_CANFD13CLKEN, 5 .EQU PCLK_CTL4_CANFD12CLKEN, 4 .EQU PCLK_CTL4_CANFD11CLKEN, 3 .EQU PCLK_CTL4_CANFD10CLKEN, 2 .EQU PCLK_CTL4_CANFD9CLKEN, 1 .EQU PCLK_CTL4_CANFD8CLKEN, 0 // register------------------------------------- .EQU CRC_CTL, 0x40002680 // 0x4000 2680 CRC_CTL Bits------------------------------------- .EQU CRC_CTL_DATAOUTSWAP1, 7 .EQU CRC_CTL_DATAOUTSWAP0, 6 .EQU CRC_CTL_DATAINSWAP1, 5 .EQU CRC_CTL_DATAINSWAP0, 4 .EQU CRC_CTL_DATASIZE1, 3 .EQU CRC_CTL_DATASIZE0, 2 .EQU CRC_CTL_RSET, 0 // register------------------------------------- .EQU CRC_DATA, 0x40002684 // 0x4000 2684 CRC_DATA Bits------------------------------------- .EQU CRC_DATA_CRCDATA31, 31 .EQU CRC_DATA_CRCDATA30, 30 .EQU CRC_DATA_CRCDATA29, 29 .EQU CRC_DATA_CRCDATA28, 28 .EQU CRC_DATA_CRCDATA27, 27 .EQU CRC_DATA_CRCDATA26, 26 .EQU CRC_DATA_CRCDATA25, 25 .EQU CRC_DATA_CRCDATA24, 24 .EQU CRC_DATA_CRCDATA23, 23 .EQU CRC_DATA_CRCDATA22, 22 .EQU CRC_DATA_CRCDATA21, 21 .EQU CRC_DATA_CRCDATA20, 20 .EQU CRC_DATA_CRCDATA19, 19 .EQU CRC_DATA_CRCDATA18, 18 .EQU CRC_DATA_CRCDATA17, 17 .EQU CRC_DATA_CRCDATA16, 16 .EQU CRC_DATA_CRCDATA15, 15 .EQU CRC_DATA_CRCDATA14, 14 .EQU CRC_DATA_CRCDATA13, 13 .EQU CRC_DATA_CRCDATA12, 12 .EQU CRC_DATA_CRCDATA11, 11 .EQU CRC_DATA_CRCDATA10, 10 .EQU CRC_DATA_CRCDATA9, 9 .EQU CRC_DATA_CRCDATA8, 8 .EQU CRC_DATA_CRCDATA7, 7 .EQU CRC_DATA_CRCDATA6, 6 .EQU CRC_DATA_CRCDATA5, 5 .EQU CRC_DATA_CRCDATA4, 4 .EQU CRC_DATA_CRCDATA3, 3 .EQU CRC_DATA_CRCDATA2, 2 .EQU CRC_DATA_CRCDATA1, 1 .EQU CRC_DATA_CRCDATA0, 0 // register------------------------------------- .EQU CRC_RSLT, 0x40002688 // 0x4000 2688 CRC_RSLT Bits------------------------------------- .EQU CRC_RSLT_CRCRSLT31, 31 .EQU CRC_RSLT_CRCRSLT30, 30 .EQU CRC_RSLT_CRCRSLT29, 29 .EQU CRC_RSLT_CRCRSLT28, 28 .EQU CRC_RSLT_CRCRSLT27, 27 .EQU CRC_RSLT_CRCRSLT26, 26 .EQU CRC_RSLT_CRCRSLT25, 25 .EQU CRC_RSLT_CRCRSLT24, 24 .EQU CRC_RSLT_CRCRSLT23, 23 .EQU CRC_RSLT_CRCRSLT22, 22 .EQU CRC_RSLT_CRCRSLT21, 21 .EQU CRC_RSLT_CRCRSLT20, 20 .EQU CRC_RSLT_CRCRSLT19, 19 .EQU CRC_RSLT_CRCRSLT18, 18 .EQU CRC_RSLT_CRCRSLT17, 17 .EQU CRC_RSLT_CRCRSLT16, 16 .EQU CRC_RSLT_CRCRSLT15, 15 .EQU CRC_RSLT_CRCRSLT14, 14 .EQU CRC_RSLT_CRCRSLT13, 13 .EQU CRC_RSLT_CRCRSLT12, 12 .EQU CRC_RSLT_CRCRSLT11, 11 .EQU CRC_RSLT_CRCRSLT10, 10 .EQU CRC_RSLT_CRCRSLT9, 9 .EQU CRC_RSLT_CRCRSLT8, 8 .EQU CRC_RSLT_CRCRSLT7, 7 .EQU CRC_RSLT_CRCRSLT6, 6 .EQU CRC_RSLT_CRCRSLT5, 5 .EQU CRC_RSLT_CRCRSLT4, 4 .EQU CRC_RSLT_CRCRSLT3, 3 .EQU CRC_RSLT_CRCRSLT2, 2 .EQU CRC_RSLT_CRCRSLT1, 1 .EQU CRC_RSLT_CRCRSLT0, 0 // register------------------------------------- .EQU CRC_INIT, 0x4000268C // 0x4000 268C CRC_INIT Bits------------------------------------- .EQU CRC_INIT_CRCINIT31, 31 .EQU CRC_INIT_CRCINIT30, 30 .EQU CRC_INIT_CRCINIT29, 29 .EQU CRC_INIT_CRCINIT28, 28 .EQU CRC_INIT_CRCINIT27, 27 .EQU CRC_INIT_CRCINIT26, 26 .EQU CRC_INIT_CRCINIT25, 25 .EQU CRC_INIT_CRCINIT24, 24 .EQU CRC_INIT_CRCINIT23, 23 .EQU CRC_INIT_CRCINIT22, 22 .EQU CRC_INIT_CRCINIT21, 21 .EQU CRC_INIT_CRCINIT20, 20 .EQU CRC_INIT_CRCINIT19, 19 .EQU CRC_INIT_CRCINIT18, 18 .EQU CRC_INIT_CRCINIT17, 17 .EQU CRC_INIT_CRCINIT16, 16 .EQU CRC_INIT_CRCINIT15, 15 .EQU CRC_INIT_CRCINIT14, 14 .EQU CRC_INIT_CRCINIT13, 13 .EQU CRC_INIT_CRCINIT12, 12 .EQU CRC_INIT_CRCINIT11, 11 .EQU CRC_INIT_CRCINIT10, 10 .EQU CRC_INIT_CRCINIT9, 9 .EQU CRC_INIT_CRCINIT8, 8 .EQU CRC_INIT_CRCINIT7, 7 .EQU CRC_INIT_CRCINIT6, 6 .EQU CRC_INIT_CRCINIT5, 5 .EQU CRC_INIT_CRCINIT4, 4 .EQU CRC_INIT_CRCINIT3, 3 .EQU CRC_INIT_CRCINIT2, 2 .EQU CRC_INIT_CRCINIT1, 1 .EQU CRC_INIT_CRCINIT0, 0 // register------------------------------------- .EQU CRC_PLN, 0x40002690 // 0x4000 2690 CRC_PLN Bits------------------------------------- .EQU CRC_PLN_CRCPLN31, 31 .EQU CRC_PLN_CRCPLN30, 30 .EQU CRC_PLN_CRCPLN29, 29 .EQU CRC_PLN_CRCPLN28, 28 .EQU CRC_PLN_CRCPLN27, 27 .EQU CRC_PLN_CRCPLN26, 26 .EQU CRC_PLN_CRCPLN25, 25 .EQU CRC_PLN_CRCPLN24, 24 .EQU CRC_PLN_CRCPLN23, 23 .EQU CRC_PLN_CRCPLN22, 22 .EQU CRC_PLN_CRCPLN21, 21 .EQU CRC_PLN_CRCPLN20, 20 .EQU CRC_PLN_CRCPLN19, 19 .EQU CRC_PLN_CRCPLN18, 18 .EQU CRC_PLN_CRCPLN17, 17 .EQU CRC_PLN_CRCPLN16, 16 .EQU CRC_PLN_CRCPLN15, 15 .EQU CRC_PLN_CRCPLN14, 14 .EQU CRC_PLN_CRCPLN13, 13 .EQU CRC_PLN_CRCPLN12, 12 .EQU CRC_PLN_CRCPLN11, 11 .EQU CRC_PLN_CRCPLN10, 10 .EQU CRC_PLN_CRCPLN9, 9 .EQU CRC_PLN_CRCPLN8, 8 .EQU CRC_PLN_CRCPLN7, 7 .EQU CRC_PLN_CRCPLN6, 6 .EQU CRC_PLN_CRCPLN5, 5 .EQU CRC_PLN_CRCPLN4, 4 .EQU CRC_PLN_CRCPLN3, 3 .EQU CRC_PLN_CRCPLN2, 2 .EQU CRC_PLN_CRCPLN1, 1 .EQU CRC_PLN_CRCPLN0, 0 // register------------------------------------- .EQU CRC_RXOR, 0x40002694 // 0x4000 2694 CRC_RXOR Bits------------------------------------- .EQU CRC_RXOR_CRCRXOR31, 31 .EQU CRC_RXOR_CRCRXOR30, 30 .EQU CRC_RXOR_CRCRXOR29, 29 .EQU CRC_RXOR_CRCRXOR28, 28 .EQU CRC_RXOR_CRCRXOR27, 27 .EQU CRC_RXOR_CRCRXOR26, 26 .EQU CRC_RXOR_CRCRXOR25, 25 .EQU CRC_RXOR_CRCRXOR24, 24 .EQU CRC_RXOR_CRCRXOR23, 23 .EQU CRC_RXOR_CRCRXOR22, 22 .EQU CRC_RXOR_CRCRXOR21, 21 .EQU CRC_RXOR_CRCRXOR20, 20 .EQU CRC_RXOR_CRCRXOR19, 19 .EQU CRC_RXOR_CRCRXOR18, 18 .EQU CRC_RXOR_CRCRXOR17, 17 .EQU CRC_RXOR_CRCRXOR16, 16 .EQU CRC_RXOR_CRCRXOR15, 15 .EQU CRC_RXOR_CRCRXOR14, 14 .EQU CRC_RXOR_CRCRXOR13, 13 .EQU CRC_RXOR_CRCRXOR12, 12 .EQU CRC_RXOR_CRCRXOR11, 11 .EQU CRC_RXOR_CRCRXOR10, 10 .EQU CRC_RXOR_CRCRXOR9, 9 .EQU CRC_RXOR_CRCRXOR8, 8 .EQU CRC_RXOR_CRCRXOR7, 7 .EQU CRC_RXOR_CRCRXOR6, 6 .EQU CRC_RXOR_CRCRXOR5, 5 .EQU CRC_RXOR_CRCRXOR4, 4 .EQU CRC_RXOR_CRCRXOR3, 3 .EQU CRC_RXOR_CRCRXOR2, 2 .EQU CRC_RXOR_CRCRXOR1, 1 .EQU CRC_RXOR_CRCRXOR0, 0 // register------------------------------------- .EQU CRC_IDATA, 0x40002698 // 0x4000 2698 CRC_IDATA Bits------------------------------------- .EQU CRC_IDATA_CRCIDATA31, 31 .EQU CRC_IDATA_CRCIDATA30, 30 .EQU CRC_IDATA_CRCIDATA29, 29 .EQU CRC_IDATA_CRCIDATA28, 28 .EQU CRC_IDATA_CRCIDATA27, 27 .EQU CRC_IDATA_CRCIDATA26, 26 .EQU CRC_IDATA_CRCIDATA25, 25 .EQU CRC_IDATA_CRCIDATA24, 24 .EQU CRC_IDATA_CRCIDATA23, 23 .EQU CRC_IDATA_CRCIDATA22, 22 .EQU CRC_IDATA_CRCIDATA21, 21 .EQU CRC_IDATA_CRCIDATA20, 20 .EQU CRC_IDATA_CRCIDATA19, 19 .EQU CRC_IDATA_CRCIDATA18, 18 .EQU CRC_IDATA_CRCIDATA17, 17 .EQU CRC_IDATA_CRCIDATA16, 16 .EQU CRC_IDATA_CRCIDATA15, 15 .EQU CRC_IDATA_CRCIDATA14, 14 .EQU CRC_IDATA_CRCIDATA13, 13 .EQU CRC_IDATA_CRCIDATA12, 12 .EQU CRC_IDATA_CRCIDATA11, 11 .EQU CRC_IDATA_CRCIDATA10, 10 .EQU CRC_IDATA_CRCIDATA9, 9 .EQU CRC_IDATA_CRCIDATA8, 8 .EQU CRC_IDATA_CRCIDATA7, 7 .EQU CRC_IDATA_CRCIDATA6, 6 .EQU CRC_IDATA_CRCIDATA5, 5 .EQU CRC_IDATA_CRCIDATA4, 4 .EQU CRC_IDATA_CRCIDATA3, 3 .EQU CRC_IDATA_CRCIDATA2, 2 .EQU CRC_IDATA_CRCIDATA1, 1 .EQU CRC_IDATA_CRCIDATA0, 0 // register------------------------------------- .EQU CRC_TEMP, 0x4000269C // 0x4000 269C CRC_TEMP Bits------------------------------------- .EQU CRC_TEMP_CRCTEMP31, 31 .EQU CRC_TEMP_CRCTEMP30, 30 .EQU CRC_TEMP_CRCTEMP29, 29 .EQU CRC_TEMP_CRCTEMP28, 28 .EQU CRC_TEMP_CRCTEMP27, 27 .EQU CRC_TEMP_CRCTEMP26, 26 .EQU CRC_TEMP_CRCTEMP25, 25 .EQU CRC_TEMP_CRCTEMP24, 24 .EQU CRC_TEMP_CRCTEMP23, 23 .EQU CRC_TEMP_CRCTEMP22, 22 .EQU CRC_TEMP_CRCTEMP21, 21 .EQU CRC_TEMP_CRCTEMP20, 20 .EQU CRC_TEMP_CRCTEMP19, 19 .EQU CRC_TEMP_CRCTEMP18, 18 .EQU CRC_TEMP_CRCTEMP17, 17 .EQU CRC_TEMP_CRCTEMP16, 16 .EQU CRC_TEMP_CRCTEMP15, 15 .EQU CRC_TEMP_CRCTEMP14, 14 .EQU CRC_TEMP_CRCTEMP13, 13 .EQU CRC_TEMP_CRCTEMP12, 12 .EQU CRC_TEMP_CRCTEMP11, 11 .EQU CRC_TEMP_CRCTEMP10, 10 .EQU CRC_TEMP_CRCTEMP9, 9 .EQU CRC_TEMP_CRCTEMP8, 8 .EQU CRC_TEMP_CRCTEMP7, 7 .EQU CRC_TEMP_CRCTEMP6, 6 .EQU CRC_TEMP_CRCTEMP5, 5 .EQU CRC_TEMP_CRCTEMP4, 4 .EQU CRC_TEMP_CRCTEMP3, 3 .EQU CRC_TEMP_CRCTEMP2, 2 .EQU CRC_TEMP_CRCTEMP1, 1 .EQU CRC_TEMP_CRCTEMP0, 0 // register------------------------------------- .EQU AES_CTL, 0x40002700 // 0x4000 2700 AES_CTL Bits------------------------------------- .EQU AES_CTL_AESRUN, 31 .EQU AES_CTL_KEYRUN, 30 .EQU AES_CTL_DMAEN, 25 .EQU AES_CTL_GCMPH1, 24 .EQU AES_CTL_GCMPH0, 23 .EQU AES_CTL_AESMOD2, 22 .EQU AES_CTL_AESMOD1, 21 .EQU AES_CTL_AESMOD0, 20 .EQU AES_CTL_DATASWAP1, 19 .EQU AES_CTL_DATASWAP0, 18 .EQU AES_CTL_CKS1, 17 .EQU AES_CTL_CKS0, 16 .EQU AES_CTL_DIV2, 15 .EQU AES_CTL_DIV1, 14 .EQU AES_CTL_DIV0, 13 .EQU AES_CTL_RNDNUM4, 12 .EQU AES_CTL_RNDNUM3, 11 .EQU AES_CTL_RNDNUM2, 10 .EQU AES_CTL_RNDNUM1, 9 .EQU AES_CTL_RNDNUM0, 8 .EQU AES_CTL_KEYLEN2, 6 .EQU AES_CTL_KEYLEN1, 5 .EQU AES_CTL_KEYLEN0, 4 .EQU AES_CTL_SBOXINV, 3 .EQU AES_CTL_ENCRYPTEN, 2 .EQU AES_CTL_UNSTDAES, 1 .EQU AES_CTL_AESEN, 0 // register------------------------------------- .EQU AES_INT, 0x40002704 // 0x4000 2704 AES_INT Bits------------------------------------- .EQU AES_INT_KEYIF, 9 .EQU AES_INT_AESIF, 8 .EQU AES_INT_KEYIC, 5 .EQU AES_INT_AESIC, 4 .EQU AES_INT_KEYIE, 1 .EQU AES_INT_AESIE, 0 // register------------------------------------- .EQU AES_INPUT0, 0x40002710 // 0x4000 2710 AES_INPUT0 Bits------------------------------------- .EQU AES_INPUT0_AESINPUT31, 31 .EQU AES_INPUT0_AESINPUT30, 30 .EQU AES_INPUT0_AESINPUT29, 29 .EQU AES_INPUT0_AESINPUT28, 28 .EQU AES_INPUT0_AESINPUT27, 27 .EQU AES_INPUT0_AESINPUT26, 26 .EQU AES_INPUT0_AESINPUT25, 25 .EQU AES_INPUT0_AESINPUT24, 24 .EQU AES_INPUT0_AESINPUT23, 23 .EQU AES_INPUT0_AESINPUT22, 22 .EQU AES_INPUT0_AESINPUT21, 21 .EQU AES_INPUT0_AESINPUT20, 20 .EQU AES_INPUT0_AESINPUT19, 19 .EQU AES_INPUT0_AESINPUT18, 18 .EQU AES_INPUT0_AESINPUT17, 17 .EQU AES_INPUT0_AESINPUT16, 16 .EQU AES_INPUT0_AESINPUT15, 15 .EQU AES_INPUT0_AESINPUT14, 14 .EQU AES_INPUT0_AESINPUT13, 13 .EQU AES_INPUT0_AESINPUT12, 12 .EQU AES_INPUT0_AESINPUT11, 11 .EQU AES_INPUT0_AESINPUT10, 10 .EQU AES_INPUT0_AESINPUT9, 9 .EQU AES_INPUT0_AESINPUT8, 8 .EQU AES_INPUT0_AESINPUT7, 7 .EQU AES_INPUT0_AESINPUT6, 6 .EQU AES_INPUT0_AESINPUT5, 5 .EQU AES_INPUT0_AESINPUT4, 4 .EQU AES_INPUT0_AESINPUT3, 3 .EQU AES_INPUT0_AESINPUT2, 2 .EQU AES_INPUT0_AESINPUT1, 1 .EQU AES_INPUT0_AESINPUT0, 0 // register------------------------------------- .EQU AES_INPUT1, 0x40002714 // 0x4000 2714 AES_INPUT1 Bits------------------------------------- .EQU AES_INPUT1_AESINPUT31, 31 .EQU AES_INPUT1_AESINPUT30, 30 .EQU AES_INPUT1_AESINPUT29, 29 .EQU AES_INPUT1_AESINPUT28, 28 .EQU AES_INPUT1_AESINPUT27, 27 .EQU AES_INPUT1_AESINPUT26, 26 .EQU AES_INPUT1_AESINPUT25, 25 .EQU AES_INPUT1_AESINPUT24, 24 .EQU AES_INPUT1_AESINPUT23, 23 .EQU AES_INPUT1_AESINPUT22, 22 .EQU AES_INPUT1_AESINPUT21, 21 .EQU AES_INPUT1_AESINPUT20, 20 .EQU AES_INPUT1_AESINPUT19, 19 .EQU AES_INPUT1_AESINPUT18, 18 .EQU AES_INPUT1_AESINPUT17, 17 .EQU AES_INPUT1_AESINPUT16, 16 .EQU AES_INPUT1_AESINPUT15, 15 .EQU AES_INPUT1_AESINPUT14, 14 .EQU AES_INPUT1_AESINPUT13, 13 .EQU AES_INPUT1_AESINPUT12, 12 .EQU AES_INPUT1_AESINPUT11, 11 .EQU AES_INPUT1_AESINPUT10, 10 .EQU AES_INPUT1_AESINPUT9, 9 .EQU AES_INPUT1_AESINPUT8, 8 .EQU AES_INPUT1_AESINPUT7, 7 .EQU AES_INPUT1_AESINPUT6, 6 .EQU AES_INPUT1_AESINPUT5, 5 .EQU AES_INPUT1_AESINPUT4, 4 .EQU AES_INPUT1_AESINPUT3, 3 .EQU AES_INPUT1_AESINPUT2, 2 .EQU AES_INPUT1_AESINPUT1, 1 .EQU AES_INPUT1_AESINPUT0, 0 // register------------------------------------- .EQU AES_INPUT2, 0x40002718 // 0x4000 2718 AES_INPUT2 Bits------------------------------------- .EQU AES_INPUT2_AESINPUT31, 31 .EQU AES_INPUT2_AESINPUT30, 30 .EQU AES_INPUT2_AESINPUT29, 29 .EQU AES_INPUT2_AESINPUT28, 28 .EQU AES_INPUT2_AESINPUT27, 27 .EQU AES_INPUT2_AESINPUT26, 26 .EQU AES_INPUT2_AESINPUT25, 25 .EQU AES_INPUT2_AESINPUT24, 24 .EQU AES_INPUT2_AESINPUT23, 23 .EQU AES_INPUT2_AESINPUT22, 22 .EQU AES_INPUT2_AESINPUT21, 21 .EQU AES_INPUT2_AESINPUT20, 20 .EQU AES_INPUT2_AESINPUT19, 19 .EQU AES_INPUT2_AESINPUT18, 18 .EQU AES_INPUT2_AESINPUT17, 17 .EQU AES_INPUT2_AESINPUT16, 16 .EQU AES_INPUT2_AESINPUT15, 15 .EQU AES_INPUT2_AESINPUT14, 14 .EQU AES_INPUT2_AESINPUT13, 13 .EQU AES_INPUT2_AESINPUT12, 12 .EQU AES_INPUT2_AESINPUT11, 11 .EQU AES_INPUT2_AESINPUT10, 10 .EQU AES_INPUT2_AESINPUT9, 9 .EQU AES_INPUT2_AESINPUT8, 8 .EQU AES_INPUT2_AESINPUT7, 7 .EQU AES_INPUT2_AESINPUT6, 6 .EQU AES_INPUT2_AESINPUT5, 5 .EQU AES_INPUT2_AESINPUT4, 4 .EQU AES_INPUT2_AESINPUT3, 3 .EQU AES_INPUT2_AESINPUT2, 2 .EQU AES_INPUT2_AESINPUT1, 1 .EQU AES_INPUT2_AESINPUT0, 0 // register------------------------------------- .EQU AES_INPUT3, 0x4000271C // 0x4000 271C AES_INPUT3 Bits------------------------------------- .EQU AES_INPUT3_AESINPUT31, 31 .EQU AES_INPUT3_AESINPUT30, 30 .EQU AES_INPUT3_AESINPUT29, 29 .EQU AES_INPUT3_AESINPUT28, 28 .EQU AES_INPUT3_AESINPUT27, 27 .EQU AES_INPUT3_AESINPUT26, 26 .EQU AES_INPUT3_AESINPUT25, 25 .EQU AES_INPUT3_AESINPUT24, 24 .EQU AES_INPUT3_AESINPUT23, 23 .EQU AES_INPUT3_AESINPUT22, 22 .EQU AES_INPUT3_AESINPUT21, 21 .EQU AES_INPUT3_AESINPUT20, 20 .EQU AES_INPUT3_AESINPUT19, 19 .EQU AES_INPUT3_AESINPUT18, 18 .EQU AES_INPUT3_AESINPUT17, 17 .EQU AES_INPUT3_AESINPUT16, 16 .EQU AES_INPUT3_AESINPUT15, 15 .EQU AES_INPUT3_AESINPUT14, 14 .EQU AES_INPUT3_AESINPUT13, 13 .EQU AES_INPUT3_AESINPUT12, 12 .EQU AES_INPUT3_AESINPUT11, 11 .EQU AES_INPUT3_AESINPUT10, 10 .EQU AES_INPUT3_AESINPUT9, 9 .EQU AES_INPUT3_AESINPUT8, 8 .EQU AES_INPUT3_AESINPUT7, 7 .EQU AES_INPUT3_AESINPUT6, 6 .EQU AES_INPUT3_AESINPUT5, 5 .EQU AES_INPUT3_AESINPUT4, 4 .EQU AES_INPUT3_AESINPUT3, 3 .EQU AES_INPUT3_AESINPUT2, 2 .EQU AES_INPUT3_AESINPUT1, 1 .EQU AES_INPUT3_AESINPUT0, 0 // register------------------------------------- .EQU AES_OUTPUT0, 0x40002720 // 0x4000 2720 AES_OUTPUT0 Bits------------------------------------- .EQU AES_OUTPUT0_AESINPUT31, 31 .EQU AES_OUTPUT0_AESINPUT30, 30 .EQU AES_OUTPUT0_AESINPUT29, 29 .EQU AES_OUTPUT0_AESINPUT28, 28 .EQU AES_OUTPUT0_AESINPUT27, 27 .EQU AES_OUTPUT0_AESINPUT26, 26 .EQU AES_OUTPUT0_AESINPUT25, 25 .EQU AES_OUTPUT0_AESINPUT24, 24 .EQU AES_OUTPUT0_AESINPUT23, 23 .EQU AES_OUTPUT0_AESINPUT22, 22 .EQU AES_OUTPUT0_AESINPUT21, 21 .EQU AES_OUTPUT0_AESINPUT20, 20 .EQU AES_OUTPUT0_AESINPUT19, 19 .EQU AES_OUTPUT0_AESINPUT18, 18 .EQU AES_OUTPUT0_AESINPUT17, 17 .EQU AES_OUTPUT0_AESINPUT16, 16 .EQU AES_OUTPUT0_AESINPUT15, 15 .EQU AES_OUTPUT0_AESINPUT14, 14 .EQU AES_OUTPUT0_AESINPUT13, 13 .EQU AES_OUTPUT0_AESINPUT12, 12 .EQU AES_OUTPUT0_AESINPUT11, 11 .EQU AES_OUTPUT0_AESINPUT10, 10 .EQU AES_OUTPUT0_AESINPUT9, 9 .EQU AES_OUTPUT0_AESINPUT8, 8 .EQU AES_OUTPUT0_AESINPUT7, 7 .EQU AES_OUTPUT0_AESINPUT6, 6 .EQU AES_OUTPUT0_AESINPUT5, 5 .EQU AES_OUTPUT0_AESINPUT4, 4 .EQU AES_OUTPUT0_AESINPUT3, 3 .EQU AES_OUTPUT0_AESINPUT2, 2 .EQU AES_OUTPUT0_AESINPUT1, 1 .EQU AES_OUTPUT0_AESINPUT0, 0 // register------------------------------------- .EQU AES_OUTPUT1, 0x40002724 // 0x4000 2724 AES_OUTPUT1 Bits------------------------------------- .EQU AES_OUTPUT1_AESINPUT31, 31 .EQU AES_OUTPUT1_AESINPUT30, 30 .EQU AES_OUTPUT1_AESINPUT29, 29 .EQU AES_OUTPUT1_AESINPUT28, 28 .EQU AES_OUTPUT1_AESINPUT27, 27 .EQU AES_OUTPUT1_AESINPUT26, 26 .EQU AES_OUTPUT1_AESINPUT25, 25 .EQU AES_OUTPUT1_AESINPUT24, 24 .EQU AES_OUTPUT1_AESINPUT23, 23 .EQU AES_OUTPUT1_AESINPUT22, 22 .EQU AES_OUTPUT1_AESINPUT21, 21 .EQU AES_OUTPUT1_AESINPUT20, 20 .EQU AES_OUTPUT1_AESINPUT19, 19 .EQU AES_OUTPUT1_AESINPUT18, 18 .EQU AES_OUTPUT1_AESINPUT17, 17 .EQU AES_OUTPUT1_AESINPUT16, 16 .EQU AES_OUTPUT1_AESINPUT15, 15 .EQU AES_OUTPUT1_AESINPUT14, 14 .EQU AES_OUTPUT1_AESINPUT13, 13 .EQU AES_OUTPUT1_AESINPUT12, 12 .EQU AES_OUTPUT1_AESINPUT11, 11 .EQU AES_OUTPUT1_AESINPUT10, 10 .EQU AES_OUTPUT1_AESINPUT9, 9 .EQU AES_OUTPUT1_AESINPUT8, 8 .EQU AES_OUTPUT1_AESINPUT7, 7 .EQU AES_OUTPUT1_AESINPUT6, 6 .EQU AES_OUTPUT1_AESINPUT5, 5 .EQU AES_OUTPUT1_AESINPUT4, 4 .EQU AES_OUTPUT1_AESINPUT3, 3 .EQU AES_OUTPUT1_AESINPUT2, 2 .EQU AES_OUTPUT1_AESINPUT1, 1 .EQU AES_OUTPUT1_AESINPUT0, 0 // register------------------------------------- .EQU AES_OUTPUT2, 0x40002728 // 0x4000 2728 AES_OUTPUT2 Bits------------------------------------- .EQU AES_OUTPUT2_AESINPUT31, 31 .EQU AES_OUTPUT2_AESINPUT30, 30 .EQU AES_OUTPUT2_AESINPUT29, 29 .EQU AES_OUTPUT2_AESINPUT28, 28 .EQU AES_OUTPUT2_AESINPUT27, 27 .EQU AES_OUTPUT2_AESINPUT26, 26 .EQU AES_OUTPUT2_AESINPUT25, 25 .EQU AES_OUTPUT2_AESINPUT24, 24 .EQU AES_OUTPUT2_AESINPUT23, 23 .EQU AES_OUTPUT2_AESINPUT22, 22 .EQU AES_OUTPUT2_AESINPUT21, 21 .EQU AES_OUTPUT2_AESINPUT20, 20 .EQU AES_OUTPUT2_AESINPUT19, 19 .EQU AES_OUTPUT2_AESINPUT18, 18 .EQU AES_OUTPUT2_AESINPUT17, 17 .EQU AES_OUTPUT2_AESINPUT16, 16 .EQU AES_OUTPUT2_AESINPUT15, 15 .EQU AES_OUTPUT2_AESINPUT14, 14 .EQU AES_OUTPUT2_AESINPUT13, 13 .EQU AES_OUTPUT2_AESINPUT12, 12 .EQU AES_OUTPUT2_AESINPUT11, 11 .EQU AES_OUTPUT2_AESINPUT10, 10 .EQU AES_OUTPUT2_AESINPUT9, 9 .EQU AES_OUTPUT2_AESINPUT8, 8 .EQU AES_OUTPUT2_AESINPUT7, 7 .EQU AES_OUTPUT2_AESINPUT6, 6 .EQU AES_OUTPUT2_AESINPUT5, 5 .EQU AES_OUTPUT2_AESINPUT4, 4 .EQU AES_OUTPUT2_AESINPUT3, 3 .EQU AES_OUTPUT2_AESINPUT2, 2 .EQU AES_OUTPUT2_AESINPUT1, 1 .EQU AES_OUTPUT2_AESINPUT0, 0 // register------------------------------------- .EQU AES_OUTPUT3, 0x4000272C // 0x4000 272C AES_OUTPUT3 Bits------------------------------------- .EQU AES_OUTPUT3_AESINPUT31, 31 .EQU AES_OUTPUT3_AESINPUT30, 30 .EQU AES_OUTPUT3_AESINPUT29, 29 .EQU AES_OUTPUT3_AESINPUT28, 28 .EQU AES_OUTPUT3_AESINPUT27, 27 .EQU AES_OUTPUT3_AESINPUT26, 26 .EQU AES_OUTPUT3_AESINPUT25, 25 .EQU AES_OUTPUT3_AESINPUT24, 24 .EQU AES_OUTPUT3_AESINPUT23, 23 .EQU AES_OUTPUT3_AESINPUT22, 22 .EQU AES_OUTPUT3_AESINPUT21, 21 .EQU AES_OUTPUT3_AESINPUT20, 20 .EQU AES_OUTPUT3_AESINPUT19, 19 .EQU AES_OUTPUT3_AESINPUT18, 18 .EQU AES_OUTPUT3_AESINPUT17, 17 .EQU AES_OUTPUT3_AESINPUT16, 16 .EQU AES_OUTPUT3_AESINPUT15, 15 .EQU AES_OUTPUT3_AESINPUT14, 14 .EQU AES_OUTPUT3_AESINPUT13, 13 .EQU AES_OUTPUT3_AESINPUT12, 12 .EQU AES_OUTPUT3_AESINPUT11, 11 .EQU AES_OUTPUT3_AESINPUT10, 10 .EQU AES_OUTPUT3_AESINPUT9, 9 .EQU AES_OUTPUT3_AESINPUT8, 8 .EQU AES_OUTPUT3_AESINPUT7, 7 .EQU AES_OUTPUT3_AESINPUT6, 6 .EQU AES_OUTPUT3_AESINPUT5, 5 .EQU AES_OUTPUT3_AESINPUT4, 4 .EQU AES_OUTPUT3_AESINPUT3, 3 .EQU AES_OUTPUT3_AESINPUT2, 2 .EQU AES_OUTPUT3_AESINPUT1, 1 .EQU AES_OUTPUT3_AESINPUT0, 0 // register------------------------------------- .EQU AES_KEYR0, 0x40002730 // 0x4000 2730 AES_KEYR0 Bits------------------------------------- .EQU AES_KEYR0_AESKEY31, 31 .EQU AES_KEYR0_AESKEY30, 30 .EQU AES_KEYR0_AESKEY29, 29 .EQU AES_KEYR0_AESKEY28, 28 .EQU AES_KEYR0_AESKEY27, 27 .EQU AES_KEYR0_AESKEY26, 26 .EQU AES_KEYR0_AESKEY25, 25 .EQU AES_KEYR0_AESKEY24, 24 .EQU AES_KEYR0_AESKEY23, 23 .EQU AES_KEYR0_AESKEY22, 22 .EQU AES_KEYR0_AESKEY21, 21 .EQU AES_KEYR0_AESKEY20, 20 .EQU AES_KEYR0_AESKEY19, 19 .EQU AES_KEYR0_AESKEY18, 18 .EQU AES_KEYR0_AESKEY17, 17 .EQU AES_KEYR0_AESKEY16, 16 .EQU AES_KEYR0_AESKEY15, 15 .EQU AES_KEYR0_AESKEY14, 14 .EQU AES_KEYR0_AESKEY13, 13 .EQU AES_KEYR0_AESKEY12, 12 .EQU AES_KEYR0_AESKEY11, 11 .EQU AES_KEYR0_AESKEY10, 10 .EQU AES_KEYR0_AESKEY9, 9 .EQU AES_KEYR0_AESKEY8, 8 .EQU AES_KEYR0_AESKEY7, 7 .EQU AES_KEYR0_AESKEY6, 6 .EQU AES_KEYR0_AESKEY5, 5 .EQU AES_KEYR0_AESKEY4, 4 .EQU AES_KEYR0_AESKEY3, 3 .EQU AES_KEYR0_AESKEY2, 2 .EQU AES_KEYR0_AESKEY1, 1 .EQU AES_KEYR0_AESKEY0, 0 // register------------------------------------- .EQU AES_KEYR1, 0x40002734 // 0x4000 2734 AES_KEYR1 Bits------------------------------------- .EQU AES_KEYR1_AESKEY31, 31 .EQU AES_KEYR1_AESKEY30, 30 .EQU AES_KEYR1_AESKEY29, 29 .EQU AES_KEYR1_AESKEY28, 28 .EQU AES_KEYR1_AESKEY27, 27 .EQU AES_KEYR1_AESKEY26, 26 .EQU AES_KEYR1_AESKEY25, 25 .EQU AES_KEYR1_AESKEY24, 24 .EQU AES_KEYR1_AESKEY23, 23 .EQU AES_KEYR1_AESKEY22, 22 .EQU AES_KEYR1_AESKEY21, 21 .EQU AES_KEYR1_AESKEY20, 20 .EQU AES_KEYR1_AESKEY19, 19 .EQU AES_KEYR1_AESKEY18, 18 .EQU AES_KEYR1_AESKEY17, 17 .EQU AES_KEYR1_AESKEY16, 16 .EQU AES_KEYR1_AESKEY15, 15 .EQU AES_KEYR1_AESKEY14, 14 .EQU AES_KEYR1_AESKEY13, 13 .EQU AES_KEYR1_AESKEY12, 12 .EQU AES_KEYR1_AESKEY11, 11 .EQU AES_KEYR1_AESKEY10, 10 .EQU AES_KEYR1_AESKEY9, 9 .EQU AES_KEYR1_AESKEY8, 8 .EQU AES_KEYR1_AESKEY7, 7 .EQU AES_KEYR1_AESKEY6, 6 .EQU AES_KEYR1_AESKEY5, 5 .EQU AES_KEYR1_AESKEY4, 4 .EQU AES_KEYR1_AESKEY3, 3 .EQU AES_KEYR1_AESKEY2, 2 .EQU AES_KEYR1_AESKEY1, 1 .EQU AES_KEYR1_AESKEY0, 0 // register------------------------------------- .EQU AES_KEYR2, 0x40002738 // 0x4000 2738 AES_KEYR2 Bits------------------------------------- .EQU AES_KEYR2_AESKEY31, 31 .EQU AES_KEYR2_AESKEY30, 30 .EQU AES_KEYR2_AESKEY29, 29 .EQU AES_KEYR2_AESKEY28, 28 .EQU AES_KEYR2_AESKEY27, 27 .EQU AES_KEYR2_AESKEY26, 26 .EQU AES_KEYR2_AESKEY25, 25 .EQU AES_KEYR2_AESKEY24, 24 .EQU AES_KEYR2_AESKEY23, 23 .EQU AES_KEYR2_AESKEY22, 22 .EQU AES_KEYR2_AESKEY21, 21 .EQU AES_KEYR2_AESKEY20, 20 .EQU AES_KEYR2_AESKEY19, 19 .EQU AES_KEYR2_AESKEY18, 18 .EQU AES_KEYR2_AESKEY17, 17 .EQU AES_KEYR2_AESKEY16, 16 .EQU AES_KEYR2_AESKEY15, 15 .EQU AES_KEYR2_AESKEY14, 14 .EQU AES_KEYR2_AESKEY13, 13 .EQU AES_KEYR2_AESKEY12, 12 .EQU AES_KEYR2_AESKEY11, 11 .EQU AES_KEYR2_AESKEY10, 10 .EQU AES_KEYR2_AESKEY9, 9 .EQU AES_KEYR2_AESKEY8, 8 .EQU AES_KEYR2_AESKEY7, 7 .EQU AES_KEYR2_AESKEY6, 6 .EQU AES_KEYR2_AESKEY5, 5 .EQU AES_KEYR2_AESKEY4, 4 .EQU AES_KEYR2_AESKEY3, 3 .EQU AES_KEYR2_AESKEY2, 2 .EQU AES_KEYR2_AESKEY1, 1 .EQU AES_KEYR2_AESKEY0, 0 // register------------------------------------- .EQU AES_KEYR3, 0x4000273C // 0x4000 273C AES_KEYR3 Bits------------------------------------- .EQU AES_KEYR3_AESKEY31, 31 .EQU AES_KEYR3_AESKEY30, 30 .EQU AES_KEYR3_AESKEY29, 29 .EQU AES_KEYR3_AESKEY28, 28 .EQU AES_KEYR3_AESKEY27, 27 .EQU AES_KEYR3_AESKEY26, 26 .EQU AES_KEYR3_AESKEY25, 25 .EQU AES_KEYR3_AESKEY24, 24 .EQU AES_KEYR3_AESKEY23, 23 .EQU AES_KEYR3_AESKEY22, 22 .EQU AES_KEYR3_AESKEY21, 21 .EQU AES_KEYR3_AESKEY20, 20 .EQU AES_KEYR3_AESKEY19, 19 .EQU AES_KEYR3_AESKEY18, 18 .EQU AES_KEYR3_AESKEY17, 17 .EQU AES_KEYR3_AESKEY16, 16 .EQU AES_KEYR3_AESKEY15, 15 .EQU AES_KEYR3_AESKEY14, 14 .EQU AES_KEYR3_AESKEY13, 13 .EQU AES_KEYR3_AESKEY12, 12 .EQU AES_KEYR3_AESKEY11, 11 .EQU AES_KEYR3_AESKEY10, 10 .EQU AES_KEYR3_AESKEY9, 9 .EQU AES_KEYR3_AESKEY8, 8 .EQU AES_KEYR3_AESKEY7, 7 .EQU AES_KEYR3_AESKEY6, 6 .EQU AES_KEYR3_AESKEY5, 5 .EQU AES_KEYR3_AESKEY4, 4 .EQU AES_KEYR3_AESKEY3, 3 .EQU AES_KEYR3_AESKEY2, 2 .EQU AES_KEYR3_AESKEY1, 1 .EQU AES_KEYR3_AESKEY0, 0 // register------------------------------------- .EQU AES_KEYR4, 0x40002740 // 0x4000 2740 AES_KEYR4 Bits------------------------------------- .EQU AES_KEYR4_AESKEY31, 31 .EQU AES_KEYR4_AESKEY30, 30 .EQU AES_KEYR4_AESKEY29, 29 .EQU AES_KEYR4_AESKEY28, 28 .EQU AES_KEYR4_AESKEY27, 27 .EQU AES_KEYR4_AESKEY26, 26 .EQU AES_KEYR4_AESKEY25, 25 .EQU AES_KEYR4_AESKEY24, 24 .EQU AES_KEYR4_AESKEY23, 23 .EQU AES_KEYR4_AESKEY22, 22 .EQU AES_KEYR4_AESKEY21, 21 .EQU AES_KEYR4_AESKEY20, 20 .EQU AES_KEYR4_AESKEY19, 19 .EQU AES_KEYR4_AESKEY18, 18 .EQU AES_KEYR4_AESKEY17, 17 .EQU AES_KEYR4_AESKEY16, 16 .EQU AES_KEYR4_AESKEY15, 15 .EQU AES_KEYR4_AESKEY14, 14 .EQU AES_KEYR4_AESKEY13, 13 .EQU AES_KEYR4_AESKEY12, 12 .EQU AES_KEYR4_AESKEY11, 11 .EQU AES_KEYR4_AESKEY10, 10 .EQU AES_KEYR4_AESKEY9, 9 .EQU AES_KEYR4_AESKEY8, 8 .EQU AES_KEYR4_AESKEY7, 7 .EQU AES_KEYR4_AESKEY6, 6 .EQU AES_KEYR4_AESKEY5, 5 .EQU AES_KEYR4_AESKEY4, 4 .EQU AES_KEYR4_AESKEY3, 3 .EQU AES_KEYR4_AESKEY2, 2 .EQU AES_KEYR4_AESKEY1, 1 .EQU AES_KEYR4_AESKEY0, 0 // register------------------------------------- .EQU AES_KEYR5, 0x40002744 // 0x4000 2744 AES_KEYR5 Bits------------------------------------- .EQU AES_KEYR5_AESKEY31, 31 .EQU AES_KEYR5_AESKEY30, 30 .EQU AES_KEYR5_AESKEY29, 29 .EQU AES_KEYR5_AESKEY28, 28 .EQU AES_KEYR5_AESKEY27, 27 .EQU AES_KEYR5_AESKEY26, 26 .EQU AES_KEYR5_AESKEY25, 25 .EQU AES_KEYR5_AESKEY24, 24 .EQU AES_KEYR5_AESKEY23, 23 .EQU AES_KEYR5_AESKEY22, 22 .EQU AES_KEYR5_AESKEY21, 21 .EQU AES_KEYR5_AESKEY20, 20 .EQU AES_KEYR5_AESKEY19, 19 .EQU AES_KEYR5_AESKEY18, 18 .EQU AES_KEYR5_AESKEY17, 17 .EQU AES_KEYR5_AESKEY16, 16 .EQU AES_KEYR5_AESKEY15, 15 .EQU AES_KEYR5_AESKEY14, 14 .EQU AES_KEYR5_AESKEY13, 13 .EQU AES_KEYR5_AESKEY12, 12 .EQU AES_KEYR5_AESKEY11, 11 .EQU AES_KEYR5_AESKEY10, 10 .EQU AES_KEYR5_AESKEY9, 9 .EQU AES_KEYR5_AESKEY8, 8 .EQU AES_KEYR5_AESKEY7, 7 .EQU AES_KEYR5_AESKEY6, 6 .EQU AES_KEYR5_AESKEY5, 5 .EQU AES_KEYR5_AESKEY4, 4 .EQU AES_KEYR5_AESKEY3, 3 .EQU AES_KEYR5_AESKEY2, 2 .EQU AES_KEYR5_AESKEY1, 1 .EQU AES_KEYR5_AESKEY0, 0 // register------------------------------------- .EQU AES_KEYR6, 0x40002748 // 0x4000 2748 AES_KEYR6 Bits------------------------------------- .EQU AES_KEYR6_AESKEY31, 31 .EQU AES_KEYR6_AESKEY30, 30 .EQU AES_KEYR6_AESKEY29, 29 .EQU AES_KEYR6_AESKEY28, 28 .EQU AES_KEYR6_AESKEY27, 27 .EQU AES_KEYR6_AESKEY26, 26 .EQU AES_KEYR6_AESKEY25, 25 .EQU AES_KEYR6_AESKEY24, 24 .EQU AES_KEYR6_AESKEY23, 23 .EQU AES_KEYR6_AESKEY22, 22 .EQU AES_KEYR6_AESKEY21, 21 .EQU AES_KEYR6_AESKEY20, 20 .EQU AES_KEYR6_AESKEY19, 19 .EQU AES_KEYR6_AESKEY18, 18 .EQU AES_KEYR6_AESKEY17, 17 .EQU AES_KEYR6_AESKEY16, 16 .EQU AES_KEYR6_AESKEY15, 15 .EQU AES_KEYR6_AESKEY14, 14 .EQU AES_KEYR6_AESKEY13, 13 .EQU AES_KEYR6_AESKEY12, 12 .EQU AES_KEYR6_AESKEY11, 11 .EQU AES_KEYR6_AESKEY10, 10 .EQU AES_KEYR6_AESKEY9, 9 .EQU AES_KEYR6_AESKEY8, 8 .EQU AES_KEYR6_AESKEY7, 7 .EQU AES_KEYR6_AESKEY6, 6 .EQU AES_KEYR6_AESKEY5, 5 .EQU AES_KEYR6_AESKEY4, 4 .EQU AES_KEYR6_AESKEY3, 3 .EQU AES_KEYR6_AESKEY2, 2 .EQU AES_KEYR6_AESKEY1, 1 .EQU AES_KEYR6_AESKEY0, 0 // register------------------------------------- .EQU AES_KEYR7, 0x4000274C // 0x4000 274C AES_KEYR7 Bits------------------------------------- .EQU AES_KEYR7_AESKEY31, 31 .EQU AES_KEYR7_AESKEY30, 30 .EQU AES_KEYR7_AESKEY29, 29 .EQU AES_KEYR7_AESKEY28, 28 .EQU AES_KEYR7_AESKEY27, 27 .EQU AES_KEYR7_AESKEY26, 26 .EQU AES_KEYR7_AESKEY25, 25 .EQU AES_KEYR7_AESKEY24, 24 .EQU AES_KEYR7_AESKEY23, 23 .EQU AES_KEYR7_AESKEY22, 22 .EQU AES_KEYR7_AESKEY21, 21 .EQU AES_KEYR7_AESKEY20, 20 .EQU AES_KEYR7_AESKEY19, 19 .EQU AES_KEYR7_AESKEY18, 18 .EQU AES_KEYR7_AESKEY17, 17 .EQU AES_KEYR7_AESKEY16, 16 .EQU AES_KEYR7_AESKEY15, 15 .EQU AES_KEYR7_AESKEY14, 14 .EQU AES_KEYR7_AESKEY13, 13 .EQU AES_KEYR7_AESKEY12, 12 .EQU AES_KEYR7_AESKEY11, 11 .EQU AES_KEYR7_AESKEY10, 10 .EQU AES_KEYR7_AESKEY9, 9 .EQU AES_KEYR7_AESKEY8, 8 .EQU AES_KEYR7_AESKEY7, 7 .EQU AES_KEYR7_AESKEY6, 6 .EQU AES_KEYR7_AESKEY5, 5 .EQU AES_KEYR7_AESKEY4, 4 .EQU AES_KEYR7_AESKEY3, 3 .EQU AES_KEYR7_AESKEY2, 2 .EQU AES_KEYR7_AESKEY1, 1 .EQU AES_KEYR7_AESKEY0, 0 // register------------------------------------- .EQU AES_IVR0, 0x40002750 // 0x4000 2750 AES_IVR0 Bits------------------------------------- .EQU AES_IVR0_AESIVR0_31, 31 .EQU AES_IVR0_AESIVR0_30, 30 .EQU AES_IVR0_AESIVR0_29, 29 .EQU AES_IVR0_AESIVR0_28, 28 .EQU AES_IVR0_AESIVR0_27, 27 .EQU AES_IVR0_AESIVR0_26, 26 .EQU AES_IVR0_AESIVR0_25, 25 .EQU AES_IVR0_AESIVR0_24, 24 .EQU AES_IVR0_AESIVR0_23, 23 .EQU AES_IVR0_AESIVR0_22, 22 .EQU AES_IVR0_AESIVR0_21, 21 .EQU AES_IVR0_AESIVR0_20, 20 .EQU AES_IVR0_AESIVR0_19, 19 .EQU AES_IVR0_AESIVR0_18, 18 .EQU AES_IVR0_AESIVR0_17, 17 .EQU AES_IVR0_AESIVR0_16, 16 .EQU AES_IVR0_AESIVR0_15, 15 .EQU AES_IVR0_AESIVR0_14, 14 .EQU AES_IVR0_AESIVR0_13, 13 .EQU AES_IVR0_AESIVR0_12, 12 .EQU AES_IVR0_AESIVR0_11, 11 .EQU AES_IVR0_AESIVR0_10, 10 .EQU AES_IVR0_AESIVR0_9, 9 .EQU AES_IVR0_AESIVR0_8, 8 .EQU AES_IVR0_AESIVR0_7, 7 .EQU AES_IVR0_AESIVR0_6, 6 .EQU AES_IVR0_AESIVR0_5, 5 .EQU AES_IVR0_AESIVR0_4, 4 .EQU AES_IVR0_AESIVR0_3, 3 .EQU AES_IVR0_AESIVR0_2, 2 .EQU AES_IVR0_AESIVR0_1, 1 .EQU AES_IVR0_AESIVR0_0, 0 // register------------------------------------- .EQU AES_IVR1, 0x40002754 // 0x4000 2754 AES_IVR1 Bits------------------------------------- .EQU AES_IVR1_AESIVR1_31, 31 .EQU AES_IVR1_AESIVR1_30, 30 .EQU AES_IVR1_AESIVR1_29, 29 .EQU AES_IVR1_AESIVR1_28, 28 .EQU AES_IVR1_AESIVR1_27, 27 .EQU AES_IVR1_AESIVR1_26, 26 .EQU AES_IVR1_AESIVR1_25, 25 .EQU AES_IVR1_AESIVR1_24, 24 .EQU AES_IVR1_AESIVR1_23, 23 .EQU AES_IVR1_AESIVR1_22, 22 .EQU AES_IVR1_AESIVR1_21, 21 .EQU AES_IVR1_AESIVR1_20, 20 .EQU AES_IVR1_AESIVR1_19, 19 .EQU AES_IVR1_AESIVR1_18, 18 .EQU AES_IVR1_AESIVR1_17, 17 .EQU AES_IVR1_AESIVR1_16, 16 .EQU AES_IVR1_AESIVR1_15, 15 .EQU AES_IVR1_AESIVR1_14, 14 .EQU AES_IVR1_AESIVR1_13, 13 .EQU AES_IVR1_AESIVR1_12, 12 .EQU AES_IVR1_AESIVR1_11, 11 .EQU AES_IVR1_AESIVR1_10, 10 .EQU AES_IVR1_AESIVR1_9, 9 .EQU AES_IVR1_AESIVR1_8, 8 .EQU AES_IVR1_AESIVR1_7, 7 .EQU AES_IVR1_AESIVR1_6, 6 .EQU AES_IVR1_AESIVR1_5, 5 .EQU AES_IVR1_AESIVR1_4, 4 .EQU AES_IVR1_AESIVR1_3, 3 .EQU AES_IVR1_AESIVR1_2, 2 .EQU AES_IVR1_AESIVR1_1, 1 .EQU AES_IVR1_AESIVR1_0, 0 // register------------------------------------- .EQU AES_IVR2, 0x40002758 // 0x4000 2758 AES_IVR2 Bits------------------------------------- .EQU AES_IVR2_AESIVR2_31, 31 .EQU AES_IVR2_AESIVR2_30, 30 .EQU AES_IVR2_AESIVR2_29, 29 .EQU AES_IVR2_AESIVR2_28, 28 .EQU AES_IVR2_AESIVR2_27, 27 .EQU AES_IVR2_AESIVR2_26, 26 .EQU AES_IVR2_AESIVR2_25, 25 .EQU AES_IVR2_AESIVR2_24, 24 .EQU AES_IVR2_AESIVR2_23, 23 .EQU AES_IVR2_AESIVR2_22, 22 .EQU AES_IVR2_AESIVR2_21, 21 .EQU AES_IVR2_AESIVR2_20, 20 .EQU AES_IVR2_AESIVR2_19, 19 .EQU AES_IVR2_AESIVR2_18, 18 .EQU AES_IVR2_AESIVR2_17, 17 .EQU AES_IVR2_AESIVR2_16, 16 .EQU AES_IVR2_AESIVR2_15, 15 .EQU AES_IVR2_AESIVR2_14, 14 .EQU AES_IVR2_AESIVR2_13, 13 .EQU AES_IVR2_AESIVR2_12, 12 .EQU AES_IVR2_AESIVR2_11, 11 .EQU AES_IVR2_AESIVR2_10, 10 .EQU AES_IVR2_AESIVR2_9, 9 .EQU AES_IVR2_AESIVR2_8, 8 .EQU AES_IVR2_AESIVR2_7, 7 .EQU AES_IVR2_AESIVR2_6, 6 .EQU AES_IVR2_AESIVR2_5, 5 .EQU AES_IVR2_AESIVR2_4, 4 .EQU AES_IVR2_AESIVR2_3, 3 .EQU AES_IVR2_AESIVR2_2, 2 .EQU AES_IVR2_AESIVR2_1, 1 .EQU AES_IVR2_AESIVR2_0, 0 // register------------------------------------- .EQU AES_IVR3, 0x4000275C // 0x4000 275C AES_IVR3 Bits------------------------------------- .EQU AES_IVR3_AESIVR3_31, 31 .EQU AES_IVR3_AESIVR3_30, 30 .EQU AES_IVR3_AESIVR3_29, 29 .EQU AES_IVR3_AESIVR3_28, 28 .EQU AES_IVR3_AESIVR3_27, 27 .EQU AES_IVR3_AESIVR3_26, 26 .EQU AES_IVR3_AESIVR3_25, 25 .EQU AES_IVR3_AESIVR3_24, 24 .EQU AES_IVR3_AESIVR3_23, 23 .EQU AES_IVR3_AESIVR3_22, 22 .EQU AES_IVR3_AESIVR3_21, 21 .EQU AES_IVR3_AESIVR3_20, 20 .EQU AES_IVR3_AESIVR3_19, 19 .EQU AES_IVR3_AESIVR3_18, 18 .EQU AES_IVR3_AESIVR3_17, 17 .EQU AES_IVR3_AESIVR3_16, 16 .EQU AES_IVR3_AESIVR3_15, 15 .EQU AES_IVR3_AESIVR3_14, 14 .EQU AES_IVR3_AESIVR3_13, 13 .EQU AES_IVR3_AESIVR3_12, 12 .EQU AES_IVR3_AESIVR3_11, 11 .EQU AES_IVR3_AESIVR3_10, 10 .EQU AES_IVR3_AESIVR3_9, 9 .EQU AES_IVR3_AESIVR3_8, 8 .EQU AES_IVR3_AESIVR3_7, 7 .EQU AES_IVR3_AESIVR3_6, 6 .EQU AES_IVR3_AESIVR3_5, 5 .EQU AES_IVR3_AESIVR3_4, 4 .EQU AES_IVR3_AESIVR3_3, 3 .EQU AES_IVR3_AESIVR3_2, 2 .EQU AES_IVR3_AESIVR3_1, 1 .EQU AES_IVR3_AESIVR3_0, 0 // register------------------------------------- .EQU AES_SUSR0, 0x40002760 // 0x4000 2760 AES_SUSR0 Bits------------------------------------- .EQU AES_SUSR0_AESSUSR0_31, 31 .EQU AES_SUSR0_AESSUSR0_30, 30 .EQU AES_SUSR0_AESSUSR0_29, 29 .EQU AES_SUSR0_AESSUSR0_28, 28 .EQU AES_SUSR0_AESSUSR0_27, 27 .EQU AES_SUSR0_AESSUSR0_26, 26 .EQU AES_SUSR0_AESSUSR0_25, 25 .EQU AES_SUSR0_AESSUSR0_24, 24 .EQU AES_SUSR0_AESSUSR0_23, 23 .EQU AES_SUSR0_AESSUSR0_22, 22 .EQU AES_SUSR0_AESSUSR0_21, 21 .EQU AES_SUSR0_AESSUSR0_20, 20 .EQU AES_SUSR0_AESSUSR0_19, 19 .EQU AES_SUSR0_AESSUSR0_18, 18 .EQU AES_SUSR0_AESSUSR0_17, 17 .EQU AES_SUSR0_AESSUSR0_16, 16 .EQU AES_SUSR0_AESSUSR0_15, 15 .EQU AES_SUSR0_AESSUSR0_14, 14 .EQU AES_SUSR0_AESSUSR0_13, 13 .EQU AES_SUSR0_AESSUSR0_12, 12 .EQU AES_SUSR0_AESSUSR0_11, 11 .EQU AES_SUSR0_AESSUSR0_10, 10 .EQU AES_SUSR0_AESSUSR0_9, 9 .EQU AES_SUSR0_AESSUSR0_8, 8 .EQU AES_SUSR0_AESSUSR0_7, 7 .EQU AES_SUSR0_AESSUSR0_6, 6 .EQU AES_SUSR0_AESSUSR0_5, 5 .EQU AES_SUSR0_AESSUSR0_4, 4 .EQU AES_SUSR0_AESSUSR0_3, 3 .EQU AES_SUSR0_AESSUSR0_2, 2 .EQU AES_SUSR0_AESSUSR0_1, 1 .EQU AES_SUSR0_AESSUSR0_0, 0 // register------------------------------------- .EQU AES_SUSR1, 0x40002764 // 0x4000 2764 AES_SUSR1 Bits------------------------------------- .EQU AES_SUSR1_AESSUSR1_31, 31 .EQU AES_SUSR1_AESSUSR1_30, 30 .EQU AES_SUSR1_AESSUSR1_29, 29 .EQU AES_SUSR1_AESSUSR1_28, 28 .EQU AES_SUSR1_AESSUSR1_27, 27 .EQU AES_SUSR1_AESSUSR1_26, 26 .EQU AES_SUSR1_AESSUSR1_25, 25 .EQU AES_SUSR1_AESSUSR1_24, 24 .EQU AES_SUSR1_AESSUSR1_23, 23 .EQU AES_SUSR1_AESSUSR1_22, 22 .EQU AES_SUSR1_AESSUSR1_21, 21 .EQU AES_SUSR1_AESSUSR1_20, 20 .EQU AES_SUSR1_AESSUSR1_19, 19 .EQU AES_SUSR1_AESSUSR1_18, 18 .EQU AES_SUSR1_AESSUSR1_17, 17 .EQU AES_SUSR1_AESSUSR1_16, 16 .EQU AES_SUSR1_AESSUSR1_15, 15 .EQU AES_SUSR1_AESSUSR1_14, 14 .EQU AES_SUSR1_AESSUSR1_13, 13 .EQU AES_SUSR1_AESSUSR1_12, 12 .EQU AES_SUSR1_AESSUSR1_11, 11 .EQU AES_SUSR1_AESSUSR1_10, 10 .EQU AES_SUSR1_AESSUSR1_9, 9 .EQU AES_SUSR1_AESSUSR1_8, 8 .EQU AES_SUSR1_AESSUSR1_7, 7 .EQU AES_SUSR1_AESSUSR1_6, 6 .EQU AES_SUSR1_AESSUSR1_5, 5 .EQU AES_SUSR1_AESSUSR1_4, 4 .EQU AES_SUSR1_AESSUSR1_3, 3 .EQU AES_SUSR1_AESSUSR1_2, 2 .EQU AES_SUSR1_AESSUSR1_1, 1 .EQU AES_SUSR1_AESSUSR1_0, 0 // register------------------------------------- .EQU AES_SUSR2, 0x40002768 // 0x4000 2768 AES_SUSR2 Bits------------------------------------- .EQU AES_SUSR2_AESSUSR2_31, 31 .EQU AES_SUSR2_AESSUSR2_30, 30 .EQU AES_SUSR2_AESSUSR2_29, 29 .EQU AES_SUSR2_AESSUSR2_28, 28 .EQU AES_SUSR2_AESSUSR2_27, 27 .EQU AES_SUSR2_AESSUSR2_26, 26 .EQU AES_SUSR2_AESSUSR2_25, 25 .EQU AES_SUSR2_AESSUSR2_24, 24 .EQU AES_SUSR2_AESSUSR2_23, 23 .EQU AES_SUSR2_AESSUSR2_22, 22 .EQU AES_SUSR2_AESSUSR2_21, 21 .EQU AES_SUSR2_AESSUSR2_20, 20 .EQU AES_SUSR2_AESSUSR2_19, 19 .EQU AES_SUSR2_AESSUSR2_18, 18 .EQU AES_SUSR2_AESSUSR2_17, 17 .EQU AES_SUSR2_AESSUSR2_16, 16 .EQU AES_SUSR2_AESSUSR2_15, 15 .EQU AES_SUSR2_AESSUSR2_14, 14 .EQU AES_SUSR2_AESSUSR2_13, 13 .EQU AES_SUSR2_AESSUSR2_12, 12 .EQU AES_SUSR2_AESSUSR2_11, 11 .EQU AES_SUSR2_AESSUSR2_10, 10 .EQU AES_SUSR2_AESSUSR2_9, 9 .EQU AES_SUSR2_AESSUSR2_8, 8 .EQU AES_SUSR2_AESSUSR2_7, 7 .EQU AES_SUSR2_AESSUSR2_6, 6 .EQU AES_SUSR2_AESSUSR2_5, 5 .EQU AES_SUSR2_AESSUSR2_4, 4 .EQU AES_SUSR2_AESSUSR2_3, 3 .EQU AES_SUSR2_AESSUSR2_2, 2 .EQU AES_SUSR2_AESSUSR2_1, 1 .EQU AES_SUSR2_AESSUSR2_0, 0 // register------------------------------------- .EQU AES_SUSR3, 0x4000276C // 0x4000 276C AES_SUSR3 Bits------------------------------------- .EQU AES_SUSR3_AESSUSR3_31, 31 .EQU AES_SUSR3_AESSUSR3_30, 30 .EQU AES_SUSR3_AESSUSR3_29, 29 .EQU AES_SUSR3_AESSUSR3_28, 28 .EQU AES_SUSR3_AESSUSR3_27, 27 .EQU AES_SUSR3_AESSUSR3_26, 26 .EQU AES_SUSR3_AESSUSR3_25, 25 .EQU AES_SUSR3_AESSUSR3_24, 24 .EQU AES_SUSR3_AESSUSR3_23, 23 .EQU AES_SUSR3_AESSUSR3_22, 22 .EQU AES_SUSR3_AESSUSR3_21, 21 .EQU AES_SUSR3_AESSUSR3_20, 20 .EQU AES_SUSR3_AESSUSR3_19, 19 .EQU AES_SUSR3_AESSUSR3_18, 18 .EQU AES_SUSR3_AESSUSR3_17, 17 .EQU AES_SUSR3_AESSUSR3_16, 16 .EQU AES_SUSR3_AESSUSR3_15, 15 .EQU AES_SUSR3_AESSUSR3_14, 14 .EQU AES_SUSR3_AESSUSR3_13, 13 .EQU AES_SUSR3_AESSUSR3_12, 12 .EQU AES_SUSR3_AESSUSR3_11, 11 .EQU AES_SUSR3_AESSUSR3_10, 10 .EQU AES_SUSR3_AESSUSR3_9, 9 .EQU AES_SUSR3_AESSUSR3_8, 8 .EQU AES_SUSR3_AESSUSR3_7, 7 .EQU AES_SUSR3_AESSUSR3_6, 6 .EQU AES_SUSR3_AESSUSR3_5, 5 .EQU AES_SUSR3_AESSUSR3_4, 4 .EQU AES_SUSR3_AESSUSR3_3, 3 .EQU AES_SUSR3_AESSUSR3_2, 2 .EQU AES_SUSR3_AESSUSR3_1, 1 .EQU AES_SUSR3_AESSUSR3_0, 0 // register------------------------------------- .EQU AES_SUSR4, 0x40002770 // 0x4000 2770 AES_SUSR4 Bits------------------------------------- .EQU AES_SUSR4_AESSUSR3_31, 31 .EQU AES_SUSR4_AESSUSR3_30, 30 .EQU AES_SUSR4_AESSUSR3_29, 29 .EQU AES_SUSR4_AESSUSR3_28, 28 .EQU AES_SUSR4_AESSUSR3_27, 27 .EQU AES_SUSR4_AESSUSR3_26, 26 .EQU AES_SUSR4_AESSUSR3_25, 25 .EQU AES_SUSR4_AESSUSR3_24, 24 .EQU AES_SUSR4_AESSUSR3_23, 23 .EQU AES_SUSR4_AESSUSR3_22, 22 .EQU AES_SUSR4_AESSUSR3_21, 21 .EQU AES_SUSR4_AESSUSR3_20, 20 .EQU AES_SUSR4_AESSUSR3_19, 19 .EQU AES_SUSR4_AESSUSR3_18, 18 .EQU AES_SUSR4_AESSUSR3_17, 17 .EQU AES_SUSR4_AESSUSR3_16, 16 .EQU AES_SUSR4_AESSUSR3_15, 15 .EQU AES_SUSR4_AESSUSR3_14, 14 .EQU AES_SUSR4_AESSUSR3_13, 13 .EQU AES_SUSR4_AESSUSR3_12, 12 .EQU AES_SUSR4_AESSUSR3_11, 11 .EQU AES_SUSR4_AESSUSR3_10, 10 .EQU AES_SUSR4_AESSUSR3_9, 9 .EQU AES_SUSR4_AESSUSR3_8, 8 .EQU AES_SUSR4_AESSUSR3_7, 7 .EQU AES_SUSR4_AESSUSR3_6, 6 .EQU AES_SUSR4_AESSUSR3_5, 5 .EQU AES_SUSR4_AESSUSR3_4, 4 .EQU AES_SUSR4_AESSUSR3_3, 3 .EQU AES_SUSR4_AESSUSR3_2, 2 .EQU AES_SUSR4_AESSUSR3_1, 1 .EQU AES_SUSR4_AESSUSR3_0, 0 // register------------------------------------- .EQU AES_SUSR5, 0x40002774 // 0x4000 2774 AES_SUSR5 Bits------------------------------------- .EQU AES_SUSR5_AESSUSR3_31, 31 .EQU AES_SUSR5_AESSUSR3_30, 30 .EQU AES_SUSR5_AESSUSR3_29, 29 .EQU AES_SUSR5_AESSUSR3_28, 28 .EQU AES_SUSR5_AESSUSR3_27, 27 .EQU AES_SUSR5_AESSUSR3_26, 26 .EQU AES_SUSR5_AESSUSR3_25, 25 .EQU AES_SUSR5_AESSUSR3_24, 24 .EQU AES_SUSR5_AESSUSR3_23, 23 .EQU AES_SUSR5_AESSUSR3_22, 22 .EQU AES_SUSR5_AESSUSR3_21, 21 .EQU AES_SUSR5_AESSUSR3_20, 20 .EQU AES_SUSR5_AESSUSR3_19, 19 .EQU AES_SUSR5_AESSUSR3_18, 18 .EQU AES_SUSR5_AESSUSR3_17, 17 .EQU AES_SUSR5_AESSUSR3_16, 16 .EQU AES_SUSR5_AESSUSR3_15, 15 .EQU AES_SUSR5_AESSUSR3_14, 14 .EQU AES_SUSR5_AESSUSR3_13, 13 .EQU AES_SUSR5_AESSUSR3_12, 12 .EQU AES_SUSR5_AESSUSR3_11, 11 .EQU AES_SUSR5_AESSUSR3_10, 10 .EQU AES_SUSR5_AESSUSR3_9, 9 .EQU AES_SUSR5_AESSUSR3_8, 8 .EQU AES_SUSR5_AESSUSR3_7, 7 .EQU AES_SUSR5_AESSUSR3_6, 6 .EQU AES_SUSR5_AESSUSR3_5, 5 .EQU AES_SUSR5_AESSUSR3_4, 4 .EQU AES_SUSR5_AESSUSR3_3, 3 .EQU AES_SUSR5_AESSUSR3_2, 2 .EQU AES_SUSR5_AESSUSR3_1, 1 .EQU AES_SUSR5_AESSUSR3_0, 0 // register------------------------------------- .EQU AES_SUSR6, 0x40002778 // 0x4000 2778 AES_SUSR6 Bits------------------------------------- .EQU AES_SUSR6_AESSUSR3_31, 31 .EQU AES_SUSR6_AESSUSR3_30, 30 .EQU AES_SUSR6_AESSUSR3_29, 29 .EQU AES_SUSR6_AESSUSR3_28, 28 .EQU AES_SUSR6_AESSUSR3_27, 27 .EQU AES_SUSR6_AESSUSR3_26, 26 .EQU AES_SUSR6_AESSUSR3_25, 25 .EQU AES_SUSR6_AESSUSR3_24, 24 .EQU AES_SUSR6_AESSUSR3_23, 23 .EQU AES_SUSR6_AESSUSR3_22, 22 .EQU AES_SUSR6_AESSUSR3_21, 21 .EQU AES_SUSR6_AESSUSR3_20, 20 .EQU AES_SUSR6_AESSUSR3_19, 19 .EQU AES_SUSR6_AESSUSR3_18, 18 .EQU AES_SUSR6_AESSUSR3_17, 17 .EQU AES_SUSR6_AESSUSR3_16, 16 .EQU AES_SUSR6_AESSUSR3_15, 15 .EQU AES_SUSR6_AESSUSR3_14, 14 .EQU AES_SUSR6_AESSUSR3_13, 13 .EQU AES_SUSR6_AESSUSR3_12, 12 .EQU AES_SUSR6_AESSUSR3_11, 11 .EQU AES_SUSR6_AESSUSR3_10, 10 .EQU AES_SUSR6_AESSUSR3_9, 9 .EQU AES_SUSR6_AESSUSR3_8, 8 .EQU AES_SUSR6_AESSUSR3_7, 7 .EQU AES_SUSR6_AESSUSR3_6, 6 .EQU AES_SUSR6_AESSUSR3_5, 5 .EQU AES_SUSR6_AESSUSR3_4, 4 .EQU AES_SUSR6_AESSUSR3_3, 3 .EQU AES_SUSR6_AESSUSR3_2, 2 .EQU AES_SUSR6_AESSUSR3_1, 1 .EQU AES_SUSR6_AESSUSR3_0, 0 // register------------------------------------- .EQU AES_SUSR7, 0x4000277C // 0x4000 277C AES_SUSR7 Bits------------------------------------- .EQU AES_SUSR7_AESSUSR3_31, 31 .EQU AES_SUSR7_AESSUSR3_30, 30 .EQU AES_SUSR7_AESSUSR3_29, 29 .EQU AES_SUSR7_AESSUSR3_28, 28 .EQU AES_SUSR7_AESSUSR3_27, 27 .EQU AES_SUSR7_AESSUSR3_26, 26 .EQU AES_SUSR7_AESSUSR3_25, 25 .EQU AES_SUSR7_AESSUSR3_24, 24 .EQU AES_SUSR7_AESSUSR3_23, 23 .EQU AES_SUSR7_AESSUSR3_22, 22 .EQU AES_SUSR7_AESSUSR3_21, 21 .EQU AES_SUSR7_AESSUSR3_20, 20 .EQU AES_SUSR7_AESSUSR3_19, 19 .EQU AES_SUSR7_AESSUSR3_18, 18 .EQU AES_SUSR7_AESSUSR3_17, 17 .EQU AES_SUSR7_AESSUSR3_16, 16 .EQU AES_SUSR7_AESSUSR3_15, 15 .EQU AES_SUSR7_AESSUSR3_14, 14 .EQU AES_SUSR7_AESSUSR3_13, 13 .EQU AES_SUSR7_AESSUSR3_12, 12 .EQU AES_SUSR7_AESSUSR3_11, 11 .EQU AES_SUSR7_AESSUSR3_10, 10 .EQU AES_SUSR7_AESSUSR3_9, 9 .EQU AES_SUSR7_AESSUSR3_8, 8 .EQU AES_SUSR7_AESSUSR3_7, 7 .EQU AES_SUSR7_AESSUSR3_6, 6 .EQU AES_SUSR7_AESSUSR3_5, 5 .EQU AES_SUSR7_AESSUSR3_4, 4 .EQU AES_SUSR7_AESSUSR3_3, 3 .EQU AES_SUSR7_AESSUSR3_2, 2 .EQU AES_SUSR7_AESSUSR3_1, 1 .EQU AES_SUSR7_AESSUSR3_0, 0 // register------------------------------------- .EQU AES_MASK0, 0x40002780 // 0x4000 2780 AES_MASK0 Bits------------------------------------- .EQU AES_MASK0_AESMASK0_31, 31 .EQU AES_MASK0_AESMASK0_30, 30 .EQU AES_MASK0_AESMASK0_29, 29 .EQU AES_MASK0_AESMASK0_28, 28 .EQU AES_MASK0_AESMASK0_27, 27 .EQU AES_MASK0_AESMASK0_26, 26 .EQU AES_MASK0_AESMASK0_25, 25 .EQU AES_MASK0_AESMASK0_24, 24 .EQU AES_MASK0_AESMASK0_23, 23 .EQU AES_MASK0_AESMASK0_22, 22 .EQU AES_MASK0_AESMASK0_21, 21 .EQU AES_MASK0_AESMASK0_20, 20 .EQU AES_MASK0_AESMASK0_19, 19 .EQU AES_MASK0_AESMASK0_18, 18 .EQU AES_MASK0_AESMASK0_17, 17 .EQU AES_MASK0_AESMASK0_16, 16 .EQU AES_MASK0_AESMASK0_15, 15 .EQU AES_MASK0_AESMASK0_14, 14 .EQU AES_MASK0_AESMASK0_13, 13 .EQU AES_MASK0_AESMASK0_12, 12 .EQU AES_MASK0_AESMASK0_11, 11 .EQU AES_MASK0_AESMASK0_10, 10 .EQU AES_MASK0_AESMASK0_9, 9 .EQU AES_MASK0_AESMASK0_8, 8 .EQU AES_MASK0_AESMASK0_7, 7 .EQU AES_MASK0_AESMASK0_6, 6 .EQU AES_MASK0_AESMASK0_5, 5 .EQU AES_MASK0_AESMASK0_4, 4 .EQU AES_MASK0_AESMASK0_3, 3 .EQU AES_MASK0_AESMASK0_2, 2 .EQU AES_MASK0_AESMASK0_1, 1 .EQU AES_MASK0_AESMASK0_0, 0 // register------------------------------------- .EQU AES_MASK1, 0x40002784 // 0x4000 2784 AES_MASK1 Bits------------------------------------- .EQU AES_MASK1_AESMASK1_31, 31 .EQU AES_MASK1_AESMASK1_30, 30 .EQU AES_MASK1_AESMASK1_29, 29 .EQU AES_MASK1_AESMASK1_28, 28 .EQU AES_MASK1_AESMASK1_27, 27 .EQU AES_MASK1_AESMASK1_26, 26 .EQU AES_MASK1_AESMASK1_25, 25 .EQU AES_MASK1_AESMASK1_24, 24 .EQU AES_MASK1_AESMASK1_23, 23 .EQU AES_MASK1_AESMASK1_22, 22 .EQU AES_MASK1_AESMASK1_21, 21 .EQU AES_MASK1_AESMASK1_20, 20 .EQU AES_MASK1_AESMASK1_19, 19 .EQU AES_MASK1_AESMASK1_18, 18 .EQU AES_MASK1_AESMASK1_17, 17 .EQU AES_MASK1_AESMASK1_16, 16 .EQU AES_MASK1_AESMASK1_15, 15 .EQU AES_MASK1_AESMASK1_14, 14 .EQU AES_MASK1_AESMASK1_13, 13 .EQU AES_MASK1_AESMASK1_12, 12 .EQU AES_MASK1_AESMASK1_11, 11 .EQU AES_MASK1_AESMASK1_10, 10 .EQU AES_MASK1_AESMASK1_9, 9 .EQU AES_MASK1_AESMASK1_8, 8 .EQU AES_MASK1_AESMASK1_7, 7 .EQU AES_MASK1_AESMASK1_6, 6 .EQU AES_MASK1_AESMASK1_5, 5 .EQU AES_MASK1_AESMASK1_4, 4 .EQU AES_MASK1_AESMASK1_3, 3 .EQU AES_MASK1_AESMASK1_2, 2 .EQU AES_MASK1_AESMASK1_1, 1 .EQU AES_MASK1_AESMASK1_0, 0 // register------------------------------------- .EQU AES_MASK2, 0x40002788 // 0x4000 2788 AES_MASK2 Bits------------------------------------- .EQU AES_MASK2_AESMASK2_31, 31 .EQU AES_MASK2_AESMASK2_30, 30 .EQU AES_MASK2_AESMASK2_29, 29 .EQU AES_MASK2_AESMASK2_28, 28 .EQU AES_MASK2_AESMASK2_27, 27 .EQU AES_MASK2_AESMASK2_26, 26 .EQU AES_MASK2_AESMASK2_25, 25 .EQU AES_MASK2_AESMASK2_24, 24 .EQU AES_MASK2_AESMASK2_23, 23 .EQU AES_MASK2_AESMASK2_22, 22 .EQU AES_MASK2_AESMASK2_21, 21 .EQU AES_MASK2_AESMASK2_20, 20 .EQU AES_MASK2_AESMASK2_19, 19 .EQU AES_MASK2_AESMASK2_18, 18 .EQU AES_MASK2_AESMASK2_17, 17 .EQU AES_MASK2_AESMASK2_16, 16 .EQU AES_MASK2_AESMASK2_15, 15 .EQU AES_MASK2_AESMASK2_14, 14 .EQU AES_MASK2_AESMASK2_13, 13 .EQU AES_MASK2_AESMASK2_12, 12 .EQU AES_MASK2_AESMASK2_11, 11 .EQU AES_MASK2_AESMASK2_10, 10 .EQU AES_MASK2_AESMASK2_9, 9 .EQU AES_MASK2_AESMASK2_8, 8 .EQU AES_MASK2_AESMASK2_7, 7 .EQU AES_MASK2_AESMASK2_6, 6 .EQU AES_MASK2_AESMASK2_5, 5 .EQU AES_MASK2_AESMASK2_4, 4 .EQU AES_MASK2_AESMASK2_3, 3 .EQU AES_MASK2_AESMASK2_2, 2 .EQU AES_MASK2_AESMASK2_1, 1 .EQU AES_MASK2_AESMASK2_0, 0 // register------------------------------------- .EQU AES_MASK3, 0x4000278C // 0x4000 278C AES_MASK3 Bits------------------------------------- .EQU AES_MASK3_AESMASK3_31, 31 .EQU AES_MASK3_AESMASK3_30, 30 .EQU AES_MASK3_AESMASK3_29, 29 .EQU AES_MASK3_AESMASK3_28, 28 .EQU AES_MASK3_AESMASK3_27, 27 .EQU AES_MASK3_AESMASK3_26, 26 .EQU AES_MASK3_AESMASK3_25, 25 .EQU AES_MASK3_AESMASK3_24, 24 .EQU AES_MASK3_AESMASK3_23, 23 .EQU AES_MASK3_AESMASK3_22, 22 .EQU AES_MASK3_AESMASK3_21, 21 .EQU AES_MASK3_AESMASK3_20, 20 .EQU AES_MASK3_AESMASK3_19, 19 .EQU AES_MASK3_AESMASK3_18, 18 .EQU AES_MASK3_AESMASK3_17, 17 .EQU AES_MASK3_AESMASK3_16, 16 .EQU AES_MASK3_AESMASK3_15, 15 .EQU AES_MASK3_AESMASK3_14, 14 .EQU AES_MASK3_AESMASK3_13, 13 .EQU AES_MASK3_AESMASK3_12, 12 .EQU AES_MASK3_AESMASK3_11, 11 .EQU AES_MASK3_AESMASK3_10, 10 .EQU AES_MASK3_AESMASK3_9, 9 .EQU AES_MASK3_AESMASK3_8, 8 .EQU AES_MASK3_AESMASK3_7, 7 .EQU AES_MASK3_AESMASK3_6, 6 .EQU AES_MASK3_AESMASK3_5, 5 .EQU AES_MASK3_AESMASK3_4, 4 .EQU AES_MASK3_AESMASK3_3, 3 .EQU AES_MASK3_AESMASK3_2, 2 .EQU AES_MASK3_AESMASK3_1, 1 .EQU AES_MASK3_AESMASK3_0, 0 // register------------------------------------- .EQU EXMC_SRAM, 0x40002800 // 0x4000 2800 EXMC_SRAM Bits------------------------------------- .EQU EXMC_SRAM_NBLPOL, 21 .EQU EXMC_SRAM_NBLEN, 20 .EQU EXMC_SRAM_SYNEN, 19 .EQU EXMC_SRAM_SYNW, 17 .EQU EXMC_SRAM_SYNR, 16 .EQU EXMC_SRAM_AWAITEN, 11 .EQU EXMC_SRAM_SWAITEN, 10 .EQU EXMC_SRAM_SYNWAITCTL, 9 .EQU EXMC_SRAM_WAITPOL, 8 .EQU EXMC_SRAM_ADVEN, 7 .EQU EXMC_SRAM_IOREUSE, 6 .EQU EXMC_SRAM_PHYWID1, 3 .EQU EXMC_SRAM_PHYWID0, 2 .EQU EXMC_SRAM_SRAMEN, 0 // register------------------------------------- .EQU EXMC_RT, 0x40002804 // 0x4000 2804 EXMC_RT Bits------------------------------------- .EQU EXMC_RT_RADDRSETTIME7, 31 .EQU EXMC_RT_RADDRSETTIME6, 30 .EQU EXMC_RT_RADDRSETTIME5, 29 .EQU EXMC_RT_RADDRSETTIME4, 28 .EQU EXMC_RT_RADDRSETTIME3, 27 .EQU EXMC_RT_RADDRSETTIME2, 26 .EQU EXMC_RT_RADDRSETTIME1, 25 .EQU EXMC_RT_RADDRSETTIME0, 24 .EQU EXMC_RT_RADDRHOLDTIME7, 23 .EQU EXMC_RT_RADDRHOLDTIME6, 22 .EQU EXMC_RT_RADDRHOLDTIME5, 21 .EQU EXMC_RT_RADDRHOLDTIME4, 20 .EQU EXMC_RT_RADDRHOLDTIME3, 19 .EQU EXMC_RT_RADDRHOLDTIME2, 18 .EQU EXMC_RT_RADDRHOLDTIME1, 17 .EQU EXMC_RT_RADDRHOLDTIME0, 16 .EQU EXMC_RT_RDATSETTIME7, 15 .EQU EXMC_RT_RDATSETTIME6, 14 .EQU EXMC_RT_RDATSETTIME5, 13 .EQU EXMC_RT_RDATSETTIME4, 12 .EQU EXMC_RT_RDATSETTIME3, 11 .EQU EXMC_RT_RDATSETTIME2, 10 .EQU EXMC_RT_RDATSETTIME1, 9 .EQU EXMC_RT_RDATSETTIME0, 8 .EQU EXMC_RT_RDATHOLDTIME7, 7 .EQU EXMC_RT_RDATHOLDTIME6, 6 .EQU EXMC_RT_RDATHOLDTIME5, 5 .EQU EXMC_RT_RDATHOLDTIME4, 4 .EQU EXMC_RT_RDATHOLDTIME3, 3 .EQU EXMC_RT_RDATHOLDTIME2, 2 .EQU EXMC_RT_RDATHOLDTIME1, 1 .EQU EXMC_RT_RDATHOLDTIME0, 0 // register------------------------------------- .EQU EXMC_WT, 0x40002808 // 0x4000 2808 EXMC_WT Bits------------------------------------- .EQU EXMC_WT_WADDRSETTIME7, 31 .EQU EXMC_WT_WADDRSETTIME6, 30 .EQU EXMC_WT_WADDRSETTIME5, 29 .EQU EXMC_WT_WADDRSETTIME4, 28 .EQU EXMC_WT_WADDRSETTIME3, 27 .EQU EXMC_WT_WADDRSETTIME2, 26 .EQU EXMC_WT_WADDRSETTIME1, 25 .EQU EXMC_WT_WADDRSETTIME0, 24 .EQU EXMC_WT_WADDRHOLDTIME7, 23 .EQU EXMC_WT_WADDRHOLDTIME6, 22 .EQU EXMC_WT_WADDRHOLDTIME5, 21 .EQU EXMC_WT_WADDRHOLDTIME4, 20 .EQU EXMC_WT_WADDRHOLDTIME3, 19 .EQU EXMC_WT_WADDRHOLDTIME2, 18 .EQU EXMC_WT_WADDRHOLDTIME1, 17 .EQU EXMC_WT_WADDRHOLDTIME0, 16 .EQU EXMC_WT_WDATSETTIME7, 15 .EQU EXMC_WT_WDATSETTIME6, 14 .EQU EXMC_WT_WDATSETTIME5, 13 .EQU EXMC_WT_WDATSETTIME4, 12 .EQU EXMC_WT_WDATSETTIME3, 11 .EQU EXMC_WT_WDATSETTIME2, 10 .EQU EXMC_WT_WDATSETTIME1, 9 .EQU EXMC_WT_WDATSETTIME0, 8 .EQU EXMC_WT_WDATHOLDTIME7, 7 .EQU EXMC_WT_WDATHOLDTIME6, 6 .EQU EXMC_WT_WDATHOLDTIME5, 5 .EQU EXMC_WT_WDATHOLDTIME4, 4 .EQU EXMC_WT_WDATHOLDTIME3, 3 .EQU EXMC_WT_WDATHOLDTIME2, 2 .EQU EXMC_WT_WDATHOLDTIME1, 1 .EQU EXMC_WT_WDATHOLDTIME0, 0 // register------------------------------------- .EQU EXMC_TRAN, 0x4000280C // 0x4000 280C EXMC_TRAN Bits------------------------------------- .EQU EXMC_TRAN_NAVLD3, 11 .EQU EXMC_TRAN_NAVLD2, 10 .EQU EXMC_TRAN_NAVLD1, 9 .EQU EXMC_TRAN_NAVLD0, 8 .EQU EXMC_TRAN_NEW3, 7 .EQU EXMC_TRAN_NEW2, 6 .EQU EXMC_TRAN_NEW1, 5 .EQU EXMC_TRAN_NEW0, 4 .EQU EXMC_TRAN_NOE3, 3 .EQU EXMC_TRAN_NOE2, 2 .EQU EXMC_TRAN_NOE1, 1 .EQU EXMC_TRAN_NOE0, 0 // register------------------------------------- .EQU EXMC_BUSTURN, 0x40002810 // 0x4000 2810 EXMC_BUSTURN Bits------------------------------------- .EQU EXMC_BUSTURN_WBUSTURN3, 7 .EQU EXMC_BUSTURN_WBUSTURN2, 6 .EQU EXMC_BUSTURN_WBUSTURN1, 5 .EQU EXMC_BUSTURN_WBUSTURN0, 4 .EQU EXMC_BUSTURN_RBUSTURN3, 3 .EQU EXMC_BUSTURN_RBUSTURN2, 2 .EQU EXMC_BUSTURN_RBUSTURN1, 1 .EQU EXMC_BUSTURN_RBUSTURN0, 0 // register------------------------------------- .EQU EXMC_SYN, 0x40002814 // 0x4000 2814 EXMC_SYN Bits------------------------------------- .EQU EXMC_SYN_DATLAT3, 7 .EQU EXMC_SYN_DATLAT2, 6 .EQU EXMC_SYN_DATLAT1, 5 .EQU EXMC_SYN_DATLAT0, 4 .EQU EXMC_SYN_SYNCLKDIV3, 3 .EQU EXMC_SYN_SYNCLKDIV2, 2 .EQU EXMC_SYN_SYNCLKDIV1, 1 .EQU EXMC_SYN_SYNCLKDIV0, 0 // register------------------------------------- .EQU EXMC_NAND, 0x40002818 // 0x4000 2818 EXMC_NAND Bits------------------------------------- .EQU EXMC_NAND_CSE, 20 .EQU EXMC_NAND_TAR3, 19 .EQU EXMC_NAND_TAR2, 18 .EQU EXMC_NAND_TAR1, 17 .EQU EXMC_NAND_TAR0, 16 .EQU EXMC_NAND_TCLR3, 15 .EQU EXMC_NAND_TCLR2, 14 .EQU EXMC_NAND_TCLR1, 13 .EQU EXMC_NAND_TCLR0, 12 .EQU EXMC_NAND_PWID1, 11 .EQU EXMC_NAND_PWID0, 10 .EQU EXMC_NAND_PTYP, 9 .EQU EXMC_NAND_PBKEN, 8 .EQU EXMC_NAND_PWAIT, 7 .EQU EXMC_NAND_POLC5, 5 .EQU EXMC_NAND_POLC4, 4 .EQU EXMC_NAND_POLC3, 3 .EQU EXMC_NAND_POLC2, 2 .EQU EXMC_NAND_POLC1, 1 .EQU EXMC_NAND_POLC0, 0 // register------------------------------------- .EQU EXMC_NANDMEM, 0x4000281C // 0x4000 281C EXMC_NANDMEM Bits------------------------------------- .EQU EXMC_NANDMEM_MEMSET7, 31 .EQU EXMC_NANDMEM_MEMSET6, 30 .EQU EXMC_NANDMEM_MEMSET5, 29 .EQU EXMC_NANDMEM_MEMSET4, 28 .EQU EXMC_NANDMEM_MEMSET3, 27 .EQU EXMC_NANDMEM_MEMSET2, 26 .EQU EXMC_NANDMEM_MEMSET1, 25 .EQU EXMC_NANDMEM_MEMSET0, 24 .EQU EXMC_NANDMEM_MEMWAIT7, 23 .EQU EXMC_NANDMEM_MEMWAIT6, 22 .EQU EXMC_NANDMEM_MEMWAIT5, 21 .EQU EXMC_NANDMEM_MEMWAIT4, 20 .EQU EXMC_NANDMEM_MEMWAIT3, 19 .EQU EXMC_NANDMEM_MEMWAIT2, 18 .EQU EXMC_NANDMEM_MEMWAIT1, 17 .EQU EXMC_NANDMEM_MEMWAIT0, 16 .EQU EXMC_NANDMEM_MEMHOLD7, 15 .EQU EXMC_NANDMEM_MEMHOLD6, 14 .EQU EXMC_NANDMEM_MEMHOLD5, 13 .EQU EXMC_NANDMEM_MEMHOLD4, 12 .EQU EXMC_NANDMEM_MEMHOLD3, 11 .EQU EXMC_NANDMEM_MEMHOLD2, 10 .EQU EXMC_NANDMEM_MEMHOLD1, 9 .EQU EXMC_NANDMEM_MEMHOLD0, 8 .EQU EXMC_NANDMEM_MEMHIZ7, 7 .EQU EXMC_NANDMEM_MEMHIZ6, 6 .EQU EXMC_NANDMEM_MEMHIZ5, 5 .EQU EXMC_NANDMEM_MEMHIZ4, 4 .EQU EXMC_NANDMEM_MEMHIZ3, 3 .EQU EXMC_NANDMEM_MEMHIZ2, 2 .EQU EXMC_NANDMEM_MEMHIZ1, 1 .EQU EXMC_NANDMEM_MEMHIZ0, 0 // register------------------------------------- .EQU EXMC_NANDPATT, 0x40002820 // 0x4000 2820 EXMC_NANDPATT Bits------------------------------------- .EQU EXMC_NANDPATT_PATTSET7, 31 .EQU EXMC_NANDPATT_PATTSET6, 30 .EQU EXMC_NANDPATT_PATTSET5, 29 .EQU EXMC_NANDPATT_PATTSET4, 28 .EQU EXMC_NANDPATT_PATTSET3, 27 .EQU EXMC_NANDPATT_PATTSET2, 26 .EQU EXMC_NANDPATT_PATTSET1, 25 .EQU EXMC_NANDPATT_PATTSET0, 24 .EQU EXMC_NANDPATT_PATTWAIT7, 23 .EQU EXMC_NANDPATT_PATTWAIT6, 22 .EQU EXMC_NANDPATT_PATTWAIT5, 21 .EQU EXMC_NANDPATT_PATTWAIT4, 20 .EQU EXMC_NANDPATT_PATTWAIT3, 19 .EQU EXMC_NANDPATT_PATTWAIT2, 18 .EQU EXMC_NANDPATT_PATTWAIT1, 17 .EQU EXMC_NANDPATT_PATTWAIT0, 16 .EQU EXMC_NANDPATT_PATTHOLD7, 15 .EQU EXMC_NANDPATT_PATTHOLD6, 14 .EQU EXMC_NANDPATT_PATTHOLD5, 13 .EQU EXMC_NANDPATT_PATTHOLD4, 12 .EQU EXMC_NANDPATT_PATTHOLD3, 11 .EQU EXMC_NANDPATT_PATTHOLD2, 10 .EQU EXMC_NANDPATT_PATTHOLD1, 9 .EQU EXMC_NANDPATT_PATTHOLD0, 8 .EQU EXMC_NANDPATT_PATTHIZ7, 7 .EQU EXMC_NANDPATT_PATTHIZ6, 6 .EQU EXMC_NANDPATT_PATTHIZ5, 5 .EQU EXMC_NANDPATT_PATTHIZ4, 4 .EQU EXMC_NANDPATT_PATTHIZ3, 3 .EQU EXMC_NANDPATT_PATTHIZ2, 2 .EQU EXMC_NANDPATT_PATTHIZ1, 1 .EQU EXMC_NANDPATT_PATTHIZ0, 0 // register------------------------------------- .EQU EXMC_ECCC, 0x40002824 // 0x4000 2824 EXMC_ECCC Bits------------------------------------- .EQU EXMC_ECCC_ECCEN, 16 .EQU EXMC_ECCC_ECCPS15, 15 .EQU EXMC_ECCC_ECCPS14, 14 .EQU EXMC_ECCC_ECCPS13, 13 .EQU EXMC_ECCC_ECCPS12, 12 .EQU EXMC_ECCC_ECCPS11, 11 .EQU EXMC_ECCC_ECCPS10, 10 .EQU EXMC_ECCC_ECCPS9, 9 .EQU EXMC_ECCC_ECCPS8, 8 .EQU EXMC_ECCC_ECCPS7, 7 .EQU EXMC_ECCC_ECCPS6, 6 .EQU EXMC_ECCC_ECCPS5, 5 .EQU EXMC_ECCC_ECCPS4, 4 .EQU EXMC_ECCC_ECCPS3, 3 .EQU EXMC_ECCC_ECCPS2, 2 .EQU EXMC_ECCC_ECCPS1, 1 .EQU EXMC_ECCC_ECCPS0, 0 // register------------------------------------- .EQU EXMC_NANDECCR, 0x40002828 // 0x4000 2828 EXMC_NANDECCR Bits------------------------------------- .EQU EXMC_NANDECCR_ECC31, 31 .EQU EXMC_NANDECCR_ECC30, 30 .EQU EXMC_NANDECCR_ECC29, 29 .EQU EXMC_NANDECCR_ECC28, 28 .EQU EXMC_NANDECCR_ECC27, 27 .EQU EXMC_NANDECCR_ECC26, 26 .EQU EXMC_NANDECCR_ECC25, 25 .EQU EXMC_NANDECCR_ECC24, 24 .EQU EXMC_NANDECCR_ECC23, 23 .EQU EXMC_NANDECCR_ECC22, 22 .EQU EXMC_NANDECCR_ECC21, 21 .EQU EXMC_NANDECCR_ECC20, 20 .EQU EXMC_NANDECCR_ECC19, 19 .EQU EXMC_NANDECCR_ECC18, 18 .EQU EXMC_NANDECCR_ECC17, 17 .EQU EXMC_NANDECCR_ECC16, 16 .EQU EXMC_NANDECCR_ECC15, 15 .EQU EXMC_NANDECCR_ECC14, 14 .EQU EXMC_NANDECCR_ECC13, 13 .EQU EXMC_NANDECCR_ECC12, 12 .EQU EXMC_NANDECCR_ECC11, 11 .EQU EXMC_NANDECCR_ECC10, 10 .EQU EXMC_NANDECCR_ECC9, 9 .EQU EXMC_NANDECCR_ECC8, 8 .EQU EXMC_NANDECCR_ECC7, 7 .EQU EXMC_NANDECCR_ECC6, 6 .EQU EXMC_NANDECCR_ECC5, 5 .EQU EXMC_NANDECCR_ECC4, 4 .EQU EXMC_NANDECCR_ECC3, 3 .EQU EXMC_NANDECCR_ECC2, 2 .EQU EXMC_NANDECCR_ECC1, 1 .EQU EXMC_NANDECCR_ECC0, 0 // register------------------------------------- .EQU EXMC_NANDFIFO, 0x4000282C // 0x4000 282C EXMC_NANDFIFO Bits------------------------------------- .EQU EXMC_NANDFIFO_FIFO31, 31 .EQU EXMC_NANDFIFO_FIFO30, 30 .EQU EXMC_NANDFIFO_FIFO29, 29 .EQU EXMC_NANDFIFO_FIFO28, 28 .EQU EXMC_NANDFIFO_FIFO27, 27 .EQU EXMC_NANDFIFO_FIFO26, 26 .EQU EXMC_NANDFIFO_FIFO25, 25 .EQU EXMC_NANDFIFO_FIFO24, 24 .EQU EXMC_NANDFIFO_FIFO23, 23 .EQU EXMC_NANDFIFO_FIFO22, 22 .EQU EXMC_NANDFIFO_FIFO21, 21 .EQU EXMC_NANDFIFO_FIFO20, 20 .EQU EXMC_NANDFIFO_FIFO19, 19 .EQU EXMC_NANDFIFO_FIFO18, 18 .EQU EXMC_NANDFIFO_FIFO17, 17 .EQU EXMC_NANDFIFO_FIFO16, 16 .EQU EXMC_NANDFIFO_FIFO15, 15 .EQU EXMC_NANDFIFO_FIFO14, 14 .EQU EXMC_NANDFIFO_FIFO13, 13 .EQU EXMC_NANDFIFO_FIFO12, 12 .EQU EXMC_NANDFIFO_FIFO11, 11 .EQU EXMC_NANDFIFO_FIFO10, 10 .EQU EXMC_NANDFIFO_FIFO9, 9 .EQU EXMC_NANDFIFO_FIFO8, 8 .EQU EXMC_NANDFIFO_FIFO7, 7 .EQU EXMC_NANDFIFO_FIFO6, 6 .EQU EXMC_NANDFIFO_FIFO5, 5 .EQU EXMC_NANDFIFO_FIFO4, 4 .EQU EXMC_NANDFIFO_FIFO3, 3 .EQU EXMC_NANDFIFO_FIFO2, 2 .EQU EXMC_NANDFIFO_FIFO1, 1 .EQU EXMC_NANDFIFO_FIFO0, 0 // register------------------------------------- .EQU EXMC_INT, 0x40002830 // 0x4000 2830 EXMC_INT Bits------------------------------------- .EQU EXMC_INT_ECCIC, 28 .EQU EXMC_INT_NFEIC, 27 .EQU EXMC_INT_NFFIC, 26 .EQU EXMC_INT_SRAMINT1IC, 25 .EQU EXMC_INT_SRAMINT2IC, 24 .EQU EXMC_INT_ECCIE, 20 .EQU EXMC_INT_NFEIE, 19 .EQU EXMC_INT_NFFIE, 18 .EQU EXMC_INT_SRAMINT1IE, 17 .EQU EXMC_INT_SRAMINT2IE, 16 .EQU EXMC_INT_NFESTA, 9 .EQU EXMC_INT_NFFSTA, 8 .EQU EXMC_INT_ECCIF, 4 .EQU EXMC_INT_NFEIF, 3 .EQU EXMC_INT_NFFIF, 2 .EQU EXMC_INT_SARMINT2IF, 1 .EQU EXMC_INT_SARMINT1IF, 0 // register------------------------------------- .EQU CAN4_CTLR, 0x40002880 // 0x4000 2880 CAN4_CTLR Bits------------------------------------- .EQU CAN4_CTLR_CANRMC6, 30 .EQU CAN4_CTLR_CANRMC5, 29 .EQU CAN4_CTLR_CANRMC4, 28 .EQU CAN4_CTLR_CANRMC3, 27 .EQU CAN4_CTLR_CANRMC2, 26 .EQU CAN4_CTLR_CANRMC1, 25 .EQU CAN4_CTLR_CANRMC0, 24 .EQU CAN4_CTLR_BOFF, 23 .EQU CAN4_CTLR_CERROR, 22 .EQU CAN4_CTLR_TXSTA, 21 .EQU CAN4_CTLR_RXSTA, 20 .EQU CAN4_CTLR_TCSTA, 19 .EQU CAN4_CTLR_TXBSTA, 18 .EQU CAN4_CTLR_DOSTA, 17 .EQU CAN4_CTLR_RXBSTA, 16 .EQU CAN4_CTLR_RELRXALL, 15 .EQU CAN4_CTLR_CKMODE, 14 .EQU CAN4_CTLR_BOFFREC, 13 .EQU CAN4_CTLR_LBSEL, 12 .EQU CAN4_CTLR_RELF, 11 .EQU CAN4_CTLR_RELRX, 10 .EQU CAN4_CTLR_ATX, 9 .EQU CAN4_CTLR_TXR, 8 .EQU CAN4_CTLR_CANEN, 7 .EQU CAN4_CTLR_CANCKS1, 6 .EQU CAN4_CTLR_CANCKS0, 5 .EQU CAN4_CTLR_FILTEREXT, 4 .EQU CAN4_CTLR_SLEEP, 3 .EQU CAN4_CTLR_LBACK, 2 .EQU CAN4_CTLR_SILENT, 1 .EQU CAN4_CTLR_RSMOD, 0 // register------------------------------------- .EQU CAN4_BRGR, 0x40002884 // 0x4000 2884 CAN4_BRGR Bits------------------------------------- .EQU CAN4_BRGR_SAM, 15 .EQU CAN4_BRGR_TSEG2_2, 14 .EQU CAN4_BRGR_TSEG2_1, 13 .EQU CAN4_BRGR_TSEG2_0, 12 .EQU CAN4_BRGR_TSEG1_3, 11 .EQU CAN4_BRGR_TSEG1_2, 10 .EQU CAN4_BRGR_TSEG1_1, 9 .EQU CAN4_BRGR_TSEG1_0, 8 .EQU CAN4_BRGR_SJW1, 7 .EQU CAN4_BRGR_SJW0, 6 .EQU CAN4_BRGR_CANBRP5, 5 .EQU CAN4_BRGR_CANBRP4, 4 .EQU CAN4_BRGR_CANBRP3, 3 .EQU CAN4_BRGR_CANBRP2, 2 .EQU CAN4_BRGR_CANBRP1, 1 .EQU CAN4_BRGR_CANBRP0, 0 // register------------------------------------- .EQU CAN4_RCR, 0x40002888 // 0x4000 2888 CAN4_RCR Bits------------------------------------- .EQU CAN4_RCR_RAMMB5, 21 .EQU CAN4_RCR_RAMMB4, 20 .EQU CAN4_RCR_RAMMB3, 19 .EQU CAN4_RCR_RAMMB2, 18 .EQU CAN4_RCR_RAMMB1, 17 .EQU CAN4_RCR_RAMMB0, 16 .EQU CAN4_RCR_CANERRC1, 15 .EQU CAN4_RCR_CANERRC0, 14 .EQU CAN4_RCR_CANDIR, 13 .EQU CAN4_RCR_CANSEG4, 12 .EQU CAN4_RCR_CANSEG3, 11 .EQU CAN4_RCR_CANSEG2, 10 .EQU CAN4_RCR_CANSEG1, 9 .EQU CAN4_RCR_CANSEG0, 8 .EQU CAN4_RCR_CANALC4, 4 .EQU CAN4_RCR_CANALC3, 3 .EQU CAN4_RCR_CANALC2, 2 .EQU CAN4_RCR_CANALC1, 1 .EQU CAN4_RCR_CANALC0, 0 // register------------------------------------- .EQU CAN4_EROR, 0x4000288C // 0x4000 288C CAN4_EROR Bits------------------------------------- .EQU CAN4_EROR_CANEWL7, 23 .EQU CAN4_EROR_CANEWL6, 22 .EQU CAN4_EROR_CANEWL5, 21 .EQU CAN4_EROR_CANEWL4, 20 .EQU CAN4_EROR_CANEWL3, 19 .EQU CAN4_EROR_CANEWL2, 18 .EQU CAN4_EROR_CANEWL1, 17 .EQU CAN4_EROR_CANEWL0, 16 .EQU CAN4_EROR_CANTXE7, 15 .EQU CAN4_EROR_CANTXE6, 14 .EQU CAN4_EROR_CANTXE5, 13 .EQU CAN4_EROR_CANTXE4, 12 .EQU CAN4_EROR_CANTXE3, 11 .EQU CAN4_EROR_CANTXE2, 10 .EQU CAN4_EROR_CANTXE1, 9 .EQU CAN4_EROR_CANTXE0, 8 .EQU CAN4_EROR_CANRXE7, 7 .EQU CAN4_EROR_CANRXE6, 6 .EQU CAN4_EROR_CANRXE5, 5 .EQU CAN4_EROR_CANRXE4, 4 .EQU CAN4_EROR_CANRXE3, 3 .EQU CAN4_EROR_CANRXE2, 2 .EQU CAN4_EROR_CANRXE1, 1 .EQU CAN4_EROR_CANRXE0, 0 // register------------------------------------- .EQU CAN4_ACRR, 0x40002890 // 0x4000 2890 CAN4_ACRR Bits------------------------------------- .EQU CAN4_ACRR_ACR31, 31 .EQU CAN4_ACRR_ACR30, 30 .EQU CAN4_ACRR_ACR29, 29 .EQU CAN4_ACRR_ACR28, 28 .EQU CAN4_ACRR_ACR27, 27 .EQU CAN4_ACRR_ACR26, 26 .EQU CAN4_ACRR_ACR25, 25 .EQU CAN4_ACRR_ACR24, 24 .EQU CAN4_ACRR_ACR23, 23 .EQU CAN4_ACRR_ACR22, 22 .EQU CAN4_ACRR_ACR21, 21 .EQU CAN4_ACRR_ACR20, 20 .EQU CAN4_ACRR_ACR19, 19 .EQU CAN4_ACRR_ACR18, 18 .EQU CAN4_ACRR_ACR17, 17 .EQU CAN4_ACRR_ACR16, 16 .EQU CAN4_ACRR_ACR15, 15 .EQU CAN4_ACRR_ACR14, 14 .EQU CAN4_ACRR_ACR13, 13 .EQU CAN4_ACRR_ACR12, 12 .EQU CAN4_ACRR_ACR11, 11 .EQU CAN4_ACRR_ACR10, 10 .EQU CAN4_ACRR_ACR9, 9 .EQU CAN4_ACRR_ACR8, 8 .EQU CAN4_ACRR_ACR7, 7 .EQU CAN4_ACRR_ACR6, 6 .EQU CAN4_ACRR_ACR5, 5 .EQU CAN4_ACRR_ACR4, 4 .EQU CAN4_ACRR_ACR3, 3 .EQU CAN4_ACRR_ACR2, 2 .EQU CAN4_ACRR_ACR1, 1 .EQU CAN4_ACRR_ACR0, 0 // register------------------------------------- .EQU CAN4_MSKR, 0x40002894 // 0x4000 2894 CAN4_MSKR Bits------------------------------------- .EQU CAN4_MSKR_MSK31, 31 .EQU CAN4_MSKR_MSK30, 30 .EQU CAN4_MSKR_MSK29, 29 .EQU CAN4_MSKR_MSK28, 28 .EQU CAN4_MSKR_MSK27, 27 .EQU CAN4_MSKR_MSK26, 26 .EQU CAN4_MSKR_MSK25, 25 .EQU CAN4_MSKR_MSK24, 24 .EQU CAN4_MSKR_MSK23, 23 .EQU CAN4_MSKR_MSK22, 22 .EQU CAN4_MSKR_MSK21, 21 .EQU CAN4_MSKR_MSK20, 20 .EQU CAN4_MSKR_MSK19, 19 .EQU CAN4_MSKR_MSK18, 18 .EQU CAN4_MSKR_MSK17, 17 .EQU CAN4_MSKR_MSK16, 16 .EQU CAN4_MSKR_MSK15, 15 .EQU CAN4_MSKR_MSK14, 14 .EQU CAN4_MSKR_MSK13, 13 .EQU CAN4_MSKR_MSK12, 12 .EQU CAN4_MSKR_MSK11, 11 .EQU CAN4_MSKR_MSK10, 10 .EQU CAN4_MSKR_MSK9, 9 .EQU CAN4_MSKR_MSK8, 8 .EQU CAN4_MSKR_MSK7, 7 .EQU CAN4_MSKR_MSK6, 6 .EQU CAN4_MSKR_MSK5, 5 .EQU CAN4_MSKR_MSK4, 4 .EQU CAN4_MSKR_MSK3, 3 .EQU CAN4_MSKR_MSK2, 2 .EQU CAN4_MSKR_MSK1, 1 .EQU CAN4_MSKR_MSK0, 0 // register------------------------------------- .EQU CAN4_IER, 0x40002898 // 0x4000 2898 CAN4_IER Bits------------------------------------- .EQU CAN4_IER_BOFFIC, 28 .EQU CAN4_IER_BEIC, 23 .EQU CAN4_IER_ALIC, 22 .EQU CAN4_IER_ENIC, 21 .EQU CAN4_IER_WUIC, 20 .EQU CAN4_IER_DOVFIC, 19 .EQU CAN4_IER_EAIC, 18 .EQU CAN4_IER_CANTXIC, 17 .EQU CAN4_IER_CANRFIC, 16 .EQU CAN4_IER_BOFFIE, 12 .EQU CAN4_IER_CANRFIE, 10 .EQU CAN4_IER_CANRXDE, 9 .EQU CAN4_IER_CANTXDE, 8 .EQU CAN4_IER_BEIE, 7 .EQU CAN4_IER_ALIE, 6 .EQU CAN4_IER_ENIE, 5 .EQU CAN4_IER_WUIE, 4 .EQU CAN4_IER_DOVFIE, 3 .EQU CAN4_IER_EAIE, 2 .EQU CAN4_IER_CANTXIE, 1 .EQU CAN4_IER_CANRXIE, 0 // register------------------------------------- .EQU CAN4_IFR, 0x4000289C // 0x4000 289C CAN4_IFR Bits------------------------------------- .EQU CAN4_IFR_BOFFIF, 12 .EQU CAN4_IFR_CANRFIF, 10 .EQU CAN4_IFR_CANRXDF, 9 .EQU CAN4_IFR_CANTXDF, 8 .EQU CAN4_IFR_BEIF, 7 .EQU CAN4_IFR_ALIF, 6 .EQU CAN4_IFR_ENIF, 5 .EQU CAN4_IFR_WUIF, 4 .EQU CAN4_IFR_DOVFIF, 3 .EQU CAN4_IFR_EAIF, 2 .EQU CAN4_IFR_CANTXIF, 1 .EQU CAN4_IFR_CANRXIF, 0 // register------------------------------------- .EQU CAN4_INFR, 0x400028A0 // 0x4000 28A0 CAN4_INFR Bits------------------------------------- .EQU CAN4_INFR_IDE, 7 .EQU CAN4_INFR_RTR, 6 .EQU CAN4_INFR_DLC3, 3 .EQU CAN4_INFR_DLC2, 2 .EQU CAN4_INFR_DLC1, 1 .EQU CAN4_INFR_DLC0, 0 // register------------------------------------- .EQU CAN4_TX0R, 0x400028A4 // 0x4000 28A4 CAN4_TX0R Bits------------------------------------- .EQU CAN4_TX0R_CANTX0_31, 31 .EQU CAN4_TX0R_CANTX0_30, 30 .EQU CAN4_TX0R_CANTX0_29, 29 .EQU CAN4_TX0R_CANTX0_28, 28 .EQU CAN4_TX0R_CANTX0_27, 27 .EQU CAN4_TX0R_CANTX0_26, 26 .EQU CAN4_TX0R_CANTX0_25, 25 .EQU CAN4_TX0R_CANTX0_24, 24 .EQU CAN4_TX0R_CANTX0_23, 23 .EQU CAN4_TX0R_CANTX0_22, 22 .EQU CAN4_TX0R_CANTX0_21, 21 .EQU CAN4_TX0R_CANTX0_20, 20 .EQU CAN4_TX0R_CANTX0_19, 19 .EQU CAN4_TX0R_CANTX0_18, 18 .EQU CAN4_TX0R_CANTX0_17, 17 .EQU CAN4_TX0R_CANTX0_16, 16 .EQU CAN4_TX0R_CANTX0_15, 15 .EQU CAN4_TX0R_CANTX0_14, 14 .EQU CAN4_TX0R_CANTX0_13, 13 .EQU CAN4_TX0R_CANTX0_12, 12 .EQU CAN4_TX0R_CANTX0_11, 11 .EQU CAN4_TX0R_CANTX0_10, 10 .EQU CAN4_TX0R_CANTX0_9, 9 .EQU CAN4_TX0R_CANTX0_8, 8 .EQU CAN4_TX0R_CANTX0_7, 7 .EQU CAN4_TX0R_CANTX0_6, 6 .EQU CAN4_TX0R_CANTX0_5, 5 .EQU CAN4_TX0R_CANTX0_4, 4 .EQU CAN4_TX0R_CANTX0_3, 3 .EQU CAN4_TX0R_CANTX0_2, 2 .EQU CAN4_TX0R_CANTX0_1, 1 .EQU CAN4_TX0R_CANTX0_0, 0 // register------------------------------------- .EQU CAN4_TX1R, 0x400028A8 // 0x4000 28A8 CAN4_TX1R Bits------------------------------------- .EQU CAN4_TX1R_CANTX1_31, 31 .EQU CAN4_TX1R_CANTX1_30, 30 .EQU CAN4_TX1R_CANTX1_29, 29 .EQU CAN4_TX1R_CANTX1_28, 28 .EQU CAN4_TX1R_CANTX1_27, 27 .EQU CAN4_TX1R_CANTX1_26, 26 .EQU CAN4_TX1R_CANTX1_25, 25 .EQU CAN4_TX1R_CANTX1_24, 24 .EQU CAN4_TX1R_CANTX1_23, 23 .EQU CAN4_TX1R_CANTX1_22, 22 .EQU CAN4_TX1R_CANTX1_21, 21 .EQU CAN4_TX1R_CANTX1_20, 20 .EQU CAN4_TX1R_CANTX1_19, 19 .EQU CAN4_TX1R_CANTX1_18, 18 .EQU CAN4_TX1R_CANTX1_17, 17 .EQU CAN4_TX1R_CANTX1_16, 16 .EQU CAN4_TX1R_CANTX1_15, 15 .EQU CAN4_TX1R_CANTX1_14, 14 .EQU CAN4_TX1R_CANTX1_13, 13 .EQU CAN4_TX1R_CANTX1_12, 12 .EQU CAN4_TX1R_CANTX1_11, 11 .EQU CAN4_TX1R_CANTX1_10, 10 .EQU CAN4_TX1R_CANTX1_9, 9 .EQU CAN4_TX1R_CANTX1_8, 8 .EQU CAN4_TX1R_CANTX1_7, 7 .EQU CAN4_TX1R_CANTX1_6, 6 .EQU CAN4_TX1R_CANTX1_5, 5 .EQU CAN4_TX1R_CANTX1_4, 4 .EQU CAN4_TX1R_CANTX1_3, 3 .EQU CAN4_TX1R_CANTX1_2, 2 .EQU CAN4_TX1R_CANTX1_1, 1 .EQU CAN4_TX1R_CANTX1_0, 0 // register------------------------------------- .EQU CAN4_TX2R, 0x400028AC // 0x4000 28AC CAN4_TX2R Bits------------------------------------- .EQU CAN4_TX2R_CANTX2_31, 31 .EQU CAN4_TX2R_CANTX2_30, 30 .EQU CAN4_TX2R_CANTX2_29, 29 .EQU CAN4_TX2R_CANTX2_28, 28 .EQU CAN4_TX2R_CANTX2_27, 27 .EQU CAN4_TX2R_CANTX2_26, 26 .EQU CAN4_TX2R_CANTX2_25, 25 .EQU CAN4_TX2R_CANTX2_24, 24 .EQU CAN4_TX2R_CANTX2_23, 23 .EQU CAN4_TX2R_CANTX2_22, 22 .EQU CAN4_TX2R_CANTX2_21, 21 .EQU CAN4_TX2R_CANTX2_20, 20 .EQU CAN4_TX2R_CANTX2_19, 19 .EQU CAN4_TX2R_CANTX2_18, 18 .EQU CAN4_TX2R_CANTX2_17, 17 .EQU CAN4_TX2R_CANTX2_16, 16 .EQU CAN4_TX2R_CANTX2_15, 15 .EQU CAN4_TX2R_CANTX2_14, 14 .EQU CAN4_TX2R_CANTX2_13, 13 .EQU CAN4_TX2R_CANTX2_12, 12 .EQU CAN4_TX2R_CANTX2_11, 11 .EQU CAN4_TX2R_CANTX2_10, 10 .EQU CAN4_TX2R_CANTX2_9, 9 .EQU CAN4_TX2R_CANTX2_8, 8 .EQU CAN4_TX2R_CANTX2_7, 7 .EQU CAN4_TX2R_CANTX2_6, 6 .EQU CAN4_TX2R_CANTX2_5, 5 .EQU CAN4_TX2R_CANTX2_4, 4 .EQU CAN4_TX2R_CANTX2_3, 3 .EQU CAN4_TX2R_CANTX2_2, 2 .EQU CAN4_TX2R_CANTX2_1, 1 .EQU CAN4_TX2R_CANTX2_0, 0 // register------------------------------------- .EQU CAN4_RXDATA0, 0x400028B0 // 0x4000 28B0 CAN4_RXDATA0 Bits------------------------------------- .EQU CAN4_RXDATA0_IDE, 7 .EQU CAN4_RXDATA0_RTR, 6 .EQU CAN4_RXDATA0_DLC3, 3 .EQU CAN4_RXDATA0_DLC2, 2 .EQU CAN4_RXDATA0_DLC1, 1 .EQU CAN4_RXDATA0_DLC0, 0 // register------------------------------------- .EQU CAN4_RXDATA1, 0x400028B4 // 0x4000 28B4 CAN4_RXDATA1 Bits------------------------------------- .EQU CAN4_RXDATA1_ID28, 31 .EQU CAN4_RXDATA1_ID27, 30 .EQU CAN4_RXDATA1_ID26, 29 .EQU CAN4_RXDATA1_ID25, 28 .EQU CAN4_RXDATA1_ID24, 27 .EQU CAN4_RXDATA1_ID23, 26 .EQU CAN4_RXDATA1_ID22, 25 .EQU CAN4_RXDATA1_ID21, 24 .EQU CAN4_RXDATA1_ID20, 23 .EQU CAN4_RXDATA1_ID19, 22 .EQU CAN4_RXDATA1_ID18, 21 .EQU CAN4_RXDATA1_ID17, 20 .EQU CAN4_RXDATA1_ID16, 19 .EQU CAN4_RXDATA1_ID15, 18 .EQU CAN4_RXDATA1_ID14, 17 .EQU CAN4_RXDATA1_ID13, 16 .EQU CAN4_RXDATA1_ID12, 15 .EQU CAN4_RXDATA1_ID11, 14 .EQU CAN4_RXDATA1_ID10, 13 .EQU CAN4_RXDATA1_ID9, 12 .EQU CAN4_RXDATA1_ID8, 11 .EQU CAN4_RXDATA1_ID7, 10 .EQU CAN4_RXDATA1_ID6, 9 .EQU CAN4_RXDATA1_ID5, 8 .EQU CAN4_RXDATA1_ID4, 7 .EQU CAN4_RXDATA1_ID3, 6 .EQU CAN4_RXDATA1_ID2, 5 .EQU CAN4_RXDATA1_ID1, 4 .EQU CAN4_RXDATA1_ID0, 3 .EQU CAN4_RXDATA1_RTR, 2 // register------------------------------------- .EQU CAN4_RXDATA2, 0x400028B8 // 0x4000 28B8 CAN4_RXDATA2 Bits------------------------------------- .EQU CAN4_RXDATA2_CANRXDT0, 31 .EQU CAN4_RXDATA2_CANRXDT1, 23 .EQU CAN4_RXDATA2_CANRXDT2, 15 .EQU CAN4_RXDATA2_CANRXDT3, 7 // register------------------------------------- .EQU CAN4_RXDATA3, 0x400028BC // 0x4000 28BC CAN4_RXDATA3 Bits------------------------------------- .EQU CAN4_RXDATA3_CANRXDT4, 31 .EQU CAN4_RXDATA3_CANRXDT5, 23 .EQU CAN4_RXDATA3_CANRXDT6, 15 .EQU CAN4_RXDATA3_CANRXDT7, 7 // register------------------------------------- .EQU CAN4_ACR1R, 0x40002900 // 0x4000 2900 CAN4_ACR1R Bits------------------------------------- .EQU CAN4_ACR1R_ACR31, 31 .EQU CAN4_ACR1R_ACR30, 30 .EQU CAN4_ACR1R_ACR29, 29 .EQU CAN4_ACR1R_ACR28, 28 .EQU CAN4_ACR1R_ACR27, 27 .EQU CAN4_ACR1R_ACR26, 26 .EQU CAN4_ACR1R_ACR25, 25 .EQU CAN4_ACR1R_ACR24, 24 .EQU CAN4_ACR1R_ACR23, 23 .EQU CAN4_ACR1R_ACR22, 22 .EQU CAN4_ACR1R_ACR21, 21 .EQU CAN4_ACR1R_ACR20, 20 .EQU CAN4_ACR1R_ACR19, 19 .EQU CAN4_ACR1R_ACR18, 18 .EQU CAN4_ACR1R_ACR17, 17 .EQU CAN4_ACR1R_ACR16, 16 .EQU CAN4_ACR1R_ACR15, 15 .EQU CAN4_ACR1R_ACR14, 14 .EQU CAN4_ACR1R_ACR13, 13 .EQU CAN4_ACR1R_ACR12, 12 .EQU CAN4_ACR1R_ACR11, 11 .EQU CAN4_ACR1R_ACR10, 10 .EQU CAN4_ACR1R_ACR9, 9 .EQU CAN4_ACR1R_ACR8, 8 .EQU CAN4_ACR1R_ACR7, 7 .EQU CAN4_ACR1R_ACR6, 6 .EQU CAN4_ACR1R_ACR5, 5 .EQU CAN4_ACR1R_ACR4, 4 .EQU CAN4_ACR1R_ACR3, 3 .EQU CAN4_ACR1R_ACR2, 2 .EQU CAN4_ACR1R_ACR1, 1 .EQU CAN4_ACR1R_ACR0, 0 // register------------------------------------- .EQU CAN4_MSK1R, 0x40002904 // 0x4000 2904 CAN4_MSK1R Bits------------------------------------- .EQU CAN4_MSK1R_MSK31, 31 .EQU CAN4_MSK1R_MSK30, 30 .EQU CAN4_MSK1R_MSK29, 29 .EQU CAN4_MSK1R_MSK28, 28 .EQU CAN4_MSK1R_MSK27, 27 .EQU CAN4_MSK1R_MSK26, 26 .EQU CAN4_MSK1R_MSK25, 25 .EQU CAN4_MSK1R_MSK24, 24 .EQU CAN4_MSK1R_MSK23, 23 .EQU CAN4_MSK1R_MSK22, 22 .EQU CAN4_MSK1R_MSK21, 21 .EQU CAN4_MSK1R_MSK20, 20 .EQU CAN4_MSK1R_MSK19, 19 .EQU CAN4_MSK1R_MSK18, 18 .EQU CAN4_MSK1R_MSK17, 17 .EQU CAN4_MSK1R_MSK16, 16 .EQU CAN4_MSK1R_MSK15, 15 .EQU CAN4_MSK1R_MSK14, 14 .EQU CAN4_MSK1R_MSK13, 13 .EQU CAN4_MSK1R_MSK12, 12 .EQU CAN4_MSK1R_MSK11, 11 .EQU CAN4_MSK1R_MSK10, 10 .EQU CAN4_MSK1R_MSK9, 9 .EQU CAN4_MSK1R_MSK8, 8 .EQU CAN4_MSK1R_MSK7, 7 .EQU CAN4_MSK1R_MSK6, 6 .EQU CAN4_MSK1R_MSK5, 5 .EQU CAN4_MSK1R_MSK4, 4 .EQU CAN4_MSK1R_MSK3, 3 .EQU CAN4_MSK1R_MSK2, 2 .EQU CAN4_MSK1R_MSK1, 1 .EQU CAN4_MSK1R_MSK0, 0 // register------------------------------------- .EQU CAN4_ACR2R, 0x40002908 // 0x4000 2908 CAN4_ACR2R Bits------------------------------------- .EQU CAN4_ACR2R_ACR31, 31 .EQU CAN4_ACR2R_ACR30, 30 .EQU CAN4_ACR2R_ACR29, 29 .EQU CAN4_ACR2R_ACR28, 28 .EQU CAN4_ACR2R_ACR27, 27 .EQU CAN4_ACR2R_ACR26, 26 .EQU CAN4_ACR2R_ACR25, 25 .EQU CAN4_ACR2R_ACR24, 24 .EQU CAN4_ACR2R_ACR23, 23 .EQU CAN4_ACR2R_ACR22, 22 .EQU CAN4_ACR2R_ACR21, 21 .EQU CAN4_ACR2R_ACR20, 20 .EQU CAN4_ACR2R_ACR19, 19 .EQU CAN4_ACR2R_ACR18, 18 .EQU CAN4_ACR2R_ACR17, 17 .EQU CAN4_ACR2R_ACR16, 16 .EQU CAN4_ACR2R_ACR15, 15 .EQU CAN4_ACR2R_ACR14, 14 .EQU CAN4_ACR2R_ACR13, 13 .EQU CAN4_ACR2R_ACR12, 12 .EQU CAN4_ACR2R_ACR11, 11 .EQU CAN4_ACR2R_ACR10, 10 .EQU CAN4_ACR2R_ACR9, 9 .EQU CAN4_ACR2R_ACR8, 8 .EQU CAN4_ACR2R_ACR7, 7 .EQU CAN4_ACR2R_ACR6, 6 .EQU CAN4_ACR2R_ACR5, 5 .EQU CAN4_ACR2R_ACR4, 4 .EQU CAN4_ACR2R_ACR3, 3 .EQU CAN4_ACR2R_ACR2, 2 .EQU CAN4_ACR2R_ACR1, 1 .EQU CAN4_ACR2R_ACR0, 0 // register------------------------------------- .EQU CAN4_MSK2R, 0x4000290C // 0x4000 290C CAN4_MSK2R Bits------------------------------------- .EQU CAN4_MSK2R_MSK31, 31 .EQU CAN4_MSK2R_MSK30, 30 .EQU CAN4_MSK2R_MSK29, 29 .EQU CAN4_MSK2R_MSK28, 28 .EQU CAN4_MSK2R_MSK27, 27 .EQU CAN4_MSK2R_MSK26, 26 .EQU CAN4_MSK2R_MSK25, 25 .EQU CAN4_MSK2R_MSK24, 24 .EQU CAN4_MSK2R_MSK23, 23 .EQU CAN4_MSK2R_MSK22, 22 .EQU CAN4_MSK2R_MSK21, 21 .EQU CAN4_MSK2R_MSK20, 20 .EQU CAN4_MSK2R_MSK19, 19 .EQU CAN4_MSK2R_MSK18, 18 .EQU CAN4_MSK2R_MSK17, 17 .EQU CAN4_MSK2R_MSK16, 16 .EQU CAN4_MSK2R_MSK15, 15 .EQU CAN4_MSK2R_MSK14, 14 .EQU CAN4_MSK2R_MSK13, 13 .EQU CAN4_MSK2R_MSK12, 12 .EQU CAN4_MSK2R_MSK11, 11 .EQU CAN4_MSK2R_MSK10, 10 .EQU CAN4_MSK2R_MSK9, 9 .EQU CAN4_MSK2R_MSK8, 8 .EQU CAN4_MSK2R_MSK7, 7 .EQU CAN4_MSK2R_MSK6, 6 .EQU CAN4_MSK2R_MSK5, 5 .EQU CAN4_MSK2R_MSK4, 4 .EQU CAN4_MSK2R_MSK3, 3 .EQU CAN4_MSK2R_MSK2, 2 .EQU CAN4_MSK2R_MSK1, 1 .EQU CAN4_MSK2R_MSK0, 0 // register------------------------------------- .EQU CAN4_ACR3R, 0x40002910 // 0x4000 2910 CAN4_ACR3R Bits------------------------------------- .EQU CAN4_ACR3R_ACR31, 31 .EQU CAN4_ACR3R_ACR30, 30 .EQU CAN4_ACR3R_ACR29, 29 .EQU CAN4_ACR3R_ACR28, 28 .EQU CAN4_ACR3R_ACR27, 27 .EQU CAN4_ACR3R_ACR26, 26 .EQU CAN4_ACR3R_ACR25, 25 .EQU CAN4_ACR3R_ACR24, 24 .EQU CAN4_ACR3R_ACR23, 23 .EQU CAN4_ACR3R_ACR22, 22 .EQU CAN4_ACR3R_ACR21, 21 .EQU CAN4_ACR3R_ACR20, 20 .EQU CAN4_ACR3R_ACR19, 19 .EQU CAN4_ACR3R_ACR18, 18 .EQU CAN4_ACR3R_ACR17, 17 .EQU CAN4_ACR3R_ACR16, 16 .EQU CAN4_ACR3R_ACR15, 15 .EQU CAN4_ACR3R_ACR14, 14 .EQU CAN4_ACR3R_ACR13, 13 .EQU CAN4_ACR3R_ACR12, 12 .EQU CAN4_ACR3R_ACR11, 11 .EQU CAN4_ACR3R_ACR10, 10 .EQU CAN4_ACR3R_ACR9, 9 .EQU CAN4_ACR3R_ACR8, 8 .EQU CAN4_ACR3R_ACR7, 7 .EQU CAN4_ACR3R_ACR6, 6 .EQU CAN4_ACR3R_ACR5, 5 .EQU CAN4_ACR3R_ACR4, 4 .EQU CAN4_ACR3R_ACR3, 3 .EQU CAN4_ACR3R_ACR2, 2 .EQU CAN4_ACR3R_ACR1, 1 .EQU CAN4_ACR3R_ACR0, 0 // register------------------------------------- .EQU CAN4_MSK3R, 0x40002914 // 0x4000 2914 CAN4_MSK3R Bits------------------------------------- .EQU CAN4_MSK3R_MSK31, 31 .EQU CAN4_MSK3R_MSK30, 30 .EQU CAN4_MSK3R_MSK29, 29 .EQU CAN4_MSK3R_MSK28, 28 .EQU CAN4_MSK3R_MSK27, 27 .EQU CAN4_MSK3R_MSK26, 26 .EQU CAN4_MSK3R_MSK25, 25 .EQU CAN4_MSK3R_MSK24, 24 .EQU CAN4_MSK3R_MSK23, 23 .EQU CAN4_MSK3R_MSK22, 22 .EQU CAN4_MSK3R_MSK21, 21 .EQU CAN4_MSK3R_MSK20, 20 .EQU CAN4_MSK3R_MSK19, 19 .EQU CAN4_MSK3R_MSK18, 18 .EQU CAN4_MSK3R_MSK17, 17 .EQU CAN4_MSK3R_MSK16, 16 .EQU CAN4_MSK3R_MSK15, 15 .EQU CAN4_MSK3R_MSK14, 14 .EQU CAN4_MSK3R_MSK13, 13 .EQU CAN4_MSK3R_MSK12, 12 .EQU CAN4_MSK3R_MSK11, 11 .EQU CAN4_MSK3R_MSK10, 10 .EQU CAN4_MSK3R_MSK9, 9 .EQU CAN4_MSK3R_MSK8, 8 .EQU CAN4_MSK3R_MSK7, 7 .EQU CAN4_MSK3R_MSK6, 6 .EQU CAN4_MSK3R_MSK5, 5 .EQU CAN4_MSK3R_MSK4, 4 .EQU CAN4_MSK3R_MSK3, 3 .EQU CAN4_MSK3R_MSK2, 2 .EQU CAN4_MSK3R_MSK1, 1 .EQU CAN4_MSK3R_MSK0, 0 // register------------------------------------- .EQU CAN4_ACR4R, 0x40002918 // 0x4000 2918 CAN4_ACR4R Bits------------------------------------- .EQU CAN4_ACR4R_ACR31, 31 .EQU CAN4_ACR4R_ACR30, 30 .EQU CAN4_ACR4R_ACR29, 29 .EQU CAN4_ACR4R_ACR28, 28 .EQU CAN4_ACR4R_ACR27, 27 .EQU CAN4_ACR4R_ACR26, 26 .EQU CAN4_ACR4R_ACR25, 25 .EQU CAN4_ACR4R_ACR24, 24 .EQU CAN4_ACR4R_ACR23, 23 .EQU CAN4_ACR4R_ACR22, 22 .EQU CAN4_ACR4R_ACR21, 21 .EQU CAN4_ACR4R_ACR20, 20 .EQU CAN4_ACR4R_ACR19, 19 .EQU CAN4_ACR4R_ACR18, 18 .EQU CAN4_ACR4R_ACR17, 17 .EQU CAN4_ACR4R_ACR16, 16 .EQU CAN4_ACR4R_ACR15, 15 .EQU CAN4_ACR4R_ACR14, 14 .EQU CAN4_ACR4R_ACR13, 13 .EQU CAN4_ACR4R_ACR12, 12 .EQU CAN4_ACR4R_ACR11, 11 .EQU CAN4_ACR4R_ACR10, 10 .EQU CAN4_ACR4R_ACR9, 9 .EQU CAN4_ACR4R_ACR8, 8 .EQU CAN4_ACR4R_ACR7, 7 .EQU CAN4_ACR4R_ACR6, 6 .EQU CAN4_ACR4R_ACR5, 5 .EQU CAN4_ACR4R_ACR4, 4 .EQU CAN4_ACR4R_ACR3, 3 .EQU CAN4_ACR4R_ACR2, 2 .EQU CAN4_ACR4R_ACR1, 1 .EQU CAN4_ACR4R_ACR0, 0 // register------------------------------------- .EQU CAN4_MSK4R, 0x4000291C // 0x4000 291C CAN4_MSK4R Bits------------------------------------- .EQU CAN4_MSK4R_MSK31, 31 .EQU CAN4_MSK4R_MSK30, 30 .EQU CAN4_MSK4R_MSK29, 29 .EQU CAN4_MSK4R_MSK28, 28 .EQU CAN4_MSK4R_MSK27, 27 .EQU CAN4_MSK4R_MSK26, 26 .EQU CAN4_MSK4R_MSK25, 25 .EQU CAN4_MSK4R_MSK24, 24 .EQU CAN4_MSK4R_MSK23, 23 .EQU CAN4_MSK4R_MSK22, 22 .EQU CAN4_MSK4R_MSK21, 21 .EQU CAN4_MSK4R_MSK20, 20 .EQU CAN4_MSK4R_MSK19, 19 .EQU CAN4_MSK4R_MSK18, 18 .EQU CAN4_MSK4R_MSK17, 17 .EQU CAN4_MSK4R_MSK16, 16 .EQU CAN4_MSK4R_MSK15, 15 .EQU CAN4_MSK4R_MSK14, 14 .EQU CAN4_MSK4R_MSK13, 13 .EQU CAN4_MSK4R_MSK12, 12 .EQU CAN4_MSK4R_MSK11, 11 .EQU CAN4_MSK4R_MSK10, 10 .EQU CAN4_MSK4R_MSK9, 9 .EQU CAN4_MSK4R_MSK8, 8 .EQU CAN4_MSK4R_MSK7, 7 .EQU CAN4_MSK4R_MSK6, 6 .EQU CAN4_MSK4R_MSK5, 5 .EQU CAN4_MSK4R_MSK4, 4 .EQU CAN4_MSK4R_MSK3, 3 .EQU CAN4_MSK4R_MSK2, 2 .EQU CAN4_MSK4R_MSK1, 1 .EQU CAN4_MSK4R_MSK0, 0 // register------------------------------------- .EQU CAN4_ACR5R, 0x40002920 // 0x4000 2920 CAN4_ACR5R Bits------------------------------------- .EQU CAN4_ACR5R_ACR31, 31 .EQU CAN4_ACR5R_ACR30, 30 .EQU CAN4_ACR5R_ACR29, 29 .EQU CAN4_ACR5R_ACR28, 28 .EQU CAN4_ACR5R_ACR27, 27 .EQU CAN4_ACR5R_ACR26, 26 .EQU CAN4_ACR5R_ACR25, 25 .EQU CAN4_ACR5R_ACR24, 24 .EQU CAN4_ACR5R_ACR23, 23 .EQU CAN4_ACR5R_ACR22, 22 .EQU CAN4_ACR5R_ACR21, 21 .EQU CAN4_ACR5R_ACR20, 20 .EQU CAN4_ACR5R_ACR19, 19 .EQU CAN4_ACR5R_ACR18, 18 .EQU CAN4_ACR5R_ACR17, 17 .EQU CAN4_ACR5R_ACR16, 16 .EQU CAN4_ACR5R_ACR15, 15 .EQU CAN4_ACR5R_ACR14, 14 .EQU CAN4_ACR5R_ACR13, 13 .EQU CAN4_ACR5R_ACR12, 12 .EQU CAN4_ACR5R_ACR11, 11 .EQU CAN4_ACR5R_ACR10, 10 .EQU CAN4_ACR5R_ACR9, 9 .EQU CAN4_ACR5R_ACR8, 8 .EQU CAN4_ACR5R_ACR7, 7 .EQU CAN4_ACR5R_ACR6, 6 .EQU CAN4_ACR5R_ACR5, 5 .EQU CAN4_ACR5R_ACR4, 4 .EQU CAN4_ACR5R_ACR3, 3 .EQU CAN4_ACR5R_ACR2, 2 .EQU CAN4_ACR5R_ACR1, 1 .EQU CAN4_ACR5R_ACR0, 0 // register------------------------------------- .EQU CAN4_MSK5R, 0x40002924 // 0x4000 2924 CAN4_MSK5R Bits------------------------------------- .EQU CAN4_MSK5R_MSK31, 31 .EQU CAN4_MSK5R_MSK30, 30 .EQU CAN4_MSK5R_MSK29, 29 .EQU CAN4_MSK5R_MSK28, 28 .EQU CAN4_MSK5R_MSK27, 27 .EQU CAN4_MSK5R_MSK26, 26 .EQU CAN4_MSK5R_MSK25, 25 .EQU CAN4_MSK5R_MSK24, 24 .EQU CAN4_MSK5R_MSK23, 23 .EQU CAN4_MSK5R_MSK22, 22 .EQU CAN4_MSK5R_MSK21, 21 .EQU CAN4_MSK5R_MSK20, 20 .EQU CAN4_MSK5R_MSK19, 19 .EQU CAN4_MSK5R_MSK18, 18 .EQU CAN4_MSK5R_MSK17, 17 .EQU CAN4_MSK5R_MSK16, 16 .EQU CAN4_MSK5R_MSK15, 15 .EQU CAN4_MSK5R_MSK14, 14 .EQU CAN4_MSK5R_MSK13, 13 .EQU CAN4_MSK5R_MSK12, 12 .EQU CAN4_MSK5R_MSK11, 11 .EQU CAN4_MSK5R_MSK10, 10 .EQU CAN4_MSK5R_MSK9, 9 .EQU CAN4_MSK5R_MSK8, 8 .EQU CAN4_MSK5R_MSK7, 7 .EQU CAN4_MSK5R_MSK6, 6 .EQU CAN4_MSK5R_MSK5, 5 .EQU CAN4_MSK5R_MSK4, 4 .EQU CAN4_MSK5R_MSK3, 3 .EQU CAN4_MSK5R_MSK2, 2 .EQU CAN4_MSK5R_MSK1, 1 .EQU CAN4_MSK5R_MSK0, 0 // register------------------------------------- .EQU CAN4_ACR6R, 0x40002928 // 0x4000 2928 CAN4_ACR6R Bits------------------------------------- .EQU CAN4_ACR6R_ACR31, 31 .EQU CAN4_ACR6R_ACR30, 30 .EQU CAN4_ACR6R_ACR29, 29 .EQU CAN4_ACR6R_ACR28, 28 .EQU CAN4_ACR6R_ACR27, 27 .EQU CAN4_ACR6R_ACR26, 26 .EQU CAN4_ACR6R_ACR25, 25 .EQU CAN4_ACR6R_ACR24, 24 .EQU CAN4_ACR6R_ACR23, 23 .EQU CAN4_ACR6R_ACR22, 22 .EQU CAN4_ACR6R_ACR21, 21 .EQU CAN4_ACR6R_ACR20, 20 .EQU CAN4_ACR6R_ACR19, 19 .EQU CAN4_ACR6R_ACR18, 18 .EQU CAN4_ACR6R_ACR17, 17 .EQU CAN4_ACR6R_ACR16, 16 .EQU CAN4_ACR6R_ACR15, 15 .EQU CAN4_ACR6R_ACR14, 14 .EQU CAN4_ACR6R_ACR13, 13 .EQU CAN4_ACR6R_ACR12, 12 .EQU CAN4_ACR6R_ACR11, 11 .EQU CAN4_ACR6R_ACR10, 10 .EQU CAN4_ACR6R_ACR9, 9 .EQU CAN4_ACR6R_ACR8, 8 .EQU CAN4_ACR6R_ACR7, 7 .EQU CAN4_ACR6R_ACR6, 6 .EQU CAN4_ACR6R_ACR5, 5 .EQU CAN4_ACR6R_ACR4, 4 .EQU CAN4_ACR6R_ACR3, 3 .EQU CAN4_ACR6R_ACR2, 2 .EQU CAN4_ACR6R_ACR1, 1 .EQU CAN4_ACR6R_ACR0, 0 // register------------------------------------- .EQU CAN4_MSK6R, 0x4000292C // 0x4000 292C CAN4_MSK6R Bits------------------------------------- .EQU CAN4_MSK6R_MSK31, 31 .EQU CAN4_MSK6R_MSK30, 30 .EQU CAN4_MSK6R_MSK29, 29 .EQU CAN4_MSK6R_MSK28, 28 .EQU CAN4_MSK6R_MSK27, 27 .EQU CAN4_MSK6R_MSK26, 26 .EQU CAN4_MSK6R_MSK25, 25 .EQU CAN4_MSK6R_MSK24, 24 .EQU CAN4_MSK6R_MSK23, 23 .EQU CAN4_MSK6R_MSK22, 22 .EQU CAN4_MSK6R_MSK21, 21 .EQU CAN4_MSK6R_MSK20, 20 .EQU CAN4_MSK6R_MSK19, 19 .EQU CAN4_MSK6R_MSK18, 18 .EQU CAN4_MSK6R_MSK17, 17 .EQU CAN4_MSK6R_MSK16, 16 .EQU CAN4_MSK6R_MSK15, 15 .EQU CAN4_MSK6R_MSK14, 14 .EQU CAN4_MSK6R_MSK13, 13 .EQU CAN4_MSK6R_MSK12, 12 .EQU CAN4_MSK6R_MSK11, 11 .EQU CAN4_MSK6R_MSK10, 10 .EQU CAN4_MSK6R_MSK9, 9 .EQU CAN4_MSK6R_MSK8, 8 .EQU CAN4_MSK6R_MSK7, 7 .EQU CAN4_MSK6R_MSK6, 6 .EQU CAN4_MSK6R_MSK5, 5 .EQU CAN4_MSK6R_MSK4, 4 .EQU CAN4_MSK6R_MSK3, 3 .EQU CAN4_MSK6R_MSK2, 2 .EQU CAN4_MSK6R_MSK1, 1 .EQU CAN4_MSK6R_MSK0, 0 // register------------------------------------- .EQU CAN4_ACR7R, 0x40002930 // 0x4000 2930 CAN4_ACR7R Bits------------------------------------- .EQU CAN4_ACR7R_ACR31, 31 .EQU CAN4_ACR7R_ACR30, 30 .EQU CAN4_ACR7R_ACR29, 29 .EQU CAN4_ACR7R_ACR28, 28 .EQU CAN4_ACR7R_ACR27, 27 .EQU CAN4_ACR7R_ACR26, 26 .EQU CAN4_ACR7R_ACR25, 25 .EQU CAN4_ACR7R_ACR24, 24 .EQU CAN4_ACR7R_ACR23, 23 .EQU CAN4_ACR7R_ACR22, 22 .EQU CAN4_ACR7R_ACR21, 21 .EQU CAN4_ACR7R_ACR20, 20 .EQU CAN4_ACR7R_ACR19, 19 .EQU CAN4_ACR7R_ACR18, 18 .EQU CAN4_ACR7R_ACR17, 17 .EQU CAN4_ACR7R_ACR16, 16 .EQU CAN4_ACR7R_ACR15, 15 .EQU CAN4_ACR7R_ACR14, 14 .EQU CAN4_ACR7R_ACR13, 13 .EQU CAN4_ACR7R_ACR12, 12 .EQU CAN4_ACR7R_ACR11, 11 .EQU CAN4_ACR7R_ACR10, 10 .EQU CAN4_ACR7R_ACR9, 9 .EQU CAN4_ACR7R_ACR8, 8 .EQU CAN4_ACR7R_ACR7, 7 .EQU CAN4_ACR7R_ACR6, 6 .EQU CAN4_ACR7R_ACR5, 5 .EQU CAN4_ACR7R_ACR4, 4 .EQU CAN4_ACR7R_ACR3, 3 .EQU CAN4_ACR7R_ACR2, 2 .EQU CAN4_ACR7R_ACR1, 1 .EQU CAN4_ACR7R_ACR0, 0 // register------------------------------------- .EQU CAN4_MSK7R, 0x40002934 // 0x4000 2934 CAN4_MSK7R Bits------------------------------------- .EQU CAN4_MSK7R_MSK31, 31 .EQU CAN4_MSK7R_MSK30, 30 .EQU CAN4_MSK7R_MSK29, 29 .EQU CAN4_MSK7R_MSK28, 28 .EQU CAN4_MSK7R_MSK27, 27 .EQU CAN4_MSK7R_MSK26, 26 .EQU CAN4_MSK7R_MSK25, 25 .EQU CAN4_MSK7R_MSK24, 24 .EQU CAN4_MSK7R_MSK23, 23 .EQU CAN4_MSK7R_MSK22, 22 .EQU CAN4_MSK7R_MSK21, 21 .EQU CAN4_MSK7R_MSK20, 20 .EQU CAN4_MSK7R_MSK19, 19 .EQU CAN4_MSK7R_MSK18, 18 .EQU CAN4_MSK7R_MSK17, 17 .EQU CAN4_MSK7R_MSK16, 16 .EQU CAN4_MSK7R_MSK15, 15 .EQU CAN4_MSK7R_MSK14, 14 .EQU CAN4_MSK7R_MSK13, 13 .EQU CAN4_MSK7R_MSK12, 12 .EQU CAN4_MSK7R_MSK11, 11 .EQU CAN4_MSK7R_MSK10, 10 .EQU CAN4_MSK7R_MSK9, 9 .EQU CAN4_MSK7R_MSK8, 8 .EQU CAN4_MSK7R_MSK7, 7 .EQU CAN4_MSK7R_MSK6, 6 .EQU CAN4_MSK7R_MSK5, 5 .EQU CAN4_MSK7R_MSK4, 4 .EQU CAN4_MSK7R_MSK3, 3 .EQU CAN4_MSK7R_MSK2, 2 .EQU CAN4_MSK7R_MSK1, 1 .EQU CAN4_MSK7R_MSK0, 0 // register------------------------------------- .EQU CAN4_ACR8R, 0x40002938 // 0x4000 2938 CAN4_ACR8R Bits------------------------------------- .EQU CAN4_ACR8R_ACR31, 31 .EQU CAN4_ACR8R_ACR30, 30 .EQU CAN4_ACR8R_ACR29, 29 .EQU CAN4_ACR8R_ACR28, 28 .EQU CAN4_ACR8R_ACR27, 27 .EQU CAN4_ACR8R_ACR26, 26 .EQU CAN4_ACR8R_ACR25, 25 .EQU CAN4_ACR8R_ACR24, 24 .EQU CAN4_ACR8R_ACR23, 23 .EQU CAN4_ACR8R_ACR22, 22 .EQU CAN4_ACR8R_ACR21, 21 .EQU CAN4_ACR8R_ACR20, 20 .EQU CAN4_ACR8R_ACR19, 19 .EQU CAN4_ACR8R_ACR18, 18 .EQU CAN4_ACR8R_ACR17, 17 .EQU CAN4_ACR8R_ACR16, 16 .EQU CAN4_ACR8R_ACR15, 15 .EQU CAN4_ACR8R_ACR14, 14 .EQU CAN4_ACR8R_ACR13, 13 .EQU CAN4_ACR8R_ACR12, 12 .EQU CAN4_ACR8R_ACR11, 11 .EQU CAN4_ACR8R_ACR10, 10 .EQU CAN4_ACR8R_ACR9, 9 .EQU CAN4_ACR8R_ACR8, 8 .EQU CAN4_ACR8R_ACR7, 7 .EQU CAN4_ACR8R_ACR6, 6 .EQU CAN4_ACR8R_ACR5, 5 .EQU CAN4_ACR8R_ACR4, 4 .EQU CAN4_ACR8R_ACR3, 3 .EQU CAN4_ACR8R_ACR2, 2 .EQU CAN4_ACR8R_ACR1, 1 .EQU CAN4_ACR8R_ACR0, 0 // register------------------------------------- .EQU CAN4_MSK8R, 0x4000293C // 0x4000 293C CAN4_MSK8R Bits------------------------------------- .EQU CAN4_MSK8R_MSK31, 31 .EQU CAN4_MSK8R_MSK30, 30 .EQU CAN4_MSK8R_MSK29, 29 .EQU CAN4_MSK8R_MSK28, 28 .EQU CAN4_MSK8R_MSK27, 27 .EQU CAN4_MSK8R_MSK26, 26 .EQU CAN4_MSK8R_MSK25, 25 .EQU CAN4_MSK8R_MSK24, 24 .EQU CAN4_MSK8R_MSK23, 23 .EQU CAN4_MSK8R_MSK22, 22 .EQU CAN4_MSK8R_MSK21, 21 .EQU CAN4_MSK8R_MSK20, 20 .EQU CAN4_MSK8R_MSK19, 19 .EQU CAN4_MSK8R_MSK18, 18 .EQU CAN4_MSK8R_MSK17, 17 .EQU CAN4_MSK8R_MSK16, 16 .EQU CAN4_MSK8R_MSK15, 15 .EQU CAN4_MSK8R_MSK14, 14 .EQU CAN4_MSK8R_MSK13, 13 .EQU CAN4_MSK8R_MSK12, 12 .EQU CAN4_MSK8R_MSK11, 11 .EQU CAN4_MSK8R_MSK10, 10 .EQU CAN4_MSK8R_MSK9, 9 .EQU CAN4_MSK8R_MSK8, 8 .EQU CAN4_MSK8R_MSK7, 7 .EQU CAN4_MSK8R_MSK6, 6 .EQU CAN4_MSK8R_MSK5, 5 .EQU CAN4_MSK8R_MSK4, 4 .EQU CAN4_MSK8R_MSK3, 3 .EQU CAN4_MSK8R_MSK2, 2 .EQU CAN4_MSK8R_MSK1, 1 .EQU CAN4_MSK8R_MSK0, 0 // register------------------------------------- .EQU CFGL1_CTL0, 0x40002980 // 0x4000 2980 CFGL1_CTL0 Bits------------------------------------- .EQU CFGL1_CTL0_EN, 31 .EQU CFGL1_CTL0_OE, 30 .EQU CFGL1_CTL0_INTP, 29 .EQU CFGL1_CTL0_INTN, 28 .EQU CFGL1_CTL0_MD2, 27 .EQU CFGL1_CTL0_MD1, 26 .EQU CFGL1_CTL0_MD0, 25 .EQU CFGL1_CTL0_POL, 24 .EQU CFGL1_CTL0_G4POL, 23 .EQU CFGL1_CTL0_G3POL, 22 .EQU CFGL1_CTL0_G2POL, 21 .EQU CFGL1_CTL0_G1POL, 20 .EQU CFGL1_CTL0_D4S2, 18 .EQU CFGL1_CTL0_D4S1, 17 .EQU CFGL1_CTL0_D4S0, 16 .EQU CFGL1_CTL0_D3S2, 14 .EQU CFGL1_CTL0_D3S1, 13 .EQU CFGL1_CTL0_D3S0, 12 .EQU CFGL1_CTL0_D2S2, 10 .EQU CFGL1_CTL0_D2S1, 9 .EQU CFGL1_CTL0_D2S0, 8 .EQU CFGL1_CTL0_D1S2, 6 .EQU CFGL1_CTL0_D1S1, 5 .EQU CFGL1_CTL0_D1S0, 4 .EQU CFGL1_CTL0_REGIN, 3 .EQU CFGL1_CTL0_TPSEL2, 2 .EQU CFGL1_CTL0_TPSEL1, 1 .EQU CFGL1_CTL0_TPSEL0, 0 // register------------------------------------- .EQU CFGL1_CTL1, 0x40002984 // 0x4000 2984 CFGL1_CTL1 Bits------------------------------------- .EQU CFGL1_CTL1_G4D4T, 31 .EQU CFGL1_CTL1_G4D4N, 30 .EQU CFGL1_CTL1_G4D3T, 29 .EQU CFGL1_CTL1_G4D3N, 28 .EQU CFGL1_CTL1_G4D2T, 27 .EQU CFGL1_CTL1_G4D2N, 26 .EQU CFGL1_CTL1_G4D1T, 25 .EQU CFGL1_CTL1_G4D1N, 24 .EQU CFGL1_CTL1_G3D4T, 23 .EQU CFGL1_CTL1_G3D4N, 22 .EQU CFGL1_CTL1_G3D3T, 21 .EQU CFGL1_CTL1_G3D3N, 20 .EQU CFGL1_CTL1_G3D2T, 19 .EQU CFGL1_CTL1_G3D2N, 18 .EQU CFGL1_CTL1_G3D1T, 17 .EQU CFGL1_CTL1_G3D1N, 16 .EQU CFGL1_CTL1_G2D4T, 15 .EQU CFGL1_CTL1_G2D4N, 14 .EQU CFGL1_CTL1_G2D3T, 13 .EQU CFGL1_CTL1_G2D3N, 12 .EQU CFGL1_CTL1_G2D2T, 11 .EQU CFGL1_CTL1_G2D2N, 10 .EQU CFGL1_CTL1_G2D1T, 9 .EQU CFGL1_CTL1_G2D1N, 8 .EQU CFGL1_CTL1_G1D4T, 7 .EQU CFGL1_CTL1_G1D4N, 6 .EQU CFGL1_CTL1_G1D3T, 5 .EQU CFGL1_CTL1_G1D3N, 4 .EQU CFGL1_CTL1_G1D2T, 3 .EQU CFGL1_CTL1_G1D2N, 2 .EQU CFGL1_CTL1_G1D1T, 1 .EQU CFGL1_CTL1_G1D1N, 0 // register------------------------------------- .EQU CFGL2_CTL0, 0x40002988 // 0x4000 2988 CFGL2_CTL0 Bits------------------------------------- .EQU CFGL2_CTL0_EN, 31 .EQU CFGL2_CTL0_OE, 30 .EQU CFGL2_CTL0_INTP, 29 .EQU CFGL2_CTL0_INTN, 28 .EQU CFGL2_CTL0_MD2, 27 .EQU CFGL2_CTL0_MD1, 26 .EQU CFGL2_CTL0_MD0, 25 .EQU CFGL2_CTL0_POL, 24 .EQU CFGL2_CTL0_G4POL, 23 .EQU CFGL2_CTL0_G3POL, 22 .EQU CFGL2_CTL0_G2POL, 21 .EQU CFGL2_CTL0_G1POL, 20 .EQU CFGL2_CTL0_D4S2, 18 .EQU CFGL2_CTL0_D4S1, 17 .EQU CFGL2_CTL0_D4S0, 16 .EQU CFGL2_CTL0_D3S2, 14 .EQU CFGL2_CTL0_D3S1, 13 .EQU CFGL2_CTL0_D3S0, 12 .EQU CFGL2_CTL0_D2S2, 10 .EQU CFGL2_CTL0_D2S1, 9 .EQU CFGL2_CTL0_D2S0, 8 .EQU CFGL2_CTL0_D1S2, 6 .EQU CFGL2_CTL0_D1S1, 5 .EQU CFGL2_CTL0_D1S0, 4 .EQU CFGL2_CTL0_REGIN, 3 .EQU CFGL2_CTL0_TPSEL2, 2 .EQU CFGL2_CTL0_TPSEL1, 1 .EQU CFGL2_CTL0_TPSEL0, 0 // register------------------------------------- .EQU CFGL2_CTL1, 0x4000298C // 0x4000 298C CFGL2_CTL1 Bits------------------------------------- .EQU CFGL2_CTL1_G4D4T, 31 .EQU CFGL2_CTL1_G4D4N, 30 .EQU CFGL2_CTL1_G4D3T, 29 .EQU CFGL2_CTL1_G4D3N, 28 .EQU CFGL2_CTL1_G4D2T, 27 .EQU CFGL2_CTL1_G4D2N, 26 .EQU CFGL2_CTL1_G4D1T, 25 .EQU CFGL2_CTL1_G4D1N, 24 .EQU CFGL2_CTL1_G3D4T, 23 .EQU CFGL2_CTL1_G3D4N, 22 .EQU CFGL2_CTL1_G3D3T, 21 .EQU CFGL2_CTL1_G3D3N, 20 .EQU CFGL2_CTL1_G3D2T, 19 .EQU CFGL2_CTL1_G3D2N, 18 .EQU CFGL2_CTL1_G3D1T, 17 .EQU CFGL2_CTL1_G3D1N, 16 .EQU CFGL2_CTL1_G2D4T, 15 .EQU CFGL2_CTL1_G2D4N, 14 .EQU CFGL2_CTL1_G2D3T, 13 .EQU CFGL2_CTL1_G2D3N, 12 .EQU CFGL2_CTL1_G2D2T, 11 .EQU CFGL2_CTL1_G2D2N, 10 .EQU CFGL2_CTL1_G2D1T, 9 .EQU CFGL2_CTL1_G2D1N, 8 .EQU CFGL2_CTL1_G1D4T, 7 .EQU CFGL2_CTL1_G1D4N, 6 .EQU CFGL2_CTL1_G1D3T, 5 .EQU CFGL2_CTL1_G1D3N, 4 .EQU CFGL2_CTL1_G1D2T, 3 .EQU CFGL2_CTL1_G1D2N, 2 .EQU CFGL2_CTL1_G1D1T, 1 .EQU CFGL2_CTL1_G1D1N, 0 // register------------------------------------- .EQU CFGL_IFR, 0x40002990 // 0x4000 2990 CFGL_IFR Bits------------------------------------- .EQU CFGL_IFR_CFGL2SYNCEN, 31 .EQU CFGL_IFR_CFGL1SYNCEN, 30 .EQU CFGL_IFR_CFGL2IE, 29 .EQU CFGL_IFR_CFGL1IE, 28 .EQU CFGL_IFR_FDIV3, 24 .EQU CFGL_IFR_FDIV2, 23 .EQU CFGL_IFR_FDIV1, 22 .EQU CFGL_IFR_FDIV0, 21 .EQU CFGL_IFR_FDELAY2, 20 .EQU CFGL_IFR_FDELAY1, 19 .EQU CFGL_IFR_FDELAY0, 18 .EQU CFGL_IFR_CLC2FEN3, 17 .EQU CFGL_IFR_CLC2FEN2, 16 .EQU CFGL_IFR_CLC2FEN1, 15 .EQU CFGL_IFR_CLC2FEN0, 14 .EQU CFGL_IFR_CLC1FEN3, 13 .EQU CFGL_IFR_CLC1FEN2, 12 .EQU CFGL_IFR_CLC1FEN1, 11 .EQU CFGL_IFR_CLC1FEN0, 10 .EQU CFGL_IFR_CFGL2IF, 9 .EQU CFGL_IFR_CFGL1IF, 8 .EQU CFGL_IFR_CFGL1C, 2 .EQU CFGL_IFR_CFGL2OUT, 1 .EQU CFGL_IFR_CFGL1OUT, 0 // register------------------------------------- .EQU ECFGL0_CTL, 0x40002A80 // 0x4000 2A80 ECFGL0_CTL Bits------------------------------------- .EQU ECFGL0_CTL_EN, 12 .EQU ECFGL0_CTL_FUNSEL3, 11 .EQU ECFGL0_CTL_FUNSEL2, 10 .EQU ECFGL0_CTL_FUNSEL1, 9 .EQU ECFGL0_CTL_FUNSEL0, 8 .EQU ECFGL0_CTL_MUX4SEL, 6 .EQU ECFGL0_CTL_MUX3SEL, 5 .EQU ECFGL0_CTL_MUX2SEL, 4 .EQU ECFGL0_CTL_MUX1SEL1, 3 .EQU ECFGL0_CTL_MUX1SEL0, 2 .EQU ECFGL0_CTL_MUX0SEL1, 1 .EQU ECFGL0_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL1_CTL, 0x40002A84 // 0x4000 2A84 ECFGL1_CTL Bits------------------------------------- .EQU ECFGL1_CTL_EN, 12 .EQU ECFGL1_CTL_FUNSEL3, 11 .EQU ECFGL1_CTL_FUNSEL2, 10 .EQU ECFGL1_CTL_FUNSEL1, 9 .EQU ECFGL1_CTL_FUNSEL0, 8 .EQU ECFGL1_CTL_MUX4SEL, 6 .EQU ECFGL1_CTL_MUX3SEL, 5 .EQU ECFGL1_CTL_MUX2SEL, 4 .EQU ECFGL1_CTL_MUX1SEL1, 3 .EQU ECFGL1_CTL_MUX1SEL0, 2 .EQU ECFGL1_CTL_MUX0SEL1, 1 .EQU ECFGL1_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL2_CTL, 0x40002A88 // 0x4000 2A88 ECFGL2_CTL Bits------------------------------------- .EQU ECFGL2_CTL_EN, 12 .EQU ECFGL2_CTL_FUNSEL3, 11 .EQU ECFGL2_CTL_FUNSEL2, 10 .EQU ECFGL2_CTL_FUNSEL1, 9 .EQU ECFGL2_CTL_FUNSEL0, 8 .EQU ECFGL2_CTL_MUX4SEL, 6 .EQU ECFGL2_CTL_MUX3SEL, 5 .EQU ECFGL2_CTL_MUX2SEL, 4 .EQU ECFGL2_CTL_MUX1SEL1, 3 .EQU ECFGL2_CTL_MUX1SEL0, 2 .EQU ECFGL2_CTL_MUX0SEL1, 1 .EQU ECFGL2_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL3_CTL, 0x40002A8C // 0x4000 2A8C ECFGL3_CTL Bits------------------------------------- .EQU ECFGL3_CTL_EN, 12 .EQU ECFGL3_CTL_FUNSEL3, 11 .EQU ECFGL3_CTL_FUNSEL2, 10 .EQU ECFGL3_CTL_FUNSEL1, 9 .EQU ECFGL3_CTL_FUNSEL0, 8 .EQU ECFGL3_CTL_MUX4SEL, 6 .EQU ECFGL3_CTL_MUX3SEL, 5 .EQU ECFGL3_CTL_MUX2SEL, 4 .EQU ECFGL3_CTL_MUX1SEL1, 3 .EQU ECFGL3_CTL_MUX1SEL0, 2 .EQU ECFGL3_CTL_MUX0SEL1, 1 .EQU ECFGL3_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL4_CTL, 0x40002A90 // 0x4000 2A90 ECFGL4_CTL Bits------------------------------------- .EQU ECFGL4_CTL_EN, 12 .EQU ECFGL4_CTL_FUNSEL3, 11 .EQU ECFGL4_CTL_FUNSEL2, 10 .EQU ECFGL4_CTL_FUNSEL1, 9 .EQU ECFGL4_CTL_FUNSEL0, 8 .EQU ECFGL4_CTL_MUX4SEL, 6 .EQU ECFGL4_CTL_MUX3SEL, 5 .EQU ECFGL4_CTL_MUX2SEL, 4 .EQU ECFGL4_CTL_MUX1SEL1, 3 .EQU ECFGL4_CTL_MUX1SEL0, 2 .EQU ECFGL4_CTL_MUX0SEL1, 1 .EQU ECFGL4_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL5_CTL, 0x40002A94 // 0x4000 2A94 ECFGL5_CTL Bits------------------------------------- .EQU ECFGL5_CTL_EN, 12 .EQU ECFGL5_CTL_FUNSEL3, 11 .EQU ECFGL5_CTL_FUNSEL2, 10 .EQU ECFGL5_CTL_FUNSEL1, 9 .EQU ECFGL5_CTL_FUNSEL0, 8 .EQU ECFGL5_CTL_MUX4SEL, 6 .EQU ECFGL5_CTL_MUX3SEL, 5 .EQU ECFGL5_CTL_MUX2SEL, 4 .EQU ECFGL5_CTL_MUX1SEL1, 3 .EQU ECFGL5_CTL_MUX1SEL0, 2 .EQU ECFGL5_CTL_MUX0SEL1, 1 .EQU ECFGL5_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL6_CTL, 0x40002A98 // 0x4000 2A98 ECFGL6_CTL Bits------------------------------------- .EQU ECFGL6_CTL_EN, 12 .EQU ECFGL6_CTL_FUNSEL3, 11 .EQU ECFGL6_CTL_FUNSEL2, 10 .EQU ECFGL6_CTL_FUNSEL1, 9 .EQU ECFGL6_CTL_FUNSEL0, 8 .EQU ECFGL6_CTL_MUX4SEL, 6 .EQU ECFGL6_CTL_MUX3SEL, 5 .EQU ECFGL6_CTL_MUX2SEL, 4 .EQU ECFGL6_CTL_MUX1SEL1, 3 .EQU ECFGL6_CTL_MUX1SEL0, 2 .EQU ECFGL6_CTL_MUX0SEL1, 1 .EQU ECFGL6_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL7_CTL, 0x40002A9C // 0x4000 2A9C ECFGL7_CTL Bits------------------------------------- .EQU ECFGL7_CTL_EN, 12 .EQU ECFGL7_CTL_FUNSEL3, 11 .EQU ECFGL7_CTL_FUNSEL2, 10 .EQU ECFGL7_CTL_FUNSEL1, 9 .EQU ECFGL7_CTL_FUNSEL0, 8 .EQU ECFGL7_CTL_MUX4SEL, 6 .EQU ECFGL7_CTL_MUX3SEL, 5 .EQU ECFGL7_CTL_MUX2SEL, 4 .EQU ECFGL7_CTL_MUX1SEL1, 3 .EQU ECFGL7_CTL_MUX1SEL0, 2 .EQU ECFGL7_CTL_MUX0SEL1, 1 .EQU ECFGL7_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL8_CTL, 0x40002AA0 // 0x4000 2AA0 ECFGL8_CTL Bits------------------------------------- .EQU ECFGL8_CTL_EN, 12 .EQU ECFGL8_CTL_FUNSEL3, 11 .EQU ECFGL8_CTL_FUNSEL2, 10 .EQU ECFGL8_CTL_FUNSEL1, 9 .EQU ECFGL8_CTL_FUNSEL0, 8 .EQU ECFGL8_CTL_MUX4SEL, 6 .EQU ECFGL8_CTL_MUX3SEL, 5 .EQU ECFGL8_CTL_MUX2SEL, 4 .EQU ECFGL8_CTL_MUX1SEL1, 3 .EQU ECFGL8_CTL_MUX1SEL0, 2 .EQU ECFGL8_CTL_MUX0SEL1, 1 .EQU ECFGL8_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL9_CTL, 0x40002AA4 // 0x4000 2AA4 ECFGL9_CTL Bits------------------------------------- .EQU ECFGL9_CTL_EN, 12 .EQU ECFGL9_CTL_FUNSEL3, 11 .EQU ECFGL9_CTL_FUNSEL2, 10 .EQU ECFGL9_CTL_FUNSEL1, 9 .EQU ECFGL9_CTL_FUNSEL0, 8 .EQU ECFGL9_CTL_MUX4SEL, 6 .EQU ECFGL9_CTL_MUX3SEL, 5 .EQU ECFGL9_CTL_MUX2SEL, 4 .EQU ECFGL9_CTL_MUX1SEL1, 3 .EQU ECFGL9_CTL_MUX1SEL0, 2 .EQU ECFGL9_CTL_MUX0SEL1, 1 .EQU ECFGL9_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL10_CTL, 0x40002AA8 // 0x4000 2AA8 ECFGL10_CTL Bits------------------------------------- .EQU ECFGL10_CTL_EN, 12 .EQU ECFGL10_CTL_FUNSEL3, 11 .EQU ECFGL10_CTL_FUNSEL2, 10 .EQU ECFGL10_CTL_FUNSEL1, 9 .EQU ECFGL10_CTL_FUNSEL0, 8 .EQU ECFGL10_CTL_MUX4SEL, 6 .EQU ECFGL10_CTL_MUX3SEL, 5 .EQU ECFGL10_CTL_MUX2SEL, 4 .EQU ECFGL10_CTL_MUX1SEL1, 3 .EQU ECFGL10_CTL_MUX1SEL0, 2 .EQU ECFGL10_CTL_MUX0SEL1, 1 .EQU ECFGL10_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL11_CTL, 0x40002AAC // 0x4000 2AAC ECFGL11_CTL Bits------------------------------------- .EQU ECFGL11_CTL_EN, 12 .EQU ECFGL11_CTL_FUNSEL3, 11 .EQU ECFGL11_CTL_FUNSEL2, 10 .EQU ECFGL11_CTL_FUNSEL1, 9 .EQU ECFGL11_CTL_FUNSEL0, 8 .EQU ECFGL11_CTL_MUX4SEL, 6 .EQU ECFGL11_CTL_MUX3SEL, 5 .EQU ECFGL11_CTL_MUX2SEL, 4 .EQU ECFGL11_CTL_MUX1SEL1, 3 .EQU ECFGL11_CTL_MUX1SEL0, 2 .EQU ECFGL11_CTL_MUX0SEL1, 1 .EQU ECFGL11_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL12_CTL, 0x40002AB0 // 0x4000 2AB0 ECFGL12_CTL Bits------------------------------------- .EQU ECFGL12_CTL_EN, 12 .EQU ECFGL12_CTL_FUNSEL3, 11 .EQU ECFGL12_CTL_FUNSEL2, 10 .EQU ECFGL12_CTL_FUNSEL1, 9 .EQU ECFGL12_CTL_FUNSEL0, 8 .EQU ECFGL12_CTL_MUX4SEL, 6 .EQU ECFGL12_CTL_MUX3SEL, 5 .EQU ECFGL12_CTL_MUX2SEL, 4 .EQU ECFGL12_CTL_MUX1SEL1, 3 .EQU ECFGL12_CTL_MUX1SEL0, 2 .EQU ECFGL12_CTL_MUX0SEL1, 1 .EQU ECFGL12_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL13_CTL, 0x40002AB4 // 0x4000 2AB4 ECFGL13_CTL Bits------------------------------------- .EQU ECFGL13_CTL_EN, 12 .EQU ECFGL13_CTL_FUNSEL3, 11 .EQU ECFGL13_CTL_FUNSEL2, 10 .EQU ECFGL13_CTL_FUNSEL1, 9 .EQU ECFGL13_CTL_FUNSEL0, 8 .EQU ECFGL13_CTL_MUX4SEL, 6 .EQU ECFGL13_CTL_MUX3SEL, 5 .EQU ECFGL13_CTL_MUX2SEL, 4 .EQU ECFGL13_CTL_MUX1SEL1, 3 .EQU ECFGL13_CTL_MUX1SEL0, 2 .EQU ECFGL13_CTL_MUX0SEL1, 1 .EQU ECFGL13_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL14_CTL, 0x40002AB8 // 0x4000 2AB8 ECFGL14_CTL Bits------------------------------------- .EQU ECFGL14_CTL_EN, 12 .EQU ECFGL14_CTL_FUNSEL3, 11 .EQU ECFGL14_CTL_FUNSEL2, 10 .EQU ECFGL14_CTL_FUNSEL1, 9 .EQU ECFGL14_CTL_FUNSEL0, 8 .EQU ECFGL14_CTL_MUX4SEL, 6 .EQU ECFGL14_CTL_MUX3SEL, 5 .EQU ECFGL14_CTL_MUX2SEL, 4 .EQU ECFGL14_CTL_MUX1SEL1, 3 .EQU ECFGL14_CTL_MUX1SEL0, 2 .EQU ECFGL14_CTL_MUX0SEL1, 1 .EQU ECFGL14_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL15_CTL, 0x40002ABC // 0x4000 2ABC ECFGL15_CTL Bits------------------------------------- .EQU ECFGL15_CTL_EN, 12 .EQU ECFGL15_CTL_FUNSEL3, 11 .EQU ECFGL15_CTL_FUNSEL2, 10 .EQU ECFGL15_CTL_FUNSEL1, 9 .EQU ECFGL15_CTL_FUNSEL0, 8 .EQU ECFGL15_CTL_MUX4SEL, 6 .EQU ECFGL15_CTL_MUX3SEL, 5 .EQU ECFGL15_CTL_MUX2SEL, 4 .EQU ECFGL15_CTL_MUX1SEL1, 3 .EQU ECFGL15_CTL_MUX1SEL0, 2 .EQU ECFGL15_CTL_MUX0SEL1, 1 .EQU ECFGL15_CTL_MUX0SEL0, 0 // register------------------------------------- .EQU ECFGL_SOFTSEL, 0x40002AC0 // 0x4000 2AC0 ECFGL_SOFTSEL Bits------------------------------------- .EQU ECFGL_SOFTSEL_ECFGL15MUX2SOFTSEL, 15 .EQU ECFGL_SOFTSEL_ECFGL14MUX2SOFTSEL, 14 .EQU ECFGL_SOFTSEL_ECFGL13MUX2SOFTSEL, 13 .EQU ECFGL_SOFTSEL_ECFGL12MUX2SOFTSEL, 12 .EQU ECFGL_SOFTSEL_ECFGL11MUX2SOFTSEL, 11 .EQU ECFGL_SOFTSEL_ECFGL10MUX2SOFTSEL, 10 .EQU ECFGL_SOFTSEL_ECFGL9MUX2SOFTSEL, 9 .EQU ECFGL_SOFTSEL_ECFGL8MUX2SOFTSEL, 8 .EQU ECFGL_SOFTSEL_ECFGL7MUX2SOFTSEL, 7 .EQU ECFGL_SOFTSEL_ECFGL6MUX2SOFTSEL, 6 .EQU ECFGL_SOFTSEL_ECFGL5MUX2SOFTSEL, 5 .EQU ECFGL_SOFTSEL_ECFGL4MUX2SOFTSEL, 4 .EQU ECFGL_SOFTSEL_ECFGL3MUX2SOFTSEL, 3 .EQU ECFGL_SOFTSEL_ECFGL2MUX2SOFTSEL, 2 .EQU ECFGL_SOFTSEL_ECFGL1MUX2SOFTSEL, 1 .EQU ECFGL_SOFTSEL_ECFGL0MUX2SOFTSEL, 0 // register------------------------------------- .EQU ECFGL_FCLK, 0x40002AC4 // 0x4000 2AC4 ECFGL_FCLK Bits------------------------------------- .EQU ECFGL_FCLK_FCLKDIV2, 6 .EQU ECFGL_FCLK_FCLKDIV1, 5 .EQU ECFGL_FCLK_FCLKDIV0, 4 .EQU ECFGL_FCLK_FCLKSEL2, 2 .EQU ECFGL_FCLK_FCLKSEL1, 1 .EQU ECFGL_FCLK_FCLKSEL0, 0 // register------------------------------------- .EQU ECFGL_IC, 0x40002AC8 // 0x4000 2AC8 ECFGL_IC Bits------------------------------------- .EQU ECFGL_IC_ECFGLIC15, 15 .EQU ECFGL_IC_ECFGLIC14, 14 .EQU ECFGL_IC_ECFGLIC13, 13 .EQU ECFGL_IC_ECFGLIC12, 12 .EQU ECFGL_IC_ECFGLIC11, 11 .EQU ECFGL_IC_ECFGLIC10, 10 .EQU ECFGL_IC_ECFGLIC9, 9 .EQU ECFGL_IC_ECFGLIC8, 8 .EQU ECFGL_IC_ECFGLIC7, 7 .EQU ECFGL_IC_ECFGLIC6, 6 .EQU ECFGL_IC_ECFGLIC5, 5 .EQU ECFGL_IC_ECFGLIC4, 4 .EQU ECFGL_IC_ECFGLIC3, 3 .EQU ECFGL_IC_ECFGLIC2, 2 .EQU ECFGL_IC_ECFGLIC1, 1 .EQU ECFGL_IC_ECFGLIC0, 0 // register------------------------------------- .EQU ECFGL_IF, 0x40002ACC // 0x4000 2ACC ECFGL_IF Bits------------------------------------- .EQU ECFGL_IF_ECFGLIF15, 15 .EQU ECFGL_IF_ECFGLIF14, 14 .EQU ECFGL_IF_ECFGLIF13, 13 .EQU ECFGL_IF_ECFGLIF12, 12 .EQU ECFGL_IF_ECFGLIF11, 11 .EQU ECFGL_IF_ECFGLIF10, 10 .EQU ECFGL_IF_ECFGLIF9, 9 .EQU ECFGL_IF_ECFGLIF8, 8 .EQU ECFGL_IF_ECFGLIF7, 7 .EQU ECFGL_IF_ECFGLIF6, 6 .EQU ECFGL_IF_ECFGLIF5, 5 .EQU ECFGL_IF_ECFGLIF4, 4 .EQU ECFGL_IF_ECFGLIF3, 3 .EQU ECFGL_IF_ECFGLIF2, 2 .EQU ECFGL_IF_ECFGLIF1, 1 .EQU ECFGL_IF_ECFGLIF0, 0 // register------------------------------------- .EQU ECFGL_RFCTL, 0x40002AD0 // 0x4000 2AD0 ECFGL_RFCTL Bits------------------------------------- .EQU ECFGL_RFCTL_ECFGLR15, 15 .EQU ECFGL_RFCTL_ECFGLR14, 14 .EQU ECFGL_RFCTL_ECFGLR13, 13 .EQU ECFGL_RFCTL_ECFGLR12, 12 .EQU ECFGL_RFCTL_ECFGLR11, 11 .EQU ECFGL_RFCTL_ECFGLR10, 10 .EQU ECFGL_RFCTL_ECFGLR9, 9 .EQU ECFGL_RFCTL_ECFGLR8, 8 .EQU ECFGL_RFCTL_ECFGLR7, 7 .EQU ECFGL_RFCTL_ECFGLR6, 6 .EQU ECFGL_RFCTL_ECFGLR5, 5 .EQU ECFGL_RFCTL_ECFGLR4, 4 .EQU ECFGL_RFCTL_ECFGLR3, 3 .EQU ECFGL_RFCTL_ECFGLR2, 2 .EQU ECFGL_RFCTL_ECFGLR1, 1 .EQU ECFGL_RFCTL_ECFGLR0, 0 // register------------------------------------- .EQU ECFGL_FFCTL, 0x40002AD4 // 0x4000 2AD4 ECFGL_FFCTL Bits------------------------------------- .EQU ECFGL_FFCTL_ECFGLF15, 15 .EQU ECFGL_FFCTL_ECFGLF14, 14 .EQU ECFGL_FFCTL_ECFGLF13, 13 .EQU ECFGL_FFCTL_ECFGLF12, 12 .EQU ECFGL_FFCTL_ECFGLF11, 11 .EQU ECFGL_FFCTL_ECFGLF10, 10 .EQU ECFGL_FFCTL_ECFGLF9, 9 .EQU ECFGL_FFCTL_ECFGLF8, 8 .EQU ECFGL_FFCTL_ECFGLF7, 7 .EQU ECFGL_FFCTL_ECFGLF6, 6 .EQU ECFGL_FFCTL_ECFGLF5, 5 .EQU ECFGL_FFCTL_ECFGLF4, 4 .EQU ECFGL_FFCTL_ECFGLF3, 3 .EQU ECFGL_FFCTL_ECFGLF2, 2 .EQU ECFGL_FFCTL_ECFGLF1, 1 .EQU ECFGL_FFCTL_ECFGLF0, 0 // register------------------------------------- .EQU ECFGL_ADC, 0x40002AD8 // 0x4000 2AD8 ECFGL_ADC Bits------------------------------------- .EQU ECFGL_ADC_ADCTRIEN, 4 .EQU ECFGL_ADC_ADCTRISEL3, 3 .EQU ECFGL_ADC_ADCTRISEL2, 2 .EQU ECFGL_ADC_ADCTRISEL1, 1 .EQU ECFGL_ADC_ADCTRISEL0, 0 // register------------------------------------- .EQU ECFGL_OUT, 0x40002ADC // 0x4000 2ADC ECFGL_OUT Bits------------------------------------- .EQU ECFGL_OUT_ECFGL15OUT, 15 .EQU ECFGL_OUT_ECFGL14OUT, 14 .EQU ECFGL_OUT_ECFGL13OUT, 13 .EQU ECFGL_OUT_ECFGL12OUT, 12 .EQU ECFGL_OUT_ECFGL11OUT, 11 .EQU ECFGL_OUT_ECFGL10OUT, 10 .EQU ECFGL_OUT_ECFGL9OUT, 9 .EQU ECFGL_OUT_ECFGL8OUT, 8 .EQU ECFGL_OUT_ECFGL7OUT, 7 .EQU ECFGL_OUT_ECFGL6OUT, 6 .EQU ECFGL_OUT_ECFGL5OUT, 5 .EQU ECFGL_OUT_ECFGL4OUT, 4 .EQU ECFGL_OUT_ECFGL3OUT, 3 .EQU ECFGL_OUT_ECFGL2OUT, 2 .EQU ECFGL_OUT_ECFGL1OUT, 1 .EQU ECFGL_OUT_ECFGL0OUT, 0 // register------------------------------------- .EQU EWDT_CTL, 0x40002B00 // 0x4000 2B00 EWDT_CTL Bits------------------------------------- .EQU EWDT_CTL_OUTSEL, 24 .EQU EWDT_CTL_EWDTRSTIF, 23 .EQU EWDT_CTL_EWDTRSTIC, 22 .EQU EWDT_CTL_EWDTRSTIE, 21 .EQU EWDT_CTL_TPEN, 20 .EQU EWDT_CTL_CLK1, 19 .EQU EWDT_CTL_CLK0, 18 .EQU EWDT_CTL_EWDTINPOL, 17 .EQU EWDT_CTL_EWDTINEN, 16 .EQU EWDT_CTL_WT40IC, 15 .EQU EWDT_CTL_WW6, 14 .EQU EWDT_CTL_WW5, 13 .EQU EWDT_CTL_WW4, 12 .EQU EWDT_CTL_WW3, 11 .EQU EWDT_CTL_WW2, 10 .EQU EWDT_CTL_WW1, 9 .EQU EWDT_CTL_WW0, 8 .EQU EWDT_CTL_WPS4, 7 .EQU EWDT_CTL_WPS3, 6 .EQU EWDT_CTL_WPS2, 5 .EQU EWDT_CTL_WPS1, 4 .EQU EWDT_CTL_WPS0, 3 .EQU EWDT_CTL_WT40IF, 2 .EQU EWDT_CTL_WT40IE, 1 .EQU EWDT_CTL_EWDTEN, 0 // register------------------------------------- .EQU EWDT_CNT, 0x40002B04 // 0x4000 2B04 EWDT_CNT Bits------------------------------------- .EQU EWDT_CNT_WT6, 7 .EQU EWDT_CNT_WT5, 6 .EQU EWDT_CNT_WT4, 5 .EQU EWDT_CNT_WT3, 4 .EQU EWDT_CNT_WT2, 3 .EQU EWDT_CNT_WT1, 2 .EQU EWDT_CNT_WT0, 1 // register------------------------------------- .EQU FDC0_CTL, 0x40002B80 // 0X4000 2B80 FDC0_CTL Bits------------------------------------- .EQU FDC0_CTL_TCLR, 26 .EQU FDC0_CTL_CLKSEL1, 25 .EQU FDC0_CTL_CLKSEL0, 24 .EQU FDC0_CTL_MDLIC, 23 .EQU FDC0_CTL_CMODE, 22 .EQU FDC0_CTL_BBMODE, 21 .EQU FDC0_CTL_LDMOD1, 20 .EQU FDC0_CTL_LDMOD0, 19 .EQU FDC0_CTL_FDCEIE, 18 .EQU FDC0_CTL_SWTRIG, 17 .EQU FDC0_CTL_FDCDE, 16 .EQU FDC0_CTL_PRESC2, 15 .EQU FDC0_CTL_PRESC1, 14 .EQU FDC0_CTL_PRESC0, 13 .EQU FDC0_CTL_MULSEL5, 12 .EQU FDC0_CTL_MULSEL4, 11 .EQU FDC0_CTL_MULSEL3, 10 .EQU FDC0_CTL_MULSEL2, 9 .EQU FDC0_CTL_MULSEL1, 8 .EQU FDC0_CTL_MULSEL0, 7 .EQU FDC0_CTL_TRGSEL, 6 .EQU FDC0_CTL_MDLIE, 5 .EQU FDC0_CTL_MDLIF, 4 .EQU FDC0_CTL_CONT, 3 .EQU FDC0_CTL_LDOK, 2 .EQU FDC0_CTL_POEN, 1 .EQU FDC0_CTL_FDCEN, 0 // register------------------------------------- .EQU FDC0_MOD, 0x40002B84 // 0X4000 2B84 FDC0_MOD Bits------------------------------------- .EQU FDC0_MOD_MOD15, 15 .EQU FDC0_MOD_MOD14, 14 .EQU FDC0_MOD_MOD13, 13 .EQU FDC0_MOD_MOD12, 12 .EQU FDC0_MOD_MOD11, 11 .EQU FDC0_MOD_MOD10, 10 .EQU FDC0_MOD_MOD9, 9 .EQU FDC0_MOD_MOD8, 8 .EQU FDC0_MOD_MOD7, 7 .EQU FDC0_MOD_MOD6, 6 .EQU FDC0_MOD_MOD5, 5 .EQU FDC0_MOD_MOD4, 4 .EQU FDC0_MOD_MOD3, 3 .EQU FDC0_MOD_MOD2, 2 .EQU FDC0_MOD_MOD1, 1 .EQU FDC0_MOD_MOD0, 0 // register------------------------------------- .EQU FDC0_CNT, 0x40002B88 // 0X4000 2B88 FDC0_CNT Bits------------------------------------- .EQU FDC0_CNT_CNT15, 15 .EQU FDC0_CNT_CNT14, 14 .EQU FDC0_CNT_CNT13, 13 .EQU FDC0_CNT_CNT12, 12 .EQU FDC0_CNT_CNT11, 11 .EQU FDC0_CNT_CNT10, 10 .EQU FDC0_CNT_CNT9, 9 .EQU FDC0_CNT_CNT8, 8 .EQU FDC0_CNT_CNT7, 7 .EQU FDC0_CNT_CNT6, 6 .EQU FDC0_CNT_CNT5, 5 .EQU FDC0_CNT_CNT4, 4 .EQU FDC0_CNT_CNT3, 3 .EQU FDC0_CNT_CNT2, 2 .EQU FDC0_CNT_CNT1, 1 .EQU FDC0_CNT_CNT0, 0 // register------------------------------------- .EQU FDC0_IDLY, 0x40002B8C // 0X4000 2B8C FDC0_IDLY Bits------------------------------------- .EQU FDC0_IDLY_IDLY15, 15 .EQU FDC0_IDLY_IDLY14, 14 .EQU FDC0_IDLY_IDLY13, 13 .EQU FDC0_IDLY_IDLY12, 12 .EQU FDC0_IDLY_IDLY11, 11 .EQU FDC0_IDLY_IDLY10, 10 .EQU FDC0_IDLY_IDLY9, 9 .EQU FDC0_IDLY_IDLY8, 8 .EQU FDC0_IDLY_IDLY7, 7 .EQU FDC0_IDLY_IDLY6, 6 .EQU FDC0_IDLY_IDLY5, 5 .EQU FDC0_IDLY_IDLY4, 4 .EQU FDC0_IDLY_IDLY3, 3 .EQU FDC0_IDLY_IDLY2, 2 .EQU FDC0_IDLY_IDLY1, 1 .EQU FDC0_IDLY_IDLY0, 0 // register------------------------------------- .EQU FDC0_CH0CTL, 0x40002B90 // 0X4000 2B90 FDC0_CH0CTL Bits------------------------------------- .EQU FDC0_CH0CTL_ERRIC4, 24 .EQU FDC0_CH0CTL_ERRIC3, 23 .EQU FDC0_CH0CTL_ERRIC2, 22 .EQU FDC0_CH0CTL_ERRIC1, 21 .EQU FDC0_CH0CTL_ERRIC0, 20 .EQU FDC0_CH0CTL_ERR4, 19 .EQU FDC0_CH0CTL_ERR3, 18 .EQU FDC0_CH0CTL_ERR2, 17 .EQU FDC0_CH0CTL_ERR1, 16 .EQU FDC0_CH0CTL_ERR0, 15 .EQU FDC0_CH0CTL_CF4, 14 .EQU FDC0_CH0CTL_CF3, 13 .EQU FDC0_CH0CTL_CF2, 12 .EQU FDC0_CH0CTL_CF1, 11 .EQU FDC0_CH0CTL_CF0, 10 .EQU FDC0_CH0CTL_TOS4, 9 .EQU FDC0_CH0CTL_TOS3, 8 .EQU FDC0_CH0CTL_TOS2, 7 .EQU FDC0_CH0CTL_TOS1, 6 .EQU FDC0_CH0CTL_TOS0, 5 .EQU FDC0_CH0CTL_PREN4, 4 .EQU FDC0_CH0CTL_PREN3, 3 .EQU FDC0_CH0CTL_PREN2, 2 .EQU FDC0_CH0CTL_PREN1, 1 .EQU FDC0_CH0CTL_PREN0, 0 // register------------------------------------- .EQU FDC0_CH1CTL, 0x40002B94 // 0X4000 2B94 FDC0_CH1CTL Bits------------------------------------- .EQU FDC0_CH1CTL_ERRIC4, 24 .EQU FDC0_CH1CTL_ERRIC3, 23 .EQU FDC0_CH1CTL_ERRIC2, 22 .EQU FDC0_CH1CTL_ERRIC1, 21 .EQU FDC0_CH1CTL_ERRIC0, 20 .EQU FDC0_CH1CTL_ERR4, 19 .EQU FDC0_CH1CTL_ERR3, 18 .EQU FDC0_CH1CTL_ERR2, 17 .EQU FDC0_CH1CTL_ERR1, 16 .EQU FDC0_CH1CTL_ERR0, 15 .EQU FDC0_CH1CTL_CF4, 14 .EQU FDC0_CH1CTL_CF3, 13 .EQU FDC0_CH1CTL_CF2, 12 .EQU FDC0_CH1CTL_CF1, 11 .EQU FDC0_CH1CTL_CF0, 10 .EQU FDC0_CH1CTL_TOS4, 9 .EQU FDC0_CH1CTL_TOS3, 8 .EQU FDC0_CH1CTL_TOS2, 7 .EQU FDC0_CH1CTL_TOS1, 6 .EQU FDC0_CH1CTL_TOS0, 5 .EQU FDC0_CH1CTL_PREN4, 4 .EQU FDC0_CH1CTL_PREN3, 3 .EQU FDC0_CH1CTL_PREN2, 2 .EQU FDC0_CH1CTL_PREN1, 1 .EQU FDC0_CH1CTL_PREN0, 0 // register------------------------------------- .EQU FDC0_CH2CTL, 0x40002B98 // 0X4000 2B98 FDC0_CH2CTL Bits------------------------------------- .EQU FDC0_CH2CTL_ERRIC4, 24 .EQU FDC0_CH2CTL_ERRIC3, 23 .EQU FDC0_CH2CTL_ERRIC2, 22 .EQU FDC0_CH2CTL_ERRIC1, 21 .EQU FDC0_CH2CTL_ERRIC0, 20 .EQU FDC0_CH2CTL_ERR4, 19 .EQU FDC0_CH2CTL_ERR3, 18 .EQU FDC0_CH2CTL_ERR2, 17 .EQU FDC0_CH2CTL_ERR1, 16 .EQU FDC0_CH2CTL_ERR0, 15 .EQU FDC0_CH2CTL_CF4, 14 .EQU FDC0_CH2CTL_CF3, 13 .EQU FDC0_CH2CTL_CF2, 12 .EQU FDC0_CH2CTL_CF1, 11 .EQU FDC0_CH2CTL_CF0, 10 .EQU FDC0_CH2CTL_TOS4, 9 .EQU FDC0_CH2CTL_TOS3, 8 .EQU FDC0_CH2CTL_TOS2, 7 .EQU FDC0_CH2CTL_TOS1, 6 .EQU FDC0_CH2CTL_TOS0, 5 .EQU FDC0_CH2CTL_PREN4, 4 .EQU FDC0_CH2CTL_PREN3, 3 .EQU FDC0_CH2CTL_PREN2, 2 .EQU FDC0_CH2CTL_PREN1, 1 .EQU FDC0_CH2CTL_PREN0, 0 // register------------------------------------- .EQU FDC0_CH3CTL, 0x40002B9C // 0X4000 2B9C FDC0_CH3CTL Bits------------------------------------- .EQU FDC0_CH3CTL_ERRIC4, 24 .EQU FDC0_CH3CTL_ERRIC3, 23 .EQU FDC0_CH3CTL_ERRIC2, 22 .EQU FDC0_CH3CTL_ERRIC1, 21 .EQU FDC0_CH3CTL_ERRIC0, 20 .EQU FDC0_CH3CTL_ERR4, 19 .EQU FDC0_CH3CTL_ERR3, 18 .EQU FDC0_CH3CTL_ERR2, 17 .EQU FDC0_CH3CTL_ERR1, 16 .EQU FDC0_CH3CTL_ERR0, 15 .EQU FDC0_CH3CTL_CF4, 14 .EQU FDC0_CH3CTL_CF3, 13 .EQU FDC0_CH3CTL_CF2, 12 .EQU FDC0_CH3CTL_CF1, 11 .EQU FDC0_CH3CTL_CF0, 10 .EQU FDC0_CH3CTL_TOS4, 9 .EQU FDC0_CH3CTL_TOS3, 8 .EQU FDC0_CH3CTL_TOS2, 7 .EQU FDC0_CH3CTL_TOS1, 6 .EQU FDC0_CH3CTL_TOS0, 5 .EQU FDC0_CH3CTL_PREN4, 4 .EQU FDC0_CH3CTL_PREN3, 3 .EQU FDC0_CH3CTL_PREN2, 2 .EQU FDC0_CH3CTL_PREN1, 1 .EQU FDC0_CH3CTL_PREN0, 0 // register------------------------------------- .EQU FDC0_CH0DLY0, 0x40002BB0 // 0X4000 2BB0 FDC0_CH0DLY0 Bits------------------------------------- .EQU FDC0_CH0DLY0_DLY1_15, 31 .EQU FDC0_CH0DLY0_DLY1_14, 30 .EQU FDC0_CH0DLY0_DLY1_13, 29 .EQU FDC0_CH0DLY0_DLY1_12, 28 .EQU FDC0_CH0DLY0_DLY1_11, 27 .EQU FDC0_CH0DLY0_DLY1_10, 26 .EQU FDC0_CH0DLY0_DLY1_9, 25 .EQU FDC0_CH0DLY0_DLY1_8, 24 .EQU FDC0_CH0DLY0_DLY1_7, 23 .EQU FDC0_CH0DLY0_DLY1_6, 22 .EQU FDC0_CH0DLY0_DLY1_5, 21 .EQU FDC0_CH0DLY0_DLY1_4, 20 .EQU FDC0_CH0DLY0_DLY1_3, 19 .EQU FDC0_CH0DLY0_DLY1_2, 18 .EQU FDC0_CH0DLY0_DLY1_1, 17 .EQU FDC0_CH0DLY0_DLY1_0, 16 .EQU FDC0_CH0DLY0_DLY0_15, 15 .EQU FDC0_CH0DLY0_DLY0_14, 14 .EQU FDC0_CH0DLY0_DLY0_13, 13 .EQU FDC0_CH0DLY0_DLY0_12, 12 .EQU FDC0_CH0DLY0_DLY0_11, 11 .EQU FDC0_CH0DLY0_DLY0_10, 10 .EQU FDC0_CH0DLY0_DLY0_9, 9 .EQU FDC0_CH0DLY0_DLY0_8, 8 .EQU FDC0_CH0DLY0_DLY0_7, 7 .EQU FDC0_CH0DLY0_DLY0_6, 6 .EQU FDC0_CH0DLY0_DLY0_5, 5 .EQU FDC0_CH0DLY0_DLY0_4, 4 .EQU FDC0_CH0DLY0_DLY0_3, 3 .EQU FDC0_CH0DLY0_DLY0_2, 2 .EQU FDC0_CH0DLY0_DLY0_1, 1 .EQU FDC0_CH0DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC0_CH0DLY1, 0x40002BB4 // 0X4000 2BB4 FDC0_CH0DLY1 Bits------------------------------------- .EQU FDC0_CH0DLY1_DLY3_15, 31 .EQU FDC0_CH0DLY1_DLY3_14, 30 .EQU FDC0_CH0DLY1_DLY3_13, 29 .EQU FDC0_CH0DLY1_DLY3_12, 28 .EQU FDC0_CH0DLY1_DLY3_11, 27 .EQU FDC0_CH0DLY1_DLY3_10, 26 .EQU FDC0_CH0DLY1_DLY3_9, 25 .EQU FDC0_CH0DLY1_DLY3_8, 24 .EQU FDC0_CH0DLY1_DLY3_7, 23 .EQU FDC0_CH0DLY1_DLY3_6, 22 .EQU FDC0_CH0DLY1_DLY3_5, 21 .EQU FDC0_CH0DLY1_DLY3_4, 20 .EQU FDC0_CH0DLY1_DLY3_3, 19 .EQU FDC0_CH0DLY1_DLY3_2, 18 .EQU FDC0_CH0DLY1_DLY3_1, 17 .EQU FDC0_CH0DLY1_DLY3_0, 16 .EQU FDC0_CH0DLY1_DLY2_15, 15 .EQU FDC0_CH0DLY1_DLY2_14, 14 .EQU FDC0_CH0DLY1_DLY2_13, 13 .EQU FDC0_CH0DLY1_DLY2_12, 12 .EQU FDC0_CH0DLY1_DLY2_11, 11 .EQU FDC0_CH0DLY1_DLY2_10, 10 .EQU FDC0_CH0DLY1_DLY2_9, 9 .EQU FDC0_CH0DLY1_DLY2_8, 8 .EQU FDC0_CH0DLY1_DLY2_7, 7 .EQU FDC0_CH0DLY1_DLY2_6, 6 .EQU FDC0_CH0DLY1_DLY2_5, 5 .EQU FDC0_CH0DLY1_DLY2_4, 4 .EQU FDC0_CH0DLY1_DLY2_3, 3 .EQU FDC0_CH0DLY1_DLY2_2, 2 .EQU FDC0_CH0DLY1_DLY2_1, 1 .EQU FDC0_CH0DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC0_CH0DLY2, 0x40002BB8 // 0X4000 2BB8 FDC0_CH0DLY2 Bits------------------------------------- .EQU FDC0_CH0DLY2_DLY4_15, 15 .EQU FDC0_CH0DLY2_DLY4_14, 14 .EQU FDC0_CH0DLY2_DLY4_13, 13 .EQU FDC0_CH0DLY2_DLY4_12, 12 .EQU FDC0_CH0DLY2_DLY4_11, 11 .EQU FDC0_CH0DLY2_DLY4_10, 10 .EQU FDC0_CH0DLY2_DLY4_9, 9 .EQU FDC0_CH0DLY2_DLY4_8, 8 .EQU FDC0_CH0DLY2_DLY4_7, 7 .EQU FDC0_CH0DLY2_DLY4_6, 6 .EQU FDC0_CH0DLY2_DLY4_5, 5 .EQU FDC0_CH0DLY2_DLY4_4, 4 .EQU FDC0_CH0DLY2_DLY4_3, 3 .EQU FDC0_CH0DLY2_DLY4_2, 2 .EQU FDC0_CH0DLY2_DLY4_1, 1 .EQU FDC0_CH0DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC0_CH1DLY0, 0x40002BC0 // 0X4000 2BC0 FDC0_CH1DLY0 Bits------------------------------------- .EQU FDC0_CH1DLY0_DLY1_15, 31 .EQU FDC0_CH1DLY0_DLY1_14, 30 .EQU FDC0_CH1DLY0_DLY1_13, 29 .EQU FDC0_CH1DLY0_DLY1_12, 28 .EQU FDC0_CH1DLY0_DLY1_11, 27 .EQU FDC0_CH1DLY0_DLY1_10, 26 .EQU FDC0_CH1DLY0_DLY1_9, 25 .EQU FDC0_CH1DLY0_DLY1_8, 24 .EQU FDC0_CH1DLY0_DLY1_7, 23 .EQU FDC0_CH1DLY0_DLY1_6, 22 .EQU FDC0_CH1DLY0_DLY1_5, 21 .EQU FDC0_CH1DLY0_DLY1_4, 20 .EQU FDC0_CH1DLY0_DLY1_3, 19 .EQU FDC0_CH1DLY0_DLY1_2, 18 .EQU FDC0_CH1DLY0_DLY1_1, 17 .EQU FDC0_CH1DLY0_DLY1_0, 16 .EQU FDC0_CH1DLY0_DLY0_15, 15 .EQU FDC0_CH1DLY0_DLY0_14, 14 .EQU FDC0_CH1DLY0_DLY0_13, 13 .EQU FDC0_CH1DLY0_DLY0_12, 12 .EQU FDC0_CH1DLY0_DLY0_11, 11 .EQU FDC0_CH1DLY0_DLY0_10, 10 .EQU FDC0_CH1DLY0_DLY0_9, 9 .EQU FDC0_CH1DLY0_DLY0_8, 8 .EQU FDC0_CH1DLY0_DLY0_7, 7 .EQU FDC0_CH1DLY0_DLY0_6, 6 .EQU FDC0_CH1DLY0_DLY0_5, 5 .EQU FDC0_CH1DLY0_DLY0_4, 4 .EQU FDC0_CH1DLY0_DLY0_3, 3 .EQU FDC0_CH1DLY0_DLY0_2, 2 .EQU FDC0_CH1DLY0_DLY0_1, 1 .EQU FDC0_CH1DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC0_CH1DLY1, 0x40002BC4 // 0X4000 2BC4 FDC0_CH1DLY1 Bits------------------------------------- .EQU FDC0_CH1DLY1_DLY3_15, 31 .EQU FDC0_CH1DLY1_DLY3_14, 30 .EQU FDC0_CH1DLY1_DLY3_13, 29 .EQU FDC0_CH1DLY1_DLY3_12, 28 .EQU FDC0_CH1DLY1_DLY3_11, 27 .EQU FDC0_CH1DLY1_DLY3_10, 26 .EQU FDC0_CH1DLY1_DLY3_9, 25 .EQU FDC0_CH1DLY1_DLY3_8, 24 .EQU FDC0_CH1DLY1_DLY3_7, 23 .EQU FDC0_CH1DLY1_DLY3_6, 22 .EQU FDC0_CH1DLY1_DLY3_5, 21 .EQU FDC0_CH1DLY1_DLY3_4, 20 .EQU FDC0_CH1DLY1_DLY3_3, 19 .EQU FDC0_CH1DLY1_DLY3_2, 18 .EQU FDC0_CH1DLY1_DLY3_1, 17 .EQU FDC0_CH1DLY1_DLY3_0, 16 .EQU FDC0_CH1DLY1_DLY2_15, 15 .EQU FDC0_CH1DLY1_DLY2_14, 14 .EQU FDC0_CH1DLY1_DLY2_13, 13 .EQU FDC0_CH1DLY1_DLY2_12, 12 .EQU FDC0_CH1DLY1_DLY2_11, 11 .EQU FDC0_CH1DLY1_DLY2_10, 10 .EQU FDC0_CH1DLY1_DLY2_9, 9 .EQU FDC0_CH1DLY1_DLY2_8, 8 .EQU FDC0_CH1DLY1_DLY2_7, 7 .EQU FDC0_CH1DLY1_DLY2_6, 6 .EQU FDC0_CH1DLY1_DLY2_5, 5 .EQU FDC0_CH1DLY1_DLY2_4, 4 .EQU FDC0_CH1DLY1_DLY2_3, 3 .EQU FDC0_CH1DLY1_DLY2_2, 2 .EQU FDC0_CH1DLY1_DLY2_1, 1 .EQU FDC0_CH1DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC0_CH1DLY2, 0x40002BC8 // 0X4000 2BC8 FDC0_CH1DLY2 Bits------------------------------------- .EQU FDC0_CH1DLY2_DLY4_15, 15 .EQU FDC0_CH1DLY2_DLY4_14, 14 .EQU FDC0_CH1DLY2_DLY4_13, 13 .EQU FDC0_CH1DLY2_DLY4_12, 12 .EQU FDC0_CH1DLY2_DLY4_11, 11 .EQU FDC0_CH1DLY2_DLY4_10, 10 .EQU FDC0_CH1DLY2_DLY4_9, 9 .EQU FDC0_CH1DLY2_DLY4_8, 8 .EQU FDC0_CH1DLY2_DLY4_7, 7 .EQU FDC0_CH1DLY2_DLY4_6, 6 .EQU FDC0_CH1DLY2_DLY4_5, 5 .EQU FDC0_CH1DLY2_DLY4_4, 4 .EQU FDC0_CH1DLY2_DLY4_3, 3 .EQU FDC0_CH1DLY2_DLY4_2, 2 .EQU FDC0_CH1DLY2_DLY4_1, 1 .EQU FDC0_CH1DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC0_CH2DLY0, 0x40002BD0 // 0X4000 2BD0 FDC0_CH2DLY0 Bits------------------------------------- .EQU FDC0_CH2DLY0_DLY1_15, 31 .EQU FDC0_CH2DLY0_DLY1_14, 30 .EQU FDC0_CH2DLY0_DLY1_13, 29 .EQU FDC0_CH2DLY0_DLY1_12, 28 .EQU FDC0_CH2DLY0_DLY1_11, 27 .EQU FDC0_CH2DLY0_DLY1_10, 26 .EQU FDC0_CH2DLY0_DLY1_9, 25 .EQU FDC0_CH2DLY0_DLY1_8, 24 .EQU FDC0_CH2DLY0_DLY1_7, 23 .EQU FDC0_CH2DLY0_DLY1_6, 22 .EQU FDC0_CH2DLY0_DLY1_5, 21 .EQU FDC0_CH2DLY0_DLY1_4, 20 .EQU FDC0_CH2DLY0_DLY1_3, 19 .EQU FDC0_CH2DLY0_DLY1_2, 18 .EQU FDC0_CH2DLY0_DLY1_1, 17 .EQU FDC0_CH2DLY0_DLY1_0, 16 .EQU FDC0_CH2DLY0_DLY0_15, 15 .EQU FDC0_CH2DLY0_DLY0_14, 14 .EQU FDC0_CH2DLY0_DLY0_13, 13 .EQU FDC0_CH2DLY0_DLY0_12, 12 .EQU FDC0_CH2DLY0_DLY0_11, 11 .EQU FDC0_CH2DLY0_DLY0_10, 10 .EQU FDC0_CH2DLY0_DLY0_9, 9 .EQU FDC0_CH2DLY0_DLY0_8, 8 .EQU FDC0_CH2DLY0_DLY0_7, 7 .EQU FDC0_CH2DLY0_DLY0_6, 6 .EQU FDC0_CH2DLY0_DLY0_5, 5 .EQU FDC0_CH2DLY0_DLY0_4, 4 .EQU FDC0_CH2DLY0_DLY0_3, 3 .EQU FDC0_CH2DLY0_DLY0_2, 2 .EQU FDC0_CH2DLY0_DLY0_1, 1 .EQU FDC0_CH2DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC0_CH2DLY1, 0x40002BD4 // 0X4000 2BD4 FDC0_CH2DLY1 Bits------------------------------------- .EQU FDC0_CH2DLY1_DLY3_15, 31 .EQU FDC0_CH2DLY1_DLY3_14, 30 .EQU FDC0_CH2DLY1_DLY3_13, 29 .EQU FDC0_CH2DLY1_DLY3_12, 28 .EQU FDC0_CH2DLY1_DLY3_11, 27 .EQU FDC0_CH2DLY1_DLY3_10, 26 .EQU FDC0_CH2DLY1_DLY3_9, 25 .EQU FDC0_CH2DLY1_DLY3_8, 24 .EQU FDC0_CH2DLY1_DLY3_7, 23 .EQU FDC0_CH2DLY1_DLY3_6, 22 .EQU FDC0_CH2DLY1_DLY3_5, 21 .EQU FDC0_CH2DLY1_DLY3_4, 20 .EQU FDC0_CH2DLY1_DLY3_3, 19 .EQU FDC0_CH2DLY1_DLY3_2, 18 .EQU FDC0_CH2DLY1_DLY3_1, 17 .EQU FDC0_CH2DLY1_DLY3_0, 16 .EQU FDC0_CH2DLY1_DLY2_15, 15 .EQU FDC0_CH2DLY1_DLY2_14, 14 .EQU FDC0_CH2DLY1_DLY2_13, 13 .EQU FDC0_CH2DLY1_DLY2_12, 12 .EQU FDC0_CH2DLY1_DLY2_11, 11 .EQU FDC0_CH2DLY1_DLY2_10, 10 .EQU FDC0_CH2DLY1_DLY2_9, 9 .EQU FDC0_CH2DLY1_DLY2_8, 8 .EQU FDC0_CH2DLY1_DLY2_7, 7 .EQU FDC0_CH2DLY1_DLY2_6, 6 .EQU FDC0_CH2DLY1_DLY2_5, 5 .EQU FDC0_CH2DLY1_DLY2_4, 4 .EQU FDC0_CH2DLY1_DLY2_3, 3 .EQU FDC0_CH2DLY1_DLY2_2, 2 .EQU FDC0_CH2DLY1_DLY2_1, 1 .EQU FDC0_CH2DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC0_CH2DLY2, 0x40002BD8 // 0X4000 2BD8 FDC0_CH2DLY2 Bits------------------------------------- .EQU FDC0_CH2DLY2_DLY4_15, 15 .EQU FDC0_CH2DLY2_DLY4_14, 14 .EQU FDC0_CH2DLY2_DLY4_13, 13 .EQU FDC0_CH2DLY2_DLY4_12, 12 .EQU FDC0_CH2DLY2_DLY4_11, 11 .EQU FDC0_CH2DLY2_DLY4_10, 10 .EQU FDC0_CH2DLY2_DLY4_9, 9 .EQU FDC0_CH2DLY2_DLY4_8, 8 .EQU FDC0_CH2DLY2_DLY4_7, 7 .EQU FDC0_CH2DLY2_DLY4_6, 6 .EQU FDC0_CH2DLY2_DLY4_5, 5 .EQU FDC0_CH2DLY2_DLY4_4, 4 .EQU FDC0_CH2DLY2_DLY4_3, 3 .EQU FDC0_CH2DLY2_DLY4_2, 2 .EQU FDC0_CH2DLY2_DLY4_1, 1 .EQU FDC0_CH2DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC0_CH3DLY0, 0x40002BE0 // 0X4000 2BE0 FDC0_CH3DLY0 Bits------------------------------------- .EQU FDC0_CH3DLY0_DLY1_15, 31 .EQU FDC0_CH3DLY0_DLY1_14, 30 .EQU FDC0_CH3DLY0_DLY1_13, 29 .EQU FDC0_CH3DLY0_DLY1_12, 28 .EQU FDC0_CH3DLY0_DLY1_11, 27 .EQU FDC0_CH3DLY0_DLY1_10, 26 .EQU FDC0_CH3DLY0_DLY1_9, 25 .EQU FDC0_CH3DLY0_DLY1_8, 24 .EQU FDC0_CH3DLY0_DLY1_7, 23 .EQU FDC0_CH3DLY0_DLY1_6, 22 .EQU FDC0_CH3DLY0_DLY1_5, 21 .EQU FDC0_CH3DLY0_DLY1_4, 20 .EQU FDC0_CH3DLY0_DLY1_3, 19 .EQU FDC0_CH3DLY0_DLY1_2, 18 .EQU FDC0_CH3DLY0_DLY1_1, 17 .EQU FDC0_CH3DLY0_DLY1_0, 16 .EQU FDC0_CH3DLY0_DLY0_15, 15 .EQU FDC0_CH3DLY0_DLY0_14, 14 .EQU FDC0_CH3DLY0_DLY0_13, 13 .EQU FDC0_CH3DLY0_DLY0_12, 12 .EQU FDC0_CH3DLY0_DLY0_11, 11 .EQU FDC0_CH3DLY0_DLY0_10, 10 .EQU FDC0_CH3DLY0_DLY0_9, 9 .EQU FDC0_CH3DLY0_DLY0_8, 8 .EQU FDC0_CH3DLY0_DLY0_7, 7 .EQU FDC0_CH3DLY0_DLY0_6, 6 .EQU FDC0_CH3DLY0_DLY0_5, 5 .EQU FDC0_CH3DLY0_DLY0_4, 4 .EQU FDC0_CH3DLY0_DLY0_3, 3 .EQU FDC0_CH3DLY0_DLY0_2, 2 .EQU FDC0_CH3DLY0_DLY0_1, 1 .EQU FDC0_CH3DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC0_CH3DLY1, 0x40002BE4 // 0X4000 2BE4 FDC0_CH3DLY1 Bits------------------------------------- .EQU FDC0_CH3DLY1_DLY3_15, 31 .EQU FDC0_CH3DLY1_DLY3_14, 30 .EQU FDC0_CH3DLY1_DLY3_13, 29 .EQU FDC0_CH3DLY1_DLY3_12, 28 .EQU FDC0_CH3DLY1_DLY3_11, 27 .EQU FDC0_CH3DLY1_DLY3_10, 26 .EQU FDC0_CH3DLY1_DLY3_9, 25 .EQU FDC0_CH3DLY1_DLY3_8, 24 .EQU FDC0_CH3DLY1_DLY3_7, 23 .EQU FDC0_CH3DLY1_DLY3_6, 22 .EQU FDC0_CH3DLY1_DLY3_5, 21 .EQU FDC0_CH3DLY1_DLY3_4, 20 .EQU FDC0_CH3DLY1_DLY3_3, 19 .EQU FDC0_CH3DLY1_DLY3_2, 18 .EQU FDC0_CH3DLY1_DLY3_1, 17 .EQU FDC0_CH3DLY1_DLY3_0, 16 .EQU FDC0_CH3DLY1_DLY2_15, 15 .EQU FDC0_CH3DLY1_DLY2_14, 14 .EQU FDC0_CH3DLY1_DLY2_13, 13 .EQU FDC0_CH3DLY1_DLY2_12, 12 .EQU FDC0_CH3DLY1_DLY2_11, 11 .EQU FDC0_CH3DLY1_DLY2_10, 10 .EQU FDC0_CH3DLY1_DLY2_9, 9 .EQU FDC0_CH3DLY1_DLY2_8, 8 .EQU FDC0_CH3DLY1_DLY2_7, 7 .EQU FDC0_CH3DLY1_DLY2_6, 6 .EQU FDC0_CH3DLY1_DLY2_5, 5 .EQU FDC0_CH3DLY1_DLY2_4, 4 .EQU FDC0_CH3DLY1_DLY2_3, 3 .EQU FDC0_CH3DLY1_DLY2_2, 2 .EQU FDC0_CH3DLY1_DLY2_1, 1 .EQU FDC0_CH3DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC0_CH3DLY2, 0x40002BE8 // 0X4000 2BE8 FDC0_CH3DLY2 Bits------------------------------------- .EQU FDC0_CH3DLY2_DLY4_15, 15 .EQU FDC0_CH3DLY2_DLY4_14, 14 .EQU FDC0_CH3DLY2_DLY4_13, 13 .EQU FDC0_CH3DLY2_DLY4_12, 12 .EQU FDC0_CH3DLY2_DLY4_11, 11 .EQU FDC0_CH3DLY2_DLY4_10, 10 .EQU FDC0_CH3DLY2_DLY4_9, 9 .EQU FDC0_CH3DLY2_DLY4_8, 8 .EQU FDC0_CH3DLY2_DLY4_7, 7 .EQU FDC0_CH3DLY2_DLY4_6, 6 .EQU FDC0_CH3DLY2_DLY4_5, 5 .EQU FDC0_CH3DLY2_DLY4_4, 4 .EQU FDC0_CH3DLY2_DLY4_3, 3 .EQU FDC0_CH3DLY2_DLY4_2, 2 .EQU FDC0_CH3DLY2_DLY4_1, 1 .EQU FDC0_CH3DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC0_PO0DLY, 0x40002BF0 // 0X4000 2BF0 FDC0_PO0DLY Bits------------------------------------- .EQU FDC0_PO0DLY_DLYH15, 31 .EQU FDC0_PO0DLY_DLYH14, 30 .EQU FDC0_PO0DLY_DLYH13, 29 .EQU FDC0_PO0DLY_DLYH12, 28 .EQU FDC0_PO0DLY_DLYH11, 27 .EQU FDC0_PO0DLY_DLYH10, 26 .EQU FDC0_PO0DLY_DLYH9, 25 .EQU FDC0_PO0DLY_DLYH8, 24 .EQU FDC0_PO0DLY_DLYH7, 23 .EQU FDC0_PO0DLY_DLYH6, 22 .EQU FDC0_PO0DLY_DLYH5, 21 .EQU FDC0_PO0DLY_DLYH4, 20 .EQU FDC0_PO0DLY_DLYH3, 19 .EQU FDC0_PO0DLY_DLYH2, 18 .EQU FDC0_PO0DLY_DLYH1, 17 .EQU FDC0_PO0DLY_DLYH0, 16 .EQU FDC0_PO0DLY_DLYL15, 15 .EQU FDC0_PO0DLY_DLYL14, 14 .EQU FDC0_PO0DLY_DLYL13, 13 .EQU FDC0_PO0DLY_DLYL12, 12 .EQU FDC0_PO0DLY_DLYL11, 11 .EQU FDC0_PO0DLY_DLYL10, 10 .EQU FDC0_PO0DLY_DLYL9, 9 .EQU FDC0_PO0DLY_DLYL8, 8 .EQU FDC0_PO0DLY_DLYL7, 7 .EQU FDC0_PO0DLY_DLYL6, 6 .EQU FDC0_PO0DLY_DLYL5, 5 .EQU FDC0_PO0DLY_DLYL4, 4 .EQU FDC0_PO0DLY_DLYL3, 3 .EQU FDC0_PO0DLY_DLYL2, 2 .EQU FDC0_PO0DLY_DLYL1, 1 .EQU FDC0_PO0DLY_DLYL0, 0 // register------------------------------------- .EQU FDC0_PO1DLY, 0x40002BF4 // 0X4000 2BF4 FDC0_PO1DLY Bits------------------------------------- .EQU FDC0_PO1DLY_DLYH15, 31 .EQU FDC0_PO1DLY_DLYH14, 30 .EQU FDC0_PO1DLY_DLYH13, 29 .EQU FDC0_PO1DLY_DLYH12, 28 .EQU FDC0_PO1DLY_DLYH11, 27 .EQU FDC0_PO1DLY_DLYH10, 26 .EQU FDC0_PO1DLY_DLYH9, 25 .EQU FDC0_PO1DLY_DLYH8, 24 .EQU FDC0_PO1DLY_DLYH7, 23 .EQU FDC0_PO1DLY_DLYH6, 22 .EQU FDC0_PO1DLY_DLYH5, 21 .EQU FDC0_PO1DLY_DLYH4, 20 .EQU FDC0_PO1DLY_DLYH3, 19 .EQU FDC0_PO1DLY_DLYH2, 18 .EQU FDC0_PO1DLY_DLYH1, 17 .EQU FDC0_PO1DLY_DLYH0, 16 .EQU FDC0_PO1DLY_DLYL15, 15 .EQU FDC0_PO1DLY_DLYL14, 14 .EQU FDC0_PO1DLY_DLYL13, 13 .EQU FDC0_PO1DLY_DLYL12, 12 .EQU FDC0_PO1DLY_DLYL11, 11 .EQU FDC0_PO1DLY_DLYL10, 10 .EQU FDC0_PO1DLY_DLYL9, 9 .EQU FDC0_PO1DLY_DLYL8, 8 .EQU FDC0_PO1DLY_DLYL7, 7 .EQU FDC0_PO1DLY_DLYL6, 6 .EQU FDC0_PO1DLY_DLYL5, 5 .EQU FDC0_PO1DLY_DLYL4, 4 .EQU FDC0_PO1DLY_DLYL3, 3 .EQU FDC0_PO1DLY_DLYL2, 2 .EQU FDC0_PO1DLY_DLYL1, 1 .EQU FDC0_PO1DLY_DLYL0, 0 // register------------------------------------- .EQU FDC0_PO2DLY, 0x40002BF8 // 0X4000 2BF8 FDC0_PO2DLY Bits------------------------------------- .EQU FDC0_PO2DLY_DLYH15, 31 .EQU FDC0_PO2DLY_DLYH14, 30 .EQU FDC0_PO2DLY_DLYH13, 29 .EQU FDC0_PO2DLY_DLYH12, 28 .EQU FDC0_PO2DLY_DLYH11, 27 .EQU FDC0_PO2DLY_DLYH10, 26 .EQU FDC0_PO2DLY_DLYH9, 25 .EQU FDC0_PO2DLY_DLYH8, 24 .EQU FDC0_PO2DLY_DLYH7, 23 .EQU FDC0_PO2DLY_DLYH6, 22 .EQU FDC0_PO2DLY_DLYH5, 21 .EQU FDC0_PO2DLY_DLYH4, 20 .EQU FDC0_PO2DLY_DLYH3, 19 .EQU FDC0_PO2DLY_DLYH2, 18 .EQU FDC0_PO2DLY_DLYH1, 17 .EQU FDC0_PO2DLY_DLYH0, 16 .EQU FDC0_PO2DLY_DLYL15, 15 .EQU FDC0_PO2DLY_DLYL14, 14 .EQU FDC0_PO2DLY_DLYL13, 13 .EQU FDC0_PO2DLY_DLYL12, 12 .EQU FDC0_PO2DLY_DLYL11, 11 .EQU FDC0_PO2DLY_DLYL10, 10 .EQU FDC0_PO2DLY_DLYL9, 9 .EQU FDC0_PO2DLY_DLYL8, 8 .EQU FDC0_PO2DLY_DLYL7, 7 .EQU FDC0_PO2DLY_DLYL6, 6 .EQU FDC0_PO2DLY_DLYL5, 5 .EQU FDC0_PO2DLY_DLYL4, 4 .EQU FDC0_PO2DLY_DLYL3, 3 .EQU FDC0_PO2DLY_DLYL2, 2 .EQU FDC0_PO2DLY_DLYL1, 1 .EQU FDC0_PO2DLY_DLYL0, 0 // register------------------------------------- .EQU FDC0_PO3DLY, 0x40002BFC // 0X4000 2BFC FDC0_PO3DLY Bits------------------------------------- .EQU FDC0_PO3DLY_DLYH15, 31 .EQU FDC0_PO3DLY_DLYH14, 30 .EQU FDC0_PO3DLY_DLYH13, 29 .EQU FDC0_PO3DLY_DLYH12, 28 .EQU FDC0_PO3DLY_DLYH11, 27 .EQU FDC0_PO3DLY_DLYH10, 26 .EQU FDC0_PO3DLY_DLYH9, 25 .EQU FDC0_PO3DLY_DLYH8, 24 .EQU FDC0_PO3DLY_DLYH7, 23 .EQU FDC0_PO3DLY_DLYH6, 22 .EQU FDC0_PO3DLY_DLYH5, 21 .EQU FDC0_PO3DLY_DLYH4, 20 .EQU FDC0_PO3DLY_DLYH3, 19 .EQU FDC0_PO3DLY_DLYH2, 18 .EQU FDC0_PO3DLY_DLYH1, 17 .EQU FDC0_PO3DLY_DLYH0, 16 .EQU FDC0_PO3DLY_DLYL15, 15 .EQU FDC0_PO3DLY_DLYL14, 14 .EQU FDC0_PO3DLY_DLYL13, 13 .EQU FDC0_PO3DLY_DLYL12, 12 .EQU FDC0_PO3DLY_DLYL11, 11 .EQU FDC0_PO3DLY_DLYL10, 10 .EQU FDC0_PO3DLY_DLYL9, 9 .EQU FDC0_PO3DLY_DLYL8, 8 .EQU FDC0_PO3DLY_DLYL7, 7 .EQU FDC0_PO3DLY_DLYL6, 6 .EQU FDC0_PO3DLY_DLYL5, 5 .EQU FDC0_PO3DLY_DLYL4, 4 .EQU FDC0_PO3DLY_DLYL3, 3 .EQU FDC0_PO3DLY_DLYL2, 2 .EQU FDC0_PO3DLY_DLYL1, 1 .EQU FDC0_PO3DLY_DLYL0, 0 // register------------------------------------- .EQU FDC1_CTL, 0x40002C00 // 0X4000 2C00 FDC1_CTL Bits------------------------------------- .EQU FDC1_CTL_TCLR, 26 .EQU FDC1_CTL_CLKSEL1, 25 .EQU FDC1_CTL_CLKSEL0, 24 .EQU FDC1_CTL_MDLIC, 23 .EQU FDC1_CTL_CMODE, 22 .EQU FDC1_CTL_BBMODE, 21 .EQU FDC1_CTL_LDMOD1, 20 .EQU FDC1_CTL_LDMOD0, 19 .EQU FDC1_CTL_FDCEIE, 18 .EQU FDC1_CTL_SWTRIG, 17 .EQU FDC1_CTL_FDCDE, 16 .EQU FDC1_CTL_PRESC2, 15 .EQU FDC1_CTL_PRESC1, 14 .EQU FDC1_CTL_PRESC0, 13 .EQU FDC1_CTL_MULSEL5, 12 .EQU FDC1_CTL_MULSEL4, 11 .EQU FDC1_CTL_MULSEL3, 10 .EQU FDC1_CTL_MULSEL2, 9 .EQU FDC1_CTL_MULSEL1, 8 .EQU FDC1_CTL_MULSEL0, 7 .EQU FDC1_CTL_TRGSEL, 6 .EQU FDC1_CTL_MDLIE, 5 .EQU FDC1_CTL_MDLIF, 4 .EQU FDC1_CTL_CONT, 3 .EQU FDC1_CTL_LDOK, 2 .EQU FDC1_CTL_POEN, 1 .EQU FDC1_CTL_FDCEN, 0 // register------------------------------------- .EQU FDC1_MOD, 0x40002C04 // 0X4000 2C04 FDC1_MOD Bits------------------------------------- .EQU FDC1_MOD_MOD15, 15 .EQU FDC1_MOD_MOD14, 14 .EQU FDC1_MOD_MOD13, 13 .EQU FDC1_MOD_MOD12, 12 .EQU FDC1_MOD_MOD11, 11 .EQU FDC1_MOD_MOD10, 10 .EQU FDC1_MOD_MOD9, 9 .EQU FDC1_MOD_MOD8, 8 .EQU FDC1_MOD_MOD7, 7 .EQU FDC1_MOD_MOD6, 6 .EQU FDC1_MOD_MOD5, 5 .EQU FDC1_MOD_MOD4, 4 .EQU FDC1_MOD_MOD3, 3 .EQU FDC1_MOD_MOD2, 2 .EQU FDC1_MOD_MOD1, 1 .EQU FDC1_MOD_MOD0, 0 // register------------------------------------- .EQU FDC1_CNT, 0x40002C08 // 0X4000 2C08 FDC1_CNT Bits------------------------------------- .EQU FDC1_CNT_CNT15, 15 .EQU FDC1_CNT_CNT14, 14 .EQU FDC1_CNT_CNT13, 13 .EQU FDC1_CNT_CNT12, 12 .EQU FDC1_CNT_CNT11, 11 .EQU FDC1_CNT_CNT10, 10 .EQU FDC1_CNT_CNT9, 9 .EQU FDC1_CNT_CNT8, 8 .EQU FDC1_CNT_CNT7, 7 .EQU FDC1_CNT_CNT6, 6 .EQU FDC1_CNT_CNT5, 5 .EQU FDC1_CNT_CNT4, 4 .EQU FDC1_CNT_CNT3, 3 .EQU FDC1_CNT_CNT2, 2 .EQU FDC1_CNT_CNT1, 1 .EQU FDC1_CNT_CNT0, 0 // register------------------------------------- .EQU FDC1_IDLY, 0x40002C0C // 0X4000 2C0C FDC1_IDLY Bits------------------------------------- .EQU FDC1_IDLY_IDLY15, 15 .EQU FDC1_IDLY_IDLY14, 14 .EQU FDC1_IDLY_IDLY13, 13 .EQU FDC1_IDLY_IDLY12, 12 .EQU FDC1_IDLY_IDLY11, 11 .EQU FDC1_IDLY_IDLY10, 10 .EQU FDC1_IDLY_IDLY9, 9 .EQU FDC1_IDLY_IDLY8, 8 .EQU FDC1_IDLY_IDLY7, 7 .EQU FDC1_IDLY_IDLY6, 6 .EQU FDC1_IDLY_IDLY5, 5 .EQU FDC1_IDLY_IDLY4, 4 .EQU FDC1_IDLY_IDLY3, 3 .EQU FDC1_IDLY_IDLY2, 2 .EQU FDC1_IDLY_IDLY1, 1 .EQU FDC1_IDLY_IDLY0, 0 // register------------------------------------- .EQU FDC1_CH0CTL, 0x40002C10 // 0X4000 2C10 FDC1_CH0CTL Bits------------------------------------- .EQU FDC1_CH0CTL_ERRIC4, 24 .EQU FDC1_CH0CTL_ERRIC3, 23 .EQU FDC1_CH0CTL_ERRIC2, 22 .EQU FDC1_CH0CTL_ERRIC1, 21 .EQU FDC1_CH0CTL_ERRIC0, 20 .EQU FDC1_CH0CTL_ERR4, 19 .EQU FDC1_CH0CTL_ERR3, 18 .EQU FDC1_CH0CTL_ERR2, 17 .EQU FDC1_CH0CTL_ERR1, 16 .EQU FDC1_CH0CTL_ERR0, 15 .EQU FDC1_CH0CTL_CF4, 14 .EQU FDC1_CH0CTL_CF3, 13 .EQU FDC1_CH0CTL_CF2, 12 .EQU FDC1_CH0CTL_CF1, 11 .EQU FDC1_CH0CTL_CF0, 10 .EQU FDC1_CH0CTL_TOS4, 9 .EQU FDC1_CH0CTL_TOS3, 8 .EQU FDC1_CH0CTL_TOS2, 7 .EQU FDC1_CH0CTL_TOS1, 6 .EQU FDC1_CH0CTL_TOS0, 5 .EQU FDC1_CH0CTL_PREN4, 4 .EQU FDC1_CH0CTL_PREN3, 3 .EQU FDC1_CH0CTL_PREN2, 2 .EQU FDC1_CH0CTL_PREN1, 1 .EQU FDC1_CH0CTL_PREN0, 0 // register------------------------------------- .EQU FDC1_CH1CTL, 0x40002C14 // 0X4000 2C14 FDC1_CH1CTL Bits------------------------------------- .EQU FDC1_CH1CTL_ERRIC4, 24 .EQU FDC1_CH1CTL_ERRIC3, 23 .EQU FDC1_CH1CTL_ERRIC2, 22 .EQU FDC1_CH1CTL_ERRIC1, 21 .EQU FDC1_CH1CTL_ERRIC0, 20 .EQU FDC1_CH1CTL_ERR4, 19 .EQU FDC1_CH1CTL_ERR3, 18 .EQU FDC1_CH1CTL_ERR2, 17 .EQU FDC1_CH1CTL_ERR1, 16 .EQU FDC1_CH1CTL_ERR0, 15 .EQU FDC1_CH1CTL_CF4, 14 .EQU FDC1_CH1CTL_CF3, 13 .EQU FDC1_CH1CTL_CF2, 12 .EQU FDC1_CH1CTL_CF1, 11 .EQU FDC1_CH1CTL_CF0, 10 .EQU FDC1_CH1CTL_TOS4, 9 .EQU FDC1_CH1CTL_TOS3, 8 .EQU FDC1_CH1CTL_TOS2, 7 .EQU FDC1_CH1CTL_TOS1, 6 .EQU FDC1_CH1CTL_TOS0, 5 .EQU FDC1_CH1CTL_PREN4, 4 .EQU FDC1_CH1CTL_PREN3, 3 .EQU FDC1_CH1CTL_PREN2, 2 .EQU FDC1_CH1CTL_PREN1, 1 .EQU FDC1_CH1CTL_PREN0, 0 // register------------------------------------- .EQU FDC1_CH2CTL, 0x40002C18 // 0X4000 2C18 FDC1_CH2CTL Bits------------------------------------- .EQU FDC1_CH2CTL_ERRIC4, 24 .EQU FDC1_CH2CTL_ERRIC3, 23 .EQU FDC1_CH2CTL_ERRIC2, 22 .EQU FDC1_CH2CTL_ERRIC1, 21 .EQU FDC1_CH2CTL_ERRIC0, 20 .EQU FDC1_CH2CTL_ERR4, 19 .EQU FDC1_CH2CTL_ERR3, 18 .EQU FDC1_CH2CTL_ERR2, 17 .EQU FDC1_CH2CTL_ERR1, 16 .EQU FDC1_CH2CTL_ERR0, 15 .EQU FDC1_CH2CTL_CF4, 14 .EQU FDC1_CH2CTL_CF3, 13 .EQU FDC1_CH2CTL_CF2, 12 .EQU FDC1_CH2CTL_CF1, 11 .EQU FDC1_CH2CTL_CF0, 10 .EQU FDC1_CH2CTL_TOS4, 9 .EQU FDC1_CH2CTL_TOS3, 8 .EQU FDC1_CH2CTL_TOS2, 7 .EQU FDC1_CH2CTL_TOS1, 6 .EQU FDC1_CH2CTL_TOS0, 5 .EQU FDC1_CH2CTL_PREN4, 4 .EQU FDC1_CH2CTL_PREN3, 3 .EQU FDC1_CH2CTL_PREN2, 2 .EQU FDC1_CH2CTL_PREN1, 1 .EQU FDC1_CH2CTL_PREN0, 0 // register------------------------------------- .EQU FDC1_CH3CTL, 0x40002C1C // 0X4000 2C1C FDC1_CH3CTL Bits------------------------------------- .EQU FDC1_CH3CTL_ERRIC4, 24 .EQU FDC1_CH3CTL_ERRIC3, 23 .EQU FDC1_CH3CTL_ERRIC2, 22 .EQU FDC1_CH3CTL_ERRIC1, 21 .EQU FDC1_CH3CTL_ERRIC0, 20 .EQU FDC1_CH3CTL_ERR4, 19 .EQU FDC1_CH3CTL_ERR3, 18 .EQU FDC1_CH3CTL_ERR2, 17 .EQU FDC1_CH3CTL_ERR1, 16 .EQU FDC1_CH3CTL_ERR0, 15 .EQU FDC1_CH3CTL_CF4, 14 .EQU FDC1_CH3CTL_CF3, 13 .EQU FDC1_CH3CTL_CF2, 12 .EQU FDC1_CH3CTL_CF1, 11 .EQU FDC1_CH3CTL_CF0, 10 .EQU FDC1_CH3CTL_TOS4, 9 .EQU FDC1_CH3CTL_TOS3, 8 .EQU FDC1_CH3CTL_TOS2, 7 .EQU FDC1_CH3CTL_TOS1, 6 .EQU FDC1_CH3CTL_TOS0, 5 .EQU FDC1_CH3CTL_PREN4, 4 .EQU FDC1_CH3CTL_PREN3, 3 .EQU FDC1_CH3CTL_PREN2, 2 .EQU FDC1_CH3CTL_PREN1, 1 .EQU FDC1_CH3CTL_PREN0, 0 // register------------------------------------- .EQU FDC1_CH0DLY0, 0x40002C30 // 0X4000 2C30 FDC1_CH0DLY0 Bits------------------------------------- .EQU FDC1_CH0DLY0_DLY1_15, 31 .EQU FDC1_CH0DLY0_DLY1_14, 30 .EQU FDC1_CH0DLY0_DLY1_13, 29 .EQU FDC1_CH0DLY0_DLY1_12, 28 .EQU FDC1_CH0DLY0_DLY1_11, 27 .EQU FDC1_CH0DLY0_DLY1_10, 26 .EQU FDC1_CH0DLY0_DLY1_9, 25 .EQU FDC1_CH0DLY0_DLY1_8, 24 .EQU FDC1_CH0DLY0_DLY1_7, 23 .EQU FDC1_CH0DLY0_DLY1_6, 22 .EQU FDC1_CH0DLY0_DLY1_5, 21 .EQU FDC1_CH0DLY0_DLY1_4, 20 .EQU FDC1_CH0DLY0_DLY1_3, 19 .EQU FDC1_CH0DLY0_DLY1_2, 18 .EQU FDC1_CH0DLY0_DLY1_1, 17 .EQU FDC1_CH0DLY0_DLY1_0, 16 .EQU FDC1_CH0DLY0_DLY0_15, 15 .EQU FDC1_CH0DLY0_DLY0_14, 14 .EQU FDC1_CH0DLY0_DLY0_13, 13 .EQU FDC1_CH0DLY0_DLY0_12, 12 .EQU FDC1_CH0DLY0_DLY0_11, 11 .EQU FDC1_CH0DLY0_DLY0_10, 10 .EQU FDC1_CH0DLY0_DLY0_9, 9 .EQU FDC1_CH0DLY0_DLY0_8, 8 .EQU FDC1_CH0DLY0_DLY0_7, 7 .EQU FDC1_CH0DLY0_DLY0_6, 6 .EQU FDC1_CH0DLY0_DLY0_5, 5 .EQU FDC1_CH0DLY0_DLY0_4, 4 .EQU FDC1_CH0DLY0_DLY0_3, 3 .EQU FDC1_CH0DLY0_DLY0_2, 2 .EQU FDC1_CH0DLY0_DLY0_1, 1 .EQU FDC1_CH0DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC1_CH0DLY1, 0x40002C34 // 0X4000 2C34 FDC1_CH0DLY1 Bits------------------------------------- .EQU FDC1_CH0DLY1_DLY3_15, 31 .EQU FDC1_CH0DLY1_DLY3_14, 30 .EQU FDC1_CH0DLY1_DLY3_13, 29 .EQU FDC1_CH0DLY1_DLY3_12, 28 .EQU FDC1_CH0DLY1_DLY3_11, 27 .EQU FDC1_CH0DLY1_DLY3_10, 26 .EQU FDC1_CH0DLY1_DLY3_9, 25 .EQU FDC1_CH0DLY1_DLY3_8, 24 .EQU FDC1_CH0DLY1_DLY3_7, 23 .EQU FDC1_CH0DLY1_DLY3_6, 22 .EQU FDC1_CH0DLY1_DLY3_5, 21 .EQU FDC1_CH0DLY1_DLY3_4, 20 .EQU FDC1_CH0DLY1_DLY3_3, 19 .EQU FDC1_CH0DLY1_DLY3_2, 18 .EQU FDC1_CH0DLY1_DLY3_1, 17 .EQU FDC1_CH0DLY1_DLY3_0, 16 .EQU FDC1_CH0DLY1_DLY2_15, 15 .EQU FDC1_CH0DLY1_DLY2_14, 14 .EQU FDC1_CH0DLY1_DLY2_13, 13 .EQU FDC1_CH0DLY1_DLY2_12, 12 .EQU FDC1_CH0DLY1_DLY2_11, 11 .EQU FDC1_CH0DLY1_DLY2_10, 10 .EQU FDC1_CH0DLY1_DLY2_9, 9 .EQU FDC1_CH0DLY1_DLY2_8, 8 .EQU FDC1_CH0DLY1_DLY2_7, 7 .EQU FDC1_CH0DLY1_DLY2_6, 6 .EQU FDC1_CH0DLY1_DLY2_5, 5 .EQU FDC1_CH0DLY1_DLY2_4, 4 .EQU FDC1_CH0DLY1_DLY2_3, 3 .EQU FDC1_CH0DLY1_DLY2_2, 2 .EQU FDC1_CH0DLY1_DLY2_1, 1 .EQU FDC1_CH0DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC1_CH0DLY2, 0x40002C38 // 0X4000 2C38 FDC1_CH0DLY2 Bits------------------------------------- .EQU FDC1_CH0DLY2_DLY4_15, 15 .EQU FDC1_CH0DLY2_DLY4_14, 14 .EQU FDC1_CH0DLY2_DLY4_13, 13 .EQU FDC1_CH0DLY2_DLY4_12, 12 .EQU FDC1_CH0DLY2_DLY4_11, 11 .EQU FDC1_CH0DLY2_DLY4_10, 10 .EQU FDC1_CH0DLY2_DLY4_9, 9 .EQU FDC1_CH0DLY2_DLY4_8, 8 .EQU FDC1_CH0DLY2_DLY4_7, 7 .EQU FDC1_CH0DLY2_DLY4_6, 6 .EQU FDC1_CH0DLY2_DLY4_5, 5 .EQU FDC1_CH0DLY2_DLY4_4, 4 .EQU FDC1_CH0DLY2_DLY4_3, 3 .EQU FDC1_CH0DLY2_DLY4_2, 2 .EQU FDC1_CH0DLY2_DLY4_1, 1 .EQU FDC1_CH0DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC1_CH1DLY0, 0x40002C40 // 0X4000 2C40 FDC1_CH1DLY0 Bits------------------------------------- .EQU FDC1_CH1DLY0_DLY1_15, 31 .EQU FDC1_CH1DLY0_DLY1_14, 30 .EQU FDC1_CH1DLY0_DLY1_13, 29 .EQU FDC1_CH1DLY0_DLY1_12, 28 .EQU FDC1_CH1DLY0_DLY1_11, 27 .EQU FDC1_CH1DLY0_DLY1_10, 26 .EQU FDC1_CH1DLY0_DLY1_9, 25 .EQU FDC1_CH1DLY0_DLY1_8, 24 .EQU FDC1_CH1DLY0_DLY1_7, 23 .EQU FDC1_CH1DLY0_DLY1_6, 22 .EQU FDC1_CH1DLY0_DLY1_5, 21 .EQU FDC1_CH1DLY0_DLY1_4, 20 .EQU FDC1_CH1DLY0_DLY1_3, 19 .EQU FDC1_CH1DLY0_DLY1_2, 18 .EQU FDC1_CH1DLY0_DLY1_1, 17 .EQU FDC1_CH1DLY0_DLY1_0, 16 .EQU FDC1_CH1DLY0_DLY0_15, 15 .EQU FDC1_CH1DLY0_DLY0_14, 14 .EQU FDC1_CH1DLY0_DLY0_13, 13 .EQU FDC1_CH1DLY0_DLY0_12, 12 .EQU FDC1_CH1DLY0_DLY0_11, 11 .EQU FDC1_CH1DLY0_DLY0_10, 10 .EQU FDC1_CH1DLY0_DLY0_9, 9 .EQU FDC1_CH1DLY0_DLY0_8, 8 .EQU FDC1_CH1DLY0_DLY0_7, 7 .EQU FDC1_CH1DLY0_DLY0_6, 6 .EQU FDC1_CH1DLY0_DLY0_5, 5 .EQU FDC1_CH1DLY0_DLY0_4, 4 .EQU FDC1_CH1DLY0_DLY0_3, 3 .EQU FDC1_CH1DLY0_DLY0_2, 2 .EQU FDC1_CH1DLY0_DLY0_1, 1 .EQU FDC1_CH1DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC1_CH1DLY1, 0x40002C44 // 0X4000 2C44 FDC1_CH1DLY1 Bits------------------------------------- .EQU FDC1_CH1DLY1_DLY3_15, 31 .EQU FDC1_CH1DLY1_DLY3_14, 30 .EQU FDC1_CH1DLY1_DLY3_13, 29 .EQU FDC1_CH1DLY1_DLY3_12, 28 .EQU FDC1_CH1DLY1_DLY3_11, 27 .EQU FDC1_CH1DLY1_DLY3_10, 26 .EQU FDC1_CH1DLY1_DLY3_9, 25 .EQU FDC1_CH1DLY1_DLY3_8, 24 .EQU FDC1_CH1DLY1_DLY3_7, 23 .EQU FDC1_CH1DLY1_DLY3_6, 22 .EQU FDC1_CH1DLY1_DLY3_5, 21 .EQU FDC1_CH1DLY1_DLY3_4, 20 .EQU FDC1_CH1DLY1_DLY3_3, 19 .EQU FDC1_CH1DLY1_DLY3_2, 18 .EQU FDC1_CH1DLY1_DLY3_1, 17 .EQU FDC1_CH1DLY1_DLY3_0, 16 .EQU FDC1_CH1DLY1_DLY2_15, 15 .EQU FDC1_CH1DLY1_DLY2_14, 14 .EQU FDC1_CH1DLY1_DLY2_13, 13 .EQU FDC1_CH1DLY1_DLY2_12, 12 .EQU FDC1_CH1DLY1_DLY2_11, 11 .EQU FDC1_CH1DLY1_DLY2_10, 10 .EQU FDC1_CH1DLY1_DLY2_9, 9 .EQU FDC1_CH1DLY1_DLY2_8, 8 .EQU FDC1_CH1DLY1_DLY2_7, 7 .EQU FDC1_CH1DLY1_DLY2_6, 6 .EQU FDC1_CH1DLY1_DLY2_5, 5 .EQU FDC1_CH1DLY1_DLY2_4, 4 .EQU FDC1_CH1DLY1_DLY2_3, 3 .EQU FDC1_CH1DLY1_DLY2_2, 2 .EQU FDC1_CH1DLY1_DLY2_1, 1 .EQU FDC1_CH1DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC1_CH1DLY2, 0x40002C48 // 0X4000 2C48 FDC1_CH1DLY2 Bits------------------------------------- .EQU FDC1_CH1DLY2_DLY4_15, 15 .EQU FDC1_CH1DLY2_DLY4_14, 14 .EQU FDC1_CH1DLY2_DLY4_13, 13 .EQU FDC1_CH1DLY2_DLY4_12, 12 .EQU FDC1_CH1DLY2_DLY4_11, 11 .EQU FDC1_CH1DLY2_DLY4_10, 10 .EQU FDC1_CH1DLY2_DLY4_9, 9 .EQU FDC1_CH1DLY2_DLY4_8, 8 .EQU FDC1_CH1DLY2_DLY4_7, 7 .EQU FDC1_CH1DLY2_DLY4_6, 6 .EQU FDC1_CH1DLY2_DLY4_5, 5 .EQU FDC1_CH1DLY2_DLY4_4, 4 .EQU FDC1_CH1DLY2_DLY4_3, 3 .EQU FDC1_CH1DLY2_DLY4_2, 2 .EQU FDC1_CH1DLY2_DLY4_1, 1 .EQU FDC1_CH1DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC1_CH2DLY0, 0x40002C50 // 0X4000 2C50 FDC1_CH2DLY0 Bits------------------------------------- .EQU FDC1_CH2DLY0_DLY1_15, 31 .EQU FDC1_CH2DLY0_DLY1_14, 30 .EQU FDC1_CH2DLY0_DLY1_13, 29 .EQU FDC1_CH2DLY0_DLY1_12, 28 .EQU FDC1_CH2DLY0_DLY1_11, 27 .EQU FDC1_CH2DLY0_DLY1_10, 26 .EQU FDC1_CH2DLY0_DLY1_9, 25 .EQU FDC1_CH2DLY0_DLY1_8, 24 .EQU FDC1_CH2DLY0_DLY1_7, 23 .EQU FDC1_CH2DLY0_DLY1_6, 22 .EQU FDC1_CH2DLY0_DLY1_5, 21 .EQU FDC1_CH2DLY0_DLY1_4, 20 .EQU FDC1_CH2DLY0_DLY1_3, 19 .EQU FDC1_CH2DLY0_DLY1_2, 18 .EQU FDC1_CH2DLY0_DLY1_1, 17 .EQU FDC1_CH2DLY0_DLY1_0, 16 .EQU FDC1_CH2DLY0_DLY0_15, 15 .EQU FDC1_CH2DLY0_DLY0_14, 14 .EQU FDC1_CH2DLY0_DLY0_13, 13 .EQU FDC1_CH2DLY0_DLY0_12, 12 .EQU FDC1_CH2DLY0_DLY0_11, 11 .EQU FDC1_CH2DLY0_DLY0_10, 10 .EQU FDC1_CH2DLY0_DLY0_9, 9 .EQU FDC1_CH2DLY0_DLY0_8, 8 .EQU FDC1_CH2DLY0_DLY0_7, 7 .EQU FDC1_CH2DLY0_DLY0_6, 6 .EQU FDC1_CH2DLY0_DLY0_5, 5 .EQU FDC1_CH2DLY0_DLY0_4, 4 .EQU FDC1_CH2DLY0_DLY0_3, 3 .EQU FDC1_CH2DLY0_DLY0_2, 2 .EQU FDC1_CH2DLY0_DLY0_1, 1 .EQU FDC1_CH2DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC1_CH2DLY1, 0x40002C54 // 0X4000 2C54 FDC1_CH2DLY1 Bits------------------------------------- .EQU FDC1_CH2DLY1_DLY3_15, 31 .EQU FDC1_CH2DLY1_DLY3_14, 30 .EQU FDC1_CH2DLY1_DLY3_13, 29 .EQU FDC1_CH2DLY1_DLY3_12, 28 .EQU FDC1_CH2DLY1_DLY3_11, 27 .EQU FDC1_CH2DLY1_DLY3_10, 26 .EQU FDC1_CH2DLY1_DLY3_9, 25 .EQU FDC1_CH2DLY1_DLY3_8, 24 .EQU FDC1_CH2DLY1_DLY3_7, 23 .EQU FDC1_CH2DLY1_DLY3_6, 22 .EQU FDC1_CH2DLY1_DLY3_5, 21 .EQU FDC1_CH2DLY1_DLY3_4, 20 .EQU FDC1_CH2DLY1_DLY3_3, 19 .EQU FDC1_CH2DLY1_DLY3_2, 18 .EQU FDC1_CH2DLY1_DLY3_1, 17 .EQU FDC1_CH2DLY1_DLY3_0, 16 .EQU FDC1_CH2DLY1_DLY2_15, 15 .EQU FDC1_CH2DLY1_DLY2_14, 14 .EQU FDC1_CH2DLY1_DLY2_13, 13 .EQU FDC1_CH2DLY1_DLY2_12, 12 .EQU FDC1_CH2DLY1_DLY2_11, 11 .EQU FDC1_CH2DLY1_DLY2_10, 10 .EQU FDC1_CH2DLY1_DLY2_9, 9 .EQU FDC1_CH2DLY1_DLY2_8, 8 .EQU FDC1_CH2DLY1_DLY2_7, 7 .EQU FDC1_CH2DLY1_DLY2_6, 6 .EQU FDC1_CH2DLY1_DLY2_5, 5 .EQU FDC1_CH2DLY1_DLY2_4, 4 .EQU FDC1_CH2DLY1_DLY2_3, 3 .EQU FDC1_CH2DLY1_DLY2_2, 2 .EQU FDC1_CH2DLY1_DLY2_1, 1 .EQU FDC1_CH2DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC1_CH2DLY2, 0x40002C58 // 0X4000 2C58 FDC1_CH2DLY2 Bits------------------------------------- .EQU FDC1_CH2DLY2_DLY4_15, 15 .EQU FDC1_CH2DLY2_DLY4_14, 14 .EQU FDC1_CH2DLY2_DLY4_13, 13 .EQU FDC1_CH2DLY2_DLY4_12, 12 .EQU FDC1_CH2DLY2_DLY4_11, 11 .EQU FDC1_CH2DLY2_DLY4_10, 10 .EQU FDC1_CH2DLY2_DLY4_9, 9 .EQU FDC1_CH2DLY2_DLY4_8, 8 .EQU FDC1_CH2DLY2_DLY4_7, 7 .EQU FDC1_CH2DLY2_DLY4_6, 6 .EQU FDC1_CH2DLY2_DLY4_5, 5 .EQU FDC1_CH2DLY2_DLY4_4, 4 .EQU FDC1_CH2DLY2_DLY4_3, 3 .EQU FDC1_CH2DLY2_DLY4_2, 2 .EQU FDC1_CH2DLY2_DLY4_1, 1 .EQU FDC1_CH2DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC1_CH3DLY0, 0x40002C60 // 0X4000 2C60 FDC1_CH3DLY0 Bits------------------------------------- .EQU FDC1_CH3DLY0_DLY1_15, 31 .EQU FDC1_CH3DLY0_DLY1_14, 30 .EQU FDC1_CH3DLY0_DLY1_13, 29 .EQU FDC1_CH3DLY0_DLY1_12, 28 .EQU FDC1_CH3DLY0_DLY1_11, 27 .EQU FDC1_CH3DLY0_DLY1_10, 26 .EQU FDC1_CH3DLY0_DLY1_9, 25 .EQU FDC1_CH3DLY0_DLY1_8, 24 .EQU FDC1_CH3DLY0_DLY1_7, 23 .EQU FDC1_CH3DLY0_DLY1_6, 22 .EQU FDC1_CH3DLY0_DLY1_5, 21 .EQU FDC1_CH3DLY0_DLY1_4, 20 .EQU FDC1_CH3DLY0_DLY1_3, 19 .EQU FDC1_CH3DLY0_DLY1_2, 18 .EQU FDC1_CH3DLY0_DLY1_1, 17 .EQU FDC1_CH3DLY0_DLY1_0, 16 .EQU FDC1_CH3DLY0_DLY0_15, 15 .EQU FDC1_CH3DLY0_DLY0_14, 14 .EQU FDC1_CH3DLY0_DLY0_13, 13 .EQU FDC1_CH3DLY0_DLY0_12, 12 .EQU FDC1_CH3DLY0_DLY0_11, 11 .EQU FDC1_CH3DLY0_DLY0_10, 10 .EQU FDC1_CH3DLY0_DLY0_9, 9 .EQU FDC1_CH3DLY0_DLY0_8, 8 .EQU FDC1_CH3DLY0_DLY0_7, 7 .EQU FDC1_CH3DLY0_DLY0_6, 6 .EQU FDC1_CH3DLY0_DLY0_5, 5 .EQU FDC1_CH3DLY0_DLY0_4, 4 .EQU FDC1_CH3DLY0_DLY0_3, 3 .EQU FDC1_CH3DLY0_DLY0_2, 2 .EQU FDC1_CH3DLY0_DLY0_1, 1 .EQU FDC1_CH3DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC1_CH3DLY1, 0x40002C64 // 0X4000 2C64 FDC1_CH3DLY1 Bits------------------------------------- .EQU FDC1_CH3DLY1_DLY3_15, 31 .EQU FDC1_CH3DLY1_DLY3_14, 30 .EQU FDC1_CH3DLY1_DLY3_13, 29 .EQU FDC1_CH3DLY1_DLY3_12, 28 .EQU FDC1_CH3DLY1_DLY3_11, 27 .EQU FDC1_CH3DLY1_DLY3_10, 26 .EQU FDC1_CH3DLY1_DLY3_9, 25 .EQU FDC1_CH3DLY1_DLY3_8, 24 .EQU FDC1_CH3DLY1_DLY3_7, 23 .EQU FDC1_CH3DLY1_DLY3_6, 22 .EQU FDC1_CH3DLY1_DLY3_5, 21 .EQU FDC1_CH3DLY1_DLY3_4, 20 .EQU FDC1_CH3DLY1_DLY3_3, 19 .EQU FDC1_CH3DLY1_DLY3_2, 18 .EQU FDC1_CH3DLY1_DLY3_1, 17 .EQU FDC1_CH3DLY1_DLY3_0, 16 .EQU FDC1_CH3DLY1_DLY2_15, 15 .EQU FDC1_CH3DLY1_DLY2_14, 14 .EQU FDC1_CH3DLY1_DLY2_13, 13 .EQU FDC1_CH3DLY1_DLY2_12, 12 .EQU FDC1_CH3DLY1_DLY2_11, 11 .EQU FDC1_CH3DLY1_DLY2_10, 10 .EQU FDC1_CH3DLY1_DLY2_9, 9 .EQU FDC1_CH3DLY1_DLY2_8, 8 .EQU FDC1_CH3DLY1_DLY2_7, 7 .EQU FDC1_CH3DLY1_DLY2_6, 6 .EQU FDC1_CH3DLY1_DLY2_5, 5 .EQU FDC1_CH3DLY1_DLY2_4, 4 .EQU FDC1_CH3DLY1_DLY2_3, 3 .EQU FDC1_CH3DLY1_DLY2_2, 2 .EQU FDC1_CH3DLY1_DLY2_1, 1 .EQU FDC1_CH3DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC1_CH3DLY2, 0x40002C68 // 0X4000 2C68 FDC1_CH3DLY2 Bits------------------------------------- .EQU FDC1_CH3DLY2_DLY4_15, 15 .EQU FDC1_CH3DLY2_DLY4_14, 14 .EQU FDC1_CH3DLY2_DLY4_13, 13 .EQU FDC1_CH3DLY2_DLY4_12, 12 .EQU FDC1_CH3DLY2_DLY4_11, 11 .EQU FDC1_CH3DLY2_DLY4_10, 10 .EQU FDC1_CH3DLY2_DLY4_9, 9 .EQU FDC1_CH3DLY2_DLY4_8, 8 .EQU FDC1_CH3DLY2_DLY4_7, 7 .EQU FDC1_CH3DLY2_DLY4_6, 6 .EQU FDC1_CH3DLY2_DLY4_5, 5 .EQU FDC1_CH3DLY2_DLY4_4, 4 .EQU FDC1_CH3DLY2_DLY4_3, 3 .EQU FDC1_CH3DLY2_DLY4_2, 2 .EQU FDC1_CH3DLY2_DLY4_1, 1 .EQU FDC1_CH3DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC1_PO0DLY, 0x40002C70 // 0X4000 2C70 FDC1_PO0DLY Bits------------------------------------- .EQU FDC1_PO0DLY_DLYH15, 31 .EQU FDC1_PO0DLY_DLYH14, 30 .EQU FDC1_PO0DLY_DLYH13, 29 .EQU FDC1_PO0DLY_DLYH12, 28 .EQU FDC1_PO0DLY_DLYH11, 27 .EQU FDC1_PO0DLY_DLYH10, 26 .EQU FDC1_PO0DLY_DLYH9, 25 .EQU FDC1_PO0DLY_DLYH8, 24 .EQU FDC1_PO0DLY_DLYH7, 23 .EQU FDC1_PO0DLY_DLYH6, 22 .EQU FDC1_PO0DLY_DLYH5, 21 .EQU FDC1_PO0DLY_DLYH4, 20 .EQU FDC1_PO0DLY_DLYH3, 19 .EQU FDC1_PO0DLY_DLYH2, 18 .EQU FDC1_PO0DLY_DLYH1, 17 .EQU FDC1_PO0DLY_DLYH0, 16 .EQU FDC1_PO0DLY_DLYL15, 15 .EQU FDC1_PO0DLY_DLYL14, 14 .EQU FDC1_PO0DLY_DLYL13, 13 .EQU FDC1_PO0DLY_DLYL12, 12 .EQU FDC1_PO0DLY_DLYL11, 11 .EQU FDC1_PO0DLY_DLYL10, 10 .EQU FDC1_PO0DLY_DLYL9, 9 .EQU FDC1_PO0DLY_DLYL8, 8 .EQU FDC1_PO0DLY_DLYL7, 7 .EQU FDC1_PO0DLY_DLYL6, 6 .EQU FDC1_PO0DLY_DLYL5, 5 .EQU FDC1_PO0DLY_DLYL4, 4 .EQU FDC1_PO0DLY_DLYL3, 3 .EQU FDC1_PO0DLY_DLYL2, 2 .EQU FDC1_PO0DLY_DLYL1, 1 .EQU FDC1_PO0DLY_DLYL0, 0 // register------------------------------------- .EQU FDC1_PO1DLY, 0x40002C74 // 0X4000 2C74 FDC1_PO1DLY Bits------------------------------------- .EQU FDC1_PO1DLY_DLYH15, 31 .EQU FDC1_PO1DLY_DLYH14, 30 .EQU FDC1_PO1DLY_DLYH13, 29 .EQU FDC1_PO1DLY_DLYH12, 28 .EQU FDC1_PO1DLY_DLYH11, 27 .EQU FDC1_PO1DLY_DLYH10, 26 .EQU FDC1_PO1DLY_DLYH9, 25 .EQU FDC1_PO1DLY_DLYH8, 24 .EQU FDC1_PO1DLY_DLYH7, 23 .EQU FDC1_PO1DLY_DLYH6, 22 .EQU FDC1_PO1DLY_DLYH5, 21 .EQU FDC1_PO1DLY_DLYH4, 20 .EQU FDC1_PO1DLY_DLYH3, 19 .EQU FDC1_PO1DLY_DLYH2, 18 .EQU FDC1_PO1DLY_DLYH1, 17 .EQU FDC1_PO1DLY_DLYH0, 16 .EQU FDC1_PO1DLY_DLYL15, 15 .EQU FDC1_PO1DLY_DLYL14, 14 .EQU FDC1_PO1DLY_DLYL13, 13 .EQU FDC1_PO1DLY_DLYL12, 12 .EQU FDC1_PO1DLY_DLYL11, 11 .EQU FDC1_PO1DLY_DLYL10, 10 .EQU FDC1_PO1DLY_DLYL9, 9 .EQU FDC1_PO1DLY_DLYL8, 8 .EQU FDC1_PO1DLY_DLYL7, 7 .EQU FDC1_PO1DLY_DLYL6, 6 .EQU FDC1_PO1DLY_DLYL5, 5 .EQU FDC1_PO1DLY_DLYL4, 4 .EQU FDC1_PO1DLY_DLYL3, 3 .EQU FDC1_PO1DLY_DLYL2, 2 .EQU FDC1_PO1DLY_DLYL1, 1 .EQU FDC1_PO1DLY_DLYL0, 0 // register------------------------------------- .EQU FDC1_PO2DLY, 0x40002C78 // 0X4000 2C78 FDC1_PO2DLY Bits------------------------------------- .EQU FDC1_PO2DLY_DLYH15, 31 .EQU FDC1_PO2DLY_DLYH14, 30 .EQU FDC1_PO2DLY_DLYH13, 29 .EQU FDC1_PO2DLY_DLYH12, 28 .EQU FDC1_PO2DLY_DLYH11, 27 .EQU FDC1_PO2DLY_DLYH10, 26 .EQU FDC1_PO2DLY_DLYH9, 25 .EQU FDC1_PO2DLY_DLYH8, 24 .EQU FDC1_PO2DLY_DLYH7, 23 .EQU FDC1_PO2DLY_DLYH6, 22 .EQU FDC1_PO2DLY_DLYH5, 21 .EQU FDC1_PO2DLY_DLYH4, 20 .EQU FDC1_PO2DLY_DLYH3, 19 .EQU FDC1_PO2DLY_DLYH2, 18 .EQU FDC1_PO2DLY_DLYH1, 17 .EQU FDC1_PO2DLY_DLYH0, 16 .EQU FDC1_PO2DLY_DLYL15, 15 .EQU FDC1_PO2DLY_DLYL14, 14 .EQU FDC1_PO2DLY_DLYL13, 13 .EQU FDC1_PO2DLY_DLYL12, 12 .EQU FDC1_PO2DLY_DLYL11, 11 .EQU FDC1_PO2DLY_DLYL10, 10 .EQU FDC1_PO2DLY_DLYL9, 9 .EQU FDC1_PO2DLY_DLYL8, 8 .EQU FDC1_PO2DLY_DLYL7, 7 .EQU FDC1_PO2DLY_DLYL6, 6 .EQU FDC1_PO2DLY_DLYL5, 5 .EQU FDC1_PO2DLY_DLYL4, 4 .EQU FDC1_PO2DLY_DLYL3, 3 .EQU FDC1_PO2DLY_DLYL2, 2 .EQU FDC1_PO2DLY_DLYL1, 1 .EQU FDC1_PO2DLY_DLYL0, 0 // register------------------------------------- .EQU FDC1_PO3DLY, 0x40002C7C // 0X4000 2C7C FDC1_PO3DLY Bits------------------------------------- .EQU FDC1_PO3DLY_DLYH15, 31 .EQU FDC1_PO3DLY_DLYH14, 30 .EQU FDC1_PO3DLY_DLYH13, 29 .EQU FDC1_PO3DLY_DLYH12, 28 .EQU FDC1_PO3DLY_DLYH11, 27 .EQU FDC1_PO3DLY_DLYH10, 26 .EQU FDC1_PO3DLY_DLYH9, 25 .EQU FDC1_PO3DLY_DLYH8, 24 .EQU FDC1_PO3DLY_DLYH7, 23 .EQU FDC1_PO3DLY_DLYH6, 22 .EQU FDC1_PO3DLY_DLYH5, 21 .EQU FDC1_PO3DLY_DLYH4, 20 .EQU FDC1_PO3DLY_DLYH3, 19 .EQU FDC1_PO3DLY_DLYH2, 18 .EQU FDC1_PO3DLY_DLYH1, 17 .EQU FDC1_PO3DLY_DLYH0, 16 .EQU FDC1_PO3DLY_DLYL15, 15 .EQU FDC1_PO3DLY_DLYL14, 14 .EQU FDC1_PO3DLY_DLYL13, 13 .EQU FDC1_PO3DLY_DLYL12, 12 .EQU FDC1_PO3DLY_DLYL11, 11 .EQU FDC1_PO3DLY_DLYL10, 10 .EQU FDC1_PO3DLY_DLYL9, 9 .EQU FDC1_PO3DLY_DLYL8, 8 .EQU FDC1_PO3DLY_DLYL7, 7 .EQU FDC1_PO3DLY_DLYL6, 6 .EQU FDC1_PO3DLY_DLYL5, 5 .EQU FDC1_PO3DLY_DLYL4, 4 .EQU FDC1_PO3DLY_DLYL3, 3 .EQU FDC1_PO3DLY_DLYL2, 2 .EQU FDC1_PO3DLY_DLYL1, 1 .EQU FDC1_PO3DLY_DLYL0, 0 // register------------------------------------- .EQU FDC2_CTL, 0x40002C80 // 0X4000 2C80 FDC2_CTL Bits------------------------------------- .EQU FDC2_CTL_TCLR, 26 .EQU FDC2_CTL_CLKSEL1, 25 .EQU FDC2_CTL_CLKSEL0, 24 .EQU FDC2_CTL_MDLIC, 23 .EQU FDC2_CTL_CMODE, 22 .EQU FDC2_CTL_BBMODE, 21 .EQU FDC2_CTL_LDMOD1, 20 .EQU FDC2_CTL_LDMOD0, 19 .EQU FDC2_CTL_FDCEIE, 18 .EQU FDC2_CTL_SWTRIG, 17 .EQU FDC2_CTL_FDCDE, 16 .EQU FDC2_CTL_PRESC2, 15 .EQU FDC2_CTL_PRESC1, 14 .EQU FDC2_CTL_PRESC0, 13 .EQU FDC2_CTL_MULSEL5, 12 .EQU FDC2_CTL_MULSEL4, 11 .EQU FDC2_CTL_MULSEL3, 10 .EQU FDC2_CTL_MULSEL2, 9 .EQU FDC2_CTL_MULSEL1, 8 .EQU FDC2_CTL_MULSEL0, 7 .EQU FDC2_CTL_TRGSEL, 6 .EQU FDC2_CTL_MDLIE, 5 .EQU FDC2_CTL_MDLIF, 4 .EQU FDC2_CTL_CONT, 3 .EQU FDC2_CTL_LDOK, 2 .EQU FDC2_CTL_POEN, 1 .EQU FDC2_CTL_FDCEN, 0 // register------------------------------------- .EQU FDC2_MOD, 0x40002C84 // 0X4000 2C84 FDC2_MOD Bits------------------------------------- .EQU FDC2_MOD_MOD15, 15 .EQU FDC2_MOD_MOD14, 14 .EQU FDC2_MOD_MOD13, 13 .EQU FDC2_MOD_MOD12, 12 .EQU FDC2_MOD_MOD11, 11 .EQU FDC2_MOD_MOD10, 10 .EQU FDC2_MOD_MOD9, 9 .EQU FDC2_MOD_MOD8, 8 .EQU FDC2_MOD_MOD7, 7 .EQU FDC2_MOD_MOD6, 6 .EQU FDC2_MOD_MOD5, 5 .EQU FDC2_MOD_MOD4, 4 .EQU FDC2_MOD_MOD3, 3 .EQU FDC2_MOD_MOD2, 2 .EQU FDC2_MOD_MOD1, 1 .EQU FDC2_MOD_MOD0, 0 // register------------------------------------- .EQU FDC2_CNT, 0x40002C88 // 0X4000 2C88 FDC2_CNT Bits------------------------------------- .EQU FDC2_CNT_CNT15, 15 .EQU FDC2_CNT_CNT14, 14 .EQU FDC2_CNT_CNT13, 13 .EQU FDC2_CNT_CNT12, 12 .EQU FDC2_CNT_CNT11, 11 .EQU FDC2_CNT_CNT10, 10 .EQU FDC2_CNT_CNT9, 9 .EQU FDC2_CNT_CNT8, 8 .EQU FDC2_CNT_CNT7, 7 .EQU FDC2_CNT_CNT6, 6 .EQU FDC2_CNT_CNT5, 5 .EQU FDC2_CNT_CNT4, 4 .EQU FDC2_CNT_CNT3, 3 .EQU FDC2_CNT_CNT2, 2 .EQU FDC2_CNT_CNT1, 1 .EQU FDC2_CNT_CNT0, 0 // register------------------------------------- .EQU FDC2_IDLY, 0x40002C8C // 0X4000 2C8C FDC2_IDLY Bits------------------------------------- .EQU FDC2_IDLY_IDLY15, 15 .EQU FDC2_IDLY_IDLY14, 14 .EQU FDC2_IDLY_IDLY13, 13 .EQU FDC2_IDLY_IDLY12, 12 .EQU FDC2_IDLY_IDLY11, 11 .EQU FDC2_IDLY_IDLY10, 10 .EQU FDC2_IDLY_IDLY9, 9 .EQU FDC2_IDLY_IDLY8, 8 .EQU FDC2_IDLY_IDLY7, 7 .EQU FDC2_IDLY_IDLY6, 6 .EQU FDC2_IDLY_IDLY5, 5 .EQU FDC2_IDLY_IDLY4, 4 .EQU FDC2_IDLY_IDLY3, 3 .EQU FDC2_IDLY_IDLY2, 2 .EQU FDC2_IDLY_IDLY1, 1 .EQU FDC2_IDLY_IDLY0, 0 // register------------------------------------- .EQU FDC2_CH0CTL, 0x40002C90 // 0X4000 2C90 FDC2_CH0CTL Bits------------------------------------- .EQU FDC2_CH0CTL_ERRIC4, 24 .EQU FDC2_CH0CTL_ERRIC3, 23 .EQU FDC2_CH0CTL_ERRIC2, 22 .EQU FDC2_CH0CTL_ERRIC1, 21 .EQU FDC2_CH0CTL_ERRIC0, 20 .EQU FDC2_CH0CTL_ERR4, 19 .EQU FDC2_CH0CTL_ERR3, 18 .EQU FDC2_CH0CTL_ERR2, 17 .EQU FDC2_CH0CTL_ERR1, 16 .EQU FDC2_CH0CTL_ERR0, 15 .EQU FDC2_CH0CTL_CF4, 14 .EQU FDC2_CH0CTL_CF3, 13 .EQU FDC2_CH0CTL_CF2, 12 .EQU FDC2_CH0CTL_CF1, 11 .EQU FDC2_CH0CTL_CF0, 10 .EQU FDC2_CH0CTL_TOS4, 9 .EQU FDC2_CH0CTL_TOS3, 8 .EQU FDC2_CH0CTL_TOS2, 7 .EQU FDC2_CH0CTL_TOS1, 6 .EQU FDC2_CH0CTL_TOS0, 5 .EQU FDC2_CH0CTL_PREN4, 4 .EQU FDC2_CH0CTL_PREN3, 3 .EQU FDC2_CH0CTL_PREN2, 2 .EQU FDC2_CH0CTL_PREN1, 1 .EQU FDC2_CH0CTL_PREN0, 0 // register------------------------------------- .EQU FDC2_CH1CTL, 0x40002C94 // 0X4000 2C94 FDC2_CH1CTL Bits------------------------------------- .EQU FDC2_CH1CTL_ERRIC4, 24 .EQU FDC2_CH1CTL_ERRIC3, 23 .EQU FDC2_CH1CTL_ERRIC2, 22 .EQU FDC2_CH1CTL_ERRIC1, 21 .EQU FDC2_CH1CTL_ERRIC0, 20 .EQU FDC2_CH1CTL_ERR4, 19 .EQU FDC2_CH1CTL_ERR3, 18 .EQU FDC2_CH1CTL_ERR2, 17 .EQU FDC2_CH1CTL_ERR1, 16 .EQU FDC2_CH1CTL_ERR0, 15 .EQU FDC2_CH1CTL_CF4, 14 .EQU FDC2_CH1CTL_CF3, 13 .EQU FDC2_CH1CTL_CF2, 12 .EQU FDC2_CH1CTL_CF1, 11 .EQU FDC2_CH1CTL_CF0, 10 .EQU FDC2_CH1CTL_TOS4, 9 .EQU FDC2_CH1CTL_TOS3, 8 .EQU FDC2_CH1CTL_TOS2, 7 .EQU FDC2_CH1CTL_TOS1, 6 .EQU FDC2_CH1CTL_TOS0, 5 .EQU FDC2_CH1CTL_PREN4, 4 .EQU FDC2_CH1CTL_PREN3, 3 .EQU FDC2_CH1CTL_PREN2, 2 .EQU FDC2_CH1CTL_PREN1, 1 .EQU FDC2_CH1CTL_PREN0, 0 // register------------------------------------- .EQU FDC2_CH2CTL, 0x40002C98 // 0X4000 2C98 FDC2_CH2CTL Bits------------------------------------- .EQU FDC2_CH2CTL_ERRIC4, 24 .EQU FDC2_CH2CTL_ERRIC3, 23 .EQU FDC2_CH2CTL_ERRIC2, 22 .EQU FDC2_CH2CTL_ERRIC1, 21 .EQU FDC2_CH2CTL_ERRIC0, 20 .EQU FDC2_CH2CTL_ERR4, 19 .EQU FDC2_CH2CTL_ERR3, 18 .EQU FDC2_CH2CTL_ERR2, 17 .EQU FDC2_CH2CTL_ERR1, 16 .EQU FDC2_CH2CTL_ERR0, 15 .EQU FDC2_CH2CTL_CF4, 14 .EQU FDC2_CH2CTL_CF3, 13 .EQU FDC2_CH2CTL_CF2, 12 .EQU FDC2_CH2CTL_CF1, 11 .EQU FDC2_CH2CTL_CF0, 10 .EQU FDC2_CH2CTL_TOS4, 9 .EQU FDC2_CH2CTL_TOS3, 8 .EQU FDC2_CH2CTL_TOS2, 7 .EQU FDC2_CH2CTL_TOS1, 6 .EQU FDC2_CH2CTL_TOS0, 5 .EQU FDC2_CH2CTL_PREN4, 4 .EQU FDC2_CH2CTL_PREN3, 3 .EQU FDC2_CH2CTL_PREN2, 2 .EQU FDC2_CH2CTL_PREN1, 1 .EQU FDC2_CH2CTL_PREN0, 0 // register------------------------------------- .EQU FDC2_CH3CTL, 0x40002C9C // 0X4000 2C9C FDC2_CH3CTL Bits------------------------------------- .EQU FDC2_CH3CTL_ERRIC4, 24 .EQU FDC2_CH3CTL_ERRIC3, 23 .EQU FDC2_CH3CTL_ERRIC2, 22 .EQU FDC2_CH3CTL_ERRIC1, 21 .EQU FDC2_CH3CTL_ERRIC0, 20 .EQU FDC2_CH3CTL_ERR4, 19 .EQU FDC2_CH3CTL_ERR3, 18 .EQU FDC2_CH3CTL_ERR2, 17 .EQU FDC2_CH3CTL_ERR1, 16 .EQU FDC2_CH3CTL_ERR0, 15 .EQU FDC2_CH3CTL_CF4, 14 .EQU FDC2_CH3CTL_CF3, 13 .EQU FDC2_CH3CTL_CF2, 12 .EQU FDC2_CH3CTL_CF1, 11 .EQU FDC2_CH3CTL_CF0, 10 .EQU FDC2_CH3CTL_TOS4, 9 .EQU FDC2_CH3CTL_TOS3, 8 .EQU FDC2_CH3CTL_TOS2, 7 .EQU FDC2_CH3CTL_TOS1, 6 .EQU FDC2_CH3CTL_TOS0, 5 .EQU FDC2_CH3CTL_PREN4, 4 .EQU FDC2_CH3CTL_PREN3, 3 .EQU FDC2_CH3CTL_PREN2, 2 .EQU FDC2_CH3CTL_PREN1, 1 .EQU FDC2_CH3CTL_PREN0, 0 // register------------------------------------- .EQU FDC2_CH0DLY0, 0x40002CB0 // 0X4000 2CB0 FDC2_CH0DLY0 Bits------------------------------------- .EQU FDC2_CH0DLY0_DLY1_15, 31 .EQU FDC2_CH0DLY0_DLY1_14, 30 .EQU FDC2_CH0DLY0_DLY1_13, 29 .EQU FDC2_CH0DLY0_DLY1_12, 28 .EQU FDC2_CH0DLY0_DLY1_11, 27 .EQU FDC2_CH0DLY0_DLY1_10, 26 .EQU FDC2_CH0DLY0_DLY1_9, 25 .EQU FDC2_CH0DLY0_DLY1_8, 24 .EQU FDC2_CH0DLY0_DLY1_7, 23 .EQU FDC2_CH0DLY0_DLY1_6, 22 .EQU FDC2_CH0DLY0_DLY1_5, 21 .EQU FDC2_CH0DLY0_DLY1_4, 20 .EQU FDC2_CH0DLY0_DLY1_3, 19 .EQU FDC2_CH0DLY0_DLY1_2, 18 .EQU FDC2_CH0DLY0_DLY1_1, 17 .EQU FDC2_CH0DLY0_DLY1_0, 16 .EQU FDC2_CH0DLY0_DLY0_15, 15 .EQU FDC2_CH0DLY0_DLY0_14, 14 .EQU FDC2_CH0DLY0_DLY0_13, 13 .EQU FDC2_CH0DLY0_DLY0_12, 12 .EQU FDC2_CH0DLY0_DLY0_11, 11 .EQU FDC2_CH0DLY0_DLY0_10, 10 .EQU FDC2_CH0DLY0_DLY0_9, 9 .EQU FDC2_CH0DLY0_DLY0_8, 8 .EQU FDC2_CH0DLY0_DLY0_7, 7 .EQU FDC2_CH0DLY0_DLY0_6, 6 .EQU FDC2_CH0DLY0_DLY0_5, 5 .EQU FDC2_CH0DLY0_DLY0_4, 4 .EQU FDC2_CH0DLY0_DLY0_3, 3 .EQU FDC2_CH0DLY0_DLY0_2, 2 .EQU FDC2_CH0DLY0_DLY0_1, 1 .EQU FDC2_CH0DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC2_CH0DLY1, 0x40002CB4 // 0X4000 2CB4 FDC2_CH0DLY1 Bits------------------------------------- .EQU FDC2_CH0DLY1_DLY3_15, 31 .EQU FDC2_CH0DLY1_DLY3_14, 30 .EQU FDC2_CH0DLY1_DLY3_13, 29 .EQU FDC2_CH0DLY1_DLY3_12, 28 .EQU FDC2_CH0DLY1_DLY3_11, 27 .EQU FDC2_CH0DLY1_DLY3_10, 26 .EQU FDC2_CH0DLY1_DLY3_9, 25 .EQU FDC2_CH0DLY1_DLY3_8, 24 .EQU FDC2_CH0DLY1_DLY3_7, 23 .EQU FDC2_CH0DLY1_DLY3_6, 22 .EQU FDC2_CH0DLY1_DLY3_5, 21 .EQU FDC2_CH0DLY1_DLY3_4, 20 .EQU FDC2_CH0DLY1_DLY3_3, 19 .EQU FDC2_CH0DLY1_DLY3_2, 18 .EQU FDC2_CH0DLY1_DLY3_1, 17 .EQU FDC2_CH0DLY1_DLY3_0, 16 .EQU FDC2_CH0DLY1_DLY2_15, 15 .EQU FDC2_CH0DLY1_DLY2_14, 14 .EQU FDC2_CH0DLY1_DLY2_13, 13 .EQU FDC2_CH0DLY1_DLY2_12, 12 .EQU FDC2_CH0DLY1_DLY2_11, 11 .EQU FDC2_CH0DLY1_DLY2_10, 10 .EQU FDC2_CH0DLY1_DLY2_9, 9 .EQU FDC2_CH0DLY1_DLY2_8, 8 .EQU FDC2_CH0DLY1_DLY2_7, 7 .EQU FDC2_CH0DLY1_DLY2_6, 6 .EQU FDC2_CH0DLY1_DLY2_5, 5 .EQU FDC2_CH0DLY1_DLY2_4, 4 .EQU FDC2_CH0DLY1_DLY2_3, 3 .EQU FDC2_CH0DLY1_DLY2_2, 2 .EQU FDC2_CH0DLY1_DLY2_1, 1 .EQU FDC2_CH0DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC2_CH0DLY2, 0x40002CB8 // 0X4000 2CB8 FDC2_CH0DLY2 Bits------------------------------------- .EQU FDC2_CH0DLY2_DLY4_15, 15 .EQU FDC2_CH0DLY2_DLY4_14, 14 .EQU FDC2_CH0DLY2_DLY4_13, 13 .EQU FDC2_CH0DLY2_DLY4_12, 12 .EQU FDC2_CH0DLY2_DLY4_11, 11 .EQU FDC2_CH0DLY2_DLY4_10, 10 .EQU FDC2_CH0DLY2_DLY4_9, 9 .EQU FDC2_CH0DLY2_DLY4_8, 8 .EQU FDC2_CH0DLY2_DLY4_7, 7 .EQU FDC2_CH0DLY2_DLY4_6, 6 .EQU FDC2_CH0DLY2_DLY4_5, 5 .EQU FDC2_CH0DLY2_DLY4_4, 4 .EQU FDC2_CH0DLY2_DLY4_3, 3 .EQU FDC2_CH0DLY2_DLY4_2, 2 .EQU FDC2_CH0DLY2_DLY4_1, 1 .EQU FDC2_CH0DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC2_CH1DLY0, 0x40002CC0 // 0X4000 2CC0 FDC2_CH1DLY0 Bits------------------------------------- .EQU FDC2_CH1DLY0_DLY1_15, 31 .EQU FDC2_CH1DLY0_DLY1_14, 30 .EQU FDC2_CH1DLY0_DLY1_13, 29 .EQU FDC2_CH1DLY0_DLY1_12, 28 .EQU FDC2_CH1DLY0_DLY1_11, 27 .EQU FDC2_CH1DLY0_DLY1_10, 26 .EQU FDC2_CH1DLY0_DLY1_9, 25 .EQU FDC2_CH1DLY0_DLY1_8, 24 .EQU FDC2_CH1DLY0_DLY1_7, 23 .EQU FDC2_CH1DLY0_DLY1_6, 22 .EQU FDC2_CH1DLY0_DLY1_5, 21 .EQU FDC2_CH1DLY0_DLY1_4, 20 .EQU FDC2_CH1DLY0_DLY1_3, 19 .EQU FDC2_CH1DLY0_DLY1_2, 18 .EQU FDC2_CH1DLY0_DLY1_1, 17 .EQU FDC2_CH1DLY0_DLY1_0, 16 .EQU FDC2_CH1DLY0_DLY0_15, 15 .EQU FDC2_CH1DLY0_DLY0_14, 14 .EQU FDC2_CH1DLY0_DLY0_13, 13 .EQU FDC2_CH1DLY0_DLY0_12, 12 .EQU FDC2_CH1DLY0_DLY0_11, 11 .EQU FDC2_CH1DLY0_DLY0_10, 10 .EQU FDC2_CH1DLY0_DLY0_9, 9 .EQU FDC2_CH1DLY0_DLY0_8, 8 .EQU FDC2_CH1DLY0_DLY0_7, 7 .EQU FDC2_CH1DLY0_DLY0_6, 6 .EQU FDC2_CH1DLY0_DLY0_5, 5 .EQU FDC2_CH1DLY0_DLY0_4, 4 .EQU FDC2_CH1DLY0_DLY0_3, 3 .EQU FDC2_CH1DLY0_DLY0_2, 2 .EQU FDC2_CH1DLY0_DLY0_1, 1 .EQU FDC2_CH1DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC2_CH1DLY1, 0x40002CC4 // 0X4000 2CC4 FDC2_CH1DLY1 Bits------------------------------------- .EQU FDC2_CH1DLY1_DLY3_15, 31 .EQU FDC2_CH1DLY1_DLY3_14, 30 .EQU FDC2_CH1DLY1_DLY3_13, 29 .EQU FDC2_CH1DLY1_DLY3_12, 28 .EQU FDC2_CH1DLY1_DLY3_11, 27 .EQU FDC2_CH1DLY1_DLY3_10, 26 .EQU FDC2_CH1DLY1_DLY3_9, 25 .EQU FDC2_CH1DLY1_DLY3_8, 24 .EQU FDC2_CH1DLY1_DLY3_7, 23 .EQU FDC2_CH1DLY1_DLY3_6, 22 .EQU FDC2_CH1DLY1_DLY3_5, 21 .EQU FDC2_CH1DLY1_DLY3_4, 20 .EQU FDC2_CH1DLY1_DLY3_3, 19 .EQU FDC2_CH1DLY1_DLY3_2, 18 .EQU FDC2_CH1DLY1_DLY3_1, 17 .EQU FDC2_CH1DLY1_DLY3_0, 16 .EQU FDC2_CH1DLY1_DLY2_15, 15 .EQU FDC2_CH1DLY1_DLY2_14, 14 .EQU FDC2_CH1DLY1_DLY2_13, 13 .EQU FDC2_CH1DLY1_DLY2_12, 12 .EQU FDC2_CH1DLY1_DLY2_11, 11 .EQU FDC2_CH1DLY1_DLY2_10, 10 .EQU FDC2_CH1DLY1_DLY2_9, 9 .EQU FDC2_CH1DLY1_DLY2_8, 8 .EQU FDC2_CH1DLY1_DLY2_7, 7 .EQU FDC2_CH1DLY1_DLY2_6, 6 .EQU FDC2_CH1DLY1_DLY2_5, 5 .EQU FDC2_CH1DLY1_DLY2_4, 4 .EQU FDC2_CH1DLY1_DLY2_3, 3 .EQU FDC2_CH1DLY1_DLY2_2, 2 .EQU FDC2_CH1DLY1_DLY2_1, 1 .EQU FDC2_CH1DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC2_CH1DLY2, 0x40002CC8 // 0X4000 2CC8 FDC2_CH1DLY2 Bits------------------------------------- .EQU FDC2_CH1DLY2_DLY4_15, 15 .EQU FDC2_CH1DLY2_DLY4_14, 14 .EQU FDC2_CH1DLY2_DLY4_13, 13 .EQU FDC2_CH1DLY2_DLY4_12, 12 .EQU FDC2_CH1DLY2_DLY4_11, 11 .EQU FDC2_CH1DLY2_DLY4_10, 10 .EQU FDC2_CH1DLY2_DLY4_9, 9 .EQU FDC2_CH1DLY2_DLY4_8, 8 .EQU FDC2_CH1DLY2_DLY4_7, 7 .EQU FDC2_CH1DLY2_DLY4_6, 6 .EQU FDC2_CH1DLY2_DLY4_5, 5 .EQU FDC2_CH1DLY2_DLY4_4, 4 .EQU FDC2_CH1DLY2_DLY4_3, 3 .EQU FDC2_CH1DLY2_DLY4_2, 2 .EQU FDC2_CH1DLY2_DLY4_1, 1 .EQU FDC2_CH1DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC2_CH2DLY0, 0x40002CD0 // 0X4000 2CD0 FDC2_CH2DLY0 Bits------------------------------------- .EQU FDC2_CH2DLY0_DLY1_15, 31 .EQU FDC2_CH2DLY0_DLY1_14, 30 .EQU FDC2_CH2DLY0_DLY1_13, 29 .EQU FDC2_CH2DLY0_DLY1_12, 28 .EQU FDC2_CH2DLY0_DLY1_11, 27 .EQU FDC2_CH2DLY0_DLY1_10, 26 .EQU FDC2_CH2DLY0_DLY1_9, 25 .EQU FDC2_CH2DLY0_DLY1_8, 24 .EQU FDC2_CH2DLY0_DLY1_7, 23 .EQU FDC2_CH2DLY0_DLY1_6, 22 .EQU FDC2_CH2DLY0_DLY1_5, 21 .EQU FDC2_CH2DLY0_DLY1_4, 20 .EQU FDC2_CH2DLY0_DLY1_3, 19 .EQU FDC2_CH2DLY0_DLY1_2, 18 .EQU FDC2_CH2DLY0_DLY1_1, 17 .EQU FDC2_CH2DLY0_DLY1_0, 16 .EQU FDC2_CH2DLY0_DLY0_15, 15 .EQU FDC2_CH2DLY0_DLY0_14, 14 .EQU FDC2_CH2DLY0_DLY0_13, 13 .EQU FDC2_CH2DLY0_DLY0_12, 12 .EQU FDC2_CH2DLY0_DLY0_11, 11 .EQU FDC2_CH2DLY0_DLY0_10, 10 .EQU FDC2_CH2DLY0_DLY0_9, 9 .EQU FDC2_CH2DLY0_DLY0_8, 8 .EQU FDC2_CH2DLY0_DLY0_7, 7 .EQU FDC2_CH2DLY0_DLY0_6, 6 .EQU FDC2_CH2DLY0_DLY0_5, 5 .EQU FDC2_CH2DLY0_DLY0_4, 4 .EQU FDC2_CH2DLY0_DLY0_3, 3 .EQU FDC2_CH2DLY0_DLY0_2, 2 .EQU FDC2_CH2DLY0_DLY0_1, 1 .EQU FDC2_CH2DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC2_CH2DLY1, 0x40002CD4 // 0X4000 2CD4 FDC2_CH2DLY1 Bits------------------------------------- .EQU FDC2_CH2DLY1_DLY3_15, 31 .EQU FDC2_CH2DLY1_DLY3_14, 30 .EQU FDC2_CH2DLY1_DLY3_13, 29 .EQU FDC2_CH2DLY1_DLY3_12, 28 .EQU FDC2_CH2DLY1_DLY3_11, 27 .EQU FDC2_CH2DLY1_DLY3_10, 26 .EQU FDC2_CH2DLY1_DLY3_9, 25 .EQU FDC2_CH2DLY1_DLY3_8, 24 .EQU FDC2_CH2DLY1_DLY3_7, 23 .EQU FDC2_CH2DLY1_DLY3_6, 22 .EQU FDC2_CH2DLY1_DLY3_5, 21 .EQU FDC2_CH2DLY1_DLY3_4, 20 .EQU FDC2_CH2DLY1_DLY3_3, 19 .EQU FDC2_CH2DLY1_DLY3_2, 18 .EQU FDC2_CH2DLY1_DLY3_1, 17 .EQU FDC2_CH2DLY1_DLY3_0, 16 .EQU FDC2_CH2DLY1_DLY2_15, 15 .EQU FDC2_CH2DLY1_DLY2_14, 14 .EQU FDC2_CH2DLY1_DLY2_13, 13 .EQU FDC2_CH2DLY1_DLY2_12, 12 .EQU FDC2_CH2DLY1_DLY2_11, 11 .EQU FDC2_CH2DLY1_DLY2_10, 10 .EQU FDC2_CH2DLY1_DLY2_9, 9 .EQU FDC2_CH2DLY1_DLY2_8, 8 .EQU FDC2_CH2DLY1_DLY2_7, 7 .EQU FDC2_CH2DLY1_DLY2_6, 6 .EQU FDC2_CH2DLY1_DLY2_5, 5 .EQU FDC2_CH2DLY1_DLY2_4, 4 .EQU FDC2_CH2DLY1_DLY2_3, 3 .EQU FDC2_CH2DLY1_DLY2_2, 2 .EQU FDC2_CH2DLY1_DLY2_1, 1 .EQU FDC2_CH2DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC2_CH2DLY2, 0x40002CD8 // 0X4000 2CD8 FDC2_CH2DLY2 Bits------------------------------------- .EQU FDC2_CH2DLY2_DLY4_15, 15 .EQU FDC2_CH2DLY2_DLY4_14, 14 .EQU FDC2_CH2DLY2_DLY4_13, 13 .EQU FDC2_CH2DLY2_DLY4_12, 12 .EQU FDC2_CH2DLY2_DLY4_11, 11 .EQU FDC2_CH2DLY2_DLY4_10, 10 .EQU FDC2_CH2DLY2_DLY4_9, 9 .EQU FDC2_CH2DLY2_DLY4_8, 8 .EQU FDC2_CH2DLY2_DLY4_7, 7 .EQU FDC2_CH2DLY2_DLY4_6, 6 .EQU FDC2_CH2DLY2_DLY4_5, 5 .EQU FDC2_CH2DLY2_DLY4_4, 4 .EQU FDC2_CH2DLY2_DLY4_3, 3 .EQU FDC2_CH2DLY2_DLY4_2, 2 .EQU FDC2_CH2DLY2_DLY4_1, 1 .EQU FDC2_CH2DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC2_CH3DLY0, 0x40002CE0 // 0X4000 2CE0 FDC2_CH3DLY0 Bits------------------------------------- .EQU FDC2_CH3DLY0_DLY1_15, 31 .EQU FDC2_CH3DLY0_DLY1_14, 30 .EQU FDC2_CH3DLY0_DLY1_13, 29 .EQU FDC2_CH3DLY0_DLY1_12, 28 .EQU FDC2_CH3DLY0_DLY1_11, 27 .EQU FDC2_CH3DLY0_DLY1_10, 26 .EQU FDC2_CH3DLY0_DLY1_9, 25 .EQU FDC2_CH3DLY0_DLY1_8, 24 .EQU FDC2_CH3DLY0_DLY1_7, 23 .EQU FDC2_CH3DLY0_DLY1_6, 22 .EQU FDC2_CH3DLY0_DLY1_5, 21 .EQU FDC2_CH3DLY0_DLY1_4, 20 .EQU FDC2_CH3DLY0_DLY1_3, 19 .EQU FDC2_CH3DLY0_DLY1_2, 18 .EQU FDC2_CH3DLY0_DLY1_1, 17 .EQU FDC2_CH3DLY0_DLY1_0, 16 .EQU FDC2_CH3DLY0_DLY0_15, 15 .EQU FDC2_CH3DLY0_DLY0_14, 14 .EQU FDC2_CH3DLY0_DLY0_13, 13 .EQU FDC2_CH3DLY0_DLY0_12, 12 .EQU FDC2_CH3DLY0_DLY0_11, 11 .EQU FDC2_CH3DLY0_DLY0_10, 10 .EQU FDC2_CH3DLY0_DLY0_9, 9 .EQU FDC2_CH3DLY0_DLY0_8, 8 .EQU FDC2_CH3DLY0_DLY0_7, 7 .EQU FDC2_CH3DLY0_DLY0_6, 6 .EQU FDC2_CH3DLY0_DLY0_5, 5 .EQU FDC2_CH3DLY0_DLY0_4, 4 .EQU FDC2_CH3DLY0_DLY0_3, 3 .EQU FDC2_CH3DLY0_DLY0_2, 2 .EQU FDC2_CH3DLY0_DLY0_1, 1 .EQU FDC2_CH3DLY0_DLY0_0, 0 // register------------------------------------- .EQU FDC2_CH3DLY1, 0x40002CE4 // 0X4000 2CE4 FDC2_CH3DLY1 Bits------------------------------------- .EQU FDC2_CH3DLY1_DLY3_15, 31 .EQU FDC2_CH3DLY1_DLY3_14, 30 .EQU FDC2_CH3DLY1_DLY3_13, 29 .EQU FDC2_CH3DLY1_DLY3_12, 28 .EQU FDC2_CH3DLY1_DLY3_11, 27 .EQU FDC2_CH3DLY1_DLY3_10, 26 .EQU FDC2_CH3DLY1_DLY3_9, 25 .EQU FDC2_CH3DLY1_DLY3_8, 24 .EQU FDC2_CH3DLY1_DLY3_7, 23 .EQU FDC2_CH3DLY1_DLY3_6, 22 .EQU FDC2_CH3DLY1_DLY3_5, 21 .EQU FDC2_CH3DLY1_DLY3_4, 20 .EQU FDC2_CH3DLY1_DLY3_3, 19 .EQU FDC2_CH3DLY1_DLY3_2, 18 .EQU FDC2_CH3DLY1_DLY3_1, 17 .EQU FDC2_CH3DLY1_DLY3_0, 16 .EQU FDC2_CH3DLY1_DLY2_15, 15 .EQU FDC2_CH3DLY1_DLY2_14, 14 .EQU FDC2_CH3DLY1_DLY2_13, 13 .EQU FDC2_CH3DLY1_DLY2_12, 12 .EQU FDC2_CH3DLY1_DLY2_11, 11 .EQU FDC2_CH3DLY1_DLY2_10, 10 .EQU FDC2_CH3DLY1_DLY2_9, 9 .EQU FDC2_CH3DLY1_DLY2_8, 8 .EQU FDC2_CH3DLY1_DLY2_7, 7 .EQU FDC2_CH3DLY1_DLY2_6, 6 .EQU FDC2_CH3DLY1_DLY2_5, 5 .EQU FDC2_CH3DLY1_DLY2_4, 4 .EQU FDC2_CH3DLY1_DLY2_3, 3 .EQU FDC2_CH3DLY1_DLY2_2, 2 .EQU FDC2_CH3DLY1_DLY2_1, 1 .EQU FDC2_CH3DLY1_DLY2_0, 0 // register------------------------------------- .EQU FDC2_CH3DLY2, 0x40002CE8 // 0X4000 2CE8 FDC2_CH3DLY2 Bits------------------------------------- .EQU FDC2_CH3DLY2_DLY4_15, 15 .EQU FDC2_CH3DLY2_DLY4_14, 14 .EQU FDC2_CH3DLY2_DLY4_13, 13 .EQU FDC2_CH3DLY2_DLY4_12, 12 .EQU FDC2_CH3DLY2_DLY4_11, 11 .EQU FDC2_CH3DLY2_DLY4_10, 10 .EQU FDC2_CH3DLY2_DLY4_9, 9 .EQU FDC2_CH3DLY2_DLY4_8, 8 .EQU FDC2_CH3DLY2_DLY4_7, 7 .EQU FDC2_CH3DLY2_DLY4_6, 6 .EQU FDC2_CH3DLY2_DLY4_5, 5 .EQU FDC2_CH3DLY2_DLY4_4, 4 .EQU FDC2_CH3DLY2_DLY4_3, 3 .EQU FDC2_CH3DLY2_DLY4_2, 2 .EQU FDC2_CH3DLY2_DLY4_1, 1 .EQU FDC2_CH3DLY2_DLY4_0, 0 // register------------------------------------- .EQU FDC2_PO0DLY, 0x40002CF0 // 0X4000 2CF0 FDC2_PO0DLY Bits------------------------------------- .EQU FDC2_PO0DLY_DLYH15, 31 .EQU FDC2_PO0DLY_DLYH14, 30 .EQU FDC2_PO0DLY_DLYH13, 29 .EQU FDC2_PO0DLY_DLYH12, 28 .EQU FDC2_PO0DLY_DLYH11, 27 .EQU FDC2_PO0DLY_DLYH10, 26 .EQU FDC2_PO0DLY_DLYH9, 25 .EQU FDC2_PO0DLY_DLYH8, 24 .EQU FDC2_PO0DLY_DLYH7, 23 .EQU FDC2_PO0DLY_DLYH6, 22 .EQU FDC2_PO0DLY_DLYH5, 21 .EQU FDC2_PO0DLY_DLYH4, 20 .EQU FDC2_PO0DLY_DLYH3, 19 .EQU FDC2_PO0DLY_DLYH2, 18 .EQU FDC2_PO0DLY_DLYH1, 17 .EQU FDC2_PO0DLY_DLYH0, 16 .EQU FDC2_PO0DLY_DLYL15, 15 .EQU FDC2_PO0DLY_DLYL14, 14 .EQU FDC2_PO0DLY_DLYL13, 13 .EQU FDC2_PO0DLY_DLYL12, 12 .EQU FDC2_PO0DLY_DLYL11, 11 .EQU FDC2_PO0DLY_DLYL10, 10 .EQU FDC2_PO0DLY_DLYL9, 9 .EQU FDC2_PO0DLY_DLYL8, 8 .EQU FDC2_PO0DLY_DLYL7, 7 .EQU FDC2_PO0DLY_DLYL6, 6 .EQU FDC2_PO0DLY_DLYL5, 5 .EQU FDC2_PO0DLY_DLYL4, 4 .EQU FDC2_PO0DLY_DLYL3, 3 .EQU FDC2_PO0DLY_DLYL2, 2 .EQU FDC2_PO0DLY_DLYL1, 1 .EQU FDC2_PO0DLY_DLYL0, 0 // register------------------------------------- .EQU FDC2_PO1DLY, 0x40002CF4 // 0X4000 2CF4 FDC2_PO1DLY Bits------------------------------------- .EQU FDC2_PO1DLY_DLYH15, 31 .EQU FDC2_PO1DLY_DLYH14, 30 .EQU FDC2_PO1DLY_DLYH13, 29 .EQU FDC2_PO1DLY_DLYH12, 28 .EQU FDC2_PO1DLY_DLYH11, 27 .EQU FDC2_PO1DLY_DLYH10, 26 .EQU FDC2_PO1DLY_DLYH9, 25 .EQU FDC2_PO1DLY_DLYH8, 24 .EQU FDC2_PO1DLY_DLYH7, 23 .EQU FDC2_PO1DLY_DLYH6, 22 .EQU FDC2_PO1DLY_DLYH5, 21 .EQU FDC2_PO1DLY_DLYH4, 20 .EQU FDC2_PO1DLY_DLYH3, 19 .EQU FDC2_PO1DLY_DLYH2, 18 .EQU FDC2_PO1DLY_DLYH1, 17 .EQU FDC2_PO1DLY_DLYH0, 16 .EQU FDC2_PO1DLY_DLYL15, 15 .EQU FDC2_PO1DLY_DLYL14, 14 .EQU FDC2_PO1DLY_DLYL13, 13 .EQU FDC2_PO1DLY_DLYL12, 12 .EQU FDC2_PO1DLY_DLYL11, 11 .EQU FDC2_PO1DLY_DLYL10, 10 .EQU FDC2_PO1DLY_DLYL9, 9 .EQU FDC2_PO1DLY_DLYL8, 8 .EQU FDC2_PO1DLY_DLYL7, 7 .EQU FDC2_PO1DLY_DLYL6, 6 .EQU FDC2_PO1DLY_DLYL5, 5 .EQU FDC2_PO1DLY_DLYL4, 4 .EQU FDC2_PO1DLY_DLYL3, 3 .EQU FDC2_PO1DLY_DLYL2, 2 .EQU FDC2_PO1DLY_DLYL1, 1 .EQU FDC2_PO1DLY_DLYL0, 0 // register------------------------------------- .EQU FDC2_PO2DLY, 0x40002CF8 // 0X4000 2CF8 FDC2_PO2DLY Bits------------------------------------- .EQU FDC2_PO2DLY_DLYH15, 31 .EQU FDC2_PO2DLY_DLYH14, 30 .EQU FDC2_PO2DLY_DLYH13, 29 .EQU FDC2_PO2DLY_DLYH12, 28 .EQU FDC2_PO2DLY_DLYH11, 27 .EQU FDC2_PO2DLY_DLYH10, 26 .EQU FDC2_PO2DLY_DLYH9, 25 .EQU FDC2_PO2DLY_DLYH8, 24 .EQU FDC2_PO2DLY_DLYH7, 23 .EQU FDC2_PO2DLY_DLYH6, 22 .EQU FDC2_PO2DLY_DLYH5, 21 .EQU FDC2_PO2DLY_DLYH4, 20 .EQU FDC2_PO2DLY_DLYH3, 19 .EQU FDC2_PO2DLY_DLYH2, 18 .EQU FDC2_PO2DLY_DLYH1, 17 .EQU FDC2_PO2DLY_DLYH0, 16 .EQU FDC2_PO2DLY_DLYL15, 15 .EQU FDC2_PO2DLY_DLYL14, 14 .EQU FDC2_PO2DLY_DLYL13, 13 .EQU FDC2_PO2DLY_DLYL12, 12 .EQU FDC2_PO2DLY_DLYL11, 11 .EQU FDC2_PO2DLY_DLYL10, 10 .EQU FDC2_PO2DLY_DLYL9, 9 .EQU FDC2_PO2DLY_DLYL8, 8 .EQU FDC2_PO2DLY_DLYL7, 7 .EQU FDC2_PO2DLY_DLYL6, 6 .EQU FDC2_PO2DLY_DLYL5, 5 .EQU FDC2_PO2DLY_DLYL4, 4 .EQU FDC2_PO2DLY_DLYL3, 3 .EQU FDC2_PO2DLY_DLYL2, 2 .EQU FDC2_PO2DLY_DLYL1, 1 .EQU FDC2_PO2DLY_DLYL0, 0 // register------------------------------------- .EQU FDC2_PO3DLY, 0x40002CFC // 0X4000 2CFC FDC2_PO3DLY Bits------------------------------------- .EQU FDC2_PO3DLY_DLYH15, 31 .EQU FDC2_PO3DLY_DLYH14, 30 .EQU FDC2_PO3DLY_DLYH13, 29 .EQU FDC2_PO3DLY_DLYH12, 28 .EQU FDC2_PO3DLY_DLYH11, 27 .EQU FDC2_PO3DLY_DLYH10, 26 .EQU FDC2_PO3DLY_DLYH9, 25 .EQU FDC2_PO3DLY_DLYH8, 24 .EQU FDC2_PO3DLY_DLYH7, 23 .EQU FDC2_PO3DLY_DLYH6, 22 .EQU FDC2_PO3DLY_DLYH5, 21 .EQU FDC2_PO3DLY_DLYH4, 20 .EQU FDC2_PO3DLY_DLYH3, 19 .EQU FDC2_PO3DLY_DLYH2, 18 .EQU FDC2_PO3DLY_DLYH1, 17 .EQU FDC2_PO3DLY_DLYH0, 16 .EQU FDC2_PO3DLY_DLYL15, 15 .EQU FDC2_PO3DLY_DLYL14, 14 .EQU FDC2_PO3DLY_DLYL13, 13 .EQU FDC2_PO3DLY_DLYL12, 12 .EQU FDC2_PO3DLY_DLYL11, 11 .EQU FDC2_PO3DLY_DLYL10, 10 .EQU FDC2_PO3DLY_DLYL9, 9 .EQU FDC2_PO3DLY_DLYL8, 8 .EQU FDC2_PO3DLY_DLYL7, 7 .EQU FDC2_PO3DLY_DLYL6, 6 .EQU FDC2_PO3DLY_DLYL5, 5 .EQU FDC2_PO3DLY_DLYL4, 4 .EQU FDC2_PO3DLY_DLYL3, 3 .EQU FDC2_PO3DLY_DLYL2, 2 .EQU FDC2_PO3DLY_DLYL1, 1 .EQU FDC2_PO3DLY_DLYL0, 0 // register------------------------------------- .EQU TRG_SOU, 0x40002D00 // 0x4000 2D00 TRG_SOU Bits------------------------------------- .EQU TRG_SOU_CH4EN, 31 .EQU TRG_SOU_SEL4_6, 30 .EQU TRG_SOU_SEL4_5, 29 .EQU TRG_SOU_SEL4_4, 28 .EQU TRG_SOU_SEL4_3, 27 .EQU TRG_SOU_SEL4_2, 26 .EQU TRG_SOU_SEL4_1, 25 .EQU TRG_SOU_SEL4_0, 24 .EQU TRG_SOU_CH3EN, 23 .EQU TRG_SOU_SEL3_6, 22 .EQU TRG_SOU_SEL3_5, 21 .EQU TRG_SOU_SEL3_4, 20 .EQU TRG_SOU_SEL3_3, 19 .EQU TRG_SOU_SEL3_2, 18 .EQU TRG_SOU_SEL3_1, 17 .EQU TRG_SOU_SEL3_0, 16 .EQU TRG_SOU_CH2EN, 15 .EQU TRG_SOU_SEL2_6, 14 .EQU TRG_SOU_SEL2_5, 13 .EQU TRG_SOU_SEL2_4, 12 .EQU TRG_SOU_SEL2_3, 11 .EQU TRG_SOU_SEL2_2, 10 .EQU TRG_SOU_SEL2_1, 9 .EQU TRG_SOU_SEL2_0, 8 .EQU TRG_SOU_CH1EN, 7 .EQU TRG_SOU_SEL1_6, 6 .EQU TRG_SOU_SEL1_5, 5 .EQU TRG_SOU_SEL1_4, 4 .EQU TRG_SOU_SEL1_3, 3 .EQU TRG_SOU_SEL1_2, 2 .EQU TRG_SOU_SEL1_1, 1 .EQU TRG_SOU_SEL1_0, 0 // register------------------------------------- .EQU TRG_TAR, 0x40002D04 // 0x4000 2D04 TRG_TAR Bits------------------------------------- .EQU TRG_TAR_TCKS1, 22 .EQU TRG_TAR_TCKS0, 21 .EQU TRG_TAR_CH4SEL1, 20 .EQU TRG_TAR_CH4SEL0, 19 .EQU TRG_TAR_CH3SEL1, 18 .EQU TRG_TAR_CH3SEL0, 17 .EQU TRG_TAR_CH2SEL1, 16 .EQU TRG_TAR_CH2SEL0, 15 .EQU TRG_TAR_CH1SEL1, 14 .EQU TRG_TAR_CH1SEL0, 13 .EQU TRG_TAR_CH4DIV1, 12 .EQU TRG_TAR_CH4DIV0, 11 .EQU TRG_TAR_CH3DIV1, 10 .EQU TRG_TAR_CH3DIV0, 9 .EQU TRG_TAR_CH2DIV1, 8 .EQU TRG_TAR_CH2DIV0, 7 .EQU TRG_TAR_CH1DIV1, 6 .EQU TRG_TAR_CH1DIV0, 5 .EQU TRG_TAR_CH4DE, 4 .EQU TRG_TAR_CH3DE, 3 .EQU TRG_TAR_CH2DE, 2 .EQU TRG_TAR_CH1DE, 1 .EQU TRG_TAR_FMUXEN, 0 // register------------------------------------- .EQU CANFD6_CTLR0, 0x40002E00 // 0x4000 2E00 CANFD6_CTLR0 Bits------------------------------------- .EQU CANFD6_CTLR0_CANFDEN, 31 .EQU CANFD6_CTLR0_CANRMC6, 30 .EQU CANFD6_CTLR0_CANRMC5, 29 .EQU CANFD6_CTLR0_CANRMC4, 28 .EQU CANFD6_CTLR0_CANRMC3, 27 .EQU CANFD6_CTLR0_CANRMC2, 26 .EQU CANFD6_CTLR0_CANRMC1, 25 .EQU CANFD6_CTLR0_CANRMC0, 24 .EQU CANFD6_CTLR0_BOFF, 23 .EQU CANFD6_CTLR0_CERROR, 22 .EQU CANFD6_CTLR0_TXSTA, 21 .EQU CANFD6_CTLR0_RXSTA, 20 .EQU CANFD6_CTLR0_TCSTA, 19 .EQU CANFD6_CTLR0_DOSTA, 17 .EQU CANFD6_CTLR0_RXBSTA, 16 .EQU CANFD6_CTLR0_ANSWEREN, 15 .EQU CANFD6_CTLR0_FULLRXEN, 14 .EQU CANFD6_CTLR0_MBSIZE1, 13 .EQU CANFD6_CTLR0_MBSIZE0, 12 .EQU CANFD6_CTLR0_RELF, 11 .EQU CANFD6_CTLR0_RELRX, 10 .EQU CANFD6_CTLR0_ATX, 9 .EQU CANFD6_CTLR0_TXR, 8 .EQU CANFD6_CTLR0_CANEN, 7 .EQU CANFD6_CTLR0_CANCKS1, 6 .EQU CANFD6_CTLR0_CANCKS0, 5 .EQU CANFD6_CTLR0_ISOFDCANEN, 4 .EQU CANFD6_CTLR0_SLEEP, 3 .EQU CANFD6_CTLR0_LBACK, 2 .EQU CANFD6_CTLR0_SILENT, 1 .EQU CANFD6_CTLR0_RSMOD, 0 // register------------------------------------- .EQU CANFD6_BRGR, 0x40002E04 // 0x4000 2E04 CANFD6_BRGR Bits------------------------------------- .EQU CANFD6_BRGR_HTSEG2_2, 28 .EQU CANFD6_BRGR_HTSEG2_1, 27 .EQU CANFD6_BRGR_HTSEG2_0, 26 .EQU CANFD6_BRGR_HTSEG1_3, 25 .EQU CANFD6_BRGR_HTSEG1_2, 24 .EQU CANFD6_BRGR_HTSEG1_1, 23 .EQU CANFD6_BRGR_HTSEG1_0, 22 .EQU CANFD6_BRGR_BRSBRP5, 21 .EQU CANFD6_BRGR_BRSBRP4, 20 .EQU CANFD6_BRGR_BRSBRP3, 19 .EQU CANFD6_BRGR_BRSBRP2, 18 .EQU CANFD6_BRGR_BRSBRP1, 17 .EQU CANFD6_BRGR_BRSBRP0, 16 .EQU CANFD6_BRGR_SAM, 15 .EQU CANFD6_BRGR_TSEG2_2, 14 .EQU CANFD6_BRGR_TSEG2_1, 13 .EQU CANFD6_BRGR_TSEG2_0, 12 .EQU CANFD6_BRGR_TSEG1_3, 11 .EQU CANFD6_BRGR_TSEG1_2, 10 .EQU CANFD6_BRGR_TSEG1_1, 9 .EQU CANFD6_BRGR_TSEG1_0, 8 .EQU CANFD6_BRGR_SJW1, 7 .EQU CANFD6_BRGR_SJW0, 6 .EQU CANFD6_BRGR_CANBRP5, 5 .EQU CANFD6_BRGR_CANBRP4, 4 .EQU CANFD6_BRGR_CANBRP3, 3 .EQU CANFD6_BRGR_CANBRP2, 2 .EQU CANFD6_BRGR_CANBRP1, 1 .EQU CANFD6_BRGR_CANBRP0, 0 // register------------------------------------- .EQU CANFD6_RCR, 0x40002E08 // 0x4000 2E08 CANFD6_RCR Bits------------------------------------- .EQU CANFD6_RCR_DPRAMOF, 16 .EQU CANFD6_RCR_CANERRC1, 15 .EQU CANFD6_RCR_CANERRC0, 14 .EQU CANFD6_RCR_CANDIR, 13 .EQU CANFD6_RCR_CANSEG4, 12 .EQU CANFD6_RCR_CANSEG3, 11 .EQU CANFD6_RCR_CANSEG2, 10 .EQU CANFD6_RCR_CANSEG1, 9 .EQU CANFD6_RCR_CANSEG0, 8 .EQU CANFD6_RCR_CANALC4, 4 .EQU CANFD6_RCR_CANALC3, 3 .EQU CANFD6_RCR_CANALC2, 2 .EQU CANFD6_RCR_CANALC1, 1 .EQU CANFD6_RCR_CANALC0, 0 // register------------------------------------- .EQU CANFD6_EROR, 0x40002E0C // 0x4000 2E0C CANFD6_EROR Bits------------------------------------- .EQU CANFD6_EROR_DPRAMFEN, 31 .EQU CANFD6_EROR_SFDMOD, 30 .EQU CANFD6_EROR_SFDEN, 29 .EQU CANFD6_EROR_SOSFD4, 28 .EQU CANFD6_EROR_SOSFD3, 27 .EQU CANFD6_EROR_SOSFD2, 26 .EQU CANFD6_EROR_SOSFD1, 25 .EQU CANFD6_EROR_SOSFD0, 24 .EQU CANFD6_EROR_CANEWL7, 23 .EQU CANFD6_EROR_CANEWL6, 22 .EQU CANFD6_EROR_CANEWL5, 21 .EQU CANFD6_EROR_CANEWL4, 20 .EQU CANFD6_EROR_CANEWL3, 19 .EQU CANFD6_EROR_CANEWL2, 18 .EQU CANFD6_EROR_CANEWL1, 17 .EQU CANFD6_EROR_CANEWL0, 16 .EQU CANFD6_EROR_CANTXE7, 15 .EQU CANFD6_EROR_CANTXE6, 14 .EQU CANFD6_EROR_CANTXE5, 13 .EQU CANFD6_EROR_CANTXE4, 12 .EQU CANFD6_EROR_CANTXE3, 11 .EQU CANFD6_EROR_CANTXE2, 10 .EQU CANFD6_EROR_CANTXE1, 9 .EQU CANFD6_EROR_CANTXE0, 8 .EQU CANFD6_EROR_CANRXE7, 7 .EQU CANFD6_EROR_CANRXE6, 6 .EQU CANFD6_EROR_CANRXE5, 5 .EQU CANFD6_EROR_CANRXE4, 4 .EQU CANFD6_EROR_CANRXE3, 3 .EQU CANFD6_EROR_CANRXE2, 2 .EQU CANFD6_EROR_CANRXE1, 1 .EQU CANFD6_EROR_CANRXE0, 0 // register------------------------------------- .EQU CANFD6_CTLR2, 0x40002E10 // 0x4000 2E10 CANFD6_CTLR2 Bits------------------------------------- .EQU CANFD6_CTLR2_AMCKDIV1, 26 .EQU CANFD6_CTLR2_AMCKDIV0, 25 .EQU CANFD6_CTLR2_DESEL, 24 .EQU CANFD6_CTLR2_TDCVM6, 22 .EQU CANFD6_CTLR2_TDCVM5, 21 .EQU CANFD6_CTLR2_TDCVM4, 20 .EQU CANFD6_CTLR2_TDCVM3, 19 .EQU CANFD6_CTLR2_TDCVM2, 18 .EQU CANFD6_CTLR2_TDCVM1, 17 .EQU CANFD6_CTLR2_TDCVM0, 16 .EQU CANFD6_CTLR2_TDC0_1, 15 .EQU CANFD6_CTLR2_TDC0_0, 14 .EQU CANFD6_CTLR2_TDCSR1, 13 .EQU CANFD6_CTLR2_TDCSR0, 12 .EQU CANFD6_CTLR2_TDCS1, 11 .EQU CANFD6_CTLR2_TDCS0, 10 .EQU CANFD6_CTLR2_TDCAUT0, 9 .EQU CANFD6_CTLR2_TDCEN, 8 .EQU CANFD6_CTLR2_TDC0EN, 7 .EQU CANFD6_CTLR2_TDCV6, 6 .EQU CANFD6_CTLR2_TDCV5, 5 .EQU CANFD6_CTLR2_TDCV4, 4 .EQU CANFD6_CTLR2_TDCV3, 3 .EQU CANFD6_CTLR2_TDCV2, 2 .EQU CANFD6_CTLR2_TDCV1, 1 .EQU CANFD6_CTLR2_TDCV0, 0 // register------------------------------------- .EQU CANFD6_MSKR, 0x40002E14 // 0x4000 2E14 CANFD6_MSKR Bits------------------------------------- .EQU CANFD6_MSKR_MSK31, 31 .EQU CANFD6_MSKR_MSK30, 30 .EQU CANFD6_MSKR_MSK29, 29 .EQU CANFD6_MSKR_MSK28, 28 .EQU CANFD6_MSKR_MSK27, 27 .EQU CANFD6_MSKR_MSK26, 26 .EQU CANFD6_MSKR_MSK25, 25 .EQU CANFD6_MSKR_MSK24, 24 .EQU CANFD6_MSKR_MSK23, 23 .EQU CANFD6_MSKR_MSK22, 22 .EQU CANFD6_MSKR_MSK21, 21 .EQU CANFD6_MSKR_MSK20, 20 .EQU CANFD6_MSKR_MSK19, 19 .EQU CANFD6_MSKR_MSK18, 18 .EQU CANFD6_MSKR_MSK17, 17 .EQU CANFD6_MSKR_MSK16, 16 .EQU CANFD6_MSKR_MSK15, 15 .EQU CANFD6_MSKR_MSK14, 14 .EQU CANFD6_MSKR_MSK13, 13 .EQU CANFD6_MSKR_MSK12, 12 .EQU CANFD6_MSKR_MSK11, 11 .EQU CANFD6_MSKR_MSK10, 10 .EQU CANFD6_MSKR_MSK9, 9 .EQU CANFD6_MSKR_MSK8, 8 .EQU CANFD6_MSKR_MSK7, 7 .EQU CANFD6_MSKR_MSK6, 6 .EQU CANFD6_MSKR_MSK5, 5 .EQU CANFD6_MSKR_MSK4, 4 .EQU CANFD6_MSKR_MSK3, 3 .EQU CANFD6_MSKR_MSK2, 2 .EQU CANFD6_MSKR_MSK1, 1 .EQU CANFD6_MSKR_MSK0, 0 // register------------------------------------- .EQU CANFD6_IER, 0x40002E18 // 0x4000 2E18 CANFD6_IER Bits------------------------------------- .EQU CANFD6_IER_FAILCLR, 31 .EQU CANFD6_IER_LPCANGPIOSEL0, 30 .EQU CANFD6_IER_BOFFIC, 28 .EQU CANFD6_IER_TRGMBIC, 27 .EQU CANFD6_IER_MOENDIC, 26 .EQU CANFD6_IER_BEIC, 23 .EQU CANFD6_IER_ALIC, 22 .EQU CANFD6_IER_ENIC, 21 .EQU CANFD6_IER_WUIC, 20 .EQU CANFD6_IER_DOVFIC, 19 .EQU CANFD6_IER_EAIC, 18 .EQU CANFD6_IER_CANTXIC, 17 .EQU CANFD6_IER_CANRXIC, 16 .EQU CANFD6_IER_MOENDIE, 15 .EQU CANFD6_IER_ARBFAILIE, 14 .EQU CANFD6_IER_BOFFIE, 12 .EQU CANFD6_IER_TRGMBIE, 11 .EQU CANFD6_IER_RXBSTAIE, 10 .EQU CANFD6_IER_CRXDE, 9 .EQU CANFD6_IER_CTXDE, 8 .EQU CANFD6_IER_BEIE, 7 .EQU CANFD6_IER_ALIE, 6 .EQU CANFD6_IER_ENIE, 5 .EQU CANFD6_IER_WUIE, 4 .EQU CANFD6_IER_DOVFIE, 3 .EQU CANFD6_IER_EAIE, 2 .EQU CANFD6_IER_CANTXIE, 1 .EQU CANFD6_IER_CANRXIE, 0 // register------------------------------------- .EQU CANFD6_IFR, 0x40002E1C // 0x4000 2E1C CANFD6_IFR Bits------------------------------------- .EQU CANFD6_IFR_MOENDIF, 14 .EQU CANFD6_IFR_BOFFIF, 12 .EQU CANFD6_IFR_TRGMBIF, 11 .EQU CANFD6_IFR_RXBSTAIF, 10 .EQU CANFD6_IFR_CRXDF, 9 .EQU CANFD6_IFR_CTXDF, 8 .EQU CANFD6_IFR_BEIF, 7 .EQU CANFD6_IFR_ALIF, 6 .EQU CANFD6_IFR_ENIF, 5 .EQU CANFD6_IFR_WUIF, 4 .EQU CANFD6_IFR_DOVFIF, 3 .EQU CANFD6_IFR_EAIF, 2 .EQU CANFD6_IFR_CANTXIF, 1 .EQU CANFD6_IFR_CANRXIF, 0 // register------------------------------------- .EQU CANFD6_RXDATA0, 0x40002E20 // 0x4000 2E20 CANFD6_RXDATA0 Bits------------------------------------- .EQU CANFD6_RXDATA0_RXDATA0_31, 31 .EQU CANFD6_RXDATA0_RXDATA0_30, 30 .EQU CANFD6_RXDATA0_RXDATA0_29, 29 .EQU CANFD6_RXDATA0_RXDATA0_28, 28 .EQU CANFD6_RXDATA0_RXDATA0_27, 27 .EQU CANFD6_RXDATA0_RXDATA0_26, 26 .EQU CANFD6_RXDATA0_RXDATA0_25, 25 .EQU CANFD6_RXDATA0_RXDATA0_24, 24 .EQU CANFD6_RXDATA0_RXDATA0_23, 23 .EQU CANFD6_RXDATA0_RXDATA0_22, 22 .EQU CANFD6_RXDATA0_RXDATA0_21, 21 .EQU CANFD6_RXDATA0_RXDATA0_20, 20 .EQU CANFD6_RXDATA0_RXDATA0_19, 19 .EQU CANFD6_RXDATA0_RXDATA0_18, 18 .EQU CANFD6_RXDATA0_RXDATA0_17, 17 .EQU CANFD6_RXDATA0_RXDATA0_16, 16 .EQU CANFD6_RXDATA0_RXDATA0_15, 15 .EQU CANFD6_RXDATA0_RXDATA0_14, 14 .EQU CANFD6_RXDATA0_RXDATA0_13, 13 .EQU CANFD6_RXDATA0_RXDATA0_12, 12 .EQU CANFD6_RXDATA0_RXDATA0_11, 11 .EQU CANFD6_RXDATA0_RXDATA0_10, 10 .EQU CANFD6_RXDATA0_RXDATA0_9, 9 .EQU CANFD6_RXDATA0_RXDATA0_8, 8 .EQU CANFD6_RXDATA0_RXDATA0_7, 7 .EQU CANFD6_RXDATA0_RXDATA0_6, 6 .EQU CANFD6_RXDATA0_RXDATA0_5, 5 .EQU CANFD6_RXDATA0_RXDATA0_4, 4 .EQU CANFD6_RXDATA0_RXDATA0_3, 3 .EQU CANFD6_RXDATA0_RXDATA0_2, 2 .EQU CANFD6_RXDATA0_RXDATA0_1, 1 .EQU CANFD6_RXDATA0_RXDATA0_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA1, 0x40002E24 // 0x4000 2E24 CANFD6_RXDATA1 Bits------------------------------------- .EQU CANFD6_RXDATA1_RXDATA1_31, 31 .EQU CANFD6_RXDATA1_RXDATA1_30, 30 .EQU CANFD6_RXDATA1_RXDATA1_29, 29 .EQU CANFD6_RXDATA1_RXDATA1_28, 28 .EQU CANFD6_RXDATA1_RXDATA1_27, 27 .EQU CANFD6_RXDATA1_RXDATA1_26, 26 .EQU CANFD6_RXDATA1_RXDATA1_25, 25 .EQU CANFD6_RXDATA1_RXDATA1_24, 24 .EQU CANFD6_RXDATA1_RXDATA1_23, 23 .EQU CANFD6_RXDATA1_RXDATA1_22, 22 .EQU CANFD6_RXDATA1_RXDATA1_21, 21 .EQU CANFD6_RXDATA1_RXDATA1_20, 20 .EQU CANFD6_RXDATA1_RXDATA1_19, 19 .EQU CANFD6_RXDATA1_RXDATA1_18, 18 .EQU CANFD6_RXDATA1_RXDATA1_17, 17 .EQU CANFD6_RXDATA1_RXDATA1_16, 16 .EQU CANFD6_RXDATA1_RXDATA1_15, 15 .EQU CANFD6_RXDATA1_RXDATA1_14, 14 .EQU CANFD6_RXDATA1_RXDATA1_13, 13 .EQU CANFD6_RXDATA1_RXDATA1_12, 12 .EQU CANFD6_RXDATA1_RXDATA1_11, 11 .EQU CANFD6_RXDATA1_RXDATA1_10, 10 .EQU CANFD6_RXDATA1_RXDATA1_9, 9 .EQU CANFD6_RXDATA1_RXDATA1_8, 8 .EQU CANFD6_RXDATA1_RXDATA1_7, 7 .EQU CANFD6_RXDATA1_RXDATA1_6, 6 .EQU CANFD6_RXDATA1_RXDATA1_5, 5 .EQU CANFD6_RXDATA1_RXDATA1_4, 4 .EQU CANFD6_RXDATA1_RXDATA1_3, 3 .EQU CANFD6_RXDATA1_RXDATA1_2, 2 .EQU CANFD6_RXDATA1_RXDATA1_1, 1 .EQU CANFD6_RXDATA1_RXDATA1_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA2, 0x40002E28 // 0x4000 2E28 CANFD6_RXDATA2 Bits------------------------------------- .EQU CANFD6_RXDATA2_RXDATA2_31, 31 .EQU CANFD6_RXDATA2_RXDATA2_30, 30 .EQU CANFD6_RXDATA2_RXDATA2_29, 29 .EQU CANFD6_RXDATA2_RXDATA2_28, 28 .EQU CANFD6_RXDATA2_RXDATA2_27, 27 .EQU CANFD6_RXDATA2_RXDATA2_26, 26 .EQU CANFD6_RXDATA2_RXDATA2_25, 25 .EQU CANFD6_RXDATA2_RXDATA2_24, 24 .EQU CANFD6_RXDATA2_RXDATA2_23, 23 .EQU CANFD6_RXDATA2_RXDATA2_22, 22 .EQU CANFD6_RXDATA2_RXDATA2_21, 21 .EQU CANFD6_RXDATA2_RXDATA2_20, 20 .EQU CANFD6_RXDATA2_RXDATA2_19, 19 .EQU CANFD6_RXDATA2_RXDATA2_18, 18 .EQU CANFD6_RXDATA2_RXDATA2_17, 17 .EQU CANFD6_RXDATA2_RXDATA2_16, 16 .EQU CANFD6_RXDATA2_RXDATA2_15, 15 .EQU CANFD6_RXDATA2_RXDATA2_14, 14 .EQU CANFD6_RXDATA2_RXDATA2_13, 13 .EQU CANFD6_RXDATA2_RXDATA2_12, 12 .EQU CANFD6_RXDATA2_RXDATA2_11, 11 .EQU CANFD6_RXDATA2_RXDATA2_10, 10 .EQU CANFD6_RXDATA2_RXDATA2_9, 9 .EQU CANFD6_RXDATA2_RXDATA2_8, 8 .EQU CANFD6_RXDATA2_RXDATA2_7, 7 .EQU CANFD6_RXDATA2_RXDATA2_6, 6 .EQU CANFD6_RXDATA2_RXDATA2_5, 5 .EQU CANFD6_RXDATA2_RXDATA2_4, 4 .EQU CANFD6_RXDATA2_RXDATA2_3, 3 .EQU CANFD6_RXDATA2_RXDATA2_2, 2 .EQU CANFD6_RXDATA2_RXDATA2_1, 1 .EQU CANFD6_RXDATA2_RXDATA2_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA3, 0x40002E2C // 0x4000 2E2C CANFD6_RXDATA3 Bits------------------------------------- .EQU CANFD6_RXDATA3_RXDATA3_31, 31 .EQU CANFD6_RXDATA3_RXDATA3_30, 30 .EQU CANFD6_RXDATA3_RXDATA3_29, 29 .EQU CANFD6_RXDATA3_RXDATA3_28, 28 .EQU CANFD6_RXDATA3_RXDATA3_27, 27 .EQU CANFD6_RXDATA3_RXDATA3_26, 26 .EQU CANFD6_RXDATA3_RXDATA3_25, 25 .EQU CANFD6_RXDATA3_RXDATA3_24, 24 .EQU CANFD6_RXDATA3_RXDATA3_23, 23 .EQU CANFD6_RXDATA3_RXDATA3_22, 22 .EQU CANFD6_RXDATA3_RXDATA3_21, 21 .EQU CANFD6_RXDATA3_RXDATA3_20, 20 .EQU CANFD6_RXDATA3_RXDATA3_19, 19 .EQU CANFD6_RXDATA3_RXDATA3_18, 18 .EQU CANFD6_RXDATA3_RXDATA3_17, 17 .EQU CANFD6_RXDATA3_RXDATA3_16, 16 .EQU CANFD6_RXDATA3_RXDATA3_15, 15 .EQU CANFD6_RXDATA3_RXDATA3_14, 14 .EQU CANFD6_RXDATA3_RXDATA3_13, 13 .EQU CANFD6_RXDATA3_RXDATA3_12, 12 .EQU CANFD6_RXDATA3_RXDATA3_11, 11 .EQU CANFD6_RXDATA3_RXDATA3_10, 10 .EQU CANFD6_RXDATA3_RXDATA3_9, 9 .EQU CANFD6_RXDATA3_RXDATA3_8, 8 .EQU CANFD6_RXDATA3_RXDATA3_7, 7 .EQU CANFD6_RXDATA3_RXDATA3_6, 6 .EQU CANFD6_RXDATA3_RXDATA3_5, 5 .EQU CANFD6_RXDATA3_RXDATA3_4, 4 .EQU CANFD6_RXDATA3_RXDATA3_3, 3 .EQU CANFD6_RXDATA3_RXDATA3_2, 2 .EQU CANFD6_RXDATA3_RXDATA3_1, 1 .EQU CANFD6_RXDATA3_RXDATA3_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA4, 0x40002E30 // 0x4000 2E30 CANFD6_RXDATA4 Bits------------------------------------- .EQU CANFD6_RXDATA4_RXDATA4_31, 31 .EQU CANFD6_RXDATA4_RXDATA4_30, 30 .EQU CANFD6_RXDATA4_RXDATA4_29, 29 .EQU CANFD6_RXDATA4_RXDATA4_28, 28 .EQU CANFD6_RXDATA4_RXDATA4_27, 27 .EQU CANFD6_RXDATA4_RXDATA4_26, 26 .EQU CANFD6_RXDATA4_RXDATA4_25, 25 .EQU CANFD6_RXDATA4_RXDATA4_24, 24 .EQU CANFD6_RXDATA4_RXDATA4_23, 23 .EQU CANFD6_RXDATA4_RXDATA4_22, 22 .EQU CANFD6_RXDATA4_RXDATA4_21, 21 .EQU CANFD6_RXDATA4_RXDATA4_20, 20 .EQU CANFD6_RXDATA4_RXDATA4_19, 19 .EQU CANFD6_RXDATA4_RXDATA4_18, 18 .EQU CANFD6_RXDATA4_RXDATA4_17, 17 .EQU CANFD6_RXDATA4_RXDATA4_16, 16 .EQU CANFD6_RXDATA4_RXDATA4_15, 15 .EQU CANFD6_RXDATA4_RXDATA4_14, 14 .EQU CANFD6_RXDATA4_RXDATA4_13, 13 .EQU CANFD6_RXDATA4_RXDATA4_12, 12 .EQU CANFD6_RXDATA4_RXDATA4_11, 11 .EQU CANFD6_RXDATA4_RXDATA4_10, 10 .EQU CANFD6_RXDATA4_RXDATA4_9, 9 .EQU CANFD6_RXDATA4_RXDATA4_8, 8 .EQU CANFD6_RXDATA4_RXDATA4_7, 7 .EQU CANFD6_RXDATA4_RXDATA4_6, 6 .EQU CANFD6_RXDATA4_RXDATA4_5, 5 .EQU CANFD6_RXDATA4_RXDATA4_4, 4 .EQU CANFD6_RXDATA4_RXDATA4_3, 3 .EQU CANFD6_RXDATA4_RXDATA4_2, 2 .EQU CANFD6_RXDATA4_RXDATA4_1, 1 .EQU CANFD6_RXDATA4_RXDATA4_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA5, 0x40002E34 // 0x4000 2E34 CANFD6_RXDATA5 Bits------------------------------------- .EQU CANFD6_RXDATA5_RXDATA5_31, 31 .EQU CANFD6_RXDATA5_RXDATA5_30, 30 .EQU CANFD6_RXDATA5_RXDATA5_29, 29 .EQU CANFD6_RXDATA5_RXDATA5_28, 28 .EQU CANFD6_RXDATA5_RXDATA5_27, 27 .EQU CANFD6_RXDATA5_RXDATA5_26, 26 .EQU CANFD6_RXDATA5_RXDATA5_25, 25 .EQU CANFD6_RXDATA5_RXDATA5_24, 24 .EQU CANFD6_RXDATA5_RXDATA5_23, 23 .EQU CANFD6_RXDATA5_RXDATA5_22, 22 .EQU CANFD6_RXDATA5_RXDATA5_21, 21 .EQU CANFD6_RXDATA5_RXDATA5_20, 20 .EQU CANFD6_RXDATA5_RXDATA5_19, 19 .EQU CANFD6_RXDATA5_RXDATA5_18, 18 .EQU CANFD6_RXDATA5_RXDATA5_17, 17 .EQU CANFD6_RXDATA5_RXDATA5_16, 16 .EQU CANFD6_RXDATA5_RXDATA5_15, 15 .EQU CANFD6_RXDATA5_RXDATA5_14, 14 .EQU CANFD6_RXDATA5_RXDATA5_13, 13 .EQU CANFD6_RXDATA5_RXDATA5_12, 12 .EQU CANFD6_RXDATA5_RXDATA5_11, 11 .EQU CANFD6_RXDATA5_RXDATA5_10, 10 .EQU CANFD6_RXDATA5_RXDATA5_9, 9 .EQU CANFD6_RXDATA5_RXDATA5_8, 8 .EQU CANFD6_RXDATA5_RXDATA5_7, 7 .EQU CANFD6_RXDATA5_RXDATA5_6, 6 .EQU CANFD6_RXDATA5_RXDATA5_5, 5 .EQU CANFD6_RXDATA5_RXDATA5_4, 4 .EQU CANFD6_RXDATA5_RXDATA5_3, 3 .EQU CANFD6_RXDATA5_RXDATA5_2, 2 .EQU CANFD6_RXDATA5_RXDATA5_1, 1 .EQU CANFD6_RXDATA5_RXDATA5_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA6, 0x40002E38 // 0x4000 2E38 CANFD6_RXDATA6 Bits------------------------------------- .EQU CANFD6_RXDATA6_RXDATA6_31, 31 .EQU CANFD6_RXDATA6_RXDATA6_30, 30 .EQU CANFD6_RXDATA6_RXDATA6_29, 29 .EQU CANFD6_RXDATA6_RXDATA6_28, 28 .EQU CANFD6_RXDATA6_RXDATA6_27, 27 .EQU CANFD6_RXDATA6_RXDATA6_26, 26 .EQU CANFD6_RXDATA6_RXDATA6_25, 25 .EQU CANFD6_RXDATA6_RXDATA6_24, 24 .EQU CANFD6_RXDATA6_RXDATA6_23, 23 .EQU CANFD6_RXDATA6_RXDATA6_22, 22 .EQU CANFD6_RXDATA6_RXDATA6_21, 21 .EQU CANFD6_RXDATA6_RXDATA6_20, 20 .EQU CANFD6_RXDATA6_RXDATA6_19, 19 .EQU CANFD6_RXDATA6_RXDATA6_18, 18 .EQU CANFD6_RXDATA6_RXDATA6_17, 17 .EQU CANFD6_RXDATA6_RXDATA6_16, 16 .EQU CANFD6_RXDATA6_RXDATA6_15, 15 .EQU CANFD6_RXDATA6_RXDATA6_14, 14 .EQU CANFD6_RXDATA6_RXDATA6_13, 13 .EQU CANFD6_RXDATA6_RXDATA6_12, 12 .EQU CANFD6_RXDATA6_RXDATA6_11, 11 .EQU CANFD6_RXDATA6_RXDATA6_10, 10 .EQU CANFD6_RXDATA6_RXDATA6_9, 9 .EQU CANFD6_RXDATA6_RXDATA6_8, 8 .EQU CANFD6_RXDATA6_RXDATA6_7, 7 .EQU CANFD6_RXDATA6_RXDATA6_6, 6 .EQU CANFD6_RXDATA6_RXDATA6_5, 5 .EQU CANFD6_RXDATA6_RXDATA6_4, 4 .EQU CANFD6_RXDATA6_RXDATA6_3, 3 .EQU CANFD6_RXDATA6_RXDATA6_2, 2 .EQU CANFD6_RXDATA6_RXDATA6_1, 1 .EQU CANFD6_RXDATA6_RXDATA6_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA7, 0x40002E3C // 0x4000 2E3C CANFD6_RXDATA7 Bits------------------------------------- .EQU CANFD6_RXDATA7_RXDATA7_31, 31 .EQU CANFD6_RXDATA7_RXDATA7_30, 30 .EQU CANFD6_RXDATA7_RXDATA7_29, 29 .EQU CANFD6_RXDATA7_RXDATA7_28, 28 .EQU CANFD6_RXDATA7_RXDATA7_27, 27 .EQU CANFD6_RXDATA7_RXDATA7_26, 26 .EQU CANFD6_RXDATA7_RXDATA7_25, 25 .EQU CANFD6_RXDATA7_RXDATA7_24, 24 .EQU CANFD6_RXDATA7_RXDATA7_23, 23 .EQU CANFD6_RXDATA7_RXDATA7_22, 22 .EQU CANFD6_RXDATA7_RXDATA7_21, 21 .EQU CANFD6_RXDATA7_RXDATA7_20, 20 .EQU CANFD6_RXDATA7_RXDATA7_19, 19 .EQU CANFD6_RXDATA7_RXDATA7_18, 18 .EQU CANFD6_RXDATA7_RXDATA7_17, 17 .EQU CANFD6_RXDATA7_RXDATA7_16, 16 .EQU CANFD6_RXDATA7_RXDATA7_15, 15 .EQU CANFD6_RXDATA7_RXDATA7_14, 14 .EQU CANFD6_RXDATA7_RXDATA7_13, 13 .EQU CANFD6_RXDATA7_RXDATA7_12, 12 .EQU CANFD6_RXDATA7_RXDATA7_11, 11 .EQU CANFD6_RXDATA7_RXDATA7_10, 10 .EQU CANFD6_RXDATA7_RXDATA7_9, 9 .EQU CANFD6_RXDATA7_RXDATA7_8, 8 .EQU CANFD6_RXDATA7_RXDATA7_7, 7 .EQU CANFD6_RXDATA7_RXDATA7_6, 6 .EQU CANFD6_RXDATA7_RXDATA7_5, 5 .EQU CANFD6_RXDATA7_RXDATA7_4, 4 .EQU CANFD6_RXDATA7_RXDATA7_3, 3 .EQU CANFD6_RXDATA7_RXDATA7_2, 2 .EQU CANFD6_RXDATA7_RXDATA7_1, 1 .EQU CANFD6_RXDATA7_RXDATA7_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA8, 0x40002E40 // 0x4000 2E40 CANFD6_RXDATA8 Bits------------------------------------- .EQU CANFD6_RXDATA8_RXDATA8_31, 31 .EQU CANFD6_RXDATA8_RXDATA8_30, 30 .EQU CANFD6_RXDATA8_RXDATA8_29, 29 .EQU CANFD6_RXDATA8_RXDATA8_28, 28 .EQU CANFD6_RXDATA8_RXDATA8_27, 27 .EQU CANFD6_RXDATA8_RXDATA8_26, 26 .EQU CANFD6_RXDATA8_RXDATA8_25, 25 .EQU CANFD6_RXDATA8_RXDATA8_24, 24 .EQU CANFD6_RXDATA8_RXDATA8_23, 23 .EQU CANFD6_RXDATA8_RXDATA8_22, 22 .EQU CANFD6_RXDATA8_RXDATA8_21, 21 .EQU CANFD6_RXDATA8_RXDATA8_20, 20 .EQU CANFD6_RXDATA8_RXDATA8_19, 19 .EQU CANFD6_RXDATA8_RXDATA8_18, 18 .EQU CANFD6_RXDATA8_RXDATA8_17, 17 .EQU CANFD6_RXDATA8_RXDATA8_16, 16 .EQU CANFD6_RXDATA8_RXDATA8_15, 15 .EQU CANFD6_RXDATA8_RXDATA8_14, 14 .EQU CANFD6_RXDATA8_RXDATA8_13, 13 .EQU CANFD6_RXDATA8_RXDATA8_12, 12 .EQU CANFD6_RXDATA8_RXDATA8_11, 11 .EQU CANFD6_RXDATA8_RXDATA8_10, 10 .EQU CANFD6_RXDATA8_RXDATA8_9, 9 .EQU CANFD6_RXDATA8_RXDATA8_8, 8 .EQU CANFD6_RXDATA8_RXDATA8_7, 7 .EQU CANFD6_RXDATA8_RXDATA8_6, 6 .EQU CANFD6_RXDATA8_RXDATA8_5, 5 .EQU CANFD6_RXDATA8_RXDATA8_4, 4 .EQU CANFD6_RXDATA8_RXDATA8_3, 3 .EQU CANFD6_RXDATA8_RXDATA8_2, 2 .EQU CANFD6_RXDATA8_RXDATA8_1, 1 .EQU CANFD6_RXDATA8_RXDATA8_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA9, 0x40002E44 // 0x4000 2E44 CANFD6_RXDATA9 Bits------------------------------------- .EQU CANFD6_RXDATA9_RXDATA9_31, 31 .EQU CANFD6_RXDATA9_RXDATA9_30, 30 .EQU CANFD6_RXDATA9_RXDATA9_29, 29 .EQU CANFD6_RXDATA9_RXDATA9_28, 28 .EQU CANFD6_RXDATA9_RXDATA9_27, 27 .EQU CANFD6_RXDATA9_RXDATA9_26, 26 .EQU CANFD6_RXDATA9_RXDATA9_25, 25 .EQU CANFD6_RXDATA9_RXDATA9_24, 24 .EQU CANFD6_RXDATA9_RXDATA9_23, 23 .EQU CANFD6_RXDATA9_RXDATA9_22, 22 .EQU CANFD6_RXDATA9_RXDATA9_21, 21 .EQU CANFD6_RXDATA9_RXDATA9_20, 20 .EQU CANFD6_RXDATA9_RXDATA9_19, 19 .EQU CANFD6_RXDATA9_RXDATA9_18, 18 .EQU CANFD6_RXDATA9_RXDATA9_17, 17 .EQU CANFD6_RXDATA9_RXDATA9_16, 16 .EQU CANFD6_RXDATA9_RXDATA9_15, 15 .EQU CANFD6_RXDATA9_RXDATA9_14, 14 .EQU CANFD6_RXDATA9_RXDATA9_13, 13 .EQU CANFD6_RXDATA9_RXDATA9_12, 12 .EQU CANFD6_RXDATA9_RXDATA9_11, 11 .EQU CANFD6_RXDATA9_RXDATA9_10, 10 .EQU CANFD6_RXDATA9_RXDATA9_9, 9 .EQU CANFD6_RXDATA9_RXDATA9_8, 8 .EQU CANFD6_RXDATA9_RXDATA9_7, 7 .EQU CANFD6_RXDATA9_RXDATA9_6, 6 .EQU CANFD6_RXDATA9_RXDATA9_5, 5 .EQU CANFD6_RXDATA9_RXDATA9_4, 4 .EQU CANFD6_RXDATA9_RXDATA9_3, 3 .EQU CANFD6_RXDATA9_RXDATA9_2, 2 .EQU CANFD6_RXDATA9_RXDATA9_1, 1 .EQU CANFD6_RXDATA9_RXDATA9_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA10, 0x40002E48 // 0x4000 2E48 CANFD6_RXDATA10 Bits------------------------------------- .EQU CANFD6_RXDATA10_RXDATA10_31, 31 .EQU CANFD6_RXDATA10_RXDATA10_30, 30 .EQU CANFD6_RXDATA10_RXDATA10_29, 29 .EQU CANFD6_RXDATA10_RXDATA10_28, 28 .EQU CANFD6_RXDATA10_RXDATA10_27, 27 .EQU CANFD6_RXDATA10_RXDATA10_26, 26 .EQU CANFD6_RXDATA10_RXDATA10_25, 25 .EQU CANFD6_RXDATA10_RXDATA10_24, 24 .EQU CANFD6_RXDATA10_RXDATA10_23, 23 .EQU CANFD6_RXDATA10_RXDATA10_22, 22 .EQU CANFD6_RXDATA10_RXDATA10_21, 21 .EQU CANFD6_RXDATA10_RXDATA10_20, 20 .EQU CANFD6_RXDATA10_RXDATA10_19, 19 .EQU CANFD6_RXDATA10_RXDATA10_18, 18 .EQU CANFD6_RXDATA10_RXDATA10_17, 17 .EQU CANFD6_RXDATA10_RXDATA10_16, 16 .EQU CANFD6_RXDATA10_RXDATA10_15, 15 .EQU CANFD6_RXDATA10_RXDATA10_14, 14 .EQU CANFD6_RXDATA10_RXDATA10_13, 13 .EQU CANFD6_RXDATA10_RXDATA10_12, 12 .EQU CANFD6_RXDATA10_RXDATA10_11, 11 .EQU CANFD6_RXDATA10_RXDATA10_10, 10 .EQU CANFD6_RXDATA10_RXDATA10_9, 9 .EQU CANFD6_RXDATA10_RXDATA10_8, 8 .EQU CANFD6_RXDATA10_RXDATA10_7, 7 .EQU CANFD6_RXDATA10_RXDATA10_6, 6 .EQU CANFD6_RXDATA10_RXDATA10_5, 5 .EQU CANFD6_RXDATA10_RXDATA10_4, 4 .EQU CANFD6_RXDATA10_RXDATA10_3, 3 .EQU CANFD6_RXDATA10_RXDATA10_2, 2 .EQU CANFD6_RXDATA10_RXDATA10_1, 1 .EQU CANFD6_RXDATA10_RXDATA10_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA11, 0x40002E4C // 0x4000 2E4C CANFD6_RXDATA11 Bits------------------------------------- .EQU CANFD6_RXDATA11_RXDATA11_31, 31 .EQU CANFD6_RXDATA11_RXDATA11_30, 30 .EQU CANFD6_RXDATA11_RXDATA11_29, 29 .EQU CANFD6_RXDATA11_RXDATA11_28, 28 .EQU CANFD6_RXDATA11_RXDATA11_27, 27 .EQU CANFD6_RXDATA11_RXDATA11_26, 26 .EQU CANFD6_RXDATA11_RXDATA11_25, 25 .EQU CANFD6_RXDATA11_RXDATA11_24, 24 .EQU CANFD6_RXDATA11_RXDATA11_23, 23 .EQU CANFD6_RXDATA11_RXDATA11_22, 22 .EQU CANFD6_RXDATA11_RXDATA11_21, 21 .EQU CANFD6_RXDATA11_RXDATA11_20, 20 .EQU CANFD6_RXDATA11_RXDATA11_19, 19 .EQU CANFD6_RXDATA11_RXDATA11_18, 18 .EQU CANFD6_RXDATA11_RXDATA11_17, 17 .EQU CANFD6_RXDATA11_RXDATA11_16, 16 .EQU CANFD6_RXDATA11_RXDATA11_15, 15 .EQU CANFD6_RXDATA11_RXDATA11_14, 14 .EQU CANFD6_RXDATA11_RXDATA11_13, 13 .EQU CANFD6_RXDATA11_RXDATA11_12, 12 .EQU CANFD6_RXDATA11_RXDATA11_11, 11 .EQU CANFD6_RXDATA11_RXDATA11_10, 10 .EQU CANFD6_RXDATA11_RXDATA11_9, 9 .EQU CANFD6_RXDATA11_RXDATA11_8, 8 .EQU CANFD6_RXDATA11_RXDATA11_7, 7 .EQU CANFD6_RXDATA11_RXDATA11_6, 6 .EQU CANFD6_RXDATA11_RXDATA11_5, 5 .EQU CANFD6_RXDATA11_RXDATA11_4, 4 .EQU CANFD6_RXDATA11_RXDATA11_3, 3 .EQU CANFD6_RXDATA11_RXDATA11_2, 2 .EQU CANFD6_RXDATA11_RXDATA11_1, 1 .EQU CANFD6_RXDATA11_RXDATA11_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA12, 0x40002E50 // 0x4000 2E50 CANFD6_RXDATA12 Bits------------------------------------- .EQU CANFD6_RXDATA12_RXDATA12_31, 31 .EQU CANFD6_RXDATA12_RXDATA12_30, 30 .EQU CANFD6_RXDATA12_RXDATA12_29, 29 .EQU CANFD6_RXDATA12_RXDATA12_28, 28 .EQU CANFD6_RXDATA12_RXDATA12_27, 27 .EQU CANFD6_RXDATA12_RXDATA12_26, 26 .EQU CANFD6_RXDATA12_RXDATA12_25, 25 .EQU CANFD6_RXDATA12_RXDATA12_24, 24 .EQU CANFD6_RXDATA12_RXDATA12_23, 23 .EQU CANFD6_RXDATA12_RXDATA12_22, 22 .EQU CANFD6_RXDATA12_RXDATA12_21, 21 .EQU CANFD6_RXDATA12_RXDATA12_20, 20 .EQU CANFD6_RXDATA12_RXDATA12_19, 19 .EQU CANFD6_RXDATA12_RXDATA12_18, 18 .EQU CANFD6_RXDATA12_RXDATA12_17, 17 .EQU CANFD6_RXDATA12_RXDATA12_16, 16 .EQU CANFD6_RXDATA12_RXDATA12_15, 15 .EQU CANFD6_RXDATA12_RXDATA12_14, 14 .EQU CANFD6_RXDATA12_RXDATA12_13, 13 .EQU CANFD6_RXDATA12_RXDATA12_12, 12 .EQU CANFD6_RXDATA12_RXDATA12_11, 11 .EQU CANFD6_RXDATA12_RXDATA12_10, 10 .EQU CANFD6_RXDATA12_RXDATA12_9, 9 .EQU CANFD6_RXDATA12_RXDATA12_8, 8 .EQU CANFD6_RXDATA12_RXDATA12_7, 7 .EQU CANFD6_RXDATA12_RXDATA12_6, 6 .EQU CANFD6_RXDATA12_RXDATA12_5, 5 .EQU CANFD6_RXDATA12_RXDATA12_4, 4 .EQU CANFD6_RXDATA12_RXDATA12_3, 3 .EQU CANFD6_RXDATA12_RXDATA12_2, 2 .EQU CANFD6_RXDATA12_RXDATA12_1, 1 .EQU CANFD6_RXDATA12_RXDATA12_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA13, 0x40002E54 // 0x4000 2E54 CANFD6_RXDATA13 Bits------------------------------------- .EQU CANFD6_RXDATA13_RXDATA13_31, 31 .EQU CANFD6_RXDATA13_RXDATA13_30, 30 .EQU CANFD6_RXDATA13_RXDATA13_29, 29 .EQU CANFD6_RXDATA13_RXDATA13_28, 28 .EQU CANFD6_RXDATA13_RXDATA13_27, 27 .EQU CANFD6_RXDATA13_RXDATA13_26, 26 .EQU CANFD6_RXDATA13_RXDATA13_25, 25 .EQU CANFD6_RXDATA13_RXDATA13_24, 24 .EQU CANFD6_RXDATA13_RXDATA13_23, 23 .EQU CANFD6_RXDATA13_RXDATA13_22, 22 .EQU CANFD6_RXDATA13_RXDATA13_21, 21 .EQU CANFD6_RXDATA13_RXDATA13_20, 20 .EQU CANFD6_RXDATA13_RXDATA13_19, 19 .EQU CANFD6_RXDATA13_RXDATA13_18, 18 .EQU CANFD6_RXDATA13_RXDATA13_17, 17 .EQU CANFD6_RXDATA13_RXDATA13_16, 16 .EQU CANFD6_RXDATA13_RXDATA13_15, 15 .EQU CANFD6_RXDATA13_RXDATA13_14, 14 .EQU CANFD6_RXDATA13_RXDATA13_13, 13 .EQU CANFD6_RXDATA13_RXDATA13_12, 12 .EQU CANFD6_RXDATA13_RXDATA13_11, 11 .EQU CANFD6_RXDATA13_RXDATA13_10, 10 .EQU CANFD6_RXDATA13_RXDATA13_9, 9 .EQU CANFD6_RXDATA13_RXDATA13_8, 8 .EQU CANFD6_RXDATA13_RXDATA13_7, 7 .EQU CANFD6_RXDATA13_RXDATA13_6, 6 .EQU CANFD6_RXDATA13_RXDATA13_5, 5 .EQU CANFD6_RXDATA13_RXDATA13_4, 4 .EQU CANFD6_RXDATA13_RXDATA13_3, 3 .EQU CANFD6_RXDATA13_RXDATA13_2, 2 .EQU CANFD6_RXDATA13_RXDATA13_1, 1 .EQU CANFD6_RXDATA13_RXDATA13_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA14, 0x40002E58 // 0x4000 2E58 CANFD6_RXDATA14 Bits------------------------------------- .EQU CANFD6_RXDATA14_RXDATA14_31, 31 .EQU CANFD6_RXDATA14_RXDATA14_30, 30 .EQU CANFD6_RXDATA14_RXDATA14_29, 29 .EQU CANFD6_RXDATA14_RXDATA14_28, 28 .EQU CANFD6_RXDATA14_RXDATA14_27, 27 .EQU CANFD6_RXDATA14_RXDATA14_26, 26 .EQU CANFD6_RXDATA14_RXDATA14_25, 25 .EQU CANFD6_RXDATA14_RXDATA14_24, 24 .EQU CANFD6_RXDATA14_RXDATA14_23, 23 .EQU CANFD6_RXDATA14_RXDATA14_22, 22 .EQU CANFD6_RXDATA14_RXDATA14_21, 21 .EQU CANFD6_RXDATA14_RXDATA14_20, 20 .EQU CANFD6_RXDATA14_RXDATA14_19, 19 .EQU CANFD6_RXDATA14_RXDATA14_18, 18 .EQU CANFD6_RXDATA14_RXDATA14_17, 17 .EQU CANFD6_RXDATA14_RXDATA14_16, 16 .EQU CANFD6_RXDATA14_RXDATA14_15, 15 .EQU CANFD6_RXDATA14_RXDATA14_14, 14 .EQU CANFD6_RXDATA14_RXDATA14_13, 13 .EQU CANFD6_RXDATA14_RXDATA14_12, 12 .EQU CANFD6_RXDATA14_RXDATA14_11, 11 .EQU CANFD6_RXDATA14_RXDATA14_10, 10 .EQU CANFD6_RXDATA14_RXDATA14_9, 9 .EQU CANFD6_RXDATA14_RXDATA14_8, 8 .EQU CANFD6_RXDATA14_RXDATA14_7, 7 .EQU CANFD6_RXDATA14_RXDATA14_6, 6 .EQU CANFD6_RXDATA14_RXDATA14_5, 5 .EQU CANFD6_RXDATA14_RXDATA14_4, 4 .EQU CANFD6_RXDATA14_RXDATA14_3, 3 .EQU CANFD6_RXDATA14_RXDATA14_2, 2 .EQU CANFD6_RXDATA14_RXDATA14_1, 1 .EQU CANFD6_RXDATA14_RXDATA14_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA15, 0x40002E5C // 0x4000 2E5C CANFD6_RXDATA15 Bits------------------------------------- .EQU CANFD6_RXDATA15_RXDATA15_31, 31 .EQU CANFD6_RXDATA15_RXDATA15_30, 30 .EQU CANFD6_RXDATA15_RXDATA15_29, 29 .EQU CANFD6_RXDATA15_RXDATA15_28, 28 .EQU CANFD6_RXDATA15_RXDATA15_27, 27 .EQU CANFD6_RXDATA15_RXDATA15_26, 26 .EQU CANFD6_RXDATA15_RXDATA15_25, 25 .EQU CANFD6_RXDATA15_RXDATA15_24, 24 .EQU CANFD6_RXDATA15_RXDATA15_23, 23 .EQU CANFD6_RXDATA15_RXDATA15_22, 22 .EQU CANFD6_RXDATA15_RXDATA15_21, 21 .EQU CANFD6_RXDATA15_RXDATA15_20, 20 .EQU CANFD6_RXDATA15_RXDATA15_19, 19 .EQU CANFD6_RXDATA15_RXDATA15_18, 18 .EQU CANFD6_RXDATA15_RXDATA15_17, 17 .EQU CANFD6_RXDATA15_RXDATA15_16, 16 .EQU CANFD6_RXDATA15_RXDATA15_15, 15 .EQU CANFD6_RXDATA15_RXDATA15_14, 14 .EQU CANFD6_RXDATA15_RXDATA15_13, 13 .EQU CANFD6_RXDATA15_RXDATA15_12, 12 .EQU CANFD6_RXDATA15_RXDATA15_11, 11 .EQU CANFD6_RXDATA15_RXDATA15_10, 10 .EQU CANFD6_RXDATA15_RXDATA15_9, 9 .EQU CANFD6_RXDATA15_RXDATA15_8, 8 .EQU CANFD6_RXDATA15_RXDATA15_7, 7 .EQU CANFD6_RXDATA15_RXDATA15_6, 6 .EQU CANFD6_RXDATA15_RXDATA15_5, 5 .EQU CANFD6_RXDATA15_RXDATA15_4, 4 .EQU CANFD6_RXDATA15_RXDATA15_3, 3 .EQU CANFD6_RXDATA15_RXDATA15_2, 2 .EQU CANFD6_RXDATA15_RXDATA15_1, 1 .EQU CANFD6_RXDATA15_RXDATA15_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA16, 0x40002E60 // 0x4000 2E60 CANFD6_RXDATA16 Bits------------------------------------- .EQU CANFD6_RXDATA16_RXDATA16_31, 31 .EQU CANFD6_RXDATA16_RXDATA16_30, 30 .EQU CANFD6_RXDATA16_RXDATA16_29, 29 .EQU CANFD6_RXDATA16_RXDATA16_28, 28 .EQU CANFD6_RXDATA16_RXDATA16_27, 27 .EQU CANFD6_RXDATA16_RXDATA16_26, 26 .EQU CANFD6_RXDATA16_RXDATA16_25, 25 .EQU CANFD6_RXDATA16_RXDATA16_24, 24 .EQU CANFD6_RXDATA16_RXDATA16_23, 23 .EQU CANFD6_RXDATA16_RXDATA16_22, 22 .EQU CANFD6_RXDATA16_RXDATA16_21, 21 .EQU CANFD6_RXDATA16_RXDATA16_20, 20 .EQU CANFD6_RXDATA16_RXDATA16_19, 19 .EQU CANFD6_RXDATA16_RXDATA16_18, 18 .EQU CANFD6_RXDATA16_RXDATA16_17, 17 .EQU CANFD6_RXDATA16_RXDATA16_16, 16 .EQU CANFD6_RXDATA16_RXDATA16_15, 15 .EQU CANFD6_RXDATA16_RXDATA16_14, 14 .EQU CANFD6_RXDATA16_RXDATA16_13, 13 .EQU CANFD6_RXDATA16_RXDATA16_12, 12 .EQU CANFD6_RXDATA16_RXDATA16_11, 11 .EQU CANFD6_RXDATA16_RXDATA16_10, 10 .EQU CANFD6_RXDATA16_RXDATA16_9, 9 .EQU CANFD6_RXDATA16_RXDATA16_8, 8 .EQU CANFD6_RXDATA16_RXDATA16_7, 7 .EQU CANFD6_RXDATA16_RXDATA16_6, 6 .EQU CANFD6_RXDATA16_RXDATA16_5, 5 .EQU CANFD6_RXDATA16_RXDATA16_4, 4 .EQU CANFD6_RXDATA16_RXDATA16_3, 3 .EQU CANFD6_RXDATA16_RXDATA16_2, 2 .EQU CANFD6_RXDATA16_RXDATA16_1, 1 .EQU CANFD6_RXDATA16_RXDATA16_0, 0 // register------------------------------------- .EQU CANFD6_RXDATA17, 0x40002E64 // 0x4000 2E64 CANFD6_RXDATA17 Bits------------------------------------- .EQU CANFD6_RXDATA17_RXDATA17_31, 31 .EQU CANFD6_RXDATA17_RXDATA17_30, 30 .EQU CANFD6_RXDATA17_RXDATA17_29, 29 .EQU CANFD6_RXDATA17_RXDATA17_28, 28 .EQU CANFD6_RXDATA17_RXDATA17_27, 27 .EQU CANFD6_RXDATA17_RXDATA17_26, 26 .EQU CANFD6_RXDATA17_RXDATA17_25, 25 .EQU CANFD6_RXDATA17_RXDATA17_24, 24 .EQU CANFD6_RXDATA17_RXDATA17_23, 23 .EQU CANFD6_RXDATA17_RXDATA17_22, 22 .EQU CANFD6_RXDATA17_RXDATA17_21, 21 .EQU CANFD6_RXDATA17_RXDATA17_20, 20 .EQU CANFD6_RXDATA17_RXDATA17_19, 19 .EQU CANFD6_RXDATA17_RXDATA17_18, 18 .EQU CANFD6_RXDATA17_RXDATA17_17, 17 .EQU CANFD6_RXDATA17_RXDATA17_16, 16 .EQU CANFD6_RXDATA17_RXDATA17_15, 15 .EQU CANFD6_RXDATA17_RXDATA17_14, 14 .EQU CANFD6_RXDATA17_RXDATA17_13, 13 .EQU CANFD6_RXDATA17_RXDATA17_12, 12 .EQU CANFD6_RXDATA17_RXDATA17_11, 11 .EQU CANFD6_RXDATA17_RXDATA17_10, 10 .EQU CANFD6_RXDATA17_RXDATA17_9, 9 .EQU CANFD6_RXDATA17_RXDATA17_8, 8 .EQU CANFD6_RXDATA17_RXDATA17_7, 7 .EQU CANFD6_RXDATA17_RXDATA17_6, 6 .EQU CANFD6_RXDATA17_RXDATA17_5, 5 .EQU CANFD6_RXDATA17_RXDATA17_4, 4 .EQU CANFD6_RXDATA17_RXDATA17_3, 3 .EQU CANFD6_RXDATA17_RXDATA17_2, 2 .EQU CANFD6_RXDATA17_RXDATA17_1, 1 .EQU CANFD6_RXDATA17_RXDATA17_0, 0 // register------------------------------------- .EQU CANFD6_TIMER, 0x40002E68 // 0x4000 2E68 CANFD6_TIMER Bits------------------------------------- .EQU CANFD6_TIMER_CANTIMER15, 15 .EQU CANFD6_TIMER_CANTIMER14, 14 .EQU CANFD6_TIMER_CANTIMER13, 13 .EQU CANFD6_TIMER_CANTIMER12, 12 .EQU CANFD6_TIMER_CANTIMER11, 11 .EQU CANFD6_TIMER_CANTIMER10, 10 .EQU CANFD6_TIMER_CANTIMER9, 9 .EQU CANFD6_TIMER_CANTIMER8, 8 .EQU CANFD6_TIMER_CANTIMER7, 7 .EQU CANFD6_TIMER_CANTIMER6, 6 .EQU CANFD6_TIMER_CANTIMER5, 5 .EQU CANFD6_TIMER_CANTIMER4, 4 .EQU CANFD6_TIMER_CANTIMER3, 3 .EQU CANFD6_TIMER_CANTIMER2, 2 .EQU CANFD6_TIMER_CANTIMER1, 1 .EQU CANFD6_TIMER_CANTIMER0, 0 // register------------------------------------- .EQU CANFD6_CRC, 0x40002E6C // 0x4000 2E6C CANFD6_CRC Bits------------------------------------- .EQU CANFD6_CRC_STUFFCNT3, 31 .EQU CANFD6_CRC_STUFFCNT2, 30 .EQU CANFD6_CRC_STUFFCNT1, 29 .EQU CANFD6_CRC_STUFFCNT0, 28 .EQU CANFD6_CRC_CRC20, 20 .EQU CANFD6_CRC_CRC19, 19 .EQU CANFD6_CRC_CRC18, 18 .EQU CANFD6_CRC_CRC17, 17 .EQU CANFD6_CRC_CRC16, 16 .EQU CANFD6_CRC_CRC15, 15 .EQU CANFD6_CRC_CRC14, 14 .EQU CANFD6_CRC_CRC13, 13 .EQU CANFD6_CRC_CRC12, 12 .EQU CANFD6_CRC_CRC11, 11 .EQU CANFD6_CRC_CRC10, 10 .EQU CANFD6_CRC_CRC9, 9 .EQU CANFD6_CRC_CRC8, 8 .EQU CANFD6_CRC_CRC7, 7 .EQU CANFD6_CRC_CRC6, 6 .EQU CANFD6_CRC_CRC5, 5 .EQU CANFD6_CRC_CRC4, 4 .EQU CANFD6_CRC_CRC3, 3 .EQU CANFD6_CRC_CRC2, 2 .EQU CANFD6_CRC_CRC1, 1 .EQU CANFD6_CRC_CRC0, 0 // register------------------------------------- .EQU CANFD6_CTLR1, 0x40002E74 // 0x4000 2E74 CANFD6_CTLR1 Bits------------------------------------- .EQU CANFD6_CTLR1_TRGMBEN, 31 .EQU CANFD6_CTLR1_TRGMBSEL6, 30 .EQU CANFD6_CTLR1_TRGMBSEL5, 29 .EQU CANFD6_CTLR1_TRGMBSEL4, 28 .EQU CANFD6_CTLR1_TRGMBSEL3, 27 .EQU CANFD6_CTLR1_TRGMBSEL2, 26 .EQU CANFD6_CTLR1_TRGMBSEL1, 25 .EQU CANFD6_CTLR1_TRGMBSEL0, 24 .EQU CANFD6_CTLR1_TRGNUM3, 23 .EQU CANFD6_CTLR1_TRGNUM2, 22 .EQU CANFD6_CTLR1_TRGNUM1, 21 .EQU CANFD6_CTLR1_TRGNUM0, 20 .EQU CANFD6_CTLR1_CKMODE, 19 .EQU CANFD6_CTLR1_BOFFREC, 18 .EQU CANFD6_CTLR1_LBSEL, 17 .EQU CANFD6_CTLR1_ARBSTART, 16 .EQU CANFD6_CTLR1_ARBMS, 15 .EQU CANFD6_CTLR1_MBMSKEN, 14 .EQU CANFD6_CTLR1_MATCHMS, 13 .EQU CANFD6_CTLR1_MBNUM, 12 .EQU CANFD6_CTLR1_TSYN, 11 .EQU CANFD6_CTLR1_FTCLKS, 10 .EQU CANFD6_CTLR1_ST, 9 .EQU CANFD6_CTLR1_RXMUX6, 8 .EQU CANFD6_CTLR1_RXMUX5, 7 .EQU CANFD6_CTLR1_RXMUX4, 6 .EQU CANFD6_CTLR1_RXMUX3, 5 .EQU CANFD6_CTLR1_RXMUX2, 4 .EQU CANFD6_CTLR1_RXMUX1, 3 .EQU CANFD6_CTLR1_RXMUX0, 2 .EQU CANFD6_CTLR1_AMCKS1, 1 .EQU CANFD6_CTLR1_AMCKS0, 0 // register------------------------------------- .EQU CANFD6_AMSTA, 0x40002E78 // 0x4000 2E78 CANFD6_AMSTA Bits------------------------------------- .EQU CANFD6_AMSTA_TXCODE3, 31 .EQU CANFD6_AMSTA_TXCODE2, 30 .EQU CANFD6_AMSTA_TXCODE1, 29 .EQU CANFD6_AMSTA_TXCODE0, 28 .EQU CANFD6_AMSTA_ARBSTA1, 27 .EQU CANFD6_AMSTA_ARBSTA0, 26 .EQU CANFD6_AMSTA_ARBWINNER9, 25 .EQU CANFD6_AMSTA_ARBWINNER8, 24 .EQU CANFD6_AMSTA_ARBWINNER7, 23 .EQU CANFD6_AMSTA_ARBWINNER6, 22 .EQU CANFD6_AMSTA_ARBWINNER5, 21 .EQU CANFD6_AMSTA_ARBWINNER4, 20 .EQU CANFD6_AMSTA_ARBWINNER3, 19 .EQU CANFD6_AMSTA_ARBWINNER2, 18 .EQU CANFD6_AMSTA_ARBWINNER1, 17 .EQU CANFD6_AMSTA_ARBWINNER0, 16 .EQU CANFD6_AMSTA_BETEN, 15 .EQU CANFD6_AMSTA_RTRMEN, 14 .EQU CANFD6_AMSTA_IDSELEN, 13 .EQU CANFD6_AMSTA_RELRXALL, 12 .EQU CANFD6_AMSTA_ROPSTA, 11 .EQU CANFD6_AMSTA_MATSTA, 10 .EQU CANFD6_AMSTA_MATWINNER9, 9 .EQU CANFD6_AMSTA_MATWINNER8, 8 .EQU CANFD6_AMSTA_MATWINNER7, 7 .EQU CANFD6_AMSTA_MATWINNER6, 6 .EQU CANFD6_AMSTA_MATWINNER5, 5 .EQU CANFD6_AMSTA_MATWINNER4, 4 .EQU CANFD6_AMSTA_MATWINNER3, 3 .EQU CANFD6_AMSTA_MATWINNER2, 2 .EQU CANFD6_AMSTA_MATWINNER1, 1 .EQU CANFD6_AMSTA_MATWINNER0, 0 // register------------------------------------- .EQU CANFD6_TXDATA, 0x40002E7C // 0x4000 2E7C CANFD6_TXDATA Bits------------------------------------- .EQU CANFD6_TXDATA_TXDATA31, 31 .EQU CANFD6_TXDATA_TXDATA30, 30 .EQU CANFD6_TXDATA_TXDATA29, 29 .EQU CANFD6_TXDATA_TXDATA28, 28 .EQU CANFD6_TXDATA_TXDATA27, 27 .EQU CANFD6_TXDATA_TXDATA26, 26 .EQU CANFD6_TXDATA_TXDATA25, 25 .EQU CANFD6_TXDATA_TXDATA24, 24 .EQU CANFD6_TXDATA_TXDATA23, 23 .EQU CANFD6_TXDATA_TXDATA22, 22 .EQU CANFD6_TXDATA_TXDATA21, 21 .EQU CANFD6_TXDATA_TXDATA20, 20 .EQU CANFD6_TXDATA_TXDATA19, 19 .EQU CANFD6_TXDATA_TXDATA18, 18 .EQU CANFD6_TXDATA_TXDATA17, 17 .EQU CANFD6_TXDATA_TXDATA16, 16 .EQU CANFD6_TXDATA_TXDATA15, 15 .EQU CANFD6_TXDATA_TXDATA14, 14 .EQU CANFD6_TXDATA_TXDATA13, 13 .EQU CANFD6_TXDATA_TXDATA12, 12 .EQU CANFD6_TXDATA_TXDATA11, 11 .EQU CANFD6_TXDATA_TXDATA10, 10 .EQU CANFD6_TXDATA_TXDATA9, 9 .EQU CANFD6_TXDATA_TXDATA8, 8 .EQU CANFD6_TXDATA_TXDATA7, 7 .EQU CANFD6_TXDATA_TXDATA6, 6 .EQU CANFD6_TXDATA_TXDATA5, 5 .EQU CANFD6_TXDATA_TXDATA4, 4 .EQU CANFD6_TXDATA_TXDATA3, 3 .EQU CANFD6_TXDATA_TXDATA2, 2 .EQU CANFD6_TXDATA_TXDATA1, 1 .EQU CANFD6_TXDATA_TXDATA0, 0 // register------------------------------------- .EQU CANFD7_CTLR0, 0x40003000 // 0x4000 3000 CANFD7_CTLR0 Bits------------------------------------- .EQU CANFD7_CTLR0_CANFDEN, 31 .EQU CANFD7_CTLR0_CANRMC6, 30 .EQU CANFD7_CTLR0_CANRMC5, 29 .EQU CANFD7_CTLR0_CANRMC4, 28 .EQU CANFD7_CTLR0_CANRMC3, 27 .EQU CANFD7_CTLR0_CANRMC2, 26 .EQU CANFD7_CTLR0_CANRMC1, 25 .EQU CANFD7_CTLR0_CANRMC0, 24 .EQU CANFD7_CTLR0_BOFF, 23 .EQU CANFD7_CTLR0_CERROR, 22 .EQU CANFD7_CTLR0_TXSTA, 21 .EQU CANFD7_CTLR0_RXSTA, 20 .EQU CANFD7_CTLR0_TCSTA, 19 .EQU CANFD7_CTLR0_DOSTA, 17 .EQU CANFD7_CTLR0_RXBSTA, 16 .EQU CANFD7_CTLR0_ANSWEREN, 15 .EQU CANFD7_CTLR0_FULLRXEN, 14 .EQU CANFD7_CTLR0_MBSIZE1, 13 .EQU CANFD7_CTLR0_MBSIZE0, 12 .EQU CANFD7_CTLR0_RELF, 11 .EQU CANFD7_CTLR0_RELRX, 10 .EQU CANFD7_CTLR0_ATX, 9 .EQU CANFD7_CTLR0_TXR, 8 .EQU CANFD7_CTLR0_CANEN, 7 .EQU CANFD7_CTLR0_CANCKS1, 6 .EQU CANFD7_CTLR0_CANCKS0, 5 .EQU CANFD7_CTLR0_ISOFDCANEN, 4 .EQU CANFD7_CTLR0_SLEEP, 3 .EQU CANFD7_CTLR0_LBACK, 2 .EQU CANFD7_CTLR0_SILENT, 1 .EQU CANFD7_CTLR0_RSMOD, 0 // register------------------------------------- .EQU CANFD7_BRGR, 0x40003004 // 0x4000 3004 CANFD7_BRGR Bits------------------------------------- .EQU CANFD7_BRGR_HTSEG2_2, 28 .EQU CANFD7_BRGR_HTSEG2_1, 27 .EQU CANFD7_BRGR_HTSEG2_0, 26 .EQU CANFD7_BRGR_HTSEG1_3, 25 .EQU CANFD7_BRGR_HTSEG1_2, 24 .EQU CANFD7_BRGR_HTSEG1_1, 23 .EQU CANFD7_BRGR_HTSEG1_0, 22 .EQU CANFD7_BRGR_BRSBRP5, 21 .EQU CANFD7_BRGR_BRSBRP4, 20 .EQU CANFD7_BRGR_BRSBRP3, 19 .EQU CANFD7_BRGR_BRSBRP2, 18 .EQU CANFD7_BRGR_BRSBRP1, 17 .EQU CANFD7_BRGR_BRSBRP0, 16 .EQU CANFD7_BRGR_SAM, 15 .EQU CANFD7_BRGR_TSEG2_2, 14 .EQU CANFD7_BRGR_TSEG2_1, 13 .EQU CANFD7_BRGR_TSEG2_0, 12 .EQU CANFD7_BRGR_TSEG1_3, 11 .EQU CANFD7_BRGR_TSEG1_2, 10 .EQU CANFD7_BRGR_TSEG1_1, 9 .EQU CANFD7_BRGR_TSEG1_0, 8 .EQU CANFD7_BRGR_SJW1, 7 .EQU CANFD7_BRGR_SJW0, 6 .EQU CANFD7_BRGR_CANBRP5, 5 .EQU CANFD7_BRGR_CANBRP4, 4 .EQU CANFD7_BRGR_CANBRP3, 3 .EQU CANFD7_BRGR_CANBRP2, 2 .EQU CANFD7_BRGR_CANBRP1, 1 .EQU CANFD7_BRGR_CANBRP0, 0 // register------------------------------------- .EQU CANFD7_RCR, 0x40003008 // 0x4000 3008 CANFD7_RCR Bits------------------------------------- .EQU CANFD7_RCR_DPRAMOF, 16 .EQU CANFD7_RCR_CANERRC1, 15 .EQU CANFD7_RCR_CANERRC0, 14 .EQU CANFD7_RCR_CANDIR, 13 .EQU CANFD7_RCR_CANSEG4, 12 .EQU CANFD7_RCR_CANSEG3, 11 .EQU CANFD7_RCR_CANSEG2, 10 .EQU CANFD7_RCR_CANSEG1, 9 .EQU CANFD7_RCR_CANSEG0, 8 .EQU CANFD7_RCR_CANALC4, 4 .EQU CANFD7_RCR_CANALC3, 3 .EQU CANFD7_RCR_CANALC2, 2 .EQU CANFD7_RCR_CANALC1, 1 .EQU CANFD7_RCR_CANALC0, 0 // register------------------------------------- .EQU CANFD7_EROR, 0x4000300C // 0x4000 300C CANFD7_EROR Bits------------------------------------- .EQU CANFD7_EROR_DPRAMFEN, 31 .EQU CANFD7_EROR_SFDMOD, 30 .EQU CANFD7_EROR_SFDEN, 29 .EQU CANFD7_EROR_SOSFD4, 28 .EQU CANFD7_EROR_SOSFD3, 27 .EQU CANFD7_EROR_SOSFD2, 26 .EQU CANFD7_EROR_SOSFD1, 25 .EQU CANFD7_EROR_SOSFD0, 24 .EQU CANFD7_EROR_CANEWL7, 23 .EQU CANFD7_EROR_CANEWL6, 22 .EQU CANFD7_EROR_CANEWL5, 21 .EQU CANFD7_EROR_CANEWL4, 20 .EQU CANFD7_EROR_CANEWL3, 19 .EQU CANFD7_EROR_CANEWL2, 18 .EQU CANFD7_EROR_CANEWL1, 17 .EQU CANFD7_EROR_CANEWL0, 16 .EQU CANFD7_EROR_CANTXE7, 15 .EQU CANFD7_EROR_CANTXE6, 14 .EQU CANFD7_EROR_CANTXE5, 13 .EQU CANFD7_EROR_CANTXE4, 12 .EQU CANFD7_EROR_CANTXE3, 11 .EQU CANFD7_EROR_CANTXE2, 10 .EQU CANFD7_EROR_CANTXE1, 9 .EQU CANFD7_EROR_CANTXE0, 8 .EQU CANFD7_EROR_CANRXE7, 7 .EQU CANFD7_EROR_CANRXE6, 6 .EQU CANFD7_EROR_CANRXE5, 5 .EQU CANFD7_EROR_CANRXE4, 4 .EQU CANFD7_EROR_CANRXE3, 3 .EQU CANFD7_EROR_CANRXE2, 2 .EQU CANFD7_EROR_CANRXE1, 1 .EQU CANFD7_EROR_CANRXE0, 0 // register------------------------------------- .EQU CANFD7_CTLR2, 0x40003010 // 0x4000 3010 CANFD7_CTLR2 Bits------------------------------------- .EQU CANFD7_CTLR2_AMCKDIV1, 26 .EQU CANFD7_CTLR2_AMCKDIV0, 25 .EQU CANFD7_CTLR2_DESEL, 24 .EQU CANFD7_CTLR2_TDCVM6, 22 .EQU CANFD7_CTLR2_TDCVM5, 21 .EQU CANFD7_CTLR2_TDCVM4, 20 .EQU CANFD7_CTLR2_TDCVM3, 19 .EQU CANFD7_CTLR2_TDCVM2, 18 .EQU CANFD7_CTLR2_TDCVM1, 17 .EQU CANFD7_CTLR2_TDCVM0, 16 .EQU CANFD7_CTLR2_TDC0_1, 15 .EQU CANFD7_CTLR2_TDC0_0, 14 .EQU CANFD7_CTLR2_TDCSR1, 13 .EQU CANFD7_CTLR2_TDCSR0, 12 .EQU CANFD7_CTLR2_TDCS1, 11 .EQU CANFD7_CTLR2_TDCS0, 10 .EQU CANFD7_CTLR2_TDCAUT0, 9 .EQU CANFD7_CTLR2_TDCEN, 8 .EQU CANFD7_CTLR2_TDC0EN, 7 .EQU CANFD7_CTLR2_TDCV6, 6 .EQU CANFD7_CTLR2_TDCV5, 5 .EQU CANFD7_CTLR2_TDCV4, 4 .EQU CANFD7_CTLR2_TDCV3, 3 .EQU CANFD7_CTLR2_TDCV2, 2 .EQU CANFD7_CTLR2_TDCV1, 1 .EQU CANFD7_CTLR2_TDCV0, 0 // register------------------------------------- .EQU CANFD7_MSKR, 0x40003014 // 0x4000 3014 CANFD7_MSKR Bits------------------------------------- .EQU CANFD7_MSKR_MSK31, 31 .EQU CANFD7_MSKR_MSK30, 30 .EQU CANFD7_MSKR_MSK29, 29 .EQU CANFD7_MSKR_MSK28, 28 .EQU CANFD7_MSKR_MSK27, 27 .EQU CANFD7_MSKR_MSK26, 26 .EQU CANFD7_MSKR_MSK25, 25 .EQU CANFD7_MSKR_MSK24, 24 .EQU CANFD7_MSKR_MSK23, 23 .EQU CANFD7_MSKR_MSK22, 22 .EQU CANFD7_MSKR_MSK21, 21 .EQU CANFD7_MSKR_MSK20, 20 .EQU CANFD7_MSKR_MSK19, 19 .EQU CANFD7_MSKR_MSK18, 18 .EQU CANFD7_MSKR_MSK17, 17 .EQU CANFD7_MSKR_MSK16, 16 .EQU CANFD7_MSKR_MSK15, 15 .EQU CANFD7_MSKR_MSK14, 14 .EQU CANFD7_MSKR_MSK13, 13 .EQU CANFD7_MSKR_MSK12, 12 .EQU CANFD7_MSKR_MSK11, 11 .EQU CANFD7_MSKR_MSK10, 10 .EQU CANFD7_MSKR_MSK9, 9 .EQU CANFD7_MSKR_MSK8, 8 .EQU CANFD7_MSKR_MSK7, 7 .EQU CANFD7_MSKR_MSK6, 6 .EQU CANFD7_MSKR_MSK5, 5 .EQU CANFD7_MSKR_MSK4, 4 .EQU CANFD7_MSKR_MSK3, 3 .EQU CANFD7_MSKR_MSK2, 2 .EQU CANFD7_MSKR_MSK1, 1 .EQU CANFD7_MSKR_MSK0, 0 // register------------------------------------- .EQU CANFD7_IER, 0x40003018 // 0x4000 3018 CANFD7_IER Bits------------------------------------- .EQU CANFD7_IER_FAILCLR, 31 .EQU CANFD7_IER_LPCANGPIOSEL0, 30 .EQU CANFD7_IER_BOFFIC, 28 .EQU CANFD7_IER_TRGMBIC, 27 .EQU CANFD7_IER_MOENDIC, 26 .EQU CANFD7_IER_BEIC, 23 .EQU CANFD7_IER_ALIC, 22 .EQU CANFD7_IER_ENIC, 21 .EQU CANFD7_IER_WUIC, 20 .EQU CANFD7_IER_DOVFIC, 19 .EQU CANFD7_IER_EAIC, 18 .EQU CANFD7_IER_CANTXIC, 17 .EQU CANFD7_IER_CANRXIC, 16 .EQU CANFD7_IER_MOENDIE, 15 .EQU CANFD7_IER_ARBFAILIE, 14 .EQU CANFD7_IER_BOFFIE, 12 .EQU CANFD7_IER_TRGMBIE, 11 .EQU CANFD7_IER_RXBSTAIE, 10 .EQU CANFD7_IER_CRXDE, 9 .EQU CANFD7_IER_CTXDE, 8 .EQU CANFD7_IER_BEIE, 7 .EQU CANFD7_IER_ALIE, 6 .EQU CANFD7_IER_ENIE, 5 .EQU CANFD7_IER_WUIE, 4 .EQU CANFD7_IER_DOVFIE, 3 .EQU CANFD7_IER_EAIE, 2 .EQU CANFD7_IER_CANTXIE, 1 .EQU CANFD7_IER_CANRXIE, 0 // register------------------------------------- .EQU CANFD7_IFR, 0x4000301C // 0x4000 301C CANFD7_IFR Bits------------------------------------- .EQU CANFD7_IFR_MOENDIF, 14 .EQU CANFD7_IFR_BOFFIF, 12 .EQU CANFD7_IFR_TRGMBIF, 11 .EQU CANFD7_IFR_RXBSTAIF, 10 .EQU CANFD7_IFR_CRXDF, 9 .EQU CANFD7_IFR_CTXDF, 8 .EQU CANFD7_IFR_BEIF, 7 .EQU CANFD7_IFR_ALIF, 6 .EQU CANFD7_IFR_ENIF, 5 .EQU CANFD7_IFR_WUIF, 4 .EQU CANFD7_IFR_DOVFIF, 3 .EQU CANFD7_IFR_EAIF, 2 .EQU CANFD7_IFR_CANTXIF, 1 .EQU CANFD7_IFR_CANRXIF, 0 // register------------------------------------- .EQU CANFD7_RXDATA0, 0x40003020 // 0x4000 3020 CANFD7_RXDATA0 Bits------------------------------------- .EQU CANFD7_RXDATA0_RXDATA0_31, 31 .EQU CANFD7_RXDATA0_RXDATA0_30, 30 .EQU CANFD7_RXDATA0_RXDATA0_29, 29 .EQU CANFD7_RXDATA0_RXDATA0_28, 28 .EQU CANFD7_RXDATA0_RXDATA0_27, 27 .EQU CANFD7_RXDATA0_RXDATA0_26, 26 .EQU CANFD7_RXDATA0_RXDATA0_25, 25 .EQU CANFD7_RXDATA0_RXDATA0_24, 24 .EQU CANFD7_RXDATA0_RXDATA0_23, 23 .EQU CANFD7_RXDATA0_RXDATA0_22, 22 .EQU CANFD7_RXDATA0_RXDATA0_21, 21 .EQU CANFD7_RXDATA0_RXDATA0_20, 20 .EQU CANFD7_RXDATA0_RXDATA0_19, 19 .EQU CANFD7_RXDATA0_RXDATA0_18, 18 .EQU CANFD7_RXDATA0_RXDATA0_17, 17 .EQU CANFD7_RXDATA0_RXDATA0_16, 16 .EQU CANFD7_RXDATA0_RXDATA0_15, 15 .EQU CANFD7_RXDATA0_RXDATA0_14, 14 .EQU CANFD7_RXDATA0_RXDATA0_13, 13 .EQU CANFD7_RXDATA0_RXDATA0_12, 12 .EQU CANFD7_RXDATA0_RXDATA0_11, 11 .EQU CANFD7_RXDATA0_RXDATA0_10, 10 .EQU CANFD7_RXDATA0_RXDATA0_9, 9 .EQU CANFD7_RXDATA0_RXDATA0_8, 8 .EQU CANFD7_RXDATA0_RXDATA0_7, 7 .EQU CANFD7_RXDATA0_RXDATA0_6, 6 .EQU CANFD7_RXDATA0_RXDATA0_5, 5 .EQU CANFD7_RXDATA0_RXDATA0_4, 4 .EQU CANFD7_RXDATA0_RXDATA0_3, 3 .EQU CANFD7_RXDATA0_RXDATA0_2, 2 .EQU CANFD7_RXDATA0_RXDATA0_1, 1 .EQU CANFD7_RXDATA0_RXDATA0_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA1, 0x40003024 // 0x4000 3024 CANFD7_RXDATA1 Bits------------------------------------- .EQU CANFD7_RXDATA1_RXDATA1_31, 31 .EQU CANFD7_RXDATA1_RXDATA1_30, 30 .EQU CANFD7_RXDATA1_RXDATA1_29, 29 .EQU CANFD7_RXDATA1_RXDATA1_28, 28 .EQU CANFD7_RXDATA1_RXDATA1_27, 27 .EQU CANFD7_RXDATA1_RXDATA1_26, 26 .EQU CANFD7_RXDATA1_RXDATA1_25, 25 .EQU CANFD7_RXDATA1_RXDATA1_24, 24 .EQU CANFD7_RXDATA1_RXDATA1_23, 23 .EQU CANFD7_RXDATA1_RXDATA1_22, 22 .EQU CANFD7_RXDATA1_RXDATA1_21, 21 .EQU CANFD7_RXDATA1_RXDATA1_20, 20 .EQU CANFD7_RXDATA1_RXDATA1_19, 19 .EQU CANFD7_RXDATA1_RXDATA1_18, 18 .EQU CANFD7_RXDATA1_RXDATA1_17, 17 .EQU CANFD7_RXDATA1_RXDATA1_16, 16 .EQU CANFD7_RXDATA1_RXDATA1_15, 15 .EQU CANFD7_RXDATA1_RXDATA1_14, 14 .EQU CANFD7_RXDATA1_RXDATA1_13, 13 .EQU CANFD7_RXDATA1_RXDATA1_12, 12 .EQU CANFD7_RXDATA1_RXDATA1_11, 11 .EQU CANFD7_RXDATA1_RXDATA1_10, 10 .EQU CANFD7_RXDATA1_RXDATA1_9, 9 .EQU CANFD7_RXDATA1_RXDATA1_8, 8 .EQU CANFD7_RXDATA1_RXDATA1_7, 7 .EQU CANFD7_RXDATA1_RXDATA1_6, 6 .EQU CANFD7_RXDATA1_RXDATA1_5, 5 .EQU CANFD7_RXDATA1_RXDATA1_4, 4 .EQU CANFD7_RXDATA1_RXDATA1_3, 3 .EQU CANFD7_RXDATA1_RXDATA1_2, 2 .EQU CANFD7_RXDATA1_RXDATA1_1, 1 .EQU CANFD7_RXDATA1_RXDATA1_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA2, 0x40003028 // 0x4000 3028 CANFD7_RXDATA2 Bits------------------------------------- .EQU CANFD7_RXDATA2_RXDATA2_31, 31 .EQU CANFD7_RXDATA2_RXDATA2_30, 30 .EQU CANFD7_RXDATA2_RXDATA2_29, 29 .EQU CANFD7_RXDATA2_RXDATA2_28, 28 .EQU CANFD7_RXDATA2_RXDATA2_27, 27 .EQU CANFD7_RXDATA2_RXDATA2_26, 26 .EQU CANFD7_RXDATA2_RXDATA2_25, 25 .EQU CANFD7_RXDATA2_RXDATA2_24, 24 .EQU CANFD7_RXDATA2_RXDATA2_23, 23 .EQU CANFD7_RXDATA2_RXDATA2_22, 22 .EQU CANFD7_RXDATA2_RXDATA2_21, 21 .EQU CANFD7_RXDATA2_RXDATA2_20, 20 .EQU CANFD7_RXDATA2_RXDATA2_19, 19 .EQU CANFD7_RXDATA2_RXDATA2_18, 18 .EQU CANFD7_RXDATA2_RXDATA2_17, 17 .EQU CANFD7_RXDATA2_RXDATA2_16, 16 .EQU CANFD7_RXDATA2_RXDATA2_15, 15 .EQU CANFD7_RXDATA2_RXDATA2_14, 14 .EQU CANFD7_RXDATA2_RXDATA2_13, 13 .EQU CANFD7_RXDATA2_RXDATA2_12, 12 .EQU CANFD7_RXDATA2_RXDATA2_11, 11 .EQU CANFD7_RXDATA2_RXDATA2_10, 10 .EQU CANFD7_RXDATA2_RXDATA2_9, 9 .EQU CANFD7_RXDATA2_RXDATA2_8, 8 .EQU CANFD7_RXDATA2_RXDATA2_7, 7 .EQU CANFD7_RXDATA2_RXDATA2_6, 6 .EQU CANFD7_RXDATA2_RXDATA2_5, 5 .EQU CANFD7_RXDATA2_RXDATA2_4, 4 .EQU CANFD7_RXDATA2_RXDATA2_3, 3 .EQU CANFD7_RXDATA2_RXDATA2_2, 2 .EQU CANFD7_RXDATA2_RXDATA2_1, 1 .EQU CANFD7_RXDATA2_RXDATA2_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA3, 0x4000302C // 0x4000 302C CANFD7_RXDATA3 Bits------------------------------------- .EQU CANFD7_RXDATA3_RXDATA3_31, 31 .EQU CANFD7_RXDATA3_RXDATA3_30, 30 .EQU CANFD7_RXDATA3_RXDATA3_29, 29 .EQU CANFD7_RXDATA3_RXDATA3_28, 28 .EQU CANFD7_RXDATA3_RXDATA3_27, 27 .EQU CANFD7_RXDATA3_RXDATA3_26, 26 .EQU CANFD7_RXDATA3_RXDATA3_25, 25 .EQU CANFD7_RXDATA3_RXDATA3_24, 24 .EQU CANFD7_RXDATA3_RXDATA3_23, 23 .EQU CANFD7_RXDATA3_RXDATA3_22, 22 .EQU CANFD7_RXDATA3_RXDATA3_21, 21 .EQU CANFD7_RXDATA3_RXDATA3_20, 20 .EQU CANFD7_RXDATA3_RXDATA3_19, 19 .EQU CANFD7_RXDATA3_RXDATA3_18, 18 .EQU CANFD7_RXDATA3_RXDATA3_17, 17 .EQU CANFD7_RXDATA3_RXDATA3_16, 16 .EQU CANFD7_RXDATA3_RXDATA3_15, 15 .EQU CANFD7_RXDATA3_RXDATA3_14, 14 .EQU CANFD7_RXDATA3_RXDATA3_13, 13 .EQU CANFD7_RXDATA3_RXDATA3_12, 12 .EQU CANFD7_RXDATA3_RXDATA3_11, 11 .EQU CANFD7_RXDATA3_RXDATA3_10, 10 .EQU CANFD7_RXDATA3_RXDATA3_9, 9 .EQU CANFD7_RXDATA3_RXDATA3_8, 8 .EQU CANFD7_RXDATA3_RXDATA3_7, 7 .EQU CANFD7_RXDATA3_RXDATA3_6, 6 .EQU CANFD7_RXDATA3_RXDATA3_5, 5 .EQU CANFD7_RXDATA3_RXDATA3_4, 4 .EQU CANFD7_RXDATA3_RXDATA3_3, 3 .EQU CANFD7_RXDATA3_RXDATA3_2, 2 .EQU CANFD7_RXDATA3_RXDATA3_1, 1 .EQU CANFD7_RXDATA3_RXDATA3_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA4, 0x40003030 // 0x4000 3030 CANFD7_RXDATA4 Bits------------------------------------- .EQU CANFD7_RXDATA4_RXDATA4_31, 31 .EQU CANFD7_RXDATA4_RXDATA4_30, 30 .EQU CANFD7_RXDATA4_RXDATA4_29, 29 .EQU CANFD7_RXDATA4_RXDATA4_28, 28 .EQU CANFD7_RXDATA4_RXDATA4_27, 27 .EQU CANFD7_RXDATA4_RXDATA4_26, 26 .EQU CANFD7_RXDATA4_RXDATA4_25, 25 .EQU CANFD7_RXDATA4_RXDATA4_24, 24 .EQU CANFD7_RXDATA4_RXDATA4_23, 23 .EQU CANFD7_RXDATA4_RXDATA4_22, 22 .EQU CANFD7_RXDATA4_RXDATA4_21, 21 .EQU CANFD7_RXDATA4_RXDATA4_20, 20 .EQU CANFD7_RXDATA4_RXDATA4_19, 19 .EQU CANFD7_RXDATA4_RXDATA4_18, 18 .EQU CANFD7_RXDATA4_RXDATA4_17, 17 .EQU CANFD7_RXDATA4_RXDATA4_16, 16 .EQU CANFD7_RXDATA4_RXDATA4_15, 15 .EQU CANFD7_RXDATA4_RXDATA4_14, 14 .EQU CANFD7_RXDATA4_RXDATA4_13, 13 .EQU CANFD7_RXDATA4_RXDATA4_12, 12 .EQU CANFD7_RXDATA4_RXDATA4_11, 11 .EQU CANFD7_RXDATA4_RXDATA4_10, 10 .EQU CANFD7_RXDATA4_RXDATA4_9, 9 .EQU CANFD7_RXDATA4_RXDATA4_8, 8 .EQU CANFD7_RXDATA4_RXDATA4_7, 7 .EQU CANFD7_RXDATA4_RXDATA4_6, 6 .EQU CANFD7_RXDATA4_RXDATA4_5, 5 .EQU CANFD7_RXDATA4_RXDATA4_4, 4 .EQU CANFD7_RXDATA4_RXDATA4_3, 3 .EQU CANFD7_RXDATA4_RXDATA4_2, 2 .EQU CANFD7_RXDATA4_RXDATA4_1, 1 .EQU CANFD7_RXDATA4_RXDATA4_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA5, 0x40003034 // 0x4000 3034 CANFD7_RXDATA5 Bits------------------------------------- .EQU CANFD7_RXDATA5_RXDATA5_31, 31 .EQU CANFD7_RXDATA5_RXDATA5_30, 30 .EQU CANFD7_RXDATA5_RXDATA5_29, 29 .EQU CANFD7_RXDATA5_RXDATA5_28, 28 .EQU CANFD7_RXDATA5_RXDATA5_27, 27 .EQU CANFD7_RXDATA5_RXDATA5_26, 26 .EQU CANFD7_RXDATA5_RXDATA5_25, 25 .EQU CANFD7_RXDATA5_RXDATA5_24, 24 .EQU CANFD7_RXDATA5_RXDATA5_23, 23 .EQU CANFD7_RXDATA5_RXDATA5_22, 22 .EQU CANFD7_RXDATA5_RXDATA5_21, 21 .EQU CANFD7_RXDATA5_RXDATA5_20, 20 .EQU CANFD7_RXDATA5_RXDATA5_19, 19 .EQU CANFD7_RXDATA5_RXDATA5_18, 18 .EQU CANFD7_RXDATA5_RXDATA5_17, 17 .EQU CANFD7_RXDATA5_RXDATA5_16, 16 .EQU CANFD7_RXDATA5_RXDATA5_15, 15 .EQU CANFD7_RXDATA5_RXDATA5_14, 14 .EQU CANFD7_RXDATA5_RXDATA5_13, 13 .EQU CANFD7_RXDATA5_RXDATA5_12, 12 .EQU CANFD7_RXDATA5_RXDATA5_11, 11 .EQU CANFD7_RXDATA5_RXDATA5_10, 10 .EQU CANFD7_RXDATA5_RXDATA5_9, 9 .EQU CANFD7_RXDATA5_RXDATA5_8, 8 .EQU CANFD7_RXDATA5_RXDATA5_7, 7 .EQU CANFD7_RXDATA5_RXDATA5_6, 6 .EQU CANFD7_RXDATA5_RXDATA5_5, 5 .EQU CANFD7_RXDATA5_RXDATA5_4, 4 .EQU CANFD7_RXDATA5_RXDATA5_3, 3 .EQU CANFD7_RXDATA5_RXDATA5_2, 2 .EQU CANFD7_RXDATA5_RXDATA5_1, 1 .EQU CANFD7_RXDATA5_RXDATA5_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA6, 0x40003038 // 0x4000 3038 CANFD7_RXDATA6 Bits------------------------------------- .EQU CANFD7_RXDATA6_RXDATA6_31, 31 .EQU CANFD7_RXDATA6_RXDATA6_30, 30 .EQU CANFD7_RXDATA6_RXDATA6_29, 29 .EQU CANFD7_RXDATA6_RXDATA6_28, 28 .EQU CANFD7_RXDATA6_RXDATA6_27, 27 .EQU CANFD7_RXDATA6_RXDATA6_26, 26 .EQU CANFD7_RXDATA6_RXDATA6_25, 25 .EQU CANFD7_RXDATA6_RXDATA6_24, 24 .EQU CANFD7_RXDATA6_RXDATA6_23, 23 .EQU CANFD7_RXDATA6_RXDATA6_22, 22 .EQU CANFD7_RXDATA6_RXDATA6_21, 21 .EQU CANFD7_RXDATA6_RXDATA6_20, 20 .EQU CANFD7_RXDATA6_RXDATA6_19, 19 .EQU CANFD7_RXDATA6_RXDATA6_18, 18 .EQU CANFD7_RXDATA6_RXDATA6_17, 17 .EQU CANFD7_RXDATA6_RXDATA6_16, 16 .EQU CANFD7_RXDATA6_RXDATA6_15, 15 .EQU CANFD7_RXDATA6_RXDATA6_14, 14 .EQU CANFD7_RXDATA6_RXDATA6_13, 13 .EQU CANFD7_RXDATA6_RXDATA6_12, 12 .EQU CANFD7_RXDATA6_RXDATA6_11, 11 .EQU CANFD7_RXDATA6_RXDATA6_10, 10 .EQU CANFD7_RXDATA6_RXDATA6_9, 9 .EQU CANFD7_RXDATA6_RXDATA6_8, 8 .EQU CANFD7_RXDATA6_RXDATA6_7, 7 .EQU CANFD7_RXDATA6_RXDATA6_6, 6 .EQU CANFD7_RXDATA6_RXDATA6_5, 5 .EQU CANFD7_RXDATA6_RXDATA6_4, 4 .EQU CANFD7_RXDATA6_RXDATA6_3, 3 .EQU CANFD7_RXDATA6_RXDATA6_2, 2 .EQU CANFD7_RXDATA6_RXDATA6_1, 1 .EQU CANFD7_RXDATA6_RXDATA6_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA7, 0x4000303C // 0x4000 303C CANFD7_RXDATA7 Bits------------------------------------- .EQU CANFD7_RXDATA7_RXDATA7_31, 31 .EQU CANFD7_RXDATA7_RXDATA7_30, 30 .EQU CANFD7_RXDATA7_RXDATA7_29, 29 .EQU CANFD7_RXDATA7_RXDATA7_28, 28 .EQU CANFD7_RXDATA7_RXDATA7_27, 27 .EQU CANFD7_RXDATA7_RXDATA7_26, 26 .EQU CANFD7_RXDATA7_RXDATA7_25, 25 .EQU CANFD7_RXDATA7_RXDATA7_24, 24 .EQU CANFD7_RXDATA7_RXDATA7_23, 23 .EQU CANFD7_RXDATA7_RXDATA7_22, 22 .EQU CANFD7_RXDATA7_RXDATA7_21, 21 .EQU CANFD7_RXDATA7_RXDATA7_20, 20 .EQU CANFD7_RXDATA7_RXDATA7_19, 19 .EQU CANFD7_RXDATA7_RXDATA7_18, 18 .EQU CANFD7_RXDATA7_RXDATA7_17, 17 .EQU CANFD7_RXDATA7_RXDATA7_16, 16 .EQU CANFD7_RXDATA7_RXDATA7_15, 15 .EQU CANFD7_RXDATA7_RXDATA7_14, 14 .EQU CANFD7_RXDATA7_RXDATA7_13, 13 .EQU CANFD7_RXDATA7_RXDATA7_12, 12 .EQU CANFD7_RXDATA7_RXDATA7_11, 11 .EQU CANFD7_RXDATA7_RXDATA7_10, 10 .EQU CANFD7_RXDATA7_RXDATA7_9, 9 .EQU CANFD7_RXDATA7_RXDATA7_8, 8 .EQU CANFD7_RXDATA7_RXDATA7_7, 7 .EQU CANFD7_RXDATA7_RXDATA7_6, 6 .EQU CANFD7_RXDATA7_RXDATA7_5, 5 .EQU CANFD7_RXDATA7_RXDATA7_4, 4 .EQU CANFD7_RXDATA7_RXDATA7_3, 3 .EQU CANFD7_RXDATA7_RXDATA7_2, 2 .EQU CANFD7_RXDATA7_RXDATA7_1, 1 .EQU CANFD7_RXDATA7_RXDATA7_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA8, 0x40003040 // 0x4000 3040 CANFD7_RXDATA8 Bits------------------------------------- .EQU CANFD7_RXDATA8_RXDATA8_31, 31 .EQU CANFD7_RXDATA8_RXDATA8_30, 30 .EQU CANFD7_RXDATA8_RXDATA8_29, 29 .EQU CANFD7_RXDATA8_RXDATA8_28, 28 .EQU CANFD7_RXDATA8_RXDATA8_27, 27 .EQU CANFD7_RXDATA8_RXDATA8_26, 26 .EQU CANFD7_RXDATA8_RXDATA8_25, 25 .EQU CANFD7_RXDATA8_RXDATA8_24, 24 .EQU CANFD7_RXDATA8_RXDATA8_23, 23 .EQU CANFD7_RXDATA8_RXDATA8_22, 22 .EQU CANFD7_RXDATA8_RXDATA8_21, 21 .EQU CANFD7_RXDATA8_RXDATA8_20, 20 .EQU CANFD7_RXDATA8_RXDATA8_19, 19 .EQU CANFD7_RXDATA8_RXDATA8_18, 18 .EQU CANFD7_RXDATA8_RXDATA8_17, 17 .EQU CANFD7_RXDATA8_RXDATA8_16, 16 .EQU CANFD7_RXDATA8_RXDATA8_15, 15 .EQU CANFD7_RXDATA8_RXDATA8_14, 14 .EQU CANFD7_RXDATA8_RXDATA8_13, 13 .EQU CANFD7_RXDATA8_RXDATA8_12, 12 .EQU CANFD7_RXDATA8_RXDATA8_11, 11 .EQU CANFD7_RXDATA8_RXDATA8_10, 10 .EQU CANFD7_RXDATA8_RXDATA8_9, 9 .EQU CANFD7_RXDATA8_RXDATA8_8, 8 .EQU CANFD7_RXDATA8_RXDATA8_7, 7 .EQU CANFD7_RXDATA8_RXDATA8_6, 6 .EQU CANFD7_RXDATA8_RXDATA8_5, 5 .EQU CANFD7_RXDATA8_RXDATA8_4, 4 .EQU CANFD7_RXDATA8_RXDATA8_3, 3 .EQU CANFD7_RXDATA8_RXDATA8_2, 2 .EQU CANFD7_RXDATA8_RXDATA8_1, 1 .EQU CANFD7_RXDATA8_RXDATA8_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA9, 0x40003044 // 0x4000 3044 CANFD7_RXDATA9 Bits------------------------------------- .EQU CANFD7_RXDATA9_RXDATA9_31, 31 .EQU CANFD7_RXDATA9_RXDATA9_30, 30 .EQU CANFD7_RXDATA9_RXDATA9_29, 29 .EQU CANFD7_RXDATA9_RXDATA9_28, 28 .EQU CANFD7_RXDATA9_RXDATA9_27, 27 .EQU CANFD7_RXDATA9_RXDATA9_26, 26 .EQU CANFD7_RXDATA9_RXDATA9_25, 25 .EQU CANFD7_RXDATA9_RXDATA9_24, 24 .EQU CANFD7_RXDATA9_RXDATA9_23, 23 .EQU CANFD7_RXDATA9_RXDATA9_22, 22 .EQU CANFD7_RXDATA9_RXDATA9_21, 21 .EQU CANFD7_RXDATA9_RXDATA9_20, 20 .EQU CANFD7_RXDATA9_RXDATA9_19, 19 .EQU CANFD7_RXDATA9_RXDATA9_18, 18 .EQU CANFD7_RXDATA9_RXDATA9_17, 17 .EQU CANFD7_RXDATA9_RXDATA9_16, 16 .EQU CANFD7_RXDATA9_RXDATA9_15, 15 .EQU CANFD7_RXDATA9_RXDATA9_14, 14 .EQU CANFD7_RXDATA9_RXDATA9_13, 13 .EQU CANFD7_RXDATA9_RXDATA9_12, 12 .EQU CANFD7_RXDATA9_RXDATA9_11, 11 .EQU CANFD7_RXDATA9_RXDATA9_10, 10 .EQU CANFD7_RXDATA9_RXDATA9_9, 9 .EQU CANFD7_RXDATA9_RXDATA9_8, 8 .EQU CANFD7_RXDATA9_RXDATA9_7, 7 .EQU CANFD7_RXDATA9_RXDATA9_6, 6 .EQU CANFD7_RXDATA9_RXDATA9_5, 5 .EQU CANFD7_RXDATA9_RXDATA9_4, 4 .EQU CANFD7_RXDATA9_RXDATA9_3, 3 .EQU CANFD7_RXDATA9_RXDATA9_2, 2 .EQU CANFD7_RXDATA9_RXDATA9_1, 1 .EQU CANFD7_RXDATA9_RXDATA9_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA10, 0x40003048 // 0x4000 3048 CANFD7_RXDATA10 Bits------------------------------------- .EQU CANFD7_RXDATA10_RXDATA10_31, 31 .EQU CANFD7_RXDATA10_RXDATA10_30, 30 .EQU CANFD7_RXDATA10_RXDATA10_29, 29 .EQU CANFD7_RXDATA10_RXDATA10_28, 28 .EQU CANFD7_RXDATA10_RXDATA10_27, 27 .EQU CANFD7_RXDATA10_RXDATA10_26, 26 .EQU CANFD7_RXDATA10_RXDATA10_25, 25 .EQU CANFD7_RXDATA10_RXDATA10_24, 24 .EQU CANFD7_RXDATA10_RXDATA10_23, 23 .EQU CANFD7_RXDATA10_RXDATA10_22, 22 .EQU CANFD7_RXDATA10_RXDATA10_21, 21 .EQU CANFD7_RXDATA10_RXDATA10_20, 20 .EQU CANFD7_RXDATA10_RXDATA10_19, 19 .EQU CANFD7_RXDATA10_RXDATA10_18, 18 .EQU CANFD7_RXDATA10_RXDATA10_17, 17 .EQU CANFD7_RXDATA10_RXDATA10_16, 16 .EQU CANFD7_RXDATA10_RXDATA10_15, 15 .EQU CANFD7_RXDATA10_RXDATA10_14, 14 .EQU CANFD7_RXDATA10_RXDATA10_13, 13 .EQU CANFD7_RXDATA10_RXDATA10_12, 12 .EQU CANFD7_RXDATA10_RXDATA10_11, 11 .EQU CANFD7_RXDATA10_RXDATA10_10, 10 .EQU CANFD7_RXDATA10_RXDATA10_9, 9 .EQU CANFD7_RXDATA10_RXDATA10_8, 8 .EQU CANFD7_RXDATA10_RXDATA10_7, 7 .EQU CANFD7_RXDATA10_RXDATA10_6, 6 .EQU CANFD7_RXDATA10_RXDATA10_5, 5 .EQU CANFD7_RXDATA10_RXDATA10_4, 4 .EQU CANFD7_RXDATA10_RXDATA10_3, 3 .EQU CANFD7_RXDATA10_RXDATA10_2, 2 .EQU CANFD7_RXDATA10_RXDATA10_1, 1 .EQU CANFD7_RXDATA10_RXDATA10_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA11, 0x4000304C // 0x4000 304C CANFD7_RXDATA11 Bits------------------------------------- .EQU CANFD7_RXDATA11_RXDATA11_31, 31 .EQU CANFD7_RXDATA11_RXDATA11_30, 30 .EQU CANFD7_RXDATA11_RXDATA11_29, 29 .EQU CANFD7_RXDATA11_RXDATA11_28, 28 .EQU CANFD7_RXDATA11_RXDATA11_27, 27 .EQU CANFD7_RXDATA11_RXDATA11_26, 26 .EQU CANFD7_RXDATA11_RXDATA11_25, 25 .EQU CANFD7_RXDATA11_RXDATA11_24, 24 .EQU CANFD7_RXDATA11_RXDATA11_23, 23 .EQU CANFD7_RXDATA11_RXDATA11_22, 22 .EQU CANFD7_RXDATA11_RXDATA11_21, 21 .EQU CANFD7_RXDATA11_RXDATA11_20, 20 .EQU CANFD7_RXDATA11_RXDATA11_19, 19 .EQU CANFD7_RXDATA11_RXDATA11_18, 18 .EQU CANFD7_RXDATA11_RXDATA11_17, 17 .EQU CANFD7_RXDATA11_RXDATA11_16, 16 .EQU CANFD7_RXDATA11_RXDATA11_15, 15 .EQU CANFD7_RXDATA11_RXDATA11_14, 14 .EQU CANFD7_RXDATA11_RXDATA11_13, 13 .EQU CANFD7_RXDATA11_RXDATA11_12, 12 .EQU CANFD7_RXDATA11_RXDATA11_11, 11 .EQU CANFD7_RXDATA11_RXDATA11_10, 10 .EQU CANFD7_RXDATA11_RXDATA11_9, 9 .EQU CANFD7_RXDATA11_RXDATA11_8, 8 .EQU CANFD7_RXDATA11_RXDATA11_7, 7 .EQU CANFD7_RXDATA11_RXDATA11_6, 6 .EQU CANFD7_RXDATA11_RXDATA11_5, 5 .EQU CANFD7_RXDATA11_RXDATA11_4, 4 .EQU CANFD7_RXDATA11_RXDATA11_3, 3 .EQU CANFD7_RXDATA11_RXDATA11_2, 2 .EQU CANFD7_RXDATA11_RXDATA11_1, 1 .EQU CANFD7_RXDATA11_RXDATA11_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA12, 0x40003050 // 0x4000 3050 CANFD7_RXDATA12 Bits------------------------------------- .EQU CANFD7_RXDATA12_RXDATA12_31, 31 .EQU CANFD7_RXDATA12_RXDATA12_30, 30 .EQU CANFD7_RXDATA12_RXDATA12_29, 29 .EQU CANFD7_RXDATA12_RXDATA12_28, 28 .EQU CANFD7_RXDATA12_RXDATA12_27, 27 .EQU CANFD7_RXDATA12_RXDATA12_26, 26 .EQU CANFD7_RXDATA12_RXDATA12_25, 25 .EQU CANFD7_RXDATA12_RXDATA12_24, 24 .EQU CANFD7_RXDATA12_RXDATA12_23, 23 .EQU CANFD7_RXDATA12_RXDATA12_22, 22 .EQU CANFD7_RXDATA12_RXDATA12_21, 21 .EQU CANFD7_RXDATA12_RXDATA12_20, 20 .EQU CANFD7_RXDATA12_RXDATA12_19, 19 .EQU CANFD7_RXDATA12_RXDATA12_18, 18 .EQU CANFD7_RXDATA12_RXDATA12_17, 17 .EQU CANFD7_RXDATA12_RXDATA12_16, 16 .EQU CANFD7_RXDATA12_RXDATA12_15, 15 .EQU CANFD7_RXDATA12_RXDATA12_14, 14 .EQU CANFD7_RXDATA12_RXDATA12_13, 13 .EQU CANFD7_RXDATA12_RXDATA12_12, 12 .EQU CANFD7_RXDATA12_RXDATA12_11, 11 .EQU CANFD7_RXDATA12_RXDATA12_10, 10 .EQU CANFD7_RXDATA12_RXDATA12_9, 9 .EQU CANFD7_RXDATA12_RXDATA12_8, 8 .EQU CANFD7_RXDATA12_RXDATA12_7, 7 .EQU CANFD7_RXDATA12_RXDATA12_6, 6 .EQU CANFD7_RXDATA12_RXDATA12_5, 5 .EQU CANFD7_RXDATA12_RXDATA12_4, 4 .EQU CANFD7_RXDATA12_RXDATA12_3, 3 .EQU CANFD7_RXDATA12_RXDATA12_2, 2 .EQU CANFD7_RXDATA12_RXDATA12_1, 1 .EQU CANFD7_RXDATA12_RXDATA12_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA13, 0x40003054 // 0x4000 3054 CANFD7_RXDATA13 Bits------------------------------------- .EQU CANFD7_RXDATA13_RXDATA13_31, 31 .EQU CANFD7_RXDATA13_RXDATA13_30, 30 .EQU CANFD7_RXDATA13_RXDATA13_29, 29 .EQU CANFD7_RXDATA13_RXDATA13_28, 28 .EQU CANFD7_RXDATA13_RXDATA13_27, 27 .EQU CANFD7_RXDATA13_RXDATA13_26, 26 .EQU CANFD7_RXDATA13_RXDATA13_25, 25 .EQU CANFD7_RXDATA13_RXDATA13_24, 24 .EQU CANFD7_RXDATA13_RXDATA13_23, 23 .EQU CANFD7_RXDATA13_RXDATA13_22, 22 .EQU CANFD7_RXDATA13_RXDATA13_21, 21 .EQU CANFD7_RXDATA13_RXDATA13_20, 20 .EQU CANFD7_RXDATA13_RXDATA13_19, 19 .EQU CANFD7_RXDATA13_RXDATA13_18, 18 .EQU CANFD7_RXDATA13_RXDATA13_17, 17 .EQU CANFD7_RXDATA13_RXDATA13_16, 16 .EQU CANFD7_RXDATA13_RXDATA13_15, 15 .EQU CANFD7_RXDATA13_RXDATA13_14, 14 .EQU CANFD7_RXDATA13_RXDATA13_13, 13 .EQU CANFD7_RXDATA13_RXDATA13_12, 12 .EQU CANFD7_RXDATA13_RXDATA13_11, 11 .EQU CANFD7_RXDATA13_RXDATA13_10, 10 .EQU CANFD7_RXDATA13_RXDATA13_9, 9 .EQU CANFD7_RXDATA13_RXDATA13_8, 8 .EQU CANFD7_RXDATA13_RXDATA13_7, 7 .EQU CANFD7_RXDATA13_RXDATA13_6, 6 .EQU CANFD7_RXDATA13_RXDATA13_5, 5 .EQU CANFD7_RXDATA13_RXDATA13_4, 4 .EQU CANFD7_RXDATA13_RXDATA13_3, 3 .EQU CANFD7_RXDATA13_RXDATA13_2, 2 .EQU CANFD7_RXDATA13_RXDATA13_1, 1 .EQU CANFD7_RXDATA13_RXDATA13_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA14, 0x40003058 // 0x4000 3058 CANFD7_RXDATA14 Bits------------------------------------- .EQU CANFD7_RXDATA14_RXDATA14_31, 31 .EQU CANFD7_RXDATA14_RXDATA14_30, 30 .EQU CANFD7_RXDATA14_RXDATA14_29, 29 .EQU CANFD7_RXDATA14_RXDATA14_28, 28 .EQU CANFD7_RXDATA14_RXDATA14_27, 27 .EQU CANFD7_RXDATA14_RXDATA14_26, 26 .EQU CANFD7_RXDATA14_RXDATA14_25, 25 .EQU CANFD7_RXDATA14_RXDATA14_24, 24 .EQU CANFD7_RXDATA14_RXDATA14_23, 23 .EQU CANFD7_RXDATA14_RXDATA14_22, 22 .EQU CANFD7_RXDATA14_RXDATA14_21, 21 .EQU CANFD7_RXDATA14_RXDATA14_20, 20 .EQU CANFD7_RXDATA14_RXDATA14_19, 19 .EQU CANFD7_RXDATA14_RXDATA14_18, 18 .EQU CANFD7_RXDATA14_RXDATA14_17, 17 .EQU CANFD7_RXDATA14_RXDATA14_16, 16 .EQU CANFD7_RXDATA14_RXDATA14_15, 15 .EQU CANFD7_RXDATA14_RXDATA14_14, 14 .EQU CANFD7_RXDATA14_RXDATA14_13, 13 .EQU CANFD7_RXDATA14_RXDATA14_12, 12 .EQU CANFD7_RXDATA14_RXDATA14_11, 11 .EQU CANFD7_RXDATA14_RXDATA14_10, 10 .EQU CANFD7_RXDATA14_RXDATA14_9, 9 .EQU CANFD7_RXDATA14_RXDATA14_8, 8 .EQU CANFD7_RXDATA14_RXDATA14_7, 7 .EQU CANFD7_RXDATA14_RXDATA14_6, 6 .EQU CANFD7_RXDATA14_RXDATA14_5, 5 .EQU CANFD7_RXDATA14_RXDATA14_4, 4 .EQU CANFD7_RXDATA14_RXDATA14_3, 3 .EQU CANFD7_RXDATA14_RXDATA14_2, 2 .EQU CANFD7_RXDATA14_RXDATA14_1, 1 .EQU CANFD7_RXDATA14_RXDATA14_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA15, 0x4000305C // 0x4000 305C CANFD7_RXDATA15 Bits------------------------------------- .EQU CANFD7_RXDATA15_RXDATA15_31, 31 .EQU CANFD7_RXDATA15_RXDATA15_30, 30 .EQU CANFD7_RXDATA15_RXDATA15_29, 29 .EQU CANFD7_RXDATA15_RXDATA15_28, 28 .EQU CANFD7_RXDATA15_RXDATA15_27, 27 .EQU CANFD7_RXDATA15_RXDATA15_26, 26 .EQU CANFD7_RXDATA15_RXDATA15_25, 25 .EQU CANFD7_RXDATA15_RXDATA15_24, 24 .EQU CANFD7_RXDATA15_RXDATA15_23, 23 .EQU CANFD7_RXDATA15_RXDATA15_22, 22 .EQU CANFD7_RXDATA15_RXDATA15_21, 21 .EQU CANFD7_RXDATA15_RXDATA15_20, 20 .EQU CANFD7_RXDATA15_RXDATA15_19, 19 .EQU CANFD7_RXDATA15_RXDATA15_18, 18 .EQU CANFD7_RXDATA15_RXDATA15_17, 17 .EQU CANFD7_RXDATA15_RXDATA15_16, 16 .EQU CANFD7_RXDATA15_RXDATA15_15, 15 .EQU CANFD7_RXDATA15_RXDATA15_14, 14 .EQU CANFD7_RXDATA15_RXDATA15_13, 13 .EQU CANFD7_RXDATA15_RXDATA15_12, 12 .EQU CANFD7_RXDATA15_RXDATA15_11, 11 .EQU CANFD7_RXDATA15_RXDATA15_10, 10 .EQU CANFD7_RXDATA15_RXDATA15_9, 9 .EQU CANFD7_RXDATA15_RXDATA15_8, 8 .EQU CANFD7_RXDATA15_RXDATA15_7, 7 .EQU CANFD7_RXDATA15_RXDATA15_6, 6 .EQU CANFD7_RXDATA15_RXDATA15_5, 5 .EQU CANFD7_RXDATA15_RXDATA15_4, 4 .EQU CANFD7_RXDATA15_RXDATA15_3, 3 .EQU CANFD7_RXDATA15_RXDATA15_2, 2 .EQU CANFD7_RXDATA15_RXDATA15_1, 1 .EQU CANFD7_RXDATA15_RXDATA15_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA16, 0x40003060 // 0x4000 3060 CANFD7_RXDATA16 Bits------------------------------------- .EQU CANFD7_RXDATA16_RXDATA16_31, 31 .EQU CANFD7_RXDATA16_RXDATA16_30, 30 .EQU CANFD7_RXDATA16_RXDATA16_29, 29 .EQU CANFD7_RXDATA16_RXDATA16_28, 28 .EQU CANFD7_RXDATA16_RXDATA16_27, 27 .EQU CANFD7_RXDATA16_RXDATA16_26, 26 .EQU CANFD7_RXDATA16_RXDATA16_25, 25 .EQU CANFD7_RXDATA16_RXDATA16_24, 24 .EQU CANFD7_RXDATA16_RXDATA16_23, 23 .EQU CANFD7_RXDATA16_RXDATA16_22, 22 .EQU CANFD7_RXDATA16_RXDATA16_21, 21 .EQU CANFD7_RXDATA16_RXDATA16_20, 20 .EQU CANFD7_RXDATA16_RXDATA16_19, 19 .EQU CANFD7_RXDATA16_RXDATA16_18, 18 .EQU CANFD7_RXDATA16_RXDATA16_17, 17 .EQU CANFD7_RXDATA16_RXDATA16_16, 16 .EQU CANFD7_RXDATA16_RXDATA16_15, 15 .EQU CANFD7_RXDATA16_RXDATA16_14, 14 .EQU CANFD7_RXDATA16_RXDATA16_13, 13 .EQU CANFD7_RXDATA16_RXDATA16_12, 12 .EQU CANFD7_RXDATA16_RXDATA16_11, 11 .EQU CANFD7_RXDATA16_RXDATA16_10, 10 .EQU CANFD7_RXDATA16_RXDATA16_9, 9 .EQU CANFD7_RXDATA16_RXDATA16_8, 8 .EQU CANFD7_RXDATA16_RXDATA16_7, 7 .EQU CANFD7_RXDATA16_RXDATA16_6, 6 .EQU CANFD7_RXDATA16_RXDATA16_5, 5 .EQU CANFD7_RXDATA16_RXDATA16_4, 4 .EQU CANFD7_RXDATA16_RXDATA16_3, 3 .EQU CANFD7_RXDATA16_RXDATA16_2, 2 .EQU CANFD7_RXDATA16_RXDATA16_1, 1 .EQU CANFD7_RXDATA16_RXDATA16_0, 0 // register------------------------------------- .EQU CANFD7_RXDATA17, 0x40003064 // 0x4000 3064 CANFD7_RXDATA17 Bits------------------------------------- .EQU CANFD7_RXDATA17_RXDATA17_31, 31 .EQU CANFD7_RXDATA17_RXDATA17_30, 30 .EQU CANFD7_RXDATA17_RXDATA17_29, 29 .EQU CANFD7_RXDATA17_RXDATA17_28, 28 .EQU CANFD7_RXDATA17_RXDATA17_27, 27 .EQU CANFD7_RXDATA17_RXDATA17_26, 26 .EQU CANFD7_RXDATA17_RXDATA17_25, 25 .EQU CANFD7_RXDATA17_RXDATA17_24, 24 .EQU CANFD7_RXDATA17_RXDATA17_23, 23 .EQU CANFD7_RXDATA17_RXDATA17_22, 22 .EQU CANFD7_RXDATA17_RXDATA17_21, 21 .EQU CANFD7_RXDATA17_RXDATA17_20, 20 .EQU CANFD7_RXDATA17_RXDATA17_19, 19 .EQU CANFD7_RXDATA17_RXDATA17_18, 18 .EQU CANFD7_RXDATA17_RXDATA17_17, 17 .EQU CANFD7_RXDATA17_RXDATA17_16, 16 .EQU CANFD7_RXDATA17_RXDATA17_15, 15 .EQU CANFD7_RXDATA17_RXDATA17_14, 14 .EQU CANFD7_RXDATA17_RXDATA17_13, 13 .EQU CANFD7_RXDATA17_RXDATA17_12, 12 .EQU CANFD7_RXDATA17_RXDATA17_11, 11 .EQU CANFD7_RXDATA17_RXDATA17_10, 10 .EQU CANFD7_RXDATA17_RXDATA17_9, 9 .EQU CANFD7_RXDATA17_RXDATA17_8, 8 .EQU CANFD7_RXDATA17_RXDATA17_7, 7 .EQU CANFD7_RXDATA17_RXDATA17_6, 6 .EQU CANFD7_RXDATA17_RXDATA17_5, 5 .EQU CANFD7_RXDATA17_RXDATA17_4, 4 .EQU CANFD7_RXDATA17_RXDATA17_3, 3 .EQU CANFD7_RXDATA17_RXDATA17_2, 2 .EQU CANFD7_RXDATA17_RXDATA17_1, 1 .EQU CANFD7_RXDATA17_RXDATA17_0, 0 // register------------------------------------- .EQU CANFD7_TIMER, 0x40003068 // 0x4000 3068 CANFD7_TIMER Bits------------------------------------- .EQU CANFD7_TIMER_CANTIMER15, 15 .EQU CANFD7_TIMER_CANTIMER14, 14 .EQU CANFD7_TIMER_CANTIMER13, 13 .EQU CANFD7_TIMER_CANTIMER12, 12 .EQU CANFD7_TIMER_CANTIMER11, 11 .EQU CANFD7_TIMER_CANTIMER10, 10 .EQU CANFD7_TIMER_CANTIMER9, 9 .EQU CANFD7_TIMER_CANTIMER8, 8 .EQU CANFD7_TIMER_CANTIMER7, 7 .EQU CANFD7_TIMER_CANTIMER6, 6 .EQU CANFD7_TIMER_CANTIMER5, 5 .EQU CANFD7_TIMER_CANTIMER4, 4 .EQU CANFD7_TIMER_CANTIMER3, 3 .EQU CANFD7_TIMER_CANTIMER2, 2 .EQU CANFD7_TIMER_CANTIMER1, 1 .EQU CANFD7_TIMER_CANTIMER0, 0 // register------------------------------------- .EQU CANFD7_CRC, 0x4000306C // 0x4000 306C CANFD7_CRC Bits------------------------------------- .EQU CANFD7_CRC_STUFFCNT3, 31 .EQU CANFD7_CRC_STUFFCNT2, 30 .EQU CANFD7_CRC_STUFFCNT1, 29 .EQU CANFD7_CRC_STUFFCNT0, 28 .EQU CANFD7_CRC_CRC20, 20 .EQU CANFD7_CRC_CRC19, 19 .EQU CANFD7_CRC_CRC18, 18 .EQU CANFD7_CRC_CRC17, 17 .EQU CANFD7_CRC_CRC16, 16 .EQU CANFD7_CRC_CRC15, 15 .EQU CANFD7_CRC_CRC14, 14 .EQU CANFD7_CRC_CRC13, 13 .EQU CANFD7_CRC_CRC12, 12 .EQU CANFD7_CRC_CRC11, 11 .EQU CANFD7_CRC_CRC10, 10 .EQU CANFD7_CRC_CRC9, 9 .EQU CANFD7_CRC_CRC8, 8 .EQU CANFD7_CRC_CRC7, 7 .EQU CANFD7_CRC_CRC6, 6 .EQU CANFD7_CRC_CRC5, 5 .EQU CANFD7_CRC_CRC4, 4 .EQU CANFD7_CRC_CRC3, 3 .EQU CANFD7_CRC_CRC2, 2 .EQU CANFD7_CRC_CRC1, 1 .EQU CANFD7_CRC_CRC0, 0 // register------------------------------------- .EQU CANFD7_CTLR1, 0x40003074 // 0x4000 3074 CANFD7_CTLR1 Bits------------------------------------- .EQU CANFD7_CTLR1_TRGMBEN, 31 .EQU CANFD7_CTLR1_TRGMBSEL6, 30 .EQU CANFD7_CTLR1_TRGMBSEL5, 29 .EQU CANFD7_CTLR1_TRGMBSEL4, 28 .EQU CANFD7_CTLR1_TRGMBSEL3, 27 .EQU CANFD7_CTLR1_TRGMBSEL2, 26 .EQU CANFD7_CTLR1_TRGMBSEL1, 25 .EQU CANFD7_CTLR1_TRGMBSEL0, 24 .EQU CANFD7_CTLR1_TRGNUM3, 23 .EQU CANFD7_CTLR1_TRGNUM2, 22 .EQU CANFD7_CTLR1_TRGNUM1, 21 .EQU CANFD7_CTLR1_TRGNUM0, 20 .EQU CANFD7_CTLR1_CKMODE, 19 .EQU CANFD7_CTLR1_BOFFREC, 18 .EQU CANFD7_CTLR1_LBSEL, 17 .EQU CANFD7_CTLR1_ARBSTART, 16 .EQU CANFD7_CTLR1_ARBMS, 15 .EQU CANFD7_CTLR1_MBMSKEN, 14 .EQU CANFD7_CTLR1_MATCHMS, 13 .EQU CANFD7_CTLR1_MBNUM, 12 .EQU CANFD7_CTLR1_TSYN, 11 .EQU CANFD7_CTLR1_FTCLKS, 10 .EQU CANFD7_CTLR1_ST, 9 .EQU CANFD7_CTLR1_RXMUX6, 8 .EQU CANFD7_CTLR1_RXMUX5, 7 .EQU CANFD7_CTLR1_RXMUX4, 6 .EQU CANFD7_CTLR1_RXMUX3, 5 .EQU CANFD7_CTLR1_RXMUX2, 4 .EQU CANFD7_CTLR1_RXMUX1, 3 .EQU CANFD7_CTLR1_RXMUX0, 2 .EQU CANFD7_CTLR1_AMCKS1, 1 .EQU CANFD7_CTLR1_AMCKS0, 0 // register------------------------------------- .EQU CANFD7_AMSTA, 0x40003078 // 0x4000 3078 CANFD7_AMSTA Bits------------------------------------- .EQU CANFD7_AMSTA_TXCODE3, 31 .EQU CANFD7_AMSTA_TXCODE2, 30 .EQU CANFD7_AMSTA_TXCODE1, 29 .EQU CANFD7_AMSTA_TXCODE0, 28 .EQU CANFD7_AMSTA_ARBSTA1, 27 .EQU CANFD7_AMSTA_ARBSTA0, 26 .EQU CANFD7_AMSTA_ARBWINNER9, 25 .EQU CANFD7_AMSTA_ARBWINNER8, 24 .EQU CANFD7_AMSTA_ARBWINNER7, 23 .EQU CANFD7_AMSTA_ARBWINNER6, 22 .EQU CANFD7_AMSTA_ARBWINNER5, 21 .EQU CANFD7_AMSTA_ARBWINNER4, 20 .EQU CANFD7_AMSTA_ARBWINNER3, 19 .EQU CANFD7_AMSTA_ARBWINNER2, 18 .EQU CANFD7_AMSTA_ARBWINNER1, 17 .EQU CANFD7_AMSTA_ARBWINNER0, 16 .EQU CANFD7_AMSTA_BETEN, 15 .EQU CANFD7_AMSTA_RTRMEN, 14 .EQU CANFD7_AMSTA_IDSELEN, 13 .EQU CANFD7_AMSTA_RELRXALL, 12 .EQU CANFD7_AMSTA_ROPSTA, 11 .EQU CANFD7_AMSTA_MATSTA, 10 .EQU CANFD7_AMSTA_MATWINNER9, 9 .EQU CANFD7_AMSTA_MATWINNER8, 8 .EQU CANFD7_AMSTA_MATWINNER7, 7 .EQU CANFD7_AMSTA_MATWINNER6, 6 .EQU CANFD7_AMSTA_MATWINNER5, 5 .EQU CANFD7_AMSTA_MATWINNER4, 4 .EQU CANFD7_AMSTA_MATWINNER3, 3 .EQU CANFD7_AMSTA_MATWINNER2, 2 .EQU CANFD7_AMSTA_MATWINNER1, 1 .EQU CANFD7_AMSTA_MATWINNER0, 0 // register------------------------------------- .EQU CANFD7_TXDATA, 0x4000307C // 0x4000 307C CANFD7_TXDATA Bits------------------------------------- .EQU CANFD7_TXDATA_TXDATA31, 31 .EQU CANFD7_TXDATA_TXDATA30, 30 .EQU CANFD7_TXDATA_TXDATA29, 29 .EQU CANFD7_TXDATA_TXDATA28, 28 .EQU CANFD7_TXDATA_TXDATA27, 27 .EQU CANFD7_TXDATA_TXDATA26, 26 .EQU CANFD7_TXDATA_TXDATA25, 25 .EQU CANFD7_TXDATA_TXDATA24, 24 .EQU CANFD7_TXDATA_TXDATA23, 23 .EQU CANFD7_TXDATA_TXDATA22, 22 .EQU CANFD7_TXDATA_TXDATA21, 21 .EQU CANFD7_TXDATA_TXDATA20, 20 .EQU CANFD7_TXDATA_TXDATA19, 19 .EQU CANFD7_TXDATA_TXDATA18, 18 .EQU CANFD7_TXDATA_TXDATA17, 17 .EQU CANFD7_TXDATA_TXDATA16, 16 .EQU CANFD7_TXDATA_TXDATA15, 15 .EQU CANFD7_TXDATA_TXDATA14, 14 .EQU CANFD7_TXDATA_TXDATA13, 13 .EQU CANFD7_TXDATA_TXDATA12, 12 .EQU CANFD7_TXDATA_TXDATA11, 11 .EQU CANFD7_TXDATA_TXDATA10, 10 .EQU CANFD7_TXDATA_TXDATA9, 9 .EQU CANFD7_TXDATA_TXDATA8, 8 .EQU CANFD7_TXDATA_TXDATA7, 7 .EQU CANFD7_TXDATA_TXDATA6, 6 .EQU CANFD7_TXDATA_TXDATA5, 5 .EQU CANFD7_TXDATA_TXDATA4, 4 .EQU CANFD7_TXDATA_TXDATA3, 3 .EQU CANFD7_TXDATA_TXDATA2, 2 .EQU CANFD7_TXDATA_TXDATA1, 1 .EQU CANFD7_TXDATA_TXDATA0, 0 // register------------------------------------- .EQU T16_CNT, 0x40003380 // 0x4000 3380 T16_CNT Bits------------------------------------- .EQU T16_CNT_TXCNT31, 31 .EQU T16_CNT_TXCNT30, 30 .EQU T16_CNT_TXCNT29, 29 .EQU T16_CNT_TXCNT28, 28 .EQU T16_CNT_TXCNT27, 27 .EQU T16_CNT_TXCNT26, 26 .EQU T16_CNT_TXCNT25, 25 .EQU T16_CNT_TXCNT24, 24 .EQU T16_CNT_TXCNT23, 23 .EQU T16_CNT_TXCNT22, 22 .EQU T16_CNT_TXCNT21, 21 .EQU T16_CNT_TXCNT20, 20 .EQU T16_CNT_TXCNT19, 19 .EQU T16_CNT_TXCNT18, 18 .EQU T16_CNT_TXCNT17, 17 .EQU T16_CNT_TXCNT16, 16 .EQU T16_CNT_TXCNT15, 15 .EQU T16_CNT_TXCNT14, 14 .EQU T16_CNT_TXCNT13, 13 .EQU T16_CNT_TXCNT12, 12 .EQU T16_CNT_TXCNT11, 11 .EQU T16_CNT_TXCNT10, 10 .EQU T16_CNT_TXCNT9, 9 .EQU T16_CNT_TXCNT8, 8 .EQU T16_CNT_TXCNT7, 7 .EQU T16_CNT_TXCNT6, 6 .EQU T16_CNT_TXCNT5, 5 .EQU T16_CNT_TXCNT4, 4 .EQU T16_CNT_TXCNT3, 3 .EQU T16_CNT_TXCNT2, 2 .EQU T16_CNT_TXCNT1, 1 .EQU T16_CNT_TXCNT0, 0 // register------------------------------------- .EQU T16_PHS, 0x40003384 // 0x4000 3384 T16_PHS Bits------------------------------------- .EQU T16_PHS_TXPHS31, 31 .EQU T16_PHS_TXPHS30, 30 .EQU T16_PHS_TXPHS29, 29 .EQU T16_PHS_TXPHS28, 28 .EQU T16_PHS_TXPHS27, 27 .EQU T16_PHS_TXPHS26, 26 .EQU T16_PHS_TXPHS25, 25 .EQU T16_PHS_TXPHS24, 24 .EQU T16_PHS_TXPHS23, 23 .EQU T16_PHS_TXPHS22, 22 .EQU T16_PHS_TXPHS21, 21 .EQU T16_PHS_TXPHS20, 20 .EQU T16_PHS_TXPHS19, 19 .EQU T16_PHS_TXPHS18, 18 .EQU T16_PHS_TXPHS17, 17 .EQU T16_PHS_TXPHS16, 16 .EQU T16_PHS_TXPHS15, 15 .EQU T16_PHS_TXPHS14, 14 .EQU T16_PHS_TXPHS13, 13 .EQU T16_PHS_TXPHS12, 12 .EQU T16_PHS_TXPHS11, 11 .EQU T16_PHS_TXPHS10, 10 .EQU T16_PHS_TXPHS9, 9 .EQU T16_PHS_TXPHS8, 8 .EQU T16_PHS_TXPHS7, 7 .EQU T16_PHS_TXPHS6, 6 .EQU T16_PHS_TXPHS5, 5 .EQU T16_PHS_TXPHS4, 4 .EQU T16_PHS_TXPHS3, 3 .EQU T16_PHS_TXPHS2, 2 .EQU T16_PHS_TXPHS1, 1 .EQU T16_PHS_TXPHS0, 0 // register------------------------------------- .EQU T16_PPX, 0x40003388 // 0x4000 3388 T16_PPX Bits------------------------------------- .EQU T16_PPX_PPX31, 31 .EQU T16_PPX_PPX30, 30 .EQU T16_PPX_PPX29, 29 .EQU T16_PPX_PPX28, 28 .EQU T16_PPX_PPX27, 27 .EQU T16_PPX_PPX26, 26 .EQU T16_PPX_PPX25, 25 .EQU T16_PPX_PPX24, 24 .EQU T16_PPX_PPX23, 23 .EQU T16_PPX_PPX22, 22 .EQU T16_PPX_PPX21, 21 .EQU T16_PPX_PPX20, 20 .EQU T16_PPX_PPX19, 19 .EQU T16_PPX_PPX18, 18 .EQU T16_PPX_PPX17, 17 .EQU T16_PPX_PPX16, 16 .EQU T16_PPX_PPX15, 15 .EQU T16_PPX_PPX14, 14 .EQU T16_PPX_PPX13, 13 .EQU T16_PPX_PPX12, 12 .EQU T16_PPX_PPX11, 11 .EQU T16_PPX_PPX10, 10 .EQU T16_PPX_PPX9, 9 .EQU T16_PPX_PPX8, 8 .EQU T16_PPX_PPX7, 7 .EQU T16_PPX_PPX6, 6 .EQU T16_PPX_PPX5, 5 .EQU T16_PPX_PPX4, 4 .EQU T16_PPX_PPX3, 3 .EQU T16_PPX_PPX2, 2 .EQU T16_PPX_PPX1, 1 .EQU T16_PPX_PPX0, 0 // register------------------------------------- .EQU T16_PRSC, 0x4000338C // 0x4000 338C T16_PRSC Bits------------------------------------- .EQU T16_PRSC_TXPRSC31, 31 .EQU T16_PRSC_TXPRSC30, 30 .EQU T16_PRSC_TXPRSC29, 29 .EQU T16_PRSC_TXPRSC28, 28 .EQU T16_PRSC_TXPRSC27, 27 .EQU T16_PRSC_TXPRSC26, 26 .EQU T16_PRSC_TXPRSC25, 25 .EQU T16_PRSC_TXPRSC24, 24 .EQU T16_PRSC_TXPRSC23, 23 .EQU T16_PRSC_TXPRSC22, 22 .EQU T16_PRSC_TXPRSC21, 21 .EQU T16_PRSC_TXPRSC20, 20 .EQU T16_PRSC_TXPRSC19, 19 .EQU T16_PRSC_TXPRSC18, 18 .EQU T16_PRSC_TXPRSC17, 17 .EQU T16_PRSC_TXPRSC16, 16 .EQU T16_PRSC_TXPRSC15, 15 .EQU T16_PRSC_TXPRSC14, 14 .EQU T16_PRSC_TXPRSC13, 13 .EQU T16_PRSC_TXPRSC12, 12 .EQU T16_PRSC_TXPRSC11, 11 .EQU T16_PRSC_TXPRSC10, 10 .EQU T16_PRSC_TXPRSC9, 9 .EQU T16_PRSC_TXPRSC8, 8 .EQU T16_PRSC_TXPRSC7, 7 .EQU T16_PRSC_TXPRSC6, 6 .EQU T16_PRSC_TXPRSC5, 5 .EQU T16_PRSC_TXPRSC4, 4 .EQU T16_PRSC_TXPRSC3, 3 .EQU T16_PRSC_TXPRSC2, 2 .EQU T16_PRSC_TXPRSC1, 1 .EQU T16_PRSC_TXPRSC0, 0 // register------------------------------------- .EQU T16_CTL, 0x40003390 // 0x4000 3390 T16_CTL Bits------------------------------------- .EQU T16_CTL_BLINKEN, 31 .EQU T16_CTL_UDSYNEN, 29 .EQU T16_CTL_HRLOCK, 28 .EQU T16_CTL_ETLOCK, 27 .EQU T16_CTL_PCLOCK, 26 .EQU T16_CTL_DBLOCK, 25 .EQU T16_CTL_AQLOCKB, 24 .EQU T16_CTL_AQLOCKA, 23 .EQU T16_CTL_CAPEN, 22 .EQU T16_CTL_CAPSEL, 21 .EQU T16_CTL_TXMAX, 19 .EQU T16_CTL_PHSDIR, 18 .EQU T16_CTL_SWFSYNC, 17 .EQU T16_CTL_SYNCOSEL1, 16 .EQU T16_CTL_SYNCOSEL0, 15 .EQU T16_CTL_PHSEN, 14 .EQU T16_CTL_SYNCI, 13 .EQU T16_CTL_TXUR, 12 .EQU T16_CTL_TXUDEVT, 11 .EQU T16_CTL_TXUDEN, 10 .EQU T16_CTL_TXCMS2, 9 .EQU T16_CTL_TXCMS1, 8 .EQU T16_CTL_TXCMS0, 7 .EQU T16_CTL_TXDIR, 6 .EQU T16_CTL_TXCLK1, 5 .EQU T16_CTL_TXCLK0, 4 .EQU T16_CTL_TXSY, 3 .EQU T16_CTL_TXGATE, 2 .EQU T16_CTL_TXCS, 1 .EQU T16_CTL_TXEN, 0 // register------------------------------------- .EQU EPWM16_RA, 0x40003394 // 0x4000 3394 EPWM16_RA Bits------------------------------------- .EQU EPWM16_RA_EPWMRA31, 31 .EQU EPWM16_RA_EPWMRA30, 30 .EQU EPWM16_RA_EPWMRA29, 29 .EQU EPWM16_RA_EPWMRA28, 28 .EQU EPWM16_RA_EPWMRA27, 27 .EQU EPWM16_RA_EPWMRA26, 26 .EQU EPWM16_RA_EPWMRA25, 25 .EQU EPWM16_RA_EPWMRA24, 24 .EQU EPWM16_RA_EPWMRA23, 23 .EQU EPWM16_RA_EPWMRA22, 22 .EQU EPWM16_RA_EPWMRA21, 21 .EQU EPWM16_RA_EPWMRA20, 20 .EQU EPWM16_RA_EPWMRA19, 19 .EQU EPWM16_RA_EPWMRA18, 18 .EQU EPWM16_RA_EPWMRA17, 17 .EQU EPWM16_RA_EPWMRA16, 16 .EQU EPWM16_RA_EPWMRA15, 15 .EQU EPWM16_RA_EPWMRA14, 14 .EQU EPWM16_RA_EPWMRA13, 13 .EQU EPWM16_RA_EPWMRA12, 12 .EQU EPWM16_RA_EPWMRA11, 11 .EQU EPWM16_RA_EPWMRA10, 10 .EQU EPWM16_RA_EPWMRA9, 9 .EQU EPWM16_RA_EPWMRA8, 8 .EQU EPWM16_RA_EPWMRA7, 7 .EQU EPWM16_RA_EPWMRA6, 6 .EQU EPWM16_RA_EPWMRA5, 5 .EQU EPWM16_RA_EPWMRA4, 4 .EQU EPWM16_RA_EPWMRA3, 3 .EQU EPWM16_RA_EPWMRA2, 2 .EQU EPWM16_RA_EPWMRA1, 1 .EQU EPWM16_RA_EPWMRA0, 0 // register------------------------------------- .EQU EPWM16_RB, 0x40003398 // 0x4000 3398 EPWM16_RB Bits------------------------------------- .EQU EPWM16_RB_EPWMRB31, 31 .EQU EPWM16_RB_EPWMRB30, 30 .EQU EPWM16_RB_EPWMRB29, 29 .EQU EPWM16_RB_EPWMRB28, 28 .EQU EPWM16_RB_EPWMRB27, 27 .EQU EPWM16_RB_EPWMRB26, 26 .EQU EPWM16_RB_EPWMRB25, 25 .EQU EPWM16_RB_EPWMRB24, 24 .EQU EPWM16_RB_EPWMRB23, 23 .EQU EPWM16_RB_EPWMRB22, 22 .EQU EPWM16_RB_EPWMRB21, 21 .EQU EPWM16_RB_EPWMRB20, 20 .EQU EPWM16_RB_EPWMRB19, 19 .EQU EPWM16_RB_EPWMRB18, 18 .EQU EPWM16_RB_EPWMRB17, 17 .EQU EPWM16_RB_EPWMRB16, 16 .EQU EPWM16_RB_EPWMRB15, 15 .EQU EPWM16_RB_EPWMRB14, 14 .EQU EPWM16_RB_EPWMRB13, 13 .EQU EPWM16_RB_EPWMRB12, 12 .EQU EPWM16_RB_EPWMRB11, 11 .EQU EPWM16_RB_EPWMRB10, 10 .EQU EPWM16_RB_EPWMRB9, 9 .EQU EPWM16_RB_EPWMRB8, 8 .EQU EPWM16_RB_EPWMRB7, 7 .EQU EPWM16_RB_EPWMRB6, 6 .EQU EPWM16_RB_EPWMRB5, 5 .EQU EPWM16_RB_EPWMRB4, 4 .EQU EPWM16_RB_EPWMRB3, 3 .EQU EPWM16_RB_EPWMRB2, 2 .EQU EPWM16_RB_EPWMRB1, 1 .EQU EPWM16_RB_EPWMRB0, 0 // register------------------------------------- .EQU EPWM16_CTLA, 0x4000339C // 0x4000 339C EPWM16_CTLA Bits------------------------------------- .EQU EPWM16_CTLA_OTSFA, 16 .EQU EPWM16_CTLA_ACTSFA1, 15 .EQU EPWM16_CTLA_ACTSFA0, 14 .EQU EPWM16_CTLA_CSFA1, 13 .EQU EPWM16_CTLA_CSFA0, 12 .EQU EPWM16_CTLA_ACBD1, 11 .EQU EPWM16_CTLA_ACBD0, 10 .EQU EPWM16_CTLA_ACBU1, 9 .EQU EPWM16_CTLA_ACBU0, 8 .EQU EPWM16_CTLA_ACAD1, 7 .EQU EPWM16_CTLA_ACAD0, 6 .EQU EPWM16_CTLA_ACAU1, 5 .EQU EPWM16_CTLA_ACAU0, 4 .EQU EPWM16_CTLA_APRD1, 3 .EQU EPWM16_CTLA_APRD0, 2 .EQU EPWM16_CTLA_AZRO1, 1 .EQU EPWM16_CTLA_AZRO0, 0 // register------------------------------------- .EQU EPWM16_CTLB, 0x400033A0 // 0x4000 33A0 EPWM16_CTLB Bits------------------------------------- .EQU EPWM16_CTLB_OTSFB, 16 .EQU EPWM16_CTLB_ACTSFB1, 15 .EQU EPWM16_CTLB_ACTSFB0, 14 .EQU EPWM16_CTLB_CSFB1, 13 .EQU EPWM16_CTLB_CSFB0, 12 .EQU EPWM16_CTLB_BCBD1, 11 .EQU EPWM16_CTLB_BCBD0, 10 .EQU EPWM16_CTLB_BCBU1, 9 .EQU EPWM16_CTLB_BCBU0, 8 .EQU EPWM16_CTLB_BCAD1, 7 .EQU EPWM16_CTLB_BCAD0, 6 .EQU EPWM16_CTLB_BCAU1, 5 .EQU EPWM16_CTLB_BCAU0, 4 .EQU EPWM16_CTLB_BPRD1, 3 .EQU EPWM16_CTLB_BPRD0, 2 .EQU EPWM16_CTLB_BZRO1, 1 .EQU EPWM16_CTLB_BZRO0, 0 // register------------------------------------- .EQU EPWM16_DBCTL, 0x400033A4 // 0x4000 33A4 EPWM16_DBCTL Bits------------------------------------- .EQU EPWM16_DBCTL_INMODE1, 5 .EQU EPWM16_DBCTL_INMODE0, 4 .EQU EPWM16_DBCTL_POLSEL1, 3 .EQU EPWM16_DBCTL_POLSEL0, 2 .EQU EPWM16_DBCTL_OUTMODE1, 1 .EQU EPWM16_DBCTL_OUTMODE0, 0 // register------------------------------------- .EQU EPWM16_DBT, 0x400033A8 // 0x4000 33A8 EPWM16_DBT Bits------------------------------------- .EQU EPWM16_DBT_RDBT15, 31 .EQU EPWM16_DBT_RDBT14, 30 .EQU EPWM16_DBT_RDBT13, 29 .EQU EPWM16_DBT_RDBT12, 28 .EQU EPWM16_DBT_RDBT11, 27 .EQU EPWM16_DBT_RDBT10, 26 .EQU EPWM16_DBT_RDBT9, 25 .EQU EPWM16_DBT_RDBT8, 24 .EQU EPWM16_DBT_RDBT7, 23 .EQU EPWM16_DBT_RDBT6, 22 .EQU EPWM16_DBT_RDBT5, 21 .EQU EPWM16_DBT_RDBT4, 20 .EQU EPWM16_DBT_RDBT3, 19 .EQU EPWM16_DBT_RDBT2, 18 .EQU EPWM16_DBT_RDBT1, 17 .EQU EPWM16_DBT_RDBT0, 16 .EQU EPWM16_DBT_FDBT15, 15 .EQU EPWM16_DBT_FDBT14, 14 .EQU EPWM16_DBT_FDBT13, 13 .EQU EPWM16_DBT_FDBT12, 12 .EQU EPWM16_DBT_FDBT11, 11 .EQU EPWM16_DBT_FDBT10, 10 .EQU EPWM16_DBT_FDBT9, 9 .EQU EPWM16_DBT_FDBT8, 8 .EQU EPWM16_DBT_FDBT7, 7 .EQU EPWM16_DBT_FDBT6, 6 .EQU EPWM16_DBT_FDBT5, 5 .EQU EPWM16_DBT_FDBT4, 4 .EQU EPWM16_DBT_FDBT3, 3 .EQU EPWM16_DBT_FDBT2, 2 .EQU EPWM16_DBT_FDBT1, 1 .EQU EPWM16_DBT_FDBT0, 0 // register------------------------------------- .EQU EPWM16_PCCTL, 0x400033AC // 0x4000 33AC EPWM16_PCCTL Bits------------------------------------- .EQU EPWM16_PCCTL_CHPFREQ2, 10 .EQU EPWM16_PCCTL_CHPFREQ1, 9 .EQU EPWM16_PCCTL_CHPFREQ0, 8 .EQU EPWM16_PCCTL_CHPDUTY2, 7 .EQU EPWM16_PCCTL_CHPDUTY1, 6 .EQU EPWM16_PCCTL_CHPDUTY0, 5 .EQU EPWM16_PCCTL_OSHTWTH3, 4 .EQU EPWM16_PCCTL_OSHTWTH2, 3 .EQU EPWM16_PCCTL_OSHTWTH1, 2 .EQU EPWM16_PCCTL_OSHTWTH0, 1 .EQU EPWM16_PCCTL_CHPEN, 0 // register------------------------------------- .EQU EPWM16_PXASCTL, 0x400033B0 // 0x4000 33B0 EPWM16_PXASCTL Bits------------------------------------- .EQU EPWM16_PXASCTL_PXRSEN, 8 .EQU EPWM16_PXASCTL_PXSSA1, 7 .EQU EPWM16_PXASCTL_PXSSA0, 6 .EQU EPWM16_PXASCTL_PXSSB1, 5 .EQU EPWM16_PXASCTL_PXSSB0, 4 .EQU EPWM16_PXASCTL_PXASE, 3 .EQU EPWM16_PXASCTL_PXASS2, 2 .EQU EPWM16_PXASCTL_PXASS1, 1 .EQU EPWM16_PXASCTL_PXASS0, 0 // register------------------------------------- .EQU EPWM16_ETCTL, 0x400033B4 // 0x4000 33B4 EPWM16_ETCTL Bits------------------------------------- .EQU EPWM16_ETCTL_BTSEL1, 25 .EQU EPWM16_ETCTL_BTSEL0, 24 .EQU EPWM16_ETCTL_FRCB, 19 .EQU EPWM16_ETCTL_TOADENB, 16 .EQU EPWM16_ETCTL_ATSEL1, 9 .EQU EPWM16_ETCTL_ATSEL0, 8 .EQU EPWM16_ETCTL_FRCA, 3 .EQU EPWM16_ETCTL_TOADENA, 0 // register------------------------------------- .EQU EPWM16_IE, 0x400033B8 // 0x4000 33B8 EPWM16_IE Bits------------------------------------- .EQU EPWM16_IE_CAPIE, 9 .EQU EPWM16_IE_TXDIE, 8 .EQU EPWM16_IE_TXCIE, 7 .EQU EPWM16_IE_TXAIE, 6 .EQU EPWM16_IE_TXBIE, 5 .EQU EPWM16_IE_TXIE, 4 .EQU EPWM16_IE_TXUIE, 3 .EQU EPWM16_IE_TXGIE, 2 .EQU EPWM16_IE_TXTIE1, 1 .EQU EPWM16_IE_TXTIE0, 0 // register------------------------------------- .EQU EPWM16_IF, 0x400033BC // 0x4000 33BC EPWM16_IF Bits------------------------------------- .EQU EPWM16_IF_CAPIF, 9 .EQU EPWM16_IF_TXDIF, 8 .EQU EPWM16_IF_TXCIF, 7 .EQU EPWM16_IF_TXAIF, 6 .EQU EPWM16_IF_TXBIF, 5 .EQU EPWM16_IF_TXIF, 4 .EQU EPWM16_IF_TXUIF, 3 .EQU EPWM16_IF_TXGIF, 2 .EQU EPWM16_IF_TXTIF1, 1 .EQU EPWM16_IF_TXTIF0, 0 // register------------------------------------- .EQU EPWM16_IC, 0x400033C0 // 0x4000 33C0 EPWM16_IC Bits------------------------------------- .EQU EPWM16_IC_CAPIC1, 10 .EQU EPWM16_IC_CAPIC0, 9 .EQU EPWM16_IC_TXDIC, 8 .EQU EPWM16_IC_TXCIC, 7 .EQU EPWM16_IC_TXAIC, 6 .EQU EPWM16_IC_TXBIC, 5 .EQU EPWM16_IC_TXIC, 4 .EQU EPWM16_IC_TXUIC, 3 .EQU EPWM16_IC_TXGIC, 2 .EQU EPWM16_IC_TXTIC1, 1 .EQU EPWM16_IC_TXTIC0, 0 // register------------------------------------- .EQU EPWM16_DE, 0x400033C4 // 0x4000 33C4 EPWM16_DE Bits------------------------------------- .EQU EPWM16_DE_TXDDE, 8 .EQU EPWM16_DE_TXCDE, 7 .EQU EPWM16_DE_TXADE, 6 .EQU EPWM16_DE_TXBDE, 5 .EQU EPWM16_DE_TXDE, 4 .EQU EPWM16_DE_TXUDE, 3 .EQU EPWM16_DE_TXGDE, 2 .EQU EPWM16_DE_TXTDE1, 1 .EQU EPWM16_DE_TXTDE0, 0 // register------------------------------------- .EQU EPWM16_DF, 0x400033C8 // 0x4000 33C8 EPWM16_DF Bits------------------------------------- .EQU EPWM16_DF_TXDDF, 8 .EQU EPWM16_DF_TXCDF, 7 .EQU EPWM16_DF_TXADF, 6 .EQU EPWM16_DF_TXBDF, 5 .EQU EPWM16_DF_TXDF, 4 .EQU EPWM16_DF_TXUDF, 3 .EQU EPWM16_DF_TXGDF, 2 .EQU EPWM16_DF_TXTDF1, 1 .EQU EPWM16_DF_TXTDF0, 0 // register------------------------------------- .EQU EPWM16_HRPWMCTLA, 0x400033D0 // 0x4000 33D0 EPWM16_HRPWMCTLA Bits------------------------------------- .EQU EPWM16_HRPWMCTLA_HRPHSENA, 6 .EQU EPWM16_HRPWMCTLA_HRFENA, 5 .EQU EPWM16_HRPWMCTLA_HRRENA, 4 .EQU EPWM16_HRPWMCTLA_HRPENA, 3 .EQU EPWM16_HRPWMCTLA_HRDENA, 2 .EQU EPWM16_HRPWMCTLA_HRSELA, 1 .EQU EPWM16_HRPWMCTLA_HRENA, 0 // register------------------------------------- .EQU EPWM16_HRCMPA, 0x400033D4 // 0x4000 33D4 EPWM16_HRCMPA Bits------------------------------------- .EQU EPWM16_HRCMPA_HRCMPA7, 7 .EQU EPWM16_HRCMPA_HRCMPA6, 6 .EQU EPWM16_HRCMPA_HRCMPA5, 5 .EQU EPWM16_HRCMPA_HRCMPA4, 4 .EQU EPWM16_HRCMPA_HRCMPA3, 3 .EQU EPWM16_HRCMPA_HRCMPA2, 2 .EQU EPWM16_HRCMPA_HRCMPA1, 1 .EQU EPWM16_HRCMPA_HRCMPA0, 0 // register------------------------------------- .EQU EPWM16_CAP, 0x400033D8 // 0x4000 33D8 EPWM16_CAP Bits------------------------------------- .EQU EPWM16_CAP_CAP31, 31 .EQU EPWM16_CAP_CAP30, 30 .EQU EPWM16_CAP_CAP29, 29 .EQU EPWM16_CAP_CAP28, 28 .EQU EPWM16_CAP_CAP27, 27 .EQU EPWM16_CAP_CAP26, 26 .EQU EPWM16_CAP_CAP25, 25 .EQU EPWM16_CAP_CAP24, 24 .EQU EPWM16_CAP_CAP23, 23 .EQU EPWM16_CAP_CAP22, 22 .EQU EPWM16_CAP_CAP21, 21 .EQU EPWM16_CAP_CAP20, 20 .EQU EPWM16_CAP_CAP19, 19 .EQU EPWM16_CAP_CAP18, 18 .EQU EPWM16_CAP_CAP17, 17 .EQU EPWM16_CAP_CAP16, 16 .EQU EPWM16_CAP_CAP15, 15 .EQU EPWM16_CAP_CAP14, 14 .EQU EPWM16_CAP_CAP13, 13 .EQU EPWM16_CAP_CAP12, 12 .EQU EPWM16_CAP_CAP11, 11 .EQU EPWM16_CAP_CAP10, 10 .EQU EPWM16_CAP_CAP9, 9 .EQU EPWM16_CAP_CAP8, 8 .EQU EPWM16_CAP_CAP7, 7 .EQU EPWM16_CAP_CAP6, 6 .EQU EPWM16_CAP_CAP5, 5 .EQU EPWM16_CAP_CAP4, 4 .EQU EPWM16_CAP_CAP3, 3 .EQU EPWM16_CAP_CAP2, 2 .EQU EPWM16_CAP_CAP1, 1 .EQU EPWM16_CAP_CAP0, 0 // register------------------------------------- .EQU EPWM16_RC, 0x400033DC // 0x4000 33DC EPWM16_RC Bits------------------------------------- .EQU EPWM16_RC_EPWMRC31, 31 .EQU EPWM16_RC_EPWMRC30, 30 .EQU EPWM16_RC_EPWMRC29, 29 .EQU EPWM16_RC_EPWMRC28, 28 .EQU EPWM16_RC_EPWMRC27, 27 .EQU EPWM16_RC_EPWMRC26, 26 .EQU EPWM16_RC_EPWMRC25, 25 .EQU EPWM16_RC_EPWMRC24, 24 .EQU EPWM16_RC_EPWMRC23, 23 .EQU EPWM16_RC_EPWMRC22, 22 .EQU EPWM16_RC_EPWMRC21, 21 .EQU EPWM16_RC_EPWMRC20, 20 .EQU EPWM16_RC_EPWMRC19, 19 .EQU EPWM16_RC_EPWMRC18, 18 .EQU EPWM16_RC_EPWMRC17, 17 .EQU EPWM16_RC_EPWMRC16, 16 .EQU EPWM16_RC_EPWMRC15, 15 .EQU EPWM16_RC_EPWMRC14, 14 .EQU EPWM16_RC_EPWMRC13, 13 .EQU EPWM16_RC_EPWMRC12, 12 .EQU EPWM16_RC_EPWMRC11, 11 .EQU EPWM16_RC_EPWMRC10, 10 .EQU EPWM16_RC_EPWMRC9, 9 .EQU EPWM16_RC_EPWMRC8, 8 .EQU EPWM16_RC_EPWMRC7, 7 .EQU EPWM16_RC_EPWMRC6, 6 .EQU EPWM16_RC_EPWMRC5, 5 .EQU EPWM16_RC_EPWMRC4, 4 .EQU EPWM16_RC_EPWMRC3, 3 .EQU EPWM16_RC_EPWMRC2, 2 .EQU EPWM16_RC_EPWMRC1, 1 .EQU EPWM16_RC_EPWMRC0, 0 // register------------------------------------- .EQU EPWM16_RD, 0x400033E0 // 0x4000 33E0 EPWM16_RD Bits------------------------------------- .EQU EPWM16_RD_EPWMRD31, 31 .EQU EPWM16_RD_EPWMRD30, 30 .EQU EPWM16_RD_EPWMRD29, 29 .EQU EPWM16_RD_EPWMRD28, 28 .EQU EPWM16_RD_EPWMRD27, 27 .EQU EPWM16_RD_EPWMRD26, 26 .EQU EPWM16_RD_EPWMRD25, 25 .EQU EPWM16_RD_EPWMRD24, 24 .EQU EPWM16_RD_EPWMRD23, 23 .EQU EPWM16_RD_EPWMRD22, 22 .EQU EPWM16_RD_EPWMRD21, 21 .EQU EPWM16_RD_EPWMRD20, 20 .EQU EPWM16_RD_EPWMRD19, 19 .EQU EPWM16_RD_EPWMRD18, 18 .EQU EPWM16_RD_EPWMRD17, 17 .EQU EPWM16_RD_EPWMRD16, 16 .EQU EPWM16_RD_EPWMRD15, 15 .EQU EPWM16_RD_EPWMRD14, 14 .EQU EPWM16_RD_EPWMRD13, 13 .EQU EPWM16_RD_EPWMRD12, 12 .EQU EPWM16_RD_EPWMRD11, 11 .EQU EPWM16_RD_EPWMRD10, 10 .EQU EPWM16_RD_EPWMRD9, 9 .EQU EPWM16_RD_EPWMRD8, 8 .EQU EPWM16_RD_EPWMRD7, 7 .EQU EPWM16_RD_EPWMRD6, 6 .EQU EPWM16_RD_EPWMRD5, 5 .EQU EPWM16_RD_EPWMRD4, 4 .EQU EPWM16_RD_EPWMRD3, 3 .EQU EPWM16_RD_EPWMRD2, 2 .EQU EPWM16_RD_EPWMRD1, 1 .EQU EPWM16_RD_EPWMRD0, 0 // register------------------------------------- .EQU EPWM16_UDCTL, 0x400033E4 // 0x4000 33E4 EPWM16_UDCTL Bits------------------------------------- .EQU EPWM16_UDCTL_GBUDEN, 27 .EQU EPWM16_UDCTL_HRPUDSEL1, 26 .EQU EPWM16_UDCTL_HRPUDSEL0, 25 .EQU EPWM16_UDCTL_HRPUDEN, 24 .EQU EPWM16_UDCTL_EBUDSEL1, 23 .EQU EPWM16_UDCTL_EBUDSEL0, 22 .EQU EPWM16_UDCTL_EBUDEN, 21 .EQU EPWM16_UDCTL_EAUDSEL1, 20 .EQU EPWM16_UDCTL_EAUDSEL0, 19 .EQU EPWM16_UDCTL_EAUDEN, 18 .EQU EPWM16_UDCTL_CMDUDSEL1, 17 .EQU EPWM16_UDCTL_CMDUDSEL0, 16 .EQU EPWM16_UDCTL_CMDUDEN, 15 .EQU EPWM16_UDCTL_CMCUDSEL1, 14 .EQU EPWM16_UDCTL_CMCUDSEL0, 13 .EQU EPWM16_UDCTL_CMCUDEN, 12 .EQU EPWM16_UDCTL_CMBUDSEL1, 11 .EQU EPWM16_UDCTL_CMBUDSEL0, 10 .EQU EPWM16_UDCTL_CMBUDEN, 9 .EQU EPWM16_UDCTL_CMAUDSEL1, 8 .EQU EPWM16_UDCTL_CMAUDSEL0, 7 .EQU EPWM16_UDCTL_CMAUDEN, 6 .EQU EPWM16_UDCTL_PRUDSEL1, 5 .EQU EPWM16_UDCTL_PRUDSEL0, 4 .EQU EPWM16_UDCTL_PRUDEN, 3 .EQU EPWM16_UDCTL_PPUDSEL1, 2 .EQU EPWM16_UDCTL_PPUDSEL0, 1 .EQU EPWM16_UDCTL_PPUDEN, 0 // register------------------------------------- .EQU EPWM16_SRT, 0x400033E8 // 0x4000 33E8 EPWM16_SRT Bits------------------------------------- .EQU EPWM16_SRT_T31, 31 .EQU EPWM16_SRT_T30, 30 .EQU EPWM16_SRT_T29, 29 .EQU EPWM16_SRT_T28, 28 .EQU EPWM16_SRT_T27, 27 .EQU EPWM16_SRT_T26, 26 .EQU EPWM16_SRT_T25, 25 .EQU EPWM16_SRT_T24, 24 .EQU EPWM16_SRT_T23, 23 .EQU EPWM16_SRT_T22, 22 .EQU EPWM16_SRT_T21, 21 .EQU EPWM16_SRT_T20, 20 .EQU EPWM16_SRT_T19, 19 .EQU EPWM16_SRT_T18, 18 .EQU EPWM16_SRT_T17, 17 .EQU EPWM16_SRT_T16, 16 .EQU EPWM16_SRT_T15, 15 .EQU EPWM16_SRT_T14, 14 .EQU EPWM16_SRT_T13, 13 .EQU EPWM16_SRT_T12, 12 .EQU EPWM16_SRT_T11, 11 .EQU EPWM16_SRT_T10, 10 .EQU EPWM16_SRT_T9, 9 .EQU EPWM16_SRT_T8, 8 .EQU EPWM16_SRT_T7, 7 .EQU EPWM16_SRT_T6, 6 .EQU EPWM16_SRT_T5, 5 .EQU EPWM16_SRT_T4, 4 .EQU EPWM16_SRT_T3, 3 .EQU EPWM16_SRT_T2, 2 .EQU EPWM16_SRT_T1, 1 .EQU EPWM16_SRT_T0, 0 // register------------------------------------- .EQU EPWM16_HRPWMCTLB, 0x400033EC // 0x4000 33EC EPWM16_HRPWMCTLB Bits------------------------------------- .EQU EPWM16_HRPWMCTLB_HRPHSENB, 6 .EQU EPWM16_HRPWMCTLB_HRFENB, 5 .EQU EPWM16_HRPWMCTLB_HRRENB, 4 .EQU EPWM16_HRPWMCTLB_HRPENB, 3 .EQU EPWM16_HRPWMCTLB_HRDENB, 2 .EQU EPWM16_HRPWMCTLB_HRSELB, 1 .EQU EPWM16_HRPWMCTLB_HRENB, 0 // register------------------------------------- .EQU EPWM16_HRCMPB, 0x400033F0 // 0x4000 33F0 EPWM16_HRCMPB Bits------------------------------------- .EQU EPWM16_HRCMPB_HRCMPB7, 7 .EQU EPWM16_HRCMPB_HRCMPB6, 6 .EQU EPWM16_HRCMPB_HRCMPB5, 5 .EQU EPWM16_HRCMPB_HRCMPB4, 4 .EQU EPWM16_HRCMPB_HRCMPB3, 3 .EQU EPWM16_HRCMPB_HRCMPB2, 2 .EQU EPWM16_HRCMPB_HRCMPB1, 1 .EQU EPWM16_HRCMPB_HRCMPB0, 0 // register------------------------------------- .EQU EPWM16_HRDB, 0x400033F4 // 0x4000 33F4 EPWM16_HRDB Bits------------------------------------- .EQU EPWM16_HRDB_HRR7, 15 .EQU EPWM16_HRDB_HRR6, 14 .EQU EPWM16_HRDB_HRR5, 13 .EQU EPWM16_HRDB_HRR4, 12 .EQU EPWM16_HRDB_HRR3, 11 .EQU EPWM16_HRDB_HRR2, 10 .EQU EPWM16_HRDB_HRR1, 9 .EQU EPWM16_HRDB_HRR0, 8 .EQU EPWM16_HRDB_HRF7, 7 .EQU EPWM16_HRDB_HRF6, 6 .EQU EPWM16_HRDB_HRF5, 5 .EQU EPWM16_HRDB_HRF4, 4 .EQU EPWM16_HRDB_HRF3, 3 .EQU EPWM16_HRDB_HRF2, 2 .EQU EPWM16_HRDB_HRF1, 1 .EQU EPWM16_HRDB_HRF0, 0 // register------------------------------------- .EQU EPWM16_HRPHS, 0x400033F8 // 0x4000 33F8 EPWM16_HRPHS Bits------------------------------------- .EQU EPWM16_HRPHS_HRPRE7, 15 .EQU EPWM16_HRPHS_HRPRE6, 14 .EQU EPWM16_HRPHS_HRPRE5, 13 .EQU EPWM16_HRPHS_HRPRE4, 12 .EQU EPWM16_HRPHS_HRPRE3, 11 .EQU EPWM16_HRPHS_HRPRE2, 10 .EQU EPWM16_HRPHS_HRPRE1, 9 .EQU EPWM16_HRPHS_HRPRE0, 8 .EQU EPWM16_HRPHS_HRPHS7, 7 .EQU EPWM16_HRPHS_HRPHS6, 6 .EQU EPWM16_HRPHS_HRPHS5, 5 .EQU EPWM16_HRPHS_HRPHS4, 4 .EQU EPWM16_HRPHS_HRPHS3, 3 .EQU EPWM16_HRPHS_HRPHS2, 2 .EQU EPWM16_HRPHS_HRPHS1, 1 .EQU EPWM16_HRPHS_HRPHS0, 0 // register------------------------------------- .EQU EPWM16_HRCFG, 0x400033FC // 0x4000 33FC EPWM16_HRCFG Bits------------------------------------- .EQU EPWM16_HRCFG_STEP7, 15 .EQU EPWM16_HRCFG_STEP6, 14 .EQU EPWM16_HRCFG_STEP5, 13 .EQU EPWM16_HRCFG_STEP4, 12 .EQU EPWM16_HRCFG_STEP3, 11 .EQU EPWM16_HRCFG_STEP2, 10 .EQU EPWM16_HRCFG_STEP1, 9 .EQU EPWM16_HRCFG_STEP0, 8 .EQU EPWM16_HRCFG_TIMS7, 7 .EQU EPWM16_HRCFG_TIMS6, 6 .EQU EPWM16_HRCFG_TIMS5, 5 .EQU EPWM16_HRCFG_TIMS4, 4 .EQU EPWM16_HRCFG_TIMS3, 3 .EQU EPWM16_HRCFG_TIMS2, 2 .EQU EPWM16_HRCFG_TIMS1, 1 .EQU EPWM16_HRCFG_TIMS0, 0 // register------------------------------------- .EQU EPWM16_HRDELAY, 0x40003400 // 0x4000 3400 EPWM16_HRDELAY Bits------------------------------------- .EQU EPWM16_HRDELAY_REDBHR7, 31 .EQU EPWM16_HRDELAY_REDBHR6, 30 .EQU EPWM16_HRDELAY_REDBHR5, 29 .EQU EPWM16_HRDELAY_REDBHR4, 28 .EQU EPWM16_HRDELAY_REDBHR3, 27 .EQU EPWM16_HRDELAY_REDBHR2, 26 .EQU EPWM16_HRDELAY_REDBHR1, 25 .EQU EPWM16_HRDELAY_REDBHR0, 24 .EQU EPWM16_HRDELAY_FEDBHR7, 23 .EQU EPWM16_HRDELAY_FEDBHR6, 22 .EQU EPWM16_HRDELAY_FEDBHR5, 21 .EQU EPWM16_HRDELAY_FEDBHR4, 20 .EQU EPWM16_HRDELAY_FEDBHR3, 19 .EQU EPWM16_HRDELAY_FEDBHR2, 18 .EQU EPWM16_HRDELAY_FEDBHR1, 17 .EQU EPWM16_HRDELAY_FEDBHR0, 16 .EQU EPWM16_HRDELAY_REDAHR7, 15 .EQU EPWM16_HRDELAY_REDAHR6, 14 .EQU EPWM16_HRDELAY_REDAHR5, 13 .EQU EPWM16_HRDELAY_REDAHR4, 12 .EQU EPWM16_HRDELAY_REDAHR3, 11 .EQU EPWM16_HRDELAY_REDAHR2, 10 .EQU EPWM16_HRDELAY_REDAHR1, 9 .EQU EPWM16_HRDELAY_REDAHR0, 8 .EQU EPWM16_HRDELAY_FEDAHR7, 7 .EQU EPWM16_HRDELAY_FEDAHR6, 6 .EQU EPWM16_HRDELAY_FEDAHR5, 5 .EQU EPWM16_HRDELAY_FEDAHR4, 4 .EQU EPWM16_HRDELAY_FEDAHR3, 3 .EQU EPWM16_HRDELAY_FEDAHR2, 2 .EQU EPWM16_HRDELAY_FEDAHR1, 1 .EQU EPWM16_HRDELAY_FEDAHR0, 0 // register------------------------------------- .EQU T16_CTL2, 0x40003404 // 0x4000 3404 T16_CTL2 Bits------------------------------------- .EQU T16_CTL2_LPHSEN, 24 .EQU T16_CTL2_CAPMOD, 23 .EQU T16_CTL2_CAPUF, 22 .EQU T16_CTL2_HRCFGUF, 21 .EQU T16_CTL2_HRPHSUF, 20 .EQU T16_CTL2_HRDBUF, 19 .EQU T16_CTL2_DBTUF, 18 .EQU T16_CTL2_HRPBUF, 17 .EQU T16_CTL2_HRPAUF, 16 .EQU T16_CTL2_EBFUF, 15 .EQU T16_CTL2_EAFUF, 14 .EQU T16_CTL2_PRFUF, 13 .EQU T16_CTL2_PPFUF, 12 .EQU T16_CTL2_CMDFUF, 11 .EQU T16_CTL2_CMCFUF, 10 .EQU T16_CTL2_CMBFUF, 9 .EQU T16_CTL2_CMAFUF, 8 .EQU T16_CTL2_TRGIOS, 7 .EQU T16_CTL2_SYNCIOS, 6 .EQU T16_CTL2_DUDBSEL, 5 .EQU T16_CTL2_DUDBEN, 4 .EQU T16_CTL2_BWINDTSEL, 3 .EQU T16_CTL2_BWINDPOL, 2 .EQU T16_CTL2_BWINDEN, 1 .EQU T16_CTL2_SWCLRPF, 0 // register------------------------------------- .EQU EPWM16_BWCFG, 0x40003408 // 0x4000 3408 EPWM16_BWCFG Bits------------------------------------- .EQU EPWM16_BWCFG_BWOFFSET15, 31 .EQU EPWM16_BWCFG_BWOFFSET14, 30 .EQU EPWM16_BWCFG_BWOFFSET13, 29 .EQU EPWM16_BWCFG_BWOFFSET12, 28 .EQU EPWM16_BWCFG_BWOFFSET11, 27 .EQU EPWM16_BWCFG_BWOFFSET10, 26 .EQU EPWM16_BWCFG_BWOFFSET9, 25 .EQU EPWM16_BWCFG_BWOFFSET8, 24 .EQU EPWM16_BWCFG_BWOFFSET7, 23 .EQU EPWM16_BWCFG_BWOFFSET6, 22 .EQU EPWM16_BWCFG_BWOFFSET5, 21 .EQU EPWM16_BWCFG_BWOFFSET4, 20 .EQU EPWM16_BWCFG_BWOFFSET3, 19 .EQU EPWM16_BWCFG_BWOFFSET2, 18 .EQU EPWM16_BWCFG_BWOFFSET1, 17 .EQU EPWM16_BWCFG_BWOFFSET0, 16 .EQU EPWM16_BWCFG_BWIDTH15, 15 .EQU EPWM16_BWCFG_BWIDTH14, 14 .EQU EPWM16_BWCFG_BWIDTH13, 13 .EQU EPWM16_BWCFG_BWIDTH12, 12 .EQU EPWM16_BWCFG_BWIDTH11, 11 .EQU EPWM16_BWCFG_BWIDTH10, 10 .EQU EPWM16_BWCFG_BWIDTH9, 9 .EQU EPWM16_BWCFG_BWIDTH8, 8 .EQU EPWM16_BWCFG_BWIDTH7, 7 .EQU EPWM16_BWCFG_BWIDTH6, 6 .EQU EPWM16_BWCFG_BWIDTH5, 5 .EQU EPWM16_BWCFG_BWIDTH4, 4 .EQU EPWM16_BWCFG_BWIDTH3, 3 .EQU EPWM16_BWCFG_BWIDTH2, 2 .EQU EPWM16_BWCFG_BWIDTH1, 1 .EQU EPWM16_BWCFG_BWIDTH0, 0 // register------------------------------------- .EQU EPWM16_BWCNT, 0x4000340C // 0x4000 340C EPWM16_BWCNT Bits------------------------------------- .EQU EPWM16_BWCNT_WITCNT15, 31 .EQU EPWM16_BWCNT_WITCNT14, 30 .EQU EPWM16_BWCNT_WITCNT13, 29 .EQU EPWM16_BWCNT_WITCNT12, 28 .EQU EPWM16_BWCNT_WITCNT11, 27 .EQU EPWM16_BWCNT_WITCNT10, 26 .EQU EPWM16_BWCNT_WITCNT9, 25 .EQU EPWM16_BWCNT_WITCNT8, 24 .EQU EPWM16_BWCNT_WITCNT7, 23 .EQU EPWM16_BWCNT_WITCNT6, 22 .EQU EPWM16_BWCNT_WITCNT5, 21 .EQU EPWM16_BWCNT_WITCNT4, 20 .EQU EPWM16_BWCNT_WITCNT3, 19 .EQU EPWM16_BWCNT_WITCNT2, 18 .EQU EPWM16_BWCNT_WITCNT1, 17 .EQU EPWM16_BWCNT_WITCNT0, 16 .EQU EPWM16_BWCNT_OFFCNT15, 15 .EQU EPWM16_BWCNT_OFFCNT14, 14 .EQU EPWM16_BWCNT_OFFCNT13, 13 .EQU EPWM16_BWCNT_OFFCNT12, 12 .EQU EPWM16_BWCNT_OFFCNT11, 11 .EQU EPWM16_BWCNT_OFFCNT10, 10 .EQU EPWM16_BWCNT_OFFCNT9, 9 .EQU EPWM16_BWCNT_OFFCNT8, 8 .EQU EPWM16_BWCNT_OFFCNT7, 7 .EQU EPWM16_BWCNT_OFFCNT6, 6 .EQU EPWM16_BWCNT_OFFCNT5, 5 .EQU EPWM16_BWCNT_OFFCNT4, 4 .EQU EPWM16_BWCNT_OFFCNT3, 3 .EQU EPWM16_BWCNT_OFFCNT2, 2 .EQU EPWM16_BWCNT_OFFCNT1, 1 .EQU EPWM16_BWCNT_OFFCNT0, 0 // register------------------------------------- .EQU EPWM16_ETCTL2, 0x40003410 // 0x4000 3410 EPWM16_ETCTL2 Bits------------------------------------- .EQU EPWM16_ETCTL2_BT3, 26 .EQU EPWM16_ETCTL2_BT2, 25 .EQU EPWM16_ETCTL2_BT1, 24 .EQU EPWM16_ETCTL2_BT0, 23 .EQU EPWM16_ETCTL2_BPP3, 22 .EQU EPWM16_ETCTL2_BPP2, 21 .EQU EPWM16_ETCTL2_BPP1, 20 .EQU EPWM16_ETCTL2_BPP0, 19 .EQU EPWM16_ETCTL2_SELB2, 18 .EQU EPWM16_ETCTL2_SELB1, 17 .EQU EPWM16_ETCTL2_SELB0, 16 .EQU EPWM16_ETCTL2_AT3, 10 .EQU EPWM16_ETCTL2_AT2, 9 .EQU EPWM16_ETCTL2_AT1, 8 .EQU EPWM16_ETCTL2_AT0, 7 .EQU EPWM16_ETCTL2_APP3, 6 .EQU EPWM16_ETCTL2_APP2, 5 .EQU EPWM16_ETCTL2_APP1, 4 .EQU EPWM16_ETCTL2_APP0, 3 .EQU EPWM16_ETCTL2_SELA2, 2 .EQU EPWM16_ETCTL2_SELA1, 1 .EQU EPWM16_ETCTL2_SELA0, 0 // register------------------------------------- .EQU EPWM16_GLDCTL, 0x40003414 // 0x4000 3414 EPWM16_GLDCTL Bits------------------------------------- .EQU EPWM16_GLDCTL_HRCFGUDSEL1, 22 .EQU EPWM16_GLDCTL_HRCFGUDSEL0, 21 .EQU EPWM16_GLDCTL_HRCFGUDEN, 20 .EQU EPWM16_GLDCTL_HRPHSUDSEL1, 19 .EQU EPWM16_GLDCTL_HRPHSUDSEL0, 18 .EQU EPWM16_GLDCTL_HRPHSUDEN, 17 .EQU EPWM16_GLDCTL_HRDBUDSEL1, 16 .EQU EPWM16_GLDCTL_HRDBUDSEL0, 15 .EQU EPWM16_GLDCTL_HRDBUDEN, 14 .EQU EPWM16_GLDCTL_DBUDSEL1, 13 .EQU EPWM16_GLDCTL_DBUDSEL0, 12 .EQU EPWM16_GLDCTL_DBUDEN, 11 .EQU EPWM16_GLDCTL_HRPBUDSEL1, 10 .EQU EPWM16_GLDCTL_HRPBUDSEL0, 9 .EQU EPWM16_GLDCTL_HRPBUDEN, 8 .EQU EPWM16_GLDCTL_CLDPRCS7, 7 .EQU EPWM16_GLDCTL_CLDPRCS6, 6 .EQU EPWM16_GLDCTL_CLDPRCS5, 5 .EQU EPWM16_GLDCTL_CLDPRCS4, 4 .EQU EPWM16_GLDCTL_CLDPRCS3, 3 .EQU EPWM16_GLDCTL_CLDPRCS2, 2 .EQU EPWM16_GLDCTL_CLDPRCS1, 1 .EQU EPWM16_GLDCTL_CLDPRCS0, 0 // register------------------------------------- .EQU EPWM16_FILTCTL, 0x40003418 // 0x4000 3418 EPWM16_FILTCTL Bits------------------------------------- .EQU EPWM16_FILTCTL_SYDELAY2, 23 .EQU EPWM16_FILTCTL_SYDELAY1, 22 .EQU EPWM16_FILTCTL_SYDELAY0, 21 .EQU EPWM16_FILTCTL_SYFDIV3, 20 .EQU EPWM16_FILTCTL_SYFDIV2, 19 .EQU EPWM16_FILTCTL_SYFDIV1, 18 .EQU EPWM16_FILTCTL_SYFDIV0, 17 .EQU EPWM16_FILTCTL_SYNCFEN, 16 .EQU EPWM16_FILTCTL_TCKDELAY2, 15 .EQU EPWM16_FILTCTL_TCKDELAY1, 14 .EQU EPWM16_FILTCTL_TCKDELAY0, 13 .EQU EPWM16_FILTCTL_TCKFDIV3, 12 .EQU EPWM16_FILTCTL_TCKFDIV2, 11 .EQU EPWM16_FILTCTL_TCKFDIV1, 10 .EQU EPWM16_FILTCTL_TCKFDIV0, 9 .EQU EPWM16_FILTCTL_TXCKFEN, 8 .EQU EPWM16_FILTCTL_CFDELAY2, 7 .EQU EPWM16_FILTCTL_CFDELAY1, 6 .EQU EPWM16_FILTCTL_CFDELAY0, 5 .EQU EPWM16_FILTCTL_CFDIV3, 4 .EQU EPWM16_FILTCTL_CFDIV2, 3 .EQU EPWM16_FILTCTL_CFDIV1, 2 .EQU EPWM16_FILTCTL_CFDIV0, 1 .EQU EPWM16_FILTCTL_CAPFEN, 0 // register------------------------------------- .EQU T5_CNT, 0x40003480 // 0x4000 3480 T5_CNT Bits------------------------------------- .EQU T5_CNT_TXCNT15, 15 .EQU T5_CNT_TXCNT14, 14 .EQU T5_CNT_TXCNT13, 13 .EQU T5_CNT_TXCNT12, 12 .EQU T5_CNT_TXCNT11, 11 .EQU T5_CNT_TXCNT10, 10 .EQU T5_CNT_TXCNT9, 9 .EQU T5_CNT_TXCNT8, 8 .EQU T5_CNT_TXCNT7, 7 .EQU T5_CNT_TXCNT6, 6 .EQU T5_CNT_TXCNT5, 5 .EQU T5_CNT_TXCNT4, 4 .EQU T5_CNT_TXCNT3, 3 .EQU T5_CNT_TXCNT2, 2 .EQU T5_CNT_TXCNT1, 1 .EQU T5_CNT_TXCNT0, 0 // register------------------------------------- .EQU T6_CNT, 0x40003484 // 0x4000 3484 T6_CNT Bits------------------------------------- .EQU T6_CNT_TZCNT15, 15 .EQU T6_CNT_TZCNT14, 14 .EQU T6_CNT_TZCNT13, 13 .EQU T6_CNT_TZCNT12, 12 .EQU T6_CNT_TZCNT11, 11 .EQU T6_CNT_TZCNT10, 10 .EQU T6_CNT_TZCNT9, 9 .EQU T6_CNT_TZCNT8, 8 .EQU T6_CNT_TZCNT7, 7 .EQU T6_CNT_TZCNT6, 6 .EQU T6_CNT_TZCNT5, 5 .EQU T6_CNT_TZCNT4, 4 .EQU T6_CNT_TZCNT3, 3 .EQU T6_CNT_TZCNT2, 2 .EQU T6_CNT_TZCNT1, 1 .EQU T6_CNT_TZCNT0, 0 // register------------------------------------- .EQU T5_PPX, 0x40003488 // 0x4000 3488 T5_PPX Bits------------------------------------- .EQU T5_PPX_PPX15, 15 .EQU T5_PPX_PPX14, 14 .EQU T5_PPX_PPX13, 13 .EQU T5_PPX_PPX12, 12 .EQU T5_PPX_PPX11, 11 .EQU T5_PPX_PPX10, 10 .EQU T5_PPX_PPX9, 9 .EQU T5_PPX_PPX8, 8 .EQU T5_PPX_PPX7, 7 .EQU T5_PPX_PPX6, 6 .EQU T5_PPX_PPX5, 5 .EQU T5_PPX_PPX4, 4 .EQU T5_PPX_PPX3, 3 .EQU T5_PPX_PPX2, 2 .EQU T5_PPX_PPX1, 1 .EQU T5_PPX_PPX0, 0 // register------------------------------------- .EQU T6_PPZ, 0x4000348C // 0x4000 348C T6_PPZ Bits------------------------------------- .EQU T6_PPZ_PPZ15, 15 .EQU T6_PPZ_PPZ14, 14 .EQU T6_PPZ_PPZ13, 13 .EQU T6_PPZ_PPZ12, 12 .EQU T6_PPZ_PPZ11, 11 .EQU T6_PPZ_PPZ10, 10 .EQU T6_PPZ_PPZ9, 9 .EQU T6_PPZ_PPZ8, 8 .EQU T6_PPZ_PPZ7, 7 .EQU T6_PPZ_PPZ6, 6 .EQU T6_PPZ_PPZ5, 5 .EQU T6_PPZ_PPZ4, 4 .EQU T6_PPZ_PPZ3, 3 .EQU T6_PPZ_PPZ2, 2 .EQU T6_PPZ_PPZ1, 1 .EQU T6_PPZ_PPZ0, 0 // register------------------------------------- .EQU T5_PRSC, 0x40003490 // 0x4000 3490 T5_PRSC Bits------------------------------------- .EQU T5_PRSC_TXCKS15, 15 .EQU T5_PRSC_TXCKS14, 14 .EQU T5_PRSC_TXCKS13, 13 .EQU T5_PRSC_TXCKS12, 12 .EQU T5_PRSC_TXCKS11, 11 .EQU T5_PRSC_TXCKS10, 10 .EQU T5_PRSC_TXCKS9, 9 .EQU T5_PRSC_TXCKS8, 8 .EQU T5_PRSC_TXCKS7, 7 .EQU T5_PRSC_TXCKS6, 6 .EQU T5_PRSC_TXCKS5, 5 .EQU T5_PRSC_TXCKS4, 4 .EQU T5_PRSC_TXCKS3, 3 .EQU T5_PRSC_TXCKS2, 2 .EQU T5_PRSC_TXCKS1, 1 .EQU T5_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T6_PRSC, 0x40003494 // 0x4000 3494 T6_PRSC Bits------------------------------------- .EQU T6_PRSC_TZCKS15, 15 .EQU T6_PRSC_TZCKS14, 14 .EQU T6_PRSC_TZCKS13, 13 .EQU T6_PRSC_TZCKS12, 12 .EQU T6_PRSC_TZCKS11, 11 .EQU T6_PRSC_TZCKS10, 10 .EQU T6_PRSC_TZCKS9, 9 .EQU T6_PRSC_TZCKS8, 8 .EQU T6_PRSC_TZCKS7, 7 .EQU T6_PRSC_TZCKS6, 6 .EQU T6_PRSC_TZCKS5, 5 .EQU T6_PRSC_TZCKS4, 4 .EQU T6_PRSC_TZCKS3, 3 .EQU T6_PRSC_TZCKS2, 2 .EQU T6_PRSC_TZCKS1, 1 .EQU T6_PRSC_TZCKS0, 0 // register------------------------------------- .EQU T5_CCR0, 0x40003498 // 0x4000 3498 T5_CCR0 Bits------------------------------------- .EQU T5_CCR0_TXCCR0_15, 15 .EQU T5_CCR0_TXCCR0_14, 14 .EQU T5_CCR0_TXCCR0_13, 13 .EQU T5_CCR0_TXCCR0_12, 12 .EQU T5_CCR0_TXCCR0_11, 11 .EQU T5_CCR0_TXCCR0_10, 10 .EQU T5_CCR0_TXCCR0_9, 9 .EQU T5_CCR0_TXCCR0_8, 8 .EQU T5_CCR0_TXCCR0_7, 7 .EQU T5_CCR0_TXCCR0_6, 6 .EQU T5_CCR0_TXCCR0_5, 5 .EQU T5_CCR0_TXCCR0_4, 4 .EQU T5_CCR0_TXCCR0_3, 3 .EQU T5_CCR0_TXCCR0_2, 2 .EQU T5_CCR0_TXCCR0_1, 1 .EQU T5_CCR0_TXCCR0_0, 0 // register------------------------------------- .EQU T5_CCR1, 0x4000349C // 0x4000 349C T5_CCR1 Bits------------------------------------- .EQU T5_CCR1_TXCCR1_15, 15 .EQU T5_CCR1_TXCCR1_14, 14 .EQU T5_CCR1_TXCCR1_13, 13 .EQU T5_CCR1_TXCCR1_12, 12 .EQU T5_CCR1_TXCCR1_11, 11 .EQU T5_CCR1_TXCCR1_10, 10 .EQU T5_CCR1_TXCCR1_9, 9 .EQU T5_CCR1_TXCCR1_8, 8 .EQU T5_CCR1_TXCCR1_7, 7 .EQU T5_CCR1_TXCCR1_6, 6 .EQU T5_CCR1_TXCCR1_5, 5 .EQU T5_CCR1_TXCCR1_4, 4 .EQU T5_CCR1_TXCCR1_3, 3 .EQU T5_CCR1_TXCCR1_2, 2 .EQU T5_CCR1_TXCCR1_1, 1 .EQU T5_CCR1_TXCCR1_0, 0 // register------------------------------------- .EQU T6_CCR0, 0x400034A0 // 0x4000 34A0 T6_CCR0 Bits------------------------------------- .EQU T6_CCR0_TZCCR15, 15 .EQU T6_CCR0_TZCCR14, 14 .EQU T6_CCR0_TZCCR13, 13 .EQU T6_CCR0_TZCCR12, 12 .EQU T6_CCR0_TZCCR11, 11 .EQU T6_CCR0_TZCCR10, 10 .EQU T6_CCR0_TZCCR9, 9 .EQU T6_CCR0_TZCCR8, 8 .EQU T6_CCR0_TZCCR7, 7 .EQU T6_CCR0_TZCCR6, 6 .EQU T6_CCR0_TZCCR5, 5 .EQU T6_CCR0_TZCCR4, 4 .EQU T6_CCR0_TZCCR3, 3 .EQU T6_CCR0_TZCCR2, 2 .EQU T6_CCR0_TZCCR1, 1 .EQU T6_CCR0_TZCCR0, 0 // register------------------------------------- .EQU T5_CTL, 0x400034A4 // 0x4000 34A4 T5_CTL Bits------------------------------------- .EQU T5_CTL_TXCMS2, 15 .EQU T5_CTL_TXCMS1, 14 .EQU T5_CTL_TXCMS0, 13 .EQU T5_CTL_TXOFS1, 12 .EQU T5_CTL_TXOFS0, 11 .EQU T5_CTL_TXADAUTO, 10 .EQU T5_CTL_TXCLK1, 9 .EQU T5_CTL_TXCLK0, 8 .EQU T5_CTL_TXDIR, 7 .EQU T5_CTL_TXCKBS3, 6 .EQU T5_CTL_TXCKBS2, 5 .EQU T5_CTL_TXCKBS1, 4 .EQU T5_CTL_TXCKBS0, 3 .EQU T5_CTL_TXEN, 2 .EQU T5_CTL_TXSY, 1 .EQU T5_CTL_TXCS, 0 // register------------------------------------- .EQU T6_CTL, 0x400034A8 // 0x4000 34A8 T6_CTL Bits------------------------------------- .EQU T6_CTL_TZCMS2, 15 .EQU T6_CTL_TZCMS1, 14 .EQU T6_CTL_TZCMS0, 13 .EQU T6_CTL_TZOFS1, 12 .EQU T6_CTL_TZOFS0, 11 .EQU T6_CTL_TZADAUTO, 10 .EQU T6_CTL_TZCLK1, 9 .EQU T6_CTL_TZCLK0, 8 .EQU T6_CTL_TZDIR, 7 .EQU T6_CTL_TZCKBS3, 6 .EQU T6_CTL_TZCKBS2, 5 .EQU T6_CTL_TZCKBS1, 4 .EQU T6_CTL_TZCKBS0, 3 .EQU T6_CTL_TZEN, 2 .EQU T6_CTL_TZSY, 1 .EQU T6_CTL_TZCS, 0 // register------------------------------------- .EQU ECCP5_PDCTL, 0x400034AC // 0x4000 34AC ECCP5_PDCTL Bits------------------------------------- .EQU ECCP5_PDCTL_CPD2, 14 .EQU ECCP5_PDCTL_CPD1, 13 .EQU ECCP5_PDCTL_CPD0, 12 .EQU ECCP5_PDCTL_RDA2, 10 .EQU ECCP5_PDCTL_RDA1, 9 .EQU ECCP5_PDCTL_RDA0, 8 .EQU ECCP5_PDCTL_SMPEN, 7 .EQU ECCP5_PDCTL_TI2EN, 5 .EQU ECCP5_PDCTL_TI1EN, 4 .EQU ECCP5_PDCTL_TI0EN, 3 .EQU ECCP5_PDCTL_CMPE, 2 .EQU ECCP5_PDCTL_CPE1, 1 .EQU ECCP5_PDCTL_CPE0, 0 // register------------------------------------- .EQU ECCP5_PXASCTL, 0x400034B0 // 0x4000 34B0 ECCP5_PXASCTL Bits------------------------------------- .EQU ECCP5_PXASCTL_TZBKINS, 5 .EQU ECCP5_PXASCTL_TXBKINS, 4 .EQU ECCP5_PXASCTL_TZPXASS1, 3 .EQU ECCP5_PXASCTL_TZPXASS0, 2 .EQU ECCP5_PXASCTL_TXPXASS1, 1 .EQU ECCP5_PXASCTL_TXPXASS0, 0 // register------------------------------------- .EQU T5_CCTCTL, 0x400034B4 // 0x4000 34B4 T5_CCTCTL Bits------------------------------------- .EQU T5_CCTCTL_TXCKSEL1, 13 .EQU T5_CCTCTL_TXCKSEL0, 12 .EQU T5_CCTCTL_TCKDELAY2, 11 .EQU T5_CCTCTL_TCKDELAY1, 10 .EQU T5_CCTCTL_TCKDELAY0, 9 .EQU T5_CCTCTL_TCKDIV3, 8 .EQU T5_CCTCTL_TCKDIV2, 7 .EQU T5_CCTCTL_TCKDIV1, 6 .EQU T5_CCTCTL_TCKDIV0, 5 .EQU T5_CCTCTL_TCKFEN, 4 .EQU T5_CCTCTL_CCTSEL1, 3 .EQU T5_CCTCTL_CCTSEL0, 2 .EQU T5_CCTCTL_CRSET, 1 .EQU T5_CCTCTL_CCTEN, 0 // register------------------------------------- .EQU T6_CCTCTL, 0x400034B8 // 0x4000 34B8 T6_CCTCTL Bits------------------------------------- .EQU T6_CCTCTL_TZCKSEL1, 13 .EQU T6_CCTCTL_TZCKSEL0, 12 .EQU T6_CCTCTL_TCKDELAY2, 11 .EQU T6_CCTCTL_TCKDELAY1, 10 .EQU T6_CCTCTL_TCKDELAY0, 9 .EQU T6_CCTCTL_TCKDIV3, 8 .EQU T6_CCTCTL_TCKDIV2, 7 .EQU T6_CCTCTL_TCKDIV1, 6 .EQU T6_CCTCTL_TCKDIV0, 5 .EQU T6_CCTCTL_TCKFEN, 4 .EQU T6_CCTCTL_CCTSEL1, 3 .EQU T6_CCTCTL_CCTSEL0, 2 .EQU T6_CCTCTL_CRSET, 1 .EQU T6_CCTCTL_CCTEN, 0 // register------------------------------------- .EQU ECCP5_COMH1, 0x400034C0 // 0x4000 34C0 ECCP5_COMH1 Bits------------------------------------- .EQU ECCP5_COMH1_COMH15, 15 .EQU ECCP5_COMH1_COMH14, 14 .EQU ECCP5_COMH1_COMH13, 13 .EQU ECCP5_COMH1_COMH12, 12 .EQU ECCP5_COMH1_COMH11, 11 .EQU ECCP5_COMH1_COMH10, 10 .EQU ECCP5_COMH1_COMH9, 9 .EQU ECCP5_COMH1_COMH8, 8 .EQU ECCP5_COMH1_COMH7, 7 .EQU ECCP5_COMH1_COMH6, 6 .EQU ECCP5_COMH1_COMH5, 5 .EQU ECCP5_COMH1_COMH4, 4 .EQU ECCP5_COMH1_COMH3, 3 .EQU ECCP5_COMH1_COMH2, 2 .EQU ECCP5_COMH1_COMH1, 1 .EQU ECCP5_COMH1_COMH0, 0 // register------------------------------------- .EQU ECCP5_COML1, 0x400034C4 // 0x4000 34C4 ECCP5_COML1 Bits------------------------------------- .EQU ECCP5_COML1_COML15, 15 .EQU ECCP5_COML1_COML14, 14 .EQU ECCP5_COML1_COML13, 13 .EQU ECCP5_COML1_COML12, 12 .EQU ECCP5_COML1_COML11, 11 .EQU ECCP5_COML1_COML10, 10 .EQU ECCP5_COML1_COML9, 9 .EQU ECCP5_COML1_COML8, 8 .EQU ECCP5_COML1_COML7, 7 .EQU ECCP5_COML1_COML6, 6 .EQU ECCP5_COML1_COML5, 5 .EQU ECCP5_COML1_COML4, 4 .EQU ECCP5_COML1_COML3, 3 .EQU ECCP5_COML1_COML2, 2 .EQU ECCP5_COML1_COML1, 1 .EQU ECCP5_COML1_COML0, 0 // register------------------------------------- .EQU ECCP5_FAUCTL1, 0x400034C8 // 0x4000 34C8 ECCP5_FAUCTL1 Bits------------------------------------- .EQU ECCP5_FAUCTL1_TRST, 14 .EQU ECCP5_FAUCTL1_FINV1, 13 .EQU ECCP5_FAUCTL1_FINV0, 12 .EQU ECCP5_FAUCTL1_FVAL2, 11 .EQU ECCP5_FAUCTL1_FVAL1, 10 .EQU ECCP5_FAUCTL1_FVAL0, 9 .EQU ECCP5_FAUCTL1_FAUIF, 8 .EQU ECCP5_FAUCTL1_FAUIC, 7 .EQU ECCP5_FAUCTL1_FAUIE, 6 .EQU ECCP5_FAUCTL1_FLTEN, 5 .EQU ECCP5_FAUCTL1_FLTP3, 4 .EQU ECCP5_FAUCTL1_FLTP2, 3 .EQU ECCP5_FAUCTL1_FLTP1, 2 .EQU ECCP5_FAUCTL1_FLTP0, 1 .EQU ECCP5_FAUCTL1_FAUEN, 0 // register------------------------------------- .EQU ECCP5_DITCTL, 0x400034CC // 0x4000 34CC ECCP5_DITCTL Bits------------------------------------- .EQU ECCP5_DITCTL_DCOMEN, 7 .EQU ECCP5_DITCTL_DPEEN, 6 .EQU ECCP5_DITCTL_DEDEN, 5 .EQU ECCP5_DITCTL_FRCVAL4, 4 .EQU ECCP5_DITCTL_FRCVAL3, 3 .EQU ECCP5_DITCTL_FRCVAL2, 2 .EQU ECCP5_DITCTL_FRCVAL1, 1 .EQU ECCP5_DITCTL_FRCVAL0, 0 // register------------------------------------- .EQU ECCP5_COMH2, 0x400034D0 // 0x4000 34D0 ECCP5_COMH2 Bits------------------------------------- .EQU ECCP5_COMH2_COMH15, 15 .EQU ECCP5_COMH2_COMH14, 14 .EQU ECCP5_COMH2_COMH13, 13 .EQU ECCP5_COMH2_COMH12, 12 .EQU ECCP5_COMH2_COMH11, 11 .EQU ECCP5_COMH2_COMH10, 10 .EQU ECCP5_COMH2_COMH9, 9 .EQU ECCP5_COMH2_COMH8, 8 .EQU ECCP5_COMH2_COMH7, 7 .EQU ECCP5_COMH2_COMH6, 6 .EQU ECCP5_COMH2_COMH5, 5 .EQU ECCP5_COMH2_COMH4, 4 .EQU ECCP5_COMH2_COMH3, 3 .EQU ECCP5_COMH2_COMH2, 2 .EQU ECCP5_COMH2_COMH1, 1 .EQU ECCP5_COMH2_COMH0, 0 // register------------------------------------- .EQU ECCP5_COML2, 0x400034D4 // 0x4000 34D4 ECCP5_COML2 Bits------------------------------------- .EQU ECCP5_COML2_COML15, 15 .EQU ECCP5_COML2_COML14, 14 .EQU ECCP5_COML2_COML13, 13 .EQU ECCP5_COML2_COML12, 12 .EQU ECCP5_COML2_COML11, 11 .EQU ECCP5_COML2_COML10, 10 .EQU ECCP5_COML2_COML9, 9 .EQU ECCP5_COML2_COML8, 8 .EQU ECCP5_COML2_COML7, 7 .EQU ECCP5_COML2_COML6, 6 .EQU ECCP5_COML2_COML5, 5 .EQU ECCP5_COML2_COML4, 4 .EQU ECCP5_COML2_COML3, 3 .EQU ECCP5_COML2_COML2, 2 .EQU ECCP5_COML2_COML1, 1 .EQU ECCP5_COML2_COML0, 0 // register------------------------------------- .EQU ECCP5_FAUCTL2, 0x400034D8 // 0x4000 34D8 ECCP5_FAUCTL2 Bits------------------------------------- .EQU ECCP5_FAUCTL2_TRST, 14 .EQU ECCP5_FAUCTL2_FINV1, 13 .EQU ECCP5_FAUCTL2_FINV0, 12 .EQU ECCP5_FAUCTL2_FVAL2, 11 .EQU ECCP5_FAUCTL2_FVAL1, 10 .EQU ECCP5_FAUCTL2_FVAL0, 9 .EQU ECCP5_FAUCTL2_FAUIF, 8 .EQU ECCP5_FAUCTL2_FAUIC, 7 .EQU ECCP5_FAUCTL2_FAUIE, 6 .EQU ECCP5_FAUCTL2_FLTEN, 5 .EQU ECCP5_FAUCTL2_FLTP3, 4 .EQU ECCP5_FAUCTL2_FLTP2, 3 .EQU ECCP5_FAUCTL2_FLTP1, 2 .EQU ECCP5_FAUCTL2_FLTP0, 1 .EQU ECCP5_FAUCTL2_FAUEN, 0 // register------------------------------------- .EQU ECCP5_CCRCTL, 0x400034DC // 0x4000 34DC ECCP5_CCRCTL Bits------------------------------------- .EQU ECCP5_CCRCTL_TZCCR0SEL, 5 .EQU ECCP5_CCRCTL_TXCCR1SEL, 4 .EQU ECCP5_CCRCTL_TXCCR0SEL, 3 .EQU ECCP5_CCRCTL_TZCCR0SEN, 2 .EQU ECCP5_CCRCTL_TXCCR1SEN, 1 .EQU ECCP5_CCRCTL_TXCCR0SEN, 0 // register------------------------------------- .EQU ECCP5_COMH3, 0x400034E0 // 0x4000 34E0 ECCP5_COMH3 Bits------------------------------------- .EQU ECCP5_COMH3_COMH15, 15 .EQU ECCP5_COMH3_COMH14, 14 .EQU ECCP5_COMH3_COMH13, 13 .EQU ECCP5_COMH3_COMH12, 12 .EQU ECCP5_COMH3_COMH11, 11 .EQU ECCP5_COMH3_COMH10, 10 .EQU ECCP5_COMH3_COMH9, 9 .EQU ECCP5_COMH3_COMH8, 8 .EQU ECCP5_COMH3_COMH7, 7 .EQU ECCP5_COMH3_COMH6, 6 .EQU ECCP5_COMH3_COMH5, 5 .EQU ECCP5_COMH3_COMH4, 4 .EQU ECCP5_COMH3_COMH3, 3 .EQU ECCP5_COMH3_COMH2, 2 .EQU ECCP5_COMH3_COMH1, 1 .EQU ECCP5_COMH3_COMH0, 0 // register------------------------------------- .EQU ECCP5_COML3, 0x400034E4 // 0x4000 34E4 ECCP5_COML3 Bits------------------------------------- .EQU ECCP5_COML3_COML15, 15 .EQU ECCP5_COML3_COML14, 14 .EQU ECCP5_COML3_COML13, 13 .EQU ECCP5_COML3_COML12, 12 .EQU ECCP5_COML3_COML11, 11 .EQU ECCP5_COML3_COML10, 10 .EQU ECCP5_COML3_COML9, 9 .EQU ECCP5_COML3_COML8, 8 .EQU ECCP5_COML3_COML7, 7 .EQU ECCP5_COML3_COML6, 6 .EQU ECCP5_COML3_COML5, 5 .EQU ECCP5_COML3_COML4, 4 .EQU ECCP5_COML3_COML3, 3 .EQU ECCP5_COML3_COML2, 2 .EQU ECCP5_COML3_COML1, 1 .EQU ECCP5_COML3_COML0, 0 // register------------------------------------- .EQU ECCP5_FAUCTL3, 0x400034E8 // 0x4000 34E8 ECCP5_FAUCTL3 Bits------------------------------------- .EQU ECCP5_FAUCTL3_TRST, 14 .EQU ECCP5_FAUCTL3_FINV1, 13 .EQU ECCP5_FAUCTL3_FINV0, 12 .EQU ECCP5_FAUCTL3_FVAL2, 11 .EQU ECCP5_FAUCTL3_FVAL1, 10 .EQU ECCP5_FAUCTL3_FVAL0, 9 .EQU ECCP5_FAUCTL3_FAUIF, 8 .EQU ECCP5_FAUCTL3_FAUIC, 7 .EQU ECCP5_FAUCTL3_FAUIE, 6 .EQU ECCP5_FAUCTL3_FLTEN, 5 .EQU ECCP5_FAUCTL3_FLTP3, 4 .EQU ECCP5_FAUCTL3_FLTP2, 3 .EQU ECCP5_FAUCTL3_FLTP1, 2 .EQU ECCP5_FAUCTL3_FLTP0, 1 .EQU ECCP5_FAUCTL3_FAUEN, 0 // register------------------------------------- .EQU ECCP5_COMH4, 0x400034F0 // 0x4000 34F0 ECCP5_COMH4 Bits------------------------------------- .EQU ECCP5_COMH4_COMH15, 15 .EQU ECCP5_COMH4_COMH14, 14 .EQU ECCP5_COMH4_COMH13, 13 .EQU ECCP5_COMH4_COMH12, 12 .EQU ECCP5_COMH4_COMH11, 11 .EQU ECCP5_COMH4_COMH10, 10 .EQU ECCP5_COMH4_COMH9, 9 .EQU ECCP5_COMH4_COMH8, 8 .EQU ECCP5_COMH4_COMH7, 7 .EQU ECCP5_COMH4_COMH6, 6 .EQU ECCP5_COMH4_COMH5, 5 .EQU ECCP5_COMH4_COMH4, 4 .EQU ECCP5_COMH4_COMH3, 3 .EQU ECCP5_COMH4_COMH2, 2 .EQU ECCP5_COMH4_COMH1, 1 .EQU ECCP5_COMH4_COMH0, 0 // register------------------------------------- .EQU ECCP5_COML4, 0x400034F4 // 0x4000 34F4 ECCP5_COML4 Bits------------------------------------- .EQU ECCP5_COML4_COML15, 15 .EQU ECCP5_COML4_COML14, 14 .EQU ECCP5_COML4_COML13, 13 .EQU ECCP5_COML4_COML12, 12 .EQU ECCP5_COML4_COML11, 11 .EQU ECCP5_COML4_COML10, 10 .EQU ECCP5_COML4_COML9, 9 .EQU ECCP5_COML4_COML8, 8 .EQU ECCP5_COML4_COML7, 7 .EQU ECCP5_COML4_COML6, 6 .EQU ECCP5_COML4_COML5, 5 .EQU ECCP5_COML4_COML4, 4 .EQU ECCP5_COML4_COML3, 3 .EQU ECCP5_COML4_COML2, 2 .EQU ECCP5_COML4_COML1, 1 .EQU ECCP5_COML4_COML0, 0 // register------------------------------------- .EQU ECCP5_FAUCTL4, 0x400034F8 // 0x4000 34F8 ECCP5_FAUCTL4 Bits------------------------------------- .EQU ECCP5_FAUCTL4_TRST, 14 .EQU ECCP5_FAUCTL4_FINV1, 13 .EQU ECCP5_FAUCTL4_FINV0, 12 .EQU ECCP5_FAUCTL4_FVAL2, 11 .EQU ECCP5_FAUCTL4_FVAL1, 10 .EQU ECCP5_FAUCTL4_FVAL0, 9 .EQU ECCP5_FAUCTL4_FAUIF, 8 .EQU ECCP5_FAUCTL4_FAUIC, 7 .EQU ECCP5_FAUCTL4_FAUIE, 6 .EQU ECCP5_FAUCTL4_FLTEN, 5 .EQU ECCP5_FAUCTL4_FLTP3, 4 .EQU ECCP5_FAUCTL4_FLTP2, 3 .EQU ECCP5_FAUCTL4_FLTP1, 2 .EQU ECCP5_FAUCTL4_FLTP0, 1 .EQU ECCP5_FAUCTL4_FAUEN, 0 // register------------------------------------- .EQU ECCP5_CTL1, 0x40003500 // 0x4000 3500 ECCP5_CTL1 Bits------------------------------------- .EQU ECCP5_CTL1_CH4M3, 15 .EQU ECCP5_CTL1_CH4M2, 14 .EQU ECCP5_CTL1_CH4M1, 13 .EQU ECCP5_CTL1_CH4M0, 12 .EQU ECCP5_CTL1_CH3M3, 11 .EQU ECCP5_CTL1_CH3M2, 10 .EQU ECCP5_CTL1_CH3M1, 9 .EQU ECCP5_CTL1_CH3M0, 8 .EQU ECCP5_CTL1_CH2M3, 7 .EQU ECCP5_CTL1_CH2M2, 6 .EQU ECCP5_CTL1_CH2M1, 5 .EQU ECCP5_CTL1_CH2M0, 4 .EQU ECCP5_CTL1_CH1M3, 3 .EQU ECCP5_CTL1_CH1M2, 2 .EQU ECCP5_CTL1_CH1M1, 1 .EQU ECCP5_CTL1_CH1M0, 0 // register------------------------------------- .EQU ECCP5_R1, 0x40003504 // 0x4000 3504 ECCP5_R1 Bits------------------------------------- .EQU ECCP5_R1_ECCPXRY15, 15 .EQU ECCP5_R1_ECCPXRY14, 14 .EQU ECCP5_R1_ECCPXRY13, 13 .EQU ECCP5_R1_ECCPXRY12, 12 .EQU ECCP5_R1_ECCPXRY11, 11 .EQU ECCP5_R1_ECCPXRY10, 10 .EQU ECCP5_R1_ECCPXRY9, 9 .EQU ECCP5_R1_ECCPXRY8, 8 .EQU ECCP5_R1_ECCPXRY7, 7 .EQU ECCP5_R1_ECCPXRY6, 6 .EQU ECCP5_R1_ECCPXRY5, 5 .EQU ECCP5_R1_ECCPXRY4, 4 .EQU ECCP5_R1_ECCPXRY3, 3 .EQU ECCP5_R1_ECCPXRY2, 2 .EQU ECCP5_R1_ECCPXRY1, 1 .EQU ECCP5_R1_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP5_R2, 0x40003508 // 0x4000 3508 ECCP5_R2 Bits------------------------------------- .EQU ECCP5_R2_ECCPXRY15, 15 .EQU ECCP5_R2_ECCPXRY14, 14 .EQU ECCP5_R2_ECCPXRY13, 13 .EQU ECCP5_R2_ECCPXRY12, 12 .EQU ECCP5_R2_ECCPXRY11, 11 .EQU ECCP5_R2_ECCPXRY10, 10 .EQU ECCP5_R2_ECCPXRY9, 9 .EQU ECCP5_R2_ECCPXRY8, 8 .EQU ECCP5_R2_ECCPXRY7, 7 .EQU ECCP5_R2_ECCPXRY6, 6 .EQU ECCP5_R2_ECCPXRY5, 5 .EQU ECCP5_R2_ECCPXRY4, 4 .EQU ECCP5_R2_ECCPXRY3, 3 .EQU ECCP5_R2_ECCPXRY2, 2 .EQU ECCP5_R2_ECCPXRY1, 1 .EQU ECCP5_R2_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP5_R3, 0x4000350C // 0x4000 350C ECCP5_R3 Bits------------------------------------- .EQU ECCP5_R3_ECCPXRY15, 15 .EQU ECCP5_R3_ECCPXRY14, 14 .EQU ECCP5_R3_ECCPXRY13, 13 .EQU ECCP5_R3_ECCPXRY12, 12 .EQU ECCP5_R3_ECCPXRY11, 11 .EQU ECCP5_R3_ECCPXRY10, 10 .EQU ECCP5_R3_ECCPXRY9, 9 .EQU ECCP5_R3_ECCPXRY8, 8 .EQU ECCP5_R3_ECCPXRY7, 7 .EQU ECCP5_R3_ECCPXRY6, 6 .EQU ECCP5_R3_ECCPXRY5, 5 .EQU ECCP5_R3_ECCPXRY4, 4 .EQU ECCP5_R3_ECCPXRY3, 3 .EQU ECCP5_R3_ECCPXRY2, 2 .EQU ECCP5_R3_ECCPXRY1, 1 .EQU ECCP5_R3_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP5_R4, 0x40003510 // 0x4000 3510 ECCP5_R4 Bits------------------------------------- .EQU ECCP5_R4_ECCPXRY15, 15 .EQU ECCP5_R4_ECCPXRY14, 14 .EQU ECCP5_R4_ECCPXRY13, 13 .EQU ECCP5_R4_ECCPXRY12, 12 .EQU ECCP5_R4_ECCPXRY11, 11 .EQU ECCP5_R4_ECCPXRY10, 10 .EQU ECCP5_R4_ECCPXRY9, 9 .EQU ECCP5_R4_ECCPXRY8, 8 .EQU ECCP5_R4_ECCPXRY7, 7 .EQU ECCP5_R4_ECCPXRY6, 6 .EQU ECCP5_R4_ECCPXRY5, 5 .EQU ECCP5_R4_ECCPXRY4, 4 .EQU ECCP5_R4_ECCPXRY3, 3 .EQU ECCP5_R4_ECCPXRY2, 2 .EQU ECCP5_R4_ECCPXRY1, 1 .EQU ECCP5_R4_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP5_PXUDCTL, 0x40003514 // 0x4000 3514 ECCP5_PXUDCTL Bits------------------------------------- .EQU ECCP5_PXUDCTL_TZIFUDREN, 10 .EQU ECCP5_PXUDCTL_TZUDR, 9 .EQU ECCP5_PXUDCTL_TXIFUDREN, 8 .EQU ECCP5_PXUDCTL_TXUDR, 7 .EQU ECCP5_PXUDCTL_PXMPEN, 6 .EQU ECCP5_PXUDCTL_PXUDEVT3, 5 .EQU ECCP5_PXUDCTL_PXUDEVT2, 4 .EQU ECCP5_PXUDCTL_PXUDEVT1, 3 .EQU ECCP5_PXUDCTL_PXUDEVT0, 2 .EQU ECCP5_PXUDCTL_PXUDEN1, 1 .EQU ECCP5_PXUDCTL_PXUDEN0, 0 // register------------------------------------- .EQU ECCP5_CTL2, 0x40003518 // 0x4000 3518 ECCP5_CTL2 Bits------------------------------------- .EQU ECCP5_CTL2_TZSMS2, 15 .EQU ECCP5_CTL2_TZSMS1, 14 .EQU ECCP5_CTL2_TZSMS0, 13 .EQU ECCP5_CTL2_PXPWMI, 12 .EQU ECCP5_CTL2_PXXORM, 11 .EQU ECCP5_CTL2_PXSPM, 10 .EQU ECCP5_CTL2_TXMSSYNC, 9 .EQU ECCP5_CTL2_TXTS2, 8 .EQU ECCP5_CTL2_TXTS1, 7 .EQU ECCP5_CTL2_TXTS0, 6 .EQU ECCP5_CTL2_TXSMS2, 5 .EQU ECCP5_CTL2_TXSMS1, 4 .EQU ECCP5_CTL2_TXSMS0, 3 .EQU ECCP5_CTL2_TXMMS2, 2 .EQU ECCP5_CTL2_TXMMS1, 1 .EQU ECCP5_CTL2_TXMMS0, 0 // register------------------------------------- .EQU ECCP5_PXDTCTL, 0x4000351C // 0x4000 351C ECCP5_PXDTCTL Bits------------------------------------- .EQU ECCP5_PXDTCTL_PZDC7, 15 .EQU ECCP5_PXDTCTL_PZDC6, 14 .EQU ECCP5_PXDTCTL_PZDC5, 13 .EQU ECCP5_PXDTCTL_PZDC4, 12 .EQU ECCP5_PXDTCTL_PZDC3, 11 .EQU ECCP5_PXDTCTL_PZDC2, 10 .EQU ECCP5_PXDTCTL_PZDC1, 9 .EQU ECCP5_PXDTCTL_PZDC0, 8 .EQU ECCP5_PXDTCTL_PXDC7, 7 .EQU ECCP5_PXDTCTL_PXDC6, 6 .EQU ECCP5_PXDTCTL_PXDC5, 5 .EQU ECCP5_PXDTCTL_PXDC4, 4 .EQU ECCP5_PXDTCTL_PXDC3, 3 .EQU ECCP5_PXDTCTL_PXDC2, 2 .EQU ECCP5_PXDTCTL_PXDC1, 1 .EQU ECCP5_PXDTCTL_PXDC0, 0 // register------------------------------------- .EQU ECCP5_PWMXOC, 0x40003520 // 0x4000 3520 ECCP5_PWMXOC Bits------------------------------------- .EQU ECCP5_PWMXOC_PXOC4H1, 15 .EQU ECCP5_PWMXOC_PXOC4H0, 14 .EQU ECCP5_PWMXOC_PXOC4L1, 13 .EQU ECCP5_PWMXOC_PXOC4L0, 12 .EQU ECCP5_PWMXOC_PXOC3H1, 11 .EQU ECCP5_PWMXOC_PXOC3H0, 10 .EQU ECCP5_PWMXOC_PXOC3L1, 9 .EQU ECCP5_PWMXOC_PXOC3L0, 8 .EQU ECCP5_PWMXOC_PXOC2H1, 7 .EQU ECCP5_PWMXOC_PXOC2H0, 6 .EQU ECCP5_PWMXOC_PXOC2L1, 5 .EQU ECCP5_PWMXOC_PXOC2L0, 4 .EQU ECCP5_PWMXOC_PXOC1H1, 3 .EQU ECCP5_PWMXOC_PXOC1H0, 2 .EQU ECCP5_PWMXOC_PXOC1L1, 1 .EQU ECCP5_PWMXOC_PXOC1L0, 0 // register------------------------------------- .EQU ECCP5_PXATRCTL, 0x40003524 // 0x4000 3524 ECCP5_PXATRCTL Bits------------------------------------- .EQU ECCP5_PXATRCTL_PXCH4MOD, 11 .EQU ECCP5_PXATRCTL_PXCH3MOD, 10 .EQU ECCP5_PXATRCTL_PXCH2MOD, 9 .EQU ECCP5_PXATRCTL_PXCH1MOD, 8 // register------------------------------------- .EQU ECCP5_PXASCTL0, 0x40003528 // 0x4000 3528 ECCP5_PXASCTL0 Bits------------------------------------- .EQU ECCP5_PXASCTL0_PXASE4, 11 .EQU ECCP5_PXASCTL0_PXASE3, 10 .EQU ECCP5_PXASCTL0_PXASE2, 9 .EQU ECCP5_PXASCTL0_PXASE1, 8 .EQU ECCP5_PXASCTL0_PXASS4_1, 7 .EQU ECCP5_PXASCTL0_PXASS4_0, 6 .EQU ECCP5_PXASCTL0_PXASS3_1, 5 .EQU ECCP5_PXASCTL0_PXASS3_0, 4 .EQU ECCP5_PXASCTL0_PXASS2_1, 3 .EQU ECCP5_PXASCTL0_PXASS2_0, 2 .EQU ECCP5_PXASCTL0_PXASS1_1, 1 .EQU ECCP5_PXASCTL0_PXASS1_0, 0 // register------------------------------------- .EQU ECCP5_PXASCTL1, 0x4000352C // 0x4000 352C ECCP5_PXASCTL1 Bits------------------------------------- .EQU ECCP5_PXASCTL1_PXSS4H1, 15 .EQU ECCP5_PXASCTL1_PXSS4H0, 14 .EQU ECCP5_PXASCTL1_PXSS4L1, 13 .EQU ECCP5_PXASCTL1_PXSS4L0, 12 .EQU ECCP5_PXASCTL1_PXSS3H1, 11 .EQU ECCP5_PXASCTL1_PXSS3H0, 10 .EQU ECCP5_PXASCTL1_PXSS3L1, 9 .EQU ECCP5_PXASCTL1_PXSS3L0, 8 .EQU ECCP5_PXASCTL1_PXSS2H1, 7 .EQU ECCP5_PXASCTL1_PXSS2H0, 6 .EQU ECCP5_PXASCTL1_PXSS2L1, 5 .EQU ECCP5_PXASCTL1_PXSS2L0, 4 .EQU ECCP5_PXASCTL1_PXSS1H1, 3 .EQU ECCP5_PXASCTL1_PXSS1H0, 2 .EQU ECCP5_PXASCTL1_PXSS1L1, 1 .EQU ECCP5_PXASCTL1_PXSS1L0, 0 // register------------------------------------- .EQU ECCP5_ZPDCTL0, 0x40003530 // 0x4000 3530 ECCP5_ZPDCTL0 Bits------------------------------------- .EQU ECCP5_ZPDCTL0_ZCLK3, 11 .EQU ECCP5_ZPDCTL0_ZCLK2, 10 .EQU ECCP5_ZPDCTL0_ZCLK1, 9 .EQU ECCP5_ZPDCTL0_ZCLK0, 8 .EQU ECCP5_ZPDCTL0_ZPD4TWIN, 7 .EQU ECCP5_ZPDCTL0_ZPD3TWIN, 6 .EQU ECCP5_ZPDCTL0_ZPD2TWIN, 5 .EQU ECCP5_ZPDCTL0_ZPD1TWIN, 4 .EQU ECCP5_ZPDCTL0_ZPD4FLAG, 3 .EQU ECCP5_ZPDCTL0_ZPD3FLAG, 2 .EQU ECCP5_ZPDCTL0_ZPD2FLAG, 1 .EQU ECCP5_ZPDCTL0_ZPD1FLAG, 0 // register------------------------------------- .EQU ECCP5_ZPDCTL1, 0x40003534 // 0x4000 3534 ECCP5_ZPDCTL1 Bits------------------------------------- .EQU ECCP5_ZPDCTL1_ZPD4EN, 15 .EQU ECCP5_ZPDCTL1_ZPD3EN, 14 .EQU ECCP5_ZPDCTL1_ZPD2EN, 13 .EQU ECCP5_ZPDCTL1_ZPD1EN, 12 .EQU ECCP5_ZPDCTL1_ZPD4S2, 11 .EQU ECCP5_ZPDCTL1_ZPD4S1, 10 .EQU ECCP5_ZPDCTL1_ZPD4S0, 9 .EQU ECCP5_ZPDCTL1_ZPD3S2, 8 .EQU ECCP5_ZPDCTL1_ZPD3S1, 7 .EQU ECCP5_ZPDCTL1_ZPD3S0, 6 .EQU ECCP5_ZPDCTL1_ZPD2S2, 5 .EQU ECCP5_ZPDCTL1_ZPD2S1, 4 .EQU ECCP5_ZPDCTL1_ZPD2S0, 3 .EQU ECCP5_ZPDCTL1_ZPD1S2, 2 .EQU ECCP5_ZPDCTL1_ZPD1S1, 1 .EQU ECCP5_ZPDCTL1_ZPD1S0, 0 // register------------------------------------- .EQU ECCP5_ZPDPORT, 0x40003538 // 0x4000 3538 ECCP5_ZPDPORT Bits------------------------------------- .EQU ECCP5_ZPDPORT_ZPORT7, 7 .EQU ECCP5_ZPDPORT_ZPORT6, 6 .EQU ECCP5_ZPDPORT_ZPORT5, 5 .EQU ECCP5_ZPDPORT_ZPORT4, 4 .EQU ECCP5_ZPDPORT_ZPORT3, 3 .EQU ECCP5_ZPDPORT_ZPORT2, 2 .EQU ECCP5_ZPDPORT_ZPORT1, 1 .EQU ECCP5_ZPDPORT_ZPORT0, 0 // register------------------------------------- .EQU ECCP5_IE, 0x4000353C // 0x4000 353C ECCP5_IE Bits------------------------------------- .EQU ECCP5_IE_PDIE, 10 .EQU ECCP5_IE_CPIE, 9 .EQU ECCP5_IE_TXUIE, 8 .EQU ECCP5_IE_TZUIE, 7 .EQU ECCP5_IE_TXIE, 6 .EQU ECCP5_IE_TZIE, 5 .EQU ECCP5_IE_TXTIE, 4 .EQU ECCP5_IE_CC4IE, 3 .EQU ECCP5_IE_CC3IE, 2 .EQU ECCP5_IE_CC2IE, 1 .EQU ECCP5_IE_CC1IE, 0 // register------------------------------------- .EQU ECCP5_EGIF, 0x40003540 // 0x4000 3540 ECCP5_EGIF Bits------------------------------------- .EQU ECCP5_EGIF_PDIF, 15 .EQU ECCP5_EGIF_TXUIF, 14 .EQU ECCP5_EGIF_TZUIF, 13 .EQU ECCP5_EGIF_TXIF, 12 .EQU ECCP5_EGIF_TZIF, 11 .EQU ECCP5_EGIF_TXTIF, 10 .EQU ECCP5_EGIF_CC4IF, 9 .EQU ECCP5_EGIF_CC3IF, 8 .EQU ECCP5_EGIF_CC2IF, 7 .EQU ECCP5_EGIF_CC1IF, 6 .EQU ECCP5_EGIF_TXTRG, 5 .EQU ECCP5_EGIF_CC4G, 4 .EQU ECCP5_EGIF_CC3G, 3 .EQU ECCP5_EGIF_CC2G, 2 .EQU ECCP5_EGIF_CC1G, 1 .EQU ECCP5_EGIF_CPIF, 0 // register------------------------------------- .EQU T5_UDTIMX, 0x40003544 // 0x4000 3544 T5_UDTIMX Bits------------------------------------- .EQU T5_UDTIMX_UDCNT7, 7 .EQU T5_UDTIMX_UDCNT6, 6 .EQU T5_UDTIMX_UDCNT5, 5 .EQU T5_UDTIMX_UDCNT4, 4 .EQU T5_UDTIMX_UDCNT3, 3 .EQU T5_UDTIMX_UDCNT2, 2 .EQU T5_UDTIMX_UDCNT1, 1 .EQU T5_UDTIMX_UDCNT0, 0 // register------------------------------------- .EQU T6_UDTIMZ, 0x40003548 // 0x4000 3548 T6_UDTIMZ Bits------------------------------------- .EQU T6_UDTIMZ_UDCNT7, 7 .EQU T6_UDTIMZ_UDCNT6, 6 .EQU T6_UDTIMZ_UDCNT5, 5 .EQU T6_UDTIMZ_UDCNT4, 4 .EQU T6_UDTIMZ_UDCNT3, 3 .EQU T6_UDTIMZ_UDCNT2, 2 .EQU T6_UDTIMZ_UDCNT1, 1 .EQU T6_UDTIMZ_UDCNT0, 0 // register------------------------------------- .EQU ECCP5_DF, 0x4000354C // 0x4000 354C ECCP5_DF Bits------------------------------------- .EQU ECCP5_DF_TXUDF, 7 .EQU ECCP5_DF_TZUDF, 6 .EQU ECCP5_DF_TRIGDF, 5 .EQU ECCP5_DF_CLSDF, 4 .EQU ECCP5_DF_CH4DF, 3 .EQU ECCP5_DF_CH3DF, 2 .EQU ECCP5_DF_CH2DF, 1 .EQU ECCP5_DF_CH1DF, 0 // register------------------------------------- .EQU ECCP5_C1, 0x40003550 // 0x4000 3550 ECCP5_C1 Bits------------------------------------- .EQU ECCP5_C1_ECCPXCY15, 15 .EQU ECCP5_C1_ECCPXCY14, 14 .EQU ECCP5_C1_ECCPXCY13, 13 .EQU ECCP5_C1_ECCPXCY12, 12 .EQU ECCP5_C1_ECCPXCY11, 11 .EQU ECCP5_C1_ECCPXCY10, 10 .EQU ECCP5_C1_ECCPXCY9, 9 .EQU ECCP5_C1_ECCPXCY8, 8 .EQU ECCP5_C1_ECCPXCY7, 7 .EQU ECCP5_C1_ECCPXCY6, 6 .EQU ECCP5_C1_ECCPXCY5, 5 .EQU ECCP5_C1_ECCPXCY4, 4 .EQU ECCP5_C1_ECCPXCY3, 3 .EQU ECCP5_C1_ECCPXCY2, 2 .EQU ECCP5_C1_ECCPXCY1, 1 .EQU ECCP5_C1_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP5_C2, 0x40003554 // 0x4000 3554 ECCP5_C2 Bits------------------------------------- .EQU ECCP5_C2_ECCPXCY15, 15 .EQU ECCP5_C2_ECCPXCY14, 14 .EQU ECCP5_C2_ECCPXCY13, 13 .EQU ECCP5_C2_ECCPXCY12, 12 .EQU ECCP5_C2_ECCPXCY11, 11 .EQU ECCP5_C2_ECCPXCY10, 10 .EQU ECCP5_C2_ECCPXCY9, 9 .EQU ECCP5_C2_ECCPXCY8, 8 .EQU ECCP5_C2_ECCPXCY7, 7 .EQU ECCP5_C2_ECCPXCY6, 6 .EQU ECCP5_C2_ECCPXCY5, 5 .EQU ECCP5_C2_ECCPXCY4, 4 .EQU ECCP5_C2_ECCPXCY3, 3 .EQU ECCP5_C2_ECCPXCY2, 2 .EQU ECCP5_C2_ECCPXCY1, 1 .EQU ECCP5_C2_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP5_C3, 0x40003558 // 0x4000 3558 ECCP5_C3 Bits------------------------------------- .EQU ECCP5_C3_ECCPXCY15, 15 .EQU ECCP5_C3_ECCPXCY14, 14 .EQU ECCP5_C3_ECCPXCY13, 13 .EQU ECCP5_C3_ECCPXCY12, 12 .EQU ECCP5_C3_ECCPXCY11, 11 .EQU ECCP5_C3_ECCPXCY10, 10 .EQU ECCP5_C3_ECCPXCY9, 9 .EQU ECCP5_C3_ECCPXCY8, 8 .EQU ECCP5_C3_ECCPXCY7, 7 .EQU ECCP5_C3_ECCPXCY6, 6 .EQU ECCP5_C3_ECCPXCY5, 5 .EQU ECCP5_C3_ECCPXCY4, 4 .EQU ECCP5_C3_ECCPXCY3, 3 .EQU ECCP5_C3_ECCPXCY2, 2 .EQU ECCP5_C3_ECCPXCY1, 1 .EQU ECCP5_C3_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP5_C4, 0x4000355C // 0x4000 355C ECCP5_C4 Bits------------------------------------- .EQU ECCP5_C4_ECCPXCY15, 15 .EQU ECCP5_C4_ECCPXCY14, 14 .EQU ECCP5_C4_ECCPXCY13, 13 .EQU ECCP5_C4_ECCPXCY12, 12 .EQU ECCP5_C4_ECCPXCY11, 11 .EQU ECCP5_C4_ECCPXCY10, 10 .EQU ECCP5_C4_ECCPXCY9, 9 .EQU ECCP5_C4_ECCPXCY8, 8 .EQU ECCP5_C4_ECCPXCY7, 7 .EQU ECCP5_C4_ECCPXCY6, 6 .EQU ECCP5_C4_ECCPXCY5, 5 .EQU ECCP5_C4_ECCPXCY4, 4 .EQU ECCP5_C4_ECCPXCY3, 3 .EQU ECCP5_C4_ECCPXCY2, 2 .EQU ECCP5_C4_ECCPXCY1, 1 .EQU ECCP5_C4_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP5_DE, 0x40003564 // 0x4000 3564 ECCP5_DE Bits------------------------------------- .EQU ECCP5_DE_TXUDE, 7 .EQU ECCP5_DE_TZUDE, 6 .EQU ECCP5_DE_TXTDE, 5 .EQU ECCP5_DE_CLSDE, 4 .EQU ECCP5_DE_CH4DE, 3 .EQU ECCP5_DE_CH3DE, 2 .EQU ECCP5_DE_CH2DE, 1 .EQU ECCP5_DE_CH1DE, 0 // register------------------------------------- .EQU ECCP5_SRIC, 0x40003568 // 0x4000 3568 ECCP5_SRIC Bits------------------------------------- .EQU ECCP5_SRIC_PDIC, 10 .EQU ECCP5_SRIC_CPIC, 9 .EQU ECCP5_SRIC_TXUIC, 8 .EQU ECCP5_SRIC_TZUIC, 7 .EQU ECCP5_SRIC_TXIC, 6 .EQU ECCP5_SRIC_TZIC, 5 .EQU ECCP5_SRIC_TXTIC, 4 .EQU ECCP5_SRIC_CC4IC, 3 .EQU ECCP5_SRIC_CC3IC, 2 .EQU ECCP5_SRIC_CC2IC, 1 .EQU ECCP5_SRIC_CC1IC, 0 // register------------------------------------- .EQU ECCP5_CTL3, 0x4000356C // 0x4000 356C ECCP5_CTL3 Bits------------------------------------- .EQU ECCP5_CTL3_TRGSEL1, 14 .EQU ECCP5_CTL3_TRGSEL0, 13 .EQU ECCP5_CTL3_CH3HM, 12 .EQU ECCP5_CTL3_CH2HM, 11 .EQU ECCP5_CTL3_CH1HM, 10 .EQU ECCP5_CTL3_CH0HM, 9 .EQU ECCP5_CTL3_GTBEOUT, 8 .EQU ECCP5_CTL3_GTBEN, 7 .EQU ECCP5_CTL3_CAPTST, 6 .EQU ECCP5_CTL3_COMINV1, 5 .EQU ECCP5_CTL3_COMINV0, 4 .EQU ECCP5_CTL3_COMBEN, 3 .EQU ECCP5_CTL3_PXRSEN, 2 .EQU ECCP5_CTL3_TUNITE, 1 .EQU ECCP5_CTL3_PXSPMST, 0 // register------------------------------------- .EQU ECCP5_CAPPRSC, 0x40003580 // 0x4000 3580 ECCP5_CAPPRSC Bits------------------------------------- .EQU ECCP5_CAPPRSC_CH4CAPPR3, 15 .EQU ECCP5_CAPPRSC_CH4CAPPR2, 14 .EQU ECCP5_CAPPRSC_CH4CAPPR1, 13 .EQU ECCP5_CAPPRSC_CH4CAPPR0, 12 .EQU ECCP5_CAPPRSC_CH3CAPPR3, 11 .EQU ECCP5_CAPPRSC_CH3CAPPR2, 10 .EQU ECCP5_CAPPRSC_CH3CAPPR1, 9 .EQU ECCP5_CAPPRSC_CH3CAPPR0, 8 .EQU ECCP5_CAPPRSC_CH2CAPPR3, 7 .EQU ECCP5_CAPPRSC_CH2CAPPR2, 6 .EQU ECCP5_CAPPRSC_CH2CAPPR1, 5 .EQU ECCP5_CAPPRSC_CH2CAPPR0, 4 .EQU ECCP5_CAPPRSC_CH1CAPPR3, 3 .EQU ECCP5_CAPPRSC_CH1CAPPR2, 2 .EQU ECCP5_CAPPRSC_CH1CAPPR1, 1 .EQU ECCP5_CAPPRSC_CH1CAPPR0, 0 // register------------------------------------- .EQU ECCP5_CAPTIME, 0x40003584 // 0x4000 3584 ECCP5_CAPTIME Bits------------------------------------- .EQU ECCP5_CAPTIME_CH4CAPTIME3, 15 .EQU ECCP5_CAPTIME_CH4CAPTIME2, 14 .EQU ECCP5_CAPTIME_CH4CAPTIME1, 13 .EQU ECCP5_CAPTIME_CH4CAPTIME0, 12 .EQU ECCP5_CAPTIME_CH3CAPTIME3, 11 .EQU ECCP5_CAPTIME_CH3CAPTIME2, 10 .EQU ECCP5_CAPTIME_CH3CAPTIME1, 9 .EQU ECCP5_CAPTIME_CH3CAPTIME0, 8 .EQU ECCP5_CAPTIME_CH2CAPTIME3, 7 .EQU ECCP5_CAPTIME_CH2CAPTIME2, 6 .EQU ECCP5_CAPTIME_CH2CAPTIME1, 5 .EQU ECCP5_CAPTIME_CH2CAPTIME0, 4 .EQU ECCP5_CAPTIME_CH1CAPTIME3, 3 .EQU ECCP5_CAPTIME_CH1CAPTIME2, 2 .EQU ECCP5_CAPTIME_CH1CAPTIME1, 1 .EQU ECCP5_CAPTIME_CH1CAPTIME0, 0 // register------------------------------------- .EQU ECCP5_CAPCTL1, 0x40003588 // 0x4000 3588 ECCP5_CAPCTL1 Bits------------------------------------- .EQU ECCP5_CAPCTL1_CH4TIEN, 15 .EQU ECCP5_CAPCTL1_CH3TIEN, 14 .EQU ECCP5_CAPCTL1_CH2TIEN, 13 .EQU ECCP5_CAPCTL1_CH1TIEN, 12 .EQU ECCP5_CAPCTL1_CH4CMODE, 11 .EQU ECCP5_CAPCTL1_CH3CMODE, 10 .EQU ECCP5_CAPCTL1_CH2CMODE, 9 .EQU ECCP5_CAPCTL1_CH1CMODE, 8 .EQU ECCP5_CAPCTL1_CH4CAPED, 7 .EQU ECCP5_CAPCTL1_CH3CAPED, 6 .EQU ECCP5_CAPCTL1_CH2CAPED, 5 .EQU ECCP5_CAPCTL1_CH1CAPED, 4 .EQU ECCP5_CAPCTL1_CH4CAPEN, 3 .EQU ECCP5_CAPCTL1_CH3CAPEN, 2 .EQU ECCP5_CAPCTL1_CH2CAPEN, 1 .EQU ECCP5_CAPCTL1_CH1CAPEN, 0 // register------------------------------------- .EQU ECCP5_CAPCTL2, 0x4000358C // 0x4000 358C ECCP5_CAPCTL2 Bits------------------------------------- .EQU ECCP5_CAPCTL2_CH4CAPPIN2, 11 .EQU ECCP5_CAPCTL2_CH4CAPPIN1, 10 .EQU ECCP5_CAPCTL2_CH4CAPPIN0, 9 .EQU ECCP5_CAPCTL2_CH3CAPPIN2, 8 .EQU ECCP5_CAPCTL2_CH3CAPPIN1, 7 .EQU ECCP5_CAPCTL2_CH3CAPPIN0, 6 .EQU ECCP5_CAPCTL2_CH2CAPPIN2, 5 .EQU ECCP5_CAPCTL2_CH2CAPPIN1, 4 .EQU ECCP5_CAPCTL2_CH2CAPPIN0, 3 .EQU ECCP5_CAPCTL2_CH1CAPPIN2, 2 .EQU ECCP5_CAPCTL2_CH1CAPPIN1, 1 .EQU ECCP5_CAPCTL2_CH1CAPPIN0, 0 // register------------------------------------- .EQU ECCP5_FLCLKP, 0x40003590 // 0x4000 3590 ECCP5_FLCLKP Bits------------------------------------- .EQU ECCP5_FLCLKP_CH4FLCLKP3, 15 .EQU ECCP5_FLCLKP_CH4FLCLKP2, 14 .EQU ECCP5_FLCLKP_CH4FLCLKP1, 13 .EQU ECCP5_FLCLKP_CH4FLCLKP0, 12 .EQU ECCP5_FLCLKP_CH3FLCLKP3, 11 .EQU ECCP5_FLCLKP_CH3FLCLKP2, 10 .EQU ECCP5_FLCLKP_CH3FLCLKP1, 9 .EQU ECCP5_FLCLKP_CH3FLCLKP0, 8 .EQU ECCP5_FLCLKP_CH2FLCLKP3, 7 .EQU ECCP5_FLCLKP_CH2FLCLKP2, 6 .EQU ECCP5_FLCLKP_CH2FLCLKP1, 5 .EQU ECCP5_FLCLKP_CH2FLCLKP0, 4 .EQU ECCP5_FLCLKP_CH1FLCLKP3, 3 .EQU ECCP5_FLCLKP_CH1FLCLKP2, 2 .EQU ECCP5_FLCLKP_CH1FLCLKP1, 1 .EQU ECCP5_FLCLKP_CH1FLCLKP0, 0 // register------------------------------------- .EQU ECCP5_FILTER, 0x40003594 // 0x4000 3594 ECCP5_FILTER Bits------------------------------------- .EQU ECCP5_FILTER_CH4FILTER2, 11 .EQU ECCP5_FILTER_CH4FILTER1, 10 .EQU ECCP5_FILTER_CH4FILTER0, 9 .EQU ECCP5_FILTER_CH3FILTER2, 8 .EQU ECCP5_FILTER_CH3FILTER1, 7 .EQU ECCP5_FILTER_CH3FILTER0, 6 .EQU ECCP5_FILTER_CH2FILTER2, 5 .EQU ECCP5_FILTER_CH2FILTER1, 4 .EQU ECCP5_FILTER_CH2FILTER0, 3 .EQU ECCP5_FILTER_CH1FILTER2, 2 .EQU ECCP5_FILTER_CH1FILTER1, 1 .EQU ECCP5_FILTER_CH1FILTER0, 0 // register------------------------------------- .EQU ECCP5_PHSCTLX, 0x40003598 // 0x4000 3598 ECCP5_PHSCTLX Bits------------------------------------- .EQU ECCP5_PHSCTLX_PHSXDIR, 15 .EQU ECCP5_PHSCTLX_PHSXTIEN, 14 .EQU ECCP5_PHSCTLX_PHSXTIME3, 13 .EQU ECCP5_PHSCTLX_PHSXTIME2, 12 .EQU ECCP5_PHSCTLX_PHSXTIME1, 11 .EQU ECCP5_PHSCTLX_PHSXTIME0, 10 .EQU ECCP5_PHSCTLX_PHSXPRSC3, 9 .EQU ECCP5_PHSCTLX_PHSXPRSC2, 8 .EQU ECCP5_PHSCTLX_PHSXPRSC1, 7 .EQU ECCP5_PHSCTLX_PHSXPRSC0, 6 .EQU ECCP5_PHSCTLX_PHSXSEL2, 5 .EQU ECCP5_PHSCTLX_PHSXSEL1, 4 .EQU ECCP5_PHSCTLX_PHSXSEL0, 3 .EQU ECCP5_PHSCTLX_PHSWTX, 2 .EQU ECCP5_PHSCTLX_PHSXMODE, 1 .EQU ECCP5_PHSCTLX_PHSENX, 0 // register------------------------------------- .EQU ECCP5_PHSCTLZ, 0x4000359C // 0x4000 359C ECCP5_PHSCTLZ Bits------------------------------------- .EQU ECCP5_PHSCTLZ_PHSZDIR, 15 .EQU ECCP5_PHSCTLZ_PHSZTIEN, 14 .EQU ECCP5_PHSCTLZ_PHSZTIME3, 13 .EQU ECCP5_PHSCTLZ_PHSZTIME2, 12 .EQU ECCP5_PHSCTLZ_PHSZTIME1, 11 .EQU ECCP5_PHSCTLZ_PHSZTIME0, 10 .EQU ECCP5_PHSCTLZ_PHSZPRSC3, 9 .EQU ECCP5_PHSCTLZ_PHSZPRSC2, 8 .EQU ECCP5_PHSCTLZ_PHSZPRSC1, 7 .EQU ECCP5_PHSCTLZ_PHSZPRSC0, 6 .EQU ECCP5_PHSCTLZ_PHSZSEL2, 5 .EQU ECCP5_PHSCTLZ_PHSZSEL1, 4 .EQU ECCP5_PHSCTLZ_PHSZSEL0, 3 .EQU ECCP5_PHSCTLZ_PHSWTZ, 2 .EQU ECCP5_PHSCTLZ_PHSZMODE, 1 .EQU ECCP5_PHSCTLZ_PHSENZ, 0 // register------------------------------------- .EQU T5_PHS, 0x400035A0 // 0x4000 35A0 T5_PHS Bits------------------------------------- .EQU T5_PHS_PHSX15, 15 .EQU T5_PHS_PHSX14, 14 .EQU T5_PHS_PHSX13, 13 .EQU T5_PHS_PHSX12, 12 .EQU T5_PHS_PHSX11, 11 .EQU T5_PHS_PHSX10, 10 .EQU T5_PHS_PHSX9, 9 .EQU T5_PHS_PHSX8, 8 .EQU T5_PHS_PHSX7, 7 .EQU T5_PHS_PHSX6, 6 .EQU T5_PHS_PHSX5, 5 .EQU T5_PHS_PHSX4, 4 .EQU T5_PHS_PHSX3, 3 .EQU T5_PHS_PHSX2, 2 .EQU T5_PHS_PHSX1, 1 .EQU T5_PHS_PHSX0, 0 // register------------------------------------- .EQU T6_PHS, 0x400035A4 // 0x4000 35A4 T6_PHS Bits------------------------------------- .EQU T6_PHS_PHSZ15, 15 .EQU T6_PHS_PHSZ14, 14 .EQU T6_PHS_PHSZ13, 13 .EQU T6_PHS_PHSZ12, 12 .EQU T6_PHS_PHSZ11, 11 .EQU T6_PHS_PHSZ10, 10 .EQU T6_PHS_PHSZ9, 9 .EQU T6_PHS_PHSZ8, 8 .EQU T6_PHS_PHSZ7, 7 .EQU T6_PHS_PHSZ6, 6 .EQU T6_PHS_PHSZ5, 5 .EQU T6_PHS_PHSZ4, 4 .EQU T6_PHS_PHSZ3, 3 .EQU T6_PHS_PHSZ2, 2 .EQU T6_PHS_PHSZ1, 1 .EQU T6_PHS_PHSZ0, 0 // register------------------------------------- .EQU ECCP5_CTL4, 0x400035A8 // 0x4000 35A8 ECCP5_CTL4 Bits------------------------------------- .EQU ECCP5_CTL4_CAPFILTEN4, 12 .EQU ECCP5_CTL4_CAPFILTEN3, 11 .EQU ECCP5_CTL4_CAPFILTEN2, 10 .EQU ECCP5_CTL4_CAPFILTEN1, 9 .EQU ECCP5_CTL4_TUDMODE1, 4 .EQU ECCP5_CTL4_TUDMODE0, 3 .EQU ECCP5_CTL4_TRGUDEN1, 2 .EQU ECCP5_CTL4_TRGUDEN0, 1 .EQU ECCP5_CTL4_TUDREN, 0 // register------------------------------------- .EQU ECCP5_PXDTCTL2, 0x400035AC // 0x4000 35AC ECCP5_PXDTCTL2 Bits------------------------------------- .EQU ECCP5_PXDTCTL2_CH2PXDC7, 15 .EQU ECCP5_PXDTCTL2_CH2PXDC6, 14 .EQU ECCP5_PXDTCTL2_CH2PXDC5, 13 .EQU ECCP5_PXDTCTL2_CH2PXDC4, 12 .EQU ECCP5_PXDTCTL2_CH2PXDC3, 11 .EQU ECCP5_PXDTCTL2_CH2PXDC2, 10 .EQU ECCP5_PXDTCTL2_CH2PXDC1, 9 .EQU ECCP5_PXDTCTL2_CH2PXDC0, 8 .EQU ECCP5_PXDTCTL2_CH1PXDC7, 7 .EQU ECCP5_PXDTCTL2_CH1PXDC6, 6 .EQU ECCP5_PXDTCTL2_CH1PXDC5, 5 .EQU ECCP5_PXDTCTL2_CH1PXDC4, 4 .EQU ECCP5_PXDTCTL2_CH1PXDC3, 3 .EQU ECCP5_PXDTCTL2_CH1PXDC2, 2 .EQU ECCP5_PXDTCTL2_CH1PXDC1, 1 .EQU ECCP5_PXDTCTL2_CH1PXDC0, 0 // register------------------------------------- .EQU ECCP5_PXDTCFG, 0x400035B0 // 0x4000 35B0 ECCP5_PXDTCFG Bits------------------------------------- .EQU ECCP5_PXDTCFG_CH4DTCLK3, 15 .EQU ECCP5_PXDTCFG_CH4DTCLK2, 14 .EQU ECCP5_PXDTCFG_CH4DTCLK1, 13 .EQU ECCP5_PXDTCFG_CH4DTCLK0, 12 .EQU ECCP5_PXDTCFG_CH3DTCLK3, 11 .EQU ECCP5_PXDTCFG_CH3DTCLK2, 10 .EQU ECCP5_PXDTCFG_CH3DTCLK1, 9 .EQU ECCP5_PXDTCFG_CH3DTCLK0, 8 .EQU ECCP5_PXDTCFG_CH2DTCLK3, 7 .EQU ECCP5_PXDTCFG_CH2DTCLK2, 6 .EQU ECCP5_PXDTCFG_CH2DTCLK1, 5 .EQU ECCP5_PXDTCFG_CH2DTCLK0, 4 .EQU ECCP5_PXDTCFG_CH1DTCLK3, 3 .EQU ECCP5_PXDTCFG_CH1DTCLK2, 2 .EQU ECCP5_PXDTCFG_CH1DTCLK1, 1 .EQU ECCP5_PXDTCFG_CH1DTCLK0, 0 // register------------------------------------- .EQU T9_CNT, 0x40003600 // 0x4000 3600 T9_CNT Bits------------------------------------- .EQU T9_CNT_TXCNT15, 15 .EQU T9_CNT_TXCNT14, 14 .EQU T9_CNT_TXCNT13, 13 .EQU T9_CNT_TXCNT12, 12 .EQU T9_CNT_TXCNT11, 11 .EQU T9_CNT_TXCNT10, 10 .EQU T9_CNT_TXCNT9, 9 .EQU T9_CNT_TXCNT8, 8 .EQU T9_CNT_TXCNT7, 7 .EQU T9_CNT_TXCNT6, 6 .EQU T9_CNT_TXCNT5, 5 .EQU T9_CNT_TXCNT4, 4 .EQU T9_CNT_TXCNT3, 3 .EQU T9_CNT_TXCNT2, 2 .EQU T9_CNT_TXCNT1, 1 .EQU T9_CNT_TXCNT0, 0 // register------------------------------------- .EQU T10_CNT, 0x40003604 // 0x4000 3604 T10_CNT Bits------------------------------------- .EQU T10_CNT_TZCNT15, 15 .EQU T10_CNT_TZCNT14, 14 .EQU T10_CNT_TZCNT13, 13 .EQU T10_CNT_TZCNT12, 12 .EQU T10_CNT_TZCNT11, 11 .EQU T10_CNT_TZCNT10, 10 .EQU T10_CNT_TZCNT9, 9 .EQU T10_CNT_TZCNT8, 8 .EQU T10_CNT_TZCNT7, 7 .EQU T10_CNT_TZCNT6, 6 .EQU T10_CNT_TZCNT5, 5 .EQU T10_CNT_TZCNT4, 4 .EQU T10_CNT_TZCNT3, 3 .EQU T10_CNT_TZCNT2, 2 .EQU T10_CNT_TZCNT1, 1 .EQU T10_CNT_TZCNT0, 0 // register------------------------------------- .EQU T9_PPX, 0x40003608 // 0x4000 3608 T9_PPX Bits------------------------------------- .EQU T9_PPX_PPX15, 15 .EQU T9_PPX_PPX14, 14 .EQU T9_PPX_PPX13, 13 .EQU T9_PPX_PPX12, 12 .EQU T9_PPX_PPX11, 11 .EQU T9_PPX_PPX10, 10 .EQU T9_PPX_PPX9, 9 .EQU T9_PPX_PPX8, 8 .EQU T9_PPX_PPX7, 7 .EQU T9_PPX_PPX6, 6 .EQU T9_PPX_PPX5, 5 .EQU T9_PPX_PPX4, 4 .EQU T9_PPX_PPX3, 3 .EQU T9_PPX_PPX2, 2 .EQU T9_PPX_PPX1, 1 .EQU T9_PPX_PPX0, 0 // register------------------------------------- .EQU T10_PPZ, 0x4000360C // 0x4000 360C T10_PPZ Bits------------------------------------- .EQU T10_PPZ_PPZ15, 15 .EQU T10_PPZ_PPZ14, 14 .EQU T10_PPZ_PPZ13, 13 .EQU T10_PPZ_PPZ12, 12 .EQU T10_PPZ_PPZ11, 11 .EQU T10_PPZ_PPZ10, 10 .EQU T10_PPZ_PPZ9, 9 .EQU T10_PPZ_PPZ8, 8 .EQU T10_PPZ_PPZ7, 7 .EQU T10_PPZ_PPZ6, 6 .EQU T10_PPZ_PPZ5, 5 .EQU T10_PPZ_PPZ4, 4 .EQU T10_PPZ_PPZ3, 3 .EQU T10_PPZ_PPZ2, 2 .EQU T10_PPZ_PPZ1, 1 .EQU T10_PPZ_PPZ0, 0 // register------------------------------------- .EQU T9_PRSC, 0x40003610 // 0x4000 3610 T9_PRSC Bits------------------------------------- .EQU T9_PRSC_TXCKS15, 15 .EQU T9_PRSC_TXCKS14, 14 .EQU T9_PRSC_TXCKS13, 13 .EQU T9_PRSC_TXCKS12, 12 .EQU T9_PRSC_TXCKS11, 11 .EQU T9_PRSC_TXCKS10, 10 .EQU T9_PRSC_TXCKS9, 9 .EQU T9_PRSC_TXCKS8, 8 .EQU T9_PRSC_TXCKS7, 7 .EQU T9_PRSC_TXCKS6, 6 .EQU T9_PRSC_TXCKS5, 5 .EQU T9_PRSC_TXCKS4, 4 .EQU T9_PRSC_TXCKS3, 3 .EQU T9_PRSC_TXCKS2, 2 .EQU T9_PRSC_TXCKS1, 1 .EQU T9_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T10_PRSC, 0x40003614 // 0x4000 3614 T10_PRSC Bits------------------------------------- .EQU T10_PRSC_TZCKS15, 15 .EQU T10_PRSC_TZCKS14, 14 .EQU T10_PRSC_TZCKS13, 13 .EQU T10_PRSC_TZCKS12, 12 .EQU T10_PRSC_TZCKS11, 11 .EQU T10_PRSC_TZCKS10, 10 .EQU T10_PRSC_TZCKS9, 9 .EQU T10_PRSC_TZCKS8, 8 .EQU T10_PRSC_TZCKS7, 7 .EQU T10_PRSC_TZCKS6, 6 .EQU T10_PRSC_TZCKS5, 5 .EQU T10_PRSC_TZCKS4, 4 .EQU T10_PRSC_TZCKS3, 3 .EQU T10_PRSC_TZCKS2, 2 .EQU T10_PRSC_TZCKS1, 1 .EQU T10_PRSC_TZCKS0, 0 // register------------------------------------- .EQU T9_CCR0, 0x40003618 // 0x4000 3618 T9_CCR0 Bits------------------------------------- .EQU T9_CCR0_TXCCR0_15, 15 .EQU T9_CCR0_TXCCR0_14, 14 .EQU T9_CCR0_TXCCR0_13, 13 .EQU T9_CCR0_TXCCR0_12, 12 .EQU T9_CCR0_TXCCR0_11, 11 .EQU T9_CCR0_TXCCR0_10, 10 .EQU T9_CCR0_TXCCR0_9, 9 .EQU T9_CCR0_TXCCR0_8, 8 .EQU T9_CCR0_TXCCR0_7, 7 .EQU T9_CCR0_TXCCR0_6, 6 .EQU T9_CCR0_TXCCR0_5, 5 .EQU T9_CCR0_TXCCR0_4, 4 .EQU T9_CCR0_TXCCR0_3, 3 .EQU T9_CCR0_TXCCR0_2, 2 .EQU T9_CCR0_TXCCR0_1, 1 .EQU T9_CCR0_TXCCR0_0, 0 // register------------------------------------- .EQU T9_CCR1, 0x4000361C // 0x4000 361C T9_CCR1 Bits------------------------------------- .EQU T9_CCR1_TXCCR1_15, 15 .EQU T9_CCR1_TXCCR1_14, 14 .EQU T9_CCR1_TXCCR1_13, 13 .EQU T9_CCR1_TXCCR1_12, 12 .EQU T9_CCR1_TXCCR1_11, 11 .EQU T9_CCR1_TXCCR1_10, 10 .EQU T9_CCR1_TXCCR1_9, 9 .EQU T9_CCR1_TXCCR1_8, 8 .EQU T9_CCR1_TXCCR1_7, 7 .EQU T9_CCR1_TXCCR1_6, 6 .EQU T9_CCR1_TXCCR1_5, 5 .EQU T9_CCR1_TXCCR1_4, 4 .EQU T9_CCR1_TXCCR1_3, 3 .EQU T9_CCR1_TXCCR1_2, 2 .EQU T9_CCR1_TXCCR1_1, 1 .EQU T9_CCR1_TXCCR1_0, 0 // register------------------------------------- .EQU T10_CCR0, 0x40003620 // 0x4000 3620 T10_CCR0 Bits------------------------------------- .EQU T10_CCR0_TZCCR15, 15 .EQU T10_CCR0_TZCCR14, 14 .EQU T10_CCR0_TZCCR13, 13 .EQU T10_CCR0_TZCCR12, 12 .EQU T10_CCR0_TZCCR11, 11 .EQU T10_CCR0_TZCCR10, 10 .EQU T10_CCR0_TZCCR9, 9 .EQU T10_CCR0_TZCCR8, 8 .EQU T10_CCR0_TZCCR7, 7 .EQU T10_CCR0_TZCCR6, 6 .EQU T10_CCR0_TZCCR5, 5 .EQU T10_CCR0_TZCCR4, 4 .EQU T10_CCR0_TZCCR3, 3 .EQU T10_CCR0_TZCCR2, 2 .EQU T10_CCR0_TZCCR1, 1 .EQU T10_CCR0_TZCCR0, 0 // register------------------------------------- .EQU T9_CTL, 0x40003624 // 0x4000 3624 T9_CTL Bits------------------------------------- .EQU T9_CTL_TXCMS2, 15 .EQU T9_CTL_TXCMS1, 14 .EQU T9_CTL_TXCMS0, 13 .EQU T9_CTL_TXOFS1, 12 .EQU T9_CTL_TXOFS0, 11 .EQU T9_CTL_TXADAUTO, 10 .EQU T9_CTL_TXCLK1, 9 .EQU T9_CTL_TXCLK0, 8 .EQU T9_CTL_TXDIR, 7 .EQU T9_CTL_TXCKBS3, 6 .EQU T9_CTL_TXCKBS2, 5 .EQU T9_CTL_TXCKBS1, 4 .EQU T9_CTL_TXCKBS0, 3 .EQU T9_CTL_TXEN, 2 .EQU T9_CTL_TXSY, 1 .EQU T9_CTL_TXCS, 0 // register------------------------------------- .EQU T10_CTL, 0x40003628 // 0x4000 3628 T10_CTL Bits------------------------------------- .EQU T10_CTL_TZCMS2, 15 .EQU T10_CTL_TZCMS1, 14 .EQU T10_CTL_TZCMS0, 13 .EQU T10_CTL_TZOFS1, 12 .EQU T10_CTL_TZOFS0, 11 .EQU T10_CTL_TZADAUTO, 10 .EQU T10_CTL_TZCLK1, 9 .EQU T10_CTL_TZCLK0, 8 .EQU T10_CTL_TZDIR, 7 .EQU T10_CTL_TZCKBS3, 6 .EQU T10_CTL_TZCKBS2, 5 .EQU T10_CTL_TZCKBS1, 4 .EQU T10_CTL_TZCKBS0, 3 .EQU T10_CTL_TZEN, 2 .EQU T10_CTL_TZSY, 1 .EQU T10_CTL_TZCS, 0 // register------------------------------------- .EQU ECCP9_PDCTL, 0x4000362C // 0x4000 362C ECCP9_PDCTL Bits------------------------------------- .EQU ECCP9_PDCTL_CPD2, 14 .EQU ECCP9_PDCTL_CPD1, 13 .EQU ECCP9_PDCTL_CPD0, 12 .EQU ECCP9_PDCTL_RDA2, 10 .EQU ECCP9_PDCTL_RDA1, 9 .EQU ECCP9_PDCTL_RDA0, 8 .EQU ECCP9_PDCTL_SMPEN, 7 .EQU ECCP9_PDCTL_TI2EN, 5 .EQU ECCP9_PDCTL_TI1EN, 4 .EQU ECCP9_PDCTL_TI0EN, 3 .EQU ECCP9_PDCTL_CMPE, 2 .EQU ECCP9_PDCTL_CPE1, 1 .EQU ECCP9_PDCTL_CPE0, 0 // register------------------------------------- .EQU ECCP9_PXASCTL, 0x40003630 // 0x4000 3630 ECCP9_PXASCTL Bits------------------------------------- .EQU ECCP9_PXASCTL_TZBKINS, 5 .EQU ECCP9_PXASCTL_TXBKINS, 4 .EQU ECCP9_PXASCTL_TZPXASS1, 3 .EQU ECCP9_PXASCTL_TZPXASS0, 2 .EQU ECCP9_PXASCTL_TXPXASS1, 1 .EQU ECCP9_PXASCTL_TXPXASS0, 0 // register------------------------------------- .EQU T9_CCTCTL, 0x40003634 // 0x4000 3634 T9_CCTCTL Bits------------------------------------- .EQU T9_CCTCTL_TXCKSEL1, 13 .EQU T9_CCTCTL_TXCKSEL0, 12 .EQU T9_CCTCTL_TCKDELAY2, 11 .EQU T9_CCTCTL_TCKDELAY1, 10 .EQU T9_CCTCTL_TCKDELAY0, 9 .EQU T9_CCTCTL_TCKDIV3, 8 .EQU T9_CCTCTL_TCKDIV2, 7 .EQU T9_CCTCTL_TCKDIV1, 6 .EQU T9_CCTCTL_TCKDIV0, 5 .EQU T9_CCTCTL_TCKFEN, 4 .EQU T9_CCTCTL_CCTSEL1, 3 .EQU T9_CCTCTL_CCTSEL0, 2 .EQU T9_CCTCTL_CRSET, 1 .EQU T9_CCTCTL_CCTEN, 0 // register------------------------------------- .EQU T10_CCTCTL, 0x40003638 // 0x4000 3638 T10_CCTCTL Bits------------------------------------- .EQU T10_CCTCTL_TZCKSEL1, 13 .EQU T10_CCTCTL_TZCKSEL0, 12 .EQU T10_CCTCTL_TCKDELAY2, 11 .EQU T10_CCTCTL_TCKDELAY1, 10 .EQU T10_CCTCTL_TCKDELAY0, 9 .EQU T10_CCTCTL_TCKDIV3, 8 .EQU T10_CCTCTL_TCKDIV2, 7 .EQU T10_CCTCTL_TCKDIV1, 6 .EQU T10_CCTCTL_TCKDIV0, 5 .EQU T10_CCTCTL_TCKFEN, 4 .EQU T10_CCTCTL_CCTSEL1, 3 .EQU T10_CCTCTL_CCTSEL0, 2 .EQU T10_CCTCTL_CRSET, 1 .EQU T10_CCTCTL_CCTEN, 0 // register------------------------------------- .EQU ECCP9_COMH1, 0x40003640 // 0x4000 3640 ECCP9_COMH1 Bits------------------------------------- .EQU ECCP9_COMH1_COMH15, 15 .EQU ECCP9_COMH1_COMH14, 14 .EQU ECCP9_COMH1_COMH13, 13 .EQU ECCP9_COMH1_COMH12, 12 .EQU ECCP9_COMH1_COMH11, 11 .EQU ECCP9_COMH1_COMH10, 10 .EQU ECCP9_COMH1_COMH9, 9 .EQU ECCP9_COMH1_COMH8, 8 .EQU ECCP9_COMH1_COMH7, 7 .EQU ECCP9_COMH1_COMH6, 6 .EQU ECCP9_COMH1_COMH5, 5 .EQU ECCP9_COMH1_COMH4, 4 .EQU ECCP9_COMH1_COMH3, 3 .EQU ECCP9_COMH1_COMH2, 2 .EQU ECCP9_COMH1_COMH1, 1 .EQU ECCP9_COMH1_COMH0, 0 // register------------------------------------- .EQU ECCP9_COML1, 0x40003644 // 0x4000 3644 ECCP9_COML1 Bits------------------------------------- .EQU ECCP9_COML1_COML15, 15 .EQU ECCP9_COML1_COML14, 14 .EQU ECCP9_COML1_COML13, 13 .EQU ECCP9_COML1_COML12, 12 .EQU ECCP9_COML1_COML11, 11 .EQU ECCP9_COML1_COML10, 10 .EQU ECCP9_COML1_COML9, 9 .EQU ECCP9_COML1_COML8, 8 .EQU ECCP9_COML1_COML7, 7 .EQU ECCP9_COML1_COML6, 6 .EQU ECCP9_COML1_COML5, 5 .EQU ECCP9_COML1_COML4, 4 .EQU ECCP9_COML1_COML3, 3 .EQU ECCP9_COML1_COML2, 2 .EQU ECCP9_COML1_COML1, 1 .EQU ECCP9_COML1_COML0, 0 // register------------------------------------- .EQU ECCP9_FAUCTL1, 0x40003648 // 0x4000 3648 ECCP9_FAUCTL1 Bits------------------------------------- .EQU ECCP9_FAUCTL1_TRST, 14 .EQU ECCP9_FAUCTL1_FINV1, 13 .EQU ECCP9_FAUCTL1_FINV0, 12 .EQU ECCP9_FAUCTL1_FVAL2, 11 .EQU ECCP9_FAUCTL1_FVAL1, 10 .EQU ECCP9_FAUCTL1_FVAL0, 9 .EQU ECCP9_FAUCTL1_FAUIF, 8 .EQU ECCP9_FAUCTL1_FAUIC, 7 .EQU ECCP9_FAUCTL1_FAUIE, 6 .EQU ECCP9_FAUCTL1_FLTEN, 5 .EQU ECCP9_FAUCTL1_FLTP3, 4 .EQU ECCP9_FAUCTL1_FLTP2, 3 .EQU ECCP9_FAUCTL1_FLTP1, 2 .EQU ECCP9_FAUCTL1_FLTP0, 1 .EQU ECCP9_FAUCTL1_FAUEN, 0 // register------------------------------------- .EQU ECCP9_DITCTL, 0x4000364C // 0x4000 364C ECCP9_DITCTL Bits------------------------------------- .EQU ECCP9_DITCTL_DCOMEN, 7 .EQU ECCP9_DITCTL_DPEEN, 6 .EQU ECCP9_DITCTL_DEDEN, 5 .EQU ECCP9_DITCTL_FRCVAL4, 4 .EQU ECCP9_DITCTL_FRCVAL3, 3 .EQU ECCP9_DITCTL_FRCVAL2, 2 .EQU ECCP9_DITCTL_FRCVAL1, 1 .EQU ECCP9_DITCTL_FRCVAL0, 0 // register------------------------------------- .EQU ECCP9_COMH2, 0x40003650 // 0x4000 3650 ECCP9_COMH2 Bits------------------------------------- .EQU ECCP9_COMH2_COMH15, 15 .EQU ECCP9_COMH2_COMH14, 14 .EQU ECCP9_COMH2_COMH13, 13 .EQU ECCP9_COMH2_COMH12, 12 .EQU ECCP9_COMH2_COMH11, 11 .EQU ECCP9_COMH2_COMH10, 10 .EQU ECCP9_COMH2_COMH9, 9 .EQU ECCP9_COMH2_COMH8, 8 .EQU ECCP9_COMH2_COMH7, 7 .EQU ECCP9_COMH2_COMH6, 6 .EQU ECCP9_COMH2_COMH5, 5 .EQU ECCP9_COMH2_COMH4, 4 .EQU ECCP9_COMH2_COMH3, 3 .EQU ECCP9_COMH2_COMH2, 2 .EQU ECCP9_COMH2_COMH1, 1 .EQU ECCP9_COMH2_COMH0, 0 // register------------------------------------- .EQU ECCP9_COML2, 0x40003654 // 0x4000 3654 ECCP9_COML2 Bits------------------------------------- .EQU ECCP9_COML2_COML15, 15 .EQU ECCP9_COML2_COML14, 14 .EQU ECCP9_COML2_COML13, 13 .EQU ECCP9_COML2_COML12, 12 .EQU ECCP9_COML2_COML11, 11 .EQU ECCP9_COML2_COML10, 10 .EQU ECCP9_COML2_COML9, 9 .EQU ECCP9_COML2_COML8, 8 .EQU ECCP9_COML2_COML7, 7 .EQU ECCP9_COML2_COML6, 6 .EQU ECCP9_COML2_COML5, 5 .EQU ECCP9_COML2_COML4, 4 .EQU ECCP9_COML2_COML3, 3 .EQU ECCP9_COML2_COML2, 2 .EQU ECCP9_COML2_COML1, 1 .EQU ECCP9_COML2_COML0, 0 // register------------------------------------- .EQU ECCP9_FAUCTL2, 0x40003658 // 0x4000 3658 ECCP9_FAUCTL2 Bits------------------------------------- .EQU ECCP9_FAUCTL2_TRST, 14 .EQU ECCP9_FAUCTL2_FINV1, 13 .EQU ECCP9_FAUCTL2_FINV0, 12 .EQU ECCP9_FAUCTL2_FVAL2, 11 .EQU ECCP9_FAUCTL2_FVAL1, 10 .EQU ECCP9_FAUCTL2_FVAL0, 9 .EQU ECCP9_FAUCTL2_FAUIF, 8 .EQU ECCP9_FAUCTL2_FAUIC, 7 .EQU ECCP9_FAUCTL2_FAUIE, 6 .EQU ECCP9_FAUCTL2_FLTEN, 5 .EQU ECCP9_FAUCTL2_FLTP3, 4 .EQU ECCP9_FAUCTL2_FLTP2, 3 .EQU ECCP9_FAUCTL2_FLTP1, 2 .EQU ECCP9_FAUCTL2_FLTP0, 1 .EQU ECCP9_FAUCTL2_FAUEN, 0 // register------------------------------------- .EQU ECCP9_CCRCTL, 0x4000365C // 0x4000 365C ECCP9_CCRCTL Bits------------------------------------- .EQU ECCP9_CCRCTL_TZCCR0SEL, 5 .EQU ECCP9_CCRCTL_TXCCR1SEL, 4 .EQU ECCP9_CCRCTL_TXCCR0SEL, 3 .EQU ECCP9_CCRCTL_TZCCR0SEN, 2 .EQU ECCP9_CCRCTL_TXCCR1SEN, 1 .EQU ECCP9_CCRCTL_TXCCR0SEN, 0 // register------------------------------------- .EQU ECCP9_COMH3, 0x40003660 // 0x4000 3660 ECCP9_COMH3 Bits------------------------------------- .EQU ECCP9_COMH3_COMH15, 15 .EQU ECCP9_COMH3_COMH14, 14 .EQU ECCP9_COMH3_COMH13, 13 .EQU ECCP9_COMH3_COMH12, 12 .EQU ECCP9_COMH3_COMH11, 11 .EQU ECCP9_COMH3_COMH10, 10 .EQU ECCP9_COMH3_COMH9, 9 .EQU ECCP9_COMH3_COMH8, 8 .EQU ECCP9_COMH3_COMH7, 7 .EQU ECCP9_COMH3_COMH6, 6 .EQU ECCP9_COMH3_COMH5, 5 .EQU ECCP9_COMH3_COMH4, 4 .EQU ECCP9_COMH3_COMH3, 3 .EQU ECCP9_COMH3_COMH2, 2 .EQU ECCP9_COMH3_COMH1, 1 .EQU ECCP9_COMH3_COMH0, 0 // register------------------------------------- .EQU ECCP9_COML3, 0x40003664 // 0x4000 3664 ECCP9_COML3 Bits------------------------------------- .EQU ECCP9_COML3_COML15, 15 .EQU ECCP9_COML3_COML14, 14 .EQU ECCP9_COML3_COML13, 13 .EQU ECCP9_COML3_COML12, 12 .EQU ECCP9_COML3_COML11, 11 .EQU ECCP9_COML3_COML10, 10 .EQU ECCP9_COML3_COML9, 9 .EQU ECCP9_COML3_COML8, 8 .EQU ECCP9_COML3_COML7, 7 .EQU ECCP9_COML3_COML6, 6 .EQU ECCP9_COML3_COML5, 5 .EQU ECCP9_COML3_COML4, 4 .EQU ECCP9_COML3_COML3, 3 .EQU ECCP9_COML3_COML2, 2 .EQU ECCP9_COML3_COML1, 1 .EQU ECCP9_COML3_COML0, 0 // register------------------------------------- .EQU ECCP9_FAUCTL3, 0x40003668 // 0x4000 3668 ECCP9_FAUCTL3 Bits------------------------------------- .EQU ECCP9_FAUCTL3_TRST, 14 .EQU ECCP9_FAUCTL3_FINV1, 13 .EQU ECCP9_FAUCTL3_FINV0, 12 .EQU ECCP9_FAUCTL3_FVAL2, 11 .EQU ECCP9_FAUCTL3_FVAL1, 10 .EQU ECCP9_FAUCTL3_FVAL0, 9 .EQU ECCP9_FAUCTL3_FAUIF, 8 .EQU ECCP9_FAUCTL3_FAUIC, 7 .EQU ECCP9_FAUCTL3_FAUIE, 6 .EQU ECCP9_FAUCTL3_FLTEN, 5 .EQU ECCP9_FAUCTL3_FLTP3, 4 .EQU ECCP9_FAUCTL3_FLTP2, 3 .EQU ECCP9_FAUCTL3_FLTP1, 2 .EQU ECCP9_FAUCTL3_FLTP0, 1 .EQU ECCP9_FAUCTL3_FAUEN, 0 // register------------------------------------- .EQU ECCP9_COMH4, 0x40003670 // 0x4000 3670 ECCP9_COMH4 Bits------------------------------------- .EQU ECCP9_COMH4_COMH15, 15 .EQU ECCP9_COMH4_COMH14, 14 .EQU ECCP9_COMH4_COMH13, 13 .EQU ECCP9_COMH4_COMH12, 12 .EQU ECCP9_COMH4_COMH11, 11 .EQU ECCP9_COMH4_COMH10, 10 .EQU ECCP9_COMH4_COMH9, 9 .EQU ECCP9_COMH4_COMH8, 8 .EQU ECCP9_COMH4_COMH7, 7 .EQU ECCP9_COMH4_COMH6, 6 .EQU ECCP9_COMH4_COMH5, 5 .EQU ECCP9_COMH4_COMH4, 4 .EQU ECCP9_COMH4_COMH3, 3 .EQU ECCP9_COMH4_COMH2, 2 .EQU ECCP9_COMH4_COMH1, 1 .EQU ECCP9_COMH4_COMH0, 0 // register------------------------------------- .EQU ECCP9_COML4, 0x40003674 // 0x4000 3674 ECCP9_COML4 Bits------------------------------------- .EQU ECCP9_COML4_COML15, 15 .EQU ECCP9_COML4_COML14, 14 .EQU ECCP9_COML4_COML13, 13 .EQU ECCP9_COML4_COML12, 12 .EQU ECCP9_COML4_COML11, 11 .EQU ECCP9_COML4_COML10, 10 .EQU ECCP9_COML4_COML9, 9 .EQU ECCP9_COML4_COML8, 8 .EQU ECCP9_COML4_COML7, 7 .EQU ECCP9_COML4_COML6, 6 .EQU ECCP9_COML4_COML5, 5 .EQU ECCP9_COML4_COML4, 4 .EQU ECCP9_COML4_COML3, 3 .EQU ECCP9_COML4_COML2, 2 .EQU ECCP9_COML4_COML1, 1 .EQU ECCP9_COML4_COML0, 0 // register------------------------------------- .EQU ECCP9_FAUCTL4, 0x40003678 // 0x4000 3678 ECCP9_FAUCTL4 Bits------------------------------------- .EQU ECCP9_FAUCTL4_TRST, 14 .EQU ECCP9_FAUCTL4_FINV1, 13 .EQU ECCP9_FAUCTL4_FINV0, 12 .EQU ECCP9_FAUCTL4_FVAL2, 11 .EQU ECCP9_FAUCTL4_FVAL1, 10 .EQU ECCP9_FAUCTL4_FVAL0, 9 .EQU ECCP9_FAUCTL4_FAUIF, 8 .EQU ECCP9_FAUCTL4_FAUIC, 7 .EQU ECCP9_FAUCTL4_FAUIE, 6 .EQU ECCP9_FAUCTL4_FLTEN, 5 .EQU ECCP9_FAUCTL4_FLTP3, 4 .EQU ECCP9_FAUCTL4_FLTP2, 3 .EQU ECCP9_FAUCTL4_FLTP1, 2 .EQU ECCP9_FAUCTL4_FLTP0, 1 .EQU ECCP9_FAUCTL4_FAUEN, 0 // register------------------------------------- .EQU ECCP9_CTL1, 0x40003680 // 0x4000 3680 ECCP9_CTL1 Bits------------------------------------- .EQU ECCP9_CTL1_CH4M3, 15 .EQU ECCP9_CTL1_CH4M2, 14 .EQU ECCP9_CTL1_CH4M1, 13 .EQU ECCP9_CTL1_CH4M0, 12 .EQU ECCP9_CTL1_CH3M3, 11 .EQU ECCP9_CTL1_CH3M2, 10 .EQU ECCP9_CTL1_CH3M1, 9 .EQU ECCP9_CTL1_CH3M0, 8 .EQU ECCP9_CTL1_CH2M3, 7 .EQU ECCP9_CTL1_CH2M2, 6 .EQU ECCP9_CTL1_CH2M1, 5 .EQU ECCP9_CTL1_CH2M0, 4 .EQU ECCP9_CTL1_CH1M3, 3 .EQU ECCP9_CTL1_CH1M2, 2 .EQU ECCP9_CTL1_CH1M1, 1 .EQU ECCP9_CTL1_CH1M0, 0 // register------------------------------------- .EQU ECCP9_R1, 0x40003684 // 0x4000 3684 ECCP9_R1 Bits------------------------------------- .EQU ECCP9_R1_ECCPXRY15, 15 .EQU ECCP9_R1_ECCPXRY14, 14 .EQU ECCP9_R1_ECCPXRY13, 13 .EQU ECCP9_R1_ECCPXRY12, 12 .EQU ECCP9_R1_ECCPXRY11, 11 .EQU ECCP9_R1_ECCPXRY10, 10 .EQU ECCP9_R1_ECCPXRY9, 9 .EQU ECCP9_R1_ECCPXRY8, 8 .EQU ECCP9_R1_ECCPXRY7, 7 .EQU ECCP9_R1_ECCPXRY6, 6 .EQU ECCP9_R1_ECCPXRY5, 5 .EQU ECCP9_R1_ECCPXRY4, 4 .EQU ECCP9_R1_ECCPXRY3, 3 .EQU ECCP9_R1_ECCPXRY2, 2 .EQU ECCP9_R1_ECCPXRY1, 1 .EQU ECCP9_R1_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP9_R2, 0x40003688 // 0x4000 3688 ECCP9_R2 Bits------------------------------------- .EQU ECCP9_R2_ECCPXRY15, 15 .EQU ECCP9_R2_ECCPXRY14, 14 .EQU ECCP9_R2_ECCPXRY13, 13 .EQU ECCP9_R2_ECCPXRY12, 12 .EQU ECCP9_R2_ECCPXRY11, 11 .EQU ECCP9_R2_ECCPXRY10, 10 .EQU ECCP9_R2_ECCPXRY9, 9 .EQU ECCP9_R2_ECCPXRY8, 8 .EQU ECCP9_R2_ECCPXRY7, 7 .EQU ECCP9_R2_ECCPXRY6, 6 .EQU ECCP9_R2_ECCPXRY5, 5 .EQU ECCP9_R2_ECCPXRY4, 4 .EQU ECCP9_R2_ECCPXRY3, 3 .EQU ECCP9_R2_ECCPXRY2, 2 .EQU ECCP9_R2_ECCPXRY1, 1 .EQU ECCP9_R2_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP9_R3, 0x4000368C // 0x4000 368C ECCP9_R3 Bits------------------------------------- .EQU ECCP9_R3_ECCPXRY15, 15 .EQU ECCP9_R3_ECCPXRY14, 14 .EQU ECCP9_R3_ECCPXRY13, 13 .EQU ECCP9_R3_ECCPXRY12, 12 .EQU ECCP9_R3_ECCPXRY11, 11 .EQU ECCP9_R3_ECCPXRY10, 10 .EQU ECCP9_R3_ECCPXRY9, 9 .EQU ECCP9_R3_ECCPXRY8, 8 .EQU ECCP9_R3_ECCPXRY7, 7 .EQU ECCP9_R3_ECCPXRY6, 6 .EQU ECCP9_R3_ECCPXRY5, 5 .EQU ECCP9_R3_ECCPXRY4, 4 .EQU ECCP9_R3_ECCPXRY3, 3 .EQU ECCP9_R3_ECCPXRY2, 2 .EQU ECCP9_R3_ECCPXRY1, 1 .EQU ECCP9_R3_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP9_R4, 0x40003690 // 0x4000 3690 ECCP9_R4 Bits------------------------------------- .EQU ECCP9_R4_ECCPXRY15, 15 .EQU ECCP9_R4_ECCPXRY14, 14 .EQU ECCP9_R4_ECCPXRY13, 13 .EQU ECCP9_R4_ECCPXRY12, 12 .EQU ECCP9_R4_ECCPXRY11, 11 .EQU ECCP9_R4_ECCPXRY10, 10 .EQU ECCP9_R4_ECCPXRY9, 9 .EQU ECCP9_R4_ECCPXRY8, 8 .EQU ECCP9_R4_ECCPXRY7, 7 .EQU ECCP9_R4_ECCPXRY6, 6 .EQU ECCP9_R4_ECCPXRY5, 5 .EQU ECCP9_R4_ECCPXRY4, 4 .EQU ECCP9_R4_ECCPXRY3, 3 .EQU ECCP9_R4_ECCPXRY2, 2 .EQU ECCP9_R4_ECCPXRY1, 1 .EQU ECCP9_R4_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP9_PXUDCTL, 0x40003694 // 0x4000 3694 ECCP9_PXUDCTL Bits------------------------------------- .EQU ECCP9_PXUDCTL_TZIFUDREN, 10 .EQU ECCP9_PXUDCTL_TZUDR, 9 .EQU ECCP9_PXUDCTL_TXIFUDREN, 8 .EQU ECCP9_PXUDCTL_TXUDR, 7 .EQU ECCP9_PXUDCTL_PXMPEN, 6 .EQU ECCP9_PXUDCTL_PXUDEVT3, 5 .EQU ECCP9_PXUDCTL_PXUDEVT2, 4 .EQU ECCP9_PXUDCTL_PXUDEVT1, 3 .EQU ECCP9_PXUDCTL_PXUDEVT0, 2 .EQU ECCP9_PXUDCTL_PXUDEN1, 1 .EQU ECCP9_PXUDCTL_PXUDEN0, 0 // register------------------------------------- .EQU ECCP9_CTL2, 0x40003698 // 0x4000 3698 ECCP9_CTL2 Bits------------------------------------- .EQU ECCP9_CTL2_TZSMS2, 15 .EQU ECCP9_CTL2_TZSMS1, 14 .EQU ECCP9_CTL2_TZSMS0, 13 .EQU ECCP9_CTL2_PXPWMI, 12 .EQU ECCP9_CTL2_PXXORM, 11 .EQU ECCP9_CTL2_PXSPM, 10 .EQU ECCP9_CTL2_TXMSSYNC, 9 .EQU ECCP9_CTL2_TXTS2, 8 .EQU ECCP9_CTL2_TXTS1, 7 .EQU ECCP9_CTL2_TXTS0, 6 .EQU ECCP9_CTL2_TXSMS2, 5 .EQU ECCP9_CTL2_TXSMS1, 4 .EQU ECCP9_CTL2_TXSMS0, 3 .EQU ECCP9_CTL2_TXMMS2, 2 .EQU ECCP9_CTL2_TXMMS1, 1 .EQU ECCP9_CTL2_TXMMS0, 0 // register------------------------------------- .EQU ECCP9_PXDTCTL, 0x4000369C // 0x4000 369C ECCP9_PXDTCTL Bits------------------------------------- .EQU ECCP9_PXDTCTL_PZDC7, 15 .EQU ECCP9_PXDTCTL_PZDC6, 14 .EQU ECCP9_PXDTCTL_PZDC5, 13 .EQU ECCP9_PXDTCTL_PZDC4, 12 .EQU ECCP9_PXDTCTL_PZDC3, 11 .EQU ECCP9_PXDTCTL_PZDC2, 10 .EQU ECCP9_PXDTCTL_PZDC1, 9 .EQU ECCP9_PXDTCTL_PZDC0, 8 .EQU ECCP9_PXDTCTL_PXDC7, 7 .EQU ECCP9_PXDTCTL_PXDC6, 6 .EQU ECCP9_PXDTCTL_PXDC5, 5 .EQU ECCP9_PXDTCTL_PXDC4, 4 .EQU ECCP9_PXDTCTL_PXDC3, 3 .EQU ECCP9_PXDTCTL_PXDC2, 2 .EQU ECCP9_PXDTCTL_PXDC1, 1 .EQU ECCP9_PXDTCTL_PXDC0, 0 // register------------------------------------- .EQU ECCP9_PWMXOC, 0x400036A0 // 0x4000 36A0 ECCP9_PWMXOC Bits------------------------------------- .EQU ECCP9_PWMXOC_PXOC4H1, 15 .EQU ECCP9_PWMXOC_PXOC4H0, 14 .EQU ECCP9_PWMXOC_PXOC4L1, 13 .EQU ECCP9_PWMXOC_PXOC4L0, 12 .EQU ECCP9_PWMXOC_PXOC3H1, 11 .EQU ECCP9_PWMXOC_PXOC3H0, 10 .EQU ECCP9_PWMXOC_PXOC3L1, 9 .EQU ECCP9_PWMXOC_PXOC3L0, 8 .EQU ECCP9_PWMXOC_PXOC2H1, 7 .EQU ECCP9_PWMXOC_PXOC2H0, 6 .EQU ECCP9_PWMXOC_PXOC2L1, 5 .EQU ECCP9_PWMXOC_PXOC2L0, 4 .EQU ECCP9_PWMXOC_PXOC1H1, 3 .EQU ECCP9_PWMXOC_PXOC1H0, 2 .EQU ECCP9_PWMXOC_PXOC1L1, 1 .EQU ECCP9_PWMXOC_PXOC1L0, 0 // register------------------------------------- .EQU ECCP9_PXATRCTL, 0x400036A4 // 0x4000 36A4 ECCP9_PXATRCTL Bits------------------------------------- .EQU ECCP9_PXATRCTL_PXCH4MOD, 11 .EQU ECCP9_PXATRCTL_PXCH3MOD, 10 .EQU ECCP9_PXATRCTL_PXCH2MOD, 9 .EQU ECCP9_PXATRCTL_PXCH1MOD, 8 // register------------------------------------- .EQU ECCP9_PXASCTL0, 0x400036A8 // 0x4000 36A8 ECCP9_PXASCTL0 Bits------------------------------------- .EQU ECCP9_PXASCTL0_PXASE4, 11 .EQU ECCP9_PXASCTL0_PXASE3, 10 .EQU ECCP9_PXASCTL0_PXASE2, 9 .EQU ECCP9_PXASCTL0_PXASE1, 8 .EQU ECCP9_PXASCTL0_PXASS4_1, 7 .EQU ECCP9_PXASCTL0_PXASS4_0, 6 .EQU ECCP9_PXASCTL0_PXASS3_1, 5 .EQU ECCP9_PXASCTL0_PXASS3_0, 4 .EQU ECCP9_PXASCTL0_PXASS2_1, 3 .EQU ECCP9_PXASCTL0_PXASS2_0, 2 .EQU ECCP9_PXASCTL0_PXASS1_1, 1 .EQU ECCP9_PXASCTL0_PXASS1_0, 0 // register------------------------------------- .EQU ECCP9_PXASCTL1, 0x400036AC // 0x4000 36AC ECCP9_PXASCTL1 Bits------------------------------------- .EQU ECCP9_PXASCTL1_PXSS4H1, 15 .EQU ECCP9_PXASCTL1_PXSS4H0, 14 .EQU ECCP9_PXASCTL1_PXSS4L1, 13 .EQU ECCP9_PXASCTL1_PXSS4L0, 12 .EQU ECCP9_PXASCTL1_PXSS3H1, 11 .EQU ECCP9_PXASCTL1_PXSS3H0, 10 .EQU ECCP9_PXASCTL1_PXSS3L1, 9 .EQU ECCP9_PXASCTL1_PXSS3L0, 8 .EQU ECCP9_PXASCTL1_PXSS2H1, 7 .EQU ECCP9_PXASCTL1_PXSS2H0, 6 .EQU ECCP9_PXASCTL1_PXSS2L1, 5 .EQU ECCP9_PXASCTL1_PXSS2L0, 4 .EQU ECCP9_PXASCTL1_PXSS1H1, 3 .EQU ECCP9_PXASCTL1_PXSS1H0, 2 .EQU ECCP9_PXASCTL1_PXSS1L1, 1 .EQU ECCP9_PXASCTL1_PXSS1L0, 0 // register------------------------------------- .EQU ECCP9_ZPDCTL0, 0x400036B0 // 0x4000 36B0 ECCP9_ZPDCTL0 Bits------------------------------------- .EQU ECCP9_ZPDCTL0_ZCLK3, 11 .EQU ECCP9_ZPDCTL0_ZCLK2, 10 .EQU ECCP9_ZPDCTL0_ZCLK1, 9 .EQU ECCP9_ZPDCTL0_ZCLK0, 8 .EQU ECCP9_ZPDCTL0_ZPD4TWEIN, 7 .EQU ECCP9_ZPDCTL0_ZPD3TWEIN, 6 .EQU ECCP9_ZPDCTL0_ZPD2TWEIN, 5 .EQU ECCP9_ZPDCTL0_ZPD1TWEIN, 4 .EQU ECCP9_ZPDCTL0_ZPD4FLAG, 3 .EQU ECCP9_ZPDCTL0_ZPD3FLAG, 2 .EQU ECCP9_ZPDCTL0_ZPD2FLAG, 1 .EQU ECCP9_ZPDCTL0_ZPD1FLAG, 0 // register------------------------------------- .EQU ECCP9_ZPDCTL1, 0x400036B4 // 0x4000 36B4 ECCP9_ZPDCTL1 Bits------------------------------------- .EQU ECCP9_ZPDCTL1_ZPD4EN, 15 .EQU ECCP9_ZPDCTL1_ZPD3EN, 14 .EQU ECCP9_ZPDCTL1_ZPD2EN, 13 .EQU ECCP9_ZPDCTL1_ZPD1EN, 12 .EQU ECCP9_ZPDCTL1_ZPD4S2, 11 .EQU ECCP9_ZPDCTL1_ZPD4S1, 10 .EQU ECCP9_ZPDCTL1_ZPD4S0, 9 .EQU ECCP9_ZPDCTL1_ZPD3S2, 8 .EQU ECCP9_ZPDCTL1_ZPD3S1, 7 .EQU ECCP9_ZPDCTL1_ZPD3S0, 6 .EQU ECCP9_ZPDCTL1_ZPD2S2, 5 .EQU ECCP9_ZPDCTL1_ZPD2S1, 4 .EQU ECCP9_ZPDCTL1_ZPD2S0, 3 .EQU ECCP9_ZPDCTL1_ZPD1S2, 2 .EQU ECCP9_ZPDCTL1_ZPD1S1, 1 .EQU ECCP9_ZPDCTL1_ZPD1S0, 0 // register------------------------------------- .EQU ECCP9_ZPDPORT, 0x400036B8 // 0x4000 36B8 ECCP9_ZPDPORT Bits------------------------------------- .EQU ECCP9_ZPDPORT_ZPORT7, 7 .EQU ECCP9_ZPDPORT_ZPORT6, 6 .EQU ECCP9_ZPDPORT_ZPORT5, 5 .EQU ECCP9_ZPDPORT_ZPORT4, 4 .EQU ECCP9_ZPDPORT_ZPORT3, 3 .EQU ECCP9_ZPDPORT_ZPORT2, 2 .EQU ECCP9_ZPDPORT_ZPORT1, 1 .EQU ECCP9_ZPDPORT_ZPORT0, 0 // register------------------------------------- .EQU ECCP9_IE, 0x400036BC // 0x4000 36BC ECCP9_IE Bits------------------------------------- .EQU ECCP9_IE_PDIE, 10 .EQU ECCP9_IE_CPIE, 9 .EQU ECCP9_IE_TXUIE, 8 .EQU ECCP9_IE_TZUIE, 7 .EQU ECCP9_IE_TXIE, 6 .EQU ECCP9_IE_TZIE, 5 .EQU ECCP9_IE_TXTIE, 4 .EQU ECCP9_IE_CC4IE, 3 .EQU ECCP9_IE_CC3IE, 2 .EQU ECCP9_IE_CC2IE, 1 .EQU ECCP9_IE_CC1IE, 0 // register------------------------------------- .EQU ECCP9_EGIF, 0x400036C0 // 0x4000 36C0 ECCP9_EGIF Bits------------------------------------- .EQU ECCP9_EGIF_PDIF, 15 .EQU ECCP9_EGIF_TXUIF, 14 .EQU ECCP9_EGIF_TZUIF, 13 .EQU ECCP9_EGIF_TXIF, 12 .EQU ECCP9_EGIF_TZIF, 11 .EQU ECCP9_EGIF_TXTIF, 10 .EQU ECCP9_EGIF_CC4IF, 9 .EQU ECCP9_EGIF_CC3IF, 8 .EQU ECCP9_EGIF_CC2IF, 7 .EQU ECCP9_EGIF_CC1IF, 6 .EQU ECCP9_EGIF_TXTRG, 5 .EQU ECCP9_EGIF_CC4G, 4 .EQU ECCP9_EGIF_CC3G, 3 .EQU ECCP9_EGIF_CC2G, 2 .EQU ECCP9_EGIF_CC1G, 1 .EQU ECCP9_EGIF_CPIF, 0 // register------------------------------------- .EQU T9_UDTIMX, 0x400036C4 // 0x4000 36C4 T9_UDTIMX Bits------------------------------------- .EQU T9_UDTIMX_UDCNT7, 7 .EQU T9_UDTIMX_UDCNT6, 6 .EQU T9_UDTIMX_UDCNT5, 5 .EQU T9_UDTIMX_UDCNT4, 4 .EQU T9_UDTIMX_UDCNT3, 3 .EQU T9_UDTIMX_UDCNT2, 2 .EQU T9_UDTIMX_UDCNT1, 1 .EQU T9_UDTIMX_UDCNT0, 0 // register------------------------------------- .EQU T10_UDTIMZ, 0x400036C8 // 0x4000 36C8 T10_UDTIMZ Bits------------------------------------- .EQU T10_UDTIMZ_UDCNT7, 7 .EQU T10_UDTIMZ_UDCNT6, 6 .EQU T10_UDTIMZ_UDCNT5, 5 .EQU T10_UDTIMZ_UDCNT4, 4 .EQU T10_UDTIMZ_UDCNT3, 3 .EQU T10_UDTIMZ_UDCNT2, 2 .EQU T10_UDTIMZ_UDCNT1, 1 .EQU T10_UDTIMZ_UDCNT0, 0 // register------------------------------------- .EQU ECCP9_DF, 0x400036CC // 0x4000 36CC ECCP9_DF Bits------------------------------------- .EQU ECCP9_DF_TXUDF, 7 .EQU ECCP9_DF_TZUDF, 6 .EQU ECCP9_DF_TRIGDF, 5 .EQU ECCP9_DF_CLSDF, 4 .EQU ECCP9_DF_CH4DF, 3 .EQU ECCP9_DF_CH3DF, 2 .EQU ECCP9_DF_CH2DF, 1 .EQU ECCP9_DF_CH1DF, 0 // register------------------------------------- .EQU ECCP9_C1, 0x400036D0 // 0x4000 36D0 ECCP9_C1 Bits------------------------------------- .EQU ECCP9_C1_ECCPXCY15, 15 .EQU ECCP9_C1_ECCPXCY14, 14 .EQU ECCP9_C1_ECCPXCY13, 13 .EQU ECCP9_C1_ECCPXCY12, 12 .EQU ECCP9_C1_ECCPXCY11, 11 .EQU ECCP9_C1_ECCPXCY10, 10 .EQU ECCP9_C1_ECCPXCY9, 9 .EQU ECCP9_C1_ECCPXCY8, 8 .EQU ECCP9_C1_ECCPXCY7, 7 .EQU ECCP9_C1_ECCPXCY6, 6 .EQU ECCP9_C1_ECCPXCY5, 5 .EQU ECCP9_C1_ECCPXCY4, 4 .EQU ECCP9_C1_ECCPXCY3, 3 .EQU ECCP9_C1_ECCPXCY2, 2 .EQU ECCP9_C1_ECCPXCY1, 1 .EQU ECCP9_C1_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP9_C2, 0x400036D4 // 0x4000 36D4 ECCP9_C2 Bits------------------------------------- .EQU ECCP9_C2_ECCPXCY15, 15 .EQU ECCP9_C2_ECCPXCY14, 14 .EQU ECCP9_C2_ECCPXCY13, 13 .EQU ECCP9_C2_ECCPXCY12, 12 .EQU ECCP9_C2_ECCPXCY11, 11 .EQU ECCP9_C2_ECCPXCY10, 10 .EQU ECCP9_C2_ECCPXCY9, 9 .EQU ECCP9_C2_ECCPXCY8, 8 .EQU ECCP9_C2_ECCPXCY7, 7 .EQU ECCP9_C2_ECCPXCY6, 6 .EQU ECCP9_C2_ECCPXCY5, 5 .EQU ECCP9_C2_ECCPXCY4, 4 .EQU ECCP9_C2_ECCPXCY3, 3 .EQU ECCP9_C2_ECCPXCY2, 2 .EQU ECCP9_C2_ECCPXCY1, 1 .EQU ECCP9_C2_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP9_C3, 0x400036D8 // 0x4000 36D8 ECCP9_C3 Bits------------------------------------- .EQU ECCP9_C3_ECCPXCY15, 15 .EQU ECCP9_C3_ECCPXCY14, 14 .EQU ECCP9_C3_ECCPXCY13, 13 .EQU ECCP9_C3_ECCPXCY12, 12 .EQU ECCP9_C3_ECCPXCY11, 11 .EQU ECCP9_C3_ECCPXCY10, 10 .EQU ECCP9_C3_ECCPXCY9, 9 .EQU ECCP9_C3_ECCPXCY8, 8 .EQU ECCP9_C3_ECCPXCY7, 7 .EQU ECCP9_C3_ECCPXCY6, 6 .EQU ECCP9_C3_ECCPXCY5, 5 .EQU ECCP9_C3_ECCPXCY4, 4 .EQU ECCP9_C3_ECCPXCY3, 3 .EQU ECCP9_C3_ECCPXCY2, 2 .EQU ECCP9_C3_ECCPXCY1, 1 .EQU ECCP9_C3_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP9_C4, 0x400036DC // 0x4000 36DC ECCP9_C4 Bits------------------------------------- .EQU ECCP9_C4_ECCPXCY15, 15 .EQU ECCP9_C4_ECCPXCY14, 14 .EQU ECCP9_C4_ECCPXCY13, 13 .EQU ECCP9_C4_ECCPXCY12, 12 .EQU ECCP9_C4_ECCPXCY11, 11 .EQU ECCP9_C4_ECCPXCY10, 10 .EQU ECCP9_C4_ECCPXCY9, 9 .EQU ECCP9_C4_ECCPXCY8, 8 .EQU ECCP9_C4_ECCPXCY7, 7 .EQU ECCP9_C4_ECCPXCY6, 6 .EQU ECCP9_C4_ECCPXCY5, 5 .EQU ECCP9_C4_ECCPXCY4, 4 .EQU ECCP9_C4_ECCPXCY3, 3 .EQU ECCP9_C4_ECCPXCY2, 2 .EQU ECCP9_C4_ECCPXCY1, 1 .EQU ECCP9_C4_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP9_DE, 0x400036E4 // 0x4000 36E4 ECCP9_DE Bits------------------------------------- .EQU ECCP9_DE_TXUDE, 7 .EQU ECCP9_DE_TZUDE, 6 .EQU ECCP9_DE_TXTDE, 5 .EQU ECCP9_DE_CLSDE, 4 .EQU ECCP9_DE_CH4DE, 3 .EQU ECCP9_DE_CH3DE, 2 .EQU ECCP9_DE_CH2DE, 1 .EQU ECCP9_DE_CH1DE, 0 // register------------------------------------- .EQU ECCP9_SRIC, 0x400036E8 // 0x4000 36E8 ECCP9_SRIC Bits------------------------------------- .EQU ECCP9_SRIC_PDIC, 10 .EQU ECCP9_SRIC_CPIC, 9 .EQU ECCP9_SRIC_TXUIC, 8 .EQU ECCP9_SRIC_TZUIC, 7 .EQU ECCP9_SRIC_TXIC, 6 .EQU ECCP9_SRIC_TZIC, 5 .EQU ECCP9_SRIC_TXTIC, 4 .EQU ECCP9_SRIC_CC4IC, 3 .EQU ECCP9_SRIC_CC3IC, 2 .EQU ECCP9_SRIC_CC2IC, 1 .EQU ECCP9_SRIC_CC1IC, 0 // register------------------------------------- .EQU ECCP9_CTL3, 0x400036EC // 0x4000 36EC ECCP9_CTL3 Bits------------------------------------- .EQU ECCP9_CTL3_TRGSEL1, 14 .EQU ECCP9_CTL3_TRGSEL0, 13 .EQU ECCP9_CTL3_CH3HM, 12 .EQU ECCP9_CTL3_CH2HM, 11 .EQU ECCP9_CTL3_CH1HM, 10 .EQU ECCP9_CTL3_CH0HM, 9 .EQU ECCP9_CTL3_GTBEOUT, 8 .EQU ECCP9_CTL3_GTBEN, 7 .EQU ECCP9_CTL3_CAPTST, 6 .EQU ECCP9_CTL3_COMINV1, 5 .EQU ECCP9_CTL3_COMINV0, 4 .EQU ECCP9_CTL3_COMBEN, 3 .EQU ECCP9_CTL3_PXRSEN, 2 .EQU ECCP9_CTL3_TUNITE, 1 .EQU ECCP9_CTL3_PXSPMST, 0 // register------------------------------------- .EQU ECCP9_CAPPRSC, 0x40003700 // 0x4000 3700 ECCP9_CAPPRSC Bits------------------------------------- .EQU ECCP9_CAPPRSC_CH4CAPPR3, 15 .EQU ECCP9_CAPPRSC_CH4CAPPR2, 14 .EQU ECCP9_CAPPRSC_CH4CAPPR1, 13 .EQU ECCP9_CAPPRSC_CH4CAPPR0, 12 .EQU ECCP9_CAPPRSC_CH3CAPPR3, 11 .EQU ECCP9_CAPPRSC_CH3CAPPR2, 10 .EQU ECCP9_CAPPRSC_CH3CAPPR1, 9 .EQU ECCP9_CAPPRSC_CH3CAPPR0, 8 .EQU ECCP9_CAPPRSC_CH2CAPPR3, 7 .EQU ECCP9_CAPPRSC_CH2CAPPR2, 6 .EQU ECCP9_CAPPRSC_CH2CAPPR1, 5 .EQU ECCP9_CAPPRSC_CH2CAPPR0, 4 .EQU ECCP9_CAPPRSC_CH1CAPPR3, 3 .EQU ECCP9_CAPPRSC_CH1CAPPR2, 2 .EQU ECCP9_CAPPRSC_CH1CAPPR1, 1 .EQU ECCP9_CAPPRSC_CH1CAPPR0, 0 // register------------------------------------- .EQU ECCP9_CAPTIME, 0x40003704 // 0x4000 3704 ECCP9_CAPTIME Bits------------------------------------- .EQU ECCP9_CAPTIME_CH4CAPTIME3, 15 .EQU ECCP9_CAPTIME_CH4CAPTIME2, 14 .EQU ECCP9_CAPTIME_CH4CAPTIME1, 13 .EQU ECCP9_CAPTIME_CH4CAPTIME0, 12 .EQU ECCP9_CAPTIME_CH3CAPTIME3, 11 .EQU ECCP9_CAPTIME_CH3CAPTIME2, 10 .EQU ECCP9_CAPTIME_CH3CAPTIME1, 9 .EQU ECCP9_CAPTIME_CH3CAPTIME0, 8 .EQU ECCP9_CAPTIME_CH2CAPTIME3, 7 .EQU ECCP9_CAPTIME_CH2CAPTIME2, 6 .EQU ECCP9_CAPTIME_CH2CAPTIME1, 5 .EQU ECCP9_CAPTIME_CH2CAPTIME0, 4 .EQU ECCP9_CAPTIME_CH1CAPTIME3, 3 .EQU ECCP9_CAPTIME_CH1CAPTIME2, 2 .EQU ECCP9_CAPTIME_CH1CAPTIME1, 1 .EQU ECCP9_CAPTIME_CH1CAPTIME0, 0 // register------------------------------------- .EQU ECCP9_CAPCTL1, 0x40003708 // 0x4000 3708 ECCP9_CAPCTL1 Bits------------------------------------- .EQU ECCP9_CAPCTL1_CH4TIEN, 15 .EQU ECCP9_CAPCTL1_CH3TIEN, 14 .EQU ECCP9_CAPCTL1_CH2TIEN, 13 .EQU ECCP9_CAPCTL1_CH1TIEN, 12 .EQU ECCP9_CAPCTL1_CH4CMODE, 11 .EQU ECCP9_CAPCTL1_CH3CMODE, 10 .EQU ECCP9_CAPCTL1_CH2CMODE, 9 .EQU ECCP9_CAPCTL1_CH1CMODE, 8 .EQU ECCP9_CAPCTL1_CH4CAPED, 7 .EQU ECCP9_CAPCTL1_CH3CAPED, 6 .EQU ECCP9_CAPCTL1_CH2CAPED, 5 .EQU ECCP9_CAPCTL1_CH1CAPED, 4 .EQU ECCP9_CAPCTL1_CH4CAPEN, 3 .EQU ECCP9_CAPCTL1_CH3CAPEN, 2 .EQU ECCP9_CAPCTL1_CH2CAPEN, 1 .EQU ECCP9_CAPCTL1_CH1CAPEN, 0 // register------------------------------------- .EQU ECCP9_CAPCTL2, 0x4000370C // 0x4000 370C ECCP9_CAPCTL2 Bits------------------------------------- .EQU ECCP9_CAPCTL2_CH4CAPPIN2, 11 .EQU ECCP9_CAPCTL2_CH4CAPPIN1, 10 .EQU ECCP9_CAPCTL2_CH4CAPPIN0, 9 .EQU ECCP9_CAPCTL2_CH3CAPPIN2, 8 .EQU ECCP9_CAPCTL2_CH3CAPPIN1, 7 .EQU ECCP9_CAPCTL2_CH3CAPPIN0, 6 .EQU ECCP9_CAPCTL2_CH2CAPPIN2, 5 .EQU ECCP9_CAPCTL2_CH2CAPPIN1, 4 .EQU ECCP9_CAPCTL2_CH2CAPPIN0, 3 .EQU ECCP9_CAPCTL2_CH1CAPPIN2, 2 .EQU ECCP9_CAPCTL2_CH1CAPPIN1, 1 .EQU ECCP9_CAPCTL2_CH1CAPPIN0, 0 // register------------------------------------- .EQU ECCP9_FLCLKP, 0x40003710 // 0x4000 3710 ECCP9_FLCLKP Bits------------------------------------- .EQU ECCP9_FLCLKP_CH4FLCLKP3, 15 .EQU ECCP9_FLCLKP_CH4FLCLKP2, 14 .EQU ECCP9_FLCLKP_CH4FLCLKP1, 13 .EQU ECCP9_FLCLKP_CH4FLCLKP0, 12 .EQU ECCP9_FLCLKP_CH3FLCLKP3, 11 .EQU ECCP9_FLCLKP_CH3FLCLKP2, 10 .EQU ECCP9_FLCLKP_CH3FLCLKP1, 9 .EQU ECCP9_FLCLKP_CH3FLCLKP0, 8 .EQU ECCP9_FLCLKP_CH2FLCLKP3, 7 .EQU ECCP9_FLCLKP_CH2FLCLKP2, 6 .EQU ECCP9_FLCLKP_CH2FLCLKP1, 5 .EQU ECCP9_FLCLKP_CH2FLCLKP0, 4 .EQU ECCP9_FLCLKP_CH1FLCLKP3, 3 .EQU ECCP9_FLCLKP_CH1FLCLKP2, 2 .EQU ECCP9_FLCLKP_CH1FLCLKP1, 1 .EQU ECCP9_FLCLKP_CH1FLCLKP0, 0 // register------------------------------------- .EQU ECCP9_FILTER, 0x40003714 // 0x4000 3714 ECCP9_FILTER Bits------------------------------------- .EQU ECCP9_FILTER_CH4FILTER2, 11 .EQU ECCP9_FILTER_CH4FILTER1, 10 .EQU ECCP9_FILTER_CH4FILTER0, 9 .EQU ECCP9_FILTER_CH3FILTER2, 8 .EQU ECCP9_FILTER_CH3FILTER1, 7 .EQU ECCP9_FILTER_CH3FILTER0, 6 .EQU ECCP9_FILTER_CH2FILTER2, 5 .EQU ECCP9_FILTER_CH2FILTER1, 4 .EQU ECCP9_FILTER_CH2FILTER0, 3 .EQU ECCP9_FILTER_CH1FILTER2, 2 .EQU ECCP9_FILTER_CH1FILTER1, 1 .EQU ECCP9_FILTER_CH1FILTER0, 0 // register------------------------------------- .EQU ECCP9_PHSCTLX, 0x40003718 // 0x4000 3718 ECCP9_PHSCTLX Bits------------------------------------- .EQU ECCP9_PHSCTLX_PHSXDIR, 15 .EQU ECCP9_PHSCTLX_PHSXTIEN, 14 .EQU ECCP9_PHSCTLX_PHSXTIME3, 13 .EQU ECCP9_PHSCTLX_PHSXTIME2, 12 .EQU ECCP9_PHSCTLX_PHSXTIME1, 11 .EQU ECCP9_PHSCTLX_PHSXTIME0, 10 .EQU ECCP9_PHSCTLX_PHSXPRSC3, 9 .EQU ECCP9_PHSCTLX_PHSXPRSC2, 8 .EQU ECCP9_PHSCTLX_PHSXPRSC1, 7 .EQU ECCP9_PHSCTLX_PHSXPRSC0, 6 .EQU ECCP9_PHSCTLX_PHSXSEL2, 5 .EQU ECCP9_PHSCTLX_PHSXSEL1, 4 .EQU ECCP9_PHSCTLX_PHSXSEL0, 3 .EQU ECCP9_PHSCTLX_PHSWTX, 2 .EQU ECCP9_PHSCTLX_PHSXMODE, 1 .EQU ECCP9_PHSCTLX_PHSENX, 0 // register------------------------------------- .EQU ECCP9_PHSCTLZ, 0x4000371C // 0x4000 371C ECCP9_PHSCTLZ Bits------------------------------------- .EQU ECCP9_PHSCTLZ_PHSZDIR, 15 .EQU ECCP9_PHSCTLZ_PHSZTIEN, 14 .EQU ECCP9_PHSCTLZ_PHSZTIME3, 13 .EQU ECCP9_PHSCTLZ_PHSZTIME2, 12 .EQU ECCP9_PHSCTLZ_PHSZTIME1, 11 .EQU ECCP9_PHSCTLZ_PHSZTIME0, 10 .EQU ECCP9_PHSCTLZ_PHSZPRSC3, 9 .EQU ECCP9_PHSCTLZ_PHSZPRSC2, 8 .EQU ECCP9_PHSCTLZ_PHSZPRSC1, 7 .EQU ECCP9_PHSCTLZ_PHSZPRSC0, 6 .EQU ECCP9_PHSCTLZ_PHSZSEL2, 5 .EQU ECCP9_PHSCTLZ_PHSZSEL1, 4 .EQU ECCP9_PHSCTLZ_PHSZSEL0, 3 .EQU ECCP9_PHSCTLZ_PHSWTZ, 2 .EQU ECCP9_PHSCTLZ_PHSZMODE, 1 .EQU ECCP9_PHSCTLZ_PHSENZ, 0 // register------------------------------------- .EQU T9_PHS, 0x40003720 // 0x4000 3720 T9_PHS Bits------------------------------------- .EQU T9_PHS_PHSX15, 15 .EQU T9_PHS_PHSX14, 14 .EQU T9_PHS_PHSX13, 13 .EQU T9_PHS_PHSX12, 12 .EQU T9_PHS_PHSX11, 11 .EQU T9_PHS_PHSX10, 10 .EQU T9_PHS_PHSX9, 9 .EQU T9_PHS_PHSX8, 8 .EQU T9_PHS_PHSX7, 7 .EQU T9_PHS_PHSX6, 6 .EQU T9_PHS_PHSX5, 5 .EQU T9_PHS_PHSX4, 4 .EQU T9_PHS_PHSX3, 3 .EQU T9_PHS_PHSX2, 2 .EQU T9_PHS_PHSX1, 1 .EQU T9_PHS_PHSX0, 0 // register------------------------------------- .EQU T10_PHS, 0x40003724 // 0x4000 3724 T10_PHS Bits------------------------------------- .EQU T10_PHS_PHSZ15, 15 .EQU T10_PHS_PHSZ14, 14 .EQU T10_PHS_PHSZ13, 13 .EQU T10_PHS_PHSZ12, 12 .EQU T10_PHS_PHSZ11, 11 .EQU T10_PHS_PHSZ10, 10 .EQU T10_PHS_PHSZ9, 9 .EQU T10_PHS_PHSZ8, 8 .EQU T10_PHS_PHSZ7, 7 .EQU T10_PHS_PHSZ6, 6 .EQU T10_PHS_PHSZ5, 5 .EQU T10_PHS_PHSZ4, 4 .EQU T10_PHS_PHSZ3, 3 .EQU T10_PHS_PHSZ2, 2 .EQU T10_PHS_PHSZ1, 1 .EQU T10_PHS_PHSZ0, 0 // register------------------------------------- .EQU ECCP9_CTL4, 0x40003728 // 0x4000 3728 ECCP9_CTL4 Bits------------------------------------- .EQU ECCP9_CTL4_CAPFILTEN4, 12 .EQU ECCP9_CTL4_CAPFILTEN3, 11 .EQU ECCP9_CTL4_CAPFILTEN2, 10 .EQU ECCP9_CTL4_CAPFILTEN1, 9 .EQU ECCP9_CTL4_TUDMODE1, 4 .EQU ECCP9_CTL4_TUDMODE0, 3 .EQU ECCP9_CTL4_TRGUDEN1, 2 .EQU ECCP9_CTL4_TRGUDEN0, 1 .EQU ECCP9_CTL4_TUDREN, 0 // register------------------------------------- .EQU ECCP9_PXDTCTL2, 0x4000372C // 0x4000 372C ECCP9_PXDTCTL2 Bits------------------------------------- .EQU ECCP9_PXDTCTL2_CH2PXDC7, 15 .EQU ECCP9_PXDTCTL2_CH2PXDC6, 14 .EQU ECCP9_PXDTCTL2_CH2PXDC5, 13 .EQU ECCP9_PXDTCTL2_CH2PXDC4, 12 .EQU ECCP9_PXDTCTL2_CH2PXDC3, 11 .EQU ECCP9_PXDTCTL2_CH2PXDC2, 10 .EQU ECCP9_PXDTCTL2_CH2PXDC1, 9 .EQU ECCP9_PXDTCTL2_CH2PXDC0, 8 .EQU ECCP9_PXDTCTL2_CH1PXDC7, 7 .EQU ECCP9_PXDTCTL2_CH1PXDC6, 6 .EQU ECCP9_PXDTCTL2_CH1PXDC5, 5 .EQU ECCP9_PXDTCTL2_CH1PXDC4, 4 .EQU ECCP9_PXDTCTL2_CH1PXDC3, 3 .EQU ECCP9_PXDTCTL2_CH1PXDC2, 2 .EQU ECCP9_PXDTCTL2_CH1PXDC1, 1 .EQU ECCP9_PXDTCTL2_CH1PXDC0, 0 // register------------------------------------- .EQU ECCP9_PXDTCFG, 0x40003730 // 0x4000 3730 ECCP9_PXDTCFG Bits------------------------------------- .EQU ECCP9_PXDTCFG_CH4DTCLK3, 15 .EQU ECCP9_PXDTCFG_CH4DTCLK2, 14 .EQU ECCP9_PXDTCFG_CH4DTCLK1, 13 .EQU ECCP9_PXDTCFG_CH4DTCLK0, 12 .EQU ECCP9_PXDTCFG_CH3DTCLK3, 11 .EQU ECCP9_PXDTCFG_CH3DTCLK2, 10 .EQU ECCP9_PXDTCFG_CH3DTCLK1, 9 .EQU ECCP9_PXDTCFG_CH3DTCLK0, 8 .EQU ECCP9_PXDTCFG_CH2DTCLK3, 7 .EQU ECCP9_PXDTCFG_CH2DTCLK2, 6 .EQU ECCP9_PXDTCFG_CH2DTCLK1, 5 .EQU ECCP9_PXDTCFG_CH2DTCLK0, 4 .EQU ECCP9_PXDTCFG_CH1DTCLK3, 3 .EQU ECCP9_PXDTCFG_CH1DTCLK2, 2 .EQU ECCP9_PXDTCFG_CH1DTCLK1, 1 .EQU ECCP9_PXDTCFG_CH1DTCLK0, 0 // register------------------------------------- .EQU T25_CNT, 0x40003780 // 0x4000 3780 T25_CNT Bits------------------------------------- .EQU T25_CNT_TXCNT15, 15 .EQU T25_CNT_TXCNT14, 14 .EQU T25_CNT_TXCNT13, 13 .EQU T25_CNT_TXCNT12, 12 .EQU T25_CNT_TXCNT11, 11 .EQU T25_CNT_TXCNT10, 10 .EQU T25_CNT_TXCNT9, 9 .EQU T25_CNT_TXCNT8, 8 .EQU T25_CNT_TXCNT7, 7 .EQU T25_CNT_TXCNT6, 6 .EQU T25_CNT_TXCNT5, 5 .EQU T25_CNT_TXCNT4, 4 .EQU T25_CNT_TXCNT3, 3 .EQU T25_CNT_TXCNT2, 2 .EQU T25_CNT_TXCNT1, 1 .EQU T25_CNT_TXCNT0, 0 // register------------------------------------- .EQU T26_CNT, 0x40003784 // 0x4000 3784 T26_CNT Bits------------------------------------- .EQU T26_CNT_TZCNT15, 15 .EQU T26_CNT_TZCNT14, 14 .EQU T26_CNT_TZCNT13, 13 .EQU T26_CNT_TZCNT12, 12 .EQU T26_CNT_TZCNT11, 11 .EQU T26_CNT_TZCNT10, 10 .EQU T26_CNT_TZCNT9, 9 .EQU T26_CNT_TZCNT8, 8 .EQU T26_CNT_TZCNT7, 7 .EQU T26_CNT_TZCNT6, 6 .EQU T26_CNT_TZCNT5, 5 .EQU T26_CNT_TZCNT4, 4 .EQU T26_CNT_TZCNT3, 3 .EQU T26_CNT_TZCNT2, 2 .EQU T26_CNT_TZCNT1, 1 .EQU T26_CNT_TZCNT0, 0 // register------------------------------------- .EQU T25_PPX, 0x40003788 // 0x4000 3788 T25_PPX Bits------------------------------------- .EQU T25_PPX_PPX15, 15 .EQU T25_PPX_PPX14, 14 .EQU T25_PPX_PPX13, 13 .EQU T25_PPX_PPX12, 12 .EQU T25_PPX_PPX11, 11 .EQU T25_PPX_PPX10, 10 .EQU T25_PPX_PPX9, 9 .EQU T25_PPX_PPX8, 8 .EQU T25_PPX_PPX7, 7 .EQU T25_PPX_PPX6, 6 .EQU T25_PPX_PPX5, 5 .EQU T25_PPX_PPX4, 4 .EQU T25_PPX_PPX3, 3 .EQU T25_PPX_PPX2, 2 .EQU T25_PPX_PPX1, 1 .EQU T25_PPX_PPX0, 0 // register------------------------------------- .EQU T26_PPZ, 0x4000378C // 0x4000 378C T26_PPZ Bits------------------------------------- .EQU T26_PPZ_PPZ15, 15 .EQU T26_PPZ_PPZ14, 14 .EQU T26_PPZ_PPZ13, 13 .EQU T26_PPZ_PPZ12, 12 .EQU T26_PPZ_PPZ11, 11 .EQU T26_PPZ_PPZ10, 10 .EQU T26_PPZ_PPZ9, 9 .EQU T26_PPZ_PPZ8, 8 .EQU T26_PPZ_PPZ7, 7 .EQU T26_PPZ_PPZ6, 6 .EQU T26_PPZ_PPZ5, 5 .EQU T26_PPZ_PPZ4, 4 .EQU T26_PPZ_PPZ3, 3 .EQU T26_PPZ_PPZ2, 2 .EQU T26_PPZ_PPZ1, 1 .EQU T26_PPZ_PPZ0, 0 // register------------------------------------- .EQU T25_PRSC, 0x40003790 // 0x4000 3790 T25_PRSC Bits------------------------------------- .EQU T25_PRSC_TXCKS15, 15 .EQU T25_PRSC_TXCKS14, 14 .EQU T25_PRSC_TXCKS13, 13 .EQU T25_PRSC_TXCKS12, 12 .EQU T25_PRSC_TXCKS11, 11 .EQU T25_PRSC_TXCKS10, 10 .EQU T25_PRSC_TXCKS9, 9 .EQU T25_PRSC_TXCKS8, 8 .EQU T25_PRSC_TXCKS7, 7 .EQU T25_PRSC_TXCKS6, 6 .EQU T25_PRSC_TXCKS5, 5 .EQU T25_PRSC_TXCKS4, 4 .EQU T25_PRSC_TXCKS3, 3 .EQU T25_PRSC_TXCKS2, 2 .EQU T25_PRSC_TXCKS1, 1 .EQU T25_PRSC_TXCKS0, 0 // register------------------------------------- .EQU T26_PRSC, 0x40003794 // 0x4000 3794 T26_PRSC Bits------------------------------------- .EQU T26_PRSC_TZCKS15, 15 .EQU T26_PRSC_TZCKS14, 14 .EQU T26_PRSC_TZCKS13, 13 .EQU T26_PRSC_TZCKS12, 12 .EQU T26_PRSC_TZCKS11, 11 .EQU T26_PRSC_TZCKS10, 10 .EQU T26_PRSC_TZCKS9, 9 .EQU T26_PRSC_TZCKS8, 8 .EQU T26_PRSC_TZCKS7, 7 .EQU T26_PRSC_TZCKS6, 6 .EQU T26_PRSC_TZCKS5, 5 .EQU T26_PRSC_TZCKS4, 4 .EQU T26_PRSC_TZCKS3, 3 .EQU T26_PRSC_TZCKS2, 2 .EQU T26_PRSC_TZCKS1, 1 .EQU T26_PRSC_TZCKS0, 0 // register------------------------------------- .EQU T25_CCR0, 0x40003798 // 0x4000 3798 T25_CCR0 Bits------------------------------------- .EQU T25_CCR0_TXCCR0_15, 15 .EQU T25_CCR0_TXCCR0_14, 14 .EQU T25_CCR0_TXCCR0_13, 13 .EQU T25_CCR0_TXCCR0_12, 12 .EQU T25_CCR0_TXCCR0_11, 11 .EQU T25_CCR0_TXCCR0_10, 10 .EQU T25_CCR0_TXCCR0_9, 9 .EQU T25_CCR0_TXCCR0_8, 8 .EQU T25_CCR0_TXCCR0_7, 7 .EQU T25_CCR0_TXCCR0_6, 6 .EQU T25_CCR0_TXCCR0_5, 5 .EQU T25_CCR0_TXCCR0_4, 4 .EQU T25_CCR0_TXCCR0_3, 3 .EQU T25_CCR0_TXCCR0_2, 2 .EQU T25_CCR0_TXCCR0_1, 1 .EQU T25_CCR0_TXCCR0_0, 0 // register------------------------------------- .EQU T25_CCR1, 0x4000379C // 0x4000 379C T25_CCR1 Bits------------------------------------- .EQU T25_CCR1_TXCCR1_15, 15 .EQU T25_CCR1_TXCCR1_14, 14 .EQU T25_CCR1_TXCCR1_13, 13 .EQU T25_CCR1_TXCCR1_12, 12 .EQU T25_CCR1_TXCCR1_11, 11 .EQU T25_CCR1_TXCCR1_10, 10 .EQU T25_CCR1_TXCCR1_9, 9 .EQU T25_CCR1_TXCCR1_8, 8 .EQU T25_CCR1_TXCCR1_7, 7 .EQU T25_CCR1_TXCCR1_6, 6 .EQU T25_CCR1_TXCCR1_5, 5 .EQU T25_CCR1_TXCCR1_4, 4 .EQU T25_CCR1_TXCCR1_3, 3 .EQU T25_CCR1_TXCCR1_2, 2 .EQU T25_CCR1_TXCCR1_1, 1 .EQU T25_CCR1_TXCCR1_0, 0 // register------------------------------------- .EQU T26_CCR0, 0x400037A0 // 0x4000 37A0 T26_CCR0 Bits------------------------------------- .EQU T26_CCR0_TZCCR15, 15 .EQU T26_CCR0_TZCCR14, 14 .EQU T26_CCR0_TZCCR13, 13 .EQU T26_CCR0_TZCCR12, 12 .EQU T26_CCR0_TZCCR11, 11 .EQU T26_CCR0_TZCCR10, 10 .EQU T26_CCR0_TZCCR9, 9 .EQU T26_CCR0_TZCCR8, 8 .EQU T26_CCR0_TZCCR7, 7 .EQU T26_CCR0_TZCCR6, 6 .EQU T26_CCR0_TZCCR5, 5 .EQU T26_CCR0_TZCCR4, 4 .EQU T26_CCR0_TZCCR3, 3 .EQU T26_CCR0_TZCCR2, 2 .EQU T26_CCR0_TZCCR1, 1 .EQU T26_CCR0_TZCCR0, 0 // register------------------------------------- .EQU T25_CTL, 0x400037A4 // 0x4000 37A4 T25_CTL Bits------------------------------------- .EQU T25_CTL_TXCMS2, 15 .EQU T25_CTL_TXCMS1, 14 .EQU T25_CTL_TXCMS0, 13 .EQU T25_CTL_TXOFS1, 12 .EQU T25_CTL_TXOFS0, 11 .EQU T25_CTL_TXADAUTO, 10 .EQU T25_CTL_TXCLK1, 9 .EQU T25_CTL_TXCLK0, 8 .EQU T25_CTL_TXDIR, 7 .EQU T25_CTL_TXCKBS3, 6 .EQU T25_CTL_TXCKBS2, 5 .EQU T25_CTL_TXCKBS1, 4 .EQU T25_CTL_TXCKBS0, 3 .EQU T25_CTL_TXEN, 2 .EQU T25_CTL_TXSY, 1 .EQU T25_CTL_TXCS, 0 // register------------------------------------- .EQU T26_CTL, 0x400037A8 // 0x4000 37A8 T26_CTL Bits------------------------------------- .EQU T26_CTL_TZCMS2, 15 .EQU T26_CTL_TZCMS1, 14 .EQU T26_CTL_TZCMS0, 13 .EQU T26_CTL_TZOFS1, 12 .EQU T26_CTL_TZOFS0, 11 .EQU T26_CTL_TZADAUTO, 10 .EQU T26_CTL_TZCLK1, 9 .EQU T26_CTL_TZCLK0, 8 .EQU T26_CTL_TZDIR, 7 .EQU T26_CTL_TZCKBS3, 6 .EQU T26_CTL_TZCKBS2, 5 .EQU T26_CTL_TZCKBS1, 4 .EQU T26_CTL_TZCKBS0, 3 .EQU T26_CTL_TZEN, 2 .EQU T26_CTL_TZSY, 1 .EQU T26_CTL_TZCS, 0 // register------------------------------------- .EQU ECCP25_PDCTL, 0x400037AC // 0x4000 37AC ECCP25_PDCTL Bits------------------------------------- .EQU ECCP25_PDCTL_CPD2, 14 .EQU ECCP25_PDCTL_CPD1, 13 .EQU ECCP25_PDCTL_CPD0, 12 .EQU ECCP25_PDCTL_RDA2, 10 .EQU ECCP25_PDCTL_RDA1, 9 .EQU ECCP25_PDCTL_RDA0, 8 .EQU ECCP25_PDCTL_SMPEN, 7 .EQU ECCP25_PDCTL_TI2EN, 5 .EQU ECCP25_PDCTL_TI1EN, 4 .EQU ECCP25_PDCTL_TI0EN, 3 .EQU ECCP25_PDCTL_CMPE, 2 .EQU ECCP25_PDCTL_CPE1, 1 .EQU ECCP25_PDCTL_CPE0, 0 // register------------------------------------- .EQU ECCP25_PXASCTL, 0x400037B0 // 0x4000 37B0 ECCP25_PXASCTL Bits------------------------------------- .EQU ECCP25_PXASCTL_TZBKINS, 5 .EQU ECCP25_PXASCTL_TXBKINS, 4 .EQU ECCP25_PXASCTL_TZPXASS1, 3 .EQU ECCP25_PXASCTL_TZPXASS0, 2 .EQU ECCP25_PXASCTL_TXPXASS1, 1 .EQU ECCP25_PXASCTL_TXPXASS0, 0 // register------------------------------------- .EQU T25_CCTCTL, 0x400037B4 // 0x4000 37B4 T25_CCTCTL Bits------------------------------------- .EQU T25_CCTCTL_TXCKSEL1, 13 .EQU T25_CCTCTL_TXCKSEL0, 12 .EQU T25_CCTCTL_TCKDELAY2, 11 .EQU T25_CCTCTL_TCKDELAY1, 10 .EQU T25_CCTCTL_TCKDELAY0, 9 .EQU T25_CCTCTL_TCKDIV3, 8 .EQU T25_CCTCTL_TCKDIV2, 7 .EQU T25_CCTCTL_TCKDIV1, 6 .EQU T25_CCTCTL_TCKDIV0, 5 .EQU T25_CCTCTL_TCKFEN, 4 .EQU T25_CCTCTL_CCTSEL1, 3 .EQU T25_CCTCTL_CCTSEL0, 2 .EQU T25_CCTCTL_CRSET, 1 .EQU T25_CCTCTL_CCTEN, 0 // register------------------------------------- .EQU T26_CCTCTL, 0x400037B8 // 0x4000 37B8 T26_CCTCTL Bits------------------------------------- .EQU T26_CCTCTL_TZCKSEL1, 13 .EQU T26_CCTCTL_TZCKSEL0, 12 .EQU T26_CCTCTL_TCKDELAY2, 11 .EQU T26_CCTCTL_TCKDELAY1, 10 .EQU T26_CCTCTL_TCKDELAY0, 9 .EQU T26_CCTCTL_TCKDIV3, 8 .EQU T26_CCTCTL_TCKDIV2, 7 .EQU T26_CCTCTL_TCKDIV1, 6 .EQU T26_CCTCTL_TCKDIV0, 5 .EQU T26_CCTCTL_TCKFEN, 4 .EQU T26_CCTCTL_CCTSEL1, 3 .EQU T26_CCTCTL_CCTSEL0, 2 .EQU T26_CCTCTL_CRSET, 1 .EQU T26_CCTCTL_CCTEN, 0 // register------------------------------------- .EQU ECCP25_COMH1, 0x400037C0 // 0x4000 37C0 ECCP25_COMH1 Bits------------------------------------- .EQU ECCP25_COMH1_COMH15, 15 .EQU ECCP25_COMH1_COMH14, 14 .EQU ECCP25_COMH1_COMH13, 13 .EQU ECCP25_COMH1_COMH12, 12 .EQU ECCP25_COMH1_COMH11, 11 .EQU ECCP25_COMH1_COMH10, 10 .EQU ECCP25_COMH1_COMH9, 9 .EQU ECCP25_COMH1_COMH8, 8 .EQU ECCP25_COMH1_COMH7, 7 .EQU ECCP25_COMH1_COMH6, 6 .EQU ECCP25_COMH1_COMH5, 5 .EQU ECCP25_COMH1_COMH4, 4 .EQU ECCP25_COMH1_COMH3, 3 .EQU ECCP25_COMH1_COMH2, 2 .EQU ECCP25_COMH1_COMH1, 1 .EQU ECCP25_COMH1_COMH0, 0 // register------------------------------------- .EQU ECCP25_COML1, 0x400037C4 // 0x4000 37C4 ECCP25_COML1 Bits------------------------------------- .EQU ECCP25_COML1_COML15, 15 .EQU ECCP25_COML1_COML14, 14 .EQU ECCP25_COML1_COML13, 13 .EQU ECCP25_COML1_COML12, 12 .EQU ECCP25_COML1_COML11, 11 .EQU ECCP25_COML1_COML10, 10 .EQU ECCP25_COML1_COML9, 9 .EQU ECCP25_COML1_COML8, 8 .EQU ECCP25_COML1_COML7, 7 .EQU ECCP25_COML1_COML6, 6 .EQU ECCP25_COML1_COML5, 5 .EQU ECCP25_COML1_COML4, 4 .EQU ECCP25_COML1_COML3, 3 .EQU ECCP25_COML1_COML2, 2 .EQU ECCP25_COML1_COML1, 1 .EQU ECCP25_COML1_COML0, 0 // register------------------------------------- .EQU ECCP25_FAUCTL1, 0x400037C8 // 0x4000 37C8 ECCP25_FAUCTL1 Bits------------------------------------- .EQU ECCP25_FAUCTL1_TRST, 14 .EQU ECCP25_FAUCTL1_FINV1, 13 .EQU ECCP25_FAUCTL1_FINV0, 12 .EQU ECCP25_FAUCTL1_FVAL2, 11 .EQU ECCP25_FAUCTL1_FVAL1, 10 .EQU ECCP25_FAUCTL1_FVAL0, 9 .EQU ECCP25_FAUCTL1_FAUIF, 8 .EQU ECCP25_FAUCTL1_FAUIC, 7 .EQU ECCP25_FAUCTL1_FAUIE, 6 .EQU ECCP25_FAUCTL1_FLTEN, 5 .EQU ECCP25_FAUCTL1_FLTP3, 4 .EQU ECCP25_FAUCTL1_FLTP2, 3 .EQU ECCP25_FAUCTL1_FLTP1, 2 .EQU ECCP25_FAUCTL1_FLTP0, 1 .EQU ECCP25_FAUCTL1_FAUEN, 0 // register------------------------------------- .EQU ECCP25_DITCTL, 0x400037CC // 0x4000 37CC ECCP25_DITCTL Bits------------------------------------- .EQU ECCP25_DITCTL_DCOMEN, 7 .EQU ECCP25_DITCTL_DPEEN, 6 .EQU ECCP25_DITCTL_DEDEN, 5 .EQU ECCP25_DITCTL_FRCVAL4, 4 .EQU ECCP25_DITCTL_FRCVAL3, 3 .EQU ECCP25_DITCTL_FRCVAL2, 2 .EQU ECCP25_DITCTL_FRCVAL1, 1 .EQU ECCP25_DITCTL_FRCVAL0, 0 // register------------------------------------- .EQU ECCP25_COMH2, 0x400037D0 // 0x4000 37D0 ECCP25_COMH2 Bits------------------------------------- .EQU ECCP25_COMH2_COMH15, 15 .EQU ECCP25_COMH2_COMH14, 14 .EQU ECCP25_COMH2_COMH13, 13 .EQU ECCP25_COMH2_COMH12, 12 .EQU ECCP25_COMH2_COMH11, 11 .EQU ECCP25_COMH2_COMH10, 10 .EQU ECCP25_COMH2_COMH9, 9 .EQU ECCP25_COMH2_COMH8, 8 .EQU ECCP25_COMH2_COMH7, 7 .EQU ECCP25_COMH2_COMH6, 6 .EQU ECCP25_COMH2_COMH5, 5 .EQU ECCP25_COMH2_COMH4, 4 .EQU ECCP25_COMH2_COMH3, 3 .EQU ECCP25_COMH2_COMH2, 2 .EQU ECCP25_COMH2_COMH1, 1 .EQU ECCP25_COMH2_COMH0, 0 // register------------------------------------- .EQU ECCP25_COML2, 0x400037D4 // 0x4000 37D4 ECCP25_COML2 Bits------------------------------------- .EQU ECCP25_COML2_COML15, 15 .EQU ECCP25_COML2_COML14, 14 .EQU ECCP25_COML2_COML13, 13 .EQU ECCP25_COML2_COML12, 12 .EQU ECCP25_COML2_COML11, 11 .EQU ECCP25_COML2_COML10, 10 .EQU ECCP25_COML2_COML9, 9 .EQU ECCP25_COML2_COML8, 8 .EQU ECCP25_COML2_COML7, 7 .EQU ECCP25_COML2_COML6, 6 .EQU ECCP25_COML2_COML5, 5 .EQU ECCP25_COML2_COML4, 4 .EQU ECCP25_COML2_COML3, 3 .EQU ECCP25_COML2_COML2, 2 .EQU ECCP25_COML2_COML1, 1 .EQU ECCP25_COML2_COML0, 0 // register------------------------------------- .EQU ECCP25_FAUCTL2, 0x400037D8 // 0x4000 37D8 ECCP25_FAUCTL2 Bits------------------------------------- .EQU ECCP25_FAUCTL2_TRST, 14 .EQU ECCP25_FAUCTL2_FINV1, 13 .EQU ECCP25_FAUCTL2_FINV0, 12 .EQU ECCP25_FAUCTL2_FVAL2, 11 .EQU ECCP25_FAUCTL2_FVAL1, 10 .EQU ECCP25_FAUCTL2_FVAL0, 9 .EQU ECCP25_FAUCTL2_FAUIF, 8 .EQU ECCP25_FAUCTL2_FAUIC, 7 .EQU ECCP25_FAUCTL2_FAUIE, 6 .EQU ECCP25_FAUCTL2_FLTEN, 5 .EQU ECCP25_FAUCTL2_FLTP3, 4 .EQU ECCP25_FAUCTL2_FLTP2, 3 .EQU ECCP25_FAUCTL2_FLTP1, 2 .EQU ECCP25_FAUCTL2_FLTP0, 1 .EQU ECCP25_FAUCTL2_FAUEN, 0 // register------------------------------------- .EQU ECCP25_CCRCTL, 0x400037DC // 0x4000 37DC ECCP25_CCRCTL Bits------------------------------------- .EQU ECCP25_CCRCTL_TZCCR0SEL, 5 .EQU ECCP25_CCRCTL_TXCCR1SEL, 4 .EQU ECCP25_CCRCTL_TXCCR0SEL, 3 .EQU ECCP25_CCRCTL_TZCCR0SEN, 2 .EQU ECCP25_CCRCTL_TXCCR1SEN, 1 .EQU ECCP25_CCRCTL_TXCCR0SEN, 0 // register------------------------------------- .EQU ECCP25_COMH3, 0x400037E0 // 0x4000 37E0 ECCP25_COMH3 Bits------------------------------------- .EQU ECCP25_COMH3_COMH15, 15 .EQU ECCP25_COMH3_COMH14, 14 .EQU ECCP25_COMH3_COMH13, 13 .EQU ECCP25_COMH3_COMH12, 12 .EQU ECCP25_COMH3_COMH11, 11 .EQU ECCP25_COMH3_COMH10, 10 .EQU ECCP25_COMH3_COMH9, 9 .EQU ECCP25_COMH3_COMH8, 8 .EQU ECCP25_COMH3_COMH7, 7 .EQU ECCP25_COMH3_COMH6, 6 .EQU ECCP25_COMH3_COMH5, 5 .EQU ECCP25_COMH3_COMH4, 4 .EQU ECCP25_COMH3_COMH3, 3 .EQU ECCP25_COMH3_COMH2, 2 .EQU ECCP25_COMH3_COMH1, 1 .EQU ECCP25_COMH3_COMH0, 0 // register------------------------------------- .EQU ECCP25_COML3, 0x400037E4 // 0x4000 37E4 ECCP25_COML3 Bits------------------------------------- .EQU ECCP25_COML3_COML15, 15 .EQU ECCP25_COML3_COML14, 14 .EQU ECCP25_COML3_COML13, 13 .EQU ECCP25_COML3_COML12, 12 .EQU ECCP25_COML3_COML11, 11 .EQU ECCP25_COML3_COML10, 10 .EQU ECCP25_COML3_COML9, 9 .EQU ECCP25_COML3_COML8, 8 .EQU ECCP25_COML3_COML7, 7 .EQU ECCP25_COML3_COML6, 6 .EQU ECCP25_COML3_COML5, 5 .EQU ECCP25_COML3_COML4, 4 .EQU ECCP25_COML3_COML3, 3 .EQU ECCP25_COML3_COML2, 2 .EQU ECCP25_COML3_COML1, 1 .EQU ECCP25_COML3_COML0, 0 // register------------------------------------- .EQU ECCP25_FAUCTL3, 0x400037E8 // 0x4000 37E8 ECCP25_FAUCTL3 Bits------------------------------------- .EQU ECCP25_FAUCTL3_TRST, 14 .EQU ECCP25_FAUCTL3_FINV1, 13 .EQU ECCP25_FAUCTL3_FINV0, 12 .EQU ECCP25_FAUCTL3_FVAL2, 11 .EQU ECCP25_FAUCTL3_FVAL1, 10 .EQU ECCP25_FAUCTL3_FVAL0, 9 .EQU ECCP25_FAUCTL3_FAUIF, 8 .EQU ECCP25_FAUCTL3_FAUIC, 7 .EQU ECCP25_FAUCTL3_FAUIE, 6 .EQU ECCP25_FAUCTL3_FLTEN, 5 .EQU ECCP25_FAUCTL3_FLTP3, 4 .EQU ECCP25_FAUCTL3_FLTP2, 3 .EQU ECCP25_FAUCTL3_FLTP1, 2 .EQU ECCP25_FAUCTL3_FLTP0, 1 .EQU ECCP25_FAUCTL3_FAUEN, 0 // register------------------------------------- .EQU ECCP25_COMH4, 0x400037F0 // 0x4000 37F0 ECCP25_COMH4 Bits------------------------------------- .EQU ECCP25_COMH4_COMH15, 15 .EQU ECCP25_COMH4_COMH14, 14 .EQU ECCP25_COMH4_COMH13, 13 .EQU ECCP25_COMH4_COMH12, 12 .EQU ECCP25_COMH4_COMH11, 11 .EQU ECCP25_COMH4_COMH10, 10 .EQU ECCP25_COMH4_COMH9, 9 .EQU ECCP25_COMH4_COMH8, 8 .EQU ECCP25_COMH4_COMH7, 7 .EQU ECCP25_COMH4_COMH6, 6 .EQU ECCP25_COMH4_COMH5, 5 .EQU ECCP25_COMH4_COMH4, 4 .EQU ECCP25_COMH4_COMH3, 3 .EQU ECCP25_COMH4_COMH2, 2 .EQU ECCP25_COMH4_COMH1, 1 .EQU ECCP25_COMH4_COMH0, 0 // register------------------------------------- .EQU ECCP25_COML4, 0x400037F4 // 0x4000 37F4 ECCP25_COML4 Bits------------------------------------- .EQU ECCP25_COML4_COML15, 15 .EQU ECCP25_COML4_COML14, 14 .EQU ECCP25_COML4_COML13, 13 .EQU ECCP25_COML4_COML12, 12 .EQU ECCP25_COML4_COML11, 11 .EQU ECCP25_COML4_COML10, 10 .EQU ECCP25_COML4_COML9, 9 .EQU ECCP25_COML4_COML8, 8 .EQU ECCP25_COML4_COML7, 7 .EQU ECCP25_COML4_COML6, 6 .EQU ECCP25_COML4_COML5, 5 .EQU ECCP25_COML4_COML4, 4 .EQU ECCP25_COML4_COML3, 3 .EQU ECCP25_COML4_COML2, 2 .EQU ECCP25_COML4_COML1, 1 .EQU ECCP25_COML4_COML0, 0 // register------------------------------------- .EQU ECCP25_FAUCTL4, 0x400037F8 // 0x4000 37F8 ECCP25_FAUCTL4 Bits------------------------------------- .EQU ECCP25_FAUCTL4_TRST, 14 .EQU ECCP25_FAUCTL4_FINV1, 13 .EQU ECCP25_FAUCTL4_FINV0, 12 .EQU ECCP25_FAUCTL4_FVAL2, 11 .EQU ECCP25_FAUCTL4_FVAL1, 10 .EQU ECCP25_FAUCTL4_FVAL0, 9 .EQU ECCP25_FAUCTL4_FAUIF, 8 .EQU ECCP25_FAUCTL4_FAUIC, 7 .EQU ECCP25_FAUCTL4_FAUIE, 6 .EQU ECCP25_FAUCTL4_FLTEN, 5 .EQU ECCP25_FAUCTL4_FLTP3, 4 .EQU ECCP25_FAUCTL4_FLTP2, 3 .EQU ECCP25_FAUCTL4_FLTP1, 2 .EQU ECCP25_FAUCTL4_FLTP0, 1 .EQU ECCP25_FAUCTL4_FAUEN, 0 // register------------------------------------- .EQU ECCP25_CTL1, 0x40003800 // 0x4000 3800 ECCP25_CTL1 Bits------------------------------------- .EQU ECCP25_CTL1_CH4M3, 15 .EQU ECCP25_CTL1_CH4M2, 14 .EQU ECCP25_CTL1_CH4M1, 13 .EQU ECCP25_CTL1_CH4M0, 12 .EQU ECCP25_CTL1_CH3M3, 11 .EQU ECCP25_CTL1_CH3M2, 10 .EQU ECCP25_CTL1_CH3M1, 9 .EQU ECCP25_CTL1_CH3M0, 8 .EQU ECCP25_CTL1_CH2M3, 7 .EQU ECCP25_CTL1_CH2M2, 6 .EQU ECCP25_CTL1_CH2M1, 5 .EQU ECCP25_CTL1_CH2M0, 4 .EQU ECCP25_CTL1_CH1M3, 3 .EQU ECCP25_CTL1_CH1M2, 2 .EQU ECCP25_CTL1_CH1M1, 1 .EQU ECCP25_CTL1_CH1M0, 0 // register------------------------------------- .EQU ECCP25_R1, 0x40003804 // 0x4000 3804 ECCP25_R1 Bits------------------------------------- .EQU ECCP25_R1_ECCPXRY15, 15 .EQU ECCP25_R1_ECCPXRY14, 14 .EQU ECCP25_R1_ECCPXRY13, 13 .EQU ECCP25_R1_ECCPXRY12, 12 .EQU ECCP25_R1_ECCPXRY11, 11 .EQU ECCP25_R1_ECCPXRY10, 10 .EQU ECCP25_R1_ECCPXRY9, 9 .EQU ECCP25_R1_ECCPXRY8, 8 .EQU ECCP25_R1_ECCPXRY7, 7 .EQU ECCP25_R1_ECCPXRY6, 6 .EQU ECCP25_R1_ECCPXRY5, 5 .EQU ECCP25_R1_ECCPXRY4, 4 .EQU ECCP25_R1_ECCPXRY3, 3 .EQU ECCP25_R1_ECCPXRY2, 2 .EQU ECCP25_R1_ECCPXRY1, 1 .EQU ECCP25_R1_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP25_R2, 0x40003808 // 0x4000 3808 ECCP25_R2 Bits------------------------------------- .EQU ECCP25_R2_ECCPXRY15, 15 .EQU ECCP25_R2_ECCPXRY14, 14 .EQU ECCP25_R2_ECCPXRY13, 13 .EQU ECCP25_R2_ECCPXRY12, 12 .EQU ECCP25_R2_ECCPXRY11, 11 .EQU ECCP25_R2_ECCPXRY10, 10 .EQU ECCP25_R2_ECCPXRY9, 9 .EQU ECCP25_R2_ECCPXRY8, 8 .EQU ECCP25_R2_ECCPXRY7, 7 .EQU ECCP25_R2_ECCPXRY6, 6 .EQU ECCP25_R2_ECCPXRY5, 5 .EQU ECCP25_R2_ECCPXRY4, 4 .EQU ECCP25_R2_ECCPXRY3, 3 .EQU ECCP25_R2_ECCPXRY2, 2 .EQU ECCP25_R2_ECCPXRY1, 1 .EQU ECCP25_R2_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP25_R3, 0x4000380C // 0x4000 380C ECCP25_R3 Bits------------------------------------- .EQU ECCP25_R3_ECCPXRY15, 15 .EQU ECCP25_R3_ECCPXRY14, 14 .EQU ECCP25_R3_ECCPXRY13, 13 .EQU ECCP25_R3_ECCPXRY12, 12 .EQU ECCP25_R3_ECCPXRY11, 11 .EQU ECCP25_R3_ECCPXRY10, 10 .EQU ECCP25_R3_ECCPXRY9, 9 .EQU ECCP25_R3_ECCPXRY8, 8 .EQU ECCP25_R3_ECCPXRY7, 7 .EQU ECCP25_R3_ECCPXRY6, 6 .EQU ECCP25_R3_ECCPXRY5, 5 .EQU ECCP25_R3_ECCPXRY4, 4 .EQU ECCP25_R3_ECCPXRY3, 3 .EQU ECCP25_R3_ECCPXRY2, 2 .EQU ECCP25_R3_ECCPXRY1, 1 .EQU ECCP25_R3_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP25_R4, 0x40003810 // 0x4000 3810 ECCP25_R4 Bits------------------------------------- .EQU ECCP25_R4_ECCPXRY15, 15 .EQU ECCP25_R4_ECCPXRY14, 14 .EQU ECCP25_R4_ECCPXRY13, 13 .EQU ECCP25_R4_ECCPXRY12, 12 .EQU ECCP25_R4_ECCPXRY11, 11 .EQU ECCP25_R4_ECCPXRY10, 10 .EQU ECCP25_R4_ECCPXRY9, 9 .EQU ECCP25_R4_ECCPXRY8, 8 .EQU ECCP25_R4_ECCPXRY7, 7 .EQU ECCP25_R4_ECCPXRY6, 6 .EQU ECCP25_R4_ECCPXRY5, 5 .EQU ECCP25_R4_ECCPXRY4, 4 .EQU ECCP25_R4_ECCPXRY3, 3 .EQU ECCP25_R4_ECCPXRY2, 2 .EQU ECCP25_R4_ECCPXRY1, 1 .EQU ECCP25_R4_ECCPXRY0, 0 // register------------------------------------- .EQU ECCP25_PXUDCTL, 0x40003814 // 0x4000 3814 ECCP25_PXUDCTL Bits------------------------------------- .EQU ECCP25_PXUDCTL_TZIFUDREN, 10 .EQU ECCP25_PXUDCTL_TZUDR, 9 .EQU ECCP25_PXUDCTL_TXIFUDREN, 8 .EQU ECCP25_PXUDCTL_TXUDR, 7 .EQU ECCP25_PXUDCTL_PXMPEN, 6 .EQU ECCP25_PXUDCTL_PXUDEVT3, 5 .EQU ECCP25_PXUDCTL_PXUDEVT2, 4 .EQU ECCP25_PXUDCTL_PXUDEVT1, 3 .EQU ECCP25_PXUDCTL_PXUDEVT0, 2 .EQU ECCP25_PXUDCTL_PXUDEN1, 1 .EQU ECCP25_PXUDCTL_PXUDEN0, 0 // register------------------------------------- .EQU ECCP25_CTL2, 0x40003818 // 0x4000 3818 ECCP25_CTL2 Bits------------------------------------- .EQU ECCP25_CTL2_TZSMS2, 15 .EQU ECCP25_CTL2_TZSMS1, 14 .EQU ECCP25_CTL2_TZSMS0, 13 .EQU ECCP25_CTL2_PXPWMI, 12 .EQU ECCP25_CTL2_PXXORM, 11 .EQU ECCP25_CTL2_PXSPM, 10 .EQU ECCP25_CTL2_TXMSSYNC, 9 .EQU ECCP25_CTL2_TXTS2, 8 .EQU ECCP25_CTL2_TXTS1, 7 .EQU ECCP25_CTL2_TXTS0, 6 .EQU ECCP25_CTL2_TXSMS2, 5 .EQU ECCP25_CTL2_TXSMS1, 4 .EQU ECCP25_CTL2_TXSMS0, 3 .EQU ECCP25_CTL2_TXMMS2, 2 .EQU ECCP25_CTL2_TXMMS1, 1 .EQU ECCP25_CTL2_TXMMS0, 0 // register------------------------------------- .EQU ECCP25_PXDTCTL, 0x4000381C // 0x4000 381C ECCP25_PXDTCTL Bits------------------------------------- .EQU ECCP25_PXDTCTL_PZDC7, 15 .EQU ECCP25_PXDTCTL_PZDC6, 14 .EQU ECCP25_PXDTCTL_PZDC5, 13 .EQU ECCP25_PXDTCTL_PZDC4, 12 .EQU ECCP25_PXDTCTL_PZDC3, 11 .EQU ECCP25_PXDTCTL_PZDC2, 10 .EQU ECCP25_PXDTCTL_PZDC1, 9 .EQU ECCP25_PXDTCTL_PZDC0, 8 .EQU ECCP25_PXDTCTL_PXDC7, 7 .EQU ECCP25_PXDTCTL_PXDC6, 6 .EQU ECCP25_PXDTCTL_PXDC5, 5 .EQU ECCP25_PXDTCTL_PXDC4, 4 .EQU ECCP25_PXDTCTL_PXDC3, 3 .EQU ECCP25_PXDTCTL_PXDC2, 2 .EQU ECCP25_PXDTCTL_PXDC1, 1 .EQU ECCP25_PXDTCTL_PXDC0, 0 // register------------------------------------- .EQU ECCP25_PWMXOC, 0x40003820 // 0x4000 3820 ECCP25_PWMXOC Bits------------------------------------- .EQU ECCP25_PWMXOC_PXOC4H1, 15 .EQU ECCP25_PWMXOC_PXOC4H0, 14 .EQU ECCP25_PWMXOC_PXOC4L1, 13 .EQU ECCP25_PWMXOC_PXOC4L0, 12 .EQU ECCP25_PWMXOC_PXOC3H1, 11 .EQU ECCP25_PWMXOC_PXOC3H0, 10 .EQU ECCP25_PWMXOC_PXOC3L1, 9 .EQU ECCP25_PWMXOC_PXOC3L0, 8 .EQU ECCP25_PWMXOC_PXOC2H1, 7 .EQU ECCP25_PWMXOC_PXOC2H0, 6 .EQU ECCP25_PWMXOC_PXOC2L1, 5 .EQU ECCP25_PWMXOC_PXOC2L0, 4 .EQU ECCP25_PWMXOC_PXOC1H1, 3 .EQU ECCP25_PWMXOC_PXOC1H0, 2 .EQU ECCP25_PWMXOC_PXOC1L1, 1 .EQU ECCP25_PWMXOC_PXOC1L0, 0 // register------------------------------------- .EQU ECCP25_PXATRCTL, 0x40003824 // 0x4000 3824 ECCP25_PXATRCTL Bits------------------------------------- .EQU ECCP25_PXATRCTL_PXCH4MOD, 11 .EQU ECCP25_PXATRCTL_PXCH3MOD, 10 .EQU ECCP25_PXATRCTL_PXCH2MOD, 9 .EQU ECCP25_PXATRCTL_PXCH1MOD, 8 // register------------------------------------- .EQU ECCP25_PXASCTL0, 0x40003828 // 0x4000 3828 ECCP25_PXASCTL0 Bits------------------------------------- .EQU ECCP25_PXASCTL0_PXASE4, 11 .EQU ECCP25_PXASCTL0_PXASE3, 10 .EQU ECCP25_PXASCTL0_PXASE2, 9 .EQU ECCP25_PXASCTL0_PXASE1, 8 .EQU ECCP25_PXASCTL0_PXASS4_1, 7 .EQU ECCP25_PXASCTL0_PXASS4_0, 6 .EQU ECCP25_PXASCTL0_PXASS3_1, 5 .EQU ECCP25_PXASCTL0_PXASS3_0, 4 .EQU ECCP25_PXASCTL0_PXASS2_1, 3 .EQU ECCP25_PXASCTL0_PXASS2_0, 2 .EQU ECCP25_PXASCTL0_PXASS1_1, 1 .EQU ECCP25_PXASCTL0_PXASS1_0, 0 // register------------------------------------- .EQU ECCP25_PXASCTL1, 0x4000382C // 0x4000 382C ECCP25_PXASCTL1 Bits------------------------------------- .EQU ECCP25_PXASCTL1_PXSS4H1, 15 .EQU ECCP25_PXASCTL1_PXSS4H0, 14 .EQU ECCP25_PXASCTL1_PXSS4L1, 13 .EQU ECCP25_PXASCTL1_PXSS4L0, 12 .EQU ECCP25_PXASCTL1_PXSS3H1, 11 .EQU ECCP25_PXASCTL1_PXSS3H0, 10 .EQU ECCP25_PXASCTL1_PXSS3L1, 9 .EQU ECCP25_PXASCTL1_PXSS3L0, 8 .EQU ECCP25_PXASCTL1_PXSS2H1, 7 .EQU ECCP25_PXASCTL1_PXSS2H0, 6 .EQU ECCP25_PXASCTL1_PXSS2L1, 5 .EQU ECCP25_PXASCTL1_PXSS2L0, 4 .EQU ECCP25_PXASCTL1_PXSS1H1, 3 .EQU ECCP25_PXASCTL1_PXSS1H0, 2 .EQU ECCP25_PXASCTL1_PXSS1L1, 1 .EQU ECCP25_PXASCTL1_PXSS1L0, 0 // register------------------------------------- .EQU ECCP25_ZPDCTL0, 0x40003830 // 0x4000 3830 ECCP25_ZPDCTL0 Bits------------------------------------- .EQU ECCP25_ZPDCTL0_ZCLK3, 11 .EQU ECCP25_ZPDCTL0_ZCLK2, 10 .EQU ECCP25_ZPDCTL0_ZCLK1, 9 .EQU ECCP25_ZPDCTL0_ZCLK0, 8 .EQU ECCP25_ZPDCTL0_ZPD4TWEIN, 7 .EQU ECCP25_ZPDCTL0_ZPD3TWEIN, 6 .EQU ECCP25_ZPDCTL0_ZPD2TWEIN, 5 .EQU ECCP25_ZPDCTL0_ZPD1TWEIN, 4 .EQU ECCP25_ZPDCTL0_ZPD4FLAG, 3 .EQU ECCP25_ZPDCTL0_ZPD3FLAG, 2 .EQU ECCP25_ZPDCTL0_ZPD2FLAG, 1 .EQU ECCP25_ZPDCTL0_ZPD1FLAG, 0 // register------------------------------------- .EQU ECCP25_ZPDCTL1, 0x40003834 // 0x4000 3834 ECCP25_ZPDCTL1 Bits------------------------------------- .EQU ECCP25_ZPDCTL1_ZPD4EN, 15 .EQU ECCP25_ZPDCTL1_ZPD3EN, 14 .EQU ECCP25_ZPDCTL1_ZPD2EN, 13 .EQU ECCP25_ZPDCTL1_ZPD1EN, 12 .EQU ECCP25_ZPDCTL1_ZPD4S2, 11 .EQU ECCP25_ZPDCTL1_ZPD4S1, 10 .EQU ECCP25_ZPDCTL1_ZPD4S0, 9 .EQU ECCP25_ZPDCTL1_ZPD3S2, 8 .EQU ECCP25_ZPDCTL1_ZPD3S1, 7 .EQU ECCP25_ZPDCTL1_ZPD3S0, 6 .EQU ECCP25_ZPDCTL1_ZPD2S2, 5 .EQU ECCP25_ZPDCTL1_ZPD2S1, 4 .EQU ECCP25_ZPDCTL1_ZPD2S0, 3 .EQU ECCP25_ZPDCTL1_ZPD1S2, 2 .EQU ECCP25_ZPDCTL1_ZPD1S1, 1 .EQU ECCP25_ZPDCTL1_ZPD1S0, 0 // register------------------------------------- .EQU ECCP25_ZPDPORT, 0x40003838 // 0x4000 3838 ECCP25_ZPDPORT Bits------------------------------------- .EQU ECCP25_ZPDPORT_ZPORT7, 7 .EQU ECCP25_ZPDPORT_ZPORT6, 6 .EQU ECCP25_ZPDPORT_ZPORT5, 5 .EQU ECCP25_ZPDPORT_ZPORT4, 4 .EQU ECCP25_ZPDPORT_ZPORT3, 3 .EQU ECCP25_ZPDPORT_ZPORT2, 2 .EQU ECCP25_ZPDPORT_ZPORT1, 1 .EQU ECCP25_ZPDPORT_ZPORT0, 0 // register------------------------------------- .EQU ECCP25_IE, 0x4000383C // 0x4000 383C ECCP25_IE Bits------------------------------------- .EQU ECCP25_IE_PDIE, 10 .EQU ECCP25_IE_CPIE, 9 .EQU ECCP25_IE_TXUIE, 8 .EQU ECCP25_IE_TZUIE, 7 .EQU ECCP25_IE_TXIE, 6 .EQU ECCP25_IE_TZIE, 5 .EQU ECCP25_IE_TXTIE, 4 .EQU ECCP25_IE_CC4IE, 3 .EQU ECCP25_IE_CC3IE, 2 .EQU ECCP25_IE_CC2IE, 1 .EQU ECCP25_IE_CC1IE, 0 // register------------------------------------- .EQU ECCP25_EGIF, 0x40003840 // 0x4000 3840 ECCP25_EGIF Bits------------------------------------- .EQU ECCP25_EGIF_PDIF, 15 .EQU ECCP25_EGIF_TXUIF, 14 .EQU ECCP25_EGIF_TZUIF, 13 .EQU ECCP25_EGIF_TXIF, 12 .EQU ECCP25_EGIF_TZIF, 11 .EQU ECCP25_EGIF_TXTIF, 10 .EQU ECCP25_EGIF_CC4IF, 9 .EQU ECCP25_EGIF_CC3IF, 8 .EQU ECCP25_EGIF_CC2IF, 7 .EQU ECCP25_EGIF_CC1IF, 6 .EQU ECCP25_EGIF_TXTRG, 5 .EQU ECCP25_EGIF_CC4G, 4 .EQU ECCP25_EGIF_CC3G, 3 .EQU ECCP25_EGIF_CC2G, 2 .EQU ECCP25_EGIF_CC1G, 1 .EQU ECCP25_EGIF_CPIF, 0 // register------------------------------------- .EQU T25_UDTIMX, 0x40003844 // 0x4000 3844 T25_UDTIMX Bits------------------------------------- .EQU T25_UDTIMX_UDCNT7, 7 .EQU T25_UDTIMX_UDCNT6, 6 .EQU T25_UDTIMX_UDCNT5, 5 .EQU T25_UDTIMX_UDCNT4, 4 .EQU T25_UDTIMX_UDCNT3, 3 .EQU T25_UDTIMX_UDCNT2, 2 .EQU T25_UDTIMX_UDCNT1, 1 .EQU T25_UDTIMX_UDCNT0, 0 // register------------------------------------- .EQU T26_UDTIMZ, 0x40003848 // 0x4000 3848 T26_UDTIMZ Bits------------------------------------- .EQU T26_UDTIMZ_UDCNT7, 7 .EQU T26_UDTIMZ_UDCNT6, 6 .EQU T26_UDTIMZ_UDCNT5, 5 .EQU T26_UDTIMZ_UDCNT4, 4 .EQU T26_UDTIMZ_UDCNT3, 3 .EQU T26_UDTIMZ_UDCNT2, 2 .EQU T26_UDTIMZ_UDCNT1, 1 .EQU T26_UDTIMZ_UDCNT0, 0 // register------------------------------------- .EQU ECCP25_DF, 0x4000384C // 0x4000 384C ECCP25_DF Bits------------------------------------- .EQU ECCP25_DF_TXUDF, 7 .EQU ECCP25_DF_TZUDF, 6 .EQU ECCP25_DF_TRIGDF, 5 .EQU ECCP25_DF_CLSDF, 4 .EQU ECCP25_DF_CH4DF, 3 .EQU ECCP25_DF_CH3DF, 2 .EQU ECCP25_DF_CH2DF, 1 .EQU ECCP25_DF_CH1DF, 0 // register------------------------------------- .EQU ECCP25_C1, 0x40003850 // 0x4000 3850 ECCP25_C1 Bits------------------------------------- .EQU ECCP25_C1_ECCPXCY15, 15 .EQU ECCP25_C1_ECCPXCY14, 14 .EQU ECCP25_C1_ECCPXCY13, 13 .EQU ECCP25_C1_ECCPXCY12, 12 .EQU ECCP25_C1_ECCPXCY11, 11 .EQU ECCP25_C1_ECCPXCY10, 10 .EQU ECCP25_C1_ECCPXCY9, 9 .EQU ECCP25_C1_ECCPXCY8, 8 .EQU ECCP25_C1_ECCPXCY7, 7 .EQU ECCP25_C1_ECCPXCY6, 6 .EQU ECCP25_C1_ECCPXCY5, 5 .EQU ECCP25_C1_ECCPXCY4, 4 .EQU ECCP25_C1_ECCPXCY3, 3 .EQU ECCP25_C1_ECCPXCY2, 2 .EQU ECCP25_C1_ECCPXCY1, 1 .EQU ECCP25_C1_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP25_C2, 0x40003854 // 0x4000 3854 ECCP25_C2 Bits------------------------------------- .EQU ECCP25_C2_ECCPXCY15, 15 .EQU ECCP25_C2_ECCPXCY14, 14 .EQU ECCP25_C2_ECCPXCY13, 13 .EQU ECCP25_C2_ECCPXCY12, 12 .EQU ECCP25_C2_ECCPXCY11, 11 .EQU ECCP25_C2_ECCPXCY10, 10 .EQU ECCP25_C2_ECCPXCY9, 9 .EQU ECCP25_C2_ECCPXCY8, 8 .EQU ECCP25_C2_ECCPXCY7, 7 .EQU ECCP25_C2_ECCPXCY6, 6 .EQU ECCP25_C2_ECCPXCY5, 5 .EQU ECCP25_C2_ECCPXCY4, 4 .EQU ECCP25_C2_ECCPXCY3, 3 .EQU ECCP25_C2_ECCPXCY2, 2 .EQU ECCP25_C2_ECCPXCY1, 1 .EQU ECCP25_C2_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP25_C3, 0x40003858 // 0x4000 3858 ECCP25_C3 Bits------------------------------------- .EQU ECCP25_C3_ECCPXCY15, 15 .EQU ECCP25_C3_ECCPXCY14, 14 .EQU ECCP25_C3_ECCPXCY13, 13 .EQU ECCP25_C3_ECCPXCY12, 12 .EQU ECCP25_C3_ECCPXCY11, 11 .EQU ECCP25_C3_ECCPXCY10, 10 .EQU ECCP25_C3_ECCPXCY9, 9 .EQU ECCP25_C3_ECCPXCY8, 8 .EQU ECCP25_C3_ECCPXCY7, 7 .EQU ECCP25_C3_ECCPXCY6, 6 .EQU ECCP25_C3_ECCPXCY5, 5 .EQU ECCP25_C3_ECCPXCY4, 4 .EQU ECCP25_C3_ECCPXCY3, 3 .EQU ECCP25_C3_ECCPXCY2, 2 .EQU ECCP25_C3_ECCPXCY1, 1 .EQU ECCP25_C3_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP25_C4, 0x4000385C // 0x4000 385C ECCP25_C4 Bits------------------------------------- .EQU ECCP25_C4_ECCPXCY15, 15 .EQU ECCP25_C4_ECCPXCY14, 14 .EQU ECCP25_C4_ECCPXCY13, 13 .EQU ECCP25_C4_ECCPXCY12, 12 .EQU ECCP25_C4_ECCPXCY11, 11 .EQU ECCP25_C4_ECCPXCY10, 10 .EQU ECCP25_C4_ECCPXCY9, 9 .EQU ECCP25_C4_ECCPXCY8, 8 .EQU ECCP25_C4_ECCPXCY7, 7 .EQU ECCP25_C4_ECCPXCY6, 6 .EQU ECCP25_C4_ECCPXCY5, 5 .EQU ECCP25_C4_ECCPXCY4, 4 .EQU ECCP25_C4_ECCPXCY3, 3 .EQU ECCP25_C4_ECCPXCY2, 2 .EQU ECCP25_C4_ECCPXCY1, 1 .EQU ECCP25_C4_ECCPXCY0, 0 // register------------------------------------- .EQU ECCP25_DE, 0x40003864 // 0x4000 3864 ECCP25_DE Bits------------------------------------- .EQU ECCP25_DE_TXUDE, 7 .EQU ECCP25_DE_TZUDE, 6 .EQU ECCP25_DE_TXTDE, 5 .EQU ECCP25_DE_CLSDE, 4 .EQU ECCP25_DE_CH4DE, 3 .EQU ECCP25_DE_CH3DE, 2 .EQU ECCP25_DE_CH2DE, 1 .EQU ECCP25_DE_CH1DE, 0 // register------------------------------------- .EQU ECCP25_SRIC, 0x40003868 // 0x4000 3868 ECCP25_SRIC Bits------------------------------------- .EQU ECCP25_SRIC_PDIC, 10 .EQU ECCP25_SRIC_CPIC, 9 .EQU ECCP25_SRIC_TXUIC, 8 .EQU ECCP25_SRIC_TZUIC, 7 .EQU ECCP25_SRIC_TXIC, 6 .EQU ECCP25_SRIC_TZIC, 5 .EQU ECCP25_SRIC_TXTIC, 4 .EQU ECCP25_SRIC_CC4IC, 3 .EQU ECCP25_SRIC_CC3IC, 2 .EQU ECCP25_SRIC_CC2IC, 1 .EQU ECCP25_SRIC_CC1IC, 0 // register------------------------------------- .EQU ECCP25_CTL3, 0x4000386C // 0x4000 386C ECCP25_CTL3 Bits------------------------------------- .EQU ECCP25_CTL3_TRGSEL1, 14 .EQU ECCP25_CTL3_TRGSEL0, 13 .EQU ECCP25_CTL3_CH3HM, 12 .EQU ECCP25_CTL3_CH2HM, 11 .EQU ECCP25_CTL3_CH1HM, 10 .EQU ECCP25_CTL3_CH0HM, 9 .EQU ECCP25_CTL3_GTBEOUT, 8 .EQU ECCP25_CTL3_GTBEN, 7 .EQU ECCP25_CTL3_CAPTST, 6 .EQU ECCP25_CTL3_COMINV1, 5 .EQU ECCP25_CTL3_COMINV0, 4 .EQU ECCP25_CTL3_COMBEN, 3 .EQU ECCP25_CTL3_PXRSEN, 2 .EQU ECCP25_CTL3_TUNITE, 1 .EQU ECCP25_CTL3_PXSPMST, 0 // register------------------------------------- .EQU ECCP25_CAPPRSC, 0x40003880 // 0x4000 3880 ECCP25_CAPPRSC Bits------------------------------------- .EQU ECCP25_CAPPRSC_CH4CAPPR3, 15 .EQU ECCP25_CAPPRSC_CH4CAPPR2, 14 .EQU ECCP25_CAPPRSC_CH4CAPPR1, 13 .EQU ECCP25_CAPPRSC_CH4CAPPR0, 12 .EQU ECCP25_CAPPRSC_CH3CAPPR3, 11 .EQU ECCP25_CAPPRSC_CH3CAPPR2, 10 .EQU ECCP25_CAPPRSC_CH3CAPPR1, 9 .EQU ECCP25_CAPPRSC_CH3CAPPR0, 8 .EQU ECCP25_CAPPRSC_CH2CAPPR3, 7 .EQU ECCP25_CAPPRSC_CH2CAPPR2, 6 .EQU ECCP25_CAPPRSC_CH2CAPPR1, 5 .EQU ECCP25_CAPPRSC_CH2CAPPR0, 4 .EQU ECCP25_CAPPRSC_CH1CAPPR3, 3 .EQU ECCP25_CAPPRSC_CH1CAPPR2, 2 .EQU ECCP25_CAPPRSC_CH1CAPPR1, 1 .EQU ECCP25_CAPPRSC_CH1CAPPR0, 0 // register------------------------------------- .EQU ECCP25_CAPTIME, 0x40003884 // 0x4000 3884 ECCP25_CAPTIME Bits------------------------------------- .EQU ECCP25_CAPTIME_CH4CAPTIME3, 15 .EQU ECCP25_CAPTIME_CH4CAPTIME2, 14 .EQU ECCP25_CAPTIME_CH4CAPTIME1, 13 .EQU ECCP25_CAPTIME_CH4CAPTIME0, 12 .EQU ECCP25_CAPTIME_CH3CAPTIME3, 11 .EQU ECCP25_CAPTIME_CH3CAPTIME2, 10 .EQU ECCP25_CAPTIME_CH3CAPTIME1, 9 .EQU ECCP25_CAPTIME_CH3CAPTIME0, 8 .EQU ECCP25_CAPTIME_CH2CAPTIME3, 7 .EQU ECCP25_CAPTIME_CH2CAPTIME2, 6 .EQU ECCP25_CAPTIME_CH2CAPTIME1, 5 .EQU ECCP25_CAPTIME_CH2CAPTIME0, 4 .EQU ECCP25_CAPTIME_CH1CAPTIME3, 3 .EQU ECCP25_CAPTIME_CH1CAPTIME2, 2 .EQU ECCP25_CAPTIME_CH1CAPTIME1, 1 .EQU ECCP25_CAPTIME_CH1CAPTIME0, 0 // register------------------------------------- .EQU ECCP25_CAPCTL1, 0x40003888 // 0x4000 3888 ECCP25_CAPCTL1 Bits------------------------------------- .EQU ECCP25_CAPCTL1_CH4TIEN, 15 .EQU ECCP25_CAPCTL1_CH3TIEN, 14 .EQU ECCP25_CAPCTL1_CH2TIEN, 13 .EQU ECCP25_CAPCTL1_CH1TIEN, 12 .EQU ECCP25_CAPCTL1_CH4CMODE, 11 .EQU ECCP25_CAPCTL1_CH3CMODE, 10 .EQU ECCP25_CAPCTL1_CH2CMODE, 9 .EQU ECCP25_CAPCTL1_CH1CMODE, 8 .EQU ECCP25_CAPCTL1_CH4CAPED, 7 .EQU ECCP25_CAPCTL1_CH3CAPED, 6 .EQU ECCP25_CAPCTL1_CH2CAPED, 5 .EQU ECCP25_CAPCTL1_CH1CAPED, 4 .EQU ECCP25_CAPCTL1_CH4CAPEN, 3 .EQU ECCP25_CAPCTL1_CH3CAPEN, 2 .EQU ECCP25_CAPCTL1_CH2CAPEN, 1 .EQU ECCP25_CAPCTL1_CH1CAPEN, 0 // register------------------------------------- .EQU ECCP25_CAPCTL2, 0x4000388C // 0x4000 388C ECCP25_CAPCTL2 Bits------------------------------------- .EQU ECCP25_CAPCTL2_CH4CAPPIN2, 11 .EQU ECCP25_CAPCTL2_CH4CAPPIN1, 10 .EQU ECCP25_CAPCTL2_CH4CAPPIN0, 9 .EQU ECCP25_CAPCTL2_CH3CAPPIN2, 8 .EQU ECCP25_CAPCTL2_CH3CAPPIN1, 7 .EQU ECCP25_CAPCTL2_CH3CAPPIN0, 6 .EQU ECCP25_CAPCTL2_CH2CAPPIN2, 5 .EQU ECCP25_CAPCTL2_CH2CAPPIN1, 4 .EQU ECCP25_CAPCTL2_CH2CAPPIN0, 3 .EQU ECCP25_CAPCTL2_CH1CAPPIN2, 2 .EQU ECCP25_CAPCTL2_CH1CAPPIN1, 1 .EQU ECCP25_CAPCTL2_CH1CAPPIN0, 0 // register------------------------------------- .EQU ECCP25_FLCLKP, 0x40003890 // 0x4000 3890 ECCP25_FLCLKP Bits------------------------------------- .EQU ECCP25_FLCLKP_CH4FLCLKP3, 15 .EQU ECCP25_FLCLKP_CH4FLCLKP2, 14 .EQU ECCP25_FLCLKP_CH4FLCLKP1, 13 .EQU ECCP25_FLCLKP_CH4FLCLKP0, 12 .EQU ECCP25_FLCLKP_CH3FLCLKP3, 11 .EQU ECCP25_FLCLKP_CH3FLCLKP2, 10 .EQU ECCP25_FLCLKP_CH3FLCLKP1, 9 .EQU ECCP25_FLCLKP_CH3FLCLKP0, 8 .EQU ECCP25_FLCLKP_CH2FLCLKP3, 7 .EQU ECCP25_FLCLKP_CH2FLCLKP2, 6 .EQU ECCP25_FLCLKP_CH2FLCLKP1, 5 .EQU ECCP25_FLCLKP_CH2FLCLKP0, 4 .EQU ECCP25_FLCLKP_CH1FLCLKP3, 3 .EQU ECCP25_FLCLKP_CH1FLCLKP2, 2 .EQU ECCP25_FLCLKP_CH1FLCLKP1, 1 .EQU ECCP25_FLCLKP_CH1FLCLKP0, 0 // register------------------------------------- .EQU ECCP25_FILTER, 0x40003894 // 0x4000 3894 ECCP25_FILTER Bits------------------------------------- .EQU ECCP25_FILTER_CH4FILTER2, 11 .EQU ECCP25_FILTER_CH4FILTER1, 10 .EQU ECCP25_FILTER_CH4FILTER0, 9 .EQU ECCP25_FILTER_CH3FILTER2, 8 .EQU ECCP25_FILTER_CH3FILTER1, 7 .EQU ECCP25_FILTER_CH3FILTER0, 6 .EQU ECCP25_FILTER_CH2FILTER2, 5 .EQU ECCP25_FILTER_CH2FILTER1, 4 .EQU ECCP25_FILTER_CH2FILTER0, 3 .EQU ECCP25_FILTER_CH1FILTER2, 2 .EQU ECCP25_FILTER_CH1FILTER1, 1 .EQU ECCP25_FILTER_CH1FILTER0, 0 // register------------------------------------- .EQU ECCP25_PHSCTLX, 0x40003898 // 0x4000 3898 ECCP25_PHSCTLX Bits------------------------------------- .EQU ECCP25_PHSCTLX_PHSXDIR, 15 .EQU ECCP25_PHSCTLX_PHSXTIEN, 14 .EQU ECCP25_PHSCTLX_PHSXTIME3, 13 .EQU ECCP25_PHSCTLX_PHSXTIME2, 12 .EQU ECCP25_PHSCTLX_PHSXTIME1, 11 .EQU ECCP25_PHSCTLX_PHSXTIME0, 10 .EQU ECCP25_PHSCTLX_PHSXPRSC3, 9 .EQU ECCP25_PHSCTLX_PHSXPRSC2, 8 .EQU ECCP25_PHSCTLX_PHSXPRSC1, 7 .EQU ECCP25_PHSCTLX_PHSXPRSC0, 6 .EQU ECCP25_PHSCTLX_PHSXSEL2, 5 .EQU ECCP25_PHSCTLX_PHSXSEL1, 4 .EQU ECCP25_PHSCTLX_PHSXSEL0, 3 .EQU ECCP25_PHSCTLX_PHSWTX, 2 .EQU ECCP25_PHSCTLX_PHSXMODE, 1 .EQU ECCP25_PHSCTLX_PHSENX, 0 // register------------------------------------- .EQU ECCP25_PHSCTLZ, 0x4000389C // 0x4000 389C ECCP25_PHSCTLZ Bits------------------------------------- .EQU ECCP25_PHSCTLZ_PHSZDIR, 15 .EQU ECCP25_PHSCTLZ_PHSZTIEN, 14 .EQU ECCP25_PHSCTLZ_PHSZTIME3, 13 .EQU ECCP25_PHSCTLZ_PHSZTIME2, 12 .EQU ECCP25_PHSCTLZ_PHSZTIME1, 11 .EQU ECCP25_PHSCTLZ_PHSZTIME0, 10 .EQU ECCP25_PHSCTLZ_PHSZPRSC3, 9 .EQU ECCP25_PHSCTLZ_PHSZPRSC2, 8 .EQU ECCP25_PHSCTLZ_PHSZPRSC1, 7 .EQU ECCP25_PHSCTLZ_PHSZPRSC0, 6 .EQU ECCP25_PHSCTLZ_PHSZSEL2, 5 .EQU ECCP25_PHSCTLZ_PHSZSEL1, 4 .EQU ECCP25_PHSCTLZ_PHSZSEL0, 3 .EQU ECCP25_PHSCTLZ_PHSWTZ, 2 .EQU ECCP25_PHSCTLZ_PHSZMODE, 1 .EQU ECCP25_PHSCTLZ_PHSENZ, 0 // register------------------------------------- .EQU T25_PHS, 0x400038A0 // 0x4000 38A0 T25_PHS Bits------------------------------------- .EQU T25_PHS_PHSX15, 15 .EQU T25_PHS_PHSX14, 14 .EQU T25_PHS_PHSX13, 13 .EQU T25_PHS_PHSX12, 12 .EQU T25_PHS_PHSX11, 11 .EQU T25_PHS_PHSX10, 10 .EQU T25_PHS_PHSX9, 9 .EQU T25_PHS_PHSX8, 8 .EQU T25_PHS_PHSX7, 7 .EQU T25_PHS_PHSX6, 6 .EQU T25_PHS_PHSX5, 5 .EQU T25_PHS_PHSX4, 4 .EQU T25_PHS_PHSX3, 3 .EQU T25_PHS_PHSX2, 2 .EQU T25_PHS_PHSX1, 1 .EQU T25_PHS_PHSX0, 0 // register------------------------------------- .EQU T26_PHS, 0x400038A4 // 0x4000 38A4 T26_PHS Bits------------------------------------- .EQU T26_PHS_PHSZ15, 15 .EQU T26_PHS_PHSZ14, 14 .EQU T26_PHS_PHSZ13, 13 .EQU T26_PHS_PHSZ12, 12 .EQU T26_PHS_PHSZ11, 11 .EQU T26_PHS_PHSZ10, 10 .EQU T26_PHS_PHSZ9, 9 .EQU T26_PHS_PHSZ8, 8 .EQU T26_PHS_PHSZ7, 7 .EQU T26_PHS_PHSZ6, 6 .EQU T26_PHS_PHSZ5, 5 .EQU T26_PHS_PHSZ4, 4 .EQU T26_PHS_PHSZ3, 3 .EQU T26_PHS_PHSZ2, 2 .EQU T26_PHS_PHSZ1, 1 .EQU T26_PHS_PHSZ0, 0 // register------------------------------------- .EQU ECCP25_CTL4, 0x400038A8 // 0x4000 38A8 ECCP25_CTL4 Bits------------------------------------- .EQU ECCP25_CTL4_CAPFILTEN4, 12 .EQU ECCP25_CTL4_CAPFILTEN3, 11 .EQU ECCP25_CTL4_CAPFILTEN2, 10 .EQU ECCP25_CTL4_CAPFILTEN1, 9 .EQU ECCP25_CTL4_TUDMODE1, 4 .EQU ECCP25_CTL4_TUDMODE0, 3 .EQU ECCP25_CTL4_TRGUDEN1, 2 .EQU ECCP25_CTL4_TRGUDEN0, 1 .EQU ECCP25_CTL4_TUDREN, 0 // register------------------------------------- .EQU ECCP25_PXDTCTL2, 0x400038AC // 0x4000 38AC ECCP25_PXDTCTL2 Bits------------------------------------- .EQU ECCP25_PXDTCTL2_CH2PXDC7, 15 .EQU ECCP25_PXDTCTL2_CH2PXDC6, 14 .EQU ECCP25_PXDTCTL2_CH2PXDC5, 13 .EQU ECCP25_PXDTCTL2_CH2PXDC4, 12 .EQU ECCP25_PXDTCTL2_CH2PXDC3, 11 .EQU ECCP25_PXDTCTL2_CH2PXDC2, 10 .EQU ECCP25_PXDTCTL2_CH2PXDC1, 9 .EQU ECCP25_PXDTCTL2_CH2PXDC0, 8 .EQU ECCP25_PXDTCTL2_CH1PXDC7, 7 .EQU ECCP25_PXDTCTL2_CH1PXDC6, 6 .EQU ECCP25_PXDTCTL2_CH1PXDC5, 5 .EQU ECCP25_PXDTCTL2_CH1PXDC4, 4 .EQU ECCP25_PXDTCTL2_CH1PXDC3, 3 .EQU ECCP25_PXDTCTL2_CH1PXDC2, 2 .EQU ECCP25_PXDTCTL2_CH1PXDC1, 1 .EQU ECCP25_PXDTCTL2_CH1PXDC0, 0 // register------------------------------------- .EQU ECCP25_PXDTCFG, 0x400038B0 // 0x4000 38B0 ECCP25_PXDTCFG Bits------------------------------------- .EQU ECCP25_PXDTCFG_CH4DTCLK3, 15 .EQU ECCP25_PXDTCFG_CH4DTCLK2, 14 .EQU ECCP25_PXDTCFG_CH4DTCLK1, 13 .EQU ECCP25_PXDTCFG_CH4DTCLK0, 12 .EQU ECCP25_PXDTCFG_CH3DTCLK3, 11 .EQU ECCP25_PXDTCFG_CH3DTCLK2, 10 .EQU ECCP25_PXDTCFG_CH3DTCLK1, 9 .EQU ECCP25_PXDTCFG_CH3DTCLK0, 8 .EQU ECCP25_PXDTCFG_CH2DTCLK3, 7 .EQU ECCP25_PXDTCFG_CH2DTCLK2, 6 .EQU ECCP25_PXDTCFG_CH2DTCLK1, 5 .EQU ECCP25_PXDTCFG_CH2DTCLK0, 4 .EQU ECCP25_PXDTCFG_CH1DTCLK3, 3 .EQU ECCP25_PXDTCFG_CH1DTCLK2, 2 .EQU ECCP25_PXDTCFG_CH1DTCLK1, 1 .EQU ECCP25_PXDTCFG_CH1DTCLK0, 0 // register------------------------------------- .EQU OSC_CTL0, 0x40003900 // 0x4000 3900 OSC_CTL0 Bits------------------------------------- .EQU OSC_CTL0_PLL1DIV, 29 .EQU OSC_CTL0_PLL0DIV, 28 .EQU OSC_CTL0_LFCKDIV2, 26 .EQU OSC_CTL0_LFCKDIV1, 25 .EQU OSC_CTL0_LFCKDIV0, 24 .EQU OSC_CTL0_HFCKDIV3, 23 .EQU OSC_CTL0_HFCKDIV2, 22 .EQU OSC_CTL0_HFCKDIV1, 21 .EQU OSC_CTL0_HFCKDIV0, 20 .EQU OSC_CTL0_SCKDIV2, 18 .EQU OSC_CTL0_SCKDIV1, 17 .EQU OSC_CTL0_SCKDIV0, 16 .EQU OSC_CTL0_PLL1CKS, 13 .EQU OSC_CTL0_PLL0CKS, 12 .EQU OSC_CTL0_HFCKS2, 11 .EQU OSC_CTL0_HFCKS1, 10 .EQU OSC_CTL0_HFCKS0, 9 .EQU OSC_CTL0_HFCKEN, 8 .EQU OSC_CTL0_LFCKS1, 7 .EQU OSC_CTL0_LFCKS0, 6 .EQU OSC_CTL0_LFCKEN, 4 .EQU OSC_CTL0_SCKS2, 3 .EQU OSC_CTL0_SCKS1, 2 .EQU OSC_CTL0_SCKS0, 1 .EQU OSC_CTL0_PMWREN, 0 // register------------------------------------- .EQU OSC_CTL1, 0x40003904 // 0x4000 3904 OSC_CTL1 Bits------------------------------------- .EQU OSC_CTL1_CLKOUTDIV2, 31 .EQU OSC_CTL1_CLKOUTDIV1, 30 .EQU OSC_CTL1_CLKOUTDIV0, 29 .EQU OSC_CTL1_CLKOE, 28 .EQU OSC_CTL1_CLKOUTS3, 27 .EQU OSC_CTL1_CLKOUTS2, 26 .EQU OSC_CTL1_CLKOUTS1, 25 .EQU OSC_CTL1_CLKOUTS0, 24 .EQU OSC_CTL1_FSCMS2, 23 .EQU OSC_CTL1_FSCMS1, 22 .EQU OSC_CTL1_FSCMS0, 21 .EQU OSC_CTL1_FSCMGAP2, 19 .EQU OSC_CTL1_FSCMGAP1, 18 .EQU OSC_CTL1_FSCMGAP0, 17 .EQU OSC_CTL1_FSCM, 16 .EQU OSC_CTL1_HF1CKDIV3, 13 .EQU OSC_CTL1_HF1CKDIV2, 12 .EQU OSC_CTL1_HF1CKDIV1, 11 .EQU OSC_CTL1_HF1CKDIV0, 10 .EQU OSC_CTL1_HF1CKS2, 9 .EQU OSC_CTL1_HF1CKS1, 8 .EQU OSC_CTL1_HF1CKS0, 7 .EQU OSC_CTL1_HF1CKEN, 6 .EQU OSC_CTL1_LPHFDLY3, 3 .EQU OSC_CTL1_LPHFDLY2, 2 .EQU OSC_CTL1_LPHFDLY1, 1 .EQU OSC_CTL1_LPHFDLY0, 0 // register------------------------------------- .EQU OSC_INT, 0x40003908 // 0x4000 3908 OSC_INT Bits------------------------------------- .EQU OSC_INT_LPLFIE, 24 .EQU OSC_INT_LPLFIF, 16 .EQU OSC_INT_LPHFIE, 14 .EQU OSC_INT_PLL1IE, 13 .EQU OSC_INT_PLL0IE, 12 .EQU OSC_INT_EHFIE, 11 .EQU OSC_INT_ELFIE, 10 .EQU OSC_INT_IHFIE, 9 .EQU OSC_INT_ILFIE, 8 .EQU OSC_INT_CKFIF, 7 .EQU OSC_INT_LPHFIF, 6 .EQU OSC_INT_PLL1IF, 5 .EQU OSC_INT_PLL0IF, 4 .EQU OSC_INT_EHFIF, 3 .EQU OSC_INT_ELFIF, 2 .EQU OSC_INT_IHFIF, 1 .EQU OSC_INT_ILFIF, 0 // register------------------------------------- .EQU OSC_CTL2, 0x4000390C // 0x4000 390C OSC_CTL2 Bits------------------------------------- .EQU OSC_CTL2_PLL1DLY3, 31 .EQU OSC_CTL2_PLL1DLY2, 30 .EQU OSC_CTL2_PLL1DLY1, 29 .EQU OSC_CTL2_PLL1DLY0, 28 .EQU OSC_CTL2_PLL0DLY3, 27 .EQU OSC_CTL2_PLL0DLY2, 26 .EQU OSC_CTL2_PLL0DLY1, 25 .EQU OSC_CTL2_PLL0DLY0, 24 .EQU OSC_CTL2_EHFDLY3, 23 .EQU OSC_CTL2_EHFDLY2, 22 .EQU OSC_CTL2_EHFDLY1, 21 .EQU OSC_CTL2_EHFDLY0, 20 .EQU OSC_CTL2_ELFDLY3, 19 .EQU OSC_CTL2_ELFDLY2, 18 .EQU OSC_CTL2_ELFDLY1, 17 .EQU OSC_CTL2_ELFDLY0, 16 .EQU OSC_CTL2_IHFDLY3, 15 .EQU OSC_CTL2_IHFDLY2, 14 .EQU OSC_CTL2_IHFDLY1, 13 .EQU OSC_CTL2_IHFDLY0, 12 .EQU OSC_CTL2_ILFDLY3, 11 .EQU OSC_CTL2_ILFDLY2, 10 .EQU OSC_CTL2_ILFDLY1, 9 .EQU OSC_CTL2_ILFDLY0, 8 .EQU OSC_CTL2_LPLFSWEN, 7 .EQU OSC_CTL2_LPHFSWEN, 6 .EQU OSC_CTL2_PLL1SWEN, 5 .EQU OSC_CTL2_PLL0SWEN, 4 .EQU OSC_CTL2_EXTHFSWEN, 3 .EQU OSC_CTL2_EXTLFSWEN, 2 .EQU OSC_CTL2_INTHFSWEN, 1 .EQU OSC_CTL2_INTLFSWEN, 0 // register------------------------------------- .EQU OSC_CTL3, 0x40003918 // 0x4000 3918 OSC_CTL3 Bits------------------------------------- .EQU OSC_CTL3_XTHCOMPI1, 15 .EQU OSC_CTL3_XTHCOMPI0, 14 .EQU OSC_CTL3_XTHCOMPEN, 13 .EQU OSC_CTL3_XTHR200K, 11 .EQU OSC_CTL3_XTHR470K, 10 .EQU OSC_CTL3_XTHR2M, 9 .EQU OSC_CTL3_GMBOOST3, 5 .EQU OSC_CTL3_GMBOOST2, 4 .EQU OSC_CTL3_GMBOOST1, 3 .EQU OSC_CTL3_GMBOOST0, 2 .EQU OSC_CTL3_HSEMODESEL, 1 .EQU OSC_CTL3_HSXTALEXEN, 0 // register------------------------------------- .EQU OSC_HF2CTL, 0x40003920 // 0x4000 3920 OSC_HF2CTL Bits------------------------------------- .EQU OSC_HF2CTL_OSC2EN, 0 // register------------------------------------- .EQU OSC_HF3CTL, 0x40003930 // 0x4000 3930 OSC_HF3CTL Bits------------------------------------- .EQU OSC_HF3CTL_OSCSEL, 27 // register------------------------------------- .EQU CMU_CTL, 0x40003980 // 0x4000 3980 CMU_CTL Bits------------------------------------- .EQU CMU_CTL_FLLIC4, 11 .EQU CMU_CTL_FHHIC4, 10 .EQU CMU_CTL_FLLIC3, 9 .EQU CMU_CTL_FHHIC3, 8 .EQU CMU_CTL_FLLIC2, 7 .EQU CMU_CTL_FHHIC2, 6 .EQU CMU_CTL_FLLIC1, 5 .EQU CMU_CTL_FHHIC1, 4 .EQU CMU_CTL_CMUEN4, 3 .EQU CMU_CTL_CMUEN3, 2 .EQU CMU_CTL_CMUEN2, 1 .EQU CMU_CTL_CMUEN1, 0 // register------------------------------------- .EQU CMU_INT, 0x40003984 // 0x4000 3984 CMU_INT Bits------------------------------------- .EQU CMU_INT_FLLIE4, 15 .EQU CMU_INT_FHHIE4, 14 .EQU CMU_INT_FLLIE3, 13 .EQU CMU_INT_FHHIE3, 12 .EQU CMU_INT_FLLIE2, 11 .EQU CMU_INT_FHHIE2, 10 .EQU CMU_INT_FLLIE1, 9 .EQU CMU_INT_FHHIE1, 8 .EQU CMU_INT_FLLIF4, 7 .EQU CMU_INT_FHHIF4, 6 .EQU CMU_INT_FLLIF3, 5 .EQU CMU_INT_FHHIF3, 4 .EQU CMU_INT_FLLIF2, 3 .EQU CMU_INT_FHHIF2, 2 .EQU CMU_INT_FLLIF1, 1 .EQU CMU_INT_FHHIF1, 0 // register------------------------------------- .EQU CMU_REFCNT1, 0x40003988 // 0x4000 3988 CMU_REFCNT1 Bits------------------------------------- .EQU CMU_REFCNT1_REFCNT15, 15 .EQU CMU_REFCNT1_REFCNT14, 14 .EQU CMU_REFCNT1_REFCNT13, 13 .EQU CMU_REFCNT1_REFCNT12, 12 .EQU CMU_REFCNT1_REFCNT11, 11 .EQU CMU_REFCNT1_REFCNT10, 10 .EQU CMU_REFCNT1_REFCNT9, 9 .EQU CMU_REFCNT1_REFCNT8, 8 .EQU CMU_REFCNT1_REFCNT7, 7 .EQU CMU_REFCNT1_REFCNT6, 6 .EQU CMU_REFCNT1_REFCNT5, 5 .EQU CMU_REFCNT1_REFCNT4, 4 .EQU CMU_REFCNT1_REFCNT3, 3 .EQU CMU_REFCNT1_REFCNT2, 2 .EQU CMU_REFCNT1_REFCNT1, 1 .EQU CMU_REFCNT1_REFCNT0, 0 // register------------------------------------- .EQU CMU_HTC1, 0x4000398C // 0x4000 398C CMU_HTC1 Bits------------------------------------- .EQU CMU_HTC1_HFREF23, 23 .EQU CMU_HTC1_HFREF22, 22 .EQU CMU_HTC1_HFREF21, 21 .EQU CMU_HTC1_HFREF20, 20 .EQU CMU_HTC1_HFREF19, 19 .EQU CMU_HTC1_HFREF18, 18 .EQU CMU_HTC1_HFREF17, 17 .EQU CMU_HTC1_HFREF16, 16 .EQU CMU_HTC1_HFREF15, 15 .EQU CMU_HTC1_HFREF14, 14 .EQU CMU_HTC1_HFREF13, 13 .EQU CMU_HTC1_HFREF12, 12 .EQU CMU_HTC1_HFREF11, 11 .EQU CMU_HTC1_HFREF10, 10 .EQU CMU_HTC1_HFREF9, 9 .EQU CMU_HTC1_HFREF8, 8 .EQU CMU_HTC1_HFREF7, 7 .EQU CMU_HTC1_HFREF6, 6 .EQU CMU_HTC1_HFREF5, 5 .EQU CMU_HTC1_HFREF4, 4 .EQU CMU_HTC1_HFREF3, 3 .EQU CMU_HTC1_HFREF2, 2 .EQU CMU_HTC1_HFREF1, 1 .EQU CMU_HTC1_HFREF0, 0 // register------------------------------------- .EQU CMU_LTC1, 0x40003990 // 0x4000 3990 CMU_LTC1 Bits------------------------------------- .EQU CMU_LTC1_LFREF23, 23 .EQU CMU_LTC1_LFREF22, 22 .EQU CMU_LTC1_LFREF21, 21 .EQU CMU_LTC1_LFREF20, 20 .EQU CMU_LTC1_LFREF19, 19 .EQU CMU_LTC1_LFREF18, 18 .EQU CMU_LTC1_LFREF17, 17 .EQU CMU_LTC1_LFREF16, 16 .EQU CMU_LTC1_LFREF15, 15 .EQU CMU_LTC1_LFREF14, 14 .EQU CMU_LTC1_LFREF13, 13 .EQU CMU_LTC1_LFREF12, 12 .EQU CMU_LTC1_LFREF11, 11 .EQU CMU_LTC1_LFREF10, 10 .EQU CMU_LTC1_LFREF9, 9 .EQU CMU_LTC1_LFREF8, 8 .EQU CMU_LTC1_LFREF7, 7 .EQU CMU_LTC1_LFREF6, 6 .EQU CMU_LTC1_LFREF5, 5 .EQU CMU_LTC1_LFREF4, 4 .EQU CMU_LTC1_LFREF3, 3 .EQU CMU_LTC1_LFREF2, 2 .EQU CMU_LTC1_LFREF1, 1 .EQU CMU_LTC1_LFREF0, 0 // register------------------------------------- .EQU CMU_REFCNT2, 0x40003994 // 0x4000 3994 CMU_REFCNT2 Bits------------------------------------- .EQU CMU_REFCNT2_REFCNT15, 15 .EQU CMU_REFCNT2_REFCNT14, 14 .EQU CMU_REFCNT2_REFCNT13, 13 .EQU CMU_REFCNT2_REFCNT12, 12 .EQU CMU_REFCNT2_REFCNT11, 11 .EQU CMU_REFCNT2_REFCNT10, 10 .EQU CMU_REFCNT2_REFCNT9, 9 .EQU CMU_REFCNT2_REFCNT8, 8 .EQU CMU_REFCNT2_REFCNT7, 7 .EQU CMU_REFCNT2_REFCNT6, 6 .EQU CMU_REFCNT2_REFCNT5, 5 .EQU CMU_REFCNT2_REFCNT4, 4 .EQU CMU_REFCNT2_REFCNT3, 3 .EQU CMU_REFCNT2_REFCNT2, 2 .EQU CMU_REFCNT2_REFCNT1, 1 .EQU CMU_REFCNT2_REFCNT0, 0 // register------------------------------------- .EQU CMU_HTC2, 0x40003998 // 0x4000 3998 CMU_HTC2 Bits------------------------------------- .EQU CMU_HTC2_HFREF23, 23 .EQU CMU_HTC2_HFREF22, 22 .EQU CMU_HTC2_HFREF21, 21 .EQU CMU_HTC2_HFREF20, 20 .EQU CMU_HTC2_HFREF19, 19 .EQU CMU_HTC2_HFREF18, 18 .EQU CMU_HTC2_HFREF17, 17 .EQU CMU_HTC2_HFREF16, 16 .EQU CMU_HTC2_HFREF15, 15 .EQU CMU_HTC2_HFREF14, 14 .EQU CMU_HTC2_HFREF13, 13 .EQU CMU_HTC2_HFREF12, 12 .EQU CMU_HTC2_HFREF11, 11 .EQU CMU_HTC2_HFREF10, 10 .EQU CMU_HTC2_HFREF9, 9 .EQU CMU_HTC2_HFREF8, 8 .EQU CMU_HTC2_HFREF7, 7 .EQU CMU_HTC2_HFREF6, 6 .EQU CMU_HTC2_HFREF5, 5 .EQU CMU_HTC2_HFREF4, 4 .EQU CMU_HTC2_HFREF3, 3 .EQU CMU_HTC2_HFREF2, 2 .EQU CMU_HTC2_HFREF1, 1 .EQU CMU_HTC2_HFREF0, 0 // register------------------------------------- .EQU CMU_LTC2, 0x4000399C // 0x4000 399C CMU_LTC2 Bits------------------------------------- .EQU CMU_LTC2_LFREF23, 23 .EQU CMU_LTC2_LFREF22, 22 .EQU CMU_LTC2_LFREF21, 21 .EQU CMU_LTC2_LFREF20, 20 .EQU CMU_LTC2_LFREF19, 19 .EQU CMU_LTC2_LFREF18, 18 .EQU CMU_LTC2_LFREF17, 17 .EQU CMU_LTC2_LFREF16, 16 .EQU CMU_LTC2_LFREF15, 15 .EQU CMU_LTC2_LFREF14, 14 .EQU CMU_LTC2_LFREF13, 13 .EQU CMU_LTC2_LFREF12, 12 .EQU CMU_LTC2_LFREF11, 11 .EQU CMU_LTC2_LFREF10, 10 .EQU CMU_LTC2_LFREF9, 9 .EQU CMU_LTC2_LFREF8, 8 .EQU CMU_LTC2_LFREF7, 7 .EQU CMU_LTC2_LFREF6, 6 .EQU CMU_LTC2_LFREF5, 5 .EQU CMU_LTC2_LFREF4, 4 .EQU CMU_LTC2_LFREF3, 3 .EQU CMU_LTC2_LFREF2, 2 .EQU CMU_LTC2_LFREF1, 1 .EQU CMU_LTC2_LFREF0, 0 // register------------------------------------- .EQU CMU_REFCNT3, 0x400039A0 // 0x4000 39A0 CMU_REFCNT3 Bits------------------------------------- .EQU CMU_REFCNT3_REFCNT15, 15 .EQU CMU_REFCNT3_REFCNT14, 14 .EQU CMU_REFCNT3_REFCNT13, 13 .EQU CMU_REFCNT3_REFCNT12, 12 .EQU CMU_REFCNT3_REFCNT11, 11 .EQU CMU_REFCNT3_REFCNT10, 10 .EQU CMU_REFCNT3_REFCNT9, 9 .EQU CMU_REFCNT3_REFCNT8, 8 .EQU CMU_REFCNT3_REFCNT7, 7 .EQU CMU_REFCNT3_REFCNT6, 6 .EQU CMU_REFCNT3_REFCNT5, 5 .EQU CMU_REFCNT3_REFCNT4, 4 .EQU CMU_REFCNT3_REFCNT3, 3 .EQU CMU_REFCNT3_REFCNT2, 2 .EQU CMU_REFCNT3_REFCNT1, 1 .EQU CMU_REFCNT3_REFCNT0, 0 // register------------------------------------- .EQU CMU_HTC3, 0x400039A4 // 0x4000 39A4 CMU_HTC3 Bits------------------------------------- .EQU CMU_HTC3_HFREF23, 23 .EQU CMU_HTC3_HFREF22, 22 .EQU CMU_HTC3_HFREF21, 21 .EQU CMU_HTC3_HFREF20, 20 .EQU CMU_HTC3_HFREF19, 19 .EQU CMU_HTC3_HFREF18, 18 .EQU CMU_HTC3_HFREF17, 17 .EQU CMU_HTC3_HFREF16, 16 .EQU CMU_HTC3_HFREF15, 15 .EQU CMU_HTC3_HFREF14, 14 .EQU CMU_HTC3_HFREF13, 13 .EQU CMU_HTC3_HFREF12, 12 .EQU CMU_HTC3_HFREF11, 11 .EQU CMU_HTC3_HFREF10, 10 .EQU CMU_HTC3_HFREF9, 9 .EQU CMU_HTC3_HFREF8, 8 .EQU CMU_HTC3_HFREF7, 7 .EQU CMU_HTC3_HFREF6, 6 .EQU CMU_HTC3_HFREF5, 5 .EQU CMU_HTC3_HFREF4, 4 .EQU CMU_HTC3_HFREF3, 3 .EQU CMU_HTC3_HFREF2, 2 .EQU CMU_HTC3_HFREF1, 1 .EQU CMU_HTC3_HFREF0, 0 // register------------------------------------- .EQU CMU_LTC3, 0x400039A8 // 0x4000 39A8 CMU_LTC3 Bits------------------------------------- .EQU CMU_LTC3_LFREF23, 23 .EQU CMU_LTC3_LFREF22, 22 .EQU CMU_LTC3_LFREF21, 21 .EQU CMU_LTC3_LFREF20, 20 .EQU CMU_LTC3_LFREF19, 19 .EQU CMU_LTC3_LFREF18, 18 .EQU CMU_LTC3_LFREF17, 17 .EQU CMU_LTC3_LFREF16, 16 .EQU CMU_LTC3_LFREF15, 15 .EQU CMU_LTC3_LFREF14, 14 .EQU CMU_LTC3_LFREF13, 13 .EQU CMU_LTC3_LFREF12, 12 .EQU CMU_LTC3_LFREF11, 11 .EQU CMU_LTC3_LFREF10, 10 .EQU CMU_LTC3_LFREF9, 9 .EQU CMU_LTC3_LFREF8, 8 .EQU CMU_LTC3_LFREF7, 7 .EQU CMU_LTC3_LFREF6, 6 .EQU CMU_LTC3_LFREF5, 5 .EQU CMU_LTC3_LFREF4, 4 .EQU CMU_LTC3_LFREF3, 3 .EQU CMU_LTC3_LFREF2, 2 .EQU CMU_LTC3_LFREF1, 1 .EQU CMU_LTC3_LFREF0, 0 // register------------------------------------- .EQU CMU_REFCNT4, 0x400039AC // 0x4000 39AC CMU_REFCNT4 Bits------------------------------------- .EQU CMU_REFCNT4_REFCNT15, 15 .EQU CMU_REFCNT4_REFCNT14, 14 .EQU CMU_REFCNT4_REFCNT13, 13 .EQU CMU_REFCNT4_REFCNT12, 12 .EQU CMU_REFCNT4_REFCNT11, 11 .EQU CMU_REFCNT4_REFCNT10, 10 .EQU CMU_REFCNT4_REFCNT9, 9 .EQU CMU_REFCNT4_REFCNT8, 8 .EQU CMU_REFCNT4_REFCNT7, 7 .EQU CMU_REFCNT4_REFCNT6, 6 .EQU CMU_REFCNT4_REFCNT5, 5 .EQU CMU_REFCNT4_REFCNT4, 4 .EQU CMU_REFCNT4_REFCNT3, 3 .EQU CMU_REFCNT4_REFCNT2, 2 .EQU CMU_REFCNT4_REFCNT1, 1 .EQU CMU_REFCNT4_REFCNT0, 0 // register------------------------------------- .EQU CMU_HTC4, 0x400039B0 // 0x4000 39B0 CMU_HTC4 Bits------------------------------------- .EQU CMU_HTC4_HFREF23, 23 .EQU CMU_HTC4_HFREF22, 22 .EQU CMU_HTC4_HFREF21, 21 .EQU CMU_HTC4_HFREF20, 20 .EQU CMU_HTC4_HFREF19, 19 .EQU CMU_HTC4_HFREF18, 18 .EQU CMU_HTC4_HFREF17, 17 .EQU CMU_HTC4_HFREF16, 16 .EQU CMU_HTC4_HFREF15, 15 .EQU CMU_HTC4_HFREF14, 14 .EQU CMU_HTC4_HFREF13, 13 .EQU CMU_HTC4_HFREF12, 12 .EQU CMU_HTC4_HFREF11, 11 .EQU CMU_HTC4_HFREF10, 10 .EQU CMU_HTC4_HFREF9, 9 .EQU CMU_HTC4_HFREF8, 8 .EQU CMU_HTC4_HFREF7, 7 .EQU CMU_HTC4_HFREF6, 6 .EQU CMU_HTC4_HFREF5, 5 .EQU CMU_HTC4_HFREF4, 4 .EQU CMU_HTC4_HFREF3, 3 .EQU CMU_HTC4_HFREF2, 2 .EQU CMU_HTC4_HFREF1, 1 .EQU CMU_HTC4_HFREF0, 0 // register------------------------------------- .EQU CMU_LTC4, 0x400039B4 // 0x4000 39B4 CMU_LTC4 Bits------------------------------------- .EQU CMU_LTC4_LFREF23, 23 .EQU CMU_LTC4_LFREF22, 22 .EQU CMU_LTC4_LFREF21, 21 .EQU CMU_LTC4_LFREF20, 20 .EQU CMU_LTC4_LFREF19, 19 .EQU CMU_LTC4_LFREF18, 18 .EQU CMU_LTC4_LFREF17, 17 .EQU CMU_LTC4_LFREF16, 16 .EQU CMU_LTC4_LFREF15, 15 .EQU CMU_LTC4_LFREF14, 14 .EQU CMU_LTC4_LFREF13, 13 .EQU CMU_LTC4_LFREF12, 12 .EQU CMU_LTC4_LFREF11, 11 .EQU CMU_LTC4_LFREF10, 10 .EQU CMU_LTC4_LFREF9, 9 .EQU CMU_LTC4_LFREF8, 8 .EQU CMU_LTC4_LFREF7, 7 .EQU CMU_LTC4_LFREF6, 6 .EQU CMU_LTC4_LFREF5, 5 .EQU CMU_LTC4_LFREF4, 4 .EQU CMU_LTC4_LFREF3, 3 .EQU CMU_LTC4_LFREF2, 2 .EQU CMU_LTC4_LFREF1, 1 .EQU CMU_LTC4_LFREF0, 0 // register------------------------------------- .EQU QSPI_CTRL0, 0x40003A00 // 0x4000 3A00 QSPI_CTRL0 Bits------------------------------------- .EQU QSPI_CTRL0_MTYP2, 30 .EQU QSPI_CTRL0_MTYP1, 29 .EQU QSPI_CTRL0_MTYP0, 28 .EQU QSPI_CTRL0_CSHT2, 26 .EQU QSPI_CTRL0_CSHT1, 25 .EQU QSPI_CTRL0_CSHT0, 24 .EQU QSPI_CTRL0_FMODE1, 21 .EQU QSPI_CTRL0_FMODE0, 20 .EQU QSPI_CTRL0_CKMODE, 19 .EQU QSPI_CTRL0_FRCK, 18 .EQU QSPI_CTRL0_PMM, 17 .EQU QSPI_CTRL0_APMS, 16 .EQU QSPI_CTRL0_FTHRES4, 12 .EQU QSPI_CTRL0_FTHRES3, 11 .EQU QSPI_CTRL0_FTHRES2, 10 .EQU QSPI_CTRL0_FTHRES1, 9 .EQU QSPI_CTRL0_FTHRES0, 8 .EQU QSPI_CTRL0_HYPDB, 7 .EQU QSPI_CTRL0_MLSEL, 6 .EQU QSPI_CTRL0_FSEL, 5 .EQU QSPI_CTRL0_TCEN, 3 .EQU QSPI_CTRL0_DMAEN, 2 .EQU QSPI_CTRL0_ABORT, 1 .EQU QSPI_CTRL0_EN, 0 // register------------------------------------- .EQU QSPI_CTRL1, 0x40003A04 // 0x4000 3A04 QSPI_CTRL1 Bits------------------------------------- .EQU QSPI_CTRL1_CKS1, 29 .EQU QSPI_CTRL1_CKS0, 28 .EQU QSPI_CTRL1_TCSH3, 27 .EQU QSPI_CTRL1_TCSH2, 26 .EQU QSPI_CTRL1_TCSH1, 25 .EQU QSPI_CTRL1_TCSH0, 24 .EQU QSPI_CTRL1_TCSS3, 23 .EQU QSPI_CTRL1_TCSS2, 22 .EQU QSPI_CTRL1_TCSS1, 21 .EQU QSPI_CTRL1_TCSS0, 20 .EQU QSPI_CTRL1_WRAPSIZE2, 18 .EQU QSPI_CTRL1_WRAPSIZE1, 17 .EQU QSPI_CTRL1_WRAPSIZE0, 16 .EQU QSPI_CTRL1_CLKDIV7, 15 .EQU QSPI_CTRL1_CLKDIV6, 14 .EQU QSPI_CTRL1_CLKDIV5, 13 .EQU QSPI_CTRL1_CLKDIV4, 12 .EQU QSPI_CTRL1_CLKDIV3, 11 .EQU QSPI_CTRL1_CLKDIV2, 10 .EQU QSPI_CTRL1_CLKDIV1, 9 .EQU QSPI_CTRL1_CLKDIV0, 8 .EQU QSPI_CTRL1_MEMSIZE4, 4 .EQU QSPI_CTRL1_MEMSIZE3, 3 .EQU QSPI_CTRL1_MEMSIZE2, 2 .EQU QSPI_CTRL1_MEMSIZE1, 1 .EQU QSPI_CTRL1_MEMSIZE0, 0 // register------------------------------------- .EQU QSPI_CTRL2, 0x40003A08 // 0x4000 3A08 QSPI_CTRL2 Bits------------------------------------- .EQU QSPI_CTRL2_REFRESH15, 31 .EQU QSPI_CTRL2_REFRESH14, 30 .EQU QSPI_CTRL2_REFRESH13, 29 .EQU QSPI_CTRL2_REFRESH12, 28 .EQU QSPI_CTRL2_REFRESH11, 27 .EQU QSPI_CTRL2_REFRESH10, 26 .EQU QSPI_CTRL2_REFRESH9, 25 .EQU QSPI_CTRL2_REFRESH8, 24 .EQU QSPI_CTRL2_REFRESH7, 23 .EQU QSPI_CTRL2_REFRESH6, 22 .EQU QSPI_CTRL2_REFRESH5, 21 .EQU QSPI_CTRL2_REFRESH4, 20 .EQU QSPI_CTRL2_REFRESH3, 19 .EQU QSPI_CTRL2_REFRESH2, 18 .EQU QSPI_CTRL2_REFRESH1, 17 .EQU QSPI_CTRL2_REFRESH0, 16 .EQU QSPI_CTRL2_CSBOUND4, 4 .EQU QSPI_CTRL2_CSBOUND3, 3 .EQU QSPI_CTRL2_CSBOUND2, 2 .EQU QSPI_CTRL2_CSBOUND1, 1 .EQU QSPI_CTRL2_CSBOUND0, 0 // register------------------------------------- .EQU QSPI_IER, 0x40003A0C // 0x4000 3A0C QSPI_IER Bits------------------------------------- .EQU QSPI_IER_TOIC, 11 .EQU QSPI_IER_SMIC, 10 .EQU QSPI_IER_TCIC, 8 .EQU QSPI_IER_CARIC, 7 .EQU QSPI_IER_AOEIC, 6 .EQU QSPI_IER_TOIE, 5 .EQU QSPI_IER_SMIE, 4 .EQU QSPI_IER_FTIE, 3 .EQU QSPI_IER_TCIE, 2 .EQU QSPI_IER_CARIE, 1 .EQU QSPI_IER_AOEIE, 0 // register------------------------------------- .EQU QSPI_IFR, 0x40003A10 // 0x4000 3A10 QSPI_IFR Bits------------------------------------- .EQU QSPI_IFR_NOTREAD, 14 .EQU QSPI_IFR_FCNT5, 13 .EQU QSPI_IFR_FCNT4, 12 .EQU QSPI_IFR_FCNT3, 11 .EQU QSPI_IFR_FCNT2, 10 .EQU QSPI_IFR_FCNT1, 9 .EQU QSPI_IFR_FCNT0, 8 .EQU QSPI_IFR_INITEND, 7 .EQU QSPI_IFR_BUSY, 6 .EQU QSPI_IFR_TOIF, 5 .EQU QSPI_IFR_SMIF, 4 .EQU QSPI_IFR_FTIF, 3 .EQU QSPI_IFR_TCIF, 2 .EQU QSPI_IFR_CARIF, 1 .EQU QSPI_IFR_AOEIF, 0 // register------------------------------------- .EQU QSPI_DLR, 0x40003A14 // 0x4000 3A14 QSPI_DLR Bits------------------------------------- .EQU QSPI_DLR_DLR31, 31 .EQU QSPI_DLR_DLR30, 30 .EQU QSPI_DLR_DLR29, 29 .EQU QSPI_DLR_DLR28, 28 .EQU QSPI_DLR_DLR27, 27 .EQU QSPI_DLR_DLR26, 26 .EQU QSPI_DLR_DLR25, 25 .EQU QSPI_DLR_DLR24, 24 .EQU QSPI_DLR_DLR23, 23 .EQU QSPI_DLR_DLR22, 22 .EQU QSPI_DLR_DLR21, 21 .EQU QSPI_DLR_DLR20, 20 .EQU QSPI_DLR_DLR19, 19 .EQU QSPI_DLR_DLR18, 18 .EQU QSPI_DLR_DLR17, 17 .EQU QSPI_DLR_DLR16, 16 .EQU QSPI_DLR_DLR15, 15 .EQU QSPI_DLR_DLR14, 14 .EQU QSPI_DLR_DLR13, 13 .EQU QSPI_DLR_DLR12, 12 .EQU QSPI_DLR_DLR11, 11 .EQU QSPI_DLR_DLR10, 10 .EQU QSPI_DLR_DLR9, 9 .EQU QSPI_DLR_DLR8, 8 .EQU QSPI_DLR_DLR7, 7 .EQU QSPI_DLR_DLR6, 6 .EQU QSPI_DLR_DLR5, 5 .EQU QSPI_DLR_DLR4, 4 .EQU QSPI_DLR_DLR3, 3 .EQU QSPI_DLR_DLR2, 2 .EQU QSPI_DLR_DLR1, 1 .EQU QSPI_DLR_DLR0, 0 // register------------------------------------- .EQU QSPI_AR, 0x40003A18 // 0x4000 3A18 QSPI_AR Bits------------------------------------- .EQU QSPI_AR_AR31, 31 .EQU QSPI_AR_AR30, 30 .EQU QSPI_AR_AR29, 29 .EQU QSPI_AR_AR28, 28 .EQU QSPI_AR_AR27, 27 .EQU QSPI_AR_AR26, 26 .EQU QSPI_AR_AR25, 25 .EQU QSPI_AR_AR24, 24 .EQU QSPI_AR_AR23, 23 .EQU QSPI_AR_AR22, 22 .EQU QSPI_AR_AR21, 21 .EQU QSPI_AR_AR20, 20 .EQU QSPI_AR_AR19, 19 .EQU QSPI_AR_AR18, 18 .EQU QSPI_AR_AR17, 17 .EQU QSPI_AR_AR16, 16 .EQU QSPI_AR_AR15, 15 .EQU QSPI_AR_AR14, 14 .EQU QSPI_AR_AR13, 13 .EQU QSPI_AR_AR12, 12 .EQU QSPI_AR_AR11, 11 .EQU QSPI_AR_AR10, 10 .EQU QSPI_AR_AR9, 9 .EQU QSPI_AR_AR8, 8 .EQU QSPI_AR_AR7, 7 .EQU QSPI_AR_AR6, 6 .EQU QSPI_AR_AR5, 5 .EQU QSPI_AR_AR4, 4 .EQU QSPI_AR_AR3, 3 .EQU QSPI_AR_AR2, 2 .EQU QSPI_AR_AR1, 1 .EQU QSPI_AR_AR0, 0 // register------------------------------------- .EQU QSPI_DR, 0x40003A1C // 0x4000 3A1C QSPI_DR Bits------------------------------------- .EQU QSPI_DR_DR31, 31 .EQU QSPI_DR_DR30, 30 .EQU QSPI_DR_DR29, 29 .EQU QSPI_DR_DR28, 28 .EQU QSPI_DR_DR27, 27 .EQU QSPI_DR_DR26, 26 .EQU QSPI_DR_DR25, 25 .EQU QSPI_DR_DR24, 24 .EQU QSPI_DR_DR23, 23 .EQU QSPI_DR_DR22, 22 .EQU QSPI_DR_DR21, 21 .EQU QSPI_DR_DR20, 20 .EQU QSPI_DR_DR19, 19 .EQU QSPI_DR_DR18, 18 .EQU QSPI_DR_DR17, 17 .EQU QSPI_DR_DR16, 16 .EQU QSPI_DR_DR15, 15 .EQU QSPI_DR_DR14, 14 .EQU QSPI_DR_DR13, 13 .EQU QSPI_DR_DR12, 12 .EQU QSPI_DR_DR11, 11 .EQU QSPI_DR_DR10, 10 .EQU QSPI_DR_DR9, 9 .EQU QSPI_DR_DR8, 8 .EQU QSPI_DR_DR7, 7 .EQU QSPI_DR_DR6, 6 .EQU QSPI_DR_DR5, 5 .EQU QSPI_DR_DR4, 4 .EQU QSPI_DR_DR3, 3 .EQU QSPI_DR_DR2, 2 .EQU QSPI_DR_DR1, 1 .EQU QSPI_DR_DR0, 0 // register------------------------------------- .EQU QSPI_PSMKR, 0x40003A20 // 0x4000 3A20 QSPI_PSMKR Bits------------------------------------- .EQU QSPI_PSMKR_MARK31, 31 .EQU QSPI_PSMKR_MARK30, 30 .EQU QSPI_PSMKR_MARK29, 29 .EQU QSPI_PSMKR_MARK28, 28 .EQU QSPI_PSMKR_MARK27, 27 .EQU QSPI_PSMKR_MARK26, 26 .EQU QSPI_PSMKR_MARK25, 25 .EQU QSPI_PSMKR_MARK24, 24 .EQU QSPI_PSMKR_MARK23, 23 .EQU QSPI_PSMKR_MARK22, 22 .EQU QSPI_PSMKR_MARK21, 21 .EQU QSPI_PSMKR_MARK20, 20 .EQU QSPI_PSMKR_MARK19, 19 .EQU QSPI_PSMKR_MARK18, 18 .EQU QSPI_PSMKR_MARK17, 17 .EQU QSPI_PSMKR_MARK16, 16 .EQU QSPI_PSMKR_MARK15, 15 .EQU QSPI_PSMKR_MARK14, 14 .EQU QSPI_PSMKR_MARK13, 13 .EQU QSPI_PSMKR_MARK12, 12 .EQU QSPI_PSMKR_MARK11, 11 .EQU QSPI_PSMKR_MARK10, 10 .EQU QSPI_PSMKR_MARK9, 9 .EQU QSPI_PSMKR_MARK8, 8 .EQU QSPI_PSMKR_MARK7, 7 .EQU QSPI_PSMKR_MARK6, 6 .EQU QSPI_PSMKR_MARK5, 5 .EQU QSPI_PSMKR_MARK4, 4 .EQU QSPI_PSMKR_MARK3, 3 .EQU QSPI_PSMKR_MARK2, 2 .EQU QSPI_PSMKR_MARK1, 1 .EQU QSPI_PSMKR_MARK0, 0 // register------------------------------------- .EQU QSPI_PSMAR, 0x40003A24 // 0x4000 3A24 QSPI_PSMAR Bits------------------------------------- .EQU QSPI_PSMAR_MATCH31, 31 .EQU QSPI_PSMAR_MATCH30, 30 .EQU QSPI_PSMAR_MATCH29, 29 .EQU QSPI_PSMAR_MATCH28, 28 .EQU QSPI_PSMAR_MATCH27, 27 .EQU QSPI_PSMAR_MATCH26, 26 .EQU QSPI_PSMAR_MATCH25, 25 .EQU QSPI_PSMAR_MATCH24, 24 .EQU QSPI_PSMAR_MATCH23, 23 .EQU QSPI_PSMAR_MATCH22, 22 .EQU QSPI_PSMAR_MATCH21, 21 .EQU QSPI_PSMAR_MATCH20, 20 .EQU QSPI_PSMAR_MATCH19, 19 .EQU QSPI_PSMAR_MATCH18, 18 .EQU QSPI_PSMAR_MATCH17, 17 .EQU QSPI_PSMAR_MATCH16, 16 .EQU QSPI_PSMAR_MATCH15, 15 .EQU QSPI_PSMAR_MATCH14, 14 .EQU QSPI_PSMAR_MATCH13, 13 .EQU QSPI_PSMAR_MATCH12, 12 .EQU QSPI_PSMAR_MATCH11, 11 .EQU QSPI_PSMAR_MATCH10, 10 .EQU QSPI_PSMAR_MATCH9, 9 .EQU QSPI_PSMAR_MATCH8, 8 .EQU QSPI_PSMAR_MATCH7, 7 .EQU QSPI_PSMAR_MATCH6, 6 .EQU QSPI_PSMAR_MATCH5, 5 .EQU QSPI_PSMAR_MATCH4, 4 .EQU QSPI_PSMAR_MATCH3, 3 .EQU QSPI_PSMAR_MATCH2, 2 .EQU QSPI_PSMAR_MATCH1, 1 .EQU QSPI_PSMAR_MATCH0, 0 // register------------------------------------- .EQU QSPI_PIR, 0x40003A28 // 0x4000 3A28 QSPI_PIR Bits------------------------------------- .EQU QSPI_PIR_INTERVAL31, 31 .EQU QSPI_PIR_INTERVAL30, 30 .EQU QSPI_PIR_INTERVAL29, 29 .EQU QSPI_PIR_INTERVAL28, 28 .EQU QSPI_PIR_INTERVAL27, 27 .EQU QSPI_PIR_INTERVAL26, 26 .EQU QSPI_PIR_INTERVAL25, 25 .EQU QSPI_PIR_INTERVAL24, 24 .EQU QSPI_PIR_INTERVAL23, 23 .EQU QSPI_PIR_INTERVAL22, 22 .EQU QSPI_PIR_INTERVAL21, 21 .EQU QSPI_PIR_INTERVAL20, 20 .EQU QSPI_PIR_INTERVAL19, 19 .EQU QSPI_PIR_INTERVAL18, 18 .EQU QSPI_PIR_INTERVAL17, 17 .EQU QSPI_PIR_INTERVAL16, 16 .EQU QSPI_PIR_INTERVAL15, 15 .EQU QSPI_PIR_INTERVAL14, 14 .EQU QSPI_PIR_INTERVAL13, 13 .EQU QSPI_PIR_INTERVAL12, 12 .EQU QSPI_PIR_INTERVAL11, 11 .EQU QSPI_PIR_INTERVAL10, 10 .EQU QSPI_PIR_INTERVAL9, 9 .EQU QSPI_PIR_INTERVAL8, 8 .EQU QSPI_PIR_INTERVAL7, 7 .EQU QSPI_PIR_INTERVAL6, 6 .EQU QSPI_PIR_INTERVAL5, 5 .EQU QSPI_PIR_INTERVAL4, 4 .EQU QSPI_PIR_INTERVAL3, 3 .EQU QSPI_PIR_INTERVAL2, 2 .EQU QSPI_PIR_INTERVAL1, 1 .EQU QSPI_PIR_INTERVAL0, 0 // register------------------------------------- .EQU QSPI_CCR, 0x40003A2C // 0x4000 3A2C QSPI_CCR Bits------------------------------------- .EQU QSPI_CCR_SIOO, 31 .EQU QSPI_CCR_DDTR, 27 .EQU QSPI_CCR_DMODE2, 26 .EQU QSPI_CCR_DMODE1, 25 .EQU QSPI_CCR_DMODE0, 24 .EQU QSPI_CCR_ABSIZE1, 21 .EQU QSPI_CCR_ABSIZE0, 20 .EQU QSPI_CCR_ABDTR, 19 .EQU QSPI_CCR_ABMODE2, 18 .EQU QSPI_CCR_ABMODE1, 17 .EQU QSPI_CCR_ABMODE0, 16 .EQU QSPI_CCR_ADSIZE1, 13 .EQU QSPI_CCR_ADSIZE0, 12 .EQU QSPI_CCR_ADDTR, 11 .EQU QSPI_CCR_ADMODE2, 10 .EQU QSPI_CCR_ADMODE1, 9 .EQU QSPI_CCR_ADMODE0, 8 .EQU QSPI_CCR_ISIZE1, 5 .EQU QSPI_CCR_ISIZE0, 4 .EQU QSPI_CCR_IDTR, 3 .EQU QSPI_CCR_IMODE2, 2 .EQU QSPI_CCR_IMODE1, 1 .EQU QSPI_CCR_IMODE0, 0 // register------------------------------------- .EQU QSPI_TCR, 0x40003A30 // 0x4000 3A30 QSPI_TCR Bits------------------------------------- .EQU QSPI_TCR_SSHIFT, 9 .EQU QSPI_TCR_DCYC5, 5 .EQU QSPI_TCR_DCYC4, 4 .EQU QSPI_TCR_DCYC3, 3 .EQU QSPI_TCR_DCYC2, 2 .EQU QSPI_TCR_DCYC1, 1 .EQU QSPI_TCR_DCYC0, 0 // register------------------------------------- .EQU QSPI_IR, 0x40003A34 // 0x4000 3A34 QSPI_IR Bits------------------------------------- .EQU QSPI_IR_INSTRUCTION31, 31 .EQU QSPI_IR_INSTRUCTION30, 30 .EQU QSPI_IR_INSTRUCTION29, 29 .EQU QSPI_IR_INSTRUCTION28, 28 .EQU QSPI_IR_INSTRUCTION27, 27 .EQU QSPI_IR_INSTRUCTION26, 26 .EQU QSPI_IR_INSTRUCTION25, 25 .EQU QSPI_IR_INSTRUCTION24, 24 .EQU QSPI_IR_INSTRUCTION23, 23 .EQU QSPI_IR_INSTRUCTION22, 22 .EQU QSPI_IR_INSTRUCTION21, 21 .EQU QSPI_IR_INSTRUCTION20, 20 .EQU QSPI_IR_INSTRUCTION19, 19 .EQU QSPI_IR_INSTRUCTION18, 18 .EQU QSPI_IR_INSTRUCTION17, 17 .EQU QSPI_IR_INSTRUCTION16, 16 .EQU QSPI_IR_INSTRUCTION15, 15 .EQU QSPI_IR_INSTRUCTION14, 14 .EQU QSPI_IR_INSTRUCTION13, 13 .EQU QSPI_IR_INSTRUCTION12, 12 .EQU QSPI_IR_INSTRUCTION11, 11 .EQU QSPI_IR_INSTRUCTION10, 10 .EQU QSPI_IR_INSTRUCTION9, 9 .EQU QSPI_IR_INSTRUCTION8, 8 .EQU QSPI_IR_INSTRUCTION7, 7 .EQU QSPI_IR_INSTRUCTION6, 6 .EQU QSPI_IR_INSTRUCTION5, 5 .EQU QSPI_IR_INSTRUCTION4, 4 .EQU QSPI_IR_INSTRUCTION3, 3 .EQU QSPI_IR_INSTRUCTION2, 2 .EQU QSPI_IR_INSTRUCTION1, 1 .EQU QSPI_IR_INSTRUCTION0, 0 // register------------------------------------- .EQU QSPI_ABR, 0x40003A38 // 0x4000 3A38 QSPI_ABR Bits------------------------------------- .EQU QSPI_ABR_ALTERNATE31, 31 .EQU QSPI_ABR_ALTERNATE30, 30 .EQU QSPI_ABR_ALTERNATE29, 29 .EQU QSPI_ABR_ALTERNATE28, 28 .EQU QSPI_ABR_ALTERNATE27, 27 .EQU QSPI_ABR_ALTERNATE26, 26 .EQU QSPI_ABR_ALTERNATE25, 25 .EQU QSPI_ABR_ALTERNATE24, 24 .EQU QSPI_ABR_ALTERNATE23, 23 .EQU QSPI_ABR_ALTERNATE22, 22 .EQU QSPI_ABR_ALTERNATE21, 21 .EQU QSPI_ABR_ALTERNATE20, 20 .EQU QSPI_ABR_ALTERNATE19, 19 .EQU QSPI_ABR_ALTERNATE18, 18 .EQU QSPI_ABR_ALTERNATE17, 17 .EQU QSPI_ABR_ALTERNATE16, 16 .EQU QSPI_ABR_ALTERNATE15, 15 .EQU QSPI_ABR_ALTERNATE14, 14 .EQU QSPI_ABR_ALTERNATE13, 13 .EQU QSPI_ABR_ALTERNATE12, 12 .EQU QSPI_ABR_ALTERNATE11, 11 .EQU QSPI_ABR_ALTERNATE10, 10 .EQU QSPI_ABR_ALTERNATE9, 9 .EQU QSPI_ABR_ALTERNATE8, 8 .EQU QSPI_ABR_ALTERNATE7, 7 .EQU QSPI_ABR_ALTERNATE6, 6 .EQU QSPI_ABR_ALTERNATE5, 5 .EQU QSPI_ABR_ALTERNATE4, 4 .EQU QSPI_ABR_ALTERNATE3, 3 .EQU QSPI_ABR_ALTERNATE2, 2 .EQU QSPI_ABR_ALTERNATE1, 1 .EQU QSPI_ABR_ALTERNATE0, 0 // register------------------------------------- .EQU QSPI_TOR, 0x40003A3C // 0x4000 3A3C QSPI_TOR Bits------------------------------------- .EQU QSPI_TOR_TIMEOUT15, 15 .EQU QSPI_TOR_TIMEOUT14, 14 .EQU QSPI_TOR_TIMEOUT13, 13 .EQU QSPI_TOR_TIMEOUT12, 12 .EQU QSPI_TOR_TIMEOUT11, 11 .EQU QSPI_TOR_TIMEOUT10, 10 .EQU QSPI_TOR_TIMEOUT9, 9 .EQU QSPI_TOR_TIMEOUT8, 8 .EQU QSPI_TOR_TIMEOUT7, 7 .EQU QSPI_TOR_TIMEOUT6, 6 .EQU QSPI_TOR_TIMEOUT5, 5 .EQU QSPI_TOR_TIMEOUT4, 4 .EQU QSPI_TOR_TIMEOUT3, 3 .EQU QSPI_TOR_TIMEOUT2, 2 .EQU QSPI_TOR_TIMEOUT1, 1 .EQU QSPI_TOR_TIMEOUT0, 0 // register------------------------------------- .EQU QSPI_WPCCR, 0x40003A40 // 0x4000 3A40 QSPI_WPCCR Bits------------------------------------- .EQU QSPI_WPCCR_SIOO, 31 .EQU QSPI_WPCCR_DDTR, 27 .EQU QSPI_WPCCR_DMODE2, 26 .EQU QSPI_WPCCR_DMODE1, 25 .EQU QSPI_WPCCR_DMODE0, 24 .EQU QSPI_WPCCR_ABSIZE1, 21 .EQU QSPI_WPCCR_ABSIZE0, 20 .EQU QSPI_WPCCR_ABDTR, 19 .EQU QSPI_WPCCR_ABMODE2, 18 .EQU QSPI_WPCCR_ABMODE1, 17 .EQU QSPI_WPCCR_ABMODE0, 16 .EQU QSPI_WPCCR_ADSIZE1, 13 .EQU QSPI_WPCCR_ADSIZE0, 12 .EQU QSPI_WPCCR_ADDTR, 11 .EQU QSPI_WPCCR_ADMODE2, 10 .EQU QSPI_WPCCR_ADMODE1, 9 .EQU QSPI_WPCCR_ADMODE0, 8 .EQU QSPI_WPCCR_ISIZE1, 5 .EQU QSPI_WPCCR_ISIZE0, 4 .EQU QSPI_WPCCR_IDTR, 3 .EQU QSPI_WPCCR_IMODE2, 2 .EQU QSPI_WPCCR_IMODE1, 1 .EQU QSPI_WPCCR_IMODE0, 0 // register------------------------------------- .EQU QSPI_WPTCR, 0x40003A44 // 0x4000 3A44 QSPI_WPTCR Bits------------------------------------- .EQU QSPI_WPTCR_SSHIFT, 9 .EQU QSPI_WPTCR_DCYC5, 5 .EQU QSPI_WPTCR_DCYC4, 4 .EQU QSPI_WPTCR_DCYC3, 3 .EQU QSPI_WPTCR_DCYC2, 2 .EQU QSPI_WPTCR_DCYC1, 1 .EQU QSPI_WPTCR_DCYC0, 0 // register------------------------------------- .EQU QSPI_WPIR, 0x40003A48 // 0x4000 3A48 QSPI_WPIR Bits------------------------------------- .EQU QSPI_WPIR_INSTRUCTION31, 31 .EQU QSPI_WPIR_INSTRUCTION30, 30 .EQU QSPI_WPIR_INSTRUCTION29, 29 .EQU QSPI_WPIR_INSTRUCTION28, 28 .EQU QSPI_WPIR_INSTRUCTION27, 27 .EQU QSPI_WPIR_INSTRUCTION26, 26 .EQU QSPI_WPIR_INSTRUCTION25, 25 .EQU QSPI_WPIR_INSTRUCTION24, 24 .EQU QSPI_WPIR_INSTRUCTION23, 23 .EQU QSPI_WPIR_INSTRUCTION22, 22 .EQU QSPI_WPIR_INSTRUCTION21, 21 .EQU QSPI_WPIR_INSTRUCTION20, 20 .EQU QSPI_WPIR_INSTRUCTION19, 19 .EQU QSPI_WPIR_INSTRUCTION18, 18 .EQU QSPI_WPIR_INSTRUCTION17, 17 .EQU QSPI_WPIR_INSTRUCTION16, 16 .EQU QSPI_WPIR_INSTRUCTION15, 15 .EQU QSPI_WPIR_INSTRUCTION14, 14 .EQU QSPI_WPIR_INSTRUCTION13, 13 .EQU QSPI_WPIR_INSTRUCTION12, 12 .EQU QSPI_WPIR_INSTRUCTION11, 11 .EQU QSPI_WPIR_INSTRUCTION10, 10 .EQU QSPI_WPIR_INSTRUCTION9, 9 .EQU QSPI_WPIR_INSTRUCTION8, 8 .EQU QSPI_WPIR_INSTRUCTION7, 7 .EQU QSPI_WPIR_INSTRUCTION6, 6 .EQU QSPI_WPIR_INSTRUCTION5, 5 .EQU QSPI_WPIR_INSTRUCTION4, 4 .EQU QSPI_WPIR_INSTRUCTION3, 3 .EQU QSPI_WPIR_INSTRUCTION2, 2 .EQU QSPI_WPIR_INSTRUCTION1, 1 .EQU QSPI_WPIR_INSTRUCTION0, 0 // register------------------------------------- .EQU QSPI_WPABR, 0x40003A4C // 0x4000 3A4C QSPI_WPABR Bits------------------------------------- .EQU QSPI_WPABR_ALTERNATE31, 31 .EQU QSPI_WPABR_ALTERNATE30, 30 .EQU QSPI_WPABR_ALTERNATE29, 29 .EQU QSPI_WPABR_ALTERNATE28, 28 .EQU QSPI_WPABR_ALTERNATE27, 27 .EQU QSPI_WPABR_ALTERNATE26, 26 .EQU QSPI_WPABR_ALTERNATE25, 25 .EQU QSPI_WPABR_ALTERNATE24, 24 .EQU QSPI_WPABR_ALTERNATE23, 23 .EQU QSPI_WPABR_ALTERNATE22, 22 .EQU QSPI_WPABR_ALTERNATE21, 21 .EQU QSPI_WPABR_ALTERNATE20, 20 .EQU QSPI_WPABR_ALTERNATE19, 19 .EQU QSPI_WPABR_ALTERNATE18, 18 .EQU QSPI_WPABR_ALTERNATE17, 17 .EQU QSPI_WPABR_ALTERNATE16, 16 .EQU QSPI_WPABR_ALTERNATE15, 15 .EQU QSPI_WPABR_ALTERNATE14, 14 .EQU QSPI_WPABR_ALTERNATE13, 13 .EQU QSPI_WPABR_ALTERNATE12, 12 .EQU QSPI_WPABR_ALTERNATE11, 11 .EQU QSPI_WPABR_ALTERNATE10, 10 .EQU QSPI_WPABR_ALTERNATE9, 9 .EQU QSPI_WPABR_ALTERNATE8, 8 .EQU QSPI_WPABR_ALTERNATE7, 7 .EQU QSPI_WPABR_ALTERNATE6, 6 .EQU QSPI_WPABR_ALTERNATE5, 5 .EQU QSPI_WPABR_ALTERNATE4, 4 .EQU QSPI_WPABR_ALTERNATE3, 3 .EQU QSPI_WPABR_ALTERNATE2, 2 .EQU QSPI_WPABR_ALTERNATE1, 1 .EQU QSPI_WPABR_ALTERNATE0, 0 // register------------------------------------- .EQU QSPI_WCCR, 0x40003A50 // 0x4000 3A50 QSPI_WCCR Bits------------------------------------- .EQU QSPI_WCCR_DDTR, 27 .EQU QSPI_WCCR_DMODE2, 26 .EQU QSPI_WCCR_DMODE1, 25 .EQU QSPI_WCCR_DMODE0, 24 .EQU QSPI_WCCR_ABSIZE1, 21 .EQU QSPI_WCCR_ABSIZE0, 20 .EQU QSPI_WCCR_ABDTR, 19 .EQU QSPI_WCCR_ABMODE2, 18 .EQU QSPI_WCCR_ABMODE1, 17 .EQU QSPI_WCCR_ABMODE0, 16 .EQU QSPI_WCCR_ADSIZE1, 13 .EQU QSPI_WCCR_ADSIZE0, 12 .EQU QSPI_WCCR_ADDTR, 11 .EQU QSPI_WCCR_ADMODE2, 10 .EQU QSPI_WCCR_ADMODE1, 9 .EQU QSPI_WCCR_ADMODE0, 8 .EQU QSPI_WCCR_ISIZE1, 5 .EQU QSPI_WCCR_ISIZE0, 4 .EQU QSPI_WCCR_IDTR, 3 .EQU QSPI_WCCR_IMODE2, 2 .EQU QSPI_WCCR_IMODE1, 1 .EQU QSPI_WCCR_IMODE0, 0 // register------------------------------------- .EQU QSPI_WTCR, 0x40003A54 // 0x4000 3A54 QSPI_WTCR Bits------------------------------------- .EQU QSPI_WTCR_DCYC5, 5 .EQU QSPI_WTCR_DCYC4, 4 .EQU QSPI_WTCR_DCYC3, 3 .EQU QSPI_WTCR_DCYC2, 2 .EQU QSPI_WTCR_DCYC1, 1 .EQU QSPI_WTCR_DCYC0, 0 // register------------------------------------- .EQU QSPI_WIR, 0x40003A58 // 0x4000 3A58 QSPI_WIR Bits------------------------------------- .EQU QSPI_WIR_INSTRUCTION31, 31 .EQU QSPI_WIR_INSTRUCTION30, 30 .EQU QSPI_WIR_INSTRUCTION29, 29 .EQU QSPI_WIR_INSTRUCTION28, 28 .EQU QSPI_WIR_INSTRUCTION27, 27 .EQU QSPI_WIR_INSTRUCTION26, 26 .EQU QSPI_WIR_INSTRUCTION25, 25 .EQU QSPI_WIR_INSTRUCTION24, 24 .EQU QSPI_WIR_INSTRUCTION23, 23 .EQU QSPI_WIR_INSTRUCTION22, 22 .EQU QSPI_WIR_INSTRUCTION21, 21 .EQU QSPI_WIR_INSTRUCTION20, 20 .EQU QSPI_WIR_INSTRUCTION19, 19 .EQU QSPI_WIR_INSTRUCTION18, 18 .EQU QSPI_WIR_INSTRUCTION17, 17 .EQU QSPI_WIR_INSTRUCTION16, 16 .EQU QSPI_WIR_INSTRUCTION15, 15 .EQU QSPI_WIR_INSTRUCTION14, 14 .EQU QSPI_WIR_INSTRUCTION13, 13 .EQU QSPI_WIR_INSTRUCTION12, 12 .EQU QSPI_WIR_INSTRUCTION11, 11 .EQU QSPI_WIR_INSTRUCTION10, 10 .EQU QSPI_WIR_INSTRUCTION9, 9 .EQU QSPI_WIR_INSTRUCTION8, 8 .EQU QSPI_WIR_INSTRUCTION7, 7 .EQU QSPI_WIR_INSTRUCTION6, 6 .EQU QSPI_WIR_INSTRUCTION5, 5 .EQU QSPI_WIR_INSTRUCTION4, 4 .EQU QSPI_WIR_INSTRUCTION3, 3 .EQU QSPI_WIR_INSTRUCTION2, 2 .EQU QSPI_WIR_INSTRUCTION1, 1 .EQU QSPI_WIR_INSTRUCTION0, 0 // register------------------------------------- .EQU QSPI_WABR, 0x40003A5C // 0x4000 3A5C QSPI_WABR Bits------------------------------------- .EQU QSPI_WABR_ALTERNATE31, 31 .EQU QSPI_WABR_ALTERNATE30, 30 .EQU QSPI_WABR_ALTERNATE29, 29 .EQU QSPI_WABR_ALTERNATE28, 28 .EQU QSPI_WABR_ALTERNATE27, 27 .EQU QSPI_WABR_ALTERNATE26, 26 .EQU QSPI_WABR_ALTERNATE25, 25 .EQU QSPI_WABR_ALTERNATE24, 24 .EQU QSPI_WABR_ALTERNATE23, 23 .EQU QSPI_WABR_ALTERNATE22, 22 .EQU QSPI_WABR_ALTERNATE21, 21 .EQU QSPI_WABR_ALTERNATE20, 20 .EQU QSPI_WABR_ALTERNATE19, 19 .EQU QSPI_WABR_ALTERNATE18, 18 .EQU QSPI_WABR_ALTERNATE17, 17 .EQU QSPI_WABR_ALTERNATE16, 16 .EQU QSPI_WABR_ALTERNATE15, 15 .EQU QSPI_WABR_ALTERNATE14, 14 .EQU QSPI_WABR_ALTERNATE13, 13 .EQU QSPI_WABR_ALTERNATE12, 12 .EQU QSPI_WABR_ALTERNATE11, 11 .EQU QSPI_WABR_ALTERNATE10, 10 .EQU QSPI_WABR_ALTERNATE9, 9 .EQU QSPI_WABR_ALTERNATE8, 8 .EQU QSPI_WABR_ALTERNATE7, 7 .EQU QSPI_WABR_ALTERNATE6, 6 .EQU QSPI_WABR_ALTERNATE5, 5 .EQU QSPI_WABR_ALTERNATE4, 4 .EQU QSPI_WABR_ALTERNATE3, 3 .EQU QSPI_WABR_ALTERNATE2, 2 .EQU QSPI_WABR_ALTERNATE1, 1 .EQU QSPI_WABR_ALTERNATE0, 0 // register------------------------------------- .EQU QSPI_HLCR, 0x40003A60 // 0x4000 3A60 QSPI_HLCR Bits------------------------------------- .EQU QSPI_HLCR_RWDSDETECT, 20 .EQU QSPI_HLCR_WZL, 17 .EQU QSPI_HLCR_LM, 16 .EQU QSPI_HLCR_TACC7, 15 .EQU QSPI_HLCR_TACC6, 14 .EQU QSPI_HLCR_TACC5, 13 .EQU QSPI_HLCR_TACC4, 12 .EQU QSPI_HLCR_TACC3, 11 .EQU QSPI_HLCR_TACC2, 10 .EQU QSPI_HLCR_TACC1, 9 .EQU QSPI_HLCR_TACC0, 8 .EQU QSPI_HLCR_TRWR7, 7 .EQU QSPI_HLCR_TRWR6, 6 .EQU QSPI_HLCR_TRWR5, 5 .EQU QSPI_HLCR_TRWR4, 4 .EQU QSPI_HLCR_TRWR3, 3 .EQU QSPI_HLCR_TRWR2, 2 .EQU QSPI_HLCR_TRWR1, 1 .EQU QSPI_HLCR_TRWR0, 0 // register------------------------------------- .EQU QSPI_IOR, 0x40003A64 // 0x4000 3A64 QSPI_IOR Bits------------------------------------- .EQU QSPI_IOR_IOEN7, 23 .EQU QSPI_IOR_IOEN6, 22 .EQU QSPI_IOR_IOEN5, 21 .EQU QSPI_IOR_IOEN4, 20 .EQU QSPI_IOR_IOEN3, 19 .EQU QSPI_IOR_IOEN2, 18 .EQU QSPI_IOR_IOEN1, 17 .EQU QSPI_IOR_IOEN0, 16 .EQU QSPI_IOR_INOUT7, 15 .EQU QSPI_IOR_LEVEL7, 14 .EQU QSPI_IOR_INOUT6, 13 .EQU QSPI_IOR_LEVEL6, 12 .EQU QSPI_IOR_INOUT5, 11 .EQU QSPI_IOR_LEVEL5, 10 .EQU QSPI_IOR_INOUT4, 9 .EQU QSPI_IOR_LEVEL4, 8 .EQU QSPI_IOR_INOUT3, 7 .EQU QSPI_IOR_LEVEL3, 6 .EQU QSPI_IOR_INOUT2, 5 .EQU QSPI_IOR_LEVEL2, 4 .EQU QSPI_IOR_INOUT1, 3 .EQU QSPI_IOR_LEVEL1, 2 .EQU QSPI_IOR_INOUT0, 1 .EQU QSPI_IOR_LEVEL0, 0 // register------------------------------------- .EQU QSPI_TPR, 0x40003A68 // 0x4000 3A68 QSPI_TPR Bits------------------------------------- .EQU QSPI_TPR_TPEN, 4 .EQU QSPI_TPR_TP1, 1 .EQU QSPI_TPR_TP0, 0 // register------------------------------------- .EQU WRLOCK_R0, 0x40003A80 // 0x4000 3A80 WRLOCK_R0 Bits------------------------------------- .EQU WRLOCK_R0_KEY0_15, 31 .EQU WRLOCK_R0_KEY0_14, 30 .EQU WRLOCK_R0_KEY0_13, 29 .EQU WRLOCK_R0_KEY0_12, 28 .EQU WRLOCK_R0_KEY0_11, 27 .EQU WRLOCK_R0_KEY0_10, 26 .EQU WRLOCK_R0_KEY0_9, 25 .EQU WRLOCK_R0_KEY0_8, 24 .EQU WRLOCK_R0_KEY0_7, 23 .EQU WRLOCK_R0_KEY0_6, 22 .EQU WRLOCK_R0_KEY0_5, 21 .EQU WRLOCK_R0_KEY0_4, 20 .EQU WRLOCK_R0_KEY0_3, 19 .EQU WRLOCK_R0_KEY0_2, 18 .EQU WRLOCK_R0_KEY0_1, 17 .EQU WRLOCK_R0_KEY0_0, 16 .EQU WRLOCK_R0_WRLOCKEN, 0 // register------------------------------------- .EQU WRLOCK_R1, 0x40003A84 // 0x4000 3A84 WRLOCK_R1 Bits------------------------------------- .EQU WRLOCK_R1_KEY1_15, 31 .EQU WRLOCK_R1_KEY1_14, 30 .EQU WRLOCK_R1_KEY1_13, 29 .EQU WRLOCK_R1_KEY1_12, 28 .EQU WRLOCK_R1_KEY1_11, 27 .EQU WRLOCK_R1_KEY1_10, 26 .EQU WRLOCK_R1_KEY1_9, 25 .EQU WRLOCK_R1_KEY1_8, 24 .EQU WRLOCK_R1_KEY1_7, 23 .EQU WRLOCK_R1_KEY1_6, 22 .EQU WRLOCK_R1_KEY1_5, 21 .EQU WRLOCK_R1_KEY1_4, 20 .EQU WRLOCK_R1_KEY1_3, 19 .EQU WRLOCK_R1_KEY1_2, 18 .EQU WRLOCK_R1_KEY1_1, 17 .EQU WRLOCK_R1_KEY1_0, 16 .EQU WRLOCK_R1_WRLOCKEN, 0 // register------------------------------------- .EQU WRLOCK_R2, 0x40003A88 // 0x4000 3A88 WRLOCK_R2 Bits------------------------------------- .EQU WRLOCK_R2_KEY2_15, 31 .EQU WRLOCK_R2_KEY2_14, 30 .EQU WRLOCK_R2_KEY2_13, 29 .EQU WRLOCK_R2_KEY2_12, 28 .EQU WRLOCK_R2_KEY2_11, 27 .EQU WRLOCK_R2_KEY2_10, 26 .EQU WRLOCK_R2_KEY2_9, 25 .EQU WRLOCK_R2_KEY2_8, 24 .EQU WRLOCK_R2_KEY2_7, 23 .EQU WRLOCK_R2_KEY2_6, 22 .EQU WRLOCK_R2_KEY2_5, 21 .EQU WRLOCK_R2_KEY2_4, 20 .EQU WRLOCK_R2_KEY2_3, 19 .EQU WRLOCK_R2_KEY2_2, 18 .EQU WRLOCK_R2_KEY2_1, 17 .EQU WRLOCK_R2_KEY2_0, 16 .EQU WRLOCK_R2_WRLOCKEN, 0 // register------------------------------------- .EQU WRLOCK_R3, 0x40003A8C // 0x4000 3A8C WRLOCK_R3 Bits------------------------------------- .EQU WRLOCK_R3_KEY3_15, 31 .EQU WRLOCK_R3_KEY3_14, 30 .EQU WRLOCK_R3_KEY3_13, 29 .EQU WRLOCK_R3_KEY3_12, 28 .EQU WRLOCK_R3_KEY3_11, 27 .EQU WRLOCK_R3_KEY3_10, 26 .EQU WRLOCK_R3_KEY3_9, 25 .EQU WRLOCK_R3_KEY3_8, 24 .EQU WRLOCK_R3_KEY3_7, 23 .EQU WRLOCK_R3_KEY3_6, 22 .EQU WRLOCK_R3_KEY3_5, 21 .EQU WRLOCK_R3_KEY3_4, 20 .EQU WRLOCK_R3_KEY3_3, 19 .EQU WRLOCK_R3_KEY3_2, 18 .EQU WRLOCK_R3_KEY3_1, 17 .EQU WRLOCK_R3_KEY3_0, 16 .EQU WRLOCK_R3_WRLOCKEN, 0 // register------------------------------------- .EQU WRLOCK_R4, 0x40003A90 // 0x4000 3A90 WRLOCK_R4 Bits------------------------------------- .EQU WRLOCK_R4_KEY4_15, 31 .EQU WRLOCK_R4_KEY4_14, 30 .EQU WRLOCK_R4_KEY4_13, 29 .EQU WRLOCK_R4_KEY4_12, 28 .EQU WRLOCK_R4_KEY4_11, 27 .EQU WRLOCK_R4_KEY4_10, 26 .EQU WRLOCK_R4_KEY4_9, 25 .EQU WRLOCK_R4_KEY4_8, 24 .EQU WRLOCK_R4_KEY4_7, 23 .EQU WRLOCK_R4_KEY4_6, 22 .EQU WRLOCK_R4_KEY4_5, 21 .EQU WRLOCK_R4_KEY4_4, 20 .EQU WRLOCK_R4_KEY4_3, 19 .EQU WRLOCK_R4_KEY4_2, 18 .EQU WRLOCK_R4_KEY4_1, 17 .EQU WRLOCK_R4_KEY4_0, 16 .EQU WRLOCK_R4_WRLOCKEN, 0 // register------------------------------------- .EQU WRLOCK_R5, 0x40003A94 // 0x4000 3A94 WRLOCK_R5 Bits------------------------------------- .EQU WRLOCK_R5_KEY5_15, 31 .EQU WRLOCK_R5_KEY5_14, 30 .EQU WRLOCK_R5_KEY5_13, 29 .EQU WRLOCK_R5_KEY5_12, 28 .EQU WRLOCK_R5_KEY5_11, 27 .EQU WRLOCK_R5_KEY5_10, 26 .EQU WRLOCK_R5_KEY5_9, 25 .EQU WRLOCK_R5_KEY5_8, 24 .EQU WRLOCK_R5_KEY5_7, 23 .EQU WRLOCK_R5_KEY5_6, 22 .EQU WRLOCK_R5_KEY5_5, 21 .EQU WRLOCK_R5_KEY5_4, 20 .EQU WRLOCK_R5_KEY5_3, 19 .EQU WRLOCK_R5_KEY5_2, 18 .EQU WRLOCK_R5_KEY5_1, 17 .EQU WRLOCK_R5_KEY5_0, 16 .EQU WRLOCK_R5_WRLOCKEN, 0 // register------------------------------------- .EQU WRLOCK_R6, 0x40003A98 // 0x4000 3A98 WRLOCK_R6 Bits------------------------------------- .EQU WRLOCK_R6_KEY6_15, 31 .EQU WRLOCK_R6_KEY6_14, 30 .EQU WRLOCK_R6_KEY6_13, 29 .EQU WRLOCK_R6_KEY6_12, 28 .EQU WRLOCK_R6_KEY6_11, 27 .EQU WRLOCK_R6_KEY6_10, 26 .EQU WRLOCK_R6_KEY6_9, 25 .EQU WRLOCK_R6_KEY6_8, 24 .EQU WRLOCK_R6_KEY6_7, 23 .EQU WRLOCK_R6_KEY6_6, 22 .EQU WRLOCK_R6_KEY6_5, 21 .EQU WRLOCK_R6_KEY6_4, 20 .EQU WRLOCK_R6_KEY6_3, 19 .EQU WRLOCK_R6_KEY6_2, 18 .EQU WRLOCK_R6_KEY6_1, 17 .EQU WRLOCK_R6_KEY6_0, 16 .EQU WRLOCK_R6_WRLOCKEN, 0 // register------------------------------------- .EQU WRLOCK_R7, 0x40003A9C // 0x4000 3A9C WRLOCK_R7 Bits------------------------------------- .EQU WRLOCK_R7_KEY7_15, 31 .EQU WRLOCK_R7_KEY7_14, 30 .EQU WRLOCK_R7_KEY7_13, 29 .EQU WRLOCK_R7_KEY7_12, 28 .EQU WRLOCK_R7_KEY7_11, 27 .EQU WRLOCK_R7_KEY7_10, 26 .EQU WRLOCK_R7_KEY7_9, 25 .EQU WRLOCK_R7_KEY7_8, 24 .EQU WRLOCK_R7_KEY7_7, 23 .EQU WRLOCK_R7_KEY7_6, 22 .EQU WRLOCK_R7_KEY7_5, 21 .EQU WRLOCK_R7_KEY7_4, 20 .EQU WRLOCK_R7_KEY7_3, 19 .EQU WRLOCK_R7_KEY7_2, 18 .EQU WRLOCK_R7_KEY7_1, 17 .EQU WRLOCK_R7_KEY7_0, 16 .EQU WRLOCK_R7_WRLOCKEN, 0 // register------------------------------------- .EQU CANFD8_CTLR0, 0x40003B00 // 0x4000 3B00 CANFD8_CTLR0 Bits------------------------------------- .EQU CANFD8_CTLR0_CANFDEN, 31 .EQU CANFD8_CTLR0_CANRMC6, 30 .EQU CANFD8_CTLR0_CANRMC5, 29 .EQU CANFD8_CTLR0_CANRMC4, 28 .EQU CANFD8_CTLR0_CANRMC3, 27 .EQU CANFD8_CTLR0_CANRMC2, 26 .EQU CANFD8_CTLR0_CANRMC1, 25 .EQU CANFD8_CTLR0_CANRMC0, 24 .EQU CANFD8_CTLR0_BOFF, 23 .EQU CANFD8_CTLR0_CERROR, 22 .EQU CANFD8_CTLR0_TXSTA, 21 .EQU CANFD8_CTLR0_RXSTA, 20 .EQU CANFD8_CTLR0_TCSTA, 19 .EQU CANFD8_CTLR0_DOSTA, 17 .EQU CANFD8_CTLR0_RXBSTA, 16 .EQU CANFD8_CTLR0_ANSWEREN, 15 .EQU CANFD8_CTLR0_FULLRXEN, 14 .EQU CANFD8_CTLR0_MBSIZE1, 13 .EQU CANFD8_CTLR0_MBSIZE0, 12 .EQU CANFD8_CTLR0_RELF, 11 .EQU CANFD8_CTLR0_RELRX, 10 .EQU CANFD8_CTLR0_ATX, 9 .EQU CANFD8_CTLR0_TXR, 8 .EQU CANFD8_CTLR0_CANEN, 7 .EQU CANFD8_CTLR0_CANCKS1, 6 .EQU CANFD8_CTLR0_CANCKS0, 5 .EQU CANFD8_CTLR0_ISOFDCANEN, 4 .EQU CANFD8_CTLR0_SLEEP, 3 .EQU CANFD8_CTLR0_LBACK, 2 .EQU CANFD8_CTLR0_SILENT, 1 .EQU CANFD8_CTLR0_RSMOD, 0 // register------------------------------------- .EQU CANFD8_BRGR, 0x40003B04 // 0x4000 3B04 CANFD8_BRGR Bits------------------------------------- .EQU CANFD8_BRGR_HTSEG2_2, 28 .EQU CANFD8_BRGR_HTSEG2_1, 27 .EQU CANFD8_BRGR_HTSEG2_0, 26 .EQU CANFD8_BRGR_HTSEG1_3, 25 .EQU CANFD8_BRGR_HTSEG1_2, 24 .EQU CANFD8_BRGR_HTSEG1_1, 23 .EQU CANFD8_BRGR_HTSEG1_0, 22 .EQU CANFD8_BRGR_BRSBRP5, 21 .EQU CANFD8_BRGR_BRSBRP4, 20 .EQU CANFD8_BRGR_BRSBRP3, 19 .EQU CANFD8_BRGR_BRSBRP2, 18 .EQU CANFD8_BRGR_BRSBRP1, 17 .EQU CANFD8_BRGR_BRSBRP0, 16 .EQU CANFD8_BRGR_SAM, 15 .EQU CANFD8_BRGR_TSEG2_2, 14 .EQU CANFD8_BRGR_TSEG2_1, 13 .EQU CANFD8_BRGR_TSEG2_0, 12 .EQU CANFD8_BRGR_TSEG1_3, 11 .EQU CANFD8_BRGR_TSEG1_2, 10 .EQU CANFD8_BRGR_TSEG1_1, 9 .EQU CANFD8_BRGR_TSEG1_0, 8 .EQU CANFD8_BRGR_SJW1, 7 .EQU CANFD8_BRGR_SJW0, 6 .EQU CANFD8_BRGR_CANBRP5, 5 .EQU CANFD8_BRGR_CANBRP4, 4 .EQU CANFD8_BRGR_CANBRP3, 3 .EQU CANFD8_BRGR_CANBRP2, 2 .EQU CANFD8_BRGR_CANBRP1, 1 .EQU CANFD8_BRGR_CANBRP0, 0 // register------------------------------------- .EQU CANFD8_RCR, 0x40003B08 // 0x4000 3B08 CANFD8_RCR Bits------------------------------------- .EQU CANFD8_RCR_DPRAMOF, 16 .EQU CANFD8_RCR_CANERRC1, 15 .EQU CANFD8_RCR_CANERRC0, 14 .EQU CANFD8_RCR_CANDIR, 13 .EQU CANFD8_RCR_CANSEG4, 12 .EQU CANFD8_RCR_CANSEG3, 11 .EQU CANFD8_RCR_CANSEG2, 10 .EQU CANFD8_RCR_CANSEG1, 9 .EQU CANFD8_RCR_CANSEG0, 8 .EQU CANFD8_RCR_CANALC4, 4 .EQU CANFD8_RCR_CANALC3, 3 .EQU CANFD8_RCR_CANALC2, 2 .EQU CANFD8_RCR_CANALC1, 1 .EQU CANFD8_RCR_CANALC0, 0 // register------------------------------------- .EQU CANFD8_EROR, 0x40003B0C // 0x4000 3B0C CANFD8_EROR Bits------------------------------------- .EQU CANFD8_EROR_DPRAMFEN, 31 .EQU CANFD8_EROR_SFDMOD, 30 .EQU CANFD8_EROR_SFDEN, 29 .EQU CANFD8_EROR_SOSFD4, 28 .EQU CANFD8_EROR_SOSFD3, 27 .EQU CANFD8_EROR_SOSFD2, 26 .EQU CANFD8_EROR_SOSFD1, 25 .EQU CANFD8_EROR_SOSFD0, 24 .EQU CANFD8_EROR_CANEWL7, 23 .EQU CANFD8_EROR_CANEWL6, 22 .EQU CANFD8_EROR_CANEWL5, 21 .EQU CANFD8_EROR_CANEWL4, 20 .EQU CANFD8_EROR_CANEWL3, 19 .EQU CANFD8_EROR_CANEWL2, 18 .EQU CANFD8_EROR_CANEWL1, 17 .EQU CANFD8_EROR_CANEWL0, 16 .EQU CANFD8_EROR_CANTXE7, 15 .EQU CANFD8_EROR_CANTXE6, 14 .EQU CANFD8_EROR_CANTXE5, 13 .EQU CANFD8_EROR_CANTXE4, 12 .EQU CANFD8_EROR_CANTXE3, 11 .EQU CANFD8_EROR_CANTXE2, 10 .EQU CANFD8_EROR_CANTXE1, 9 .EQU CANFD8_EROR_CANTXE0, 8 .EQU CANFD8_EROR_CANRXE7, 7 .EQU CANFD8_EROR_CANRXE6, 6 .EQU CANFD8_EROR_CANRXE5, 5 .EQU CANFD8_EROR_CANRXE4, 4 .EQU CANFD8_EROR_CANRXE3, 3 .EQU CANFD8_EROR_CANRXE2, 2 .EQU CANFD8_EROR_CANRXE1, 1 .EQU CANFD8_EROR_CANRXE0, 0 // register------------------------------------- .EQU CANFD8_CTLR2, 0x40003B10 // 0x4000 3B10 CANFD8_CTLR2 Bits------------------------------------- .EQU CANFD8_CTLR2_AMCKDIV1, 26 .EQU CANFD8_CTLR2_AMCKDIV0, 25 .EQU CANFD8_CTLR2_DESEL, 24 .EQU CANFD8_CTLR2_TDCVM6, 22 .EQU CANFD8_CTLR2_TDCVM5, 21 .EQU CANFD8_CTLR2_TDCVM4, 20 .EQU CANFD8_CTLR2_TDCVM3, 19 .EQU CANFD8_CTLR2_TDCVM2, 18 .EQU CANFD8_CTLR2_TDCVM1, 17 .EQU CANFD8_CTLR2_TDCVM0, 16 .EQU CANFD8_CTLR2_TDC0_1, 15 .EQU CANFD8_CTLR2_TDC0_0, 14 .EQU CANFD8_CTLR2_TDCSR1, 13 .EQU CANFD8_CTLR2_TDCSR0, 12 .EQU CANFD8_CTLR2_TDCS1, 11 .EQU CANFD8_CTLR2_TDCS0, 10 .EQU CANFD8_CTLR2_TDCAUT0, 9 .EQU CANFD8_CTLR2_TDCEN, 8 .EQU CANFD8_CTLR2_TDC0EN, 7 .EQU CANFD8_CTLR2_TDCV6, 6 .EQU CANFD8_CTLR2_TDCV5, 5 .EQU CANFD8_CTLR2_TDCV4, 4 .EQU CANFD8_CTLR2_TDCV3, 3 .EQU CANFD8_CTLR2_TDCV2, 2 .EQU CANFD8_CTLR2_TDCV1, 1 .EQU CANFD8_CTLR2_TDCV0, 0 // register------------------------------------- .EQU CANFD8_MSKR, 0x40003B14 // 0x4000 3B14 CANFD8_MSKR Bits------------------------------------- .EQU CANFD8_MSKR_MSK31, 31 .EQU CANFD8_MSKR_MSK30, 30 .EQU CANFD8_MSKR_MSK29, 29 .EQU CANFD8_MSKR_MSK28, 28 .EQU CANFD8_MSKR_MSK27, 27 .EQU CANFD8_MSKR_MSK26, 26 .EQU CANFD8_MSKR_MSK25, 25 .EQU CANFD8_MSKR_MSK24, 24 .EQU CANFD8_MSKR_MSK23, 23 .EQU CANFD8_MSKR_MSK22, 22 .EQU CANFD8_MSKR_MSK21, 21 .EQU CANFD8_MSKR_MSK20, 20 .EQU CANFD8_MSKR_MSK19, 19 .EQU CANFD8_MSKR_MSK18, 18 .EQU CANFD8_MSKR_MSK17, 17 .EQU CANFD8_MSKR_MSK16, 16 .EQU CANFD8_MSKR_MSK15, 15 .EQU CANFD8_MSKR_MSK14, 14 .EQU CANFD8_MSKR_MSK13, 13 .EQU CANFD8_MSKR_MSK12, 12 .EQU CANFD8_MSKR_MSK11, 11 .EQU CANFD8_MSKR_MSK10, 10 .EQU CANFD8_MSKR_MSK9, 9 .EQU CANFD8_MSKR_MSK8, 8 .EQU CANFD8_MSKR_MSK7, 7 .EQU CANFD8_MSKR_MSK6, 6 .EQU CANFD8_MSKR_MSK5, 5 .EQU CANFD8_MSKR_MSK4, 4 .EQU CANFD8_MSKR_MSK3, 3 .EQU CANFD8_MSKR_MSK2, 2 .EQU CANFD8_MSKR_MSK1, 1 .EQU CANFD8_MSKR_MSK0, 0 // register------------------------------------- .EQU CANFD8_IER, 0x40003B18 // 0x4000 3B18 CANFD8_IER Bits------------------------------------- .EQU CANFD8_IER_FAILCLR, 31 .EQU CANFD8_IER_LPCANGPIOSEL0, 30 .EQU CANFD8_IER_BOFFIC, 28 .EQU CANFD8_IER_TRGMBIC, 27 .EQU CANFD8_IER_MOENDIC, 26 .EQU CANFD8_IER_BEIC, 23 .EQU CANFD8_IER_ALIC, 22 .EQU CANFD8_IER_ENIC, 21 .EQU CANFD8_IER_WUIC, 20 .EQU CANFD8_IER_DOVFIC, 19 .EQU CANFD8_IER_EAIC, 18 .EQU CANFD8_IER_CANTXIC, 17 .EQU CANFD8_IER_CANRXIC, 16 .EQU CANFD8_IER_MOENDIE, 15 .EQU CANFD8_IER_ARBFAILIE, 14 .EQU CANFD8_IER_BOFFIE, 12 .EQU CANFD8_IER_TRGMBIE, 11 .EQU CANFD8_IER_RXBSTAIE, 10 .EQU CANFD8_IER_CRXDE, 9 .EQU CANFD8_IER_CTXDE, 8 .EQU CANFD8_IER_BEIE, 7 .EQU CANFD8_IER_ALIE, 6 .EQU CANFD8_IER_ENIE, 5 .EQU CANFD8_IER_WUIE, 4 .EQU CANFD8_IER_DOVFIE, 3 .EQU CANFD8_IER_EAIE, 2 .EQU CANFD8_IER_CANTXIE, 1 .EQU CANFD8_IER_CANRXIE, 0 // register------------------------------------- .EQU CANFD8_IFR, 0x40003B1C // 0x4000 3B1C CANFD8_IFR Bits------------------------------------- .EQU CANFD8_IFR_MOENDIF, 14 .EQU CANFD8_IFR_BOFFIF, 12 .EQU CANFD8_IFR_TRGMBIF, 11 .EQU CANFD8_IFR_RXBSTAIF, 10 .EQU CANFD8_IFR_CRXDF, 9 .EQU CANFD8_IFR_CTXDF, 8 .EQU CANFD8_IFR_BEIF, 7 .EQU CANFD8_IFR_ALIF, 6 .EQU CANFD8_IFR_ENIF, 5 .EQU CANFD8_IFR_WUIF, 4 .EQU CANFD8_IFR_DOVFIF, 3 .EQU CANFD8_IFR_EAIF, 2 .EQU CANFD8_IFR_CANTXIF, 1 .EQU CANFD8_IFR_CANRXIF, 0 // register------------------------------------- .EQU CANFD8_RXDATA0, 0x40003B20 // 0x4000 3B20 CANFD8_RXDATA0 Bits------------------------------------- .EQU CANFD8_RXDATA0_RXDATA0_31, 31 .EQU CANFD8_RXDATA0_RXDATA0_30, 30 .EQU CANFD8_RXDATA0_RXDATA0_29, 29 .EQU CANFD8_RXDATA0_RXDATA0_28, 28 .EQU CANFD8_RXDATA0_RXDATA0_27, 27 .EQU CANFD8_RXDATA0_RXDATA0_26, 26 .EQU CANFD8_RXDATA0_RXDATA0_25, 25 .EQU CANFD8_RXDATA0_RXDATA0_24, 24 .EQU CANFD8_RXDATA0_RXDATA0_23, 23 .EQU CANFD8_RXDATA0_RXDATA0_22, 22 .EQU CANFD8_RXDATA0_RXDATA0_21, 21 .EQU CANFD8_RXDATA0_RXDATA0_20, 20 .EQU CANFD8_RXDATA0_RXDATA0_19, 19 .EQU CANFD8_RXDATA0_RXDATA0_18, 18 .EQU CANFD8_RXDATA0_RXDATA0_17, 17 .EQU CANFD8_RXDATA0_RXDATA0_16, 16 .EQU CANFD8_RXDATA0_RXDATA0_15, 15 .EQU CANFD8_RXDATA0_RXDATA0_14, 14 .EQU CANFD8_RXDATA0_RXDATA0_13, 13 .EQU CANFD8_RXDATA0_RXDATA0_12, 12 .EQU CANFD8_RXDATA0_RXDATA0_11, 11 .EQU CANFD8_RXDATA0_RXDATA0_10, 10 .EQU CANFD8_RXDATA0_RXDATA0_9, 9 .EQU CANFD8_RXDATA0_RXDATA0_8, 8 .EQU CANFD8_RXDATA0_RXDATA0_7, 7 .EQU CANFD8_RXDATA0_RXDATA0_6, 6 .EQU CANFD8_RXDATA0_RXDATA0_5, 5 .EQU CANFD8_RXDATA0_RXDATA0_4, 4 .EQU CANFD8_RXDATA0_RXDATA0_3, 3 .EQU CANFD8_RXDATA0_RXDATA0_2, 2 .EQU CANFD8_RXDATA0_RXDATA0_1, 1 .EQU CANFD8_RXDATA0_RXDATA0_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA1, 0x40003B24 // 0x4000 3B24 CANFD8_RXDATA1 Bits------------------------------------- .EQU CANFD8_RXDATA1_RXDATA1_31, 31 .EQU CANFD8_RXDATA1_RXDATA1_30, 30 .EQU CANFD8_RXDATA1_RXDATA1_29, 29 .EQU CANFD8_RXDATA1_RXDATA1_28, 28 .EQU CANFD8_RXDATA1_RXDATA1_27, 27 .EQU CANFD8_RXDATA1_RXDATA1_26, 26 .EQU CANFD8_RXDATA1_RXDATA1_25, 25 .EQU CANFD8_RXDATA1_RXDATA1_24, 24 .EQU CANFD8_RXDATA1_RXDATA1_23, 23 .EQU CANFD8_RXDATA1_RXDATA1_22, 22 .EQU CANFD8_RXDATA1_RXDATA1_21, 21 .EQU CANFD8_RXDATA1_RXDATA1_20, 20 .EQU CANFD8_RXDATA1_RXDATA1_19, 19 .EQU CANFD8_RXDATA1_RXDATA1_18, 18 .EQU CANFD8_RXDATA1_RXDATA1_17, 17 .EQU CANFD8_RXDATA1_RXDATA1_16, 16 .EQU CANFD8_RXDATA1_RXDATA1_15, 15 .EQU CANFD8_RXDATA1_RXDATA1_14, 14 .EQU CANFD8_RXDATA1_RXDATA1_13, 13 .EQU CANFD8_RXDATA1_RXDATA1_12, 12 .EQU CANFD8_RXDATA1_RXDATA1_11, 11 .EQU CANFD8_RXDATA1_RXDATA1_10, 10 .EQU CANFD8_RXDATA1_RXDATA1_9, 9 .EQU CANFD8_RXDATA1_RXDATA1_8, 8 .EQU CANFD8_RXDATA1_RXDATA1_7, 7 .EQU CANFD8_RXDATA1_RXDATA1_6, 6 .EQU CANFD8_RXDATA1_RXDATA1_5, 5 .EQU CANFD8_RXDATA1_RXDATA1_4, 4 .EQU CANFD8_RXDATA1_RXDATA1_3, 3 .EQU CANFD8_RXDATA1_RXDATA1_2, 2 .EQU CANFD8_RXDATA1_RXDATA1_1, 1 .EQU CANFD8_RXDATA1_RXDATA1_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA2, 0x40003B28 // 0x4000 3B28 CANFD8_RXDATA2 Bits------------------------------------- .EQU CANFD8_RXDATA2_RXDATA2_31, 31 .EQU CANFD8_RXDATA2_RXDATA2_30, 30 .EQU CANFD8_RXDATA2_RXDATA2_29, 29 .EQU CANFD8_RXDATA2_RXDATA2_28, 28 .EQU CANFD8_RXDATA2_RXDATA2_27, 27 .EQU CANFD8_RXDATA2_RXDATA2_26, 26 .EQU CANFD8_RXDATA2_RXDATA2_25, 25 .EQU CANFD8_RXDATA2_RXDATA2_24, 24 .EQU CANFD8_RXDATA2_RXDATA2_23, 23 .EQU CANFD8_RXDATA2_RXDATA2_22, 22 .EQU CANFD8_RXDATA2_RXDATA2_21, 21 .EQU CANFD8_RXDATA2_RXDATA2_20, 20 .EQU CANFD8_RXDATA2_RXDATA2_19, 19 .EQU CANFD8_RXDATA2_RXDATA2_18, 18 .EQU CANFD8_RXDATA2_RXDATA2_17, 17 .EQU CANFD8_RXDATA2_RXDATA2_16, 16 .EQU CANFD8_RXDATA2_RXDATA2_15, 15 .EQU CANFD8_RXDATA2_RXDATA2_14, 14 .EQU CANFD8_RXDATA2_RXDATA2_13, 13 .EQU CANFD8_RXDATA2_RXDATA2_12, 12 .EQU CANFD8_RXDATA2_RXDATA2_11, 11 .EQU CANFD8_RXDATA2_RXDATA2_10, 10 .EQU CANFD8_RXDATA2_RXDATA2_9, 9 .EQU CANFD8_RXDATA2_RXDATA2_8, 8 .EQU CANFD8_RXDATA2_RXDATA2_7, 7 .EQU CANFD8_RXDATA2_RXDATA2_6, 6 .EQU CANFD8_RXDATA2_RXDATA2_5, 5 .EQU CANFD8_RXDATA2_RXDATA2_4, 4 .EQU CANFD8_RXDATA2_RXDATA2_3, 3 .EQU CANFD8_RXDATA2_RXDATA2_2, 2 .EQU CANFD8_RXDATA2_RXDATA2_1, 1 .EQU CANFD8_RXDATA2_RXDATA2_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA3, 0x40003B2C // 0x4000 3B2C CANFD8_RXDATA3 Bits------------------------------------- .EQU CANFD8_RXDATA3_RXDATA3_31, 31 .EQU CANFD8_RXDATA3_RXDATA3_30, 30 .EQU CANFD8_RXDATA3_RXDATA3_29, 29 .EQU CANFD8_RXDATA3_RXDATA3_28, 28 .EQU CANFD8_RXDATA3_RXDATA3_27, 27 .EQU CANFD8_RXDATA3_RXDATA3_26, 26 .EQU CANFD8_RXDATA3_RXDATA3_25, 25 .EQU CANFD8_RXDATA3_RXDATA3_24, 24 .EQU CANFD8_RXDATA3_RXDATA3_23, 23 .EQU CANFD8_RXDATA3_RXDATA3_22, 22 .EQU CANFD8_RXDATA3_RXDATA3_21, 21 .EQU CANFD8_RXDATA3_RXDATA3_20, 20 .EQU CANFD8_RXDATA3_RXDATA3_19, 19 .EQU CANFD8_RXDATA3_RXDATA3_18, 18 .EQU CANFD8_RXDATA3_RXDATA3_17, 17 .EQU CANFD8_RXDATA3_RXDATA3_16, 16 .EQU CANFD8_RXDATA3_RXDATA3_15, 15 .EQU CANFD8_RXDATA3_RXDATA3_14, 14 .EQU CANFD8_RXDATA3_RXDATA3_13, 13 .EQU CANFD8_RXDATA3_RXDATA3_12, 12 .EQU CANFD8_RXDATA3_RXDATA3_11, 11 .EQU CANFD8_RXDATA3_RXDATA3_10, 10 .EQU CANFD8_RXDATA3_RXDATA3_9, 9 .EQU CANFD8_RXDATA3_RXDATA3_8, 8 .EQU CANFD8_RXDATA3_RXDATA3_7, 7 .EQU CANFD8_RXDATA3_RXDATA3_6, 6 .EQU CANFD8_RXDATA3_RXDATA3_5, 5 .EQU CANFD8_RXDATA3_RXDATA3_4, 4 .EQU CANFD8_RXDATA3_RXDATA3_3, 3 .EQU CANFD8_RXDATA3_RXDATA3_2, 2 .EQU CANFD8_RXDATA3_RXDATA3_1, 1 .EQU CANFD8_RXDATA3_RXDATA3_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA4, 0x40003B30 // 0x4000 3B30 CANFD8_RXDATA4 Bits------------------------------------- .EQU CANFD8_RXDATA4_RXDATA4_31, 31 .EQU CANFD8_RXDATA4_RXDATA4_30, 30 .EQU CANFD8_RXDATA4_RXDATA4_29, 29 .EQU CANFD8_RXDATA4_RXDATA4_28, 28 .EQU CANFD8_RXDATA4_RXDATA4_27, 27 .EQU CANFD8_RXDATA4_RXDATA4_26, 26 .EQU CANFD8_RXDATA4_RXDATA4_25, 25 .EQU CANFD8_RXDATA4_RXDATA4_24, 24 .EQU CANFD8_RXDATA4_RXDATA4_23, 23 .EQU CANFD8_RXDATA4_RXDATA4_22, 22 .EQU CANFD8_RXDATA4_RXDATA4_21, 21 .EQU CANFD8_RXDATA4_RXDATA4_20, 20 .EQU CANFD8_RXDATA4_RXDATA4_19, 19 .EQU CANFD8_RXDATA4_RXDATA4_18, 18 .EQU CANFD8_RXDATA4_RXDATA4_17, 17 .EQU CANFD8_RXDATA4_RXDATA4_16, 16 .EQU CANFD8_RXDATA4_RXDATA4_15, 15 .EQU CANFD8_RXDATA4_RXDATA4_14, 14 .EQU CANFD8_RXDATA4_RXDATA4_13, 13 .EQU CANFD8_RXDATA4_RXDATA4_12, 12 .EQU CANFD8_RXDATA4_RXDATA4_11, 11 .EQU CANFD8_RXDATA4_RXDATA4_10, 10 .EQU CANFD8_RXDATA4_RXDATA4_9, 9 .EQU CANFD8_RXDATA4_RXDATA4_8, 8 .EQU CANFD8_RXDATA4_RXDATA4_7, 7 .EQU CANFD8_RXDATA4_RXDATA4_6, 6 .EQU CANFD8_RXDATA4_RXDATA4_5, 5 .EQU CANFD8_RXDATA4_RXDATA4_4, 4 .EQU CANFD8_RXDATA4_RXDATA4_3, 3 .EQU CANFD8_RXDATA4_RXDATA4_2, 2 .EQU CANFD8_RXDATA4_RXDATA4_1, 1 .EQU CANFD8_RXDATA4_RXDATA4_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA5, 0x40003B34 // 0x4000 3B34 CANFD8_RXDATA5 Bits------------------------------------- .EQU CANFD8_RXDATA5_RXDATA5_31, 31 .EQU CANFD8_RXDATA5_RXDATA5_30, 30 .EQU CANFD8_RXDATA5_RXDATA5_29, 29 .EQU CANFD8_RXDATA5_RXDATA5_28, 28 .EQU CANFD8_RXDATA5_RXDATA5_27, 27 .EQU CANFD8_RXDATA5_RXDATA5_26, 26 .EQU CANFD8_RXDATA5_RXDATA5_25, 25 .EQU CANFD8_RXDATA5_RXDATA5_24, 24 .EQU CANFD8_RXDATA5_RXDATA5_23, 23 .EQU CANFD8_RXDATA5_RXDATA5_22, 22 .EQU CANFD8_RXDATA5_RXDATA5_21, 21 .EQU CANFD8_RXDATA5_RXDATA5_20, 20 .EQU CANFD8_RXDATA5_RXDATA5_19, 19 .EQU CANFD8_RXDATA5_RXDATA5_18, 18 .EQU CANFD8_RXDATA5_RXDATA5_17, 17 .EQU CANFD8_RXDATA5_RXDATA5_16, 16 .EQU CANFD8_RXDATA5_RXDATA5_15, 15 .EQU CANFD8_RXDATA5_RXDATA5_14, 14 .EQU CANFD8_RXDATA5_RXDATA5_13, 13 .EQU CANFD8_RXDATA5_RXDATA5_12, 12 .EQU CANFD8_RXDATA5_RXDATA5_11, 11 .EQU CANFD8_RXDATA5_RXDATA5_10, 10 .EQU CANFD8_RXDATA5_RXDATA5_9, 9 .EQU CANFD8_RXDATA5_RXDATA5_8, 8 .EQU CANFD8_RXDATA5_RXDATA5_7, 7 .EQU CANFD8_RXDATA5_RXDATA5_6, 6 .EQU CANFD8_RXDATA5_RXDATA5_5, 5 .EQU CANFD8_RXDATA5_RXDATA5_4, 4 .EQU CANFD8_RXDATA5_RXDATA5_3, 3 .EQU CANFD8_RXDATA5_RXDATA5_2, 2 .EQU CANFD8_RXDATA5_RXDATA5_1, 1 .EQU CANFD8_RXDATA5_RXDATA5_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA6, 0x40003B38 // 0x4000 3B38 CANFD8_RXDATA6 Bits------------------------------------- .EQU CANFD8_RXDATA6_RXDATA6_31, 31 .EQU CANFD8_RXDATA6_RXDATA6_30, 30 .EQU CANFD8_RXDATA6_RXDATA6_29, 29 .EQU CANFD8_RXDATA6_RXDATA6_28, 28 .EQU CANFD8_RXDATA6_RXDATA6_27, 27 .EQU CANFD8_RXDATA6_RXDATA6_26, 26 .EQU CANFD8_RXDATA6_RXDATA6_25, 25 .EQU CANFD8_RXDATA6_RXDATA6_24, 24 .EQU CANFD8_RXDATA6_RXDATA6_23, 23 .EQU CANFD8_RXDATA6_RXDATA6_22, 22 .EQU CANFD8_RXDATA6_RXDATA6_21, 21 .EQU CANFD8_RXDATA6_RXDATA6_20, 20 .EQU CANFD8_RXDATA6_RXDATA6_19, 19 .EQU CANFD8_RXDATA6_RXDATA6_18, 18 .EQU CANFD8_RXDATA6_RXDATA6_17, 17 .EQU CANFD8_RXDATA6_RXDATA6_16, 16 .EQU CANFD8_RXDATA6_RXDATA6_15, 15 .EQU CANFD8_RXDATA6_RXDATA6_14, 14 .EQU CANFD8_RXDATA6_RXDATA6_13, 13 .EQU CANFD8_RXDATA6_RXDATA6_12, 12 .EQU CANFD8_RXDATA6_RXDATA6_11, 11 .EQU CANFD8_RXDATA6_RXDATA6_10, 10 .EQU CANFD8_RXDATA6_RXDATA6_9, 9 .EQU CANFD8_RXDATA6_RXDATA6_8, 8 .EQU CANFD8_RXDATA6_RXDATA6_7, 7 .EQU CANFD8_RXDATA6_RXDATA6_6, 6 .EQU CANFD8_RXDATA6_RXDATA6_5, 5 .EQU CANFD8_RXDATA6_RXDATA6_4, 4 .EQU CANFD8_RXDATA6_RXDATA6_3, 3 .EQU CANFD8_RXDATA6_RXDATA6_2, 2 .EQU CANFD8_RXDATA6_RXDATA6_1, 1 .EQU CANFD8_RXDATA6_RXDATA6_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA7, 0x40003B3C // 0x4000 3B3C CANFD8_RXDATA7 Bits------------------------------------- .EQU CANFD8_RXDATA7_RXDATA7_31, 31 .EQU CANFD8_RXDATA7_RXDATA7_30, 30 .EQU CANFD8_RXDATA7_RXDATA7_29, 29 .EQU CANFD8_RXDATA7_RXDATA7_28, 28 .EQU CANFD8_RXDATA7_RXDATA7_27, 27 .EQU CANFD8_RXDATA7_RXDATA7_26, 26 .EQU CANFD8_RXDATA7_RXDATA7_25, 25 .EQU CANFD8_RXDATA7_RXDATA7_24, 24 .EQU CANFD8_RXDATA7_RXDATA7_23, 23 .EQU CANFD8_RXDATA7_RXDATA7_22, 22 .EQU CANFD8_RXDATA7_RXDATA7_21, 21 .EQU CANFD8_RXDATA7_RXDATA7_20, 20 .EQU CANFD8_RXDATA7_RXDATA7_19, 19 .EQU CANFD8_RXDATA7_RXDATA7_18, 18 .EQU CANFD8_RXDATA7_RXDATA7_17, 17 .EQU CANFD8_RXDATA7_RXDATA7_16, 16 .EQU CANFD8_RXDATA7_RXDATA7_15, 15 .EQU CANFD8_RXDATA7_RXDATA7_14, 14 .EQU CANFD8_RXDATA7_RXDATA7_13, 13 .EQU CANFD8_RXDATA7_RXDATA7_12, 12 .EQU CANFD8_RXDATA7_RXDATA7_11, 11 .EQU CANFD8_RXDATA7_RXDATA7_10, 10 .EQU CANFD8_RXDATA7_RXDATA7_9, 9 .EQU CANFD8_RXDATA7_RXDATA7_8, 8 .EQU CANFD8_RXDATA7_RXDATA7_7, 7 .EQU CANFD8_RXDATA7_RXDATA7_6, 6 .EQU CANFD8_RXDATA7_RXDATA7_5, 5 .EQU CANFD8_RXDATA7_RXDATA7_4, 4 .EQU CANFD8_RXDATA7_RXDATA7_3, 3 .EQU CANFD8_RXDATA7_RXDATA7_2, 2 .EQU CANFD8_RXDATA7_RXDATA7_1, 1 .EQU CANFD8_RXDATA7_RXDATA7_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA8, 0x40003B40 // 0x4000 3B40 CANFD8_RXDATA8 Bits------------------------------------- .EQU CANFD8_RXDATA8_RXDATA8_31, 31 .EQU CANFD8_RXDATA8_RXDATA8_30, 30 .EQU CANFD8_RXDATA8_RXDATA8_29, 29 .EQU CANFD8_RXDATA8_RXDATA8_28, 28 .EQU CANFD8_RXDATA8_RXDATA8_27, 27 .EQU CANFD8_RXDATA8_RXDATA8_26, 26 .EQU CANFD8_RXDATA8_RXDATA8_25, 25 .EQU CANFD8_RXDATA8_RXDATA8_24, 24 .EQU CANFD8_RXDATA8_RXDATA8_23, 23 .EQU CANFD8_RXDATA8_RXDATA8_22, 22 .EQU CANFD8_RXDATA8_RXDATA8_21, 21 .EQU CANFD8_RXDATA8_RXDATA8_20, 20 .EQU CANFD8_RXDATA8_RXDATA8_19, 19 .EQU CANFD8_RXDATA8_RXDATA8_18, 18 .EQU CANFD8_RXDATA8_RXDATA8_17, 17 .EQU CANFD8_RXDATA8_RXDATA8_16, 16 .EQU CANFD8_RXDATA8_RXDATA8_15, 15 .EQU CANFD8_RXDATA8_RXDATA8_14, 14 .EQU CANFD8_RXDATA8_RXDATA8_13, 13 .EQU CANFD8_RXDATA8_RXDATA8_12, 12 .EQU CANFD8_RXDATA8_RXDATA8_11, 11 .EQU CANFD8_RXDATA8_RXDATA8_10, 10 .EQU CANFD8_RXDATA8_RXDATA8_9, 9 .EQU CANFD8_RXDATA8_RXDATA8_8, 8 .EQU CANFD8_RXDATA8_RXDATA8_7, 7 .EQU CANFD8_RXDATA8_RXDATA8_6, 6 .EQU CANFD8_RXDATA8_RXDATA8_5, 5 .EQU CANFD8_RXDATA8_RXDATA8_4, 4 .EQU CANFD8_RXDATA8_RXDATA8_3, 3 .EQU CANFD8_RXDATA8_RXDATA8_2, 2 .EQU CANFD8_RXDATA8_RXDATA8_1, 1 .EQU CANFD8_RXDATA8_RXDATA8_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA9, 0x40003B44 // 0x4000 3B44 CANFD8_RXDATA9 Bits------------------------------------- .EQU CANFD8_RXDATA9_RXDATA9_31, 31 .EQU CANFD8_RXDATA9_RXDATA9_30, 30 .EQU CANFD8_RXDATA9_RXDATA9_29, 29 .EQU CANFD8_RXDATA9_RXDATA9_28, 28 .EQU CANFD8_RXDATA9_RXDATA9_27, 27 .EQU CANFD8_RXDATA9_RXDATA9_26, 26 .EQU CANFD8_RXDATA9_RXDATA9_25, 25 .EQU CANFD8_RXDATA9_RXDATA9_24, 24 .EQU CANFD8_RXDATA9_RXDATA9_23, 23 .EQU CANFD8_RXDATA9_RXDATA9_22, 22 .EQU CANFD8_RXDATA9_RXDATA9_21, 21 .EQU CANFD8_RXDATA9_RXDATA9_20, 20 .EQU CANFD8_RXDATA9_RXDATA9_19, 19 .EQU CANFD8_RXDATA9_RXDATA9_18, 18 .EQU CANFD8_RXDATA9_RXDATA9_17, 17 .EQU CANFD8_RXDATA9_RXDATA9_16, 16 .EQU CANFD8_RXDATA9_RXDATA9_15, 15 .EQU CANFD8_RXDATA9_RXDATA9_14, 14 .EQU CANFD8_RXDATA9_RXDATA9_13, 13 .EQU CANFD8_RXDATA9_RXDATA9_12, 12 .EQU CANFD8_RXDATA9_RXDATA9_11, 11 .EQU CANFD8_RXDATA9_RXDATA9_10, 10 .EQU CANFD8_RXDATA9_RXDATA9_9, 9 .EQU CANFD8_RXDATA9_RXDATA9_8, 8 .EQU CANFD8_RXDATA9_RXDATA9_7, 7 .EQU CANFD8_RXDATA9_RXDATA9_6, 6 .EQU CANFD8_RXDATA9_RXDATA9_5, 5 .EQU CANFD8_RXDATA9_RXDATA9_4, 4 .EQU CANFD8_RXDATA9_RXDATA9_3, 3 .EQU CANFD8_RXDATA9_RXDATA9_2, 2 .EQU CANFD8_RXDATA9_RXDATA9_1, 1 .EQU CANFD8_RXDATA9_RXDATA9_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA10, 0x40003B48 // 0x4000 3B48 CANFD8_RXDATA10 Bits------------------------------------- .EQU CANFD8_RXDATA10_RXDATA10_31, 31 .EQU CANFD8_RXDATA10_RXDATA10_30, 30 .EQU CANFD8_RXDATA10_RXDATA10_29, 29 .EQU CANFD8_RXDATA10_RXDATA10_28, 28 .EQU CANFD8_RXDATA10_RXDATA10_27, 27 .EQU CANFD8_RXDATA10_RXDATA10_26, 26 .EQU CANFD8_RXDATA10_RXDATA10_25, 25 .EQU CANFD8_RXDATA10_RXDATA10_24, 24 .EQU CANFD8_RXDATA10_RXDATA10_23, 23 .EQU CANFD8_RXDATA10_RXDATA10_22, 22 .EQU CANFD8_RXDATA10_RXDATA10_21, 21 .EQU CANFD8_RXDATA10_RXDATA10_20, 20 .EQU CANFD8_RXDATA10_RXDATA10_19, 19 .EQU CANFD8_RXDATA10_RXDATA10_18, 18 .EQU CANFD8_RXDATA10_RXDATA10_17, 17 .EQU CANFD8_RXDATA10_RXDATA10_16, 16 .EQU CANFD8_RXDATA10_RXDATA10_15, 15 .EQU CANFD8_RXDATA10_RXDATA10_14, 14 .EQU CANFD8_RXDATA10_RXDATA10_13, 13 .EQU CANFD8_RXDATA10_RXDATA10_12, 12 .EQU CANFD8_RXDATA10_RXDATA10_11, 11 .EQU CANFD8_RXDATA10_RXDATA10_10, 10 .EQU CANFD8_RXDATA10_RXDATA10_9, 9 .EQU CANFD8_RXDATA10_RXDATA10_8, 8 .EQU CANFD8_RXDATA10_RXDATA10_7, 7 .EQU CANFD8_RXDATA10_RXDATA10_6, 6 .EQU CANFD8_RXDATA10_RXDATA10_5, 5 .EQU CANFD8_RXDATA10_RXDATA10_4, 4 .EQU CANFD8_RXDATA10_RXDATA10_3, 3 .EQU CANFD8_RXDATA10_RXDATA10_2, 2 .EQU CANFD8_RXDATA10_RXDATA10_1, 1 .EQU CANFD8_RXDATA10_RXDATA10_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA11, 0x40003B4C // 0x4000 3B4C CANFD8_RXDATA11 Bits------------------------------------- .EQU CANFD8_RXDATA11_RXDATA11_31, 31 .EQU CANFD8_RXDATA11_RXDATA11_30, 30 .EQU CANFD8_RXDATA11_RXDATA11_29, 29 .EQU CANFD8_RXDATA11_RXDATA11_28, 28 .EQU CANFD8_RXDATA11_RXDATA11_27, 27 .EQU CANFD8_RXDATA11_RXDATA11_26, 26 .EQU CANFD8_RXDATA11_RXDATA11_25, 25 .EQU CANFD8_RXDATA11_RXDATA11_24, 24 .EQU CANFD8_RXDATA11_RXDATA11_23, 23 .EQU CANFD8_RXDATA11_RXDATA11_22, 22 .EQU CANFD8_RXDATA11_RXDATA11_21, 21 .EQU CANFD8_RXDATA11_RXDATA11_20, 20 .EQU CANFD8_RXDATA11_RXDATA11_19, 19 .EQU CANFD8_RXDATA11_RXDATA11_18, 18 .EQU CANFD8_RXDATA11_RXDATA11_17, 17 .EQU CANFD8_RXDATA11_RXDATA11_16, 16 .EQU CANFD8_RXDATA11_RXDATA11_15, 15 .EQU CANFD8_RXDATA11_RXDATA11_14, 14 .EQU CANFD8_RXDATA11_RXDATA11_13, 13 .EQU CANFD8_RXDATA11_RXDATA11_12, 12 .EQU CANFD8_RXDATA11_RXDATA11_11, 11 .EQU CANFD8_RXDATA11_RXDATA11_10, 10 .EQU CANFD8_RXDATA11_RXDATA11_9, 9 .EQU CANFD8_RXDATA11_RXDATA11_8, 8 .EQU CANFD8_RXDATA11_RXDATA11_7, 7 .EQU CANFD8_RXDATA11_RXDATA11_6, 6 .EQU CANFD8_RXDATA11_RXDATA11_5, 5 .EQU CANFD8_RXDATA11_RXDATA11_4, 4 .EQU CANFD8_RXDATA11_RXDATA11_3, 3 .EQU CANFD8_RXDATA11_RXDATA11_2, 2 .EQU CANFD8_RXDATA11_RXDATA11_1, 1 .EQU CANFD8_RXDATA11_RXDATA11_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA12, 0x40003B50 // 0x4000 3B50 CANFD8_RXDATA12 Bits------------------------------------- .EQU CANFD8_RXDATA12_RXDATA12_31, 31 .EQU CANFD8_RXDATA12_RXDATA12_30, 30 .EQU CANFD8_RXDATA12_RXDATA12_29, 29 .EQU CANFD8_RXDATA12_RXDATA12_28, 28 .EQU CANFD8_RXDATA12_RXDATA12_27, 27 .EQU CANFD8_RXDATA12_RXDATA12_26, 26 .EQU CANFD8_RXDATA12_RXDATA12_25, 25 .EQU CANFD8_RXDATA12_RXDATA12_24, 24 .EQU CANFD8_RXDATA12_RXDATA12_23, 23 .EQU CANFD8_RXDATA12_RXDATA12_22, 22 .EQU CANFD8_RXDATA12_RXDATA12_21, 21 .EQU CANFD8_RXDATA12_RXDATA12_20, 20 .EQU CANFD8_RXDATA12_RXDATA12_19, 19 .EQU CANFD8_RXDATA12_RXDATA12_18, 18 .EQU CANFD8_RXDATA12_RXDATA12_17, 17 .EQU CANFD8_RXDATA12_RXDATA12_16, 16 .EQU CANFD8_RXDATA12_RXDATA12_15, 15 .EQU CANFD8_RXDATA12_RXDATA12_14, 14 .EQU CANFD8_RXDATA12_RXDATA12_13, 13 .EQU CANFD8_RXDATA12_RXDATA12_12, 12 .EQU CANFD8_RXDATA12_RXDATA12_11, 11 .EQU CANFD8_RXDATA12_RXDATA12_10, 10 .EQU CANFD8_RXDATA12_RXDATA12_9, 9 .EQU CANFD8_RXDATA12_RXDATA12_8, 8 .EQU CANFD8_RXDATA12_RXDATA12_7, 7 .EQU CANFD8_RXDATA12_RXDATA12_6, 6 .EQU CANFD8_RXDATA12_RXDATA12_5, 5 .EQU CANFD8_RXDATA12_RXDATA12_4, 4 .EQU CANFD8_RXDATA12_RXDATA12_3, 3 .EQU CANFD8_RXDATA12_RXDATA12_2, 2 .EQU CANFD8_RXDATA12_RXDATA12_1, 1 .EQU CANFD8_RXDATA12_RXDATA12_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA13, 0x40003B54 // 0x4000 3B54 CANFD8_RXDATA13 Bits------------------------------------- .EQU CANFD8_RXDATA13_RXDATA13_31, 31 .EQU CANFD8_RXDATA13_RXDATA13_30, 30 .EQU CANFD8_RXDATA13_RXDATA13_29, 29 .EQU CANFD8_RXDATA13_RXDATA13_28, 28 .EQU CANFD8_RXDATA13_RXDATA13_27, 27 .EQU CANFD8_RXDATA13_RXDATA13_26, 26 .EQU CANFD8_RXDATA13_RXDATA13_25, 25 .EQU CANFD8_RXDATA13_RXDATA13_24, 24 .EQU CANFD8_RXDATA13_RXDATA13_23, 23 .EQU CANFD8_RXDATA13_RXDATA13_22, 22 .EQU CANFD8_RXDATA13_RXDATA13_21, 21 .EQU CANFD8_RXDATA13_RXDATA13_20, 20 .EQU CANFD8_RXDATA13_RXDATA13_19, 19 .EQU CANFD8_RXDATA13_RXDATA13_18, 18 .EQU CANFD8_RXDATA13_RXDATA13_17, 17 .EQU CANFD8_RXDATA13_RXDATA13_16, 16 .EQU CANFD8_RXDATA13_RXDATA13_15, 15 .EQU CANFD8_RXDATA13_RXDATA13_14, 14 .EQU CANFD8_RXDATA13_RXDATA13_13, 13 .EQU CANFD8_RXDATA13_RXDATA13_12, 12 .EQU CANFD8_RXDATA13_RXDATA13_11, 11 .EQU CANFD8_RXDATA13_RXDATA13_10, 10 .EQU CANFD8_RXDATA13_RXDATA13_9, 9 .EQU CANFD8_RXDATA13_RXDATA13_8, 8 .EQU CANFD8_RXDATA13_RXDATA13_7, 7 .EQU CANFD8_RXDATA13_RXDATA13_6, 6 .EQU CANFD8_RXDATA13_RXDATA13_5, 5 .EQU CANFD8_RXDATA13_RXDATA13_4, 4 .EQU CANFD8_RXDATA13_RXDATA13_3, 3 .EQU CANFD8_RXDATA13_RXDATA13_2, 2 .EQU CANFD8_RXDATA13_RXDATA13_1, 1 .EQU CANFD8_RXDATA13_RXDATA13_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA14, 0x40003B58 // 0x4000 3B58 CANFD8_RXDATA14 Bits------------------------------------- .EQU CANFD8_RXDATA14_RXDATA14_31, 31 .EQU CANFD8_RXDATA14_RXDATA14_30, 30 .EQU CANFD8_RXDATA14_RXDATA14_29, 29 .EQU CANFD8_RXDATA14_RXDATA14_28, 28 .EQU CANFD8_RXDATA14_RXDATA14_27, 27 .EQU CANFD8_RXDATA14_RXDATA14_26, 26 .EQU CANFD8_RXDATA14_RXDATA14_25, 25 .EQU CANFD8_RXDATA14_RXDATA14_24, 24 .EQU CANFD8_RXDATA14_RXDATA14_23, 23 .EQU CANFD8_RXDATA14_RXDATA14_22, 22 .EQU CANFD8_RXDATA14_RXDATA14_21, 21 .EQU CANFD8_RXDATA14_RXDATA14_20, 20 .EQU CANFD8_RXDATA14_RXDATA14_19, 19 .EQU CANFD8_RXDATA14_RXDATA14_18, 18 .EQU CANFD8_RXDATA14_RXDATA14_17, 17 .EQU CANFD8_RXDATA14_RXDATA14_16, 16 .EQU CANFD8_RXDATA14_RXDATA14_15, 15 .EQU CANFD8_RXDATA14_RXDATA14_14, 14 .EQU CANFD8_RXDATA14_RXDATA14_13, 13 .EQU CANFD8_RXDATA14_RXDATA14_12, 12 .EQU CANFD8_RXDATA14_RXDATA14_11, 11 .EQU CANFD8_RXDATA14_RXDATA14_10, 10 .EQU CANFD8_RXDATA14_RXDATA14_9, 9 .EQU CANFD8_RXDATA14_RXDATA14_8, 8 .EQU CANFD8_RXDATA14_RXDATA14_7, 7 .EQU CANFD8_RXDATA14_RXDATA14_6, 6 .EQU CANFD8_RXDATA14_RXDATA14_5, 5 .EQU CANFD8_RXDATA14_RXDATA14_4, 4 .EQU CANFD8_RXDATA14_RXDATA14_3, 3 .EQU CANFD8_RXDATA14_RXDATA14_2, 2 .EQU CANFD8_RXDATA14_RXDATA14_1, 1 .EQU CANFD8_RXDATA14_RXDATA14_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA15, 0x40003B5C // 0x4000 3B5C CANFD8_RXDATA15 Bits------------------------------------- .EQU CANFD8_RXDATA15_RXDATA15_31, 31 .EQU CANFD8_RXDATA15_RXDATA15_30, 30 .EQU CANFD8_RXDATA15_RXDATA15_29, 29 .EQU CANFD8_RXDATA15_RXDATA15_28, 28 .EQU CANFD8_RXDATA15_RXDATA15_27, 27 .EQU CANFD8_RXDATA15_RXDATA15_26, 26 .EQU CANFD8_RXDATA15_RXDATA15_25, 25 .EQU CANFD8_RXDATA15_RXDATA15_24, 24 .EQU CANFD8_RXDATA15_RXDATA15_23, 23 .EQU CANFD8_RXDATA15_RXDATA15_22, 22 .EQU CANFD8_RXDATA15_RXDATA15_21, 21 .EQU CANFD8_RXDATA15_RXDATA15_20, 20 .EQU CANFD8_RXDATA15_RXDATA15_19, 19 .EQU CANFD8_RXDATA15_RXDATA15_18, 18 .EQU CANFD8_RXDATA15_RXDATA15_17, 17 .EQU CANFD8_RXDATA15_RXDATA15_16, 16 .EQU CANFD8_RXDATA15_RXDATA15_15, 15 .EQU CANFD8_RXDATA15_RXDATA15_14, 14 .EQU CANFD8_RXDATA15_RXDATA15_13, 13 .EQU CANFD8_RXDATA15_RXDATA15_12, 12 .EQU CANFD8_RXDATA15_RXDATA15_11, 11 .EQU CANFD8_RXDATA15_RXDATA15_10, 10 .EQU CANFD8_RXDATA15_RXDATA15_9, 9 .EQU CANFD8_RXDATA15_RXDATA15_8, 8 .EQU CANFD8_RXDATA15_RXDATA15_7, 7 .EQU CANFD8_RXDATA15_RXDATA15_6, 6 .EQU CANFD8_RXDATA15_RXDATA15_5, 5 .EQU CANFD8_RXDATA15_RXDATA15_4, 4 .EQU CANFD8_RXDATA15_RXDATA15_3, 3 .EQU CANFD8_RXDATA15_RXDATA15_2, 2 .EQU CANFD8_RXDATA15_RXDATA15_1, 1 .EQU CANFD8_RXDATA15_RXDATA15_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA16, 0x40003B60 // 0x4000 3B60 CANFD8_RXDATA16 Bits------------------------------------- .EQU CANFD8_RXDATA16_RXDATA16_31, 31 .EQU CANFD8_RXDATA16_RXDATA16_30, 30 .EQU CANFD8_RXDATA16_RXDATA16_29, 29 .EQU CANFD8_RXDATA16_RXDATA16_28, 28 .EQU CANFD8_RXDATA16_RXDATA16_27, 27 .EQU CANFD8_RXDATA16_RXDATA16_26, 26 .EQU CANFD8_RXDATA16_RXDATA16_25, 25 .EQU CANFD8_RXDATA16_RXDATA16_24, 24 .EQU CANFD8_RXDATA16_RXDATA16_23, 23 .EQU CANFD8_RXDATA16_RXDATA16_22, 22 .EQU CANFD8_RXDATA16_RXDATA16_21, 21 .EQU CANFD8_RXDATA16_RXDATA16_20, 20 .EQU CANFD8_RXDATA16_RXDATA16_19, 19 .EQU CANFD8_RXDATA16_RXDATA16_18, 18 .EQU CANFD8_RXDATA16_RXDATA16_17, 17 .EQU CANFD8_RXDATA16_RXDATA16_16, 16 .EQU CANFD8_RXDATA16_RXDATA16_15, 15 .EQU CANFD8_RXDATA16_RXDATA16_14, 14 .EQU CANFD8_RXDATA16_RXDATA16_13, 13 .EQU CANFD8_RXDATA16_RXDATA16_12, 12 .EQU CANFD8_RXDATA16_RXDATA16_11, 11 .EQU CANFD8_RXDATA16_RXDATA16_10, 10 .EQU CANFD8_RXDATA16_RXDATA16_9, 9 .EQU CANFD8_RXDATA16_RXDATA16_8, 8 .EQU CANFD8_RXDATA16_RXDATA16_7, 7 .EQU CANFD8_RXDATA16_RXDATA16_6, 6 .EQU CANFD8_RXDATA16_RXDATA16_5, 5 .EQU CANFD8_RXDATA16_RXDATA16_4, 4 .EQU CANFD8_RXDATA16_RXDATA16_3, 3 .EQU CANFD8_RXDATA16_RXDATA16_2, 2 .EQU CANFD8_RXDATA16_RXDATA16_1, 1 .EQU CANFD8_RXDATA16_RXDATA16_0, 0 // register------------------------------------- .EQU CANFD8_RXDATA17, 0x40003B64 // 0x4000 3B64 CANFD8_RXDATA17 Bits------------------------------------- .EQU CANFD8_RXDATA17_RXDATA17_31, 31 .EQU CANFD8_RXDATA17_RXDATA17_30, 30 .EQU CANFD8_RXDATA17_RXDATA17_29, 29 .EQU CANFD8_RXDATA17_RXDATA17_28, 28 .EQU CANFD8_RXDATA17_RXDATA17_27, 27 .EQU CANFD8_RXDATA17_RXDATA17_26, 26 .EQU CANFD8_RXDATA17_RXDATA17_25, 25 .EQU CANFD8_RXDATA17_RXDATA17_24, 24 .EQU CANFD8_RXDATA17_RXDATA17_23, 23 .EQU CANFD8_RXDATA17_RXDATA17_22, 22 .EQU CANFD8_RXDATA17_RXDATA17_21, 21 .EQU CANFD8_RXDATA17_RXDATA17_20, 20 .EQU CANFD8_RXDATA17_RXDATA17_19, 19 .EQU CANFD8_RXDATA17_RXDATA17_18, 18 .EQU CANFD8_RXDATA17_RXDATA17_17, 17 .EQU CANFD8_RXDATA17_RXDATA17_16, 16 .EQU CANFD8_RXDATA17_RXDATA17_15, 15 .EQU CANFD8_RXDATA17_RXDATA17_14, 14 .EQU CANFD8_RXDATA17_RXDATA17_13, 13 .EQU CANFD8_RXDATA17_RXDATA17_12, 12 .EQU CANFD8_RXDATA17_RXDATA17_11, 11 .EQU CANFD8_RXDATA17_RXDATA17_10, 10 .EQU CANFD8_RXDATA17_RXDATA17_9, 9 .EQU CANFD8_RXDATA17_RXDATA17_8, 8 .EQU CANFD8_RXDATA17_RXDATA17_7, 7 .EQU CANFD8_RXDATA17_RXDATA17_6, 6 .EQU CANFD8_RXDATA17_RXDATA17_5, 5 .EQU CANFD8_RXDATA17_RXDATA17_4, 4 .EQU CANFD8_RXDATA17_RXDATA17_3, 3 .EQU CANFD8_RXDATA17_RXDATA17_2, 2 .EQU CANFD8_RXDATA17_RXDATA17_1, 1 .EQU CANFD8_RXDATA17_RXDATA17_0, 0 // register------------------------------------- .EQU CANFD8_TIMER, 0x40003B68 // 0x4000 3B68 CANFD8_TIMER Bits------------------------------------- .EQU CANFD8_TIMER_CANTIMER15, 15 .EQU CANFD8_TIMER_CANTIMER14, 14 .EQU CANFD8_TIMER_CANTIMER13, 13 .EQU CANFD8_TIMER_CANTIMER12, 12 .EQU CANFD8_TIMER_CANTIMER11, 11 .EQU CANFD8_TIMER_CANTIMER10, 10 .EQU CANFD8_TIMER_CANTIMER9, 9 .EQU CANFD8_TIMER_CANTIMER8, 8 .EQU CANFD8_TIMER_CANTIMER7, 7 .EQU CANFD8_TIMER_CANTIMER6, 6 .EQU CANFD8_TIMER_CANTIMER5, 5 .EQU CANFD8_TIMER_CANTIMER4, 4 .EQU CANFD8_TIMER_CANTIMER3, 3 .EQU CANFD8_TIMER_CANTIMER2, 2 .EQU CANFD8_TIMER_CANTIMER1, 1 .EQU CANFD8_TIMER_CANTIMER0, 0 // register------------------------------------- .EQU CANFD8_CRC, 0x40003B6C // 0x4000 3B6C CANFD8_CRC Bits------------------------------------- .EQU CANFD8_CRC_STUFFCNT3, 31 .EQU CANFD8_CRC_STUFFCNT2, 30 .EQU CANFD8_CRC_STUFFCNT1, 29 .EQU CANFD8_CRC_STUFFCNT0, 28 .EQU CANFD8_CRC_CRC20, 20 .EQU CANFD8_CRC_CRC19, 19 .EQU CANFD8_CRC_CRC18, 18 .EQU CANFD8_CRC_CRC17, 17 .EQU CANFD8_CRC_CRC16, 16 .EQU CANFD8_CRC_CRC15, 15 .EQU CANFD8_CRC_CRC14, 14 .EQU CANFD8_CRC_CRC13, 13 .EQU CANFD8_CRC_CRC12, 12 .EQU CANFD8_CRC_CRC11, 11 .EQU CANFD8_CRC_CRC10, 10 .EQU CANFD8_CRC_CRC9, 9 .EQU CANFD8_CRC_CRC8, 8 .EQU CANFD8_CRC_CRC7, 7 .EQU CANFD8_CRC_CRC6, 6 .EQU CANFD8_CRC_CRC5, 5 .EQU CANFD8_CRC_CRC4, 4 .EQU CANFD8_CRC_CRC3, 3 .EQU CANFD8_CRC_CRC2, 2 .EQU CANFD8_CRC_CRC1, 1 .EQU CANFD8_CRC_CRC0, 0 // register------------------------------------- .EQU CANFD8_CTLR1, 0x40003B74 // 0x4000 3B74 CANFD8_CTLR1 Bits------------------------------------- .EQU CANFD8_CTLR1_TRGMBEN, 31 .EQU CANFD8_CTLR1_TRGMBSEL6, 30 .EQU CANFD8_CTLR1_TRGMBSEL5, 29 .EQU CANFD8_CTLR1_TRGMBSEL4, 28 .EQU CANFD8_CTLR1_TRGMBSEL3, 27 .EQU CANFD8_CTLR1_TRGMBSEL2, 26 .EQU CANFD8_CTLR1_TRGMBSEL1, 25 .EQU CANFD8_CTLR1_TRGMBSEL0, 24 .EQU CANFD8_CTLR1_TRGNUM3, 23 .EQU CANFD8_CTLR1_TRGNUM2, 22 .EQU CANFD8_CTLR1_TRGNUM1, 21 .EQU CANFD8_CTLR1_TRGNUM0, 20 .EQU CANFD8_CTLR1_CKMODE, 19 .EQU CANFD8_CTLR1_BOFFREC, 18 .EQU CANFD8_CTLR1_LBSEL, 17 .EQU CANFD8_CTLR1_ARBSTART, 16 .EQU CANFD8_CTLR1_ARBMS, 15 .EQU CANFD8_CTLR1_MBMSKEN, 14 .EQU CANFD8_CTLR1_MATCHMS, 13 .EQU CANFD8_CTLR1_MBNUM, 12 .EQU CANFD8_CTLR1_TSYN, 11 .EQU CANFD8_CTLR1_FTCLKS, 10 .EQU CANFD8_CTLR1_ST, 9 .EQU CANFD8_CTLR1_RXMUX6, 8 .EQU CANFD8_CTLR1_RXMUX5, 7 .EQU CANFD8_CTLR1_RXMUX4, 6 .EQU CANFD8_CTLR1_RXMUX3, 5 .EQU CANFD8_CTLR1_RXMUX2, 4 .EQU CANFD8_CTLR1_RXMUX1, 3 .EQU CANFD8_CTLR1_RXMUX0, 2 .EQU CANFD8_CTLR1_AMCKS1, 1 .EQU CANFD8_CTLR1_AMCKS0, 0 // register------------------------------------- .EQU CANFD8_AMSTA, 0x40003B78 // 0x4000 3B78 CANFD8_AMSTA Bits------------------------------------- .EQU CANFD8_AMSTA_TXCODE3, 31 .EQU CANFD8_AMSTA_TXCODE2, 30 .EQU CANFD8_AMSTA_TXCODE1, 29 .EQU CANFD8_AMSTA_TXCODE0, 28 .EQU CANFD8_AMSTA_ARBSTA1, 27 .EQU CANFD8_AMSTA_ARBSTA0, 26 .EQU CANFD8_AMSTA_ARBWINNER9, 25 .EQU CANFD8_AMSTA_ARBWINNER8, 24 .EQU CANFD8_AMSTA_ARBWINNER7, 23 .EQU CANFD8_AMSTA_ARBWINNER6, 22 .EQU CANFD8_AMSTA_ARBWINNER5, 21 .EQU CANFD8_AMSTA_ARBWINNER4, 20 .EQU CANFD8_AMSTA_ARBWINNER3, 19 .EQU CANFD8_AMSTA_ARBWINNER2, 18 .EQU CANFD8_AMSTA_ARBWINNER1, 17 .EQU CANFD8_AMSTA_ARBWINNER0, 16 .EQU CANFD8_AMSTA_BETEN, 15 .EQU CANFD8_AMSTA_RTRMEN, 14 .EQU CANFD8_AMSTA_IDSELEN, 13 .EQU CANFD8_AMSTA_RELRXALL, 12 .EQU CANFD8_AMSTA_ROPSTA, 11 .EQU CANFD8_AMSTA_MATSTA, 10 .EQU CANFD8_AMSTA_MATWINNER9, 9 .EQU CANFD8_AMSTA_MATWINNER8, 8 .EQU CANFD8_AMSTA_MATWINNER7, 7 .EQU CANFD8_AMSTA_MATWINNER6, 6 .EQU CANFD8_AMSTA_MATWINNER5, 5 .EQU CANFD8_AMSTA_MATWINNER4, 4 .EQU CANFD8_AMSTA_MATWINNER3, 3 .EQU CANFD8_AMSTA_MATWINNER2, 2 .EQU CANFD8_AMSTA_MATWINNER1, 1 .EQU CANFD8_AMSTA_MATWINNER0, 0 // register------------------------------------- .EQU CANFD8_TXDATA, 0x40003B7C // 0x4000 3B7C CANFD8_TXDATA Bits------------------------------------- .EQU CANFD8_TXDATA_TXDATA31, 31 .EQU CANFD8_TXDATA_TXDATA30, 30 .EQU CANFD8_TXDATA_TXDATA29, 29 .EQU CANFD8_TXDATA_TXDATA28, 28 .EQU CANFD8_TXDATA_TXDATA27, 27 .EQU CANFD8_TXDATA_TXDATA26, 26 .EQU CANFD8_TXDATA_TXDATA25, 25 .EQU CANFD8_TXDATA_TXDATA24, 24 .EQU CANFD8_TXDATA_TXDATA23, 23 .EQU CANFD8_TXDATA_TXDATA22, 22 .EQU CANFD8_TXDATA_TXDATA21, 21 .EQU CANFD8_TXDATA_TXDATA20, 20 .EQU CANFD8_TXDATA_TXDATA19, 19 .EQU CANFD8_TXDATA_TXDATA18, 18 .EQU CANFD8_TXDATA_TXDATA17, 17 .EQU CANFD8_TXDATA_TXDATA16, 16 .EQU CANFD8_TXDATA_TXDATA15, 15 .EQU CANFD8_TXDATA_TXDATA14, 14 .EQU CANFD8_TXDATA_TXDATA13, 13 .EQU CANFD8_TXDATA_TXDATA12, 12 .EQU CANFD8_TXDATA_TXDATA11, 11 .EQU CANFD8_TXDATA_TXDATA10, 10 .EQU CANFD8_TXDATA_TXDATA9, 9 .EQU CANFD8_TXDATA_TXDATA8, 8 .EQU CANFD8_TXDATA_TXDATA7, 7 .EQU CANFD8_TXDATA_TXDATA6, 6 .EQU CANFD8_TXDATA_TXDATA5, 5 .EQU CANFD8_TXDATA_TXDATA4, 4 .EQU CANFD8_TXDATA_TXDATA3, 3 .EQU CANFD8_TXDATA_TXDATA2, 2 .EQU CANFD8_TXDATA_TXDATA1, 1 .EQU CANFD8_TXDATA_TXDATA0, 0 // register------------------------------------- .EQU CANFD9_CTLR0, 0x40003D00 // 0x4000 3D00 CANFD9_CTLR0 Bits------------------------------------- .EQU CANFD9_CTLR0_CANFDEN, 31 .EQU CANFD9_CTLR0_CANRMC6, 30 .EQU CANFD9_CTLR0_CANRMC5, 29 .EQU CANFD9_CTLR0_CANRMC4, 28 .EQU CANFD9_CTLR0_CANRMC3, 27 .EQU CANFD9_CTLR0_CANRMC2, 26 .EQU CANFD9_CTLR0_CANRMC1, 25 .EQU CANFD9_CTLR0_CANRMC0, 24 .EQU CANFD9_CTLR0_BOFF, 23 .EQU CANFD9_CTLR0_CERROR, 22 .EQU CANFD9_CTLR0_TXSTA, 21 .EQU CANFD9_CTLR0_RXSTA, 20 .EQU CANFD9_CTLR0_TCSTA, 19 .EQU CANFD9_CTLR0_DOSTA, 17 .EQU CANFD9_CTLR0_RXBSTA, 16 .EQU CANFD9_CTLR0_ANSWEREN, 15 .EQU CANFD9_CTLR0_FULLRXEN, 14 .EQU CANFD9_CTLR0_MBSIZE1, 13 .EQU CANFD9_CTLR0_MBSIZE0, 12 .EQU CANFD9_CTLR0_RELF, 11 .EQU CANFD9_CTLR0_RELRX, 10 .EQU CANFD9_CTLR0_ATX, 9 .EQU CANFD9_CTLR0_TXR, 8 .EQU CANFD9_CTLR0_CANEN, 7 .EQU CANFD9_CTLR0_CANCKS1, 6 .EQU CANFD9_CTLR0_CANCKS0, 5 .EQU CANFD9_CTLR0_ISOFDCANEN, 4 .EQU CANFD9_CTLR0_SLEEP, 3 .EQU CANFD9_CTLR0_LBACK, 2 .EQU CANFD9_CTLR0_SILENT, 1 .EQU CANFD9_CTLR0_RSMOD, 0 // register------------------------------------- .EQU CANFD9_BRGR, 0x40003D04 // 0x4000 3D04 CANFD9_BRGR Bits------------------------------------- .EQU CANFD9_BRGR_HTSEG2_2, 28 .EQU CANFD9_BRGR_HTSEG2_1, 27 .EQU CANFD9_BRGR_HTSEG2_0, 26 .EQU CANFD9_BRGR_HTSEG1_3, 25 .EQU CANFD9_BRGR_HTSEG1_2, 24 .EQU CANFD9_BRGR_HTSEG1_1, 23 .EQU CANFD9_BRGR_HTSEG1_0, 22 .EQU CANFD9_BRGR_BRSBRP5, 21 .EQU CANFD9_BRGR_BRSBRP4, 20 .EQU CANFD9_BRGR_BRSBRP3, 19 .EQU CANFD9_BRGR_BRSBRP2, 18 .EQU CANFD9_BRGR_BRSBRP1, 17 .EQU CANFD9_BRGR_BRSBRP0, 16 .EQU CANFD9_BRGR_SAM, 15 .EQU CANFD9_BRGR_TSEG2_2, 14 .EQU CANFD9_BRGR_TSEG2_1, 13 .EQU CANFD9_BRGR_TSEG2_0, 12 .EQU CANFD9_BRGR_TSEG1_3, 11 .EQU CANFD9_BRGR_TSEG1_2, 10 .EQU CANFD9_BRGR_TSEG1_1, 9 .EQU CANFD9_BRGR_TSEG1_0, 8 .EQU CANFD9_BRGR_SJW1, 7 .EQU CANFD9_BRGR_SJW0, 6 .EQU CANFD9_BRGR_CANBRP5, 5 .EQU CANFD9_BRGR_CANBRP4, 4 .EQU CANFD9_BRGR_CANBRP3, 3 .EQU CANFD9_BRGR_CANBRP2, 2 .EQU CANFD9_BRGR_CANBRP1, 1 .EQU CANFD9_BRGR_CANBRP0, 0 // register------------------------------------- .EQU CANFD9_RCR, 0x40003D08 // 0x4000 3D08 CANFD9_RCR Bits------------------------------------- .EQU CANFD9_RCR_DPRAMOF, 16 .EQU CANFD9_RCR_CANERRC1, 15 .EQU CANFD9_RCR_CANERRC0, 14 .EQU CANFD9_RCR_CANDIR, 13 .EQU CANFD9_RCR_CANSEG4, 12 .EQU CANFD9_RCR_CANSEG3, 11 .EQU CANFD9_RCR_CANSEG2, 10 .EQU CANFD9_RCR_CANSEG1, 9 .EQU CANFD9_RCR_CANSEG0, 8 .EQU CANFD9_RCR_CANALC4, 4 .EQU CANFD9_RCR_CANALC3, 3 .EQU CANFD9_RCR_CANALC2, 2 .EQU CANFD9_RCR_CANALC1, 1 .EQU CANFD9_RCR_CANALC0, 0 // register------------------------------------- .EQU CANFD9_EROR, 0x40003D0C // 0x4000 3D0C CANFD9_EROR Bits------------------------------------- .EQU CANFD9_EROR_DPRAMFEN, 31 .EQU CANFD9_EROR_SFDMOD, 30 .EQU CANFD9_EROR_SFDEN, 29 .EQU CANFD9_EROR_SOSFD4, 28 .EQU CANFD9_EROR_SOSFD3, 27 .EQU CANFD9_EROR_SOSFD2, 26 .EQU CANFD9_EROR_SOSFD1, 25 .EQU CANFD9_EROR_SOSFD0, 24 .EQU CANFD9_EROR_CANEWL7, 23 .EQU CANFD9_EROR_CANEWL6, 22 .EQU CANFD9_EROR_CANEWL5, 21 .EQU CANFD9_EROR_CANEWL4, 20 .EQU CANFD9_EROR_CANEWL3, 19 .EQU CANFD9_EROR_CANEWL2, 18 .EQU CANFD9_EROR_CANEWL1, 17 .EQU CANFD9_EROR_CANEWL0, 16 .EQU CANFD9_EROR_CANTXE7, 15 .EQU CANFD9_EROR_CANTXE6, 14 .EQU CANFD9_EROR_CANTXE5, 13 .EQU CANFD9_EROR_CANTXE4, 12 .EQU CANFD9_EROR_CANTXE3, 11 .EQU CANFD9_EROR_CANTXE2, 10 .EQU CANFD9_EROR_CANTXE1, 9 .EQU CANFD9_EROR_CANTXE0, 8 .EQU CANFD9_EROR_CANRXE7, 7 .EQU CANFD9_EROR_CANRXE6, 6 .EQU CANFD9_EROR_CANRXE5, 5 .EQU CANFD9_EROR_CANRXE4, 4 .EQU CANFD9_EROR_CANRXE3, 3 .EQU CANFD9_EROR_CANRXE2, 2 .EQU CANFD9_EROR_CANRXE1, 1 .EQU CANFD9_EROR_CANRXE0, 0 // register------------------------------------- .EQU CANFD9_CTLR2, 0x40003D10 // 0x4000 3D10 CANFD9_CTLR2 Bits------------------------------------- .EQU CANFD9_CTLR2_AMCKDIV1, 26 .EQU CANFD9_CTLR2_AMCKDIV0, 25 .EQU CANFD9_CTLR2_DESEL, 24 .EQU CANFD9_CTLR2_TDCVM6, 22 .EQU CANFD9_CTLR2_TDCVM5, 21 .EQU CANFD9_CTLR2_TDCVM4, 20 .EQU CANFD9_CTLR2_TDCVM3, 19 .EQU CANFD9_CTLR2_TDCVM2, 18 .EQU CANFD9_CTLR2_TDCVM1, 17 .EQU CANFD9_CTLR2_TDCVM0, 16 .EQU CANFD9_CTLR2_TDC0_1, 15 .EQU CANFD9_CTLR2_TDC0_0, 14 .EQU CANFD9_CTLR2_TDCSR1, 13 .EQU CANFD9_CTLR2_TDCSR0, 12 .EQU CANFD9_CTLR2_TDCS1, 11 .EQU CANFD9_CTLR2_TDCS0, 10 .EQU CANFD9_CTLR2_TDCAUT0, 9 .EQU CANFD9_CTLR2_TDCEN, 8 .EQU CANFD9_CTLR2_TDC0EN, 7 .EQU CANFD9_CTLR2_TDCV6, 6 .EQU CANFD9_CTLR2_TDCV5, 5 .EQU CANFD9_CTLR2_TDCV4, 4 .EQU CANFD9_CTLR2_TDCV3, 3 .EQU CANFD9_CTLR2_TDCV2, 2 .EQU CANFD9_CTLR2_TDCV1, 1 .EQU CANFD9_CTLR2_TDCV0, 0 // register------------------------------------- .EQU CANFD9_MSKR, 0x40003D14 // 0x4000 3D14 CANFD9_MSKR Bits------------------------------------- .EQU CANFD9_MSKR_MSK31, 31 .EQU CANFD9_MSKR_MSK30, 30 .EQU CANFD9_MSKR_MSK29, 29 .EQU CANFD9_MSKR_MSK28, 28 .EQU CANFD9_MSKR_MSK27, 27 .EQU CANFD9_MSKR_MSK26, 26 .EQU CANFD9_MSKR_MSK25, 25 .EQU CANFD9_MSKR_MSK24, 24 .EQU CANFD9_MSKR_MSK23, 23 .EQU CANFD9_MSKR_MSK22, 22 .EQU CANFD9_MSKR_MSK21, 21 .EQU CANFD9_MSKR_MSK20, 20 .EQU CANFD9_MSKR_MSK19, 19 .EQU CANFD9_MSKR_MSK18, 18 .EQU CANFD9_MSKR_MSK17, 17 .EQU CANFD9_MSKR_MSK16, 16 .EQU CANFD9_MSKR_MSK15, 15 .EQU CANFD9_MSKR_MSK14, 14 .EQU CANFD9_MSKR_MSK13, 13 .EQU CANFD9_MSKR_MSK12, 12 .EQU CANFD9_MSKR_MSK11, 11 .EQU CANFD9_MSKR_MSK10, 10 .EQU CANFD9_MSKR_MSK9, 9 .EQU CANFD9_MSKR_MSK8, 8 .EQU CANFD9_MSKR_MSK7, 7 .EQU CANFD9_MSKR_MSK6, 6 .EQU CANFD9_MSKR_MSK5, 5 .EQU CANFD9_MSKR_MSK4, 4 .EQU CANFD9_MSKR_MSK3, 3 .EQU CANFD9_MSKR_MSK2, 2 .EQU CANFD9_MSKR_MSK1, 1 .EQU CANFD9_MSKR_MSK0, 0 // register------------------------------------- .EQU CANFD9_IER, 0x40003D18 // 0x4000 3D18 CANFD9_IER Bits------------------------------------- .EQU CANFD9_IER_FAILCLR, 31 .EQU CANFD9_IER_LPCANGPIOSEL0, 30 .EQU CANFD9_IER_BOFFIC, 28 .EQU CANFD9_IER_TRGMBIC, 27 .EQU CANFD9_IER_MOENDIC, 26 .EQU CANFD9_IER_BEIC, 23 .EQU CANFD9_IER_ALIC, 22 .EQU CANFD9_IER_ENIC, 21 .EQU CANFD9_IER_WUIC, 20 .EQU CANFD9_IER_DOVFIC, 19 .EQU CANFD9_IER_EAIC, 18 .EQU CANFD9_IER_CANTXIC, 17 .EQU CANFD9_IER_CANRXIC, 16 .EQU CANFD9_IER_MOENDIE, 15 .EQU CANFD9_IER_ARBFAILIE, 14 .EQU CANFD9_IER_BOFFIE, 12 .EQU CANFD9_IER_TRGMBIE, 11 .EQU CANFD9_IER_RXBSTAIE, 10 .EQU CANFD9_IER_CRXDE, 9 .EQU CANFD9_IER_CTXDE, 8 .EQU CANFD9_IER_BEIE, 7 .EQU CANFD9_IER_ALIE, 6 .EQU CANFD9_IER_ENIE, 5 .EQU CANFD9_IER_WUIE, 4 .EQU CANFD9_IER_DOVFIE, 3 .EQU CANFD9_IER_EAIE, 2 .EQU CANFD9_IER_CANTXIE, 1 .EQU CANFD9_IER_CANRXIE, 0 // register------------------------------------- .EQU CANFD9_IFR, 0x40003D1C // 0x4000 3D1C CANFD9_IFR Bits------------------------------------- .EQU CANFD9_IFR_MOENDIF, 14 .EQU CANFD9_IFR_BOFFIF, 12 .EQU CANFD9_IFR_TRGMBIF, 11 .EQU CANFD9_IFR_RXBSTAIF, 10 .EQU CANFD9_IFR_CRXDF, 9 .EQU CANFD9_IFR_CTXDF, 8 .EQU CANFD9_IFR_BEIF, 7 .EQU CANFD9_IFR_ALIF, 6 .EQU CANFD9_IFR_ENIF, 5 .EQU CANFD9_IFR_WUIF, 4 .EQU CANFD9_IFR_DOVFIF, 3 .EQU CANFD9_IFR_EAIF, 2 .EQU CANFD9_IFR_CANTXIF, 1 .EQU CANFD9_IFR_CANRXIF, 0 // register------------------------------------- .EQU CANFD9_RXDATA0, 0x40003D20 // 0x4000 3D20 CANFD9_RXDATA0 Bits------------------------------------- .EQU CANFD9_RXDATA0_RXDATA0_31, 31 .EQU CANFD9_RXDATA0_RXDATA0_30, 30 .EQU CANFD9_RXDATA0_RXDATA0_29, 29 .EQU CANFD9_RXDATA0_RXDATA0_28, 28 .EQU CANFD9_RXDATA0_RXDATA0_27, 27 .EQU CANFD9_RXDATA0_RXDATA0_26, 26 .EQU CANFD9_RXDATA0_RXDATA0_25, 25 .EQU CANFD9_RXDATA0_RXDATA0_24, 24 .EQU CANFD9_RXDATA0_RXDATA0_23, 23 .EQU CANFD9_RXDATA0_RXDATA0_22, 22 .EQU CANFD9_RXDATA0_RXDATA0_21, 21 .EQU CANFD9_RXDATA0_RXDATA0_20, 20 .EQU CANFD9_RXDATA0_RXDATA0_19, 19 .EQU CANFD9_RXDATA0_RXDATA0_18, 18 .EQU CANFD9_RXDATA0_RXDATA0_17, 17 .EQU CANFD9_RXDATA0_RXDATA0_16, 16 .EQU CANFD9_RXDATA0_RXDATA0_15, 15 .EQU CANFD9_RXDATA0_RXDATA0_14, 14 .EQU CANFD9_RXDATA0_RXDATA0_13, 13 .EQU CANFD9_RXDATA0_RXDATA0_12, 12 .EQU CANFD9_RXDATA0_RXDATA0_11, 11 .EQU CANFD9_RXDATA0_RXDATA0_10, 10 .EQU CANFD9_RXDATA0_RXDATA0_9, 9 .EQU CANFD9_RXDATA0_RXDATA0_8, 8 .EQU CANFD9_RXDATA0_RXDATA0_7, 7 .EQU CANFD9_RXDATA0_RXDATA0_6, 6 .EQU CANFD9_RXDATA0_RXDATA0_5, 5 .EQU CANFD9_RXDATA0_RXDATA0_4, 4 .EQU CANFD9_RXDATA0_RXDATA0_3, 3 .EQU CANFD9_RXDATA0_RXDATA0_2, 2 .EQU CANFD9_RXDATA0_RXDATA0_1, 1 .EQU CANFD9_RXDATA0_RXDATA0_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA1, 0x40003D24 // 0x4000 3D24 CANFD9_RXDATA1 Bits------------------------------------- .EQU CANFD9_RXDATA1_RXDATA1_31, 31 .EQU CANFD9_RXDATA1_RXDATA1_30, 30 .EQU CANFD9_RXDATA1_RXDATA1_29, 29 .EQU CANFD9_RXDATA1_RXDATA1_28, 28 .EQU CANFD9_RXDATA1_RXDATA1_27, 27 .EQU CANFD9_RXDATA1_RXDATA1_26, 26 .EQU CANFD9_RXDATA1_RXDATA1_25, 25 .EQU CANFD9_RXDATA1_RXDATA1_24, 24 .EQU CANFD9_RXDATA1_RXDATA1_23, 23 .EQU CANFD9_RXDATA1_RXDATA1_22, 22 .EQU CANFD9_RXDATA1_RXDATA1_21, 21 .EQU CANFD9_RXDATA1_RXDATA1_20, 20 .EQU CANFD9_RXDATA1_RXDATA1_19, 19 .EQU CANFD9_RXDATA1_RXDATA1_18, 18 .EQU CANFD9_RXDATA1_RXDATA1_17, 17 .EQU CANFD9_RXDATA1_RXDATA1_16, 16 .EQU CANFD9_RXDATA1_RXDATA1_15, 15 .EQU CANFD9_RXDATA1_RXDATA1_14, 14 .EQU CANFD9_RXDATA1_RXDATA1_13, 13 .EQU CANFD9_RXDATA1_RXDATA1_12, 12 .EQU CANFD9_RXDATA1_RXDATA1_11, 11 .EQU CANFD9_RXDATA1_RXDATA1_10, 10 .EQU CANFD9_RXDATA1_RXDATA1_9, 9 .EQU CANFD9_RXDATA1_RXDATA1_8, 8 .EQU CANFD9_RXDATA1_RXDATA1_7, 7 .EQU CANFD9_RXDATA1_RXDATA1_6, 6 .EQU CANFD9_RXDATA1_RXDATA1_5, 5 .EQU CANFD9_RXDATA1_RXDATA1_4, 4 .EQU CANFD9_RXDATA1_RXDATA1_3, 3 .EQU CANFD9_RXDATA1_RXDATA1_2, 2 .EQU CANFD9_RXDATA1_RXDATA1_1, 1 .EQU CANFD9_RXDATA1_RXDATA1_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA2, 0x40003D28 // 0x4000 3D28 CANFD9_RXDATA2 Bits------------------------------------- .EQU CANFD9_RXDATA2_RXDATA2_31, 31 .EQU CANFD9_RXDATA2_RXDATA2_30, 30 .EQU CANFD9_RXDATA2_RXDATA2_29, 29 .EQU CANFD9_RXDATA2_RXDATA2_28, 28 .EQU CANFD9_RXDATA2_RXDATA2_27, 27 .EQU CANFD9_RXDATA2_RXDATA2_26, 26 .EQU CANFD9_RXDATA2_RXDATA2_25, 25 .EQU CANFD9_RXDATA2_RXDATA2_24, 24 .EQU CANFD9_RXDATA2_RXDATA2_23, 23 .EQU CANFD9_RXDATA2_RXDATA2_22, 22 .EQU CANFD9_RXDATA2_RXDATA2_21, 21 .EQU CANFD9_RXDATA2_RXDATA2_20, 20 .EQU CANFD9_RXDATA2_RXDATA2_19, 19 .EQU CANFD9_RXDATA2_RXDATA2_18, 18 .EQU CANFD9_RXDATA2_RXDATA2_17, 17 .EQU CANFD9_RXDATA2_RXDATA2_16, 16 .EQU CANFD9_RXDATA2_RXDATA2_15, 15 .EQU CANFD9_RXDATA2_RXDATA2_14, 14 .EQU CANFD9_RXDATA2_RXDATA2_13, 13 .EQU CANFD9_RXDATA2_RXDATA2_12, 12 .EQU CANFD9_RXDATA2_RXDATA2_11, 11 .EQU CANFD9_RXDATA2_RXDATA2_10, 10 .EQU CANFD9_RXDATA2_RXDATA2_9, 9 .EQU CANFD9_RXDATA2_RXDATA2_8, 8 .EQU CANFD9_RXDATA2_RXDATA2_7, 7 .EQU CANFD9_RXDATA2_RXDATA2_6, 6 .EQU CANFD9_RXDATA2_RXDATA2_5, 5 .EQU CANFD9_RXDATA2_RXDATA2_4, 4 .EQU CANFD9_RXDATA2_RXDATA2_3, 3 .EQU CANFD9_RXDATA2_RXDATA2_2, 2 .EQU CANFD9_RXDATA2_RXDATA2_1, 1 .EQU CANFD9_RXDATA2_RXDATA2_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA3, 0x40003D2C // 0x4000 3D2C CANFD9_RXDATA3 Bits------------------------------------- .EQU CANFD9_RXDATA3_RXDATA3_31, 31 .EQU CANFD9_RXDATA3_RXDATA3_30, 30 .EQU CANFD9_RXDATA3_RXDATA3_29, 29 .EQU CANFD9_RXDATA3_RXDATA3_28, 28 .EQU CANFD9_RXDATA3_RXDATA3_27, 27 .EQU CANFD9_RXDATA3_RXDATA3_26, 26 .EQU CANFD9_RXDATA3_RXDATA3_25, 25 .EQU CANFD9_RXDATA3_RXDATA3_24, 24 .EQU CANFD9_RXDATA3_RXDATA3_23, 23 .EQU CANFD9_RXDATA3_RXDATA3_22, 22 .EQU CANFD9_RXDATA3_RXDATA3_21, 21 .EQU CANFD9_RXDATA3_RXDATA3_20, 20 .EQU CANFD9_RXDATA3_RXDATA3_19, 19 .EQU CANFD9_RXDATA3_RXDATA3_18, 18 .EQU CANFD9_RXDATA3_RXDATA3_17, 17 .EQU CANFD9_RXDATA3_RXDATA3_16, 16 .EQU CANFD9_RXDATA3_RXDATA3_15, 15 .EQU CANFD9_RXDATA3_RXDATA3_14, 14 .EQU CANFD9_RXDATA3_RXDATA3_13, 13 .EQU CANFD9_RXDATA3_RXDATA3_12, 12 .EQU CANFD9_RXDATA3_RXDATA3_11, 11 .EQU CANFD9_RXDATA3_RXDATA3_10, 10 .EQU CANFD9_RXDATA3_RXDATA3_9, 9 .EQU CANFD9_RXDATA3_RXDATA3_8, 8 .EQU CANFD9_RXDATA3_RXDATA3_7, 7 .EQU CANFD9_RXDATA3_RXDATA3_6, 6 .EQU CANFD9_RXDATA3_RXDATA3_5, 5 .EQU CANFD9_RXDATA3_RXDATA3_4, 4 .EQU CANFD9_RXDATA3_RXDATA3_3, 3 .EQU CANFD9_RXDATA3_RXDATA3_2, 2 .EQU CANFD9_RXDATA3_RXDATA3_1, 1 .EQU CANFD9_RXDATA3_RXDATA3_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA4, 0x40003D30 // 0x4000 3D30 CANFD9_RXDATA4 Bits------------------------------------- .EQU CANFD9_RXDATA4_RXDATA4_31, 31 .EQU CANFD9_RXDATA4_RXDATA4_30, 30 .EQU CANFD9_RXDATA4_RXDATA4_29, 29 .EQU CANFD9_RXDATA4_RXDATA4_28, 28 .EQU CANFD9_RXDATA4_RXDATA4_27, 27 .EQU CANFD9_RXDATA4_RXDATA4_26, 26 .EQU CANFD9_RXDATA4_RXDATA4_25, 25 .EQU CANFD9_RXDATA4_RXDATA4_24, 24 .EQU CANFD9_RXDATA4_RXDATA4_23, 23 .EQU CANFD9_RXDATA4_RXDATA4_22, 22 .EQU CANFD9_RXDATA4_RXDATA4_21, 21 .EQU CANFD9_RXDATA4_RXDATA4_20, 20 .EQU CANFD9_RXDATA4_RXDATA4_19, 19 .EQU CANFD9_RXDATA4_RXDATA4_18, 18 .EQU CANFD9_RXDATA4_RXDATA4_17, 17 .EQU CANFD9_RXDATA4_RXDATA4_16, 16 .EQU CANFD9_RXDATA4_RXDATA4_15, 15 .EQU CANFD9_RXDATA4_RXDATA4_14, 14 .EQU CANFD9_RXDATA4_RXDATA4_13, 13 .EQU CANFD9_RXDATA4_RXDATA4_12, 12 .EQU CANFD9_RXDATA4_RXDATA4_11, 11 .EQU CANFD9_RXDATA4_RXDATA4_10, 10 .EQU CANFD9_RXDATA4_RXDATA4_9, 9 .EQU CANFD9_RXDATA4_RXDATA4_8, 8 .EQU CANFD9_RXDATA4_RXDATA4_7, 7 .EQU CANFD9_RXDATA4_RXDATA4_6, 6 .EQU CANFD9_RXDATA4_RXDATA4_5, 5 .EQU CANFD9_RXDATA4_RXDATA4_4, 4 .EQU CANFD9_RXDATA4_RXDATA4_3, 3 .EQU CANFD9_RXDATA4_RXDATA4_2, 2 .EQU CANFD9_RXDATA4_RXDATA4_1, 1 .EQU CANFD9_RXDATA4_RXDATA4_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA5, 0x40003D34 // 0x4000 3D34 CANFD9_RXDATA5 Bits------------------------------------- .EQU CANFD9_RXDATA5_RXDATA5_31, 31 .EQU CANFD9_RXDATA5_RXDATA5_30, 30 .EQU CANFD9_RXDATA5_RXDATA5_29, 29 .EQU CANFD9_RXDATA5_RXDATA5_28, 28 .EQU CANFD9_RXDATA5_RXDATA5_27, 27 .EQU CANFD9_RXDATA5_RXDATA5_26, 26 .EQU CANFD9_RXDATA5_RXDATA5_25, 25 .EQU CANFD9_RXDATA5_RXDATA5_24, 24 .EQU CANFD9_RXDATA5_RXDATA5_23, 23 .EQU CANFD9_RXDATA5_RXDATA5_22, 22 .EQU CANFD9_RXDATA5_RXDATA5_21, 21 .EQU CANFD9_RXDATA5_RXDATA5_20, 20 .EQU CANFD9_RXDATA5_RXDATA5_19, 19 .EQU CANFD9_RXDATA5_RXDATA5_18, 18 .EQU CANFD9_RXDATA5_RXDATA5_17, 17 .EQU CANFD9_RXDATA5_RXDATA5_16, 16 .EQU CANFD9_RXDATA5_RXDATA5_15, 15 .EQU CANFD9_RXDATA5_RXDATA5_14, 14 .EQU CANFD9_RXDATA5_RXDATA5_13, 13 .EQU CANFD9_RXDATA5_RXDATA5_12, 12 .EQU CANFD9_RXDATA5_RXDATA5_11, 11 .EQU CANFD9_RXDATA5_RXDATA5_10, 10 .EQU CANFD9_RXDATA5_RXDATA5_9, 9 .EQU CANFD9_RXDATA5_RXDATA5_8, 8 .EQU CANFD9_RXDATA5_RXDATA5_7, 7 .EQU CANFD9_RXDATA5_RXDATA5_6, 6 .EQU CANFD9_RXDATA5_RXDATA5_5, 5 .EQU CANFD9_RXDATA5_RXDATA5_4, 4 .EQU CANFD9_RXDATA5_RXDATA5_3, 3 .EQU CANFD9_RXDATA5_RXDATA5_2, 2 .EQU CANFD9_RXDATA5_RXDATA5_1, 1 .EQU CANFD9_RXDATA5_RXDATA5_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA6, 0x40003D38 // 0x4000 3D38 CANFD9_RXDATA6 Bits------------------------------------- .EQU CANFD9_RXDATA6_RXDATA6_31, 31 .EQU CANFD9_RXDATA6_RXDATA6_30, 30 .EQU CANFD9_RXDATA6_RXDATA6_29, 29 .EQU CANFD9_RXDATA6_RXDATA6_28, 28 .EQU CANFD9_RXDATA6_RXDATA6_27, 27 .EQU CANFD9_RXDATA6_RXDATA6_26, 26 .EQU CANFD9_RXDATA6_RXDATA6_25, 25 .EQU CANFD9_RXDATA6_RXDATA6_24, 24 .EQU CANFD9_RXDATA6_RXDATA6_23, 23 .EQU CANFD9_RXDATA6_RXDATA6_22, 22 .EQU CANFD9_RXDATA6_RXDATA6_21, 21 .EQU CANFD9_RXDATA6_RXDATA6_20, 20 .EQU CANFD9_RXDATA6_RXDATA6_19, 19 .EQU CANFD9_RXDATA6_RXDATA6_18, 18 .EQU CANFD9_RXDATA6_RXDATA6_17, 17 .EQU CANFD9_RXDATA6_RXDATA6_16, 16 .EQU CANFD9_RXDATA6_RXDATA6_15, 15 .EQU CANFD9_RXDATA6_RXDATA6_14, 14 .EQU CANFD9_RXDATA6_RXDATA6_13, 13 .EQU CANFD9_RXDATA6_RXDATA6_12, 12 .EQU CANFD9_RXDATA6_RXDATA6_11, 11 .EQU CANFD9_RXDATA6_RXDATA6_10, 10 .EQU CANFD9_RXDATA6_RXDATA6_9, 9 .EQU CANFD9_RXDATA6_RXDATA6_8, 8 .EQU CANFD9_RXDATA6_RXDATA6_7, 7 .EQU CANFD9_RXDATA6_RXDATA6_6, 6 .EQU CANFD9_RXDATA6_RXDATA6_5, 5 .EQU CANFD9_RXDATA6_RXDATA6_4, 4 .EQU CANFD9_RXDATA6_RXDATA6_3, 3 .EQU CANFD9_RXDATA6_RXDATA6_2, 2 .EQU CANFD9_RXDATA6_RXDATA6_1, 1 .EQU CANFD9_RXDATA6_RXDATA6_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA7, 0x40003D3C // 0x4000 3D3C CANFD9_RXDATA7 Bits------------------------------------- .EQU CANFD9_RXDATA7_RXDATA7_31, 31 .EQU CANFD9_RXDATA7_RXDATA7_30, 30 .EQU CANFD9_RXDATA7_RXDATA7_29, 29 .EQU CANFD9_RXDATA7_RXDATA7_28, 28 .EQU CANFD9_RXDATA7_RXDATA7_27, 27 .EQU CANFD9_RXDATA7_RXDATA7_26, 26 .EQU CANFD9_RXDATA7_RXDATA7_25, 25 .EQU CANFD9_RXDATA7_RXDATA7_24, 24 .EQU CANFD9_RXDATA7_RXDATA7_23, 23 .EQU CANFD9_RXDATA7_RXDATA7_22, 22 .EQU CANFD9_RXDATA7_RXDATA7_21, 21 .EQU CANFD9_RXDATA7_RXDATA7_20, 20 .EQU CANFD9_RXDATA7_RXDATA7_19, 19 .EQU CANFD9_RXDATA7_RXDATA7_18, 18 .EQU CANFD9_RXDATA7_RXDATA7_17, 17 .EQU CANFD9_RXDATA7_RXDATA7_16, 16 .EQU CANFD9_RXDATA7_RXDATA7_15, 15 .EQU CANFD9_RXDATA7_RXDATA7_14, 14 .EQU CANFD9_RXDATA7_RXDATA7_13, 13 .EQU CANFD9_RXDATA7_RXDATA7_12, 12 .EQU CANFD9_RXDATA7_RXDATA7_11, 11 .EQU CANFD9_RXDATA7_RXDATA7_10, 10 .EQU CANFD9_RXDATA7_RXDATA7_9, 9 .EQU CANFD9_RXDATA7_RXDATA7_8, 8 .EQU CANFD9_RXDATA7_RXDATA7_7, 7 .EQU CANFD9_RXDATA7_RXDATA7_6, 6 .EQU CANFD9_RXDATA7_RXDATA7_5, 5 .EQU CANFD9_RXDATA7_RXDATA7_4, 4 .EQU CANFD9_RXDATA7_RXDATA7_3, 3 .EQU CANFD9_RXDATA7_RXDATA7_2, 2 .EQU CANFD9_RXDATA7_RXDATA7_1, 1 .EQU CANFD9_RXDATA7_RXDATA7_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA8, 0x40003D40 // 0x4000 3D40 CANFD9_RXDATA8 Bits------------------------------------- .EQU CANFD9_RXDATA8_RXDATA8_31, 31 .EQU CANFD9_RXDATA8_RXDATA8_30, 30 .EQU CANFD9_RXDATA8_RXDATA8_29, 29 .EQU CANFD9_RXDATA8_RXDATA8_28, 28 .EQU CANFD9_RXDATA8_RXDATA8_27, 27 .EQU CANFD9_RXDATA8_RXDATA8_26, 26 .EQU CANFD9_RXDATA8_RXDATA8_25, 25 .EQU CANFD9_RXDATA8_RXDATA8_24, 24 .EQU CANFD9_RXDATA8_RXDATA8_23, 23 .EQU CANFD9_RXDATA8_RXDATA8_22, 22 .EQU CANFD9_RXDATA8_RXDATA8_21, 21 .EQU CANFD9_RXDATA8_RXDATA8_20, 20 .EQU CANFD9_RXDATA8_RXDATA8_19, 19 .EQU CANFD9_RXDATA8_RXDATA8_18, 18 .EQU CANFD9_RXDATA8_RXDATA8_17, 17 .EQU CANFD9_RXDATA8_RXDATA8_16, 16 .EQU CANFD9_RXDATA8_RXDATA8_15, 15 .EQU CANFD9_RXDATA8_RXDATA8_14, 14 .EQU CANFD9_RXDATA8_RXDATA8_13, 13 .EQU CANFD9_RXDATA8_RXDATA8_12, 12 .EQU CANFD9_RXDATA8_RXDATA8_11, 11 .EQU CANFD9_RXDATA8_RXDATA8_10, 10 .EQU CANFD9_RXDATA8_RXDATA8_9, 9 .EQU CANFD9_RXDATA8_RXDATA8_8, 8 .EQU CANFD9_RXDATA8_RXDATA8_7, 7 .EQU CANFD9_RXDATA8_RXDATA8_6, 6 .EQU CANFD9_RXDATA8_RXDATA8_5, 5 .EQU CANFD9_RXDATA8_RXDATA8_4, 4 .EQU CANFD9_RXDATA8_RXDATA8_3, 3 .EQU CANFD9_RXDATA8_RXDATA8_2, 2 .EQU CANFD9_RXDATA8_RXDATA8_1, 1 .EQU CANFD9_RXDATA8_RXDATA8_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA9, 0x40003D44 // 0x4000 3D44 CANFD9_RXDATA9 Bits------------------------------------- .EQU CANFD9_RXDATA9_RXDATA9_31, 31 .EQU CANFD9_RXDATA9_RXDATA9_30, 30 .EQU CANFD9_RXDATA9_RXDATA9_29, 29 .EQU CANFD9_RXDATA9_RXDATA9_28, 28 .EQU CANFD9_RXDATA9_RXDATA9_27, 27 .EQU CANFD9_RXDATA9_RXDATA9_26, 26 .EQU CANFD9_RXDATA9_RXDATA9_25, 25 .EQU CANFD9_RXDATA9_RXDATA9_24, 24 .EQU CANFD9_RXDATA9_RXDATA9_23, 23 .EQU CANFD9_RXDATA9_RXDATA9_22, 22 .EQU CANFD9_RXDATA9_RXDATA9_21, 21 .EQU CANFD9_RXDATA9_RXDATA9_20, 20 .EQU CANFD9_RXDATA9_RXDATA9_19, 19 .EQU CANFD9_RXDATA9_RXDATA9_18, 18 .EQU CANFD9_RXDATA9_RXDATA9_17, 17 .EQU CANFD9_RXDATA9_RXDATA9_16, 16 .EQU CANFD9_RXDATA9_RXDATA9_15, 15 .EQU CANFD9_RXDATA9_RXDATA9_14, 14 .EQU CANFD9_RXDATA9_RXDATA9_13, 13 .EQU CANFD9_RXDATA9_RXDATA9_12, 12 .EQU CANFD9_RXDATA9_RXDATA9_11, 11 .EQU CANFD9_RXDATA9_RXDATA9_10, 10 .EQU CANFD9_RXDATA9_RXDATA9_9, 9 .EQU CANFD9_RXDATA9_RXDATA9_8, 8 .EQU CANFD9_RXDATA9_RXDATA9_7, 7 .EQU CANFD9_RXDATA9_RXDATA9_6, 6 .EQU CANFD9_RXDATA9_RXDATA9_5, 5 .EQU CANFD9_RXDATA9_RXDATA9_4, 4 .EQU CANFD9_RXDATA9_RXDATA9_3, 3 .EQU CANFD9_RXDATA9_RXDATA9_2, 2 .EQU CANFD9_RXDATA9_RXDATA9_1, 1 .EQU CANFD9_RXDATA9_RXDATA9_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA10, 0x40003D48 // 0x4000 3D48 CANFD9_RXDATA10 Bits------------------------------------- .EQU CANFD9_RXDATA10_RXDATA10_31, 31 .EQU CANFD9_RXDATA10_RXDATA10_30, 30 .EQU CANFD9_RXDATA10_RXDATA10_29, 29 .EQU CANFD9_RXDATA10_RXDATA10_28, 28 .EQU CANFD9_RXDATA10_RXDATA10_27, 27 .EQU CANFD9_RXDATA10_RXDATA10_26, 26 .EQU CANFD9_RXDATA10_RXDATA10_25, 25 .EQU CANFD9_RXDATA10_RXDATA10_24, 24 .EQU CANFD9_RXDATA10_RXDATA10_23, 23 .EQU CANFD9_RXDATA10_RXDATA10_22, 22 .EQU CANFD9_RXDATA10_RXDATA10_21, 21 .EQU CANFD9_RXDATA10_RXDATA10_20, 20 .EQU CANFD9_RXDATA10_RXDATA10_19, 19 .EQU CANFD9_RXDATA10_RXDATA10_18, 18 .EQU CANFD9_RXDATA10_RXDATA10_17, 17 .EQU CANFD9_RXDATA10_RXDATA10_16, 16 .EQU CANFD9_RXDATA10_RXDATA10_15, 15 .EQU CANFD9_RXDATA10_RXDATA10_14, 14 .EQU CANFD9_RXDATA10_RXDATA10_13, 13 .EQU CANFD9_RXDATA10_RXDATA10_12, 12 .EQU CANFD9_RXDATA10_RXDATA10_11, 11 .EQU CANFD9_RXDATA10_RXDATA10_10, 10 .EQU CANFD9_RXDATA10_RXDATA10_9, 9 .EQU CANFD9_RXDATA10_RXDATA10_8, 8 .EQU CANFD9_RXDATA10_RXDATA10_7, 7 .EQU CANFD9_RXDATA10_RXDATA10_6, 6 .EQU CANFD9_RXDATA10_RXDATA10_5, 5 .EQU CANFD9_RXDATA10_RXDATA10_4, 4 .EQU CANFD9_RXDATA10_RXDATA10_3, 3 .EQU CANFD9_RXDATA10_RXDATA10_2, 2 .EQU CANFD9_RXDATA10_RXDATA10_1, 1 .EQU CANFD9_RXDATA10_RXDATA10_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA11, 0x40003D4C // 0x4000 3D4C CANFD9_RXDATA11 Bits------------------------------------- .EQU CANFD9_RXDATA11_RXDATA11_31, 31 .EQU CANFD9_RXDATA11_RXDATA11_30, 30 .EQU CANFD9_RXDATA11_RXDATA11_29, 29 .EQU CANFD9_RXDATA11_RXDATA11_28, 28 .EQU CANFD9_RXDATA11_RXDATA11_27, 27 .EQU CANFD9_RXDATA11_RXDATA11_26, 26 .EQU CANFD9_RXDATA11_RXDATA11_25, 25 .EQU CANFD9_RXDATA11_RXDATA11_24, 24 .EQU CANFD9_RXDATA11_RXDATA11_23, 23 .EQU CANFD9_RXDATA11_RXDATA11_22, 22 .EQU CANFD9_RXDATA11_RXDATA11_21, 21 .EQU CANFD9_RXDATA11_RXDATA11_20, 20 .EQU CANFD9_RXDATA11_RXDATA11_19, 19 .EQU CANFD9_RXDATA11_RXDATA11_18, 18 .EQU CANFD9_RXDATA11_RXDATA11_17, 17 .EQU CANFD9_RXDATA11_RXDATA11_16, 16 .EQU CANFD9_RXDATA11_RXDATA11_15, 15 .EQU CANFD9_RXDATA11_RXDATA11_14, 14 .EQU CANFD9_RXDATA11_RXDATA11_13, 13 .EQU CANFD9_RXDATA11_RXDATA11_12, 12 .EQU CANFD9_RXDATA11_RXDATA11_11, 11 .EQU CANFD9_RXDATA11_RXDATA11_10, 10 .EQU CANFD9_RXDATA11_RXDATA11_9, 9 .EQU CANFD9_RXDATA11_RXDATA11_8, 8 .EQU CANFD9_RXDATA11_RXDATA11_7, 7 .EQU CANFD9_RXDATA11_RXDATA11_6, 6 .EQU CANFD9_RXDATA11_RXDATA11_5, 5 .EQU CANFD9_RXDATA11_RXDATA11_4, 4 .EQU CANFD9_RXDATA11_RXDATA11_3, 3 .EQU CANFD9_RXDATA11_RXDATA11_2, 2 .EQU CANFD9_RXDATA11_RXDATA11_1, 1 .EQU CANFD9_RXDATA11_RXDATA11_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA12, 0x40003D50 // 0x4000 3D50 CANFD9_RXDATA12 Bits------------------------------------- .EQU CANFD9_RXDATA12_RXDATA12_31, 31 .EQU CANFD9_RXDATA12_RXDATA12_30, 30 .EQU CANFD9_RXDATA12_RXDATA12_29, 29 .EQU CANFD9_RXDATA12_RXDATA12_28, 28 .EQU CANFD9_RXDATA12_RXDATA12_27, 27 .EQU CANFD9_RXDATA12_RXDATA12_26, 26 .EQU CANFD9_RXDATA12_RXDATA12_25, 25 .EQU CANFD9_RXDATA12_RXDATA12_24, 24 .EQU CANFD9_RXDATA12_RXDATA12_23, 23 .EQU CANFD9_RXDATA12_RXDATA12_22, 22 .EQU CANFD9_RXDATA12_RXDATA12_21, 21 .EQU CANFD9_RXDATA12_RXDATA12_20, 20 .EQU CANFD9_RXDATA12_RXDATA12_19, 19 .EQU CANFD9_RXDATA12_RXDATA12_18, 18 .EQU CANFD9_RXDATA12_RXDATA12_17, 17 .EQU CANFD9_RXDATA12_RXDATA12_16, 16 .EQU CANFD9_RXDATA12_RXDATA12_15, 15 .EQU CANFD9_RXDATA12_RXDATA12_14, 14 .EQU CANFD9_RXDATA12_RXDATA12_13, 13 .EQU CANFD9_RXDATA12_RXDATA12_12, 12 .EQU CANFD9_RXDATA12_RXDATA12_11, 11 .EQU CANFD9_RXDATA12_RXDATA12_10, 10 .EQU CANFD9_RXDATA12_RXDATA12_9, 9 .EQU CANFD9_RXDATA12_RXDATA12_8, 8 .EQU CANFD9_RXDATA12_RXDATA12_7, 7 .EQU CANFD9_RXDATA12_RXDATA12_6, 6 .EQU CANFD9_RXDATA12_RXDATA12_5, 5 .EQU CANFD9_RXDATA12_RXDATA12_4, 4 .EQU CANFD9_RXDATA12_RXDATA12_3, 3 .EQU CANFD9_RXDATA12_RXDATA12_2, 2 .EQU CANFD9_RXDATA12_RXDATA12_1, 1 .EQU CANFD9_RXDATA12_RXDATA12_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA13, 0x40003D54 // 0x4000 3D54 CANFD9_RXDATA13 Bits------------------------------------- .EQU CANFD9_RXDATA13_RXDATA13_31, 31 .EQU CANFD9_RXDATA13_RXDATA13_30, 30 .EQU CANFD9_RXDATA13_RXDATA13_29, 29 .EQU CANFD9_RXDATA13_RXDATA13_28, 28 .EQU CANFD9_RXDATA13_RXDATA13_27, 27 .EQU CANFD9_RXDATA13_RXDATA13_26, 26 .EQU CANFD9_RXDATA13_RXDATA13_25, 25 .EQU CANFD9_RXDATA13_RXDATA13_24, 24 .EQU CANFD9_RXDATA13_RXDATA13_23, 23 .EQU CANFD9_RXDATA13_RXDATA13_22, 22 .EQU CANFD9_RXDATA13_RXDATA13_21, 21 .EQU CANFD9_RXDATA13_RXDATA13_20, 20 .EQU CANFD9_RXDATA13_RXDATA13_19, 19 .EQU CANFD9_RXDATA13_RXDATA13_18, 18 .EQU CANFD9_RXDATA13_RXDATA13_17, 17 .EQU CANFD9_RXDATA13_RXDATA13_16, 16 .EQU CANFD9_RXDATA13_RXDATA13_15, 15 .EQU CANFD9_RXDATA13_RXDATA13_14, 14 .EQU CANFD9_RXDATA13_RXDATA13_13, 13 .EQU CANFD9_RXDATA13_RXDATA13_12, 12 .EQU CANFD9_RXDATA13_RXDATA13_11, 11 .EQU CANFD9_RXDATA13_RXDATA13_10, 10 .EQU CANFD9_RXDATA13_RXDATA13_9, 9 .EQU CANFD9_RXDATA13_RXDATA13_8, 8 .EQU CANFD9_RXDATA13_RXDATA13_7, 7 .EQU CANFD9_RXDATA13_RXDATA13_6, 6 .EQU CANFD9_RXDATA13_RXDATA13_5, 5 .EQU CANFD9_RXDATA13_RXDATA13_4, 4 .EQU CANFD9_RXDATA13_RXDATA13_3, 3 .EQU CANFD9_RXDATA13_RXDATA13_2, 2 .EQU CANFD9_RXDATA13_RXDATA13_1, 1 .EQU CANFD9_RXDATA13_RXDATA13_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA14, 0x40003D58 // 0x4000 3D58 CANFD9_RXDATA14 Bits------------------------------------- .EQU CANFD9_RXDATA14_RXDATA14_31, 31 .EQU CANFD9_RXDATA14_RXDATA14_30, 30 .EQU CANFD9_RXDATA14_RXDATA14_29, 29 .EQU CANFD9_RXDATA14_RXDATA14_28, 28 .EQU CANFD9_RXDATA14_RXDATA14_27, 27 .EQU CANFD9_RXDATA14_RXDATA14_26, 26 .EQU CANFD9_RXDATA14_RXDATA14_25, 25 .EQU CANFD9_RXDATA14_RXDATA14_24, 24 .EQU CANFD9_RXDATA14_RXDATA14_23, 23 .EQU CANFD9_RXDATA14_RXDATA14_22, 22 .EQU CANFD9_RXDATA14_RXDATA14_21, 21 .EQU CANFD9_RXDATA14_RXDATA14_20, 20 .EQU CANFD9_RXDATA14_RXDATA14_19, 19 .EQU CANFD9_RXDATA14_RXDATA14_18, 18 .EQU CANFD9_RXDATA14_RXDATA14_17, 17 .EQU CANFD9_RXDATA14_RXDATA14_16, 16 .EQU CANFD9_RXDATA14_RXDATA14_15, 15 .EQU CANFD9_RXDATA14_RXDATA14_14, 14 .EQU CANFD9_RXDATA14_RXDATA14_13, 13 .EQU CANFD9_RXDATA14_RXDATA14_12, 12 .EQU CANFD9_RXDATA14_RXDATA14_11, 11 .EQU CANFD9_RXDATA14_RXDATA14_10, 10 .EQU CANFD9_RXDATA14_RXDATA14_9, 9 .EQU CANFD9_RXDATA14_RXDATA14_8, 8 .EQU CANFD9_RXDATA14_RXDATA14_7, 7 .EQU CANFD9_RXDATA14_RXDATA14_6, 6 .EQU CANFD9_RXDATA14_RXDATA14_5, 5 .EQU CANFD9_RXDATA14_RXDATA14_4, 4 .EQU CANFD9_RXDATA14_RXDATA14_3, 3 .EQU CANFD9_RXDATA14_RXDATA14_2, 2 .EQU CANFD9_RXDATA14_RXDATA14_1, 1 .EQU CANFD9_RXDATA14_RXDATA14_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA15, 0x40003D5C // 0x4000 3D5C CANFD9_RXDATA15 Bits------------------------------------- .EQU CANFD9_RXDATA15_RXDATA15_31, 31 .EQU CANFD9_RXDATA15_RXDATA15_30, 30 .EQU CANFD9_RXDATA15_RXDATA15_29, 29 .EQU CANFD9_RXDATA15_RXDATA15_28, 28 .EQU CANFD9_RXDATA15_RXDATA15_27, 27 .EQU CANFD9_RXDATA15_RXDATA15_26, 26 .EQU CANFD9_RXDATA15_RXDATA15_25, 25 .EQU CANFD9_RXDATA15_RXDATA15_24, 24 .EQU CANFD9_RXDATA15_RXDATA15_23, 23 .EQU CANFD9_RXDATA15_RXDATA15_22, 22 .EQU CANFD9_RXDATA15_RXDATA15_21, 21 .EQU CANFD9_RXDATA15_RXDATA15_20, 20 .EQU CANFD9_RXDATA15_RXDATA15_19, 19 .EQU CANFD9_RXDATA15_RXDATA15_18, 18 .EQU CANFD9_RXDATA15_RXDATA15_17, 17 .EQU CANFD9_RXDATA15_RXDATA15_16, 16 .EQU CANFD9_RXDATA15_RXDATA15_15, 15 .EQU CANFD9_RXDATA15_RXDATA15_14, 14 .EQU CANFD9_RXDATA15_RXDATA15_13, 13 .EQU CANFD9_RXDATA15_RXDATA15_12, 12 .EQU CANFD9_RXDATA15_RXDATA15_11, 11 .EQU CANFD9_RXDATA15_RXDATA15_10, 10 .EQU CANFD9_RXDATA15_RXDATA15_9, 9 .EQU CANFD9_RXDATA15_RXDATA15_8, 8 .EQU CANFD9_RXDATA15_RXDATA15_7, 7 .EQU CANFD9_RXDATA15_RXDATA15_6, 6 .EQU CANFD9_RXDATA15_RXDATA15_5, 5 .EQU CANFD9_RXDATA15_RXDATA15_4, 4 .EQU CANFD9_RXDATA15_RXDATA15_3, 3 .EQU CANFD9_RXDATA15_RXDATA15_2, 2 .EQU CANFD9_RXDATA15_RXDATA15_1, 1 .EQU CANFD9_RXDATA15_RXDATA15_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA16, 0x40003D60 // 0x4000 3D60 CANFD9_RXDATA16 Bits------------------------------------- .EQU CANFD9_RXDATA16_RXDATA16_31, 31 .EQU CANFD9_RXDATA16_RXDATA16_30, 30 .EQU CANFD9_RXDATA16_RXDATA16_29, 29 .EQU CANFD9_RXDATA16_RXDATA16_28, 28 .EQU CANFD9_RXDATA16_RXDATA16_27, 27 .EQU CANFD9_RXDATA16_RXDATA16_26, 26 .EQU CANFD9_RXDATA16_RXDATA16_25, 25 .EQU CANFD9_RXDATA16_RXDATA16_24, 24 .EQU CANFD9_RXDATA16_RXDATA16_23, 23 .EQU CANFD9_RXDATA16_RXDATA16_22, 22 .EQU CANFD9_RXDATA16_RXDATA16_21, 21 .EQU CANFD9_RXDATA16_RXDATA16_20, 20 .EQU CANFD9_RXDATA16_RXDATA16_19, 19 .EQU CANFD9_RXDATA16_RXDATA16_18, 18 .EQU CANFD9_RXDATA16_RXDATA16_17, 17 .EQU CANFD9_RXDATA16_RXDATA16_16, 16 .EQU CANFD9_RXDATA16_RXDATA16_15, 15 .EQU CANFD9_RXDATA16_RXDATA16_14, 14 .EQU CANFD9_RXDATA16_RXDATA16_13, 13 .EQU CANFD9_RXDATA16_RXDATA16_12, 12 .EQU CANFD9_RXDATA16_RXDATA16_11, 11 .EQU CANFD9_RXDATA16_RXDATA16_10, 10 .EQU CANFD9_RXDATA16_RXDATA16_9, 9 .EQU CANFD9_RXDATA16_RXDATA16_8, 8 .EQU CANFD9_RXDATA16_RXDATA16_7, 7 .EQU CANFD9_RXDATA16_RXDATA16_6, 6 .EQU CANFD9_RXDATA16_RXDATA16_5, 5 .EQU CANFD9_RXDATA16_RXDATA16_4, 4 .EQU CANFD9_RXDATA16_RXDATA16_3, 3 .EQU CANFD9_RXDATA16_RXDATA16_2, 2 .EQU CANFD9_RXDATA16_RXDATA16_1, 1 .EQU CANFD9_RXDATA16_RXDATA16_0, 0 // register------------------------------------- .EQU CANFD9_RXDATA17, 0x40003D64 // 0x4000 3D64 CANFD9_RXDATA17 Bits------------------------------------- .EQU CANFD9_RXDATA17_RXDATA17_31, 31 .EQU CANFD9_RXDATA17_RXDATA17_30, 30 .EQU CANFD9_RXDATA17_RXDATA17_29, 29 .EQU CANFD9_RXDATA17_RXDATA17_28, 28 .EQU CANFD9_RXDATA17_RXDATA17_27, 27 .EQU CANFD9_RXDATA17_RXDATA17_26, 26 .EQU CANFD9_RXDATA17_RXDATA17_25, 25 .EQU CANFD9_RXDATA17_RXDATA17_24, 24 .EQU CANFD9_RXDATA17_RXDATA17_23, 23 .EQU CANFD9_RXDATA17_RXDATA17_22, 22 .EQU CANFD9_RXDATA17_RXDATA17_21, 21 .EQU CANFD9_RXDATA17_RXDATA17_20, 20 .EQU CANFD9_RXDATA17_RXDATA17_19, 19 .EQU CANFD9_RXDATA17_RXDATA17_18, 18 .EQU CANFD9_RXDATA17_RXDATA17_17, 17 .EQU CANFD9_RXDATA17_RXDATA17_16, 16 .EQU CANFD9_RXDATA17_RXDATA17_15, 15 .EQU CANFD9_RXDATA17_RXDATA17_14, 14 .EQU CANFD9_RXDATA17_RXDATA17_13, 13 .EQU CANFD9_RXDATA17_RXDATA17_12, 12 .EQU CANFD9_RXDATA17_RXDATA17_11, 11 .EQU CANFD9_RXDATA17_RXDATA17_10, 10 .EQU CANFD9_RXDATA17_RXDATA17_9, 9 .EQU CANFD9_RXDATA17_RXDATA17_8, 8 .EQU CANFD9_RXDATA17_RXDATA17_7, 7 .EQU CANFD9_RXDATA17_RXDATA17_6, 6 .EQU CANFD9_RXDATA17_RXDATA17_5, 5 .EQU CANFD9_RXDATA17_RXDATA17_4, 4 .EQU CANFD9_RXDATA17_RXDATA17_3, 3 .EQU CANFD9_RXDATA17_RXDATA17_2, 2 .EQU CANFD9_RXDATA17_RXDATA17_1, 1 .EQU CANFD9_RXDATA17_RXDATA17_0, 0 // register------------------------------------- .EQU CANFD9_TIMER, 0x40003D68 // 0x4000 3D68 CANFD9_TIMER Bits------------------------------------- .EQU CANFD9_TIMER_CANTIMER15, 15 .EQU CANFD9_TIMER_CANTIMER14, 14 .EQU CANFD9_TIMER_CANTIMER13, 13 .EQU CANFD9_TIMER_CANTIMER12, 12 .EQU CANFD9_TIMER_CANTIMER11, 11 .EQU CANFD9_TIMER_CANTIMER10, 10 .EQU CANFD9_TIMER_CANTIMER9, 9 .EQU CANFD9_TIMER_CANTIMER8, 8 .EQU CANFD9_TIMER_CANTIMER7, 7 .EQU CANFD9_TIMER_CANTIMER6, 6 .EQU CANFD9_TIMER_CANTIMER5, 5 .EQU CANFD9_TIMER_CANTIMER4, 4 .EQU CANFD9_TIMER_CANTIMER3, 3 .EQU CANFD9_TIMER_CANTIMER2, 2 .EQU CANFD9_TIMER_CANTIMER1, 1 .EQU CANFD9_TIMER_CANTIMER0, 0 // register------------------------------------- .EQU CANFD9_CRC, 0x40003D6C // 0x4000 3D6C CANFD9_CRC Bits------------------------------------- .EQU CANFD9_CRC_STUFFCNT3, 31 .EQU CANFD9_CRC_STUFFCNT2, 30 .EQU CANFD9_CRC_STUFFCNT1, 29 .EQU CANFD9_CRC_STUFFCNT0, 28 .EQU CANFD9_CRC_CRC20, 20 .EQU CANFD9_CRC_CRC19, 19 .EQU CANFD9_CRC_CRC18, 18 .EQU CANFD9_CRC_CRC17, 17 .EQU CANFD9_CRC_CRC16, 16 .EQU CANFD9_CRC_CRC15, 15 .EQU CANFD9_CRC_CRC14, 14 .EQU CANFD9_CRC_CRC13, 13 .EQU CANFD9_CRC_CRC12, 12 .EQU CANFD9_CRC_CRC11, 11 .EQU CANFD9_CRC_CRC10, 10 .EQU CANFD9_CRC_CRC9, 9 .EQU CANFD9_CRC_CRC8, 8 .EQU CANFD9_CRC_CRC7, 7 .EQU CANFD9_CRC_CRC6, 6 .EQU CANFD9_CRC_CRC5, 5 .EQU CANFD9_CRC_CRC4, 4 .EQU CANFD9_CRC_CRC3, 3 .EQU CANFD9_CRC_CRC2, 2 .EQU CANFD9_CRC_CRC1, 1 .EQU CANFD9_CRC_CRC0, 0 // register------------------------------------- .EQU CANFD9_CTLR1, 0x40003D74 // 0x4000 3D74 CANFD9_CTLR1 Bits------------------------------------- .EQU CANFD9_CTLR1_TRGMBEN, 31 .EQU CANFD9_CTLR1_TRGMBSEL6, 30 .EQU CANFD9_CTLR1_TRGMBSEL5, 29 .EQU CANFD9_CTLR1_TRGMBSEL4, 28 .EQU CANFD9_CTLR1_TRGMBSEL3, 27 .EQU CANFD9_CTLR1_TRGMBSEL2, 26 .EQU CANFD9_CTLR1_TRGMBSEL1, 25 .EQU CANFD9_CTLR1_TRGMBSEL0, 24 .EQU CANFD9_CTLR1_TRGNUM3, 23 .EQU CANFD9_CTLR1_TRGNUM2, 22 .EQU CANFD9_CTLR1_TRGNUM1, 21 .EQU CANFD9_CTLR1_TRGNUM0, 20 .EQU CANFD9_CTLR1_CKMODE, 19 .EQU CANFD9_CTLR1_BOFFREC, 18 .EQU CANFD9_CTLR1_LBSEL, 17 .EQU CANFD9_CTLR1_ARBSTART, 16 .EQU CANFD9_CTLR1_ARBMS, 15 .EQU CANFD9_CTLR1_MBMSKEN, 14 .EQU CANFD9_CTLR1_MATCHMS, 13 .EQU CANFD9_CTLR1_MBNUM, 12 .EQU CANFD9_CTLR1_TSYN, 11 .EQU CANFD9_CTLR1_FTCLKS, 10 .EQU CANFD9_CTLR1_ST, 9 .EQU CANFD9_CTLR1_RXMUX6, 8 .EQU CANFD9_CTLR1_RXMUX5, 7 .EQU CANFD9_CTLR1_RXMUX4, 6 .EQU CANFD9_CTLR1_RXMUX3, 5 .EQU CANFD9_CTLR1_RXMUX2, 4 .EQU CANFD9_CTLR1_RXMUX1, 3 .EQU CANFD9_CTLR1_RXMUX0, 2 .EQU CANFD9_CTLR1_AMCKS1, 1 .EQU CANFD9_CTLR1_AMCKS0, 0 // register------------------------------------- .EQU CANFD9_AMSTA, 0x40003D78 // 0x4000 3D78 CANFD9_AMSTA Bits------------------------------------- .EQU CANFD9_AMSTA_TXCODE3, 31 .EQU CANFD9_AMSTA_TXCODE2, 30 .EQU CANFD9_AMSTA_TXCODE1, 29 .EQU CANFD9_AMSTA_TXCODE0, 28 .EQU CANFD9_AMSTA_ARBSTA1, 27 .EQU CANFD9_AMSTA_ARBSTA0, 26 .EQU CANFD9_AMSTA_ARBWINNER9, 25 .EQU CANFD9_AMSTA_ARBWINNER8, 24 .EQU CANFD9_AMSTA_ARBWINNER7, 23 .EQU CANFD9_AMSTA_ARBWINNER6, 22 .EQU CANFD9_AMSTA_ARBWINNER5, 21 .EQU CANFD9_AMSTA_ARBWINNER4, 20 .EQU CANFD9_AMSTA_ARBWINNER3, 19 .EQU CANFD9_AMSTA_ARBWINNER2, 18 .EQU CANFD9_AMSTA_ARBWINNER1, 17 .EQU CANFD9_AMSTA_ARBWINNER0, 16 .EQU CANFD9_AMSTA_BETEN, 15 .EQU CANFD9_AMSTA_RTRMEN, 14 .EQU CANFD9_AMSTA_IDSELEN, 13 .EQU CANFD9_AMSTA_RELRXALL, 12 .EQU CANFD9_AMSTA_ROPSTA, 11 .EQU CANFD9_AMSTA_MATSTA, 10 .EQU CANFD9_AMSTA_MATWINNER9, 9 .EQU CANFD9_AMSTA_MATWINNER8, 8 .EQU CANFD9_AMSTA_MATWINNER7, 7 .EQU CANFD9_AMSTA_MATWINNER6, 6 .EQU CANFD9_AMSTA_MATWINNER5, 5 .EQU CANFD9_AMSTA_MATWINNER4, 4 .EQU CANFD9_AMSTA_MATWINNER3, 3 .EQU CANFD9_AMSTA_MATWINNER2, 2 .EQU CANFD9_AMSTA_MATWINNER1, 1 .EQU CANFD9_AMSTA_MATWINNER0, 0 // register------------------------------------- .EQU CANFD9_TXDATA, 0x40003D7C // 0x4000 3D7C CANFD9_TXDATA Bits------------------------------------- .EQU CANFD9_TXDATA_TXDATA31, 31 .EQU CANFD9_TXDATA_TXDATA30, 30 .EQU CANFD9_TXDATA_TXDATA29, 29 .EQU CANFD9_TXDATA_TXDATA28, 28 .EQU CANFD9_TXDATA_TXDATA27, 27 .EQU CANFD9_TXDATA_TXDATA26, 26 .EQU CANFD9_TXDATA_TXDATA25, 25 .EQU CANFD9_TXDATA_TXDATA24, 24 .EQU CANFD9_TXDATA_TXDATA23, 23 .EQU CANFD9_TXDATA_TXDATA22, 22 .EQU CANFD9_TXDATA_TXDATA21, 21 .EQU CANFD9_TXDATA_TXDATA20, 20 .EQU CANFD9_TXDATA_TXDATA19, 19 .EQU CANFD9_TXDATA_TXDATA18, 18 .EQU CANFD9_TXDATA_TXDATA17, 17 .EQU CANFD9_TXDATA_TXDATA16, 16 .EQU CANFD9_TXDATA_TXDATA15, 15 .EQU CANFD9_TXDATA_TXDATA14, 14 .EQU CANFD9_TXDATA_TXDATA13, 13 .EQU CANFD9_TXDATA_TXDATA12, 12 .EQU CANFD9_TXDATA_TXDATA11, 11 .EQU CANFD9_TXDATA_TXDATA10, 10 .EQU CANFD9_TXDATA_TXDATA9, 9 .EQU CANFD9_TXDATA_TXDATA8, 8 .EQU CANFD9_TXDATA_TXDATA7, 7 .EQU CANFD9_TXDATA_TXDATA6, 6 .EQU CANFD9_TXDATA_TXDATA5, 5 .EQU CANFD9_TXDATA_TXDATA4, 4 .EQU CANFD9_TXDATA_TXDATA3, 3 .EQU CANFD9_TXDATA_TXDATA2, 2 .EQU CANFD9_TXDATA_TXDATA1, 1 .EQU CANFD9_TXDATA_TXDATA0, 0 // register------------------------------------- .EQU CANFD10_CTLR0, 0x40003F00 // 0x4000 3F00 CANFD10_CTLR0 Bits------------------------------------- .EQU CANFD10_CTLR0_CANFDEN, 31 .EQU CANFD10_CTLR0_CANRMC6, 30 .EQU CANFD10_CTLR0_CANRMC5, 29 .EQU CANFD10_CTLR0_CANRMC4, 28 .EQU CANFD10_CTLR0_CANRMC3, 27 .EQU CANFD10_CTLR0_CANRMC2, 26 .EQU CANFD10_CTLR0_CANRMC1, 25 .EQU CANFD10_CTLR0_CANRMC0, 24 .EQU CANFD10_CTLR0_BOFF, 23 .EQU CANFD10_CTLR0_CERROR, 22 .EQU CANFD10_CTLR0_TXSTA, 21 .EQU CANFD10_CTLR0_RXSTA, 20 .EQU CANFD10_CTLR0_TCSTA, 19 .EQU CANFD10_CTLR0_DOSTA, 17 .EQU CANFD10_CTLR0_RXBSTA, 16 .EQU CANFD10_CTLR0_ANSWEREN, 15 .EQU CANFD10_CTLR0_FULLRXEN, 14 .EQU CANFD10_CTLR0_MBSIZE1, 13 .EQU CANFD10_CTLR0_MBSIZE0, 12 .EQU CANFD10_CTLR0_RELF, 11 .EQU CANFD10_CTLR0_RELRX, 10 .EQU CANFD10_CTLR0_ATX, 9 .EQU CANFD10_CTLR0_TXR, 8 .EQU CANFD10_CTLR0_CANEN, 7 .EQU CANFD10_CTLR0_CANCKS1, 6 .EQU CANFD10_CTLR0_CANCKS0, 5 .EQU CANFD10_CTLR0_ISOFDCANEN, 4 .EQU CANFD10_CTLR0_SLEEP, 3 .EQU CANFD10_CTLR0_LBACK, 2 .EQU CANFD10_CTLR0_SILENT, 1 .EQU CANFD10_CTLR0_RSMOD, 0 // register------------------------------------- .EQU CANFD10_BRGR, 0x40003F04 // 0x4000 3F04 CANFD10_BRGR Bits------------------------------------- .EQU CANFD10_BRGR_HTSEG2_2, 28 .EQU CANFD10_BRGR_HTSEG2_1, 27 .EQU CANFD10_BRGR_HTSEG2_0, 26 .EQU CANFD10_BRGR_HTSEG1_3, 25 .EQU CANFD10_BRGR_HTSEG1_2, 24 .EQU CANFD10_BRGR_HTSEG1_1, 23 .EQU CANFD10_BRGR_HTSEG1_0, 22 .EQU CANFD10_BRGR_BRSBRP5, 21 .EQU CANFD10_BRGR_BRSBRP4, 20 .EQU CANFD10_BRGR_BRSBRP3, 19 .EQU CANFD10_BRGR_BRSBRP2, 18 .EQU CANFD10_BRGR_BRSBRP1, 17 .EQU CANFD10_BRGR_BRSBRP0, 16 .EQU CANFD10_BRGR_SAM, 15 .EQU CANFD10_BRGR_TSEG2_2, 14 .EQU CANFD10_BRGR_TSEG2_1, 13 .EQU CANFD10_BRGR_TSEG2_0, 12 .EQU CANFD10_BRGR_TSEG1_3, 11 .EQU CANFD10_BRGR_TSEG1_2, 10 .EQU CANFD10_BRGR_TSEG1_1, 9 .EQU CANFD10_BRGR_TSEG1_0, 8 .EQU CANFD10_BRGR_SJW1, 7 .EQU CANFD10_BRGR_SJW0, 6 .EQU CANFD10_BRGR_CANBRP5, 5 .EQU CANFD10_BRGR_CANBRP4, 4 .EQU CANFD10_BRGR_CANBRP3, 3 .EQU CANFD10_BRGR_CANBRP2, 2 .EQU CANFD10_BRGR_CANBRP1, 1 .EQU CANFD10_BRGR_CANBRP0, 0 // register------------------------------------- .EQU CANFD10_RCR, 0x40003F08 // 0x4000 3F08 CANFD10_RCR Bits------------------------------------- .EQU CANFD10_RCR_DPRAMOF, 16 .EQU CANFD10_RCR_CANERRC1, 15 .EQU CANFD10_RCR_CANERRC0, 14 .EQU CANFD10_RCR_CANDIR, 13 .EQU CANFD10_RCR_CANSEG4, 12 .EQU CANFD10_RCR_CANSEG3, 11 .EQU CANFD10_RCR_CANSEG2, 10 .EQU CANFD10_RCR_CANSEG1, 9 .EQU CANFD10_RCR_CANSEG0, 8 .EQU CANFD10_RCR_CANALC4, 4 .EQU CANFD10_RCR_CANALC3, 3 .EQU CANFD10_RCR_CANALC2, 2 .EQU CANFD10_RCR_CANALC1, 1 .EQU CANFD10_RCR_CANALC0, 0 // register------------------------------------- .EQU CANFD10_EROR, 0x40003F0C // 0x4000 3F0C CANFD10_EROR Bits------------------------------------- .EQU CANFD10_EROR_DPRAMFEN, 31 .EQU CANFD10_EROR_SFDMOD, 30 .EQU CANFD10_EROR_SFDEN, 29 .EQU CANFD10_EROR_SOSFD4, 28 .EQU CANFD10_EROR_SOSFD3, 27 .EQU CANFD10_EROR_SOSFD2, 26 .EQU CANFD10_EROR_SOSFD1, 25 .EQU CANFD10_EROR_SOSFD0, 24 .EQU CANFD10_EROR_CANEWL7, 23 .EQU CANFD10_EROR_CANEWL6, 22 .EQU CANFD10_EROR_CANEWL5, 21 .EQU CANFD10_EROR_CANEWL4, 20 .EQU CANFD10_EROR_CANEWL3, 19 .EQU CANFD10_EROR_CANEWL2, 18 .EQU CANFD10_EROR_CANEWL1, 17 .EQU CANFD10_EROR_CANEWL0, 16 .EQU CANFD10_EROR_CANTXE7, 15 .EQU CANFD10_EROR_CANTXE6, 14 .EQU CANFD10_EROR_CANTXE5, 13 .EQU CANFD10_EROR_CANTXE4, 12 .EQU CANFD10_EROR_CANTXE3, 11 .EQU CANFD10_EROR_CANTXE2, 10 .EQU CANFD10_EROR_CANTXE1, 9 .EQU CANFD10_EROR_CANTXE0, 8 .EQU CANFD10_EROR_CANRXE7, 7 .EQU CANFD10_EROR_CANRXE6, 6 .EQU CANFD10_EROR_CANRXE5, 5 .EQU CANFD10_EROR_CANRXE4, 4 .EQU CANFD10_EROR_CANRXE3, 3 .EQU CANFD10_EROR_CANRXE2, 2 .EQU CANFD10_EROR_CANRXE1, 1 .EQU CANFD10_EROR_CANRXE0, 0 // register------------------------------------- .EQU CANFD10_CTLR2, 0x40003F10 // 0x4000 3F10 CANFD10_CTLR2 Bits------------------------------------- .EQU CANFD10_CTLR2_AMCKDIV1, 26 .EQU CANFD10_CTLR2_AMCKDIV0, 25 .EQU CANFD10_CTLR2_DESEL, 24 .EQU CANFD10_CTLR2_TDCVM6, 22 .EQU CANFD10_CTLR2_TDCVM5, 21 .EQU CANFD10_CTLR2_TDCVM4, 20 .EQU CANFD10_CTLR2_TDCVM3, 19 .EQU CANFD10_CTLR2_TDCVM2, 18 .EQU CANFD10_CTLR2_TDCVM1, 17 .EQU CANFD10_CTLR2_TDCVM0, 16 .EQU CANFD10_CTLR2_TDC0_1, 15 .EQU CANFD10_CTLR2_TDC0_0, 14 .EQU CANFD10_CTLR2_TDCSR1, 13 .EQU CANFD10_CTLR2_TDCSR0, 12 .EQU CANFD10_CTLR2_TDCS1, 11 .EQU CANFD10_CTLR2_TDCS0, 10 .EQU CANFD10_CTLR2_TDCAUT0, 9 .EQU CANFD10_CTLR2_TDCEN, 8 .EQU CANFD10_CTLR2_TDC0EN, 7 .EQU CANFD10_CTLR2_TDCV6, 6 .EQU CANFD10_CTLR2_TDCV5, 5 .EQU CANFD10_CTLR2_TDCV4, 4 .EQU CANFD10_CTLR2_TDCV3, 3 .EQU CANFD10_CTLR2_TDCV2, 2 .EQU CANFD10_CTLR2_TDCV1, 1 .EQU CANFD10_CTLR2_TDCV0, 0 // register------------------------------------- .EQU CANFD10_MSKR, 0x40003F14 // 0x4000 3F14 CANFD10_MSKR Bits------------------------------------- .EQU CANFD10_MSKR_MSK31, 31 .EQU CANFD10_MSKR_MSK30, 30 .EQU CANFD10_MSKR_MSK29, 29 .EQU CANFD10_MSKR_MSK28, 28 .EQU CANFD10_MSKR_MSK27, 27 .EQU CANFD10_MSKR_MSK26, 26 .EQU CANFD10_MSKR_MSK25, 25 .EQU CANFD10_MSKR_MSK24, 24 .EQU CANFD10_MSKR_MSK23, 23 .EQU CANFD10_MSKR_MSK22, 22 .EQU CANFD10_MSKR_MSK21, 21 .EQU CANFD10_MSKR_MSK20, 20 .EQU CANFD10_MSKR_MSK19, 19 .EQU CANFD10_MSKR_MSK18, 18 .EQU CANFD10_MSKR_MSK17, 17 .EQU CANFD10_MSKR_MSK16, 16 .EQU CANFD10_MSKR_MSK15, 15 .EQU CANFD10_MSKR_MSK14, 14 .EQU CANFD10_MSKR_MSK13, 13 .EQU CANFD10_MSKR_MSK12, 12 .EQU CANFD10_MSKR_MSK11, 11 .EQU CANFD10_MSKR_MSK10, 10 .EQU CANFD10_MSKR_MSK9, 9 .EQU CANFD10_MSKR_MSK8, 8 .EQU CANFD10_MSKR_MSK7, 7 .EQU CANFD10_MSKR_MSK6, 6 .EQU CANFD10_MSKR_MSK5, 5 .EQU CANFD10_MSKR_MSK4, 4 .EQU CANFD10_MSKR_MSK3, 3 .EQU CANFD10_MSKR_MSK2, 2 .EQU CANFD10_MSKR_MSK1, 1 .EQU CANFD10_MSKR_MSK0, 0 // register------------------------------------- .EQU CANFD10_IER, 0x40003F18 // 0x4000 3F18 CANFD10_IER Bits------------------------------------- .EQU CANFD10_IER_FAILCLR, 31 .EQU CANFD10_IER_LPCANGPIOSEL0, 30 .EQU CANFD10_IER_BOFFIC, 28 .EQU CANFD10_IER_TRGMBIC, 27 .EQU CANFD10_IER_MOENDIC, 26 .EQU CANFD10_IER_BEIC, 23 .EQU CANFD10_IER_ALIC, 22 .EQU CANFD10_IER_ENIC, 21 .EQU CANFD10_IER_WUIC, 20 .EQU CANFD10_IER_DOVFIC, 19 .EQU CANFD10_IER_EAIC, 18 .EQU CANFD10_IER_CANTXIC, 17 .EQU CANFD10_IER_CANRXIC, 16 .EQU CANFD10_IER_MOENDIE, 15 .EQU CANFD10_IER_ARBFAILIE, 14 .EQU CANFD10_IER_BOFFIE, 12 .EQU CANFD10_IER_TRGMBIE, 11 .EQU CANFD10_IER_RXBSTAIE, 10 .EQU CANFD10_IER_CRXDE, 9 .EQU CANFD10_IER_CTXDE, 8 .EQU CANFD10_IER_BEIE, 7 .EQU CANFD10_IER_ALIE, 6 .EQU CANFD10_IER_ENIE, 5 .EQU CANFD10_IER_WUIE, 4 .EQU CANFD10_IER_DOVFIE, 3 .EQU CANFD10_IER_EAIE, 2 .EQU CANFD10_IER_CANTXIE, 1 .EQU CANFD10_IER_CANRXIE, 0 // register------------------------------------- .EQU CANFD10_IFR, 0x40003F1C // 0x4000 3F1C CANFD10_IFR Bits------------------------------------- .EQU CANFD10_IFR_MOENDIF, 14 .EQU CANFD10_IFR_BOFFIF, 12 .EQU CANFD10_IFR_TRGMBIF, 11 .EQU CANFD10_IFR_RXBSTAIF, 10 .EQU CANFD10_IFR_CRXDF, 9 .EQU CANFD10_IFR_CTXDF, 8 .EQU CANFD10_IFR_BEIF, 7 .EQU CANFD10_IFR_ALIF, 6 .EQU CANFD10_IFR_ENIF, 5 .EQU CANFD10_IFR_WUIF, 4 .EQU CANFD10_IFR_DOVFIF, 3 .EQU CANFD10_IFR_EAIF, 2 .EQU CANFD10_IFR_CANTXIF, 1 .EQU CANFD10_IFR_CANRXIF, 0 // register------------------------------------- .EQU CANFD10_RXDATA0, 0x40003F20 // 0x4000 3F20 CANFD10_RXDATA0 Bits------------------------------------- .EQU CANFD10_RXDATA0_RXDATA0_31, 31 .EQU CANFD10_RXDATA0_RXDATA0_30, 30 .EQU CANFD10_RXDATA0_RXDATA0_29, 29 .EQU CANFD10_RXDATA0_RXDATA0_28, 28 .EQU CANFD10_RXDATA0_RXDATA0_27, 27 .EQU CANFD10_RXDATA0_RXDATA0_26, 26 .EQU CANFD10_RXDATA0_RXDATA0_25, 25 .EQU CANFD10_RXDATA0_RXDATA0_24, 24 .EQU CANFD10_RXDATA0_RXDATA0_23, 23 .EQU CANFD10_RXDATA0_RXDATA0_22, 22 .EQU CANFD10_RXDATA0_RXDATA0_21, 21 .EQU CANFD10_RXDATA0_RXDATA0_20, 20 .EQU CANFD10_RXDATA0_RXDATA0_19, 19 .EQU CANFD10_RXDATA0_RXDATA0_18, 18 .EQU CANFD10_RXDATA0_RXDATA0_17, 17 .EQU CANFD10_RXDATA0_RXDATA0_16, 16 .EQU CANFD10_RXDATA0_RXDATA0_15, 15 .EQU CANFD10_RXDATA0_RXDATA0_14, 14 .EQU CANFD10_RXDATA0_RXDATA0_13, 13 .EQU CANFD10_RXDATA0_RXDATA0_12, 12 .EQU CANFD10_RXDATA0_RXDATA0_11, 11 .EQU CANFD10_RXDATA0_RXDATA0_10, 10 .EQU CANFD10_RXDATA0_RXDATA0_9, 9 .EQU CANFD10_RXDATA0_RXDATA0_8, 8 .EQU CANFD10_RXDATA0_RXDATA0_7, 7 .EQU CANFD10_RXDATA0_RXDATA0_6, 6 .EQU CANFD10_RXDATA0_RXDATA0_5, 5 .EQU CANFD10_RXDATA0_RXDATA0_4, 4 .EQU CANFD10_RXDATA0_RXDATA0_3, 3 .EQU CANFD10_RXDATA0_RXDATA0_2, 2 .EQU CANFD10_RXDATA0_RXDATA0_1, 1 .EQU CANFD10_RXDATA0_RXDATA0_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA1, 0x40003F24 // 0x4000 3F24 CANFD10_RXDATA1 Bits------------------------------------- .EQU CANFD10_RXDATA1_RXDATA1_31, 31 .EQU CANFD10_RXDATA1_RXDATA1_30, 30 .EQU CANFD10_RXDATA1_RXDATA1_29, 29 .EQU CANFD10_RXDATA1_RXDATA1_28, 28 .EQU CANFD10_RXDATA1_RXDATA1_27, 27 .EQU CANFD10_RXDATA1_RXDATA1_26, 26 .EQU CANFD10_RXDATA1_RXDATA1_25, 25 .EQU CANFD10_RXDATA1_RXDATA1_24, 24 .EQU CANFD10_RXDATA1_RXDATA1_23, 23 .EQU CANFD10_RXDATA1_RXDATA1_22, 22 .EQU CANFD10_RXDATA1_RXDATA1_21, 21 .EQU CANFD10_RXDATA1_RXDATA1_20, 20 .EQU CANFD10_RXDATA1_RXDATA1_19, 19 .EQU CANFD10_RXDATA1_RXDATA1_18, 18 .EQU CANFD10_RXDATA1_RXDATA1_17, 17 .EQU CANFD10_RXDATA1_RXDATA1_16, 16 .EQU CANFD10_RXDATA1_RXDATA1_15, 15 .EQU CANFD10_RXDATA1_RXDATA1_14, 14 .EQU CANFD10_RXDATA1_RXDATA1_13, 13 .EQU CANFD10_RXDATA1_RXDATA1_12, 12 .EQU CANFD10_RXDATA1_RXDATA1_11, 11 .EQU CANFD10_RXDATA1_RXDATA1_10, 10 .EQU CANFD10_RXDATA1_RXDATA1_9, 9 .EQU CANFD10_RXDATA1_RXDATA1_8, 8 .EQU CANFD10_RXDATA1_RXDATA1_7, 7 .EQU CANFD10_RXDATA1_RXDATA1_6, 6 .EQU CANFD10_RXDATA1_RXDATA1_5, 5 .EQU CANFD10_RXDATA1_RXDATA1_4, 4 .EQU CANFD10_RXDATA1_RXDATA1_3, 3 .EQU CANFD10_RXDATA1_RXDATA1_2, 2 .EQU CANFD10_RXDATA1_RXDATA1_1, 1 .EQU CANFD10_RXDATA1_RXDATA1_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA2, 0x40003F28 // 0x4000 3F28 CANFD10_RXDATA2 Bits------------------------------------- .EQU CANFD10_RXDATA2_RXDATA2_31, 31 .EQU CANFD10_RXDATA2_RXDATA2_30, 30 .EQU CANFD10_RXDATA2_RXDATA2_29, 29 .EQU CANFD10_RXDATA2_RXDATA2_28, 28 .EQU CANFD10_RXDATA2_RXDATA2_27, 27 .EQU CANFD10_RXDATA2_RXDATA2_26, 26 .EQU CANFD10_RXDATA2_RXDATA2_25, 25 .EQU CANFD10_RXDATA2_RXDATA2_24, 24 .EQU CANFD10_RXDATA2_RXDATA2_23, 23 .EQU CANFD10_RXDATA2_RXDATA2_22, 22 .EQU CANFD10_RXDATA2_RXDATA2_21, 21 .EQU CANFD10_RXDATA2_RXDATA2_20, 20 .EQU CANFD10_RXDATA2_RXDATA2_19, 19 .EQU CANFD10_RXDATA2_RXDATA2_18, 18 .EQU CANFD10_RXDATA2_RXDATA2_17, 17 .EQU CANFD10_RXDATA2_RXDATA2_16, 16 .EQU CANFD10_RXDATA2_RXDATA2_15, 15 .EQU CANFD10_RXDATA2_RXDATA2_14, 14 .EQU CANFD10_RXDATA2_RXDATA2_13, 13 .EQU CANFD10_RXDATA2_RXDATA2_12, 12 .EQU CANFD10_RXDATA2_RXDATA2_11, 11 .EQU CANFD10_RXDATA2_RXDATA2_10, 10 .EQU CANFD10_RXDATA2_RXDATA2_9, 9 .EQU CANFD10_RXDATA2_RXDATA2_8, 8 .EQU CANFD10_RXDATA2_RXDATA2_7, 7 .EQU CANFD10_RXDATA2_RXDATA2_6, 6 .EQU CANFD10_RXDATA2_RXDATA2_5, 5 .EQU CANFD10_RXDATA2_RXDATA2_4, 4 .EQU CANFD10_RXDATA2_RXDATA2_3, 3 .EQU CANFD10_RXDATA2_RXDATA2_2, 2 .EQU CANFD10_RXDATA2_RXDATA2_1, 1 .EQU CANFD10_RXDATA2_RXDATA2_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA3, 0x40003F2C // 0x4000 3F2C CANFD10_RXDATA3 Bits------------------------------------- .EQU CANFD10_RXDATA3_RXDATA3_31, 31 .EQU CANFD10_RXDATA3_RXDATA3_30, 30 .EQU CANFD10_RXDATA3_RXDATA3_29, 29 .EQU CANFD10_RXDATA3_RXDATA3_28, 28 .EQU CANFD10_RXDATA3_RXDATA3_27, 27 .EQU CANFD10_RXDATA3_RXDATA3_26, 26 .EQU CANFD10_RXDATA3_RXDATA3_25, 25 .EQU CANFD10_RXDATA3_RXDATA3_24, 24 .EQU CANFD10_RXDATA3_RXDATA3_23, 23 .EQU CANFD10_RXDATA3_RXDATA3_22, 22 .EQU CANFD10_RXDATA3_RXDATA3_21, 21 .EQU CANFD10_RXDATA3_RXDATA3_20, 20 .EQU CANFD10_RXDATA3_RXDATA3_19, 19 .EQU CANFD10_RXDATA3_RXDATA3_18, 18 .EQU CANFD10_RXDATA3_RXDATA3_17, 17 .EQU CANFD10_RXDATA3_RXDATA3_16, 16 .EQU CANFD10_RXDATA3_RXDATA3_15, 15 .EQU CANFD10_RXDATA3_RXDATA3_14, 14 .EQU CANFD10_RXDATA3_RXDATA3_13, 13 .EQU CANFD10_RXDATA3_RXDATA3_12, 12 .EQU CANFD10_RXDATA3_RXDATA3_11, 11 .EQU CANFD10_RXDATA3_RXDATA3_10, 10 .EQU CANFD10_RXDATA3_RXDATA3_9, 9 .EQU CANFD10_RXDATA3_RXDATA3_8, 8 .EQU CANFD10_RXDATA3_RXDATA3_7, 7 .EQU CANFD10_RXDATA3_RXDATA3_6, 6 .EQU CANFD10_RXDATA3_RXDATA3_5, 5 .EQU CANFD10_RXDATA3_RXDATA3_4, 4 .EQU CANFD10_RXDATA3_RXDATA3_3, 3 .EQU CANFD10_RXDATA3_RXDATA3_2, 2 .EQU CANFD10_RXDATA3_RXDATA3_1, 1 .EQU CANFD10_RXDATA3_RXDATA3_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA4, 0x40003F30 // 0x4000 3F30 CANFD10_RXDATA4 Bits------------------------------------- .EQU CANFD10_RXDATA4_RXDATA4_31, 31 .EQU CANFD10_RXDATA4_RXDATA4_30, 30 .EQU CANFD10_RXDATA4_RXDATA4_29, 29 .EQU CANFD10_RXDATA4_RXDATA4_28, 28 .EQU CANFD10_RXDATA4_RXDATA4_27, 27 .EQU CANFD10_RXDATA4_RXDATA4_26, 26 .EQU CANFD10_RXDATA4_RXDATA4_25, 25 .EQU CANFD10_RXDATA4_RXDATA4_24, 24 .EQU CANFD10_RXDATA4_RXDATA4_23, 23 .EQU CANFD10_RXDATA4_RXDATA4_22, 22 .EQU CANFD10_RXDATA4_RXDATA4_21, 21 .EQU CANFD10_RXDATA4_RXDATA4_20, 20 .EQU CANFD10_RXDATA4_RXDATA4_19, 19 .EQU CANFD10_RXDATA4_RXDATA4_18, 18 .EQU CANFD10_RXDATA4_RXDATA4_17, 17 .EQU CANFD10_RXDATA4_RXDATA4_16, 16 .EQU CANFD10_RXDATA4_RXDATA4_15, 15 .EQU CANFD10_RXDATA4_RXDATA4_14, 14 .EQU CANFD10_RXDATA4_RXDATA4_13, 13 .EQU CANFD10_RXDATA4_RXDATA4_12, 12 .EQU CANFD10_RXDATA4_RXDATA4_11, 11 .EQU CANFD10_RXDATA4_RXDATA4_10, 10 .EQU CANFD10_RXDATA4_RXDATA4_9, 9 .EQU CANFD10_RXDATA4_RXDATA4_8, 8 .EQU CANFD10_RXDATA4_RXDATA4_7, 7 .EQU CANFD10_RXDATA4_RXDATA4_6, 6 .EQU CANFD10_RXDATA4_RXDATA4_5, 5 .EQU CANFD10_RXDATA4_RXDATA4_4, 4 .EQU CANFD10_RXDATA4_RXDATA4_3, 3 .EQU CANFD10_RXDATA4_RXDATA4_2, 2 .EQU CANFD10_RXDATA4_RXDATA4_1, 1 .EQU CANFD10_RXDATA4_RXDATA4_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA5, 0x40003F34 // 0x4000 3F34 CANFD10_RXDATA5 Bits------------------------------------- .EQU CANFD10_RXDATA5_RXDATA5_31, 31 .EQU CANFD10_RXDATA5_RXDATA5_30, 30 .EQU CANFD10_RXDATA5_RXDATA5_29, 29 .EQU CANFD10_RXDATA5_RXDATA5_28, 28 .EQU CANFD10_RXDATA5_RXDATA5_27, 27 .EQU CANFD10_RXDATA5_RXDATA5_26, 26 .EQU CANFD10_RXDATA5_RXDATA5_25, 25 .EQU CANFD10_RXDATA5_RXDATA5_24, 24 .EQU CANFD10_RXDATA5_RXDATA5_23, 23 .EQU CANFD10_RXDATA5_RXDATA5_22, 22 .EQU CANFD10_RXDATA5_RXDATA5_21, 21 .EQU CANFD10_RXDATA5_RXDATA5_20, 20 .EQU CANFD10_RXDATA5_RXDATA5_19, 19 .EQU CANFD10_RXDATA5_RXDATA5_18, 18 .EQU CANFD10_RXDATA5_RXDATA5_17, 17 .EQU CANFD10_RXDATA5_RXDATA5_16, 16 .EQU CANFD10_RXDATA5_RXDATA5_15, 15 .EQU CANFD10_RXDATA5_RXDATA5_14, 14 .EQU CANFD10_RXDATA5_RXDATA5_13, 13 .EQU CANFD10_RXDATA5_RXDATA5_12, 12 .EQU CANFD10_RXDATA5_RXDATA5_11, 11 .EQU CANFD10_RXDATA5_RXDATA5_10, 10 .EQU CANFD10_RXDATA5_RXDATA5_9, 9 .EQU CANFD10_RXDATA5_RXDATA5_8, 8 .EQU CANFD10_RXDATA5_RXDATA5_7, 7 .EQU CANFD10_RXDATA5_RXDATA5_6, 6 .EQU CANFD10_RXDATA5_RXDATA5_5, 5 .EQU CANFD10_RXDATA5_RXDATA5_4, 4 .EQU CANFD10_RXDATA5_RXDATA5_3, 3 .EQU CANFD10_RXDATA5_RXDATA5_2, 2 .EQU CANFD10_RXDATA5_RXDATA5_1, 1 .EQU CANFD10_RXDATA5_RXDATA5_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA6, 0x40003F38 // 0x4000 3F38 CANFD10_RXDATA6 Bits------------------------------------- .EQU CANFD10_RXDATA6_RXDATA6_31, 31 .EQU CANFD10_RXDATA6_RXDATA6_30, 30 .EQU CANFD10_RXDATA6_RXDATA6_29, 29 .EQU CANFD10_RXDATA6_RXDATA6_28, 28 .EQU CANFD10_RXDATA6_RXDATA6_27, 27 .EQU CANFD10_RXDATA6_RXDATA6_26, 26 .EQU CANFD10_RXDATA6_RXDATA6_25, 25 .EQU CANFD10_RXDATA6_RXDATA6_24, 24 .EQU CANFD10_RXDATA6_RXDATA6_23, 23 .EQU CANFD10_RXDATA6_RXDATA6_22, 22 .EQU CANFD10_RXDATA6_RXDATA6_21, 21 .EQU CANFD10_RXDATA6_RXDATA6_20, 20 .EQU CANFD10_RXDATA6_RXDATA6_19, 19 .EQU CANFD10_RXDATA6_RXDATA6_18, 18 .EQU CANFD10_RXDATA6_RXDATA6_17, 17 .EQU CANFD10_RXDATA6_RXDATA6_16, 16 .EQU CANFD10_RXDATA6_RXDATA6_15, 15 .EQU CANFD10_RXDATA6_RXDATA6_14, 14 .EQU CANFD10_RXDATA6_RXDATA6_13, 13 .EQU CANFD10_RXDATA6_RXDATA6_12, 12 .EQU CANFD10_RXDATA6_RXDATA6_11, 11 .EQU CANFD10_RXDATA6_RXDATA6_10, 10 .EQU CANFD10_RXDATA6_RXDATA6_9, 9 .EQU CANFD10_RXDATA6_RXDATA6_8, 8 .EQU CANFD10_RXDATA6_RXDATA6_7, 7 .EQU CANFD10_RXDATA6_RXDATA6_6, 6 .EQU CANFD10_RXDATA6_RXDATA6_5, 5 .EQU CANFD10_RXDATA6_RXDATA6_4, 4 .EQU CANFD10_RXDATA6_RXDATA6_3, 3 .EQU CANFD10_RXDATA6_RXDATA6_2, 2 .EQU CANFD10_RXDATA6_RXDATA6_1, 1 .EQU CANFD10_RXDATA6_RXDATA6_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA7, 0x40003F3C // 0x4000 3F3C CANFD10_RXDATA7 Bits------------------------------------- .EQU CANFD10_RXDATA7_RXDATA7_31, 31 .EQU CANFD10_RXDATA7_RXDATA7_30, 30 .EQU CANFD10_RXDATA7_RXDATA7_29, 29 .EQU CANFD10_RXDATA7_RXDATA7_28, 28 .EQU CANFD10_RXDATA7_RXDATA7_27, 27 .EQU CANFD10_RXDATA7_RXDATA7_26, 26 .EQU CANFD10_RXDATA7_RXDATA7_25, 25 .EQU CANFD10_RXDATA7_RXDATA7_24, 24 .EQU CANFD10_RXDATA7_RXDATA7_23, 23 .EQU CANFD10_RXDATA7_RXDATA7_22, 22 .EQU CANFD10_RXDATA7_RXDATA7_21, 21 .EQU CANFD10_RXDATA7_RXDATA7_20, 20 .EQU CANFD10_RXDATA7_RXDATA7_19, 19 .EQU CANFD10_RXDATA7_RXDATA7_18, 18 .EQU CANFD10_RXDATA7_RXDATA7_17, 17 .EQU CANFD10_RXDATA7_RXDATA7_16, 16 .EQU CANFD10_RXDATA7_RXDATA7_15, 15 .EQU CANFD10_RXDATA7_RXDATA7_14, 14 .EQU CANFD10_RXDATA7_RXDATA7_13, 13 .EQU CANFD10_RXDATA7_RXDATA7_12, 12 .EQU CANFD10_RXDATA7_RXDATA7_11, 11 .EQU CANFD10_RXDATA7_RXDATA7_10, 10 .EQU CANFD10_RXDATA7_RXDATA7_9, 9 .EQU CANFD10_RXDATA7_RXDATA7_8, 8 .EQU CANFD10_RXDATA7_RXDATA7_7, 7 .EQU CANFD10_RXDATA7_RXDATA7_6, 6 .EQU CANFD10_RXDATA7_RXDATA7_5, 5 .EQU CANFD10_RXDATA7_RXDATA7_4, 4 .EQU CANFD10_RXDATA7_RXDATA7_3, 3 .EQU CANFD10_RXDATA7_RXDATA7_2, 2 .EQU CANFD10_RXDATA7_RXDATA7_1, 1 .EQU CANFD10_RXDATA7_RXDATA7_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA8, 0x40003F40 // 0x4000 3F40 CANFD10_RXDATA8 Bits------------------------------------- .EQU CANFD10_RXDATA8_RXDATA8_31, 31 .EQU CANFD10_RXDATA8_RXDATA8_30, 30 .EQU CANFD10_RXDATA8_RXDATA8_29, 29 .EQU CANFD10_RXDATA8_RXDATA8_28, 28 .EQU CANFD10_RXDATA8_RXDATA8_27, 27 .EQU CANFD10_RXDATA8_RXDATA8_26, 26 .EQU CANFD10_RXDATA8_RXDATA8_25, 25 .EQU CANFD10_RXDATA8_RXDATA8_24, 24 .EQU CANFD10_RXDATA8_RXDATA8_23, 23 .EQU CANFD10_RXDATA8_RXDATA8_22, 22 .EQU CANFD10_RXDATA8_RXDATA8_21, 21 .EQU CANFD10_RXDATA8_RXDATA8_20, 20 .EQU CANFD10_RXDATA8_RXDATA8_19, 19 .EQU CANFD10_RXDATA8_RXDATA8_18, 18 .EQU CANFD10_RXDATA8_RXDATA8_17, 17 .EQU CANFD10_RXDATA8_RXDATA8_16, 16 .EQU CANFD10_RXDATA8_RXDATA8_15, 15 .EQU CANFD10_RXDATA8_RXDATA8_14, 14 .EQU CANFD10_RXDATA8_RXDATA8_13, 13 .EQU CANFD10_RXDATA8_RXDATA8_12, 12 .EQU CANFD10_RXDATA8_RXDATA8_11, 11 .EQU CANFD10_RXDATA8_RXDATA8_10, 10 .EQU CANFD10_RXDATA8_RXDATA8_9, 9 .EQU CANFD10_RXDATA8_RXDATA8_8, 8 .EQU CANFD10_RXDATA8_RXDATA8_7, 7 .EQU CANFD10_RXDATA8_RXDATA8_6, 6 .EQU CANFD10_RXDATA8_RXDATA8_5, 5 .EQU CANFD10_RXDATA8_RXDATA8_4, 4 .EQU CANFD10_RXDATA8_RXDATA8_3, 3 .EQU CANFD10_RXDATA8_RXDATA8_2, 2 .EQU CANFD10_RXDATA8_RXDATA8_1, 1 .EQU CANFD10_RXDATA8_RXDATA8_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA9, 0x40003F44 // 0x4000 3F44 CANFD10_RXDATA9 Bits------------------------------------- .EQU CANFD10_RXDATA9_RXDATA9_31, 31 .EQU CANFD10_RXDATA9_RXDATA9_30, 30 .EQU CANFD10_RXDATA9_RXDATA9_29, 29 .EQU CANFD10_RXDATA9_RXDATA9_28, 28 .EQU CANFD10_RXDATA9_RXDATA9_27, 27 .EQU CANFD10_RXDATA9_RXDATA9_26, 26 .EQU CANFD10_RXDATA9_RXDATA9_25, 25 .EQU CANFD10_RXDATA9_RXDATA9_24, 24 .EQU CANFD10_RXDATA9_RXDATA9_23, 23 .EQU CANFD10_RXDATA9_RXDATA9_22, 22 .EQU CANFD10_RXDATA9_RXDATA9_21, 21 .EQU CANFD10_RXDATA9_RXDATA9_20, 20 .EQU CANFD10_RXDATA9_RXDATA9_19, 19 .EQU CANFD10_RXDATA9_RXDATA9_18, 18 .EQU CANFD10_RXDATA9_RXDATA9_17, 17 .EQU CANFD10_RXDATA9_RXDATA9_16, 16 .EQU CANFD10_RXDATA9_RXDATA9_15, 15 .EQU CANFD10_RXDATA9_RXDATA9_14, 14 .EQU CANFD10_RXDATA9_RXDATA9_13, 13 .EQU CANFD10_RXDATA9_RXDATA9_12, 12 .EQU CANFD10_RXDATA9_RXDATA9_11, 11 .EQU CANFD10_RXDATA9_RXDATA9_10, 10 .EQU CANFD10_RXDATA9_RXDATA9_9, 9 .EQU CANFD10_RXDATA9_RXDATA9_8, 8 .EQU CANFD10_RXDATA9_RXDATA9_7, 7 .EQU CANFD10_RXDATA9_RXDATA9_6, 6 .EQU CANFD10_RXDATA9_RXDATA9_5, 5 .EQU CANFD10_RXDATA9_RXDATA9_4, 4 .EQU CANFD10_RXDATA9_RXDATA9_3, 3 .EQU CANFD10_RXDATA9_RXDATA9_2, 2 .EQU CANFD10_RXDATA9_RXDATA9_1, 1 .EQU CANFD10_RXDATA9_RXDATA9_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA10, 0x40003F48 // 0x4000 3F48 CANFD10_RXDATA10 Bits------------------------------------- .EQU CANFD10_RXDATA10_RXDATA10_31, 31 .EQU CANFD10_RXDATA10_RXDATA10_30, 30 .EQU CANFD10_RXDATA10_RXDATA10_29, 29 .EQU CANFD10_RXDATA10_RXDATA10_28, 28 .EQU CANFD10_RXDATA10_RXDATA10_27, 27 .EQU CANFD10_RXDATA10_RXDATA10_26, 26 .EQU CANFD10_RXDATA10_RXDATA10_25, 25 .EQU CANFD10_RXDATA10_RXDATA10_24, 24 .EQU CANFD10_RXDATA10_RXDATA10_23, 23 .EQU CANFD10_RXDATA10_RXDATA10_22, 22 .EQU CANFD10_RXDATA10_RXDATA10_21, 21 .EQU CANFD10_RXDATA10_RXDATA10_20, 20 .EQU CANFD10_RXDATA10_RXDATA10_19, 19 .EQU CANFD10_RXDATA10_RXDATA10_18, 18 .EQU CANFD10_RXDATA10_RXDATA10_17, 17 .EQU CANFD10_RXDATA10_RXDATA10_16, 16 .EQU CANFD10_RXDATA10_RXDATA10_15, 15 .EQU CANFD10_RXDATA10_RXDATA10_14, 14 .EQU CANFD10_RXDATA10_RXDATA10_13, 13 .EQU CANFD10_RXDATA10_RXDATA10_12, 12 .EQU CANFD10_RXDATA10_RXDATA10_11, 11 .EQU CANFD10_RXDATA10_RXDATA10_10, 10 .EQU CANFD10_RXDATA10_RXDATA10_9, 9 .EQU CANFD10_RXDATA10_RXDATA10_8, 8 .EQU CANFD10_RXDATA10_RXDATA10_7, 7 .EQU CANFD10_RXDATA10_RXDATA10_6, 6 .EQU CANFD10_RXDATA10_RXDATA10_5, 5 .EQU CANFD10_RXDATA10_RXDATA10_4, 4 .EQU CANFD10_RXDATA10_RXDATA10_3, 3 .EQU CANFD10_RXDATA10_RXDATA10_2, 2 .EQU CANFD10_RXDATA10_RXDATA10_1, 1 .EQU CANFD10_RXDATA10_RXDATA10_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA11, 0x40003F4C // 0x4000 3F4C CANFD10_RXDATA11 Bits------------------------------------- .EQU CANFD10_RXDATA11_RXDATA11_31, 31 .EQU CANFD10_RXDATA11_RXDATA11_30, 30 .EQU CANFD10_RXDATA11_RXDATA11_29, 29 .EQU CANFD10_RXDATA11_RXDATA11_28, 28 .EQU CANFD10_RXDATA11_RXDATA11_27, 27 .EQU CANFD10_RXDATA11_RXDATA11_26, 26 .EQU CANFD10_RXDATA11_RXDATA11_25, 25 .EQU CANFD10_RXDATA11_RXDATA11_24, 24 .EQU CANFD10_RXDATA11_RXDATA11_23, 23 .EQU CANFD10_RXDATA11_RXDATA11_22, 22 .EQU CANFD10_RXDATA11_RXDATA11_21, 21 .EQU CANFD10_RXDATA11_RXDATA11_20, 20 .EQU CANFD10_RXDATA11_RXDATA11_19, 19 .EQU CANFD10_RXDATA11_RXDATA11_18, 18 .EQU CANFD10_RXDATA11_RXDATA11_17, 17 .EQU CANFD10_RXDATA11_RXDATA11_16, 16 .EQU CANFD10_RXDATA11_RXDATA11_15, 15 .EQU CANFD10_RXDATA11_RXDATA11_14, 14 .EQU CANFD10_RXDATA11_RXDATA11_13, 13 .EQU CANFD10_RXDATA11_RXDATA11_12, 12 .EQU CANFD10_RXDATA11_RXDATA11_11, 11 .EQU CANFD10_RXDATA11_RXDATA11_10, 10 .EQU CANFD10_RXDATA11_RXDATA11_9, 9 .EQU CANFD10_RXDATA11_RXDATA11_8, 8 .EQU CANFD10_RXDATA11_RXDATA11_7, 7 .EQU CANFD10_RXDATA11_RXDATA11_6, 6 .EQU CANFD10_RXDATA11_RXDATA11_5, 5 .EQU CANFD10_RXDATA11_RXDATA11_4, 4 .EQU CANFD10_RXDATA11_RXDATA11_3, 3 .EQU CANFD10_RXDATA11_RXDATA11_2, 2 .EQU CANFD10_RXDATA11_RXDATA11_1, 1 .EQU CANFD10_RXDATA11_RXDATA11_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA12, 0x40003F50 // 0x4000 3F50 CANFD10_RXDATA12 Bits------------------------------------- .EQU CANFD10_RXDATA12_RXDATA12_31, 31 .EQU CANFD10_RXDATA12_RXDATA12_30, 30 .EQU CANFD10_RXDATA12_RXDATA12_29, 29 .EQU CANFD10_RXDATA12_RXDATA12_28, 28 .EQU CANFD10_RXDATA12_RXDATA12_27, 27 .EQU CANFD10_RXDATA12_RXDATA12_26, 26 .EQU CANFD10_RXDATA12_RXDATA12_25, 25 .EQU CANFD10_RXDATA12_RXDATA12_24, 24 .EQU CANFD10_RXDATA12_RXDATA12_23, 23 .EQU CANFD10_RXDATA12_RXDATA12_22, 22 .EQU CANFD10_RXDATA12_RXDATA12_21, 21 .EQU CANFD10_RXDATA12_RXDATA12_20, 20 .EQU CANFD10_RXDATA12_RXDATA12_19, 19 .EQU CANFD10_RXDATA12_RXDATA12_18, 18 .EQU CANFD10_RXDATA12_RXDATA12_17, 17 .EQU CANFD10_RXDATA12_RXDATA12_16, 16 .EQU CANFD10_RXDATA12_RXDATA12_15, 15 .EQU CANFD10_RXDATA12_RXDATA12_14, 14 .EQU CANFD10_RXDATA12_RXDATA12_13, 13 .EQU CANFD10_RXDATA12_RXDATA12_12, 12 .EQU CANFD10_RXDATA12_RXDATA12_11, 11 .EQU CANFD10_RXDATA12_RXDATA12_10, 10 .EQU CANFD10_RXDATA12_RXDATA12_9, 9 .EQU CANFD10_RXDATA12_RXDATA12_8, 8 .EQU CANFD10_RXDATA12_RXDATA12_7, 7 .EQU CANFD10_RXDATA12_RXDATA12_6, 6 .EQU CANFD10_RXDATA12_RXDATA12_5, 5 .EQU CANFD10_RXDATA12_RXDATA12_4, 4 .EQU CANFD10_RXDATA12_RXDATA12_3, 3 .EQU CANFD10_RXDATA12_RXDATA12_2, 2 .EQU CANFD10_RXDATA12_RXDATA12_1, 1 .EQU CANFD10_RXDATA12_RXDATA12_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA13, 0x40003F54 // 0x4000 3F54 CANFD10_RXDATA13 Bits------------------------------------- .EQU CANFD10_RXDATA13_RXDATA13_31, 31 .EQU CANFD10_RXDATA13_RXDATA13_30, 30 .EQU CANFD10_RXDATA13_RXDATA13_29, 29 .EQU CANFD10_RXDATA13_RXDATA13_28, 28 .EQU CANFD10_RXDATA13_RXDATA13_27, 27 .EQU CANFD10_RXDATA13_RXDATA13_26, 26 .EQU CANFD10_RXDATA13_RXDATA13_25, 25 .EQU CANFD10_RXDATA13_RXDATA13_24, 24 .EQU CANFD10_RXDATA13_RXDATA13_23, 23 .EQU CANFD10_RXDATA13_RXDATA13_22, 22 .EQU CANFD10_RXDATA13_RXDATA13_21, 21 .EQU CANFD10_RXDATA13_RXDATA13_20, 20 .EQU CANFD10_RXDATA13_RXDATA13_19, 19 .EQU CANFD10_RXDATA13_RXDATA13_18, 18 .EQU CANFD10_RXDATA13_RXDATA13_17, 17 .EQU CANFD10_RXDATA13_RXDATA13_16, 16 .EQU CANFD10_RXDATA13_RXDATA13_15, 15 .EQU CANFD10_RXDATA13_RXDATA13_14, 14 .EQU CANFD10_RXDATA13_RXDATA13_13, 13 .EQU CANFD10_RXDATA13_RXDATA13_12, 12 .EQU CANFD10_RXDATA13_RXDATA13_11, 11 .EQU CANFD10_RXDATA13_RXDATA13_10, 10 .EQU CANFD10_RXDATA13_RXDATA13_9, 9 .EQU CANFD10_RXDATA13_RXDATA13_8, 8 .EQU CANFD10_RXDATA13_RXDATA13_7, 7 .EQU CANFD10_RXDATA13_RXDATA13_6, 6 .EQU CANFD10_RXDATA13_RXDATA13_5, 5 .EQU CANFD10_RXDATA13_RXDATA13_4, 4 .EQU CANFD10_RXDATA13_RXDATA13_3, 3 .EQU CANFD10_RXDATA13_RXDATA13_2, 2 .EQU CANFD10_RXDATA13_RXDATA13_1, 1 .EQU CANFD10_RXDATA13_RXDATA13_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA14, 0x40003F58 // 0x4000 3F58 CANFD10_RXDATA14 Bits------------------------------------- .EQU CANFD10_RXDATA14_RXDATA14_31, 31 .EQU CANFD10_RXDATA14_RXDATA14_30, 30 .EQU CANFD10_RXDATA14_RXDATA14_29, 29 .EQU CANFD10_RXDATA14_RXDATA14_28, 28 .EQU CANFD10_RXDATA14_RXDATA14_27, 27 .EQU CANFD10_RXDATA14_RXDATA14_26, 26 .EQU CANFD10_RXDATA14_RXDATA14_25, 25 .EQU CANFD10_RXDATA14_RXDATA14_24, 24 .EQU CANFD10_RXDATA14_RXDATA14_23, 23 .EQU CANFD10_RXDATA14_RXDATA14_22, 22 .EQU CANFD10_RXDATA14_RXDATA14_21, 21 .EQU CANFD10_RXDATA14_RXDATA14_20, 20 .EQU CANFD10_RXDATA14_RXDATA14_19, 19 .EQU CANFD10_RXDATA14_RXDATA14_18, 18 .EQU CANFD10_RXDATA14_RXDATA14_17, 17 .EQU CANFD10_RXDATA14_RXDATA14_16, 16 .EQU CANFD10_RXDATA14_RXDATA14_15, 15 .EQU CANFD10_RXDATA14_RXDATA14_14, 14 .EQU CANFD10_RXDATA14_RXDATA14_13, 13 .EQU CANFD10_RXDATA14_RXDATA14_12, 12 .EQU CANFD10_RXDATA14_RXDATA14_11, 11 .EQU CANFD10_RXDATA14_RXDATA14_10, 10 .EQU CANFD10_RXDATA14_RXDATA14_9, 9 .EQU CANFD10_RXDATA14_RXDATA14_8, 8 .EQU CANFD10_RXDATA14_RXDATA14_7, 7 .EQU CANFD10_RXDATA14_RXDATA14_6, 6 .EQU CANFD10_RXDATA14_RXDATA14_5, 5 .EQU CANFD10_RXDATA14_RXDATA14_4, 4 .EQU CANFD10_RXDATA14_RXDATA14_3, 3 .EQU CANFD10_RXDATA14_RXDATA14_2, 2 .EQU CANFD10_RXDATA14_RXDATA14_1, 1 .EQU CANFD10_RXDATA14_RXDATA14_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA15, 0x40003F5C // 0x4000 3F5C CANFD10_RXDATA15 Bits------------------------------------- .EQU CANFD10_RXDATA15_RXDATA15_31, 31 .EQU CANFD10_RXDATA15_RXDATA15_30, 30 .EQU CANFD10_RXDATA15_RXDATA15_29, 29 .EQU CANFD10_RXDATA15_RXDATA15_28, 28 .EQU CANFD10_RXDATA15_RXDATA15_27, 27 .EQU CANFD10_RXDATA15_RXDATA15_26, 26 .EQU CANFD10_RXDATA15_RXDATA15_25, 25 .EQU CANFD10_RXDATA15_RXDATA15_24, 24 .EQU CANFD10_RXDATA15_RXDATA15_23, 23 .EQU CANFD10_RXDATA15_RXDATA15_22, 22 .EQU CANFD10_RXDATA15_RXDATA15_21, 21 .EQU CANFD10_RXDATA15_RXDATA15_20, 20 .EQU CANFD10_RXDATA15_RXDATA15_19, 19 .EQU CANFD10_RXDATA15_RXDATA15_18, 18 .EQU CANFD10_RXDATA15_RXDATA15_17, 17 .EQU CANFD10_RXDATA15_RXDATA15_16, 16 .EQU CANFD10_RXDATA15_RXDATA15_15, 15 .EQU CANFD10_RXDATA15_RXDATA15_14, 14 .EQU CANFD10_RXDATA15_RXDATA15_13, 13 .EQU CANFD10_RXDATA15_RXDATA15_12, 12 .EQU CANFD10_RXDATA15_RXDATA15_11, 11 .EQU CANFD10_RXDATA15_RXDATA15_10, 10 .EQU CANFD10_RXDATA15_RXDATA15_9, 9 .EQU CANFD10_RXDATA15_RXDATA15_8, 8 .EQU CANFD10_RXDATA15_RXDATA15_7, 7 .EQU CANFD10_RXDATA15_RXDATA15_6, 6 .EQU CANFD10_RXDATA15_RXDATA15_5, 5 .EQU CANFD10_RXDATA15_RXDATA15_4, 4 .EQU CANFD10_RXDATA15_RXDATA15_3, 3 .EQU CANFD10_RXDATA15_RXDATA15_2, 2 .EQU CANFD10_RXDATA15_RXDATA15_1, 1 .EQU CANFD10_RXDATA15_RXDATA15_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA16, 0x40003F60 // 0x4000 3F60 CANFD10_RXDATA16 Bits------------------------------------- .EQU CANFD10_RXDATA16_RXDATA16_31, 31 .EQU CANFD10_RXDATA16_RXDATA16_30, 30 .EQU CANFD10_RXDATA16_RXDATA16_29, 29 .EQU CANFD10_RXDATA16_RXDATA16_28, 28 .EQU CANFD10_RXDATA16_RXDATA16_27, 27 .EQU CANFD10_RXDATA16_RXDATA16_26, 26 .EQU CANFD10_RXDATA16_RXDATA16_25, 25 .EQU CANFD10_RXDATA16_RXDATA16_24, 24 .EQU CANFD10_RXDATA16_RXDATA16_23, 23 .EQU CANFD10_RXDATA16_RXDATA16_22, 22 .EQU CANFD10_RXDATA16_RXDATA16_21, 21 .EQU CANFD10_RXDATA16_RXDATA16_20, 20 .EQU CANFD10_RXDATA16_RXDATA16_19, 19 .EQU CANFD10_RXDATA16_RXDATA16_18, 18 .EQU CANFD10_RXDATA16_RXDATA16_17, 17 .EQU CANFD10_RXDATA16_RXDATA16_16, 16 .EQU CANFD10_RXDATA16_RXDATA16_15, 15 .EQU CANFD10_RXDATA16_RXDATA16_14, 14 .EQU CANFD10_RXDATA16_RXDATA16_13, 13 .EQU CANFD10_RXDATA16_RXDATA16_12, 12 .EQU CANFD10_RXDATA16_RXDATA16_11, 11 .EQU CANFD10_RXDATA16_RXDATA16_10, 10 .EQU CANFD10_RXDATA16_RXDATA16_9, 9 .EQU CANFD10_RXDATA16_RXDATA16_8, 8 .EQU CANFD10_RXDATA16_RXDATA16_7, 7 .EQU CANFD10_RXDATA16_RXDATA16_6, 6 .EQU CANFD10_RXDATA16_RXDATA16_5, 5 .EQU CANFD10_RXDATA16_RXDATA16_4, 4 .EQU CANFD10_RXDATA16_RXDATA16_3, 3 .EQU CANFD10_RXDATA16_RXDATA16_2, 2 .EQU CANFD10_RXDATA16_RXDATA16_1, 1 .EQU CANFD10_RXDATA16_RXDATA16_0, 0 // register------------------------------------- .EQU CANFD10_RXDATA17, 0x40003F64 // 0x4000 3F64 CANFD10_RXDATA17 Bits------------------------------------- .EQU CANFD10_RXDATA17_RXDATA17_31, 31 .EQU CANFD10_RXDATA17_RXDATA17_30, 30 .EQU CANFD10_RXDATA17_RXDATA17_29, 29 .EQU CANFD10_RXDATA17_RXDATA17_28, 28 .EQU CANFD10_RXDATA17_RXDATA17_27, 27 .EQU CANFD10_RXDATA17_RXDATA17_26, 26 .EQU CANFD10_RXDATA17_RXDATA17_25, 25 .EQU CANFD10_RXDATA17_RXDATA17_24, 24 .EQU CANFD10_RXDATA17_RXDATA17_23, 23 .EQU CANFD10_RXDATA17_RXDATA17_22, 22 .EQU CANFD10_RXDATA17_RXDATA17_21, 21 .EQU CANFD10_RXDATA17_RXDATA17_20, 20 .EQU CANFD10_RXDATA17_RXDATA17_19, 19 .EQU CANFD10_RXDATA17_RXDATA17_18, 18 .EQU CANFD10_RXDATA17_RXDATA17_17, 17 .EQU CANFD10_RXDATA17_RXDATA17_16, 16 .EQU CANFD10_RXDATA17_RXDATA17_15, 15 .EQU CANFD10_RXDATA17_RXDATA17_14, 14 .EQU CANFD10_RXDATA17_RXDATA17_13, 13 .EQU CANFD10_RXDATA17_RXDATA17_12, 12 .EQU CANFD10_RXDATA17_RXDATA17_11, 11 .EQU CANFD10_RXDATA17_RXDATA17_10, 10 .EQU CANFD10_RXDATA17_RXDATA17_9, 9 .EQU CANFD10_RXDATA17_RXDATA17_8, 8 .EQU CANFD10_RXDATA17_RXDATA17_7, 7 .EQU CANFD10_RXDATA17_RXDATA17_6, 6 .EQU CANFD10_RXDATA17_RXDATA17_5, 5 .EQU CANFD10_RXDATA17_RXDATA17_4, 4 .EQU CANFD10_RXDATA17_RXDATA17_3, 3 .EQU CANFD10_RXDATA17_RXDATA17_2, 2 .EQU CANFD10_RXDATA17_RXDATA17_1, 1 .EQU CANFD10_RXDATA17_RXDATA17_0, 0 // register------------------------------------- .EQU CANFD10_TIMER, 0x40003F68 // 0x4000 3F68 CANFD10_TIMER Bits------------------------------------- .EQU CANFD10_TIMER_CANTIMER15, 15 .EQU CANFD10_TIMER_CANTIMER14, 14 .EQU CANFD10_TIMER_CANTIMER13, 13 .EQU CANFD10_TIMER_CANTIMER12, 12 .EQU CANFD10_TIMER_CANTIMER11, 11 .EQU CANFD10_TIMER_CANTIMER10, 10 .EQU CANFD10_TIMER_CANTIMER9, 9 .EQU CANFD10_TIMER_CANTIMER8, 8 .EQU CANFD10_TIMER_CANTIMER7, 7 .EQU CANFD10_TIMER_CANTIMER6, 6 .EQU CANFD10_TIMER_CANTIMER5, 5 .EQU CANFD10_TIMER_CANTIMER4, 4 .EQU CANFD10_TIMER_CANTIMER3, 3 .EQU CANFD10_TIMER_CANTIMER2, 2 .EQU CANFD10_TIMER_CANTIMER1, 1 .EQU CANFD10_TIMER_CANTIMER0, 0 // register------------------------------------- .EQU CANFD10_CRC, 0x40003F6C // 0x4000 3F6C CANFD10_CRC Bits------------------------------------- .EQU CANFD10_CRC_STUFFCNT3, 31 .EQU CANFD10_CRC_STUFFCNT2, 30 .EQU CANFD10_CRC_STUFFCNT1, 29 .EQU CANFD10_CRC_STUFFCNT0, 28 .EQU CANFD10_CRC_CRC20, 20 .EQU CANFD10_CRC_CRC19, 19 .EQU CANFD10_CRC_CRC18, 18 .EQU CANFD10_CRC_CRC17, 17 .EQU CANFD10_CRC_CRC16, 16 .EQU CANFD10_CRC_CRC15, 15 .EQU CANFD10_CRC_CRC14, 14 .EQU CANFD10_CRC_CRC13, 13 .EQU CANFD10_CRC_CRC12, 12 .EQU CANFD10_CRC_CRC11, 11 .EQU CANFD10_CRC_CRC10, 10 .EQU CANFD10_CRC_CRC9, 9 .EQU CANFD10_CRC_CRC8, 8 .EQU CANFD10_CRC_CRC7, 7 .EQU CANFD10_CRC_CRC6, 6 .EQU CANFD10_CRC_CRC5, 5 .EQU CANFD10_CRC_CRC4, 4 .EQU CANFD10_CRC_CRC3, 3 .EQU CANFD10_CRC_CRC2, 2 .EQU CANFD10_CRC_CRC1, 1 .EQU CANFD10_CRC_CRC0, 0 // register------------------------------------- .EQU CANFD10_CTLR1, 0x40003F74 // 0x4000 3F74 CANFD10_CTLR1 Bits------------------------------------- .EQU CANFD10_CTLR1_TRGMBEN, 31 .EQU CANFD10_CTLR1_TRGMBSEL6, 30 .EQU CANFD10_CTLR1_TRGMBSEL5, 29 .EQU CANFD10_CTLR1_TRGMBSEL4, 28 .EQU CANFD10_CTLR1_TRGMBSEL3, 27 .EQU CANFD10_CTLR1_TRGMBSEL2, 26 .EQU CANFD10_CTLR1_TRGMBSEL1, 25 .EQU CANFD10_CTLR1_TRGMBSEL0, 24 .EQU CANFD10_CTLR1_TRGNUM3, 23 .EQU CANFD10_CTLR1_TRGNUM2, 22 .EQU CANFD10_CTLR1_TRGNUM1, 21 .EQU CANFD10_CTLR1_TRGNUM0, 20 .EQU CANFD10_CTLR1_CKMODE, 19 .EQU CANFD10_CTLR1_BOFFREC, 18 .EQU CANFD10_CTLR1_LBSEL, 17 .EQU CANFD10_CTLR1_ARBSTART, 16 .EQU CANFD10_CTLR1_ARBMS, 15 .EQU CANFD10_CTLR1_MBMSKEN, 14 .EQU CANFD10_CTLR1_MATCHMS, 13 .EQU CANFD10_CTLR1_MBNUM, 12 .EQU CANFD10_CTLR1_TSYN, 11 .EQU CANFD10_CTLR1_FTCLKS, 10 .EQU CANFD10_CTLR1_ST, 9 .EQU CANFD10_CTLR1_RXMUX6, 8 .EQU CANFD10_CTLR1_RXMUX5, 7 .EQU CANFD10_CTLR1_RXMUX4, 6 .EQU CANFD10_CTLR1_RXMUX3, 5 .EQU CANFD10_CTLR1_RXMUX2, 4 .EQU CANFD10_CTLR1_RXMUX1, 3 .EQU CANFD10_CTLR1_RXMUX0, 2 .EQU CANFD10_CTLR1_AMCKS1, 1 .EQU CANFD10_CTLR1_AMCKS0, 0 // register------------------------------------- .EQU CANFD10_AMSTA, 0x40003F78 // 0x4000 3F78 CANFD10_AMSTA Bits------------------------------------- .EQU CANFD10_AMSTA_TXCODE3, 31 .EQU CANFD10_AMSTA_TXCODE2, 30 .EQU CANFD10_AMSTA_TXCODE1, 29 .EQU CANFD10_AMSTA_TXCODE0, 28 .EQU CANFD10_AMSTA_ARBSTA1, 27 .EQU CANFD10_AMSTA_ARBSTA0, 26 .EQU CANFD10_AMSTA_ARBWINNER9, 25 .EQU CANFD10_AMSTA_ARBWINNER8, 24 .EQU CANFD10_AMSTA_ARBWINNER7, 23 .EQU CANFD10_AMSTA_ARBWINNER6, 22 .EQU CANFD10_AMSTA_ARBWINNER5, 21 .EQU CANFD10_AMSTA_ARBWINNER4, 20 .EQU CANFD10_AMSTA_ARBWINNER3, 19 .EQU CANFD10_AMSTA_ARBWINNER2, 18 .EQU CANFD10_AMSTA_ARBWINNER1, 17 .EQU CANFD10_AMSTA_ARBWINNER0, 16 .EQU CANFD10_AMSTA_BETEN, 15 .EQU CANFD10_AMSTA_RTRMEN, 14 .EQU CANFD10_AMSTA_IDSELEN, 13 .EQU CANFD10_AMSTA_RELRXALL, 12 .EQU CANFD10_AMSTA_ROPSTA, 11 .EQU CANFD10_AMSTA_MATSTA, 10 .EQU CANFD10_AMSTA_MATWINNER9, 9 .EQU CANFD10_AMSTA_MATWINNER8, 8 .EQU CANFD10_AMSTA_MATWINNER7, 7 .EQU CANFD10_AMSTA_MATWINNER6, 6 .EQU CANFD10_AMSTA_MATWINNER5, 5 .EQU CANFD10_AMSTA_MATWINNER4, 4 .EQU CANFD10_AMSTA_MATWINNER3, 3 .EQU CANFD10_AMSTA_MATWINNER2, 2 .EQU CANFD10_AMSTA_MATWINNER1, 1 .EQU CANFD10_AMSTA_MATWINNER0, 0 // register------------------------------------- .EQU CANFD10_TXDATA, 0x40003F7C // 0x4000 3F7C CANFD10_TXDATA Bits------------------------------------- .EQU CANFD10_TXDATA_TXDATA31, 31 .EQU CANFD10_TXDATA_TXDATA30, 30 .EQU CANFD10_TXDATA_TXDATA29, 29 .EQU CANFD10_TXDATA_TXDATA28, 28 .EQU CANFD10_TXDATA_TXDATA27, 27 .EQU CANFD10_TXDATA_TXDATA26, 26 .EQU CANFD10_TXDATA_TXDATA25, 25 .EQU CANFD10_TXDATA_TXDATA24, 24 .EQU CANFD10_TXDATA_TXDATA23, 23 .EQU CANFD10_TXDATA_TXDATA22, 22 .EQU CANFD10_TXDATA_TXDATA21, 21 .EQU CANFD10_TXDATA_TXDATA20, 20 .EQU CANFD10_TXDATA_TXDATA19, 19 .EQU CANFD10_TXDATA_TXDATA18, 18 .EQU CANFD10_TXDATA_TXDATA17, 17 .EQU CANFD10_TXDATA_TXDATA16, 16 .EQU CANFD10_TXDATA_TXDATA15, 15 .EQU CANFD10_TXDATA_TXDATA14, 14 .EQU CANFD10_TXDATA_TXDATA13, 13 .EQU CANFD10_TXDATA_TXDATA12, 12 .EQU CANFD10_TXDATA_TXDATA11, 11 .EQU CANFD10_TXDATA_TXDATA10, 10 .EQU CANFD10_TXDATA_TXDATA9, 9 .EQU CANFD10_TXDATA_TXDATA8, 8 .EQU CANFD10_TXDATA_TXDATA7, 7 .EQU CANFD10_TXDATA_TXDATA6, 6 .EQU CANFD10_TXDATA_TXDATA5, 5 .EQU CANFD10_TXDATA_TXDATA4, 4 .EQU CANFD10_TXDATA_TXDATA3, 3 .EQU CANFD10_TXDATA_TXDATA2, 2 .EQU CANFD10_TXDATA_TXDATA1, 1 .EQU CANFD10_TXDATA_TXDATA0, 0 // register------------------------------------- .EQU CANFD11_CTLR0, 0x40004100 // 0x4000 4100 CANFD11_CTLR0 Bits------------------------------------- .EQU CANFD11_CTLR0_CANFDEN, 31 .EQU CANFD11_CTLR0_CANRMC6, 30 .EQU CANFD11_CTLR0_CANRMC5, 29 .EQU CANFD11_CTLR0_CANRMC4, 28 .EQU CANFD11_CTLR0_CANRMC3, 27 .EQU CANFD11_CTLR0_CANRMC2, 26 .EQU CANFD11_CTLR0_CANRMC1, 25 .EQU CANFD11_CTLR0_CANRMC0, 24 .EQU CANFD11_CTLR0_BOFF, 23 .EQU CANFD11_CTLR0_CERROR, 22 .EQU CANFD11_CTLR0_TXSTA, 21 .EQU CANFD11_CTLR0_RXSTA, 20 .EQU CANFD11_CTLR0_TCSTA, 19 .EQU CANFD11_CTLR0_DOSTA, 17 .EQU CANFD11_CTLR0_RXBSTA, 16 .EQU CANFD11_CTLR0_ANSWEREN, 15 .EQU CANFD11_CTLR0_FULLRXEN, 14 .EQU CANFD11_CTLR0_MBSIZE1, 13 .EQU CANFD11_CTLR0_MBSIZE0, 12 .EQU CANFD11_CTLR0_RELF, 11 .EQU CANFD11_CTLR0_RELRX, 10 .EQU CANFD11_CTLR0_ATX, 9 .EQU CANFD11_CTLR0_TXR, 8 .EQU CANFD11_CTLR0_CANEN, 7 .EQU CANFD11_CTLR0_CANCKS1, 6 .EQU CANFD11_CTLR0_CANCKS0, 5 .EQU CANFD11_CTLR0_ISOFDCANEN, 4 .EQU CANFD11_CTLR0_SLEEP, 3 .EQU CANFD11_CTLR0_LBACK, 2 .EQU CANFD11_CTLR0_SILENT, 1 .EQU CANFD11_CTLR0_RSMOD, 0 // register------------------------------------- .EQU CANFD11_BRGR, 0x40004104 // 0x4000 4104 CANFD11_BRGR Bits------------------------------------- .EQU CANFD11_BRGR_HTSEG2_2, 28 .EQU CANFD11_BRGR_HTSEG2_1, 27 .EQU CANFD11_BRGR_HTSEG2_0, 26 .EQU CANFD11_BRGR_HTSEG1_3, 25 .EQU CANFD11_BRGR_HTSEG1_2, 24 .EQU CANFD11_BRGR_HTSEG1_1, 23 .EQU CANFD11_BRGR_HTSEG1_0, 22 .EQU CANFD11_BRGR_BRSBRP5, 21 .EQU CANFD11_BRGR_BRSBRP4, 20 .EQU CANFD11_BRGR_BRSBRP3, 19 .EQU CANFD11_BRGR_BRSBRP2, 18 .EQU CANFD11_BRGR_BRSBRP1, 17 .EQU CANFD11_BRGR_BRSBRP0, 16 .EQU CANFD11_BRGR_SAM, 15 .EQU CANFD11_BRGR_TSEG2_2, 14 .EQU CANFD11_BRGR_TSEG2_1, 13 .EQU CANFD11_BRGR_TSEG2_0, 12 .EQU CANFD11_BRGR_TSEG1_3, 11 .EQU CANFD11_BRGR_TSEG1_2, 10 .EQU CANFD11_BRGR_TSEG1_1, 9 .EQU CANFD11_BRGR_TSEG1_0, 8 .EQU CANFD11_BRGR_SJW1, 7 .EQU CANFD11_BRGR_SJW0, 6 .EQU CANFD11_BRGR_CANBRP5, 5 .EQU CANFD11_BRGR_CANBRP4, 4 .EQU CANFD11_BRGR_CANBRP3, 3 .EQU CANFD11_BRGR_CANBRP2, 2 .EQU CANFD11_BRGR_CANBRP1, 1 .EQU CANFD11_BRGR_CANBRP0, 0 // register------------------------------------- .EQU CANFD11_RCR, 0x40004108 // 0x4000 4108 CANFD11_RCR Bits------------------------------------- .EQU CANFD11_RCR_DPRAMOF, 16 .EQU CANFD11_RCR_CANERRC1, 15 .EQU CANFD11_RCR_CANERRC0, 14 .EQU CANFD11_RCR_CANDIR, 13 .EQU CANFD11_RCR_CANSEG4, 12 .EQU CANFD11_RCR_CANSEG3, 11 .EQU CANFD11_RCR_CANSEG2, 10 .EQU CANFD11_RCR_CANSEG1, 9 .EQU CANFD11_RCR_CANSEG0, 8 .EQU CANFD11_RCR_CANALC4, 4 .EQU CANFD11_RCR_CANALC3, 3 .EQU CANFD11_RCR_CANALC2, 2 .EQU CANFD11_RCR_CANALC1, 1 .EQU CANFD11_RCR_CANALC0, 0 // register------------------------------------- .EQU CANFD11_EROR, 0x4000410C // 0x4000 410C CANFD11_EROR Bits------------------------------------- .EQU CANFD11_EROR_DPRAMFEN, 31 .EQU CANFD11_EROR_SFDMOD, 30 .EQU CANFD11_EROR_SFDEN, 29 .EQU CANFD11_EROR_SOSFD4, 28 .EQU CANFD11_EROR_SOSFD3, 27 .EQU CANFD11_EROR_SOSFD2, 26 .EQU CANFD11_EROR_SOSFD1, 25 .EQU CANFD11_EROR_SOSFD0, 24 .EQU CANFD11_EROR_CANEWL7, 23 .EQU CANFD11_EROR_CANEWL6, 22 .EQU CANFD11_EROR_CANEWL5, 21 .EQU CANFD11_EROR_CANEWL4, 20 .EQU CANFD11_EROR_CANEWL3, 19 .EQU CANFD11_EROR_CANEWL2, 18 .EQU CANFD11_EROR_CANEWL1, 17 .EQU CANFD11_EROR_CANEWL0, 16 .EQU CANFD11_EROR_CANTXE7, 15 .EQU CANFD11_EROR_CANTXE6, 14 .EQU CANFD11_EROR_CANTXE5, 13 .EQU CANFD11_EROR_CANTXE4, 12 .EQU CANFD11_EROR_CANTXE3, 11 .EQU CANFD11_EROR_CANTXE2, 10 .EQU CANFD11_EROR_CANTXE1, 9 .EQU CANFD11_EROR_CANTXE0, 8 .EQU CANFD11_EROR_CANRXE7, 7 .EQU CANFD11_EROR_CANRXE6, 6 .EQU CANFD11_EROR_CANRXE5, 5 .EQU CANFD11_EROR_CANRXE4, 4 .EQU CANFD11_EROR_CANRXE3, 3 .EQU CANFD11_EROR_CANRXE2, 2 .EQU CANFD11_EROR_CANRXE1, 1 .EQU CANFD11_EROR_CANRXE0, 0 // register------------------------------------- .EQU CANFD11_CTLR2, 0x40004110 // 0x4000 4110 CANFD11_CTLR2 Bits------------------------------------- .EQU CANFD11_CTLR2_AMCKDIV1, 26 .EQU CANFD11_CTLR2_AMCKDIV0, 25 .EQU CANFD11_CTLR2_DESEL, 24 .EQU CANFD11_CTLR2_TDCVM6, 22 .EQU CANFD11_CTLR2_TDCVM5, 21 .EQU CANFD11_CTLR2_TDCVM4, 20 .EQU CANFD11_CTLR2_TDCVM3, 19 .EQU CANFD11_CTLR2_TDCVM2, 18 .EQU CANFD11_CTLR2_TDCVM1, 17 .EQU CANFD11_CTLR2_TDCVM0, 16 .EQU CANFD11_CTLR2_TDC0_1, 15 .EQU CANFD11_CTLR2_TDC0_0, 14 .EQU CANFD11_CTLR2_TDCSR1, 13 .EQU CANFD11_CTLR2_TDCSR0, 12 .EQU CANFD11_CTLR2_TDCS1, 11 .EQU CANFD11_CTLR2_TDCS0, 10 .EQU CANFD11_CTLR2_TDCAUT0, 9 .EQU CANFD11_CTLR2_TDCEN, 8 .EQU CANFD11_CTLR2_TDC0EN, 7 .EQU CANFD11_CTLR2_TDCV6, 6 .EQU CANFD11_CTLR2_TDCV5, 5 .EQU CANFD11_CTLR2_TDCV4, 4 .EQU CANFD11_CTLR2_TDCV3, 3 .EQU CANFD11_CTLR2_TDCV2, 2 .EQU CANFD11_CTLR2_TDCV1, 1 .EQU CANFD11_CTLR2_TDCV0, 0 // register------------------------------------- .EQU CANFD11_MSKR, 0x40004114 // 0x4000 4114 CANFD11_MSKR Bits------------------------------------- .EQU CANFD11_MSKR_MSK31, 31 .EQU CANFD11_MSKR_MSK30, 30 .EQU CANFD11_MSKR_MSK29, 29 .EQU CANFD11_MSKR_MSK28, 28 .EQU CANFD11_MSKR_MSK27, 27 .EQU CANFD11_MSKR_MSK26, 26 .EQU CANFD11_MSKR_MSK25, 25 .EQU CANFD11_MSKR_MSK24, 24 .EQU CANFD11_MSKR_MSK23, 23 .EQU CANFD11_MSKR_MSK22, 22 .EQU CANFD11_MSKR_MSK21, 21 .EQU CANFD11_MSKR_MSK20, 20 .EQU CANFD11_MSKR_MSK19, 19 .EQU CANFD11_MSKR_MSK18, 18 .EQU CANFD11_MSKR_MSK17, 17 .EQU CANFD11_MSKR_MSK16, 16 .EQU CANFD11_MSKR_MSK15, 15 .EQU CANFD11_MSKR_MSK14, 14 .EQU CANFD11_MSKR_MSK13, 13 .EQU CANFD11_MSKR_MSK12, 12 .EQU CANFD11_MSKR_MSK11, 11 .EQU CANFD11_MSKR_MSK10, 10 .EQU CANFD11_MSKR_MSK9, 9 .EQU CANFD11_MSKR_MSK8, 8 .EQU CANFD11_MSKR_MSK7, 7 .EQU CANFD11_MSKR_MSK6, 6 .EQU CANFD11_MSKR_MSK5, 5 .EQU CANFD11_MSKR_MSK4, 4 .EQU CANFD11_MSKR_MSK3, 3 .EQU CANFD11_MSKR_MSK2, 2 .EQU CANFD11_MSKR_MSK1, 1 .EQU CANFD11_MSKR_MSK0, 0 // register------------------------------------- .EQU CANFD11_IER, 0x40004118 // 0x4000 4118 CANFD11_IER Bits------------------------------------- .EQU CANFD11_IER_FAILCLR, 31 .EQU CANFD11_IER_LPCANGPIOSEL0, 30 .EQU CANFD11_IER_BOFFIC, 28 .EQU CANFD11_IER_TRGMBIC, 27 .EQU CANFD11_IER_MOENDIC, 26 .EQU CANFD11_IER_BEIC, 23 .EQU CANFD11_IER_ALIC, 22 .EQU CANFD11_IER_ENIC, 21 .EQU CANFD11_IER_WUIC, 20 .EQU CANFD11_IER_DOVFIC, 19 .EQU CANFD11_IER_EAIC, 18 .EQU CANFD11_IER_CANTXIC, 17 .EQU CANFD11_IER_CANRXIC, 16 .EQU CANFD11_IER_MOENDIE, 15 .EQU CANFD11_IER_ARBFAILIE, 14 .EQU CANFD11_IER_BOFFIE, 12 .EQU CANFD11_IER_TRGMBIE, 11 .EQU CANFD11_IER_RXBSTAIE, 10 .EQU CANFD11_IER_CRXDE, 9 .EQU CANFD11_IER_CTXDE, 8 .EQU CANFD11_IER_BEIE, 7 .EQU CANFD11_IER_ALIE, 6 .EQU CANFD11_IER_ENIE, 5 .EQU CANFD11_IER_WUIE, 4 .EQU CANFD11_IER_DOVFIE, 3 .EQU CANFD11_IER_EAIE, 2 .EQU CANFD11_IER_CANTXIE, 1 .EQU CANFD11_IER_CANRXIE, 0 // register------------------------------------- .EQU CANFD11_IFR, 0x4000411C // 0x4000 411C CANFD11_IFR Bits------------------------------------- .EQU CANFD11_IFR_MOENDIF, 14 .EQU CANFD11_IFR_BOFFIF, 12 .EQU CANFD11_IFR_TRGMBIF, 11 .EQU CANFD11_IFR_RXBSTAIF, 10 .EQU CANFD11_IFR_CRXDF, 9 .EQU CANFD11_IFR_CTXDF, 8 .EQU CANFD11_IFR_BEIF, 7 .EQU CANFD11_IFR_ALIF, 6 .EQU CANFD11_IFR_ENIF, 5 .EQU CANFD11_IFR_WUIF, 4 .EQU CANFD11_IFR_DOVFIF, 3 .EQU CANFD11_IFR_EAIF, 2 .EQU CANFD11_IFR_CANTXIF, 1 .EQU CANFD11_IFR_CANRXIF, 0 // register------------------------------------- .EQU CANFD11_RXDATA0, 0x40004120 // 0x4000 4120 CANFD11_RXDATA0 Bits------------------------------------- .EQU CANFD11_RXDATA0_RXDATA0_31, 31 .EQU CANFD11_RXDATA0_RXDATA0_30, 30 .EQU CANFD11_RXDATA0_RXDATA0_29, 29 .EQU CANFD11_RXDATA0_RXDATA0_28, 28 .EQU CANFD11_RXDATA0_RXDATA0_27, 27 .EQU CANFD11_RXDATA0_RXDATA0_26, 26 .EQU CANFD11_RXDATA0_RXDATA0_25, 25 .EQU CANFD11_RXDATA0_RXDATA0_24, 24 .EQU CANFD11_RXDATA0_RXDATA0_23, 23 .EQU CANFD11_RXDATA0_RXDATA0_22, 22 .EQU CANFD11_RXDATA0_RXDATA0_21, 21 .EQU CANFD11_RXDATA0_RXDATA0_20, 20 .EQU CANFD11_RXDATA0_RXDATA0_19, 19 .EQU CANFD11_RXDATA0_RXDATA0_18, 18 .EQU CANFD11_RXDATA0_RXDATA0_17, 17 .EQU CANFD11_RXDATA0_RXDATA0_16, 16 .EQU CANFD11_RXDATA0_RXDATA0_15, 15 .EQU CANFD11_RXDATA0_RXDATA0_14, 14 .EQU CANFD11_RXDATA0_RXDATA0_13, 13 .EQU CANFD11_RXDATA0_RXDATA0_12, 12 .EQU CANFD11_RXDATA0_RXDATA0_11, 11 .EQU CANFD11_RXDATA0_RXDATA0_10, 10 .EQU CANFD11_RXDATA0_RXDATA0_9, 9 .EQU CANFD11_RXDATA0_RXDATA0_8, 8 .EQU CANFD11_RXDATA0_RXDATA0_7, 7 .EQU CANFD11_RXDATA0_RXDATA0_6, 6 .EQU CANFD11_RXDATA0_RXDATA0_5, 5 .EQU CANFD11_RXDATA0_RXDATA0_4, 4 .EQU CANFD11_RXDATA0_RXDATA0_3, 3 .EQU CANFD11_RXDATA0_RXDATA0_2, 2 .EQU CANFD11_RXDATA0_RXDATA0_1, 1 .EQU CANFD11_RXDATA0_RXDATA0_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA1, 0x40004124 // 0x4000 4124 CANFD11_RXDATA1 Bits------------------------------------- .EQU CANFD11_RXDATA1_RXDATA1_31, 31 .EQU CANFD11_RXDATA1_RXDATA1_30, 30 .EQU CANFD11_RXDATA1_RXDATA1_29, 29 .EQU CANFD11_RXDATA1_RXDATA1_28, 28 .EQU CANFD11_RXDATA1_RXDATA1_27, 27 .EQU CANFD11_RXDATA1_RXDATA1_26, 26 .EQU CANFD11_RXDATA1_RXDATA1_25, 25 .EQU CANFD11_RXDATA1_RXDATA1_24, 24 .EQU CANFD11_RXDATA1_RXDATA1_23, 23 .EQU CANFD11_RXDATA1_RXDATA1_22, 22 .EQU CANFD11_RXDATA1_RXDATA1_21, 21 .EQU CANFD11_RXDATA1_RXDATA1_20, 20 .EQU CANFD11_RXDATA1_RXDATA1_19, 19 .EQU CANFD11_RXDATA1_RXDATA1_18, 18 .EQU CANFD11_RXDATA1_RXDATA1_17, 17 .EQU CANFD11_RXDATA1_RXDATA1_16, 16 .EQU CANFD11_RXDATA1_RXDATA1_15, 15 .EQU CANFD11_RXDATA1_RXDATA1_14, 14 .EQU CANFD11_RXDATA1_RXDATA1_13, 13 .EQU CANFD11_RXDATA1_RXDATA1_12, 12 .EQU CANFD11_RXDATA1_RXDATA1_11, 11 .EQU CANFD11_RXDATA1_RXDATA1_10, 10 .EQU CANFD11_RXDATA1_RXDATA1_9, 9 .EQU CANFD11_RXDATA1_RXDATA1_8, 8 .EQU CANFD11_RXDATA1_RXDATA1_7, 7 .EQU CANFD11_RXDATA1_RXDATA1_6, 6 .EQU CANFD11_RXDATA1_RXDATA1_5, 5 .EQU CANFD11_RXDATA1_RXDATA1_4, 4 .EQU CANFD11_RXDATA1_RXDATA1_3, 3 .EQU CANFD11_RXDATA1_RXDATA1_2, 2 .EQU CANFD11_RXDATA1_RXDATA1_1, 1 .EQU CANFD11_RXDATA1_RXDATA1_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA2, 0x40004128 // 0x4000 4128 CANFD11_RXDATA2 Bits------------------------------------- .EQU CANFD11_RXDATA2_RXDATA2_31, 31 .EQU CANFD11_RXDATA2_RXDATA2_30, 30 .EQU CANFD11_RXDATA2_RXDATA2_29, 29 .EQU CANFD11_RXDATA2_RXDATA2_28, 28 .EQU CANFD11_RXDATA2_RXDATA2_27, 27 .EQU CANFD11_RXDATA2_RXDATA2_26, 26 .EQU CANFD11_RXDATA2_RXDATA2_25, 25 .EQU CANFD11_RXDATA2_RXDATA2_24, 24 .EQU CANFD11_RXDATA2_RXDATA2_23, 23 .EQU CANFD11_RXDATA2_RXDATA2_22, 22 .EQU CANFD11_RXDATA2_RXDATA2_21, 21 .EQU CANFD11_RXDATA2_RXDATA2_20, 20 .EQU CANFD11_RXDATA2_RXDATA2_19, 19 .EQU CANFD11_RXDATA2_RXDATA2_18, 18 .EQU CANFD11_RXDATA2_RXDATA2_17, 17 .EQU CANFD11_RXDATA2_RXDATA2_16, 16 .EQU CANFD11_RXDATA2_RXDATA2_15, 15 .EQU CANFD11_RXDATA2_RXDATA2_14, 14 .EQU CANFD11_RXDATA2_RXDATA2_13, 13 .EQU CANFD11_RXDATA2_RXDATA2_12, 12 .EQU CANFD11_RXDATA2_RXDATA2_11, 11 .EQU CANFD11_RXDATA2_RXDATA2_10, 10 .EQU CANFD11_RXDATA2_RXDATA2_9, 9 .EQU CANFD11_RXDATA2_RXDATA2_8, 8 .EQU CANFD11_RXDATA2_RXDATA2_7, 7 .EQU CANFD11_RXDATA2_RXDATA2_6, 6 .EQU CANFD11_RXDATA2_RXDATA2_5, 5 .EQU CANFD11_RXDATA2_RXDATA2_4, 4 .EQU CANFD11_RXDATA2_RXDATA2_3, 3 .EQU CANFD11_RXDATA2_RXDATA2_2, 2 .EQU CANFD11_RXDATA2_RXDATA2_1, 1 .EQU CANFD11_RXDATA2_RXDATA2_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA3, 0x4000412C // 0x4000 412C CANFD11_RXDATA3 Bits------------------------------------- .EQU CANFD11_RXDATA3_RXDATA3_31, 31 .EQU CANFD11_RXDATA3_RXDATA3_30, 30 .EQU CANFD11_RXDATA3_RXDATA3_29, 29 .EQU CANFD11_RXDATA3_RXDATA3_28, 28 .EQU CANFD11_RXDATA3_RXDATA3_27, 27 .EQU CANFD11_RXDATA3_RXDATA3_26, 26 .EQU CANFD11_RXDATA3_RXDATA3_25, 25 .EQU CANFD11_RXDATA3_RXDATA3_24, 24 .EQU CANFD11_RXDATA3_RXDATA3_23, 23 .EQU CANFD11_RXDATA3_RXDATA3_22, 22 .EQU CANFD11_RXDATA3_RXDATA3_21, 21 .EQU CANFD11_RXDATA3_RXDATA3_20, 20 .EQU CANFD11_RXDATA3_RXDATA3_19, 19 .EQU CANFD11_RXDATA3_RXDATA3_18, 18 .EQU CANFD11_RXDATA3_RXDATA3_17, 17 .EQU CANFD11_RXDATA3_RXDATA3_16, 16 .EQU CANFD11_RXDATA3_RXDATA3_15, 15 .EQU CANFD11_RXDATA3_RXDATA3_14, 14 .EQU CANFD11_RXDATA3_RXDATA3_13, 13 .EQU CANFD11_RXDATA3_RXDATA3_12, 12 .EQU CANFD11_RXDATA3_RXDATA3_11, 11 .EQU CANFD11_RXDATA3_RXDATA3_10, 10 .EQU CANFD11_RXDATA3_RXDATA3_9, 9 .EQU CANFD11_RXDATA3_RXDATA3_8, 8 .EQU CANFD11_RXDATA3_RXDATA3_7, 7 .EQU CANFD11_RXDATA3_RXDATA3_6, 6 .EQU CANFD11_RXDATA3_RXDATA3_5, 5 .EQU CANFD11_RXDATA3_RXDATA3_4, 4 .EQU CANFD11_RXDATA3_RXDATA3_3, 3 .EQU CANFD11_RXDATA3_RXDATA3_2, 2 .EQU CANFD11_RXDATA3_RXDATA3_1, 1 .EQU CANFD11_RXDATA3_RXDATA3_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA4, 0x40004130 // 0x4000 4130 CANFD11_RXDATA4 Bits------------------------------------- .EQU CANFD11_RXDATA4_RXDATA4_31, 31 .EQU CANFD11_RXDATA4_RXDATA4_30, 30 .EQU CANFD11_RXDATA4_RXDATA4_29, 29 .EQU CANFD11_RXDATA4_RXDATA4_28, 28 .EQU CANFD11_RXDATA4_RXDATA4_27, 27 .EQU CANFD11_RXDATA4_RXDATA4_26, 26 .EQU CANFD11_RXDATA4_RXDATA4_25, 25 .EQU CANFD11_RXDATA4_RXDATA4_24, 24 .EQU CANFD11_RXDATA4_RXDATA4_23, 23 .EQU CANFD11_RXDATA4_RXDATA4_22, 22 .EQU CANFD11_RXDATA4_RXDATA4_21, 21 .EQU CANFD11_RXDATA4_RXDATA4_20, 20 .EQU CANFD11_RXDATA4_RXDATA4_19, 19 .EQU CANFD11_RXDATA4_RXDATA4_18, 18 .EQU CANFD11_RXDATA4_RXDATA4_17, 17 .EQU CANFD11_RXDATA4_RXDATA4_16, 16 .EQU CANFD11_RXDATA4_RXDATA4_15, 15 .EQU CANFD11_RXDATA4_RXDATA4_14, 14 .EQU CANFD11_RXDATA4_RXDATA4_13, 13 .EQU CANFD11_RXDATA4_RXDATA4_12, 12 .EQU CANFD11_RXDATA4_RXDATA4_11, 11 .EQU CANFD11_RXDATA4_RXDATA4_10, 10 .EQU CANFD11_RXDATA4_RXDATA4_9, 9 .EQU CANFD11_RXDATA4_RXDATA4_8, 8 .EQU CANFD11_RXDATA4_RXDATA4_7, 7 .EQU CANFD11_RXDATA4_RXDATA4_6, 6 .EQU CANFD11_RXDATA4_RXDATA4_5, 5 .EQU CANFD11_RXDATA4_RXDATA4_4, 4 .EQU CANFD11_RXDATA4_RXDATA4_3, 3 .EQU CANFD11_RXDATA4_RXDATA4_2, 2 .EQU CANFD11_RXDATA4_RXDATA4_1, 1 .EQU CANFD11_RXDATA4_RXDATA4_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA5, 0x40004134 // 0x4000 4134 CANFD11_RXDATA5 Bits------------------------------------- .EQU CANFD11_RXDATA5_RXDATA5_31, 31 .EQU CANFD11_RXDATA5_RXDATA5_30, 30 .EQU CANFD11_RXDATA5_RXDATA5_29, 29 .EQU CANFD11_RXDATA5_RXDATA5_28, 28 .EQU CANFD11_RXDATA5_RXDATA5_27, 27 .EQU CANFD11_RXDATA5_RXDATA5_26, 26 .EQU CANFD11_RXDATA5_RXDATA5_25, 25 .EQU CANFD11_RXDATA5_RXDATA5_24, 24 .EQU CANFD11_RXDATA5_RXDATA5_23, 23 .EQU CANFD11_RXDATA5_RXDATA5_22, 22 .EQU CANFD11_RXDATA5_RXDATA5_21, 21 .EQU CANFD11_RXDATA5_RXDATA5_20, 20 .EQU CANFD11_RXDATA5_RXDATA5_19, 19 .EQU CANFD11_RXDATA5_RXDATA5_18, 18 .EQU CANFD11_RXDATA5_RXDATA5_17, 17 .EQU CANFD11_RXDATA5_RXDATA5_16, 16 .EQU CANFD11_RXDATA5_RXDATA5_15, 15 .EQU CANFD11_RXDATA5_RXDATA5_14, 14 .EQU CANFD11_RXDATA5_RXDATA5_13, 13 .EQU CANFD11_RXDATA5_RXDATA5_12, 12 .EQU CANFD11_RXDATA5_RXDATA5_11, 11 .EQU CANFD11_RXDATA5_RXDATA5_10, 10 .EQU CANFD11_RXDATA5_RXDATA5_9, 9 .EQU CANFD11_RXDATA5_RXDATA5_8, 8 .EQU CANFD11_RXDATA5_RXDATA5_7, 7 .EQU CANFD11_RXDATA5_RXDATA5_6, 6 .EQU CANFD11_RXDATA5_RXDATA5_5, 5 .EQU CANFD11_RXDATA5_RXDATA5_4, 4 .EQU CANFD11_RXDATA5_RXDATA5_3, 3 .EQU CANFD11_RXDATA5_RXDATA5_2, 2 .EQU CANFD11_RXDATA5_RXDATA5_1, 1 .EQU CANFD11_RXDATA5_RXDATA5_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA6, 0x40004138 // 0x4000 4138 CANFD11_RXDATA6 Bits------------------------------------- .EQU CANFD11_RXDATA6_RXDATA6_31, 31 .EQU CANFD11_RXDATA6_RXDATA6_30, 30 .EQU CANFD11_RXDATA6_RXDATA6_29, 29 .EQU CANFD11_RXDATA6_RXDATA6_28, 28 .EQU CANFD11_RXDATA6_RXDATA6_27, 27 .EQU CANFD11_RXDATA6_RXDATA6_26, 26 .EQU CANFD11_RXDATA6_RXDATA6_25, 25 .EQU CANFD11_RXDATA6_RXDATA6_24, 24 .EQU CANFD11_RXDATA6_RXDATA6_23, 23 .EQU CANFD11_RXDATA6_RXDATA6_22, 22 .EQU CANFD11_RXDATA6_RXDATA6_21, 21 .EQU CANFD11_RXDATA6_RXDATA6_20, 20 .EQU CANFD11_RXDATA6_RXDATA6_19, 19 .EQU CANFD11_RXDATA6_RXDATA6_18, 18 .EQU CANFD11_RXDATA6_RXDATA6_17, 17 .EQU CANFD11_RXDATA6_RXDATA6_16, 16 .EQU CANFD11_RXDATA6_RXDATA6_15, 15 .EQU CANFD11_RXDATA6_RXDATA6_14, 14 .EQU CANFD11_RXDATA6_RXDATA6_13, 13 .EQU CANFD11_RXDATA6_RXDATA6_12, 12 .EQU CANFD11_RXDATA6_RXDATA6_11, 11 .EQU CANFD11_RXDATA6_RXDATA6_10, 10 .EQU CANFD11_RXDATA6_RXDATA6_9, 9 .EQU CANFD11_RXDATA6_RXDATA6_8, 8 .EQU CANFD11_RXDATA6_RXDATA6_7, 7 .EQU CANFD11_RXDATA6_RXDATA6_6, 6 .EQU CANFD11_RXDATA6_RXDATA6_5, 5 .EQU CANFD11_RXDATA6_RXDATA6_4, 4 .EQU CANFD11_RXDATA6_RXDATA6_3, 3 .EQU CANFD11_RXDATA6_RXDATA6_2, 2 .EQU CANFD11_RXDATA6_RXDATA6_1, 1 .EQU CANFD11_RXDATA6_RXDATA6_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA7, 0x4000413C // 0x4000 413C CANFD11_RXDATA7 Bits------------------------------------- .EQU CANFD11_RXDATA7_RXDATA7_31, 31 .EQU CANFD11_RXDATA7_RXDATA7_30, 30 .EQU CANFD11_RXDATA7_RXDATA7_29, 29 .EQU CANFD11_RXDATA7_RXDATA7_28, 28 .EQU CANFD11_RXDATA7_RXDATA7_27, 27 .EQU CANFD11_RXDATA7_RXDATA7_26, 26 .EQU CANFD11_RXDATA7_RXDATA7_25, 25 .EQU CANFD11_RXDATA7_RXDATA7_24, 24 .EQU CANFD11_RXDATA7_RXDATA7_23, 23 .EQU CANFD11_RXDATA7_RXDATA7_22, 22 .EQU CANFD11_RXDATA7_RXDATA7_21, 21 .EQU CANFD11_RXDATA7_RXDATA7_20, 20 .EQU CANFD11_RXDATA7_RXDATA7_19, 19 .EQU CANFD11_RXDATA7_RXDATA7_18, 18 .EQU CANFD11_RXDATA7_RXDATA7_17, 17 .EQU CANFD11_RXDATA7_RXDATA7_16, 16 .EQU CANFD11_RXDATA7_RXDATA7_15, 15 .EQU CANFD11_RXDATA7_RXDATA7_14, 14 .EQU CANFD11_RXDATA7_RXDATA7_13, 13 .EQU CANFD11_RXDATA7_RXDATA7_12, 12 .EQU CANFD11_RXDATA7_RXDATA7_11, 11 .EQU CANFD11_RXDATA7_RXDATA7_10, 10 .EQU CANFD11_RXDATA7_RXDATA7_9, 9 .EQU CANFD11_RXDATA7_RXDATA7_8, 8 .EQU CANFD11_RXDATA7_RXDATA7_7, 7 .EQU CANFD11_RXDATA7_RXDATA7_6, 6 .EQU CANFD11_RXDATA7_RXDATA7_5, 5 .EQU CANFD11_RXDATA7_RXDATA7_4, 4 .EQU CANFD11_RXDATA7_RXDATA7_3, 3 .EQU CANFD11_RXDATA7_RXDATA7_2, 2 .EQU CANFD11_RXDATA7_RXDATA7_1, 1 .EQU CANFD11_RXDATA7_RXDATA7_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA8, 0x40004140 // 0x4000 4140 CANFD11_RXDATA8 Bits------------------------------------- .EQU CANFD11_RXDATA8_RXDATA8_31, 31 .EQU CANFD11_RXDATA8_RXDATA8_30, 30 .EQU CANFD11_RXDATA8_RXDATA8_29, 29 .EQU CANFD11_RXDATA8_RXDATA8_28, 28 .EQU CANFD11_RXDATA8_RXDATA8_27, 27 .EQU CANFD11_RXDATA8_RXDATA8_26, 26 .EQU CANFD11_RXDATA8_RXDATA8_25, 25 .EQU CANFD11_RXDATA8_RXDATA8_24, 24 .EQU CANFD11_RXDATA8_RXDATA8_23, 23 .EQU CANFD11_RXDATA8_RXDATA8_22, 22 .EQU CANFD11_RXDATA8_RXDATA8_21, 21 .EQU CANFD11_RXDATA8_RXDATA8_20, 20 .EQU CANFD11_RXDATA8_RXDATA8_19, 19 .EQU CANFD11_RXDATA8_RXDATA8_18, 18 .EQU CANFD11_RXDATA8_RXDATA8_17, 17 .EQU CANFD11_RXDATA8_RXDATA8_16, 16 .EQU CANFD11_RXDATA8_RXDATA8_15, 15 .EQU CANFD11_RXDATA8_RXDATA8_14, 14 .EQU CANFD11_RXDATA8_RXDATA8_13, 13 .EQU CANFD11_RXDATA8_RXDATA8_12, 12 .EQU CANFD11_RXDATA8_RXDATA8_11, 11 .EQU CANFD11_RXDATA8_RXDATA8_10, 10 .EQU CANFD11_RXDATA8_RXDATA8_9, 9 .EQU CANFD11_RXDATA8_RXDATA8_8, 8 .EQU CANFD11_RXDATA8_RXDATA8_7, 7 .EQU CANFD11_RXDATA8_RXDATA8_6, 6 .EQU CANFD11_RXDATA8_RXDATA8_5, 5 .EQU CANFD11_RXDATA8_RXDATA8_4, 4 .EQU CANFD11_RXDATA8_RXDATA8_3, 3 .EQU CANFD11_RXDATA8_RXDATA8_2, 2 .EQU CANFD11_RXDATA8_RXDATA8_1, 1 .EQU CANFD11_RXDATA8_RXDATA8_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA9, 0x40004144 // 0x4000 4144 CANFD11_RXDATA9 Bits------------------------------------- .EQU CANFD11_RXDATA9_RXDATA9_31, 31 .EQU CANFD11_RXDATA9_RXDATA9_30, 30 .EQU CANFD11_RXDATA9_RXDATA9_29, 29 .EQU CANFD11_RXDATA9_RXDATA9_28, 28 .EQU CANFD11_RXDATA9_RXDATA9_27, 27 .EQU CANFD11_RXDATA9_RXDATA9_26, 26 .EQU CANFD11_RXDATA9_RXDATA9_25, 25 .EQU CANFD11_RXDATA9_RXDATA9_24, 24 .EQU CANFD11_RXDATA9_RXDATA9_23, 23 .EQU CANFD11_RXDATA9_RXDATA9_22, 22 .EQU CANFD11_RXDATA9_RXDATA9_21, 21 .EQU CANFD11_RXDATA9_RXDATA9_20, 20 .EQU CANFD11_RXDATA9_RXDATA9_19, 19 .EQU CANFD11_RXDATA9_RXDATA9_18, 18 .EQU CANFD11_RXDATA9_RXDATA9_17, 17 .EQU CANFD11_RXDATA9_RXDATA9_16, 16 .EQU CANFD11_RXDATA9_RXDATA9_15, 15 .EQU CANFD11_RXDATA9_RXDATA9_14, 14 .EQU CANFD11_RXDATA9_RXDATA9_13, 13 .EQU CANFD11_RXDATA9_RXDATA9_12, 12 .EQU CANFD11_RXDATA9_RXDATA9_11, 11 .EQU CANFD11_RXDATA9_RXDATA9_10, 10 .EQU CANFD11_RXDATA9_RXDATA9_9, 9 .EQU CANFD11_RXDATA9_RXDATA9_8, 8 .EQU CANFD11_RXDATA9_RXDATA9_7, 7 .EQU CANFD11_RXDATA9_RXDATA9_6, 6 .EQU CANFD11_RXDATA9_RXDATA9_5, 5 .EQU CANFD11_RXDATA9_RXDATA9_4, 4 .EQU CANFD11_RXDATA9_RXDATA9_3, 3 .EQU CANFD11_RXDATA9_RXDATA9_2, 2 .EQU CANFD11_RXDATA9_RXDATA9_1, 1 .EQU CANFD11_RXDATA9_RXDATA9_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA10, 0x40004148 // 0x4000 4148 CANFD11_RXDATA10 Bits------------------------------------- .EQU CANFD11_RXDATA10_RXDATA10_31, 31 .EQU CANFD11_RXDATA10_RXDATA10_30, 30 .EQU CANFD11_RXDATA10_RXDATA10_29, 29 .EQU CANFD11_RXDATA10_RXDATA10_28, 28 .EQU CANFD11_RXDATA10_RXDATA10_27, 27 .EQU CANFD11_RXDATA10_RXDATA10_26, 26 .EQU CANFD11_RXDATA10_RXDATA10_25, 25 .EQU CANFD11_RXDATA10_RXDATA10_24, 24 .EQU CANFD11_RXDATA10_RXDATA10_23, 23 .EQU CANFD11_RXDATA10_RXDATA10_22, 22 .EQU CANFD11_RXDATA10_RXDATA10_21, 21 .EQU CANFD11_RXDATA10_RXDATA10_20, 20 .EQU CANFD11_RXDATA10_RXDATA10_19, 19 .EQU CANFD11_RXDATA10_RXDATA10_18, 18 .EQU CANFD11_RXDATA10_RXDATA10_17, 17 .EQU CANFD11_RXDATA10_RXDATA10_16, 16 .EQU CANFD11_RXDATA10_RXDATA10_15, 15 .EQU CANFD11_RXDATA10_RXDATA10_14, 14 .EQU CANFD11_RXDATA10_RXDATA10_13, 13 .EQU CANFD11_RXDATA10_RXDATA10_12, 12 .EQU CANFD11_RXDATA10_RXDATA10_11, 11 .EQU CANFD11_RXDATA10_RXDATA10_10, 10 .EQU CANFD11_RXDATA10_RXDATA10_9, 9 .EQU CANFD11_RXDATA10_RXDATA10_8, 8 .EQU CANFD11_RXDATA10_RXDATA10_7, 7 .EQU CANFD11_RXDATA10_RXDATA10_6, 6 .EQU CANFD11_RXDATA10_RXDATA10_5, 5 .EQU CANFD11_RXDATA10_RXDATA10_4, 4 .EQU CANFD11_RXDATA10_RXDATA10_3, 3 .EQU CANFD11_RXDATA10_RXDATA10_2, 2 .EQU CANFD11_RXDATA10_RXDATA10_1, 1 .EQU CANFD11_RXDATA10_RXDATA10_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA11, 0x4000414C // 0x4000 414C CANFD11_RXDATA11 Bits------------------------------------- .EQU CANFD11_RXDATA11_RXDATA11_31, 31 .EQU CANFD11_RXDATA11_RXDATA11_30, 30 .EQU CANFD11_RXDATA11_RXDATA11_29, 29 .EQU CANFD11_RXDATA11_RXDATA11_28, 28 .EQU CANFD11_RXDATA11_RXDATA11_27, 27 .EQU CANFD11_RXDATA11_RXDATA11_26, 26 .EQU CANFD11_RXDATA11_RXDATA11_25, 25 .EQU CANFD11_RXDATA11_RXDATA11_24, 24 .EQU CANFD11_RXDATA11_RXDATA11_23, 23 .EQU CANFD11_RXDATA11_RXDATA11_22, 22 .EQU CANFD11_RXDATA11_RXDATA11_21, 21 .EQU CANFD11_RXDATA11_RXDATA11_20, 20 .EQU CANFD11_RXDATA11_RXDATA11_19, 19 .EQU CANFD11_RXDATA11_RXDATA11_18, 18 .EQU CANFD11_RXDATA11_RXDATA11_17, 17 .EQU CANFD11_RXDATA11_RXDATA11_16, 16 .EQU CANFD11_RXDATA11_RXDATA11_15, 15 .EQU CANFD11_RXDATA11_RXDATA11_14, 14 .EQU CANFD11_RXDATA11_RXDATA11_13, 13 .EQU CANFD11_RXDATA11_RXDATA11_12, 12 .EQU CANFD11_RXDATA11_RXDATA11_11, 11 .EQU CANFD11_RXDATA11_RXDATA11_10, 10 .EQU CANFD11_RXDATA11_RXDATA11_9, 9 .EQU CANFD11_RXDATA11_RXDATA11_8, 8 .EQU CANFD11_RXDATA11_RXDATA11_7, 7 .EQU CANFD11_RXDATA11_RXDATA11_6, 6 .EQU CANFD11_RXDATA11_RXDATA11_5, 5 .EQU CANFD11_RXDATA11_RXDATA11_4, 4 .EQU CANFD11_RXDATA11_RXDATA11_3, 3 .EQU CANFD11_RXDATA11_RXDATA11_2, 2 .EQU CANFD11_RXDATA11_RXDATA11_1, 1 .EQU CANFD11_RXDATA11_RXDATA11_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA12, 0x40004150 // 0x4000 4150 CANFD11_RXDATA12 Bits------------------------------------- .EQU CANFD11_RXDATA12_RXDATA12_31, 31 .EQU CANFD11_RXDATA12_RXDATA12_30, 30 .EQU CANFD11_RXDATA12_RXDATA12_29, 29 .EQU CANFD11_RXDATA12_RXDATA12_28, 28 .EQU CANFD11_RXDATA12_RXDATA12_27, 27 .EQU CANFD11_RXDATA12_RXDATA12_26, 26 .EQU CANFD11_RXDATA12_RXDATA12_25, 25 .EQU CANFD11_RXDATA12_RXDATA12_24, 24 .EQU CANFD11_RXDATA12_RXDATA12_23, 23 .EQU CANFD11_RXDATA12_RXDATA12_22, 22 .EQU CANFD11_RXDATA12_RXDATA12_21, 21 .EQU CANFD11_RXDATA12_RXDATA12_20, 20 .EQU CANFD11_RXDATA12_RXDATA12_19, 19 .EQU CANFD11_RXDATA12_RXDATA12_18, 18 .EQU CANFD11_RXDATA12_RXDATA12_17, 17 .EQU CANFD11_RXDATA12_RXDATA12_16, 16 .EQU CANFD11_RXDATA12_RXDATA12_15, 15 .EQU CANFD11_RXDATA12_RXDATA12_14, 14 .EQU CANFD11_RXDATA12_RXDATA12_13, 13 .EQU CANFD11_RXDATA12_RXDATA12_12, 12 .EQU CANFD11_RXDATA12_RXDATA12_11, 11 .EQU CANFD11_RXDATA12_RXDATA12_10, 10 .EQU CANFD11_RXDATA12_RXDATA12_9, 9 .EQU CANFD11_RXDATA12_RXDATA12_8, 8 .EQU CANFD11_RXDATA12_RXDATA12_7, 7 .EQU CANFD11_RXDATA12_RXDATA12_6, 6 .EQU CANFD11_RXDATA12_RXDATA12_5, 5 .EQU CANFD11_RXDATA12_RXDATA12_4, 4 .EQU CANFD11_RXDATA12_RXDATA12_3, 3 .EQU CANFD11_RXDATA12_RXDATA12_2, 2 .EQU CANFD11_RXDATA12_RXDATA12_1, 1 .EQU CANFD11_RXDATA12_RXDATA12_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA13, 0x40004154 // 0x4000 4154 CANFD11_RXDATA13 Bits------------------------------------- .EQU CANFD11_RXDATA13_RXDATA13_31, 31 .EQU CANFD11_RXDATA13_RXDATA13_30, 30 .EQU CANFD11_RXDATA13_RXDATA13_29, 29 .EQU CANFD11_RXDATA13_RXDATA13_28, 28 .EQU CANFD11_RXDATA13_RXDATA13_27, 27 .EQU CANFD11_RXDATA13_RXDATA13_26, 26 .EQU CANFD11_RXDATA13_RXDATA13_25, 25 .EQU CANFD11_RXDATA13_RXDATA13_24, 24 .EQU CANFD11_RXDATA13_RXDATA13_23, 23 .EQU CANFD11_RXDATA13_RXDATA13_22, 22 .EQU CANFD11_RXDATA13_RXDATA13_21, 21 .EQU CANFD11_RXDATA13_RXDATA13_20, 20 .EQU CANFD11_RXDATA13_RXDATA13_19, 19 .EQU CANFD11_RXDATA13_RXDATA13_18, 18 .EQU CANFD11_RXDATA13_RXDATA13_17, 17 .EQU CANFD11_RXDATA13_RXDATA13_16, 16 .EQU CANFD11_RXDATA13_RXDATA13_15, 15 .EQU CANFD11_RXDATA13_RXDATA13_14, 14 .EQU CANFD11_RXDATA13_RXDATA13_13, 13 .EQU CANFD11_RXDATA13_RXDATA13_12, 12 .EQU CANFD11_RXDATA13_RXDATA13_11, 11 .EQU CANFD11_RXDATA13_RXDATA13_10, 10 .EQU CANFD11_RXDATA13_RXDATA13_9, 9 .EQU CANFD11_RXDATA13_RXDATA13_8, 8 .EQU CANFD11_RXDATA13_RXDATA13_7, 7 .EQU CANFD11_RXDATA13_RXDATA13_6, 6 .EQU CANFD11_RXDATA13_RXDATA13_5, 5 .EQU CANFD11_RXDATA13_RXDATA13_4, 4 .EQU CANFD11_RXDATA13_RXDATA13_3, 3 .EQU CANFD11_RXDATA13_RXDATA13_2, 2 .EQU CANFD11_RXDATA13_RXDATA13_1, 1 .EQU CANFD11_RXDATA13_RXDATA13_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA14, 0x40004158 // 0x4000 4158 CANFD11_RXDATA14 Bits------------------------------------- .EQU CANFD11_RXDATA14_RXDATA14_31, 31 .EQU CANFD11_RXDATA14_RXDATA14_30, 30 .EQU CANFD11_RXDATA14_RXDATA14_29, 29 .EQU CANFD11_RXDATA14_RXDATA14_28, 28 .EQU CANFD11_RXDATA14_RXDATA14_27, 27 .EQU CANFD11_RXDATA14_RXDATA14_26, 26 .EQU CANFD11_RXDATA14_RXDATA14_25, 25 .EQU CANFD11_RXDATA14_RXDATA14_24, 24 .EQU CANFD11_RXDATA14_RXDATA14_23, 23 .EQU CANFD11_RXDATA14_RXDATA14_22, 22 .EQU CANFD11_RXDATA14_RXDATA14_21, 21 .EQU CANFD11_RXDATA14_RXDATA14_20, 20 .EQU CANFD11_RXDATA14_RXDATA14_19, 19 .EQU CANFD11_RXDATA14_RXDATA14_18, 18 .EQU CANFD11_RXDATA14_RXDATA14_17, 17 .EQU CANFD11_RXDATA14_RXDATA14_16, 16 .EQU CANFD11_RXDATA14_RXDATA14_15, 15 .EQU CANFD11_RXDATA14_RXDATA14_14, 14 .EQU CANFD11_RXDATA14_RXDATA14_13, 13 .EQU CANFD11_RXDATA14_RXDATA14_12, 12 .EQU CANFD11_RXDATA14_RXDATA14_11, 11 .EQU CANFD11_RXDATA14_RXDATA14_10, 10 .EQU CANFD11_RXDATA14_RXDATA14_9, 9 .EQU CANFD11_RXDATA14_RXDATA14_8, 8 .EQU CANFD11_RXDATA14_RXDATA14_7, 7 .EQU CANFD11_RXDATA14_RXDATA14_6, 6 .EQU CANFD11_RXDATA14_RXDATA14_5, 5 .EQU CANFD11_RXDATA14_RXDATA14_4, 4 .EQU CANFD11_RXDATA14_RXDATA14_3, 3 .EQU CANFD11_RXDATA14_RXDATA14_2, 2 .EQU CANFD11_RXDATA14_RXDATA14_1, 1 .EQU CANFD11_RXDATA14_RXDATA14_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA15, 0x4000415C // 0x4000 415C CANFD11_RXDATA15 Bits------------------------------------- .EQU CANFD11_RXDATA15_RXDATA15_31, 31 .EQU CANFD11_RXDATA15_RXDATA15_30, 30 .EQU CANFD11_RXDATA15_RXDATA15_29, 29 .EQU CANFD11_RXDATA15_RXDATA15_28, 28 .EQU CANFD11_RXDATA15_RXDATA15_27, 27 .EQU CANFD11_RXDATA15_RXDATA15_26, 26 .EQU CANFD11_RXDATA15_RXDATA15_25, 25 .EQU CANFD11_RXDATA15_RXDATA15_24, 24 .EQU CANFD11_RXDATA15_RXDATA15_23, 23 .EQU CANFD11_RXDATA15_RXDATA15_22, 22 .EQU CANFD11_RXDATA15_RXDATA15_21, 21 .EQU CANFD11_RXDATA15_RXDATA15_20, 20 .EQU CANFD11_RXDATA15_RXDATA15_19, 19 .EQU CANFD11_RXDATA15_RXDATA15_18, 18 .EQU CANFD11_RXDATA15_RXDATA15_17, 17 .EQU CANFD11_RXDATA15_RXDATA15_16, 16 .EQU CANFD11_RXDATA15_RXDATA15_15, 15 .EQU CANFD11_RXDATA15_RXDATA15_14, 14 .EQU CANFD11_RXDATA15_RXDATA15_13, 13 .EQU CANFD11_RXDATA15_RXDATA15_12, 12 .EQU CANFD11_RXDATA15_RXDATA15_11, 11 .EQU CANFD11_RXDATA15_RXDATA15_10, 10 .EQU CANFD11_RXDATA15_RXDATA15_9, 9 .EQU CANFD11_RXDATA15_RXDATA15_8, 8 .EQU CANFD11_RXDATA15_RXDATA15_7, 7 .EQU CANFD11_RXDATA15_RXDATA15_6, 6 .EQU CANFD11_RXDATA15_RXDATA15_5, 5 .EQU CANFD11_RXDATA15_RXDATA15_4, 4 .EQU CANFD11_RXDATA15_RXDATA15_3, 3 .EQU CANFD11_RXDATA15_RXDATA15_2, 2 .EQU CANFD11_RXDATA15_RXDATA15_1, 1 .EQU CANFD11_RXDATA15_RXDATA15_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA16, 0x40004160 // 0x4000 4160 CANFD11_RXDATA16 Bits------------------------------------- .EQU CANFD11_RXDATA16_RXDATA16_31, 31 .EQU CANFD11_RXDATA16_RXDATA16_30, 30 .EQU CANFD11_RXDATA16_RXDATA16_29, 29 .EQU CANFD11_RXDATA16_RXDATA16_28, 28 .EQU CANFD11_RXDATA16_RXDATA16_27, 27 .EQU CANFD11_RXDATA16_RXDATA16_26, 26 .EQU CANFD11_RXDATA16_RXDATA16_25, 25 .EQU CANFD11_RXDATA16_RXDATA16_24, 24 .EQU CANFD11_RXDATA16_RXDATA16_23, 23 .EQU CANFD11_RXDATA16_RXDATA16_22, 22 .EQU CANFD11_RXDATA16_RXDATA16_21, 21 .EQU CANFD11_RXDATA16_RXDATA16_20, 20 .EQU CANFD11_RXDATA16_RXDATA16_19, 19 .EQU CANFD11_RXDATA16_RXDATA16_18, 18 .EQU CANFD11_RXDATA16_RXDATA16_17, 17 .EQU CANFD11_RXDATA16_RXDATA16_16, 16 .EQU CANFD11_RXDATA16_RXDATA16_15, 15 .EQU CANFD11_RXDATA16_RXDATA16_14, 14 .EQU CANFD11_RXDATA16_RXDATA16_13, 13 .EQU CANFD11_RXDATA16_RXDATA16_12, 12 .EQU CANFD11_RXDATA16_RXDATA16_11, 11 .EQU CANFD11_RXDATA16_RXDATA16_10, 10 .EQU CANFD11_RXDATA16_RXDATA16_9, 9 .EQU CANFD11_RXDATA16_RXDATA16_8, 8 .EQU CANFD11_RXDATA16_RXDATA16_7, 7 .EQU CANFD11_RXDATA16_RXDATA16_6, 6 .EQU CANFD11_RXDATA16_RXDATA16_5, 5 .EQU CANFD11_RXDATA16_RXDATA16_4, 4 .EQU CANFD11_RXDATA16_RXDATA16_3, 3 .EQU CANFD11_RXDATA16_RXDATA16_2, 2 .EQU CANFD11_RXDATA16_RXDATA16_1, 1 .EQU CANFD11_RXDATA16_RXDATA16_0, 0 // register------------------------------------- .EQU CANFD11_RXDATA17, 0x40004164 // 0x4000 4164 CANFD11_RXDATA17 Bits------------------------------------- .EQU CANFD11_RXDATA17_RXDATA17_31, 31 .EQU CANFD11_RXDATA17_RXDATA17_30, 30 .EQU CANFD11_RXDATA17_RXDATA17_29, 29 .EQU CANFD11_RXDATA17_RXDATA17_28, 28 .EQU CANFD11_RXDATA17_RXDATA17_27, 27 .EQU CANFD11_RXDATA17_RXDATA17_26, 26 .EQU CANFD11_RXDATA17_RXDATA17_25, 25 .EQU CANFD11_RXDATA17_RXDATA17_24, 24 .EQU CANFD11_RXDATA17_RXDATA17_23, 23 .EQU CANFD11_RXDATA17_RXDATA17_22, 22 .EQU CANFD11_RXDATA17_RXDATA17_21, 21 .EQU CANFD11_RXDATA17_RXDATA17_20, 20 .EQU CANFD11_RXDATA17_RXDATA17_19, 19 .EQU CANFD11_RXDATA17_RXDATA17_18, 18 .EQU CANFD11_RXDATA17_RXDATA17_17, 17 .EQU CANFD11_RXDATA17_RXDATA17_16, 16 .EQU CANFD11_RXDATA17_RXDATA17_15, 15 .EQU CANFD11_RXDATA17_RXDATA17_14, 14 .EQU CANFD11_RXDATA17_RXDATA17_13, 13 .EQU CANFD11_RXDATA17_RXDATA17_12, 12 .EQU CANFD11_RXDATA17_RXDATA17_11, 11 .EQU CANFD11_RXDATA17_RXDATA17_10, 10 .EQU CANFD11_RXDATA17_RXDATA17_9, 9 .EQU CANFD11_RXDATA17_RXDATA17_8, 8 .EQU CANFD11_RXDATA17_RXDATA17_7, 7 .EQU CANFD11_RXDATA17_RXDATA17_6, 6 .EQU CANFD11_RXDATA17_RXDATA17_5, 5 .EQU CANFD11_RXDATA17_RXDATA17_4, 4 .EQU CANFD11_RXDATA17_RXDATA17_3, 3 .EQU CANFD11_RXDATA17_RXDATA17_2, 2 .EQU CANFD11_RXDATA17_RXDATA17_1, 1 .EQU CANFD11_RXDATA17_RXDATA17_0, 0 // register------------------------------------- .EQU CANFD11_TIMER, 0x40004168 // 0x4000 4168 CANFD11_TIMER Bits------------------------------------- .EQU CANFD11_TIMER_CANTIMER15, 15 .EQU CANFD11_TIMER_CANTIMER14, 14 .EQU CANFD11_TIMER_CANTIMER13, 13 .EQU CANFD11_TIMER_CANTIMER12, 12 .EQU CANFD11_TIMER_CANTIMER11, 11 .EQU CANFD11_TIMER_CANTIMER10, 10 .EQU CANFD11_TIMER_CANTIMER9, 9 .EQU CANFD11_TIMER_CANTIMER8, 8 .EQU CANFD11_TIMER_CANTIMER7, 7 .EQU CANFD11_TIMER_CANTIMER6, 6 .EQU CANFD11_TIMER_CANTIMER5, 5 .EQU CANFD11_TIMER_CANTIMER4, 4 .EQU CANFD11_TIMER_CANTIMER3, 3 .EQU CANFD11_TIMER_CANTIMER2, 2 .EQU CANFD11_TIMER_CANTIMER1, 1 .EQU CANFD11_TIMER_CANTIMER0, 0 // register------------------------------------- .EQU CANFD11_CRC, 0x4000416C // 0x4000 416C CANFD11_CRC Bits------------------------------------- .EQU CANFD11_CRC_STUFFCNT3, 31 .EQU CANFD11_CRC_STUFFCNT2, 30 .EQU CANFD11_CRC_STUFFCNT1, 29 .EQU CANFD11_CRC_STUFFCNT0, 28 .EQU CANFD11_CRC_CRC20, 20 .EQU CANFD11_CRC_CRC19, 19 .EQU CANFD11_CRC_CRC18, 18 .EQU CANFD11_CRC_CRC17, 17 .EQU CANFD11_CRC_CRC16, 16 .EQU CANFD11_CRC_CRC15, 15 .EQU CANFD11_CRC_CRC14, 14 .EQU CANFD11_CRC_CRC13, 13 .EQU CANFD11_CRC_CRC12, 12 .EQU CANFD11_CRC_CRC11, 11 .EQU CANFD11_CRC_CRC10, 10 .EQU CANFD11_CRC_CRC9, 9 .EQU CANFD11_CRC_CRC8, 8 .EQU CANFD11_CRC_CRC7, 7 .EQU CANFD11_CRC_CRC6, 6 .EQU CANFD11_CRC_CRC5, 5 .EQU CANFD11_CRC_CRC4, 4 .EQU CANFD11_CRC_CRC3, 3 .EQU CANFD11_CRC_CRC2, 2 .EQU CANFD11_CRC_CRC1, 1 .EQU CANFD11_CRC_CRC0, 0 // register------------------------------------- .EQU CANFD11_CTLR1, 0x40004174 // 0x4000 4174 CANFD11_CTLR1 Bits------------------------------------- .EQU CANFD11_CTLR1_TRGMBEN, 31 .EQU CANFD11_CTLR1_TRGMBSEL6, 30 .EQU CANFD11_CTLR1_TRGMBSEL5, 29 .EQU CANFD11_CTLR1_TRGMBSEL4, 28 .EQU CANFD11_CTLR1_TRGMBSEL3, 27 .EQU CANFD11_CTLR1_TRGMBSEL2, 26 .EQU CANFD11_CTLR1_TRGMBSEL1, 25 .EQU CANFD11_CTLR1_TRGMBSEL0, 24 .EQU CANFD11_CTLR1_TRGNUM3, 23 .EQU CANFD11_CTLR1_TRGNUM2, 22 .EQU CANFD11_CTLR1_TRGNUM1, 21 .EQU CANFD11_CTLR1_TRGNUM0, 20 .EQU CANFD11_CTLR1_CKMODE, 19 .EQU CANFD11_CTLR1_BOFFREC, 18 .EQU CANFD11_CTLR1_LBSEL, 17 .EQU CANFD11_CTLR1_ARBSTART, 16 .EQU CANFD11_CTLR1_ARBMS, 15 .EQU CANFD11_CTLR1_MBMSKEN, 14 .EQU CANFD11_CTLR1_MATCHMS, 13 .EQU CANFD11_CTLR1_MBNUM, 12 .EQU CANFD11_CTLR1_TSYN, 11 .EQU CANFD11_CTLR1_FTCLKS, 10 .EQU CANFD11_CTLR1_ST, 9 .EQU CANFD11_CTLR1_RXMUX6, 8 .EQU CANFD11_CTLR1_RXMUX5, 7 .EQU CANFD11_CTLR1_RXMUX4, 6 .EQU CANFD11_CTLR1_RXMUX3, 5 .EQU CANFD11_CTLR1_RXMUX2, 4 .EQU CANFD11_CTLR1_RXMUX1, 3 .EQU CANFD11_CTLR1_RXMUX0, 2 .EQU CANFD11_CTLR1_AMCKS1, 1 .EQU CANFD11_CTLR1_AMCKS0, 0 // register------------------------------------- .EQU CANFD11_AMSTA, 0x40004178 // 0x4000 4178 CANFD11_AMSTA Bits------------------------------------- .EQU CANFD11_AMSTA_TXCODE3, 31 .EQU CANFD11_AMSTA_TXCODE2, 30 .EQU CANFD11_AMSTA_TXCODE1, 29 .EQU CANFD11_AMSTA_TXCODE0, 28 .EQU CANFD11_AMSTA_ARBSTA1, 27 .EQU CANFD11_AMSTA_ARBSTA0, 26 .EQU CANFD11_AMSTA_ARBWINNER9, 25 .EQU CANFD11_AMSTA_ARBWINNER8, 24 .EQU CANFD11_AMSTA_ARBWINNER7, 23 .EQU CANFD11_AMSTA_ARBWINNER6, 22 .EQU CANFD11_AMSTA_ARBWINNER5, 21 .EQU CANFD11_AMSTA_ARBWINNER4, 20 .EQU CANFD11_AMSTA_ARBWINNER3, 19 .EQU CANFD11_AMSTA_ARBWINNER2, 18 .EQU CANFD11_AMSTA_ARBWINNER1, 17 .EQU CANFD11_AMSTA_ARBWINNER0, 16 .EQU CANFD11_AMSTA_BETEN, 15 .EQU CANFD11_AMSTA_RTRMEN, 14 .EQU CANFD11_AMSTA_IDSELEN, 13 .EQU CANFD11_AMSTA_RELRXALL, 12 .EQU CANFD11_AMSTA_ROPSTA, 11 .EQU CANFD11_AMSTA_MATSTA, 10 .EQU CANFD11_AMSTA_MATWINNER9, 9 .EQU CANFD11_AMSTA_MATWINNER8, 8 .EQU CANFD11_AMSTA_MATWINNER7, 7 .EQU CANFD11_AMSTA_MATWINNER6, 6 .EQU CANFD11_AMSTA_MATWINNER5, 5 .EQU CANFD11_AMSTA_MATWINNER4, 4 .EQU CANFD11_AMSTA_MATWINNER3, 3 .EQU CANFD11_AMSTA_MATWINNER2, 2 .EQU CANFD11_AMSTA_MATWINNER1, 1 .EQU CANFD11_AMSTA_MATWINNER0, 0 // register------------------------------------- .EQU CANFD11_TXDATA, 0x4000417C // 0x4000 417C CANFD11_TXDATA Bits------------------------------------- .EQU CANFD11_TXDATA_TXDATA31, 31 .EQU CANFD11_TXDATA_TXDATA30, 30 .EQU CANFD11_TXDATA_TXDATA29, 29 .EQU CANFD11_TXDATA_TXDATA28, 28 .EQU CANFD11_TXDATA_TXDATA27, 27 .EQU CANFD11_TXDATA_TXDATA26, 26 .EQU CANFD11_TXDATA_TXDATA25, 25 .EQU CANFD11_TXDATA_TXDATA24, 24 .EQU CANFD11_TXDATA_TXDATA23, 23 .EQU CANFD11_TXDATA_TXDATA22, 22 .EQU CANFD11_TXDATA_TXDATA21, 21 .EQU CANFD11_TXDATA_TXDATA20, 20 .EQU CANFD11_TXDATA_TXDATA19, 19 .EQU CANFD11_TXDATA_TXDATA18, 18 .EQU CANFD11_TXDATA_TXDATA17, 17 .EQU CANFD11_TXDATA_TXDATA16, 16 .EQU CANFD11_TXDATA_TXDATA15, 15 .EQU CANFD11_TXDATA_TXDATA14, 14 .EQU CANFD11_TXDATA_TXDATA13, 13 .EQU CANFD11_TXDATA_TXDATA12, 12 .EQU CANFD11_TXDATA_TXDATA11, 11 .EQU CANFD11_TXDATA_TXDATA10, 10 .EQU CANFD11_TXDATA_TXDATA9, 9 .EQU CANFD11_TXDATA_TXDATA8, 8 .EQU CANFD11_TXDATA_TXDATA7, 7 .EQU CANFD11_TXDATA_TXDATA6, 6 .EQU CANFD11_TXDATA_TXDATA5, 5 .EQU CANFD11_TXDATA_TXDATA4, 4 .EQU CANFD11_TXDATA_TXDATA3, 3 .EQU CANFD11_TXDATA_TXDATA2, 2 .EQU CANFD11_TXDATA_TXDATA1, 1 .EQU CANFD11_TXDATA_TXDATA0, 0 // register------------------------------------- .EQU CANFD12_CTLR0, 0x40004300 // 0x4000 4300 CANFD12_CTLR0 Bits------------------------------------- .EQU CANFD12_CTLR0_CANFDEN, 31 .EQU CANFD12_CTLR0_CANRMC6, 30 .EQU CANFD12_CTLR0_CANRMC5, 29 .EQU CANFD12_CTLR0_CANRMC4, 28 .EQU CANFD12_CTLR0_CANRMC3, 27 .EQU CANFD12_CTLR0_CANRMC2, 26 .EQU CANFD12_CTLR0_CANRMC1, 25 .EQU CANFD12_CTLR0_CANRMC0, 24 .EQU CANFD12_CTLR0_BOFF, 23 .EQU CANFD12_CTLR0_CERROR, 22 .EQU CANFD12_CTLR0_TXSTA, 21 .EQU CANFD12_CTLR0_RXSTA, 20 .EQU CANFD12_CTLR0_TCSTA, 19 .EQU CANFD12_CTLR0_DOSTA, 17 .EQU CANFD12_CTLR0_RXBSTA, 16 .EQU CANFD12_CTLR0_ANSWEREN, 15 .EQU CANFD12_CTLR0_FULLRXEN, 14 .EQU CANFD12_CTLR0_MBSIZE1, 13 .EQU CANFD12_CTLR0_MBSIZE0, 12 .EQU CANFD12_CTLR0_RELF, 11 .EQU CANFD12_CTLR0_RELRX, 10 .EQU CANFD12_CTLR0_ATX, 9 .EQU CANFD12_CTLR0_TXR, 8 .EQU CANFD12_CTLR0_CANEN, 7 .EQU CANFD12_CTLR0_CANCKS1, 6 .EQU CANFD12_CTLR0_CANCKS0, 5 .EQU CANFD12_CTLR0_ISOFDCANEN, 4 .EQU CANFD12_CTLR0_SLEEP, 3 .EQU CANFD12_CTLR0_LBACK, 2 .EQU CANFD12_CTLR0_SILENT, 1 .EQU CANFD12_CTLR0_RSMOD, 0 // register------------------------------------- .EQU CANFD12_BRGR, 0x40004304 // 0x4000 4304 CANFD12_BRGR Bits------------------------------------- .EQU CANFD12_BRGR_HTSEG2_2, 28 .EQU CANFD12_BRGR_HTSEG2_1, 27 .EQU CANFD12_BRGR_HTSEG2_0, 26 .EQU CANFD12_BRGR_HTSEG1_3, 25 .EQU CANFD12_BRGR_HTSEG1_2, 24 .EQU CANFD12_BRGR_HTSEG1_1, 23 .EQU CANFD12_BRGR_HTSEG1_0, 22 .EQU CANFD12_BRGR_BRSBRP5, 21 .EQU CANFD12_BRGR_BRSBRP4, 20 .EQU CANFD12_BRGR_BRSBRP3, 19 .EQU CANFD12_BRGR_BRSBRP2, 18 .EQU CANFD12_BRGR_BRSBRP1, 17 .EQU CANFD12_BRGR_BRSBRP0, 16 .EQU CANFD12_BRGR_SAM, 15 .EQU CANFD12_BRGR_TSEG2_2, 14 .EQU CANFD12_BRGR_TSEG2_1, 13 .EQU CANFD12_BRGR_TSEG2_0, 12 .EQU CANFD12_BRGR_TSEG1_3, 11 .EQU CANFD12_BRGR_TSEG1_2, 10 .EQU CANFD12_BRGR_TSEG1_1, 9 .EQU CANFD12_BRGR_TSEG1_0, 8 .EQU CANFD12_BRGR_SJW1, 7 .EQU CANFD12_BRGR_SJW0, 6 .EQU CANFD12_BRGR_CANBRP5, 5 .EQU CANFD12_BRGR_CANBRP4, 4 .EQU CANFD12_BRGR_CANBRP3, 3 .EQU CANFD12_BRGR_CANBRP2, 2 .EQU CANFD12_BRGR_CANBRP1, 1 .EQU CANFD12_BRGR_CANBRP0, 0 // register------------------------------------- .EQU CANFD12_RCR, 0x40004308 // 0x4000 4308 CANFD12_RCR Bits------------------------------------- .EQU CANFD12_RCR_DPRAMOF, 16 .EQU CANFD12_RCR_CANERRC1, 15 .EQU CANFD12_RCR_CANERRC0, 14 .EQU CANFD12_RCR_CANDIR, 13 .EQU CANFD12_RCR_CANSEG4, 12 .EQU CANFD12_RCR_CANSEG3, 11 .EQU CANFD12_RCR_CANSEG2, 10 .EQU CANFD12_RCR_CANSEG1, 9 .EQU CANFD12_RCR_CANSEG0, 8 .EQU CANFD12_RCR_CANALC4, 4 .EQU CANFD12_RCR_CANALC3, 3 .EQU CANFD12_RCR_CANALC2, 2 .EQU CANFD12_RCR_CANALC1, 1 .EQU CANFD12_RCR_CANALC0, 0 // register------------------------------------- .EQU CANFD12_EROR, 0x4000430C // 0x4000 430C CANFD12_EROR Bits------------------------------------- .EQU CANFD12_EROR_DPRAMFEN, 31 .EQU CANFD12_EROR_SFDMOD, 30 .EQU CANFD12_EROR_SFDEN, 29 .EQU CANFD12_EROR_SOSFD4, 28 .EQU CANFD12_EROR_SOSFD3, 27 .EQU CANFD12_EROR_SOSFD2, 26 .EQU CANFD12_EROR_SOSFD1, 25 .EQU CANFD12_EROR_SOSFD0, 24 .EQU CANFD12_EROR_CANEWL7, 23 .EQU CANFD12_EROR_CANEWL6, 22 .EQU CANFD12_EROR_CANEWL5, 21 .EQU CANFD12_EROR_CANEWL4, 20 .EQU CANFD12_EROR_CANEWL3, 19 .EQU CANFD12_EROR_CANEWL2, 18 .EQU CANFD12_EROR_CANEWL1, 17 .EQU CANFD12_EROR_CANEWL0, 16 .EQU CANFD12_EROR_CANTXE7, 15 .EQU CANFD12_EROR_CANTXE6, 14 .EQU CANFD12_EROR_CANTXE5, 13 .EQU CANFD12_EROR_CANTXE4, 12 .EQU CANFD12_EROR_CANTXE3, 11 .EQU CANFD12_EROR_CANTXE2, 10 .EQU CANFD12_EROR_CANTXE1, 9 .EQU CANFD12_EROR_CANTXE0, 8 .EQU CANFD12_EROR_CANRXE7, 7 .EQU CANFD12_EROR_CANRXE6, 6 .EQU CANFD12_EROR_CANRXE5, 5 .EQU CANFD12_EROR_CANRXE4, 4 .EQU CANFD12_EROR_CANRXE3, 3 .EQU CANFD12_EROR_CANRXE2, 2 .EQU CANFD12_EROR_CANRXE1, 1 .EQU CANFD12_EROR_CANRXE0, 0 // register------------------------------------- .EQU CANFD12_CTLR2, 0x40004310 // 0x4000 4310 CANFD12_CTLR2 Bits------------------------------------- .EQU CANFD12_CTLR2_AMCKDIV1, 26 .EQU CANFD12_CTLR2_AMCKDIV0, 25 .EQU CANFD12_CTLR2_DESEL, 24 .EQU CANFD12_CTLR2_TDCVM6, 22 .EQU CANFD12_CTLR2_TDCVM5, 21 .EQU CANFD12_CTLR2_TDCVM4, 20 .EQU CANFD12_CTLR2_TDCVM3, 19 .EQU CANFD12_CTLR2_TDCVM2, 18 .EQU CANFD12_CTLR2_TDCVM1, 17 .EQU CANFD12_CTLR2_TDCVM0, 16 .EQU CANFD12_CTLR2_TDC0_1, 15 .EQU CANFD12_CTLR2_TDC0_0, 14 .EQU CANFD12_CTLR2_TDCSR1, 13 .EQU CANFD12_CTLR2_TDCSR0, 12 .EQU CANFD12_CTLR2_TDCS1, 11 .EQU CANFD12_CTLR2_TDCS0, 10 .EQU CANFD12_CTLR2_TDCAUT0, 9 .EQU CANFD12_CTLR2_TDCEN, 8 .EQU CANFD12_CTLR2_TDC0EN, 7 .EQU CANFD12_CTLR2_TDCV6, 6 .EQU CANFD12_CTLR2_TDCV5, 5 .EQU CANFD12_CTLR2_TDCV4, 4 .EQU CANFD12_CTLR2_TDCV3, 3 .EQU CANFD12_CTLR2_TDCV2, 2 .EQU CANFD12_CTLR2_TDCV1, 1 .EQU CANFD12_CTLR2_TDCV0, 0 // register------------------------------------- .EQU CANFD12_MSKR, 0x40004314 // 0x4000 4314 CANFD12_MSKR Bits------------------------------------- .EQU CANFD12_MSKR_MSK31, 31 .EQU CANFD12_MSKR_MSK30, 30 .EQU CANFD12_MSKR_MSK29, 29 .EQU CANFD12_MSKR_MSK28, 28 .EQU CANFD12_MSKR_MSK27, 27 .EQU CANFD12_MSKR_MSK26, 26 .EQU CANFD12_MSKR_MSK25, 25 .EQU CANFD12_MSKR_MSK24, 24 .EQU CANFD12_MSKR_MSK23, 23 .EQU CANFD12_MSKR_MSK22, 22 .EQU CANFD12_MSKR_MSK21, 21 .EQU CANFD12_MSKR_MSK20, 20 .EQU CANFD12_MSKR_MSK19, 19 .EQU CANFD12_MSKR_MSK18, 18 .EQU CANFD12_MSKR_MSK17, 17 .EQU CANFD12_MSKR_MSK16, 16 .EQU CANFD12_MSKR_MSK15, 15 .EQU CANFD12_MSKR_MSK14, 14 .EQU CANFD12_MSKR_MSK13, 13 .EQU CANFD12_MSKR_MSK12, 12 .EQU CANFD12_MSKR_MSK11, 11 .EQU CANFD12_MSKR_MSK10, 10 .EQU CANFD12_MSKR_MSK9, 9 .EQU CANFD12_MSKR_MSK8, 8 .EQU CANFD12_MSKR_MSK7, 7 .EQU CANFD12_MSKR_MSK6, 6 .EQU CANFD12_MSKR_MSK5, 5 .EQU CANFD12_MSKR_MSK4, 4 .EQU CANFD12_MSKR_MSK3, 3 .EQU CANFD12_MSKR_MSK2, 2 .EQU CANFD12_MSKR_MSK1, 1 .EQU CANFD12_MSKR_MSK0, 0 // register------------------------------------- .EQU CANFD12_IER, 0x40004318 // 0x4000 4318 CANFD12_IER Bits------------------------------------- .EQU CANFD12_IER_FAILCLR, 31 .EQU CANFD12_IER_LPCANGPIOSEL0, 30 .EQU CANFD12_IER_BOFFIC, 28 .EQU CANFD12_IER_TRGMBIC, 27 .EQU CANFD12_IER_MOENDIC, 26 .EQU CANFD12_IER_BEIC, 23 .EQU CANFD12_IER_ALIC, 22 .EQU CANFD12_IER_ENIC, 21 .EQU CANFD12_IER_WUIC, 20 .EQU CANFD12_IER_DOVFIC, 19 .EQU CANFD12_IER_EAIC, 18 .EQU CANFD12_IER_CANTXIC, 17 .EQU CANFD12_IER_CANRXIC, 16 .EQU CANFD12_IER_MOENDIE, 15 .EQU CANFD12_IER_ARBFAILIE, 14 .EQU CANFD12_IER_BOFFIE, 12 .EQU CANFD12_IER_TRGMBIE, 11 .EQU CANFD12_IER_RXBSTAIE, 10 .EQU CANFD12_IER_CRXDE, 9 .EQU CANFD12_IER_CTXDE, 8 .EQU CANFD12_IER_BEIE, 7 .EQU CANFD12_IER_ALIE, 6 .EQU CANFD12_IER_ENIE, 5 .EQU CANFD12_IER_WUIE, 4 .EQU CANFD12_IER_DOVFIE, 3 .EQU CANFD12_IER_EAIE, 2 .EQU CANFD12_IER_CANTXIE, 1 .EQU CANFD12_IER_CANRXIE, 0 // register------------------------------------- .EQU CANFD12_IFR, 0x4000431C // 0x4000 431C CANFD12_IFR Bits------------------------------------- .EQU CANFD12_IFR_MOENDIF, 14 .EQU CANFD12_IFR_BOFFIF, 12 .EQU CANFD12_IFR_TRGMBIF, 11 .EQU CANFD12_IFR_RXBSTAIF, 10 .EQU CANFD12_IFR_CRXDF, 9 .EQU CANFD12_IFR_CTXDF, 8 .EQU CANFD12_IFR_BEIF, 7 .EQU CANFD12_IFR_ALIF, 6 .EQU CANFD12_IFR_ENIF, 5 .EQU CANFD12_IFR_WUIF, 4 .EQU CANFD12_IFR_DOVFIF, 3 .EQU CANFD12_IFR_EAIF, 2 .EQU CANFD12_IFR_CANTXIF, 1 .EQU CANFD12_IFR_CANRXIF, 0 // register------------------------------------- .EQU CANFD12_RXDATA0, 0x40004320 // 0x4000 4320 CANFD12_RXDATA0 Bits------------------------------------- .EQU CANFD12_RXDATA0_RXDATA0_31, 31 .EQU CANFD12_RXDATA0_RXDATA0_30, 30 .EQU CANFD12_RXDATA0_RXDATA0_29, 29 .EQU CANFD12_RXDATA0_RXDATA0_28, 28 .EQU CANFD12_RXDATA0_RXDATA0_27, 27 .EQU CANFD12_RXDATA0_RXDATA0_26, 26 .EQU CANFD12_RXDATA0_RXDATA0_25, 25 .EQU CANFD12_RXDATA0_RXDATA0_24, 24 .EQU CANFD12_RXDATA0_RXDATA0_23, 23 .EQU CANFD12_RXDATA0_RXDATA0_22, 22 .EQU CANFD12_RXDATA0_RXDATA0_21, 21 .EQU CANFD12_RXDATA0_RXDATA0_20, 20 .EQU CANFD12_RXDATA0_RXDATA0_19, 19 .EQU CANFD12_RXDATA0_RXDATA0_18, 18 .EQU CANFD12_RXDATA0_RXDATA0_17, 17 .EQU CANFD12_RXDATA0_RXDATA0_16, 16 .EQU CANFD12_RXDATA0_RXDATA0_15, 15 .EQU CANFD12_RXDATA0_RXDATA0_14, 14 .EQU CANFD12_RXDATA0_RXDATA0_13, 13 .EQU CANFD12_RXDATA0_RXDATA0_12, 12 .EQU CANFD12_RXDATA0_RXDATA0_11, 11 .EQU CANFD12_RXDATA0_RXDATA0_10, 10 .EQU CANFD12_RXDATA0_RXDATA0_9, 9 .EQU CANFD12_RXDATA0_RXDATA0_8, 8 .EQU CANFD12_RXDATA0_RXDATA0_7, 7 .EQU CANFD12_RXDATA0_RXDATA0_6, 6 .EQU CANFD12_RXDATA0_RXDATA0_5, 5 .EQU CANFD12_RXDATA0_RXDATA0_4, 4 .EQU CANFD12_RXDATA0_RXDATA0_3, 3 .EQU CANFD12_RXDATA0_RXDATA0_2, 2 .EQU CANFD12_RXDATA0_RXDATA0_1, 1 .EQU CANFD12_RXDATA0_RXDATA0_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA1, 0x40004324 // 0x4000 4324 CANFD12_RXDATA1 Bits------------------------------------- .EQU CANFD12_RXDATA1_RXDATA1_31, 31 .EQU CANFD12_RXDATA1_RXDATA1_30, 30 .EQU CANFD12_RXDATA1_RXDATA1_29, 29 .EQU CANFD12_RXDATA1_RXDATA1_28, 28 .EQU CANFD12_RXDATA1_RXDATA1_27, 27 .EQU CANFD12_RXDATA1_RXDATA1_26, 26 .EQU CANFD12_RXDATA1_RXDATA1_25, 25 .EQU CANFD12_RXDATA1_RXDATA1_24, 24 .EQU CANFD12_RXDATA1_RXDATA1_23, 23 .EQU CANFD12_RXDATA1_RXDATA1_22, 22 .EQU CANFD12_RXDATA1_RXDATA1_21, 21 .EQU CANFD12_RXDATA1_RXDATA1_20, 20 .EQU CANFD12_RXDATA1_RXDATA1_19, 19 .EQU CANFD12_RXDATA1_RXDATA1_18, 18 .EQU CANFD12_RXDATA1_RXDATA1_17, 17 .EQU CANFD12_RXDATA1_RXDATA1_16, 16 .EQU CANFD12_RXDATA1_RXDATA1_15, 15 .EQU CANFD12_RXDATA1_RXDATA1_14, 14 .EQU CANFD12_RXDATA1_RXDATA1_13, 13 .EQU CANFD12_RXDATA1_RXDATA1_12, 12 .EQU CANFD12_RXDATA1_RXDATA1_11, 11 .EQU CANFD12_RXDATA1_RXDATA1_10, 10 .EQU CANFD12_RXDATA1_RXDATA1_9, 9 .EQU CANFD12_RXDATA1_RXDATA1_8, 8 .EQU CANFD12_RXDATA1_RXDATA1_7, 7 .EQU CANFD12_RXDATA1_RXDATA1_6, 6 .EQU CANFD12_RXDATA1_RXDATA1_5, 5 .EQU CANFD12_RXDATA1_RXDATA1_4, 4 .EQU CANFD12_RXDATA1_RXDATA1_3, 3 .EQU CANFD12_RXDATA1_RXDATA1_2, 2 .EQU CANFD12_RXDATA1_RXDATA1_1, 1 .EQU CANFD12_RXDATA1_RXDATA1_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA2, 0x40004328 // 0x4000 4328 CANFD12_RXDATA2 Bits------------------------------------- .EQU CANFD12_RXDATA2_RXDATA2_31, 31 .EQU CANFD12_RXDATA2_RXDATA2_30, 30 .EQU CANFD12_RXDATA2_RXDATA2_29, 29 .EQU CANFD12_RXDATA2_RXDATA2_28, 28 .EQU CANFD12_RXDATA2_RXDATA2_27, 27 .EQU CANFD12_RXDATA2_RXDATA2_26, 26 .EQU CANFD12_RXDATA2_RXDATA2_25, 25 .EQU CANFD12_RXDATA2_RXDATA2_24, 24 .EQU CANFD12_RXDATA2_RXDATA2_23, 23 .EQU CANFD12_RXDATA2_RXDATA2_22, 22 .EQU CANFD12_RXDATA2_RXDATA2_21, 21 .EQU CANFD12_RXDATA2_RXDATA2_20, 20 .EQU CANFD12_RXDATA2_RXDATA2_19, 19 .EQU CANFD12_RXDATA2_RXDATA2_18, 18 .EQU CANFD12_RXDATA2_RXDATA2_17, 17 .EQU CANFD12_RXDATA2_RXDATA2_16, 16 .EQU CANFD12_RXDATA2_RXDATA2_15, 15 .EQU CANFD12_RXDATA2_RXDATA2_14, 14 .EQU CANFD12_RXDATA2_RXDATA2_13, 13 .EQU CANFD12_RXDATA2_RXDATA2_12, 12 .EQU CANFD12_RXDATA2_RXDATA2_11, 11 .EQU CANFD12_RXDATA2_RXDATA2_10, 10 .EQU CANFD12_RXDATA2_RXDATA2_9, 9 .EQU CANFD12_RXDATA2_RXDATA2_8, 8 .EQU CANFD12_RXDATA2_RXDATA2_7, 7 .EQU CANFD12_RXDATA2_RXDATA2_6, 6 .EQU CANFD12_RXDATA2_RXDATA2_5, 5 .EQU CANFD12_RXDATA2_RXDATA2_4, 4 .EQU CANFD12_RXDATA2_RXDATA2_3, 3 .EQU CANFD12_RXDATA2_RXDATA2_2, 2 .EQU CANFD12_RXDATA2_RXDATA2_1, 1 .EQU CANFD12_RXDATA2_RXDATA2_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA3, 0x4000432C // 0x4000 432C CANFD12_RXDATA3 Bits------------------------------------- .EQU CANFD12_RXDATA3_RXDATA3_31, 31 .EQU CANFD12_RXDATA3_RXDATA3_30, 30 .EQU CANFD12_RXDATA3_RXDATA3_29, 29 .EQU CANFD12_RXDATA3_RXDATA3_28, 28 .EQU CANFD12_RXDATA3_RXDATA3_27, 27 .EQU CANFD12_RXDATA3_RXDATA3_26, 26 .EQU CANFD12_RXDATA3_RXDATA3_25, 25 .EQU CANFD12_RXDATA3_RXDATA3_24, 24 .EQU CANFD12_RXDATA3_RXDATA3_23, 23 .EQU CANFD12_RXDATA3_RXDATA3_22, 22 .EQU CANFD12_RXDATA3_RXDATA3_21, 21 .EQU CANFD12_RXDATA3_RXDATA3_20, 20 .EQU CANFD12_RXDATA3_RXDATA3_19, 19 .EQU CANFD12_RXDATA3_RXDATA3_18, 18 .EQU CANFD12_RXDATA3_RXDATA3_17, 17 .EQU CANFD12_RXDATA3_RXDATA3_16, 16 .EQU CANFD12_RXDATA3_RXDATA3_15, 15 .EQU CANFD12_RXDATA3_RXDATA3_14, 14 .EQU CANFD12_RXDATA3_RXDATA3_13, 13 .EQU CANFD12_RXDATA3_RXDATA3_12, 12 .EQU CANFD12_RXDATA3_RXDATA3_11, 11 .EQU CANFD12_RXDATA3_RXDATA3_10, 10 .EQU CANFD12_RXDATA3_RXDATA3_9, 9 .EQU CANFD12_RXDATA3_RXDATA3_8, 8 .EQU CANFD12_RXDATA3_RXDATA3_7, 7 .EQU CANFD12_RXDATA3_RXDATA3_6, 6 .EQU CANFD12_RXDATA3_RXDATA3_5, 5 .EQU CANFD12_RXDATA3_RXDATA3_4, 4 .EQU CANFD12_RXDATA3_RXDATA3_3, 3 .EQU CANFD12_RXDATA3_RXDATA3_2, 2 .EQU CANFD12_RXDATA3_RXDATA3_1, 1 .EQU CANFD12_RXDATA3_RXDATA3_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA4, 0x40004330 // 0x4000 4330 CANFD12_RXDATA4 Bits------------------------------------- .EQU CANFD12_RXDATA4_RXDATA4_31, 31 .EQU CANFD12_RXDATA4_RXDATA4_30, 30 .EQU CANFD12_RXDATA4_RXDATA4_29, 29 .EQU CANFD12_RXDATA4_RXDATA4_28, 28 .EQU CANFD12_RXDATA4_RXDATA4_27, 27 .EQU CANFD12_RXDATA4_RXDATA4_26, 26 .EQU CANFD12_RXDATA4_RXDATA4_25, 25 .EQU CANFD12_RXDATA4_RXDATA4_24, 24 .EQU CANFD12_RXDATA4_RXDATA4_23, 23 .EQU CANFD12_RXDATA4_RXDATA4_22, 22 .EQU CANFD12_RXDATA4_RXDATA4_21, 21 .EQU CANFD12_RXDATA4_RXDATA4_20, 20 .EQU CANFD12_RXDATA4_RXDATA4_19, 19 .EQU CANFD12_RXDATA4_RXDATA4_18, 18 .EQU CANFD12_RXDATA4_RXDATA4_17, 17 .EQU CANFD12_RXDATA4_RXDATA4_16, 16 .EQU CANFD12_RXDATA4_RXDATA4_15, 15 .EQU CANFD12_RXDATA4_RXDATA4_14, 14 .EQU CANFD12_RXDATA4_RXDATA4_13, 13 .EQU CANFD12_RXDATA4_RXDATA4_12, 12 .EQU CANFD12_RXDATA4_RXDATA4_11, 11 .EQU CANFD12_RXDATA4_RXDATA4_10, 10 .EQU CANFD12_RXDATA4_RXDATA4_9, 9 .EQU CANFD12_RXDATA4_RXDATA4_8, 8 .EQU CANFD12_RXDATA4_RXDATA4_7, 7 .EQU CANFD12_RXDATA4_RXDATA4_6, 6 .EQU CANFD12_RXDATA4_RXDATA4_5, 5 .EQU CANFD12_RXDATA4_RXDATA4_4, 4 .EQU CANFD12_RXDATA4_RXDATA4_3, 3 .EQU CANFD12_RXDATA4_RXDATA4_2, 2 .EQU CANFD12_RXDATA4_RXDATA4_1, 1 .EQU CANFD12_RXDATA4_RXDATA4_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA5, 0x40004334 // 0x4000 4334 CANFD12_RXDATA5 Bits------------------------------------- .EQU CANFD12_RXDATA5_RXDATA5_31, 31 .EQU CANFD12_RXDATA5_RXDATA5_30, 30 .EQU CANFD12_RXDATA5_RXDATA5_29, 29 .EQU CANFD12_RXDATA5_RXDATA5_28, 28 .EQU CANFD12_RXDATA5_RXDATA5_27, 27 .EQU CANFD12_RXDATA5_RXDATA5_26, 26 .EQU CANFD12_RXDATA5_RXDATA5_25, 25 .EQU CANFD12_RXDATA5_RXDATA5_24, 24 .EQU CANFD12_RXDATA5_RXDATA5_23, 23 .EQU CANFD12_RXDATA5_RXDATA5_22, 22 .EQU CANFD12_RXDATA5_RXDATA5_21, 21 .EQU CANFD12_RXDATA5_RXDATA5_20, 20 .EQU CANFD12_RXDATA5_RXDATA5_19, 19 .EQU CANFD12_RXDATA5_RXDATA5_18, 18 .EQU CANFD12_RXDATA5_RXDATA5_17, 17 .EQU CANFD12_RXDATA5_RXDATA5_16, 16 .EQU CANFD12_RXDATA5_RXDATA5_15, 15 .EQU CANFD12_RXDATA5_RXDATA5_14, 14 .EQU CANFD12_RXDATA5_RXDATA5_13, 13 .EQU CANFD12_RXDATA5_RXDATA5_12, 12 .EQU CANFD12_RXDATA5_RXDATA5_11, 11 .EQU CANFD12_RXDATA5_RXDATA5_10, 10 .EQU CANFD12_RXDATA5_RXDATA5_9, 9 .EQU CANFD12_RXDATA5_RXDATA5_8, 8 .EQU CANFD12_RXDATA5_RXDATA5_7, 7 .EQU CANFD12_RXDATA5_RXDATA5_6, 6 .EQU CANFD12_RXDATA5_RXDATA5_5, 5 .EQU CANFD12_RXDATA5_RXDATA5_4, 4 .EQU CANFD12_RXDATA5_RXDATA5_3, 3 .EQU CANFD12_RXDATA5_RXDATA5_2, 2 .EQU CANFD12_RXDATA5_RXDATA5_1, 1 .EQU CANFD12_RXDATA5_RXDATA5_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA6, 0x40004338 // 0x4000 4338 CANFD12_RXDATA6 Bits------------------------------------- .EQU CANFD12_RXDATA6_RXDATA6_31, 31 .EQU CANFD12_RXDATA6_RXDATA6_30, 30 .EQU CANFD12_RXDATA6_RXDATA6_29, 29 .EQU CANFD12_RXDATA6_RXDATA6_28, 28 .EQU CANFD12_RXDATA6_RXDATA6_27, 27 .EQU CANFD12_RXDATA6_RXDATA6_26, 26 .EQU CANFD12_RXDATA6_RXDATA6_25, 25 .EQU CANFD12_RXDATA6_RXDATA6_24, 24 .EQU CANFD12_RXDATA6_RXDATA6_23, 23 .EQU CANFD12_RXDATA6_RXDATA6_22, 22 .EQU CANFD12_RXDATA6_RXDATA6_21, 21 .EQU CANFD12_RXDATA6_RXDATA6_20, 20 .EQU CANFD12_RXDATA6_RXDATA6_19, 19 .EQU CANFD12_RXDATA6_RXDATA6_18, 18 .EQU CANFD12_RXDATA6_RXDATA6_17, 17 .EQU CANFD12_RXDATA6_RXDATA6_16, 16 .EQU CANFD12_RXDATA6_RXDATA6_15, 15 .EQU CANFD12_RXDATA6_RXDATA6_14, 14 .EQU CANFD12_RXDATA6_RXDATA6_13, 13 .EQU CANFD12_RXDATA6_RXDATA6_12, 12 .EQU CANFD12_RXDATA6_RXDATA6_11, 11 .EQU CANFD12_RXDATA6_RXDATA6_10, 10 .EQU CANFD12_RXDATA6_RXDATA6_9, 9 .EQU CANFD12_RXDATA6_RXDATA6_8, 8 .EQU CANFD12_RXDATA6_RXDATA6_7, 7 .EQU CANFD12_RXDATA6_RXDATA6_6, 6 .EQU CANFD12_RXDATA6_RXDATA6_5, 5 .EQU CANFD12_RXDATA6_RXDATA6_4, 4 .EQU CANFD12_RXDATA6_RXDATA6_3, 3 .EQU CANFD12_RXDATA6_RXDATA6_2, 2 .EQU CANFD12_RXDATA6_RXDATA6_1, 1 .EQU CANFD12_RXDATA6_RXDATA6_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA7, 0x4000433C // 0x4000 433C CANFD12_RXDATA7 Bits------------------------------------- .EQU CANFD12_RXDATA7_RXDATA7_31, 31 .EQU CANFD12_RXDATA7_RXDATA7_30, 30 .EQU CANFD12_RXDATA7_RXDATA7_29, 29 .EQU CANFD12_RXDATA7_RXDATA7_28, 28 .EQU CANFD12_RXDATA7_RXDATA7_27, 27 .EQU CANFD12_RXDATA7_RXDATA7_26, 26 .EQU CANFD12_RXDATA7_RXDATA7_25, 25 .EQU CANFD12_RXDATA7_RXDATA7_24, 24 .EQU CANFD12_RXDATA7_RXDATA7_23, 23 .EQU CANFD12_RXDATA7_RXDATA7_22, 22 .EQU CANFD12_RXDATA7_RXDATA7_21, 21 .EQU CANFD12_RXDATA7_RXDATA7_20, 20 .EQU CANFD12_RXDATA7_RXDATA7_19, 19 .EQU CANFD12_RXDATA7_RXDATA7_18, 18 .EQU CANFD12_RXDATA7_RXDATA7_17, 17 .EQU CANFD12_RXDATA7_RXDATA7_16, 16 .EQU CANFD12_RXDATA7_RXDATA7_15, 15 .EQU CANFD12_RXDATA7_RXDATA7_14, 14 .EQU CANFD12_RXDATA7_RXDATA7_13, 13 .EQU CANFD12_RXDATA7_RXDATA7_12, 12 .EQU CANFD12_RXDATA7_RXDATA7_11, 11 .EQU CANFD12_RXDATA7_RXDATA7_10, 10 .EQU CANFD12_RXDATA7_RXDATA7_9, 9 .EQU CANFD12_RXDATA7_RXDATA7_8, 8 .EQU CANFD12_RXDATA7_RXDATA7_7, 7 .EQU CANFD12_RXDATA7_RXDATA7_6, 6 .EQU CANFD12_RXDATA7_RXDATA7_5, 5 .EQU CANFD12_RXDATA7_RXDATA7_4, 4 .EQU CANFD12_RXDATA7_RXDATA7_3, 3 .EQU CANFD12_RXDATA7_RXDATA7_2, 2 .EQU CANFD12_RXDATA7_RXDATA7_1, 1 .EQU CANFD12_RXDATA7_RXDATA7_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA8, 0x40004340 // 0x4000 4340 CANFD12_RXDATA8 Bits------------------------------------- .EQU CANFD12_RXDATA8_RXDATA8_31, 31 .EQU CANFD12_RXDATA8_RXDATA8_30, 30 .EQU CANFD12_RXDATA8_RXDATA8_29, 29 .EQU CANFD12_RXDATA8_RXDATA8_28, 28 .EQU CANFD12_RXDATA8_RXDATA8_27, 27 .EQU CANFD12_RXDATA8_RXDATA8_26, 26 .EQU CANFD12_RXDATA8_RXDATA8_25, 25 .EQU CANFD12_RXDATA8_RXDATA8_24, 24 .EQU CANFD12_RXDATA8_RXDATA8_23, 23 .EQU CANFD12_RXDATA8_RXDATA8_22, 22 .EQU CANFD12_RXDATA8_RXDATA8_21, 21 .EQU CANFD12_RXDATA8_RXDATA8_20, 20 .EQU CANFD12_RXDATA8_RXDATA8_19, 19 .EQU CANFD12_RXDATA8_RXDATA8_18, 18 .EQU CANFD12_RXDATA8_RXDATA8_17, 17 .EQU CANFD12_RXDATA8_RXDATA8_16, 16 .EQU CANFD12_RXDATA8_RXDATA8_15, 15 .EQU CANFD12_RXDATA8_RXDATA8_14, 14 .EQU CANFD12_RXDATA8_RXDATA8_13, 13 .EQU CANFD12_RXDATA8_RXDATA8_12, 12 .EQU CANFD12_RXDATA8_RXDATA8_11, 11 .EQU CANFD12_RXDATA8_RXDATA8_10, 10 .EQU CANFD12_RXDATA8_RXDATA8_9, 9 .EQU CANFD12_RXDATA8_RXDATA8_8, 8 .EQU CANFD12_RXDATA8_RXDATA8_7, 7 .EQU CANFD12_RXDATA8_RXDATA8_6, 6 .EQU CANFD12_RXDATA8_RXDATA8_5, 5 .EQU CANFD12_RXDATA8_RXDATA8_4, 4 .EQU CANFD12_RXDATA8_RXDATA8_3, 3 .EQU CANFD12_RXDATA8_RXDATA8_2, 2 .EQU CANFD12_RXDATA8_RXDATA8_1, 1 .EQU CANFD12_RXDATA8_RXDATA8_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA9, 0x40004344 // 0x4000 4344 CANFD12_RXDATA9 Bits------------------------------------- .EQU CANFD12_RXDATA9_RXDATA9_31, 31 .EQU CANFD12_RXDATA9_RXDATA9_30, 30 .EQU CANFD12_RXDATA9_RXDATA9_29, 29 .EQU CANFD12_RXDATA9_RXDATA9_28, 28 .EQU CANFD12_RXDATA9_RXDATA9_27, 27 .EQU CANFD12_RXDATA9_RXDATA9_26, 26 .EQU CANFD12_RXDATA9_RXDATA9_25, 25 .EQU CANFD12_RXDATA9_RXDATA9_24, 24 .EQU CANFD12_RXDATA9_RXDATA9_23, 23 .EQU CANFD12_RXDATA9_RXDATA9_22, 22 .EQU CANFD12_RXDATA9_RXDATA9_21, 21 .EQU CANFD12_RXDATA9_RXDATA9_20, 20 .EQU CANFD12_RXDATA9_RXDATA9_19, 19 .EQU CANFD12_RXDATA9_RXDATA9_18, 18 .EQU CANFD12_RXDATA9_RXDATA9_17, 17 .EQU CANFD12_RXDATA9_RXDATA9_16, 16 .EQU CANFD12_RXDATA9_RXDATA9_15, 15 .EQU CANFD12_RXDATA9_RXDATA9_14, 14 .EQU CANFD12_RXDATA9_RXDATA9_13, 13 .EQU CANFD12_RXDATA9_RXDATA9_12, 12 .EQU CANFD12_RXDATA9_RXDATA9_11, 11 .EQU CANFD12_RXDATA9_RXDATA9_10, 10 .EQU CANFD12_RXDATA9_RXDATA9_9, 9 .EQU CANFD12_RXDATA9_RXDATA9_8, 8 .EQU CANFD12_RXDATA9_RXDATA9_7, 7 .EQU CANFD12_RXDATA9_RXDATA9_6, 6 .EQU CANFD12_RXDATA9_RXDATA9_5, 5 .EQU CANFD12_RXDATA9_RXDATA9_4, 4 .EQU CANFD12_RXDATA9_RXDATA9_3, 3 .EQU CANFD12_RXDATA9_RXDATA9_2, 2 .EQU CANFD12_RXDATA9_RXDATA9_1, 1 .EQU CANFD12_RXDATA9_RXDATA9_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA10, 0x40004348 // 0x4000 4348 CANFD12_RXDATA10 Bits------------------------------------- .EQU CANFD12_RXDATA10_RXDATA10_31, 31 .EQU CANFD12_RXDATA10_RXDATA10_30, 30 .EQU CANFD12_RXDATA10_RXDATA10_29, 29 .EQU CANFD12_RXDATA10_RXDATA10_28, 28 .EQU CANFD12_RXDATA10_RXDATA10_27, 27 .EQU CANFD12_RXDATA10_RXDATA10_26, 26 .EQU CANFD12_RXDATA10_RXDATA10_25, 25 .EQU CANFD12_RXDATA10_RXDATA10_24, 24 .EQU CANFD12_RXDATA10_RXDATA10_23, 23 .EQU CANFD12_RXDATA10_RXDATA10_22, 22 .EQU CANFD12_RXDATA10_RXDATA10_21, 21 .EQU CANFD12_RXDATA10_RXDATA10_20, 20 .EQU CANFD12_RXDATA10_RXDATA10_19, 19 .EQU CANFD12_RXDATA10_RXDATA10_18, 18 .EQU CANFD12_RXDATA10_RXDATA10_17, 17 .EQU CANFD12_RXDATA10_RXDATA10_16, 16 .EQU CANFD12_RXDATA10_RXDATA10_15, 15 .EQU CANFD12_RXDATA10_RXDATA10_14, 14 .EQU CANFD12_RXDATA10_RXDATA10_13, 13 .EQU CANFD12_RXDATA10_RXDATA10_12, 12 .EQU CANFD12_RXDATA10_RXDATA10_11, 11 .EQU CANFD12_RXDATA10_RXDATA10_10, 10 .EQU CANFD12_RXDATA10_RXDATA10_9, 9 .EQU CANFD12_RXDATA10_RXDATA10_8, 8 .EQU CANFD12_RXDATA10_RXDATA10_7, 7 .EQU CANFD12_RXDATA10_RXDATA10_6, 6 .EQU CANFD12_RXDATA10_RXDATA10_5, 5 .EQU CANFD12_RXDATA10_RXDATA10_4, 4 .EQU CANFD12_RXDATA10_RXDATA10_3, 3 .EQU CANFD12_RXDATA10_RXDATA10_2, 2 .EQU CANFD12_RXDATA10_RXDATA10_1, 1 .EQU CANFD12_RXDATA10_RXDATA10_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA11, 0x4000434C // 0x4000 434C CANFD12_RXDATA11 Bits------------------------------------- .EQU CANFD12_RXDATA11_RXDATA11_31, 31 .EQU CANFD12_RXDATA11_RXDATA11_30, 30 .EQU CANFD12_RXDATA11_RXDATA11_29, 29 .EQU CANFD12_RXDATA11_RXDATA11_28, 28 .EQU CANFD12_RXDATA11_RXDATA11_27, 27 .EQU CANFD12_RXDATA11_RXDATA11_26, 26 .EQU CANFD12_RXDATA11_RXDATA11_25, 25 .EQU CANFD12_RXDATA11_RXDATA11_24, 24 .EQU CANFD12_RXDATA11_RXDATA11_23, 23 .EQU CANFD12_RXDATA11_RXDATA11_22, 22 .EQU CANFD12_RXDATA11_RXDATA11_21, 21 .EQU CANFD12_RXDATA11_RXDATA11_20, 20 .EQU CANFD12_RXDATA11_RXDATA11_19, 19 .EQU CANFD12_RXDATA11_RXDATA11_18, 18 .EQU CANFD12_RXDATA11_RXDATA11_17, 17 .EQU CANFD12_RXDATA11_RXDATA11_16, 16 .EQU CANFD12_RXDATA11_RXDATA11_15, 15 .EQU CANFD12_RXDATA11_RXDATA11_14, 14 .EQU CANFD12_RXDATA11_RXDATA11_13, 13 .EQU CANFD12_RXDATA11_RXDATA11_12, 12 .EQU CANFD12_RXDATA11_RXDATA11_11, 11 .EQU CANFD12_RXDATA11_RXDATA11_10, 10 .EQU CANFD12_RXDATA11_RXDATA11_9, 9 .EQU CANFD12_RXDATA11_RXDATA11_8, 8 .EQU CANFD12_RXDATA11_RXDATA11_7, 7 .EQU CANFD12_RXDATA11_RXDATA11_6, 6 .EQU CANFD12_RXDATA11_RXDATA11_5, 5 .EQU CANFD12_RXDATA11_RXDATA11_4, 4 .EQU CANFD12_RXDATA11_RXDATA11_3, 3 .EQU CANFD12_RXDATA11_RXDATA11_2, 2 .EQU CANFD12_RXDATA11_RXDATA11_1, 1 .EQU CANFD12_RXDATA11_RXDATA11_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA12, 0x40004350 // 0x4000 4350 CANFD12_RXDATA12 Bits------------------------------------- .EQU CANFD12_RXDATA12_RXDATA12_31, 31 .EQU CANFD12_RXDATA12_RXDATA12_30, 30 .EQU CANFD12_RXDATA12_RXDATA12_29, 29 .EQU CANFD12_RXDATA12_RXDATA12_28, 28 .EQU CANFD12_RXDATA12_RXDATA12_27, 27 .EQU CANFD12_RXDATA12_RXDATA12_26, 26 .EQU CANFD12_RXDATA12_RXDATA12_25, 25 .EQU CANFD12_RXDATA12_RXDATA12_24, 24 .EQU CANFD12_RXDATA12_RXDATA12_23, 23 .EQU CANFD12_RXDATA12_RXDATA12_22, 22 .EQU CANFD12_RXDATA12_RXDATA12_21, 21 .EQU CANFD12_RXDATA12_RXDATA12_20, 20 .EQU CANFD12_RXDATA12_RXDATA12_19, 19 .EQU CANFD12_RXDATA12_RXDATA12_18, 18 .EQU CANFD12_RXDATA12_RXDATA12_17, 17 .EQU CANFD12_RXDATA12_RXDATA12_16, 16 .EQU CANFD12_RXDATA12_RXDATA12_15, 15 .EQU CANFD12_RXDATA12_RXDATA12_14, 14 .EQU CANFD12_RXDATA12_RXDATA12_13, 13 .EQU CANFD12_RXDATA12_RXDATA12_12, 12 .EQU CANFD12_RXDATA12_RXDATA12_11, 11 .EQU CANFD12_RXDATA12_RXDATA12_10, 10 .EQU CANFD12_RXDATA12_RXDATA12_9, 9 .EQU CANFD12_RXDATA12_RXDATA12_8, 8 .EQU CANFD12_RXDATA12_RXDATA12_7, 7 .EQU CANFD12_RXDATA12_RXDATA12_6, 6 .EQU CANFD12_RXDATA12_RXDATA12_5, 5 .EQU CANFD12_RXDATA12_RXDATA12_4, 4 .EQU CANFD12_RXDATA12_RXDATA12_3, 3 .EQU CANFD12_RXDATA12_RXDATA12_2, 2 .EQU CANFD12_RXDATA12_RXDATA12_1, 1 .EQU CANFD12_RXDATA12_RXDATA12_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA13, 0x40004354 // 0x4000 4354 CANFD12_RXDATA13 Bits------------------------------------- .EQU CANFD12_RXDATA13_RXDATA13_31, 31 .EQU CANFD12_RXDATA13_RXDATA13_30, 30 .EQU CANFD12_RXDATA13_RXDATA13_29, 29 .EQU CANFD12_RXDATA13_RXDATA13_28, 28 .EQU CANFD12_RXDATA13_RXDATA13_27, 27 .EQU CANFD12_RXDATA13_RXDATA13_26, 26 .EQU CANFD12_RXDATA13_RXDATA13_25, 25 .EQU CANFD12_RXDATA13_RXDATA13_24, 24 .EQU CANFD12_RXDATA13_RXDATA13_23, 23 .EQU CANFD12_RXDATA13_RXDATA13_22, 22 .EQU CANFD12_RXDATA13_RXDATA13_21, 21 .EQU CANFD12_RXDATA13_RXDATA13_20, 20 .EQU CANFD12_RXDATA13_RXDATA13_19, 19 .EQU CANFD12_RXDATA13_RXDATA13_18, 18 .EQU CANFD12_RXDATA13_RXDATA13_17, 17 .EQU CANFD12_RXDATA13_RXDATA13_16, 16 .EQU CANFD12_RXDATA13_RXDATA13_15, 15 .EQU CANFD12_RXDATA13_RXDATA13_14, 14 .EQU CANFD12_RXDATA13_RXDATA13_13, 13 .EQU CANFD12_RXDATA13_RXDATA13_12, 12 .EQU CANFD12_RXDATA13_RXDATA13_11, 11 .EQU CANFD12_RXDATA13_RXDATA13_10, 10 .EQU CANFD12_RXDATA13_RXDATA13_9, 9 .EQU CANFD12_RXDATA13_RXDATA13_8, 8 .EQU CANFD12_RXDATA13_RXDATA13_7, 7 .EQU CANFD12_RXDATA13_RXDATA13_6, 6 .EQU CANFD12_RXDATA13_RXDATA13_5, 5 .EQU CANFD12_RXDATA13_RXDATA13_4, 4 .EQU CANFD12_RXDATA13_RXDATA13_3, 3 .EQU CANFD12_RXDATA13_RXDATA13_2, 2 .EQU CANFD12_RXDATA13_RXDATA13_1, 1 .EQU CANFD12_RXDATA13_RXDATA13_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA14, 0x40004358 // 0x4000 4358 CANFD12_RXDATA14 Bits------------------------------------- .EQU CANFD12_RXDATA14_RXDATA14_31, 31 .EQU CANFD12_RXDATA14_RXDATA14_30, 30 .EQU CANFD12_RXDATA14_RXDATA14_29, 29 .EQU CANFD12_RXDATA14_RXDATA14_28, 28 .EQU CANFD12_RXDATA14_RXDATA14_27, 27 .EQU CANFD12_RXDATA14_RXDATA14_26, 26 .EQU CANFD12_RXDATA14_RXDATA14_25, 25 .EQU CANFD12_RXDATA14_RXDATA14_24, 24 .EQU CANFD12_RXDATA14_RXDATA14_23, 23 .EQU CANFD12_RXDATA14_RXDATA14_22, 22 .EQU CANFD12_RXDATA14_RXDATA14_21, 21 .EQU CANFD12_RXDATA14_RXDATA14_20, 20 .EQU CANFD12_RXDATA14_RXDATA14_19, 19 .EQU CANFD12_RXDATA14_RXDATA14_18, 18 .EQU CANFD12_RXDATA14_RXDATA14_17, 17 .EQU CANFD12_RXDATA14_RXDATA14_16, 16 .EQU CANFD12_RXDATA14_RXDATA14_15, 15 .EQU CANFD12_RXDATA14_RXDATA14_14, 14 .EQU CANFD12_RXDATA14_RXDATA14_13, 13 .EQU CANFD12_RXDATA14_RXDATA14_12, 12 .EQU CANFD12_RXDATA14_RXDATA14_11, 11 .EQU CANFD12_RXDATA14_RXDATA14_10, 10 .EQU CANFD12_RXDATA14_RXDATA14_9, 9 .EQU CANFD12_RXDATA14_RXDATA14_8, 8 .EQU CANFD12_RXDATA14_RXDATA14_7, 7 .EQU CANFD12_RXDATA14_RXDATA14_6, 6 .EQU CANFD12_RXDATA14_RXDATA14_5, 5 .EQU CANFD12_RXDATA14_RXDATA14_4, 4 .EQU CANFD12_RXDATA14_RXDATA14_3, 3 .EQU CANFD12_RXDATA14_RXDATA14_2, 2 .EQU CANFD12_RXDATA14_RXDATA14_1, 1 .EQU CANFD12_RXDATA14_RXDATA14_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA15, 0x4000435C // 0x4000 435C CANFD12_RXDATA15 Bits------------------------------------- .EQU CANFD12_RXDATA15_RXDATA15_31, 31 .EQU CANFD12_RXDATA15_RXDATA15_30, 30 .EQU CANFD12_RXDATA15_RXDATA15_29, 29 .EQU CANFD12_RXDATA15_RXDATA15_28, 28 .EQU CANFD12_RXDATA15_RXDATA15_27, 27 .EQU CANFD12_RXDATA15_RXDATA15_26, 26 .EQU CANFD12_RXDATA15_RXDATA15_25, 25 .EQU CANFD12_RXDATA15_RXDATA15_24, 24 .EQU CANFD12_RXDATA15_RXDATA15_23, 23 .EQU CANFD12_RXDATA15_RXDATA15_22, 22 .EQU CANFD12_RXDATA15_RXDATA15_21, 21 .EQU CANFD12_RXDATA15_RXDATA15_20, 20 .EQU CANFD12_RXDATA15_RXDATA15_19, 19 .EQU CANFD12_RXDATA15_RXDATA15_18, 18 .EQU CANFD12_RXDATA15_RXDATA15_17, 17 .EQU CANFD12_RXDATA15_RXDATA15_16, 16 .EQU CANFD12_RXDATA15_RXDATA15_15, 15 .EQU CANFD12_RXDATA15_RXDATA15_14, 14 .EQU CANFD12_RXDATA15_RXDATA15_13, 13 .EQU CANFD12_RXDATA15_RXDATA15_12, 12 .EQU CANFD12_RXDATA15_RXDATA15_11, 11 .EQU CANFD12_RXDATA15_RXDATA15_10, 10 .EQU CANFD12_RXDATA15_RXDATA15_9, 9 .EQU CANFD12_RXDATA15_RXDATA15_8, 8 .EQU CANFD12_RXDATA15_RXDATA15_7, 7 .EQU CANFD12_RXDATA15_RXDATA15_6, 6 .EQU CANFD12_RXDATA15_RXDATA15_5, 5 .EQU CANFD12_RXDATA15_RXDATA15_4, 4 .EQU CANFD12_RXDATA15_RXDATA15_3, 3 .EQU CANFD12_RXDATA15_RXDATA15_2, 2 .EQU CANFD12_RXDATA15_RXDATA15_1, 1 .EQU CANFD12_RXDATA15_RXDATA15_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA16, 0x40004360 // 0x4000 4360 CANFD12_RXDATA16 Bits------------------------------------- .EQU CANFD12_RXDATA16_RXDATA16_31, 31 .EQU CANFD12_RXDATA16_RXDATA16_30, 30 .EQU CANFD12_RXDATA16_RXDATA16_29, 29 .EQU CANFD12_RXDATA16_RXDATA16_28, 28 .EQU CANFD12_RXDATA16_RXDATA16_27, 27 .EQU CANFD12_RXDATA16_RXDATA16_26, 26 .EQU CANFD12_RXDATA16_RXDATA16_25, 25 .EQU CANFD12_RXDATA16_RXDATA16_24, 24 .EQU CANFD12_RXDATA16_RXDATA16_23, 23 .EQU CANFD12_RXDATA16_RXDATA16_22, 22 .EQU CANFD12_RXDATA16_RXDATA16_21, 21 .EQU CANFD12_RXDATA16_RXDATA16_20, 20 .EQU CANFD12_RXDATA16_RXDATA16_19, 19 .EQU CANFD12_RXDATA16_RXDATA16_18, 18 .EQU CANFD12_RXDATA16_RXDATA16_17, 17 .EQU CANFD12_RXDATA16_RXDATA16_16, 16 .EQU CANFD12_RXDATA16_RXDATA16_15, 15 .EQU CANFD12_RXDATA16_RXDATA16_14, 14 .EQU CANFD12_RXDATA16_RXDATA16_13, 13 .EQU CANFD12_RXDATA16_RXDATA16_12, 12 .EQU CANFD12_RXDATA16_RXDATA16_11, 11 .EQU CANFD12_RXDATA16_RXDATA16_10, 10 .EQU CANFD12_RXDATA16_RXDATA16_9, 9 .EQU CANFD12_RXDATA16_RXDATA16_8, 8 .EQU CANFD12_RXDATA16_RXDATA16_7, 7 .EQU CANFD12_RXDATA16_RXDATA16_6, 6 .EQU CANFD12_RXDATA16_RXDATA16_5, 5 .EQU CANFD12_RXDATA16_RXDATA16_4, 4 .EQU CANFD12_RXDATA16_RXDATA16_3, 3 .EQU CANFD12_RXDATA16_RXDATA16_2, 2 .EQU CANFD12_RXDATA16_RXDATA16_1, 1 .EQU CANFD12_RXDATA16_RXDATA16_0, 0 // register------------------------------------- .EQU CANFD12_RXDATA17, 0x40004364 // 0x4000 4364 CANFD12_RXDATA17 Bits------------------------------------- .EQU CANFD12_RXDATA17_RXDATA17_31, 31 .EQU CANFD12_RXDATA17_RXDATA17_30, 30 .EQU CANFD12_RXDATA17_RXDATA17_29, 29 .EQU CANFD12_RXDATA17_RXDATA17_28, 28 .EQU CANFD12_RXDATA17_RXDATA17_27, 27 .EQU CANFD12_RXDATA17_RXDATA17_26, 26 .EQU CANFD12_RXDATA17_RXDATA17_25, 25 .EQU CANFD12_RXDATA17_RXDATA17_24, 24 .EQU CANFD12_RXDATA17_RXDATA17_23, 23 .EQU CANFD12_RXDATA17_RXDATA17_22, 22 .EQU CANFD12_RXDATA17_RXDATA17_21, 21 .EQU CANFD12_RXDATA17_RXDATA17_20, 20 .EQU CANFD12_RXDATA17_RXDATA17_19, 19 .EQU CANFD12_RXDATA17_RXDATA17_18, 18 .EQU CANFD12_RXDATA17_RXDATA17_17, 17 .EQU CANFD12_RXDATA17_RXDATA17_16, 16 .EQU CANFD12_RXDATA17_RXDATA17_15, 15 .EQU CANFD12_RXDATA17_RXDATA17_14, 14 .EQU CANFD12_RXDATA17_RXDATA17_13, 13 .EQU CANFD12_RXDATA17_RXDATA17_12, 12 .EQU CANFD12_RXDATA17_RXDATA17_11, 11 .EQU CANFD12_RXDATA17_RXDATA17_10, 10 .EQU CANFD12_RXDATA17_RXDATA17_9, 9 .EQU CANFD12_RXDATA17_RXDATA17_8, 8 .EQU CANFD12_RXDATA17_RXDATA17_7, 7 .EQU CANFD12_RXDATA17_RXDATA17_6, 6 .EQU CANFD12_RXDATA17_RXDATA17_5, 5 .EQU CANFD12_RXDATA17_RXDATA17_4, 4 .EQU CANFD12_RXDATA17_RXDATA17_3, 3 .EQU CANFD12_RXDATA17_RXDATA17_2, 2 .EQU CANFD12_RXDATA17_RXDATA17_1, 1 .EQU CANFD12_RXDATA17_RXDATA17_0, 0 // register------------------------------------- .EQU CANFD12_TIMER, 0x40004368 // 0x4000 4368 CANFD12_TIMER Bits------------------------------------- .EQU CANFD12_TIMER_CANTIMER15, 15 .EQU CANFD12_TIMER_CANTIMER14, 14 .EQU CANFD12_TIMER_CANTIMER13, 13 .EQU CANFD12_TIMER_CANTIMER12, 12 .EQU CANFD12_TIMER_CANTIMER11, 11 .EQU CANFD12_TIMER_CANTIMER10, 10 .EQU CANFD12_TIMER_CANTIMER9, 9 .EQU CANFD12_TIMER_CANTIMER8, 8 .EQU CANFD12_TIMER_CANTIMER7, 7 .EQU CANFD12_TIMER_CANTIMER6, 6 .EQU CANFD12_TIMER_CANTIMER5, 5 .EQU CANFD12_TIMER_CANTIMER4, 4 .EQU CANFD12_TIMER_CANTIMER3, 3 .EQU CANFD12_TIMER_CANTIMER2, 2 .EQU CANFD12_TIMER_CANTIMER1, 1 .EQU CANFD12_TIMER_CANTIMER0, 0 // register------------------------------------- .EQU CANFD12_CRC, 0x4000436C // 0x4000 436C CANFD12_CRC Bits------------------------------------- .EQU CANFD12_CRC_STUFFCNT3, 31 .EQU CANFD12_CRC_STUFFCNT2, 30 .EQU CANFD12_CRC_STUFFCNT1, 29 .EQU CANFD12_CRC_STUFFCNT0, 28 .EQU CANFD12_CRC_CRC20, 20 .EQU CANFD12_CRC_CRC19, 19 .EQU CANFD12_CRC_CRC18, 18 .EQU CANFD12_CRC_CRC17, 17 .EQU CANFD12_CRC_CRC16, 16 .EQU CANFD12_CRC_CRC15, 15 .EQU CANFD12_CRC_CRC14, 14 .EQU CANFD12_CRC_CRC13, 13 .EQU CANFD12_CRC_CRC12, 12 .EQU CANFD12_CRC_CRC11, 11 .EQU CANFD12_CRC_CRC10, 10 .EQU CANFD12_CRC_CRC9, 9 .EQU CANFD12_CRC_CRC8, 8 .EQU CANFD12_CRC_CRC7, 7 .EQU CANFD12_CRC_CRC6, 6 .EQU CANFD12_CRC_CRC5, 5 .EQU CANFD12_CRC_CRC4, 4 .EQU CANFD12_CRC_CRC3, 3 .EQU CANFD12_CRC_CRC2, 2 .EQU CANFD12_CRC_CRC1, 1 .EQU CANFD12_CRC_CRC0, 0 // register------------------------------------- .EQU CANFD12_CTLR1, 0x40004374 // 0x4000 4374 CANFD12_CTLR1 Bits------------------------------------- .EQU CANFD12_CTLR1_TRGMBEN, 31 .EQU CANFD12_CTLR1_TRGMBSEL6, 30 .EQU CANFD12_CTLR1_TRGMBSEL5, 29 .EQU CANFD12_CTLR1_TRGMBSEL4, 28 .EQU CANFD12_CTLR1_TRGMBSEL3, 27 .EQU CANFD12_CTLR1_TRGMBSEL2, 26 .EQU CANFD12_CTLR1_TRGMBSEL1, 25 .EQU CANFD12_CTLR1_TRGMBSEL0, 24 .EQU CANFD12_CTLR1_TRGNUM3, 23 .EQU CANFD12_CTLR1_TRGNUM2, 22 .EQU CANFD12_CTLR1_TRGNUM1, 21 .EQU CANFD12_CTLR1_TRGNUM0, 20 .EQU CANFD12_CTLR1_CKMODE, 19 .EQU CANFD12_CTLR1_BOFFREC, 18 .EQU CANFD12_CTLR1_LBSEL, 17 .EQU CANFD12_CTLR1_ARBSTART, 16 .EQU CANFD12_CTLR1_ARBMS, 15 .EQU CANFD12_CTLR1_MBMSKEN, 14 .EQU CANFD12_CTLR1_MATCHMS, 13 .EQU CANFD12_CTLR1_MBNUM, 12 .EQU CANFD12_CTLR1_TSYN, 11 .EQU CANFD12_CTLR1_FTCLKS, 10 .EQU CANFD12_CTLR1_ST, 9 .EQU CANFD12_CTLR1_RXMUX6, 8 .EQU CANFD12_CTLR1_RXMUX5, 7 .EQU CANFD12_CTLR1_RXMUX4, 6 .EQU CANFD12_CTLR1_RXMUX3, 5 .EQU CANFD12_CTLR1_RXMUX2, 4 .EQU CANFD12_CTLR1_RXMUX1, 3 .EQU CANFD12_CTLR1_RXMUX0, 2 .EQU CANFD12_CTLR1_AMCKS1, 1 .EQU CANFD12_CTLR1_AMCKS0, 0 // register------------------------------------- .EQU CANFD12_AMSTA, 0x40004378 // 0x4000 4378 CANFD12_AMSTA Bits------------------------------------- .EQU CANFD12_AMSTA_TXCODE3, 31 .EQU CANFD12_AMSTA_TXCODE2, 30 .EQU CANFD12_AMSTA_TXCODE1, 29 .EQU CANFD12_AMSTA_TXCODE0, 28 .EQU CANFD12_AMSTA_ARBSTA1, 27 .EQU CANFD12_AMSTA_ARBSTA0, 26 .EQU CANFD12_AMSTA_ARBWINNER9, 25 .EQU CANFD12_AMSTA_ARBWINNER8, 24 .EQU CANFD12_AMSTA_ARBWINNER7, 23 .EQU CANFD12_AMSTA_ARBWINNER6, 22 .EQU CANFD12_AMSTA_ARBWINNER5, 21 .EQU CANFD12_AMSTA_ARBWINNER4, 20 .EQU CANFD12_AMSTA_ARBWINNER3, 19 .EQU CANFD12_AMSTA_ARBWINNER2, 18 .EQU CANFD12_AMSTA_ARBWINNER1, 17 .EQU CANFD12_AMSTA_ARBWINNER0, 16 .EQU CANFD12_AMSTA_BETEN, 15 .EQU CANFD12_AMSTA_RTRMEN, 14 .EQU CANFD12_AMSTA_IDSELEN, 13 .EQU CANFD12_AMSTA_RELRXALL, 12 .EQU CANFD12_AMSTA_ROPSTA, 11 .EQU CANFD12_AMSTA_MATSTA, 10 .EQU CANFD12_AMSTA_MATWINNER9, 9 .EQU CANFD12_AMSTA_MATWINNER8, 8 .EQU CANFD12_AMSTA_MATWINNER7, 7 .EQU CANFD12_AMSTA_MATWINNER6, 6 .EQU CANFD12_AMSTA_MATWINNER5, 5 .EQU CANFD12_AMSTA_MATWINNER4, 4 .EQU CANFD12_AMSTA_MATWINNER3, 3 .EQU CANFD12_AMSTA_MATWINNER2, 2 .EQU CANFD12_AMSTA_MATWINNER1, 1 .EQU CANFD12_AMSTA_MATWINNER0, 0 // register------------------------------------- .EQU CANFD12_TXDATA, 0x4000437C // 0x4000 437C CANFD12_TXDATA Bits------------------------------------- .EQU CANFD12_TXDATA_TXDATA31, 31 .EQU CANFD12_TXDATA_TXDATA30, 30 .EQU CANFD12_TXDATA_TXDATA29, 29 .EQU CANFD12_TXDATA_TXDATA28, 28 .EQU CANFD12_TXDATA_TXDATA27, 27 .EQU CANFD12_TXDATA_TXDATA26, 26 .EQU CANFD12_TXDATA_TXDATA25, 25 .EQU CANFD12_TXDATA_TXDATA24, 24 .EQU CANFD12_TXDATA_TXDATA23, 23 .EQU CANFD12_TXDATA_TXDATA22, 22 .EQU CANFD12_TXDATA_TXDATA21, 21 .EQU CANFD12_TXDATA_TXDATA20, 20 .EQU CANFD12_TXDATA_TXDATA19, 19 .EQU CANFD12_TXDATA_TXDATA18, 18 .EQU CANFD12_TXDATA_TXDATA17, 17 .EQU CANFD12_TXDATA_TXDATA16, 16 .EQU CANFD12_TXDATA_TXDATA15, 15 .EQU CANFD12_TXDATA_TXDATA14, 14 .EQU CANFD12_TXDATA_TXDATA13, 13 .EQU CANFD12_TXDATA_TXDATA12, 12 .EQU CANFD12_TXDATA_TXDATA11, 11 .EQU CANFD12_TXDATA_TXDATA10, 10 .EQU CANFD12_TXDATA_TXDATA9, 9 .EQU CANFD12_TXDATA_TXDATA8, 8 .EQU CANFD12_TXDATA_TXDATA7, 7 .EQU CANFD12_TXDATA_TXDATA6, 6 .EQU CANFD12_TXDATA_TXDATA5, 5 .EQU CANFD12_TXDATA_TXDATA4, 4 .EQU CANFD12_TXDATA_TXDATA3, 3 .EQU CANFD12_TXDATA_TXDATA2, 2 .EQU CANFD12_TXDATA_TXDATA1, 1 .EQU CANFD12_TXDATA_TXDATA0, 0 // register------------------------------------- .EQU CANFD13_CTLR0, 0x40004500 // 0x4000 4500 CANFD13_CTLR0 Bits------------------------------------- .EQU CANFD13_CTLR0_CANFDEN, 31 .EQU CANFD13_CTLR0_CANRMC6, 30 .EQU CANFD13_CTLR0_CANRMC5, 29 .EQU CANFD13_CTLR0_CANRMC4, 28 .EQU CANFD13_CTLR0_CANRMC3, 27 .EQU CANFD13_CTLR0_CANRMC2, 26 .EQU CANFD13_CTLR0_CANRMC1, 25 .EQU CANFD13_CTLR0_CANRMC0, 24 .EQU CANFD13_CTLR0_BOFF, 23 .EQU CANFD13_CTLR0_CERROR, 22 .EQU CANFD13_CTLR0_TXSTA, 21 .EQU CANFD13_CTLR0_RXSTA, 20 .EQU CANFD13_CTLR0_TCSTA, 19 .EQU CANFD13_CTLR0_DOSTA, 17 .EQU CANFD13_CTLR0_RXBSTA, 16 .EQU CANFD13_CTLR0_ANSWEREN, 15 .EQU CANFD13_CTLR0_FULLRXEN, 14 .EQU CANFD13_CTLR0_MBSIZE1, 13 .EQU CANFD13_CTLR0_MBSIZE0, 12 .EQU CANFD13_CTLR0_RELF, 11 .EQU CANFD13_CTLR0_RELRX, 10 .EQU CANFD13_CTLR0_ATX, 9 .EQU CANFD13_CTLR0_TXR, 8 .EQU CANFD13_CTLR0_CANEN, 7 .EQU CANFD13_CTLR0_CANCKS1, 6 .EQU CANFD13_CTLR0_CANCKS0, 5 .EQU CANFD13_CTLR0_ISOFDCANEN, 4 .EQU CANFD13_CTLR0_SLEEP, 3 .EQU CANFD13_CTLR0_LBACK, 2 .EQU CANFD13_CTLR0_SILENT, 1 .EQU CANFD13_CTLR0_RSMOD, 0 // register------------------------------------- .EQU CANFD13_BRGR, 0x40004504 // 0x4000 4504 CANFD13_BRGR Bits------------------------------------- .EQU CANFD13_BRGR_HTSEG2_2, 28 .EQU CANFD13_BRGR_HTSEG2_1, 27 .EQU CANFD13_BRGR_HTSEG2_0, 26 .EQU CANFD13_BRGR_HTSEG1_3, 25 .EQU CANFD13_BRGR_HTSEG1_2, 24 .EQU CANFD13_BRGR_HTSEG1_1, 23 .EQU CANFD13_BRGR_HTSEG1_0, 22 .EQU CANFD13_BRGR_BRSBRP5, 21 .EQU CANFD13_BRGR_BRSBRP4, 20 .EQU CANFD13_BRGR_BRSBRP3, 19 .EQU CANFD13_BRGR_BRSBRP2, 18 .EQU CANFD13_BRGR_BRSBRP1, 17 .EQU CANFD13_BRGR_BRSBRP0, 16 .EQU CANFD13_BRGR_SAM, 15 .EQU CANFD13_BRGR_TSEG2_2, 14 .EQU CANFD13_BRGR_TSEG2_1, 13 .EQU CANFD13_BRGR_TSEG2_0, 12 .EQU CANFD13_BRGR_TSEG1_3, 11 .EQU CANFD13_BRGR_TSEG1_2, 10 .EQU CANFD13_BRGR_TSEG1_1, 9 .EQU CANFD13_BRGR_TSEG1_0, 8 .EQU CANFD13_BRGR_SJW1, 7 .EQU CANFD13_BRGR_SJW0, 6 .EQU CANFD13_BRGR_CANBRP5, 5 .EQU CANFD13_BRGR_CANBRP4, 4 .EQU CANFD13_BRGR_CANBRP3, 3 .EQU CANFD13_BRGR_CANBRP2, 2 .EQU CANFD13_BRGR_CANBRP1, 1 .EQU CANFD13_BRGR_CANBRP0, 0 // register------------------------------------- .EQU CANFD13_RCR, 0x40004508 // 0x4000 4508 CANFD13_RCR Bits------------------------------------- .EQU CANFD13_RCR_DPRAMOF, 16 .EQU CANFD13_RCR_CANERRC1, 15 .EQU CANFD13_RCR_CANERRC0, 14 .EQU CANFD13_RCR_CANDIR, 13 .EQU CANFD13_RCR_CANSEG4, 12 .EQU CANFD13_RCR_CANSEG3, 11 .EQU CANFD13_RCR_CANSEG2, 10 .EQU CANFD13_RCR_CANSEG1, 9 .EQU CANFD13_RCR_CANSEG0, 8 .EQU CANFD13_RCR_CANALC4, 4 .EQU CANFD13_RCR_CANALC3, 3 .EQU CANFD13_RCR_CANALC2, 2 .EQU CANFD13_RCR_CANALC1, 1 .EQU CANFD13_RCR_CANALC0, 0 // register------------------------------------- .EQU CANFD13_EROR, 0x4000450C // 0x4000 450C CANFD13_EROR Bits------------------------------------- .EQU CANFD13_EROR_DPRAMFEN, 31 .EQU CANFD13_EROR_SFDMOD, 30 .EQU CANFD13_EROR_SFDEN, 29 .EQU CANFD13_EROR_SOSFD4, 28 .EQU CANFD13_EROR_SOSFD3, 27 .EQU CANFD13_EROR_SOSFD2, 26 .EQU CANFD13_EROR_SOSFD1, 25 .EQU CANFD13_EROR_SOSFD0, 24 .EQU CANFD13_EROR_CANEWL7, 23 .EQU CANFD13_EROR_CANEWL6, 22 .EQU CANFD13_EROR_CANEWL5, 21 .EQU CANFD13_EROR_CANEWL4, 20 .EQU CANFD13_EROR_CANEWL3, 19 .EQU CANFD13_EROR_CANEWL2, 18 .EQU CANFD13_EROR_CANEWL1, 17 .EQU CANFD13_EROR_CANEWL0, 16 .EQU CANFD13_EROR_CANTXE7, 15 .EQU CANFD13_EROR_CANTXE6, 14 .EQU CANFD13_EROR_CANTXE5, 13 .EQU CANFD13_EROR_CANTXE4, 12 .EQU CANFD13_EROR_CANTXE3, 11 .EQU CANFD13_EROR_CANTXE2, 10 .EQU CANFD13_EROR_CANTXE1, 9 .EQU CANFD13_EROR_CANTXE0, 8 .EQU CANFD13_EROR_CANRXE7, 7 .EQU CANFD13_EROR_CANRXE6, 6 .EQU CANFD13_EROR_CANRXE5, 5 .EQU CANFD13_EROR_CANRXE4, 4 .EQU CANFD13_EROR_CANRXE3, 3 .EQU CANFD13_EROR_CANRXE2, 2 .EQU CANFD13_EROR_CANRXE1, 1 .EQU CANFD13_EROR_CANRXE0, 0 // register------------------------------------- .EQU CANFD13_CTLR2, 0x40004510 // 0x4000 4510 CANFD13_CTLR2 Bits------------------------------------- .EQU CANFD13_CTLR2_AMCKDIV1, 26 .EQU CANFD13_CTLR2_AMCKDIV0, 25 .EQU CANFD13_CTLR2_DESEL, 24 .EQU CANFD13_CTLR2_TDCVM6, 22 .EQU CANFD13_CTLR2_TDCVM5, 21 .EQU CANFD13_CTLR2_TDCVM4, 20 .EQU CANFD13_CTLR2_TDCVM3, 19 .EQU CANFD13_CTLR2_TDCVM2, 18 .EQU CANFD13_CTLR2_TDCVM1, 17 .EQU CANFD13_CTLR2_TDCVM0, 16 .EQU CANFD13_CTLR2_TDC0_1, 15 .EQU CANFD13_CTLR2_TDC0_0, 14 .EQU CANFD13_CTLR2_TDCSR1, 13 .EQU CANFD13_CTLR2_TDCSR0, 12 .EQU CANFD13_CTLR2_TDCS1, 11 .EQU CANFD13_CTLR2_TDCS0, 10 .EQU CANFD13_CTLR2_TDCAUT0, 9 .EQU CANFD13_CTLR2_TDCEN, 8 .EQU CANFD13_CTLR2_TDC0EN, 7 .EQU CANFD13_CTLR2_TDCV6, 6 .EQU CANFD13_CTLR2_TDCV5, 5 .EQU CANFD13_CTLR2_TDCV4, 4 .EQU CANFD13_CTLR2_TDCV3, 3 .EQU CANFD13_CTLR2_TDCV2, 2 .EQU CANFD13_CTLR2_TDCV1, 1 .EQU CANFD13_CTLR2_TDCV0, 0 // register------------------------------------- .EQU CANFD13_MSKR, 0x40004514 // 0x4000 4514 CANFD13_MSKR Bits------------------------------------- .EQU CANFD13_MSKR_MSK31, 31 .EQU CANFD13_MSKR_MSK30, 30 .EQU CANFD13_MSKR_MSK29, 29 .EQU CANFD13_MSKR_MSK28, 28 .EQU CANFD13_MSKR_MSK27, 27 .EQU CANFD13_MSKR_MSK26, 26 .EQU CANFD13_MSKR_MSK25, 25 .EQU CANFD13_MSKR_MSK24, 24 .EQU CANFD13_MSKR_MSK23, 23 .EQU CANFD13_MSKR_MSK22, 22 .EQU CANFD13_MSKR_MSK21, 21 .EQU CANFD13_MSKR_MSK20, 20 .EQU CANFD13_MSKR_MSK19, 19 .EQU CANFD13_MSKR_MSK18, 18 .EQU CANFD13_MSKR_MSK17, 17 .EQU CANFD13_MSKR_MSK16, 16 .EQU CANFD13_MSKR_MSK15, 15 .EQU CANFD13_MSKR_MSK14, 14 .EQU CANFD13_MSKR_MSK13, 13 .EQU CANFD13_MSKR_MSK12, 12 .EQU CANFD13_MSKR_MSK11, 11 .EQU CANFD13_MSKR_MSK10, 10 .EQU CANFD13_MSKR_MSK9, 9 .EQU CANFD13_MSKR_MSK8, 8 .EQU CANFD13_MSKR_MSK7, 7 .EQU CANFD13_MSKR_MSK6, 6 .EQU CANFD13_MSKR_MSK5, 5 .EQU CANFD13_MSKR_MSK4, 4 .EQU CANFD13_MSKR_MSK3, 3 .EQU CANFD13_MSKR_MSK2, 2 .EQU CANFD13_MSKR_MSK1, 1 .EQU CANFD13_MSKR_MSK0, 0 // register------------------------------------- .EQU CANFD13_IER, 0x40004518 // 0x4000 4518 CANFD13_IER Bits------------------------------------- .EQU CANFD13_IER_FAILCLR, 31 .EQU CANFD13_IER_LPCANGPIOSEL0, 30 .EQU CANFD13_IER_BOFFIC, 28 .EQU CANFD13_IER_TRGMBIC, 27 .EQU CANFD13_IER_MOENDIC, 26 .EQU CANFD13_IER_BEIC, 23 .EQU CANFD13_IER_ALIC, 22 .EQU CANFD13_IER_ENIC, 21 .EQU CANFD13_IER_WUIC, 20 .EQU CANFD13_IER_DOVFIC, 19 .EQU CANFD13_IER_EAIC, 18 .EQU CANFD13_IER_CANTXIC, 17 .EQU CANFD13_IER_CANRXIC, 16 .EQU CANFD13_IER_MOENDIE, 15 .EQU CANFD13_IER_ARBFAILIE, 14 .EQU CANFD13_IER_BOFFIE, 12 .EQU CANFD13_IER_TRGMBIE, 11 .EQU CANFD13_IER_RXBSTAIE, 10 .EQU CANFD13_IER_CRXDE, 9 .EQU CANFD13_IER_CTXDE, 8 .EQU CANFD13_IER_BEIE, 7 .EQU CANFD13_IER_ALIE, 6 .EQU CANFD13_IER_ENIE, 5 .EQU CANFD13_IER_WUIE, 4 .EQU CANFD13_IER_DOVFIE, 3 .EQU CANFD13_IER_EAIE, 2 .EQU CANFD13_IER_CANTXIE, 1 .EQU CANFD13_IER_CANRXIE, 0 // register------------------------------------- .EQU CANFD13_IFR, 0x4000451C // 0x4000 451C CANFD13_IFR Bits------------------------------------- .EQU CANFD13_IFR_MOENDIF, 14 .EQU CANFD13_IFR_BOFFIF, 12 .EQU CANFD13_IFR_TRGMBIF, 11 .EQU CANFD13_IFR_RXBSTAIF, 10 .EQU CANFD13_IFR_CRXDF, 9 .EQU CANFD13_IFR_CTXDF, 8 .EQU CANFD13_IFR_BEIF, 7 .EQU CANFD13_IFR_ALIF, 6 .EQU CANFD13_IFR_ENIF, 5 .EQU CANFD13_IFR_WUIF, 4 .EQU CANFD13_IFR_DOVFIF, 3 .EQU CANFD13_IFR_EAIF, 2 .EQU CANFD13_IFR_CANTXIF, 1 .EQU CANFD13_IFR_CANRXIF, 0 // register------------------------------------- .EQU CANFD13_RXDATA0, 0x40004520 // 0x4000 4520 CANFD13_RXDATA0 Bits------------------------------------- .EQU CANFD13_RXDATA0_RXDATA0_31, 31 .EQU CANFD13_RXDATA0_RXDATA0_30, 30 .EQU CANFD13_RXDATA0_RXDATA0_29, 29 .EQU CANFD13_RXDATA0_RXDATA0_28, 28 .EQU CANFD13_RXDATA0_RXDATA0_27, 27 .EQU CANFD13_RXDATA0_RXDATA0_26, 26 .EQU CANFD13_RXDATA0_RXDATA0_25, 25 .EQU CANFD13_RXDATA0_RXDATA0_24, 24 .EQU CANFD13_RXDATA0_RXDATA0_23, 23 .EQU CANFD13_RXDATA0_RXDATA0_22, 22 .EQU CANFD13_RXDATA0_RXDATA0_21, 21 .EQU CANFD13_RXDATA0_RXDATA0_20, 20 .EQU CANFD13_RXDATA0_RXDATA0_19, 19 .EQU CANFD13_RXDATA0_RXDATA0_18, 18 .EQU CANFD13_RXDATA0_RXDATA0_17, 17 .EQU CANFD13_RXDATA0_RXDATA0_16, 16 .EQU CANFD13_RXDATA0_RXDATA0_15, 15 .EQU CANFD13_RXDATA0_RXDATA0_14, 14 .EQU CANFD13_RXDATA0_RXDATA0_13, 13 .EQU CANFD13_RXDATA0_RXDATA0_12, 12 .EQU CANFD13_RXDATA0_RXDATA0_11, 11 .EQU CANFD13_RXDATA0_RXDATA0_10, 10 .EQU CANFD13_RXDATA0_RXDATA0_9, 9 .EQU CANFD13_RXDATA0_RXDATA0_8, 8 .EQU CANFD13_RXDATA0_RXDATA0_7, 7 .EQU CANFD13_RXDATA0_RXDATA0_6, 6 .EQU CANFD13_RXDATA0_RXDATA0_5, 5 .EQU CANFD13_RXDATA0_RXDATA0_4, 4 .EQU CANFD13_RXDATA0_RXDATA0_3, 3 .EQU CANFD13_RXDATA0_RXDATA0_2, 2 .EQU CANFD13_RXDATA0_RXDATA0_1, 1 .EQU CANFD13_RXDATA0_RXDATA0_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA1, 0x40004524 // 0x4000 4524 CANFD13_RXDATA1 Bits------------------------------------- .EQU CANFD13_RXDATA1_RXDATA1_31, 31 .EQU CANFD13_RXDATA1_RXDATA1_30, 30 .EQU CANFD13_RXDATA1_RXDATA1_29, 29 .EQU CANFD13_RXDATA1_RXDATA1_28, 28 .EQU CANFD13_RXDATA1_RXDATA1_27, 27 .EQU CANFD13_RXDATA1_RXDATA1_26, 26 .EQU CANFD13_RXDATA1_RXDATA1_25, 25 .EQU CANFD13_RXDATA1_RXDATA1_24, 24 .EQU CANFD13_RXDATA1_RXDATA1_23, 23 .EQU CANFD13_RXDATA1_RXDATA1_22, 22 .EQU CANFD13_RXDATA1_RXDATA1_21, 21 .EQU CANFD13_RXDATA1_RXDATA1_20, 20 .EQU CANFD13_RXDATA1_RXDATA1_19, 19 .EQU CANFD13_RXDATA1_RXDATA1_18, 18 .EQU CANFD13_RXDATA1_RXDATA1_17, 17 .EQU CANFD13_RXDATA1_RXDATA1_16, 16 .EQU CANFD13_RXDATA1_RXDATA1_15, 15 .EQU CANFD13_RXDATA1_RXDATA1_14, 14 .EQU CANFD13_RXDATA1_RXDATA1_13, 13 .EQU CANFD13_RXDATA1_RXDATA1_12, 12 .EQU CANFD13_RXDATA1_RXDATA1_11, 11 .EQU CANFD13_RXDATA1_RXDATA1_10, 10 .EQU CANFD13_RXDATA1_RXDATA1_9, 9 .EQU CANFD13_RXDATA1_RXDATA1_8, 8 .EQU CANFD13_RXDATA1_RXDATA1_7, 7 .EQU CANFD13_RXDATA1_RXDATA1_6, 6 .EQU CANFD13_RXDATA1_RXDATA1_5, 5 .EQU CANFD13_RXDATA1_RXDATA1_4, 4 .EQU CANFD13_RXDATA1_RXDATA1_3, 3 .EQU CANFD13_RXDATA1_RXDATA1_2, 2 .EQU CANFD13_RXDATA1_RXDATA1_1, 1 .EQU CANFD13_RXDATA1_RXDATA1_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA2, 0x40004528 // 0x4000 4528 CANFD13_RXDATA2 Bits------------------------------------- .EQU CANFD13_RXDATA2_RXDATA2_31, 31 .EQU CANFD13_RXDATA2_RXDATA2_30, 30 .EQU CANFD13_RXDATA2_RXDATA2_29, 29 .EQU CANFD13_RXDATA2_RXDATA2_28, 28 .EQU CANFD13_RXDATA2_RXDATA2_27, 27 .EQU CANFD13_RXDATA2_RXDATA2_26, 26 .EQU CANFD13_RXDATA2_RXDATA2_25, 25 .EQU CANFD13_RXDATA2_RXDATA2_24, 24 .EQU CANFD13_RXDATA2_RXDATA2_23, 23 .EQU CANFD13_RXDATA2_RXDATA2_22, 22 .EQU CANFD13_RXDATA2_RXDATA2_21, 21 .EQU CANFD13_RXDATA2_RXDATA2_20, 20 .EQU CANFD13_RXDATA2_RXDATA2_19, 19 .EQU CANFD13_RXDATA2_RXDATA2_18, 18 .EQU CANFD13_RXDATA2_RXDATA2_17, 17 .EQU CANFD13_RXDATA2_RXDATA2_16, 16 .EQU CANFD13_RXDATA2_RXDATA2_15, 15 .EQU CANFD13_RXDATA2_RXDATA2_14, 14 .EQU CANFD13_RXDATA2_RXDATA2_13, 13 .EQU CANFD13_RXDATA2_RXDATA2_12, 12 .EQU CANFD13_RXDATA2_RXDATA2_11, 11 .EQU CANFD13_RXDATA2_RXDATA2_10, 10 .EQU CANFD13_RXDATA2_RXDATA2_9, 9 .EQU CANFD13_RXDATA2_RXDATA2_8, 8 .EQU CANFD13_RXDATA2_RXDATA2_7, 7 .EQU CANFD13_RXDATA2_RXDATA2_6, 6 .EQU CANFD13_RXDATA2_RXDATA2_5, 5 .EQU CANFD13_RXDATA2_RXDATA2_4, 4 .EQU CANFD13_RXDATA2_RXDATA2_3, 3 .EQU CANFD13_RXDATA2_RXDATA2_2, 2 .EQU CANFD13_RXDATA2_RXDATA2_1, 1 .EQU CANFD13_RXDATA2_RXDATA2_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA3, 0x4000452C // 0x4000 452C CANFD13_RXDATA3 Bits------------------------------------- .EQU CANFD13_RXDATA3_RXDATA3_31, 31 .EQU CANFD13_RXDATA3_RXDATA3_30, 30 .EQU CANFD13_RXDATA3_RXDATA3_29, 29 .EQU CANFD13_RXDATA3_RXDATA3_28, 28 .EQU CANFD13_RXDATA3_RXDATA3_27, 27 .EQU CANFD13_RXDATA3_RXDATA3_26, 26 .EQU CANFD13_RXDATA3_RXDATA3_25, 25 .EQU CANFD13_RXDATA3_RXDATA3_24, 24 .EQU CANFD13_RXDATA3_RXDATA3_23, 23 .EQU CANFD13_RXDATA3_RXDATA3_22, 22 .EQU CANFD13_RXDATA3_RXDATA3_21, 21 .EQU CANFD13_RXDATA3_RXDATA3_20, 20 .EQU CANFD13_RXDATA3_RXDATA3_19, 19 .EQU CANFD13_RXDATA3_RXDATA3_18, 18 .EQU CANFD13_RXDATA3_RXDATA3_17, 17 .EQU CANFD13_RXDATA3_RXDATA3_16, 16 .EQU CANFD13_RXDATA3_RXDATA3_15, 15 .EQU CANFD13_RXDATA3_RXDATA3_14, 14 .EQU CANFD13_RXDATA3_RXDATA3_13, 13 .EQU CANFD13_RXDATA3_RXDATA3_12, 12 .EQU CANFD13_RXDATA3_RXDATA3_11, 11 .EQU CANFD13_RXDATA3_RXDATA3_10, 10 .EQU CANFD13_RXDATA3_RXDATA3_9, 9 .EQU CANFD13_RXDATA3_RXDATA3_8, 8 .EQU CANFD13_RXDATA3_RXDATA3_7, 7 .EQU CANFD13_RXDATA3_RXDATA3_6, 6 .EQU CANFD13_RXDATA3_RXDATA3_5, 5 .EQU CANFD13_RXDATA3_RXDATA3_4, 4 .EQU CANFD13_RXDATA3_RXDATA3_3, 3 .EQU CANFD13_RXDATA3_RXDATA3_2, 2 .EQU CANFD13_RXDATA3_RXDATA3_1, 1 .EQU CANFD13_RXDATA3_RXDATA3_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA4, 0x40004530 // 0x4000 4530 CANFD13_RXDATA4 Bits------------------------------------- .EQU CANFD13_RXDATA4_RXDATA4_31, 31 .EQU CANFD13_RXDATA4_RXDATA4_30, 30 .EQU CANFD13_RXDATA4_RXDATA4_29, 29 .EQU CANFD13_RXDATA4_RXDATA4_28, 28 .EQU CANFD13_RXDATA4_RXDATA4_27, 27 .EQU CANFD13_RXDATA4_RXDATA4_26, 26 .EQU CANFD13_RXDATA4_RXDATA4_25, 25 .EQU CANFD13_RXDATA4_RXDATA4_24, 24 .EQU CANFD13_RXDATA4_RXDATA4_23, 23 .EQU CANFD13_RXDATA4_RXDATA4_22, 22 .EQU CANFD13_RXDATA4_RXDATA4_21, 21 .EQU CANFD13_RXDATA4_RXDATA4_20, 20 .EQU CANFD13_RXDATA4_RXDATA4_19, 19 .EQU CANFD13_RXDATA4_RXDATA4_18, 18 .EQU CANFD13_RXDATA4_RXDATA4_17, 17 .EQU CANFD13_RXDATA4_RXDATA4_16, 16 .EQU CANFD13_RXDATA4_RXDATA4_15, 15 .EQU CANFD13_RXDATA4_RXDATA4_14, 14 .EQU CANFD13_RXDATA4_RXDATA4_13, 13 .EQU CANFD13_RXDATA4_RXDATA4_12, 12 .EQU CANFD13_RXDATA4_RXDATA4_11, 11 .EQU CANFD13_RXDATA4_RXDATA4_10, 10 .EQU CANFD13_RXDATA4_RXDATA4_9, 9 .EQU CANFD13_RXDATA4_RXDATA4_8, 8 .EQU CANFD13_RXDATA4_RXDATA4_7, 7 .EQU CANFD13_RXDATA4_RXDATA4_6, 6 .EQU CANFD13_RXDATA4_RXDATA4_5, 5 .EQU CANFD13_RXDATA4_RXDATA4_4, 4 .EQU CANFD13_RXDATA4_RXDATA4_3, 3 .EQU CANFD13_RXDATA4_RXDATA4_2, 2 .EQU CANFD13_RXDATA4_RXDATA4_1, 1 .EQU CANFD13_RXDATA4_RXDATA4_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA5, 0x40004534 // 0x4000 4534 CANFD13_RXDATA5 Bits------------------------------------- .EQU CANFD13_RXDATA5_RXDATA5_31, 31 .EQU CANFD13_RXDATA5_RXDATA5_30, 30 .EQU CANFD13_RXDATA5_RXDATA5_29, 29 .EQU CANFD13_RXDATA5_RXDATA5_28, 28 .EQU CANFD13_RXDATA5_RXDATA5_27, 27 .EQU CANFD13_RXDATA5_RXDATA5_26, 26 .EQU CANFD13_RXDATA5_RXDATA5_25, 25 .EQU CANFD13_RXDATA5_RXDATA5_24, 24 .EQU CANFD13_RXDATA5_RXDATA5_23, 23 .EQU CANFD13_RXDATA5_RXDATA5_22, 22 .EQU CANFD13_RXDATA5_RXDATA5_21, 21 .EQU CANFD13_RXDATA5_RXDATA5_20, 20 .EQU CANFD13_RXDATA5_RXDATA5_19, 19 .EQU CANFD13_RXDATA5_RXDATA5_18, 18 .EQU CANFD13_RXDATA5_RXDATA5_17, 17 .EQU CANFD13_RXDATA5_RXDATA5_16, 16 .EQU CANFD13_RXDATA5_RXDATA5_15, 15 .EQU CANFD13_RXDATA5_RXDATA5_14, 14 .EQU CANFD13_RXDATA5_RXDATA5_13, 13 .EQU CANFD13_RXDATA5_RXDATA5_12, 12 .EQU CANFD13_RXDATA5_RXDATA5_11, 11 .EQU CANFD13_RXDATA5_RXDATA5_10, 10 .EQU CANFD13_RXDATA5_RXDATA5_9, 9 .EQU CANFD13_RXDATA5_RXDATA5_8, 8 .EQU CANFD13_RXDATA5_RXDATA5_7, 7 .EQU CANFD13_RXDATA5_RXDATA5_6, 6 .EQU CANFD13_RXDATA5_RXDATA5_5, 5 .EQU CANFD13_RXDATA5_RXDATA5_4, 4 .EQU CANFD13_RXDATA5_RXDATA5_3, 3 .EQU CANFD13_RXDATA5_RXDATA5_2, 2 .EQU CANFD13_RXDATA5_RXDATA5_1, 1 .EQU CANFD13_RXDATA5_RXDATA5_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA6, 0x40004538 // 0x4000 4538 CANFD13_RXDATA6 Bits------------------------------------- .EQU CANFD13_RXDATA6_RXDATA6_31, 31 .EQU CANFD13_RXDATA6_RXDATA6_30, 30 .EQU CANFD13_RXDATA6_RXDATA6_29, 29 .EQU CANFD13_RXDATA6_RXDATA6_28, 28 .EQU CANFD13_RXDATA6_RXDATA6_27, 27 .EQU CANFD13_RXDATA6_RXDATA6_26, 26 .EQU CANFD13_RXDATA6_RXDATA6_25, 25 .EQU CANFD13_RXDATA6_RXDATA6_24, 24 .EQU CANFD13_RXDATA6_RXDATA6_23, 23 .EQU CANFD13_RXDATA6_RXDATA6_22, 22 .EQU CANFD13_RXDATA6_RXDATA6_21, 21 .EQU CANFD13_RXDATA6_RXDATA6_20, 20 .EQU CANFD13_RXDATA6_RXDATA6_19, 19 .EQU CANFD13_RXDATA6_RXDATA6_18, 18 .EQU CANFD13_RXDATA6_RXDATA6_17, 17 .EQU CANFD13_RXDATA6_RXDATA6_16, 16 .EQU CANFD13_RXDATA6_RXDATA6_15, 15 .EQU CANFD13_RXDATA6_RXDATA6_14, 14 .EQU CANFD13_RXDATA6_RXDATA6_13, 13 .EQU CANFD13_RXDATA6_RXDATA6_12, 12 .EQU CANFD13_RXDATA6_RXDATA6_11, 11 .EQU CANFD13_RXDATA6_RXDATA6_10, 10 .EQU CANFD13_RXDATA6_RXDATA6_9, 9 .EQU CANFD13_RXDATA6_RXDATA6_8, 8 .EQU CANFD13_RXDATA6_RXDATA6_7, 7 .EQU CANFD13_RXDATA6_RXDATA6_6, 6 .EQU CANFD13_RXDATA6_RXDATA6_5, 5 .EQU CANFD13_RXDATA6_RXDATA6_4, 4 .EQU CANFD13_RXDATA6_RXDATA6_3, 3 .EQU CANFD13_RXDATA6_RXDATA6_2, 2 .EQU CANFD13_RXDATA6_RXDATA6_1, 1 .EQU CANFD13_RXDATA6_RXDATA6_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA7, 0x4000453C // 0x4000 453C CANFD13_RXDATA7 Bits------------------------------------- .EQU CANFD13_RXDATA7_RXDATA7_31, 31 .EQU CANFD13_RXDATA7_RXDATA7_30, 30 .EQU CANFD13_RXDATA7_RXDATA7_29, 29 .EQU CANFD13_RXDATA7_RXDATA7_28, 28 .EQU CANFD13_RXDATA7_RXDATA7_27, 27 .EQU CANFD13_RXDATA7_RXDATA7_26, 26 .EQU CANFD13_RXDATA7_RXDATA7_25, 25 .EQU CANFD13_RXDATA7_RXDATA7_24, 24 .EQU CANFD13_RXDATA7_RXDATA7_23, 23 .EQU CANFD13_RXDATA7_RXDATA7_22, 22 .EQU CANFD13_RXDATA7_RXDATA7_21, 21 .EQU CANFD13_RXDATA7_RXDATA7_20, 20 .EQU CANFD13_RXDATA7_RXDATA7_19, 19 .EQU CANFD13_RXDATA7_RXDATA7_18, 18 .EQU CANFD13_RXDATA7_RXDATA7_17, 17 .EQU CANFD13_RXDATA7_RXDATA7_16, 16 .EQU CANFD13_RXDATA7_RXDATA7_15, 15 .EQU CANFD13_RXDATA7_RXDATA7_14, 14 .EQU CANFD13_RXDATA7_RXDATA7_13, 13 .EQU CANFD13_RXDATA7_RXDATA7_12, 12 .EQU CANFD13_RXDATA7_RXDATA7_11, 11 .EQU CANFD13_RXDATA7_RXDATA7_10, 10 .EQU CANFD13_RXDATA7_RXDATA7_9, 9 .EQU CANFD13_RXDATA7_RXDATA7_8, 8 .EQU CANFD13_RXDATA7_RXDATA7_7, 7 .EQU CANFD13_RXDATA7_RXDATA7_6, 6 .EQU CANFD13_RXDATA7_RXDATA7_5, 5 .EQU CANFD13_RXDATA7_RXDATA7_4, 4 .EQU CANFD13_RXDATA7_RXDATA7_3, 3 .EQU CANFD13_RXDATA7_RXDATA7_2, 2 .EQU CANFD13_RXDATA7_RXDATA7_1, 1 .EQU CANFD13_RXDATA7_RXDATA7_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA8, 0x40004540 // 0x4000 4540 CANFD13_RXDATA8 Bits------------------------------------- .EQU CANFD13_RXDATA8_RXDATA8_31, 31 .EQU CANFD13_RXDATA8_RXDATA8_30, 30 .EQU CANFD13_RXDATA8_RXDATA8_29, 29 .EQU CANFD13_RXDATA8_RXDATA8_28, 28 .EQU CANFD13_RXDATA8_RXDATA8_27, 27 .EQU CANFD13_RXDATA8_RXDATA8_26, 26 .EQU CANFD13_RXDATA8_RXDATA8_25, 25 .EQU CANFD13_RXDATA8_RXDATA8_24, 24 .EQU CANFD13_RXDATA8_RXDATA8_23, 23 .EQU CANFD13_RXDATA8_RXDATA8_22, 22 .EQU CANFD13_RXDATA8_RXDATA8_21, 21 .EQU CANFD13_RXDATA8_RXDATA8_20, 20 .EQU CANFD13_RXDATA8_RXDATA8_19, 19 .EQU CANFD13_RXDATA8_RXDATA8_18, 18 .EQU CANFD13_RXDATA8_RXDATA8_17, 17 .EQU CANFD13_RXDATA8_RXDATA8_16, 16 .EQU CANFD13_RXDATA8_RXDATA8_15, 15 .EQU CANFD13_RXDATA8_RXDATA8_14, 14 .EQU CANFD13_RXDATA8_RXDATA8_13, 13 .EQU CANFD13_RXDATA8_RXDATA8_12, 12 .EQU CANFD13_RXDATA8_RXDATA8_11, 11 .EQU CANFD13_RXDATA8_RXDATA8_10, 10 .EQU CANFD13_RXDATA8_RXDATA8_9, 9 .EQU CANFD13_RXDATA8_RXDATA8_8, 8 .EQU CANFD13_RXDATA8_RXDATA8_7, 7 .EQU CANFD13_RXDATA8_RXDATA8_6, 6 .EQU CANFD13_RXDATA8_RXDATA8_5, 5 .EQU CANFD13_RXDATA8_RXDATA8_4, 4 .EQU CANFD13_RXDATA8_RXDATA8_3, 3 .EQU CANFD13_RXDATA8_RXDATA8_2, 2 .EQU CANFD13_RXDATA8_RXDATA8_1, 1 .EQU CANFD13_RXDATA8_RXDATA8_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA9, 0x40004544 // 0x4000 4544 CANFD13_RXDATA9 Bits------------------------------------- .EQU CANFD13_RXDATA9_RXDATA9_31, 31 .EQU CANFD13_RXDATA9_RXDATA9_30, 30 .EQU CANFD13_RXDATA9_RXDATA9_29, 29 .EQU CANFD13_RXDATA9_RXDATA9_28, 28 .EQU CANFD13_RXDATA9_RXDATA9_27, 27 .EQU CANFD13_RXDATA9_RXDATA9_26, 26 .EQU CANFD13_RXDATA9_RXDATA9_25, 25 .EQU CANFD13_RXDATA9_RXDATA9_24, 24 .EQU CANFD13_RXDATA9_RXDATA9_23, 23 .EQU CANFD13_RXDATA9_RXDATA9_22, 22 .EQU CANFD13_RXDATA9_RXDATA9_21, 21 .EQU CANFD13_RXDATA9_RXDATA9_20, 20 .EQU CANFD13_RXDATA9_RXDATA9_19, 19 .EQU CANFD13_RXDATA9_RXDATA9_18, 18 .EQU CANFD13_RXDATA9_RXDATA9_17, 17 .EQU CANFD13_RXDATA9_RXDATA9_16, 16 .EQU CANFD13_RXDATA9_RXDATA9_15, 15 .EQU CANFD13_RXDATA9_RXDATA9_14, 14 .EQU CANFD13_RXDATA9_RXDATA9_13, 13 .EQU CANFD13_RXDATA9_RXDATA9_12, 12 .EQU CANFD13_RXDATA9_RXDATA9_11, 11 .EQU CANFD13_RXDATA9_RXDATA9_10, 10 .EQU CANFD13_RXDATA9_RXDATA9_9, 9 .EQU CANFD13_RXDATA9_RXDATA9_8, 8 .EQU CANFD13_RXDATA9_RXDATA9_7, 7 .EQU CANFD13_RXDATA9_RXDATA9_6, 6 .EQU CANFD13_RXDATA9_RXDATA9_5, 5 .EQU CANFD13_RXDATA9_RXDATA9_4, 4 .EQU CANFD13_RXDATA9_RXDATA9_3, 3 .EQU CANFD13_RXDATA9_RXDATA9_2, 2 .EQU CANFD13_RXDATA9_RXDATA9_1, 1 .EQU CANFD13_RXDATA9_RXDATA9_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA10, 0x40004548 // 0x4000 4548 CANFD13_RXDATA10 Bits------------------------------------- .EQU CANFD13_RXDATA10_RXDATA10_31, 31 .EQU CANFD13_RXDATA10_RXDATA10_30, 30 .EQU CANFD13_RXDATA10_RXDATA10_29, 29 .EQU CANFD13_RXDATA10_RXDATA10_28, 28 .EQU CANFD13_RXDATA10_RXDATA10_27, 27 .EQU CANFD13_RXDATA10_RXDATA10_26, 26 .EQU CANFD13_RXDATA10_RXDATA10_25, 25 .EQU CANFD13_RXDATA10_RXDATA10_24, 24 .EQU CANFD13_RXDATA10_RXDATA10_23, 23 .EQU CANFD13_RXDATA10_RXDATA10_22, 22 .EQU CANFD13_RXDATA10_RXDATA10_21, 21 .EQU CANFD13_RXDATA10_RXDATA10_20, 20 .EQU CANFD13_RXDATA10_RXDATA10_19, 19 .EQU CANFD13_RXDATA10_RXDATA10_18, 18 .EQU CANFD13_RXDATA10_RXDATA10_17, 17 .EQU CANFD13_RXDATA10_RXDATA10_16, 16 .EQU CANFD13_RXDATA10_RXDATA10_15, 15 .EQU CANFD13_RXDATA10_RXDATA10_14, 14 .EQU CANFD13_RXDATA10_RXDATA10_13, 13 .EQU CANFD13_RXDATA10_RXDATA10_12, 12 .EQU CANFD13_RXDATA10_RXDATA10_11, 11 .EQU CANFD13_RXDATA10_RXDATA10_10, 10 .EQU CANFD13_RXDATA10_RXDATA10_9, 9 .EQU CANFD13_RXDATA10_RXDATA10_8, 8 .EQU CANFD13_RXDATA10_RXDATA10_7, 7 .EQU CANFD13_RXDATA10_RXDATA10_6, 6 .EQU CANFD13_RXDATA10_RXDATA10_5, 5 .EQU CANFD13_RXDATA10_RXDATA10_4, 4 .EQU CANFD13_RXDATA10_RXDATA10_3, 3 .EQU CANFD13_RXDATA10_RXDATA10_2, 2 .EQU CANFD13_RXDATA10_RXDATA10_1, 1 .EQU CANFD13_RXDATA10_RXDATA10_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA11, 0x4000454C // 0x4000 454C CANFD13_RXDATA11 Bits------------------------------------- .EQU CANFD13_RXDATA11_RXDATA11_31, 31 .EQU CANFD13_RXDATA11_RXDATA11_30, 30 .EQU CANFD13_RXDATA11_RXDATA11_29, 29 .EQU CANFD13_RXDATA11_RXDATA11_28, 28 .EQU CANFD13_RXDATA11_RXDATA11_27, 27 .EQU CANFD13_RXDATA11_RXDATA11_26, 26 .EQU CANFD13_RXDATA11_RXDATA11_25, 25 .EQU CANFD13_RXDATA11_RXDATA11_24, 24 .EQU CANFD13_RXDATA11_RXDATA11_23, 23 .EQU CANFD13_RXDATA11_RXDATA11_22, 22 .EQU CANFD13_RXDATA11_RXDATA11_21, 21 .EQU CANFD13_RXDATA11_RXDATA11_20, 20 .EQU CANFD13_RXDATA11_RXDATA11_19, 19 .EQU CANFD13_RXDATA11_RXDATA11_18, 18 .EQU CANFD13_RXDATA11_RXDATA11_17, 17 .EQU CANFD13_RXDATA11_RXDATA11_16, 16 .EQU CANFD13_RXDATA11_RXDATA11_15, 15 .EQU CANFD13_RXDATA11_RXDATA11_14, 14 .EQU CANFD13_RXDATA11_RXDATA11_13, 13 .EQU CANFD13_RXDATA11_RXDATA11_12, 12 .EQU CANFD13_RXDATA11_RXDATA11_11, 11 .EQU CANFD13_RXDATA11_RXDATA11_10, 10 .EQU CANFD13_RXDATA11_RXDATA11_9, 9 .EQU CANFD13_RXDATA11_RXDATA11_8, 8 .EQU CANFD13_RXDATA11_RXDATA11_7, 7 .EQU CANFD13_RXDATA11_RXDATA11_6, 6 .EQU CANFD13_RXDATA11_RXDATA11_5, 5 .EQU CANFD13_RXDATA11_RXDATA11_4, 4 .EQU CANFD13_RXDATA11_RXDATA11_3, 3 .EQU CANFD13_RXDATA11_RXDATA11_2, 2 .EQU CANFD13_RXDATA11_RXDATA11_1, 1 .EQU CANFD13_RXDATA11_RXDATA11_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA12, 0x40004550 // 0x4000 4550 CANFD13_RXDATA12 Bits------------------------------------- .EQU CANFD13_RXDATA12_RXDATA12_31, 31 .EQU CANFD13_RXDATA12_RXDATA12_30, 30 .EQU CANFD13_RXDATA12_RXDATA12_29, 29 .EQU CANFD13_RXDATA12_RXDATA12_28, 28 .EQU CANFD13_RXDATA12_RXDATA12_27, 27 .EQU CANFD13_RXDATA12_RXDATA12_26, 26 .EQU CANFD13_RXDATA12_RXDATA12_25, 25 .EQU CANFD13_RXDATA12_RXDATA12_24, 24 .EQU CANFD13_RXDATA12_RXDATA12_23, 23 .EQU CANFD13_RXDATA12_RXDATA12_22, 22 .EQU CANFD13_RXDATA12_RXDATA12_21, 21 .EQU CANFD13_RXDATA12_RXDATA12_20, 20 .EQU CANFD13_RXDATA12_RXDATA12_19, 19 .EQU CANFD13_RXDATA12_RXDATA12_18, 18 .EQU CANFD13_RXDATA12_RXDATA12_17, 17 .EQU CANFD13_RXDATA12_RXDATA12_16, 16 .EQU CANFD13_RXDATA12_RXDATA12_15, 15 .EQU CANFD13_RXDATA12_RXDATA12_14, 14 .EQU CANFD13_RXDATA12_RXDATA12_13, 13 .EQU CANFD13_RXDATA12_RXDATA12_12, 12 .EQU CANFD13_RXDATA12_RXDATA12_11, 11 .EQU CANFD13_RXDATA12_RXDATA12_10, 10 .EQU CANFD13_RXDATA12_RXDATA12_9, 9 .EQU CANFD13_RXDATA12_RXDATA12_8, 8 .EQU CANFD13_RXDATA12_RXDATA12_7, 7 .EQU CANFD13_RXDATA12_RXDATA12_6, 6 .EQU CANFD13_RXDATA12_RXDATA12_5, 5 .EQU CANFD13_RXDATA12_RXDATA12_4, 4 .EQU CANFD13_RXDATA12_RXDATA12_3, 3 .EQU CANFD13_RXDATA12_RXDATA12_2, 2 .EQU CANFD13_RXDATA12_RXDATA12_1, 1 .EQU CANFD13_RXDATA12_RXDATA12_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA13, 0x40004554 // 0x4000 4554 CANFD13_RXDATA13 Bits------------------------------------- .EQU CANFD13_RXDATA13_RXDATA13_31, 31 .EQU CANFD13_RXDATA13_RXDATA13_30, 30 .EQU CANFD13_RXDATA13_RXDATA13_29, 29 .EQU CANFD13_RXDATA13_RXDATA13_28, 28 .EQU CANFD13_RXDATA13_RXDATA13_27, 27 .EQU CANFD13_RXDATA13_RXDATA13_26, 26 .EQU CANFD13_RXDATA13_RXDATA13_25, 25 .EQU CANFD13_RXDATA13_RXDATA13_24, 24 .EQU CANFD13_RXDATA13_RXDATA13_23, 23 .EQU CANFD13_RXDATA13_RXDATA13_22, 22 .EQU CANFD13_RXDATA13_RXDATA13_21, 21 .EQU CANFD13_RXDATA13_RXDATA13_20, 20 .EQU CANFD13_RXDATA13_RXDATA13_19, 19 .EQU CANFD13_RXDATA13_RXDATA13_18, 18 .EQU CANFD13_RXDATA13_RXDATA13_17, 17 .EQU CANFD13_RXDATA13_RXDATA13_16, 16 .EQU CANFD13_RXDATA13_RXDATA13_15, 15 .EQU CANFD13_RXDATA13_RXDATA13_14, 14 .EQU CANFD13_RXDATA13_RXDATA13_13, 13 .EQU CANFD13_RXDATA13_RXDATA13_12, 12 .EQU CANFD13_RXDATA13_RXDATA13_11, 11 .EQU CANFD13_RXDATA13_RXDATA13_10, 10 .EQU CANFD13_RXDATA13_RXDATA13_9, 9 .EQU CANFD13_RXDATA13_RXDATA13_8, 8 .EQU CANFD13_RXDATA13_RXDATA13_7, 7 .EQU CANFD13_RXDATA13_RXDATA13_6, 6 .EQU CANFD13_RXDATA13_RXDATA13_5, 5 .EQU CANFD13_RXDATA13_RXDATA13_4, 4 .EQU CANFD13_RXDATA13_RXDATA13_3, 3 .EQU CANFD13_RXDATA13_RXDATA13_2, 2 .EQU CANFD13_RXDATA13_RXDATA13_1, 1 .EQU CANFD13_RXDATA13_RXDATA13_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA14, 0x40004558 // 0x4000 4558 CANFD13_RXDATA14 Bits------------------------------------- .EQU CANFD13_RXDATA14_RXDATA14_31, 31 .EQU CANFD13_RXDATA14_RXDATA14_30, 30 .EQU CANFD13_RXDATA14_RXDATA14_29, 29 .EQU CANFD13_RXDATA14_RXDATA14_28, 28 .EQU CANFD13_RXDATA14_RXDATA14_27, 27 .EQU CANFD13_RXDATA14_RXDATA14_26, 26 .EQU CANFD13_RXDATA14_RXDATA14_25, 25 .EQU CANFD13_RXDATA14_RXDATA14_24, 24 .EQU CANFD13_RXDATA14_RXDATA14_23, 23 .EQU CANFD13_RXDATA14_RXDATA14_22, 22 .EQU CANFD13_RXDATA14_RXDATA14_21, 21 .EQU CANFD13_RXDATA14_RXDATA14_20, 20 .EQU CANFD13_RXDATA14_RXDATA14_19, 19 .EQU CANFD13_RXDATA14_RXDATA14_18, 18 .EQU CANFD13_RXDATA14_RXDATA14_17, 17 .EQU CANFD13_RXDATA14_RXDATA14_16, 16 .EQU CANFD13_RXDATA14_RXDATA14_15, 15 .EQU CANFD13_RXDATA14_RXDATA14_14, 14 .EQU CANFD13_RXDATA14_RXDATA14_13, 13 .EQU CANFD13_RXDATA14_RXDATA14_12, 12 .EQU CANFD13_RXDATA14_RXDATA14_11, 11 .EQU CANFD13_RXDATA14_RXDATA14_10, 10 .EQU CANFD13_RXDATA14_RXDATA14_9, 9 .EQU CANFD13_RXDATA14_RXDATA14_8, 8 .EQU CANFD13_RXDATA14_RXDATA14_7, 7 .EQU CANFD13_RXDATA14_RXDATA14_6, 6 .EQU CANFD13_RXDATA14_RXDATA14_5, 5 .EQU CANFD13_RXDATA14_RXDATA14_4, 4 .EQU CANFD13_RXDATA14_RXDATA14_3, 3 .EQU CANFD13_RXDATA14_RXDATA14_2, 2 .EQU CANFD13_RXDATA14_RXDATA14_1, 1 .EQU CANFD13_RXDATA14_RXDATA14_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA15, 0x4000455C // 0x4000 455C CANFD13_RXDATA15 Bits------------------------------------- .EQU CANFD13_RXDATA15_RXDATA15_31, 31 .EQU CANFD13_RXDATA15_RXDATA15_30, 30 .EQU CANFD13_RXDATA15_RXDATA15_29, 29 .EQU CANFD13_RXDATA15_RXDATA15_28, 28 .EQU CANFD13_RXDATA15_RXDATA15_27, 27 .EQU CANFD13_RXDATA15_RXDATA15_26, 26 .EQU CANFD13_RXDATA15_RXDATA15_25, 25 .EQU CANFD13_RXDATA15_RXDATA15_24, 24 .EQU CANFD13_RXDATA15_RXDATA15_23, 23 .EQU CANFD13_RXDATA15_RXDATA15_22, 22 .EQU CANFD13_RXDATA15_RXDATA15_21, 21 .EQU CANFD13_RXDATA15_RXDATA15_20, 20 .EQU CANFD13_RXDATA15_RXDATA15_19, 19 .EQU CANFD13_RXDATA15_RXDATA15_18, 18 .EQU CANFD13_RXDATA15_RXDATA15_17, 17 .EQU CANFD13_RXDATA15_RXDATA15_16, 16 .EQU CANFD13_RXDATA15_RXDATA15_15, 15 .EQU CANFD13_RXDATA15_RXDATA15_14, 14 .EQU CANFD13_RXDATA15_RXDATA15_13, 13 .EQU CANFD13_RXDATA15_RXDATA15_12, 12 .EQU CANFD13_RXDATA15_RXDATA15_11, 11 .EQU CANFD13_RXDATA15_RXDATA15_10, 10 .EQU CANFD13_RXDATA15_RXDATA15_9, 9 .EQU CANFD13_RXDATA15_RXDATA15_8, 8 .EQU CANFD13_RXDATA15_RXDATA15_7, 7 .EQU CANFD13_RXDATA15_RXDATA15_6, 6 .EQU CANFD13_RXDATA15_RXDATA15_5, 5 .EQU CANFD13_RXDATA15_RXDATA15_4, 4 .EQU CANFD13_RXDATA15_RXDATA15_3, 3 .EQU CANFD13_RXDATA15_RXDATA15_2, 2 .EQU CANFD13_RXDATA15_RXDATA15_1, 1 .EQU CANFD13_RXDATA15_RXDATA15_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA16, 0x40004560 // 0x4000 4560 CANFD13_RXDATA16 Bits------------------------------------- .EQU CANFD13_RXDATA16_RXDATA16_31, 31 .EQU CANFD13_RXDATA16_RXDATA16_30, 30 .EQU CANFD13_RXDATA16_RXDATA16_29, 29 .EQU CANFD13_RXDATA16_RXDATA16_28, 28 .EQU CANFD13_RXDATA16_RXDATA16_27, 27 .EQU CANFD13_RXDATA16_RXDATA16_26, 26 .EQU CANFD13_RXDATA16_RXDATA16_25, 25 .EQU CANFD13_RXDATA16_RXDATA16_24, 24 .EQU CANFD13_RXDATA16_RXDATA16_23, 23 .EQU CANFD13_RXDATA16_RXDATA16_22, 22 .EQU CANFD13_RXDATA16_RXDATA16_21, 21 .EQU CANFD13_RXDATA16_RXDATA16_20, 20 .EQU CANFD13_RXDATA16_RXDATA16_19, 19 .EQU CANFD13_RXDATA16_RXDATA16_18, 18 .EQU CANFD13_RXDATA16_RXDATA16_17, 17 .EQU CANFD13_RXDATA16_RXDATA16_16, 16 .EQU CANFD13_RXDATA16_RXDATA16_15, 15 .EQU CANFD13_RXDATA16_RXDATA16_14, 14 .EQU CANFD13_RXDATA16_RXDATA16_13, 13 .EQU CANFD13_RXDATA16_RXDATA16_12, 12 .EQU CANFD13_RXDATA16_RXDATA16_11, 11 .EQU CANFD13_RXDATA16_RXDATA16_10, 10 .EQU CANFD13_RXDATA16_RXDATA16_9, 9 .EQU CANFD13_RXDATA16_RXDATA16_8, 8 .EQU CANFD13_RXDATA16_RXDATA16_7, 7 .EQU CANFD13_RXDATA16_RXDATA16_6, 6 .EQU CANFD13_RXDATA16_RXDATA16_5, 5 .EQU CANFD13_RXDATA16_RXDATA16_4, 4 .EQU CANFD13_RXDATA16_RXDATA16_3, 3 .EQU CANFD13_RXDATA16_RXDATA16_2, 2 .EQU CANFD13_RXDATA16_RXDATA16_1, 1 .EQU CANFD13_RXDATA16_RXDATA16_0, 0 // register------------------------------------- .EQU CANFD13_RXDATA17, 0x40004564 // 0x4000 4564 CANFD13_RXDATA17 Bits------------------------------------- .EQU CANFD13_RXDATA17_RXDATA17_31, 31 .EQU CANFD13_RXDATA17_RXDATA17_30, 30 .EQU CANFD13_RXDATA17_RXDATA17_29, 29 .EQU CANFD13_RXDATA17_RXDATA17_28, 28 .EQU CANFD13_RXDATA17_RXDATA17_27, 27 .EQU CANFD13_RXDATA17_RXDATA17_26, 26 .EQU CANFD13_RXDATA17_RXDATA17_25, 25 .EQU CANFD13_RXDATA17_RXDATA17_24, 24 .EQU CANFD13_RXDATA17_RXDATA17_23, 23 .EQU CANFD13_RXDATA17_RXDATA17_22, 22 .EQU CANFD13_RXDATA17_RXDATA17_21, 21 .EQU CANFD13_RXDATA17_RXDATA17_20, 20 .EQU CANFD13_RXDATA17_RXDATA17_19, 19 .EQU CANFD13_RXDATA17_RXDATA17_18, 18 .EQU CANFD13_RXDATA17_RXDATA17_17, 17 .EQU CANFD13_RXDATA17_RXDATA17_16, 16 .EQU CANFD13_RXDATA17_RXDATA17_15, 15 .EQU CANFD13_RXDATA17_RXDATA17_14, 14 .EQU CANFD13_RXDATA17_RXDATA17_13, 13 .EQU CANFD13_RXDATA17_RXDATA17_12, 12 .EQU CANFD13_RXDATA17_RXDATA17_11, 11 .EQU CANFD13_RXDATA17_RXDATA17_10, 10 .EQU CANFD13_RXDATA17_RXDATA17_9, 9 .EQU CANFD13_RXDATA17_RXDATA17_8, 8 .EQU CANFD13_RXDATA17_RXDATA17_7, 7 .EQU CANFD13_RXDATA17_RXDATA17_6, 6 .EQU CANFD13_RXDATA17_RXDATA17_5, 5 .EQU CANFD13_RXDATA17_RXDATA17_4, 4 .EQU CANFD13_RXDATA17_RXDATA17_3, 3 .EQU CANFD13_RXDATA17_RXDATA17_2, 2 .EQU CANFD13_RXDATA17_RXDATA17_1, 1 .EQU CANFD13_RXDATA17_RXDATA17_0, 0 // register------------------------------------- .EQU CANFD13_TIMER, 0x40004568 // 0x4000 4568 CANFD13_TIMER Bits------------------------------------- .EQU CANFD13_TIMER_CANTIMER15, 15 .EQU CANFD13_TIMER_CANTIMER14, 14 .EQU CANFD13_TIMER_CANTIMER13, 13 .EQU CANFD13_TIMER_CANTIMER12, 12 .EQU CANFD13_TIMER_CANTIMER11, 11 .EQU CANFD13_TIMER_CANTIMER10, 10 .EQU CANFD13_TIMER_CANTIMER9, 9 .EQU CANFD13_TIMER_CANTIMER8, 8 .EQU CANFD13_TIMER_CANTIMER7, 7 .EQU CANFD13_TIMER_CANTIMER6, 6 .EQU CANFD13_TIMER_CANTIMER5, 5 .EQU CANFD13_TIMER_CANTIMER4, 4 .EQU CANFD13_TIMER_CANTIMER3, 3 .EQU CANFD13_TIMER_CANTIMER2, 2 .EQU CANFD13_TIMER_CANTIMER1, 1 .EQU CANFD13_TIMER_CANTIMER0, 0 // register------------------------------------- .EQU CANFD13_CRC, 0x4000456C // 0x4000 456C CANFD13_CRC Bits------------------------------------- .EQU CANFD13_CRC_STUFFCNT3, 31 .EQU CANFD13_CRC_STUFFCNT2, 30 .EQU CANFD13_CRC_STUFFCNT1, 29 .EQU CANFD13_CRC_STUFFCNT0, 28 .EQU CANFD13_CRC_CRC20, 20 .EQU CANFD13_CRC_CRC19, 19 .EQU CANFD13_CRC_CRC18, 18 .EQU CANFD13_CRC_CRC17, 17 .EQU CANFD13_CRC_CRC16, 16 .EQU CANFD13_CRC_CRC15, 15 .EQU CANFD13_CRC_CRC14, 14 .EQU CANFD13_CRC_CRC13, 13 .EQU CANFD13_CRC_CRC12, 12 .EQU CANFD13_CRC_CRC11, 11 .EQU CANFD13_CRC_CRC10, 10 .EQU CANFD13_CRC_CRC9, 9 .EQU CANFD13_CRC_CRC8, 8 .EQU CANFD13_CRC_CRC7, 7 .EQU CANFD13_CRC_CRC6, 6 .EQU CANFD13_CRC_CRC5, 5 .EQU CANFD13_CRC_CRC4, 4 .EQU CANFD13_CRC_CRC3, 3 .EQU CANFD13_CRC_CRC2, 2 .EQU CANFD13_CRC_CRC1, 1 .EQU CANFD13_CRC_CRC0, 0 // register------------------------------------- .EQU CANFD13_CTLR1, 0x40004574 // 0x4000 4574 CANFD13_CTLR1 Bits------------------------------------- .EQU CANFD13_CTLR1_TRGMBEN, 31 .EQU CANFD13_CTLR1_TRGMBSEL6, 30 .EQU CANFD13_CTLR1_TRGMBSEL5, 29 .EQU CANFD13_CTLR1_TRGMBSEL4, 28 .EQU CANFD13_CTLR1_TRGMBSEL3, 27 .EQU CANFD13_CTLR1_TRGMBSEL2, 26 .EQU CANFD13_CTLR1_TRGMBSEL1, 25 .EQU CANFD13_CTLR1_TRGMBSEL0, 24 .EQU CANFD13_CTLR1_TRGNUM3, 23 .EQU CANFD13_CTLR1_TRGNUM2, 22 .EQU CANFD13_CTLR1_TRGNUM1, 21 .EQU CANFD13_CTLR1_TRGNUM0, 20 .EQU CANFD13_CTLR1_CKMODE, 19 .EQU CANFD13_CTLR1_BOFFREC, 18 .EQU CANFD13_CTLR1_LBSEL, 17 .EQU CANFD13_CTLR1_ARBSTART, 16 .EQU CANFD13_CTLR1_ARBMS, 15 .EQU CANFD13_CTLR1_MBMSKEN, 14 .EQU CANFD13_CTLR1_MATCHMS, 13 .EQU CANFD13_CTLR1_MBNUM, 12 .EQU CANFD13_CTLR1_TSYN, 11 .EQU CANFD13_CTLR1_FTCLKS, 10 .EQU CANFD13_CTLR1_ST, 9 .EQU CANFD13_CTLR1_RXMUX6, 8 .EQU CANFD13_CTLR1_RXMUX5, 7 .EQU CANFD13_CTLR1_RXMUX4, 6 .EQU CANFD13_CTLR1_RXMUX3, 5 .EQU CANFD13_CTLR1_RXMUX2, 4 .EQU CANFD13_CTLR1_RXMUX1, 3 .EQU CANFD13_CTLR1_RXMUX0, 2 .EQU CANFD13_CTLR1_AMCKS1, 1 .EQU CANFD13_CTLR1_AMCKS0, 0 // register------------------------------------- .EQU CANFD13_AMSTA, 0x40004578 // 0x4000 4578 CANFD13_AMSTA Bits------------------------------------- .EQU CANFD13_AMSTA_TXCODE3, 31 .EQU CANFD13_AMSTA_TXCODE2, 30 .EQU CANFD13_AMSTA_TXCODE1, 29 .EQU CANFD13_AMSTA_TXCODE0, 28 .EQU CANFD13_AMSTA_ARBSTA1, 27 .EQU CANFD13_AMSTA_ARBSTA0, 26 .EQU CANFD13_AMSTA_ARBWINNER9, 25 .EQU CANFD13_AMSTA_ARBWINNER8, 24 .EQU CANFD13_AMSTA_ARBWINNER7, 23 .EQU CANFD13_AMSTA_ARBWINNER6, 22 .EQU CANFD13_AMSTA_ARBWINNER5, 21 .EQU CANFD13_AMSTA_ARBWINNER4, 20 .EQU CANFD13_AMSTA_ARBWINNER3, 19 .EQU CANFD13_AMSTA_ARBWINNER2, 18 .EQU CANFD13_AMSTA_ARBWINNER1, 17 .EQU CANFD13_AMSTA_ARBWINNER0, 16 .EQU CANFD13_AMSTA_BETEN, 15 .EQU CANFD13_AMSTA_RTRMEN, 14 .EQU CANFD13_AMSTA_IDSELEN, 13 .EQU CANFD13_AMSTA_RELRXALL, 12 .EQU CANFD13_AMSTA_ROPSTA, 11 .EQU CANFD13_AMSTA_MATSTA, 10 .EQU CANFD13_AMSTA_MATWINNER9, 9 .EQU CANFD13_AMSTA_MATWINNER8, 8 .EQU CANFD13_AMSTA_MATWINNER7, 7 .EQU CANFD13_AMSTA_MATWINNER6, 6 .EQU CANFD13_AMSTA_MATWINNER5, 5 .EQU CANFD13_AMSTA_MATWINNER4, 4 .EQU CANFD13_AMSTA_MATWINNER3, 3 .EQU CANFD13_AMSTA_MATWINNER2, 2 .EQU CANFD13_AMSTA_MATWINNER1, 1 .EQU CANFD13_AMSTA_MATWINNER0, 0 // register------------------------------------- .EQU CANFD13_TXDATA, 0x4000457C // 0x4000 457C CANFD13_TXDATA Bits------------------------------------- .EQU CANFD13_TXDATA_TXDATA31, 31 .EQU CANFD13_TXDATA_TXDATA30, 30 .EQU CANFD13_TXDATA_TXDATA29, 29 .EQU CANFD13_TXDATA_TXDATA28, 28 .EQU CANFD13_TXDATA_TXDATA27, 27 .EQU CANFD13_TXDATA_TXDATA26, 26 .EQU CANFD13_TXDATA_TXDATA25, 25 .EQU CANFD13_TXDATA_TXDATA24, 24 .EQU CANFD13_TXDATA_TXDATA23, 23 .EQU CANFD13_TXDATA_TXDATA22, 22 .EQU CANFD13_TXDATA_TXDATA21, 21 .EQU CANFD13_TXDATA_TXDATA20, 20 .EQU CANFD13_TXDATA_TXDATA19, 19 .EQU CANFD13_TXDATA_TXDATA18, 18 .EQU CANFD13_TXDATA_TXDATA17, 17 .EQU CANFD13_TXDATA_TXDATA16, 16 .EQU CANFD13_TXDATA_TXDATA15, 15 .EQU CANFD13_TXDATA_TXDATA14, 14 .EQU CANFD13_TXDATA_TXDATA13, 13 .EQU CANFD13_TXDATA_TXDATA12, 12 .EQU CANFD13_TXDATA_TXDATA11, 11 .EQU CANFD13_TXDATA_TXDATA10, 10 .EQU CANFD13_TXDATA_TXDATA9, 9 .EQU CANFD13_TXDATA_TXDATA8, 8 .EQU CANFD13_TXDATA_TXDATA7, 7 .EQU CANFD13_TXDATA_TXDATA6, 6 .EQU CANFD13_TXDATA_TXDATA5, 5 .EQU CANFD13_TXDATA_TXDATA4, 4 .EQU CANFD13_TXDATA_TXDATA3, 3 .EQU CANFD13_TXDATA_TXDATA2, 2 .EQU CANFD13_TXDATA_TXDATA1, 1 .EQU CANFD13_TXDATA_TXDATA0, 0 // register------------------------------------- .EQU ECC15_CTL, 0x40004680 // 0x4000 4680 ECC15_CTL Bits------------------------------------- .EQU ECC15_CTL_MEM2BITERRIC, 14 .EQU ECC15_CTL_MEM1BITERRIC, 13 .EQU ECC15_CTL_MEMERRIC, 12 .EQU ECC15_CTL_MEM2BITERRIE, 10 .EQU ECC15_CTL_MEM1BITERRIE, 9 .EQU ECC15_CTL_MEMERRIE, 8 .EQU ECC15_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC15_INT, 0x40004684 // 0x4000 4684 ECC15_INT Bits------------------------------------- .EQU ECC15_INT_MEM2BITERRIF, 2 .EQU ECC15_INT_MEM1BITERRIF, 1 .EQU ECC15_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC15_ERRADDR, 0x40004688 // 0x4000 4688 ECC15_ERRADDR Bits------------------------------------- .EQU ECC15_ERRADDR_ERRADDR31, 31 .EQU ECC15_ERRADDR_ERRADDR30, 30 .EQU ECC15_ERRADDR_ERRADDR29, 29 .EQU ECC15_ERRADDR_ERRADDR28, 28 .EQU ECC15_ERRADDR_ERRADDR27, 27 .EQU ECC15_ERRADDR_ERRADDR26, 26 .EQU ECC15_ERRADDR_ERRADDR25, 25 .EQU ECC15_ERRADDR_ERRADDR24, 24 .EQU ECC15_ERRADDR_ERRADDR23, 23 .EQU ECC15_ERRADDR_ERRADDR22, 22 .EQU ECC15_ERRADDR_ERRADDR21, 21 .EQU ECC15_ERRADDR_ERRADDR20, 20 .EQU ECC15_ERRADDR_ERRADDR19, 19 .EQU ECC15_ERRADDR_ERRADDR18, 18 .EQU ECC15_ERRADDR_ERRADDR17, 17 .EQU ECC15_ERRADDR_ERRADDR16, 16 .EQU ECC15_ERRADDR_ERRADDR15, 15 .EQU ECC15_ERRADDR_ERRADDR14, 14 .EQU ECC15_ERRADDR_ERRADDR13, 13 .EQU ECC15_ERRADDR_ERRADDR12, 12 .EQU ECC15_ERRADDR_ERRADDR11, 11 .EQU ECC15_ERRADDR_ERRADDR10, 10 .EQU ECC15_ERRADDR_ERRADDR9, 9 .EQU ECC15_ERRADDR_ERRADDR8, 8 .EQU ECC15_ERRADDR_ERRADDR7, 7 .EQU ECC15_ERRADDR_ERRADDR6, 6 .EQU ECC15_ERRADDR_ERRADDR5, 5 .EQU ECC15_ERRADDR_ERRADDR4, 4 .EQU ECC15_ERRADDR_ERRADDR3, 3 .EQU ECC15_ERRADDR_ERRADDR2, 2 .EQU ECC15_ERRADDR_ERRADDR1, 1 .EQU ECC15_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC15_EBR0, 0x40004690 // 0x4000 4690 ECC15_EBR0 Bits------------------------------------- .EQU ECC15_EBR0_ERRIBTEN31, 31 .EQU ECC15_EBR0_ERRIBTEN30, 30 .EQU ECC15_EBR0_ERRIBTEN29, 29 .EQU ECC15_EBR0_ERRIBTEN28, 28 .EQU ECC15_EBR0_ERRIBTEN27, 27 .EQU ECC15_EBR0_ERRIBTEN26, 26 .EQU ECC15_EBR0_ERRIBTEN25, 25 .EQU ECC15_EBR0_ERRIBTEN24, 24 .EQU ECC15_EBR0_ERRIBTEN23, 23 .EQU ECC15_EBR0_ERRIBTEN22, 22 .EQU ECC15_EBR0_ERRIBTEN21, 21 .EQU ECC15_EBR0_ERRIBTEN20, 20 .EQU ECC15_EBR0_ERRIBTEN19, 19 .EQU ECC15_EBR0_ERRIBTEN18, 18 .EQU ECC15_EBR0_ERRIBTEN17, 17 .EQU ECC15_EBR0_ERRIBTEN16, 16 .EQU ECC15_EBR0_ERRIBTEN15, 15 .EQU ECC15_EBR0_ERRIBTEN14, 14 .EQU ECC15_EBR0_ERRIBTEN13, 13 .EQU ECC15_EBR0_ERRIBTEN12, 12 .EQU ECC15_EBR0_ERRIBTEN11, 11 .EQU ECC15_EBR0_ERRIBTEN10, 10 .EQU ECC15_EBR0_ERRIBTEN9, 9 .EQU ECC15_EBR0_ERRIBTEN8, 8 .EQU ECC15_EBR0_ERRIBTEN7, 7 .EQU ECC15_EBR0_ERRIBTEN6, 6 .EQU ECC15_EBR0_ERRIBTEN5, 5 .EQU ECC15_EBR0_ERRIBTEN4, 4 .EQU ECC15_EBR0_ERRIBTEN3, 3 .EQU ECC15_EBR0_ERRIBTEN2, 2 .EQU ECC15_EBR0_ERRIBTEN1, 1 .EQU ECC15_EBR0_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC15_EBR1, 0x40004694 // 0x4000 4694 ECC15_EBR1 Bits------------------------------------- .EQU ECC15_EBR1_ERRIBTEN31, 31 .EQU ECC15_EBR1_ERRIBTEN30, 30 .EQU ECC15_EBR1_ERRIBTEN29, 29 .EQU ECC15_EBR1_ERRIBTEN28, 28 .EQU ECC15_EBR1_ERRIBTEN27, 27 .EQU ECC15_EBR1_ERRIBTEN26, 26 .EQU ECC15_EBR1_ERRIBTEN25, 25 .EQU ECC15_EBR1_ERRIBTEN24, 24 .EQU ECC15_EBR1_ERRIBTEN23, 23 .EQU ECC15_EBR1_ERRIBTEN22, 22 .EQU ECC15_EBR1_ERRIBTEN21, 21 .EQU ECC15_EBR1_ERRIBTEN20, 20 .EQU ECC15_EBR1_ERRIBTEN19, 19 .EQU ECC15_EBR1_ERRIBTEN18, 18 .EQU ECC15_EBR1_ERRIBTEN17, 17 .EQU ECC15_EBR1_ERRIBTEN16, 16 .EQU ECC15_EBR1_ERRIBTEN15, 15 .EQU ECC15_EBR1_ERRIBTEN14, 14 .EQU ECC15_EBR1_ERRIBTEN13, 13 .EQU ECC15_EBR1_ERRIBTEN12, 12 .EQU ECC15_EBR1_ERRIBTEN11, 11 .EQU ECC15_EBR1_ERRIBTEN10, 10 .EQU ECC15_EBR1_ERRIBTEN9, 9 .EQU ECC15_EBR1_ERRIBTEN8, 8 .EQU ECC15_EBR1_ERRIBTEN7, 7 .EQU ECC15_EBR1_ERRIBTEN6, 6 .EQU ECC15_EBR1_ERRIBTEN5, 5 .EQU ECC15_EBR1_ERRIBTEN4, 4 .EQU ECC15_EBR1_ERRIBTEN3, 3 .EQU ECC15_EBR1_ERRIBTEN2, 2 .EQU ECC15_EBR1_ERRIBTEN1, 1 .EQU ECC15_EBR1_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC15_EBR2, 0x40004698 // 0x4000 4698 ECC15_EBR2 Bits------------------------------------- .EQU ECC15_EBR2_ERRBITEN7, 7 .EQU ECC15_EBR2_ERRBITEN6, 6 .EQU ECC15_EBR2_ERRBITEN5, 5 .EQU ECC15_EBR2_ERRBITEN4, 4 .EQU ECC15_EBR2_ERRBITEN3, 3 .EQU ECC15_EBR2_ERRBITEN2, 2 .EQU ECC15_EBR2_ERRBITEN1, 1 .EQU ECC15_EBR2_ERRBITEN0, 0 // register------------------------------------- .EQU USART8_CTLR, 0x40004700 // 0x4000 4700 USART8_CTLR Bits------------------------------------- .EQU USART8_CTLR_SLMEN, 31 .EQU USART8_CTLR_RESHD, 30 .EQU USART8_CTLR_IRDAEN, 29 .EQU USART8_CTLR_BKPWS, 26 .EQU USART8_CTLR_RTSE, 25 .EQU USART8_CTLR_CTSE, 24 .EQU USART8_CTLR_TRGSEL1, 23 .EQU USART8_CTLR_TRGSEL0, 22 .EQU USART8_CTLR_DT9EN, 21 .EQU USART8_CTLR_PARM, 20 .EQU USART8_CTLR_TX9SEL, 19 .EQU USART8_CTLR_STPW, 18 .EQU USART8_CTLR_TIDLEEN, 17 .EQU USART8_CTLR_RXEN, 16 .EQU USART8_CTLR_TXEN, 15 .EQU USART8_CTLR_SYNC, 14 .EQU USART8_CTLR_SENDB, 13 .EQU USART8_CTLR_RIDLES, 12 .EQU USART8_CTLR_ABRDEN, 11 .EQU USART8_CTLR_ADREN, 9 .EQU USART8_CTLR_CSRS, 8 .EQU USART8_CTLR_WUEN, 7 .EQU USART8_CTLR_DINV, 6 .EQU USART8_CTLR_RCONV, 5 .EQU USART8_CTLR_TCONV, 4 .EQU USART8_CTLR_SCKPS, 3 .EQU USART8_CTLR_BRCKS1, 2 .EQU USART8_CTLR_BRCKS0, 1 .EQU USART8_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART8_BRGR, 0x40004704 // 0x4000 4704 USART8_BRGR Bits------------------------------------- .EQU USART8_BRGR_BRGF2_3, 23 .EQU USART8_BRGR_BRGF2_2, 22 .EQU USART8_BRGR_BRGF2_1, 21 .EQU USART8_BRGR_BRGF2_0, 20 .EQU USART8_BRGR_BRGF1_3, 19 .EQU USART8_BRGR_BRGF1_2, 18 .EQU USART8_BRGR_BRGF1_1, 17 .EQU USART8_BRGR_BRGF1_0, 16 .EQU USART8_BRGR_BRGM15, 15 .EQU USART8_BRGR_BRGM14, 14 .EQU USART8_BRGR_BRGM13, 13 .EQU USART8_BRGR_BRGM12, 12 .EQU USART8_BRGR_BRGM11, 11 .EQU USART8_BRGR_BRGM10, 10 .EQU USART8_BRGR_BRGM9, 9 .EQU USART8_BRGR_BRGM8, 8 .EQU USART8_BRGR_BRGM7, 7 .EQU USART8_BRGR_BRGM6, 6 .EQU USART8_BRGR_BRGM5, 5 .EQU USART8_BRGR_BRGM4, 4 .EQU USART8_BRGR_BRGM3, 3 .EQU USART8_BRGR_BRGM2, 2 .EQU USART8_BRGR_BRGM1, 1 .EQU USART8_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART8_STR, 0x40004708 // 0x4000 4708 USART8_STR Bits------------------------------------- .EQU USART8_STR_TX0SEL, 31 .EQU USART8_STR_TX1SEL, 30 .EQU USART8_STR_RXDSEL, 29 .EQU USART8_STR_CTSSEL, 28 .EQU USART8_STR_TXFIF, 27 .EQU USART8_STR_IDLEIC, 26 .EQU USART8_STR_UADMIC, 25 .EQU USART8_STR_CTSIC, 24 .EQU USART8_STR_REIC, 23 .EQU USART8_STR_TEIC, 22 .EQU USART8_STR_WUIC, 21 .EQU USART8_STR_ABTOIC, 20 .EQU USART8_STR_BRIC, 19 .EQU USART8_STR_FREIC, 18 .EQU USART8_STR_PAREIC, 17 .EQU USART8_STR_OVFEIC, 16 .EQU USART8_STR_IDLFIF, 15 .EQU USART8_STR_UADMIF, 14 .EQU USART8_STR_TXEIF, 13 .EQU USART8_STR_TFEIF, 12 .EQU USART8_STR_RDRIF, 11 .EQU USART8_STR_TXFR, 10 .EQU USART8_STR_RCFR, 9 .EQU USART8_STR_CTSIF, 8 .EQU USART8_STR_REIF, 7 .EQU USART8_STR_TEIF, 6 .EQU USART8_STR_WUIF, 5 .EQU USART8_STR_ABTOIF, 4 .EQU USART8_STR_BRIF, 3 .EQU USART8_STR_FREIF, 2 .EQU USART8_STR_PAREIF, 1 .EQU USART8_STR_OVFEIF, 0 // register------------------------------------- .EQU USART8_TBUFR, 0x4000470C // 0x4000 470C USART8_TBUFR Bits------------------------------------- .EQU USART8_TBUFR_TBUF7, 7 .EQU USART8_TBUFR_TBUF6, 6 .EQU USART8_TBUFR_TBUF5, 5 .EQU USART8_TBUFR_TBUF4, 4 .EQU USART8_TBUFR_TBUF3, 3 .EQU USART8_TBUFR_TBUF2, 2 .EQU USART8_TBUFR_TBUF1, 1 .EQU USART8_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART8_RBUFR, 0x4000470C // 0x4000 470C USART8_RBUFR Bits------------------------------------- .EQU USART8_RBUFR_RBUF8, 8 .EQU USART8_RBUFR_RBUF7, 7 .EQU USART8_RBUFR_RBUF6, 6 .EQU USART8_RBUFR_RBUF5, 5 .EQU USART8_RBUFR_RBUF4, 4 .EQU USART8_RBUFR_RBUF3, 3 .EQU USART8_RBUFR_RBUF2, 2 .EQU USART8_RBUFR_RBUF1, 1 .EQU USART8_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART8_U7816R, 0x40004710 // 0x4000 4710 USART8_U7816R Bits------------------------------------- .EQU USART8_U7816R_EGT7, 31 .EQU USART8_U7816R_EGT6, 30 .EQU USART8_U7816R_EGT5, 29 .EQU USART8_U7816R_EGT4, 28 .EQU USART8_U7816R_EGT3, 27 .EQU USART8_U7816R_EGT2, 26 .EQU USART8_U7816R_EGT1, 25 .EQU USART8_U7816R_EGT0, 24 .EQU USART8_U7816R_CLKDIV7, 22 .EQU USART8_U7816R_CLKDIV6, 21 .EQU USART8_U7816R_CLKDIV5, 20 .EQU USART8_U7816R_CLKDIV4, 19 .EQU USART8_U7816R_CLKDIV3, 18 .EQU USART8_U7816R_CLKDIV2, 17 .EQU USART8_U7816R_CLKDIV1, 16 .EQU USART8_U7816R_CLKDIV0, 15 .EQU USART8_U7816R_TREPMS, 14 .EQU USART8_U7816R_RXRE1, 13 .EQU USART8_U7816R_RXRE0, 12 .EQU USART8_U7816R_TXRE1, 11 .EQU USART8_U7816R_TXRE0, 10 .EQU USART8_U7816R_RREPEN, 9 .EQU USART8_U7816R_TREPEN, 8 .EQU USART8_U7816R_BGTEN, 5 .EQU USART8_U7816R_PSEL, 4 .EQU USART8_U7816R_ERSW1, 3 .EQU USART8_U7816R_ERSW0, 2 .EQU USART8_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART8_IER, 0x40004714 // 0x4000 4714 USART8_IER Bits------------------------------------- .EQU USART8_IER_UADMIE, 18 .EQU USART8_IER_UTXDE, 17 .EQU USART8_IER_URCDE, 16 .EQU USART8_IER_IDLEIE, 12 .EQU USART8_IER_TXEIE, 11 .EQU USART8_IER_TFEIE, 10 .EQU USART8_IER_RDRIE, 9 .EQU USART8_IER_CTSIE, 8 .EQU USART8_IER_REIE, 7 .EQU USART8_IER_TEIE, 6 .EQU USART8_IER_WUIE, 5 .EQU USART8_IER_ABTOIE, 4 .EQU USART8_IER_BRIE, 3 .EQU USART8_IER_FREIE, 2 .EQU USART8_IER_PAREIE, 1 .EQU USART8_IER_OVFEIE, 0 // register------------------------------------- .EQU USART8_ADM, 0x40004718 // 0x4000 4718 USART8_ADM Bits------------------------------------- .EQU USART8_ADM_ADM7, 7 .EQU USART8_ADM_ADM6, 6 .EQU USART8_ADM_ADM5, 5 .EQU USART8_ADM_ADM4, 4 .EQU USART8_ADM_ADM3, 3 .EQU USART8_ADM_ADM2, 2 .EQU USART8_ADM_ADM1, 1 .EQU USART8_ADM_ADM0, 0 // register------------------------------------- .EQU USART9_CTLR, 0x40004780 // 0x4000 4780 USART9_CTLR Bits------------------------------------- .EQU USART9_CTLR_SLMEN, 31 .EQU USART9_CTLR_RESHD, 30 .EQU USART9_CTLR_IRDAEN, 29 .EQU USART9_CTLR_BKPWS, 26 .EQU USART9_CTLR_RTSE, 25 .EQU USART9_CTLR_CTSE, 24 .EQU USART9_CTLR_TRGSEL1, 23 .EQU USART9_CTLR_TRGSEL0, 22 .EQU USART9_CTLR_DT9EN, 21 .EQU USART9_CTLR_PARM, 20 .EQU USART9_CTLR_TX9SEL, 19 .EQU USART9_CTLR_STPW, 18 .EQU USART9_CTLR_TIDLEEN, 17 .EQU USART9_CTLR_RXEN, 16 .EQU USART9_CTLR_TXEN, 15 .EQU USART9_CTLR_SYNC, 14 .EQU USART9_CTLR_SENDB, 13 .EQU USART9_CTLR_RIDLES, 12 .EQU USART9_CTLR_ABRDEN, 11 .EQU USART9_CTLR_ADREN, 9 .EQU USART9_CTLR_CSRS, 8 .EQU USART9_CTLR_WUEN, 7 .EQU USART9_CTLR_DINV, 6 .EQU USART9_CTLR_RCONV, 5 .EQU USART9_CTLR_TCONV, 4 .EQU USART9_CTLR_SCKPS, 3 .EQU USART9_CTLR_BRCKS1, 2 .EQU USART9_CTLR_BRCKS0, 1 .EQU USART9_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART9_BRGR, 0x40004784 // 0x4000 4784 USART9_BRGR Bits------------------------------------- .EQU USART9_BRGR_BRGF2_3, 23 .EQU USART9_BRGR_BRGF2_2, 22 .EQU USART9_BRGR_BRGF2_1, 21 .EQU USART9_BRGR_BRGF2_0, 20 .EQU USART9_BRGR_BRGF1_3, 19 .EQU USART9_BRGR_BRGF1_2, 18 .EQU USART9_BRGR_BRGF1_1, 17 .EQU USART9_BRGR_BRGF1_0, 16 .EQU USART9_BRGR_BRGM15, 15 .EQU USART9_BRGR_BRGM14, 14 .EQU USART9_BRGR_BRGM13, 13 .EQU USART9_BRGR_BRGM12, 12 .EQU USART9_BRGR_BRGM11, 11 .EQU USART9_BRGR_BRGM10, 10 .EQU USART9_BRGR_BRGM9, 9 .EQU USART9_BRGR_BRGM8, 8 .EQU USART9_BRGR_BRGM7, 7 .EQU USART9_BRGR_BRGM6, 6 .EQU USART9_BRGR_BRGM5, 5 .EQU USART9_BRGR_BRGM4, 4 .EQU USART9_BRGR_BRGM3, 3 .EQU USART9_BRGR_BRGM2, 2 .EQU USART9_BRGR_BRGM1, 1 .EQU USART9_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART9_STR, 0x40004788 // 0x4000 4788 USART9_STR Bits------------------------------------- .EQU USART9_STR_TX0SEL, 31 .EQU USART9_STR_TX1SEL, 30 .EQU USART9_STR_RXDSEL, 29 .EQU USART9_STR_CTSSEL, 28 .EQU USART9_STR_TXFIF, 27 .EQU USART9_STR_IDLEIC, 26 .EQU USART9_STR_UADMIC, 25 .EQU USART9_STR_CTSIC, 24 .EQU USART9_STR_REIC, 23 .EQU USART9_STR_TEIC, 22 .EQU USART9_STR_WUIC, 21 .EQU USART9_STR_ABTOIC, 20 .EQU USART9_STR_BRIC, 19 .EQU USART9_STR_FREIC, 18 .EQU USART9_STR_PAREIC, 17 .EQU USART9_STR_OVFEIC, 16 .EQU USART9_STR_IDLFIF, 15 .EQU USART9_STR_UADMIF, 14 .EQU USART9_STR_TXEIF, 13 .EQU USART9_STR_TFEIF, 12 .EQU USART9_STR_RDRIF, 11 .EQU USART9_STR_TXFR, 10 .EQU USART9_STR_RCFR, 9 .EQU USART9_STR_CTSIF, 8 .EQU USART9_STR_REIF, 7 .EQU USART9_STR_TEIF, 6 .EQU USART9_STR_WUIF, 5 .EQU USART9_STR_ABTOIF, 4 .EQU USART9_STR_BRIF, 3 .EQU USART9_STR_FREIF, 2 .EQU USART9_STR_PAREIF, 1 .EQU USART9_STR_OVFEIF, 0 // register------------------------------------- .EQU USART9_TBUFR, 0x4000478C // 0x4000 478C USART9_TBUFR Bits------------------------------------- .EQU USART9_TBUFR_TBUF7, 7 .EQU USART9_TBUFR_TBUF6, 6 .EQU USART9_TBUFR_TBUF5, 5 .EQU USART9_TBUFR_TBUF4, 4 .EQU USART9_TBUFR_TBUF3, 3 .EQU USART9_TBUFR_TBUF2, 2 .EQU USART9_TBUFR_TBUF1, 1 .EQU USART9_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART9_RBUFR, 0x4000478C // 0x4000 478C USART9_RBUFR Bits------------------------------------- .EQU USART9_RBUFR_RBUF8, 8 .EQU USART9_RBUFR_RBUF7, 7 .EQU USART9_RBUFR_RBUF6, 6 .EQU USART9_RBUFR_RBUF5, 5 .EQU USART9_RBUFR_RBUF4, 4 .EQU USART9_RBUFR_RBUF3, 3 .EQU USART9_RBUFR_RBUF2, 2 .EQU USART9_RBUFR_RBUF1, 1 .EQU USART9_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART9_U7816R, 0x40004790 // 0x4000 4790 USART9_U7816R Bits------------------------------------- .EQU USART9_U7816R_EGT7, 31 .EQU USART9_U7816R_EGT6, 30 .EQU USART9_U7816R_EGT5, 29 .EQU USART9_U7816R_EGT4, 28 .EQU USART9_U7816R_EGT3, 27 .EQU USART9_U7816R_EGT2, 26 .EQU USART9_U7816R_EGT1, 25 .EQU USART9_U7816R_EGT0, 24 .EQU USART9_U7816R_CLKDIV7, 22 .EQU USART9_U7816R_CLKDIV6, 21 .EQU USART9_U7816R_CLKDIV5, 20 .EQU USART9_U7816R_CLKDIV4, 19 .EQU USART9_U7816R_CLKDIV3, 18 .EQU USART9_U7816R_CLKDIV2, 17 .EQU USART9_U7816R_CLKDIV1, 16 .EQU USART9_U7816R_CLKDIV0, 15 .EQU USART9_U7816R_TREPMS, 14 .EQU USART9_U7816R_RXRE1, 13 .EQU USART9_U7816R_RXRE0, 12 .EQU USART9_U7816R_TXRE1, 11 .EQU USART9_U7816R_TXRE0, 10 .EQU USART9_U7816R_RREPEN, 9 .EQU USART9_U7816R_TREPEN, 8 .EQU USART9_U7816R_BGTEN, 5 .EQU USART9_U7816R_PSEL, 4 .EQU USART9_U7816R_ERSW1, 3 .EQU USART9_U7816R_ERSW0, 2 .EQU USART9_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART9_IER, 0x40004794 // 0x4000 4794 USART9_IER Bits------------------------------------- .EQU USART9_IER_UADMIE, 18 .EQU USART9_IER_UTXDE, 17 .EQU USART9_IER_URCDE, 16 .EQU USART9_IER_IDLEIE, 12 .EQU USART9_IER_TXEIE, 11 .EQU USART9_IER_TFEIE, 10 .EQU USART9_IER_RDRIE, 9 .EQU USART9_IER_CTSIE, 8 .EQU USART9_IER_REIE, 7 .EQU USART9_IER_TEIE, 6 .EQU USART9_IER_WUIE, 5 .EQU USART9_IER_ABTOIE, 4 .EQU USART9_IER_BRIE, 3 .EQU USART9_IER_FREIE, 2 .EQU USART9_IER_PAREIE, 1 .EQU USART9_IER_OVFEIE, 0 // register------------------------------------- .EQU USART9_ADM, 0x40004798 // 0x4000 4798 USART9_ADM Bits------------------------------------- .EQU USART9_ADM_ADM7, 7 .EQU USART9_ADM_ADM6, 6 .EQU USART9_ADM_ADM5, 5 .EQU USART9_ADM_ADM4, 4 .EQU USART9_ADM_ADM3, 3 .EQU USART9_ADM_ADM2, 2 .EQU USART9_ADM_ADM1, 1 .EQU USART9_ADM_ADM0, 0 // register------------------------------------- .EQU USART10_CTLR, 0x40004800 // 0x4000 4800 USART10_CTLR Bits------------------------------------- .EQU USART10_CTLR_SLMEN, 31 .EQU USART10_CTLR_RESHD, 30 .EQU USART10_CTLR_IRDAEN, 29 .EQU USART10_CTLR_BKPWS, 26 .EQU USART10_CTLR_RTSE, 25 .EQU USART10_CTLR_CTSE, 24 .EQU USART10_CTLR_TRGSEL1, 23 .EQU USART10_CTLR_TRGSEL0, 22 .EQU USART10_CTLR_DT9EN, 21 .EQU USART10_CTLR_PARM, 20 .EQU USART10_CTLR_TX9SEL, 19 .EQU USART10_CTLR_STPW, 18 .EQU USART10_CTLR_TIDLEEN, 17 .EQU USART10_CTLR_RXEN, 16 .EQU USART10_CTLR_TXEN, 15 .EQU USART10_CTLR_SYNC, 14 .EQU USART10_CTLR_SENDB, 13 .EQU USART10_CTLR_RIDLES, 12 .EQU USART10_CTLR_ABRDEN, 11 .EQU USART10_CTLR_ADREN, 9 .EQU USART10_CTLR_CSRS, 8 .EQU USART10_CTLR_WUEN, 7 .EQU USART10_CTLR_DINV, 6 .EQU USART10_CTLR_RCONV, 5 .EQU USART10_CTLR_TCONV, 4 .EQU USART10_CTLR_SCKPS, 3 .EQU USART10_CTLR_BRCKS1, 2 .EQU USART10_CTLR_BRCKS0, 1 .EQU USART10_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART10_BRGR, 0x40004804 // 0x4000 4804 USART10_BRGR Bits------------------------------------- .EQU USART10_BRGR_BRGF2_3, 23 .EQU USART10_BRGR_BRGF2_2, 22 .EQU USART10_BRGR_BRGF2_1, 21 .EQU USART10_BRGR_BRGF2_0, 20 .EQU USART10_BRGR_BRGF1_3, 19 .EQU USART10_BRGR_BRGF1_2, 18 .EQU USART10_BRGR_BRGF1_1, 17 .EQU USART10_BRGR_BRGF1_0, 16 .EQU USART10_BRGR_BRGM15, 15 .EQU USART10_BRGR_BRGM14, 14 .EQU USART10_BRGR_BRGM13, 13 .EQU USART10_BRGR_BRGM12, 12 .EQU USART10_BRGR_BRGM11, 11 .EQU USART10_BRGR_BRGM10, 10 .EQU USART10_BRGR_BRGM9, 9 .EQU USART10_BRGR_BRGM8, 8 .EQU USART10_BRGR_BRGM7, 7 .EQU USART10_BRGR_BRGM6, 6 .EQU USART10_BRGR_BRGM5, 5 .EQU USART10_BRGR_BRGM4, 4 .EQU USART10_BRGR_BRGM3, 3 .EQU USART10_BRGR_BRGM2, 2 .EQU USART10_BRGR_BRGM1, 1 .EQU USART10_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART10_STR, 0x40004808 // 0x4000 4808 USART10_STR Bits------------------------------------- .EQU USART10_STR_TX0SEL, 31 .EQU USART10_STR_TX1SEL, 30 .EQU USART10_STR_RXDSEL, 29 .EQU USART10_STR_CTSSEL, 28 .EQU USART10_STR_TXFIF, 27 .EQU USART10_STR_IDLEIC, 26 .EQU USART10_STR_UADMIC, 25 .EQU USART10_STR_CTSIC, 24 .EQU USART10_STR_REIC, 23 .EQU USART10_STR_TEIC, 22 .EQU USART10_STR_WUIC, 21 .EQU USART10_STR_ABTOIC, 20 .EQU USART10_STR_BRIC, 19 .EQU USART10_STR_FREIC, 18 .EQU USART10_STR_PAREIC, 17 .EQU USART10_STR_OVFEIC, 16 .EQU USART10_STR_IDLFIF, 15 .EQU USART10_STR_UADMIF, 14 .EQU USART10_STR_TXEIF, 13 .EQU USART10_STR_TFEIF, 12 .EQU USART10_STR_RDRIF, 11 .EQU USART10_STR_TXFR, 10 .EQU USART10_STR_RCFR, 9 .EQU USART10_STR_CTSIF, 8 .EQU USART10_STR_REIF, 7 .EQU USART10_STR_TEIF, 6 .EQU USART10_STR_WUIF, 5 .EQU USART10_STR_ABTOIF, 4 .EQU USART10_STR_BRIF, 3 .EQU USART10_STR_FREIF, 2 .EQU USART10_STR_PAREIF, 1 .EQU USART10_STR_OVFEIF, 0 // register------------------------------------- .EQU USART10_TBUFR, 0x4000480C // 0x4000 480C USART10_TBUFR Bits------------------------------------- .EQU USART10_TBUFR_TBUF7, 7 .EQU USART10_TBUFR_TBUF6, 6 .EQU USART10_TBUFR_TBUF5, 5 .EQU USART10_TBUFR_TBUF4, 4 .EQU USART10_TBUFR_TBUF3, 3 .EQU USART10_TBUFR_TBUF2, 2 .EQU USART10_TBUFR_TBUF1, 1 .EQU USART10_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART10_RBUFR, 0x4000480C // 0x4000 480C USART10_RBUFR Bits------------------------------------- .EQU USART10_RBUFR_RBUF8, 8 .EQU USART10_RBUFR_RBUF7, 7 .EQU USART10_RBUFR_RBUF6, 6 .EQU USART10_RBUFR_RBUF5, 5 .EQU USART10_RBUFR_RBUF4, 4 .EQU USART10_RBUFR_RBUF3, 3 .EQU USART10_RBUFR_RBUF2, 2 .EQU USART10_RBUFR_RBUF1, 1 .EQU USART10_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART10_U7816R, 0x40004810 // 0x4000 4810 USART10_U7816R Bits------------------------------------- .EQU USART10_U7816R_EGT7, 31 .EQU USART10_U7816R_EGT6, 30 .EQU USART10_U7816R_EGT5, 29 .EQU USART10_U7816R_EGT4, 28 .EQU USART10_U7816R_EGT3, 27 .EQU USART10_U7816R_EGT2, 26 .EQU USART10_U7816R_EGT1, 25 .EQU USART10_U7816R_EGT0, 24 .EQU USART10_U7816R_CLKDIV7, 22 .EQU USART10_U7816R_CLKDIV6, 21 .EQU USART10_U7816R_CLKDIV5, 20 .EQU USART10_U7816R_CLKDIV4, 19 .EQU USART10_U7816R_CLKDIV3, 18 .EQU USART10_U7816R_CLKDIV2, 17 .EQU USART10_U7816R_CLKDIV1, 16 .EQU USART10_U7816R_CLKDIV0, 15 .EQU USART10_U7816R_TREPMS, 14 .EQU USART10_U7816R_RXRE1, 13 .EQU USART10_U7816R_RXRE0, 12 .EQU USART10_U7816R_TXRE1, 11 .EQU USART10_U7816R_TXRE0, 10 .EQU USART10_U7816R_RREPEN, 9 .EQU USART10_U7816R_TREPEN, 8 .EQU USART10_U7816R_BGTEN, 5 .EQU USART10_U7816R_PSEL, 4 .EQU USART10_U7816R_ERSW1, 3 .EQU USART10_U7816R_ERSW0, 2 .EQU USART10_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART10_IER, 0x40004814 // 0x4000 4814 USART10_IER Bits------------------------------------- .EQU USART10_IER_UADMIE, 18 .EQU USART10_IER_UTXDE, 17 .EQU USART10_IER_URCDE, 16 .EQU USART10_IER_IDLEIE, 12 .EQU USART10_IER_TXEIE, 11 .EQU USART10_IER_TFEIE, 10 .EQU USART10_IER_RDRIE, 9 .EQU USART10_IER_CTSIE, 8 .EQU USART10_IER_REIE, 7 .EQU USART10_IER_TEIE, 6 .EQU USART10_IER_WUIE, 5 .EQU USART10_IER_ABTOIE, 4 .EQU USART10_IER_BRIE, 3 .EQU USART10_IER_FREIE, 2 .EQU USART10_IER_PAREIE, 1 .EQU USART10_IER_OVFEIE, 0 // register------------------------------------- .EQU USART10_ADM, 0x40004818 // 0x4000 4818 USART10_ADM Bits------------------------------------- .EQU USART10_ADM_ADM7, 7 .EQU USART10_ADM_ADM6, 6 .EQU USART10_ADM_ADM5, 5 .EQU USART10_ADM_ADM4, 4 .EQU USART10_ADM_ADM3, 3 .EQU USART10_ADM_ADM2, 2 .EQU USART10_ADM_ADM1, 1 .EQU USART10_ADM_ADM0, 0 // register------------------------------------- .EQU USART11_CTLR, 0x40004880 // 0x4000 4880 USART11_CTLR Bits------------------------------------- .EQU USART11_CTLR_SLMEN, 31 .EQU USART11_CTLR_RESHD, 30 .EQU USART11_CTLR_IRDAEN, 29 .EQU USART11_CTLR_BKPWS, 26 .EQU USART11_CTLR_RTSE, 25 .EQU USART11_CTLR_CTSE, 24 .EQU USART11_CTLR_TRGSEL1, 23 .EQU USART11_CTLR_TRGSEL0, 22 .EQU USART11_CTLR_DT9EN, 21 .EQU USART11_CTLR_PARM, 20 .EQU USART11_CTLR_TX9SEL, 19 .EQU USART11_CTLR_STPW, 18 .EQU USART11_CTLR_TIDLEEN, 17 .EQU USART11_CTLR_RXEN, 16 .EQU USART11_CTLR_TXEN, 15 .EQU USART11_CTLR_SYNC, 14 .EQU USART11_CTLR_SENDB, 13 .EQU USART11_CTLR_RIDLES, 12 .EQU USART11_CTLR_ABRDEN, 11 .EQU USART11_CTLR_ADREN, 9 .EQU USART11_CTLR_CSRS, 8 .EQU USART11_CTLR_WUEN, 7 .EQU USART11_CTLR_DINV, 6 .EQU USART11_CTLR_RCONV, 5 .EQU USART11_CTLR_TCONV, 4 .EQU USART11_CTLR_SCKPS, 3 .EQU USART11_CTLR_BRCKS1, 2 .EQU USART11_CTLR_BRCKS0, 1 .EQU USART11_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART11_BRGR, 0x40004884 // 0x4000 4884 USART11_BRGR Bits------------------------------------- .EQU USART11_BRGR_BRGF2_3, 23 .EQU USART11_BRGR_BRGF2_2, 22 .EQU USART11_BRGR_BRGF2_1, 21 .EQU USART11_BRGR_BRGF2_0, 20 .EQU USART11_BRGR_BRGF1_3, 19 .EQU USART11_BRGR_BRGF1_2, 18 .EQU USART11_BRGR_BRGF1_1, 17 .EQU USART11_BRGR_BRGF1_0, 16 .EQU USART11_BRGR_BRGM15, 15 .EQU USART11_BRGR_BRGM14, 14 .EQU USART11_BRGR_BRGM13, 13 .EQU USART11_BRGR_BRGM12, 12 .EQU USART11_BRGR_BRGM11, 11 .EQU USART11_BRGR_BRGM10, 10 .EQU USART11_BRGR_BRGM9, 9 .EQU USART11_BRGR_BRGM8, 8 .EQU USART11_BRGR_BRGM7, 7 .EQU USART11_BRGR_BRGM6, 6 .EQU USART11_BRGR_BRGM5, 5 .EQU USART11_BRGR_BRGM4, 4 .EQU USART11_BRGR_BRGM3, 3 .EQU USART11_BRGR_BRGM2, 2 .EQU USART11_BRGR_BRGM1, 1 .EQU USART11_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART11_STR, 0x40004888 // 0x4000 4888 USART11_STR Bits------------------------------------- .EQU USART11_STR_TX0SEL, 31 .EQU USART11_STR_TX1SEL, 30 .EQU USART11_STR_RXDSEL, 29 .EQU USART11_STR_CTSSEL, 28 .EQU USART11_STR_TXFIF, 27 .EQU USART11_STR_IDLEIC, 26 .EQU USART11_STR_UADMIC, 25 .EQU USART11_STR_CTSIC, 24 .EQU USART11_STR_REIC, 23 .EQU USART11_STR_TEIC, 22 .EQU USART11_STR_WUIC, 21 .EQU USART11_STR_ABTOIC, 20 .EQU USART11_STR_BRIC, 19 .EQU USART11_STR_FREIC, 18 .EQU USART11_STR_PAREIC, 17 .EQU USART11_STR_OVFEIC, 16 .EQU USART11_STR_IDLFIF, 15 .EQU USART11_STR_UADMIF, 14 .EQU USART11_STR_TXEIF, 13 .EQU USART11_STR_TFEIF, 12 .EQU USART11_STR_RDRIF, 11 .EQU USART11_STR_TXFR, 10 .EQU USART11_STR_RCFR, 9 .EQU USART11_STR_CTSIF, 8 .EQU USART11_STR_REIF, 7 .EQU USART11_STR_TEIF, 6 .EQU USART11_STR_WUIF, 5 .EQU USART11_STR_ABTOIF, 4 .EQU USART11_STR_BRIF, 3 .EQU USART11_STR_FREIF, 2 .EQU USART11_STR_PAREIF, 1 .EQU USART11_STR_OVFEIF, 0 // register------------------------------------- .EQU USART11_TBUFR, 0x4000488C // 0x4000 488C USART11_TBUFR Bits------------------------------------- .EQU USART11_TBUFR_TBUF7, 7 .EQU USART11_TBUFR_TBUF6, 6 .EQU USART11_TBUFR_TBUF5, 5 .EQU USART11_TBUFR_TBUF4, 4 .EQU USART11_TBUFR_TBUF3, 3 .EQU USART11_TBUFR_TBUF2, 2 .EQU USART11_TBUFR_TBUF1, 1 .EQU USART11_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART11_RBUFR, 0x4000488C // 0x4000 488C USART11_RBUFR Bits------------------------------------- .EQU USART11_RBUFR_RBUF8, 8 .EQU USART11_RBUFR_RBUF7, 7 .EQU USART11_RBUFR_RBUF6, 6 .EQU USART11_RBUFR_RBUF5, 5 .EQU USART11_RBUFR_RBUF4, 4 .EQU USART11_RBUFR_RBUF3, 3 .EQU USART11_RBUFR_RBUF2, 2 .EQU USART11_RBUFR_RBUF1, 1 .EQU USART11_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART11_U7816R, 0x40004890 // 0x4000 4890 USART11_U7816R Bits------------------------------------- .EQU USART11_U7816R_EGT7, 31 .EQU USART11_U7816R_EGT6, 30 .EQU USART11_U7816R_EGT5, 29 .EQU USART11_U7816R_EGT4, 28 .EQU USART11_U7816R_EGT3, 27 .EQU USART11_U7816R_EGT2, 26 .EQU USART11_U7816R_EGT1, 25 .EQU USART11_U7816R_EGT0, 24 .EQU USART11_U7816R_CLKDIV7, 22 .EQU USART11_U7816R_CLKDIV6, 21 .EQU USART11_U7816R_CLKDIV5, 20 .EQU USART11_U7816R_CLKDIV4, 19 .EQU USART11_U7816R_CLKDIV3, 18 .EQU USART11_U7816R_CLKDIV2, 17 .EQU USART11_U7816R_CLKDIV1, 16 .EQU USART11_U7816R_CLKDIV0, 15 .EQU USART11_U7816R_TREPMS, 14 .EQU USART11_U7816R_RXRE1, 13 .EQU USART11_U7816R_RXRE0, 12 .EQU USART11_U7816R_TXRE1, 11 .EQU USART11_U7816R_TXRE0, 10 .EQU USART11_U7816R_RREPEN, 9 .EQU USART11_U7816R_TREPEN, 8 .EQU USART11_U7816R_BGTEN, 5 .EQU USART11_U7816R_PSEL, 4 .EQU USART11_U7816R_ERSW1, 3 .EQU USART11_U7816R_ERSW0, 2 .EQU USART11_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART11_IER, 0x40004894 // 0x4000 4894 USART11_IER Bits------------------------------------- .EQU USART11_IER_UADMIE, 18 .EQU USART11_IER_UTXDE, 17 .EQU USART11_IER_URCDE, 16 .EQU USART11_IER_IDLEIE, 12 .EQU USART11_IER_TXEIE, 11 .EQU USART11_IER_TFEIE, 10 .EQU USART11_IER_RDRIE, 9 .EQU USART11_IER_CTSIE, 8 .EQU USART11_IER_REIE, 7 .EQU USART11_IER_TEIE, 6 .EQU USART11_IER_WUIE, 5 .EQU USART11_IER_ABTOIE, 4 .EQU USART11_IER_BRIE, 3 .EQU USART11_IER_FREIE, 2 .EQU USART11_IER_PAREIE, 1 .EQU USART11_IER_OVFEIE, 0 // register------------------------------------- .EQU USART11_ADM, 0x40004898 // 0x4000 4898 USART11_ADM Bits------------------------------------- .EQU USART11_ADM_ADM7, 7 .EQU USART11_ADM_ADM6, 6 .EQU USART11_ADM_ADM5, 5 .EQU USART11_ADM_ADM4, 4 .EQU USART11_ADM_ADM3, 3 .EQU USART11_ADM_ADM2, 2 .EQU USART11_ADM_ADM1, 1 .EQU USART11_ADM_ADM0, 0 // register------------------------------------- .EQU USART12_CTLR, 0x40004900 // 0x4000 4900 USART12_CTLR Bits------------------------------------- .EQU USART12_CTLR_SLMEN, 31 .EQU USART12_CTLR_RESHD, 30 .EQU USART12_CTLR_IRDAEN, 29 .EQU USART12_CTLR_BKPWS, 26 .EQU USART12_CTLR_RTSE, 25 .EQU USART12_CTLR_CTSE, 24 .EQU USART12_CTLR_TRGSEL1, 23 .EQU USART12_CTLR_TRGSEL0, 22 .EQU USART12_CTLR_DT9EN, 21 .EQU USART12_CTLR_PARM, 20 .EQU USART12_CTLR_TX9SEL, 19 .EQU USART12_CTLR_STPW, 18 .EQU USART12_CTLR_TIDLEEN, 17 .EQU USART12_CTLR_RXEN, 16 .EQU USART12_CTLR_TXEN, 15 .EQU USART12_CTLR_SYNC, 14 .EQU USART12_CTLR_SENDB, 13 .EQU USART12_CTLR_RIDLES, 12 .EQU USART12_CTLR_ABRDEN, 11 .EQU USART12_CTLR_ADREN, 9 .EQU USART12_CTLR_CSRS, 8 .EQU USART12_CTLR_WUEN, 7 .EQU USART12_CTLR_DINV, 6 .EQU USART12_CTLR_RCONV, 5 .EQU USART12_CTLR_TCONV, 4 .EQU USART12_CTLR_SCKPS, 3 .EQU USART12_CTLR_BRCKS1, 2 .EQU USART12_CTLR_BRCKS0, 1 .EQU USART12_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART12_BRGR, 0x40004904 // 0x4000 4904 USART12_BRGR Bits------------------------------------- .EQU USART12_BRGR_BRGF2_3, 23 .EQU USART12_BRGR_BRGF2_2, 22 .EQU USART12_BRGR_BRGF2_1, 21 .EQU USART12_BRGR_BRGF2_0, 20 .EQU USART12_BRGR_BRGF1_3, 19 .EQU USART12_BRGR_BRGF1_2, 18 .EQU USART12_BRGR_BRGF1_1, 17 .EQU USART12_BRGR_BRGF1_0, 16 .EQU USART12_BRGR_BRGM15, 15 .EQU USART12_BRGR_BRGM14, 14 .EQU USART12_BRGR_BRGM13, 13 .EQU USART12_BRGR_BRGM12, 12 .EQU USART12_BRGR_BRGM11, 11 .EQU USART12_BRGR_BRGM10, 10 .EQU USART12_BRGR_BRGM9, 9 .EQU USART12_BRGR_BRGM8, 8 .EQU USART12_BRGR_BRGM7, 7 .EQU USART12_BRGR_BRGM6, 6 .EQU USART12_BRGR_BRGM5, 5 .EQU USART12_BRGR_BRGM4, 4 .EQU USART12_BRGR_BRGM3, 3 .EQU USART12_BRGR_BRGM2, 2 .EQU USART12_BRGR_BRGM1, 1 .EQU USART12_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART12_STR, 0x40004908 // 0x4000 4908 USART12_STR Bits------------------------------------- .EQU USART12_STR_TX0SEL, 31 .EQU USART12_STR_TX1SEL, 30 .EQU USART12_STR_RXDSEL, 29 .EQU USART12_STR_CTSSEL, 28 .EQU USART12_STR_TXFIF, 27 .EQU USART12_STR_IDLEIC, 26 .EQU USART12_STR_UADMIC, 25 .EQU USART12_STR_CTSIC, 24 .EQU USART12_STR_REIC, 23 .EQU USART12_STR_TEIC, 22 .EQU USART12_STR_WUIC, 21 .EQU USART12_STR_ABTOIC, 20 .EQU USART12_STR_BRIC, 19 .EQU USART12_STR_FREIC, 18 .EQU USART12_STR_PAREIC, 17 .EQU USART12_STR_OVFEIC, 16 .EQU USART12_STR_IDLFIF, 15 .EQU USART12_STR_UADMIF, 14 .EQU USART12_STR_TXEIF, 13 .EQU USART12_STR_TFEIF, 12 .EQU USART12_STR_RDRIF, 11 .EQU USART12_STR_TXFR, 10 .EQU USART12_STR_RCFR, 9 .EQU USART12_STR_CTSIF, 8 .EQU USART12_STR_REIF, 7 .EQU USART12_STR_TEIF, 6 .EQU USART12_STR_WUIF, 5 .EQU USART12_STR_ABTOIF, 4 .EQU USART12_STR_BRIF, 3 .EQU USART12_STR_FREIF, 2 .EQU USART12_STR_PAREIF, 1 .EQU USART12_STR_OVFEIF, 0 // register------------------------------------- .EQU USART12_TBUFR, 0x4000490C // 0x4000 490C USART12_TBUFR Bits------------------------------------- .EQU USART12_TBUFR_TBUF7, 7 .EQU USART12_TBUFR_TBUF6, 6 .EQU USART12_TBUFR_TBUF5, 5 .EQU USART12_TBUFR_TBUF4, 4 .EQU USART12_TBUFR_TBUF3, 3 .EQU USART12_TBUFR_TBUF2, 2 .EQU USART12_TBUFR_TBUF1, 1 .EQU USART12_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART12_RBUFR, 0x4000490C // 0x4000 490C USART12_RBUFR Bits------------------------------------- .EQU USART12_RBUFR_RBUF8, 8 .EQU USART12_RBUFR_RBUF7, 7 .EQU USART12_RBUFR_RBUF6, 6 .EQU USART12_RBUFR_RBUF5, 5 .EQU USART12_RBUFR_RBUF4, 4 .EQU USART12_RBUFR_RBUF3, 3 .EQU USART12_RBUFR_RBUF2, 2 .EQU USART12_RBUFR_RBUF1, 1 .EQU USART12_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART12_U7816R, 0x40004910 // 0x4000 4910 USART12_U7816R Bits------------------------------------- .EQU USART12_U7816R_EGT7, 31 .EQU USART12_U7816R_EGT6, 30 .EQU USART12_U7816R_EGT5, 29 .EQU USART12_U7816R_EGT4, 28 .EQU USART12_U7816R_EGT3, 27 .EQU USART12_U7816R_EGT2, 26 .EQU USART12_U7816R_EGT1, 25 .EQU USART12_U7816R_EGT0, 24 .EQU USART12_U7816R_CLKDIV7, 22 .EQU USART12_U7816R_CLKDIV6, 21 .EQU USART12_U7816R_CLKDIV5, 20 .EQU USART12_U7816R_CLKDIV4, 19 .EQU USART12_U7816R_CLKDIV3, 18 .EQU USART12_U7816R_CLKDIV2, 17 .EQU USART12_U7816R_CLKDIV1, 16 .EQU USART12_U7816R_CLKDIV0, 15 .EQU USART12_U7816R_TREPMS, 14 .EQU USART12_U7816R_RXRE1, 13 .EQU USART12_U7816R_RXRE0, 12 .EQU USART12_U7816R_TXRE1, 11 .EQU USART12_U7816R_TXRE0, 10 .EQU USART12_U7816R_RREPEN, 9 .EQU USART12_U7816R_TREPEN, 8 .EQU USART12_U7816R_BGTEN, 5 .EQU USART12_U7816R_PSEL, 4 .EQU USART12_U7816R_ERSW1, 3 .EQU USART12_U7816R_ERSW0, 2 .EQU USART12_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART12_IER, 0x40004914 // 0x4000 4914 USART12_IER Bits------------------------------------- .EQU USART12_IER_UADMIE, 18 .EQU USART12_IER_UTXDE, 17 .EQU USART12_IER_URCDE, 16 .EQU USART12_IER_IDLEIE, 12 .EQU USART12_IER_TXEIE, 11 .EQU USART12_IER_TFEIE, 10 .EQU USART12_IER_RDRIE, 9 .EQU USART12_IER_CTSIE, 8 .EQU USART12_IER_REIE, 7 .EQU USART12_IER_TEIE, 6 .EQU USART12_IER_WUIE, 5 .EQU USART12_IER_ABTOIE, 4 .EQU USART12_IER_BRIE, 3 .EQU USART12_IER_FREIE, 2 .EQU USART12_IER_PAREIE, 1 .EQU USART12_IER_OVFEIE, 0 // register------------------------------------- .EQU USART12_ADM, 0x40004918 // 0x4000 4918 USART12_ADM Bits------------------------------------- .EQU USART12_ADM_ADM7, 7 .EQU USART12_ADM_ADM6, 6 .EQU USART12_ADM_ADM5, 5 .EQU USART12_ADM_ADM4, 4 .EQU USART12_ADM_ADM3, 3 .EQU USART12_ADM_ADM2, 2 .EQU USART12_ADM_ADM1, 1 .EQU USART12_ADM_ADM0, 0 // register------------------------------------- .EQU USART13_CTLR, 0x40004980 // 0x4000 4980 USART13_CTLR Bits------------------------------------- .EQU USART13_CTLR_SLMEN, 31 .EQU USART13_CTLR_RESHD, 30 .EQU USART13_CTLR_IRDAEN, 29 .EQU USART13_CTLR_BKPWS, 26 .EQU USART13_CTLR_RTSE, 25 .EQU USART13_CTLR_CTSE, 24 .EQU USART13_CTLR_TRGSEL1, 23 .EQU USART13_CTLR_TRGSEL0, 22 .EQU USART13_CTLR_DT9EN, 21 .EQU USART13_CTLR_PARM, 20 .EQU USART13_CTLR_TX9SEL, 19 .EQU USART13_CTLR_STPW, 18 .EQU USART13_CTLR_TIDLEEN, 17 .EQU USART13_CTLR_RXEN, 16 .EQU USART13_CTLR_TXEN, 15 .EQU USART13_CTLR_SYNC, 14 .EQU USART13_CTLR_SENDB, 13 .EQU USART13_CTLR_RIDLES, 12 .EQU USART13_CTLR_ABRDEN, 11 .EQU USART13_CTLR_ADREN, 9 .EQU USART13_CTLR_CSRS, 8 .EQU USART13_CTLR_WUEN, 7 .EQU USART13_CTLR_DINV, 6 .EQU USART13_CTLR_RCONV, 5 .EQU USART13_CTLR_TCONV, 4 .EQU USART13_CTLR_SCKPS, 3 .EQU USART13_CTLR_BRCKS1, 2 .EQU USART13_CTLR_BRCKS0, 1 .EQU USART13_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART13_BRGR, 0x40004984 // 0x4000 4984 USART13_BRGR Bits------------------------------------- .EQU USART13_BRGR_BRGF2_3, 23 .EQU USART13_BRGR_BRGF2_2, 22 .EQU USART13_BRGR_BRGF2_1, 21 .EQU USART13_BRGR_BRGF2_0, 20 .EQU USART13_BRGR_BRGF1_3, 19 .EQU USART13_BRGR_BRGF1_2, 18 .EQU USART13_BRGR_BRGF1_1, 17 .EQU USART13_BRGR_BRGF1_0, 16 .EQU USART13_BRGR_BRGM15, 15 .EQU USART13_BRGR_BRGM14, 14 .EQU USART13_BRGR_BRGM13, 13 .EQU USART13_BRGR_BRGM12, 12 .EQU USART13_BRGR_BRGM11, 11 .EQU USART13_BRGR_BRGM10, 10 .EQU USART13_BRGR_BRGM9, 9 .EQU USART13_BRGR_BRGM8, 8 .EQU USART13_BRGR_BRGM7, 7 .EQU USART13_BRGR_BRGM6, 6 .EQU USART13_BRGR_BRGM5, 5 .EQU USART13_BRGR_BRGM4, 4 .EQU USART13_BRGR_BRGM3, 3 .EQU USART13_BRGR_BRGM2, 2 .EQU USART13_BRGR_BRGM1, 1 .EQU USART13_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART13_STR, 0x40004988 // 0x4000 4988 USART13_STR Bits------------------------------------- .EQU USART13_STR_TX0SEL, 31 .EQU USART13_STR_TX1SEL, 30 .EQU USART13_STR_RXDSEL, 29 .EQU USART13_STR_CTSSEL, 28 .EQU USART13_STR_TXFIF, 27 .EQU USART13_STR_IDLEIC, 26 .EQU USART13_STR_UADMIC, 25 .EQU USART13_STR_CTSIC, 24 .EQU USART13_STR_REIC, 23 .EQU USART13_STR_TEIC, 22 .EQU USART13_STR_WUIC, 21 .EQU USART13_STR_ABTOIC, 20 .EQU USART13_STR_BRIC, 19 .EQU USART13_STR_FREIC, 18 .EQU USART13_STR_PAREIC, 17 .EQU USART13_STR_OVFEIC, 16 .EQU USART13_STR_IDLFIF, 15 .EQU USART13_STR_UADMIF, 14 .EQU USART13_STR_TXEIF, 13 .EQU USART13_STR_TFEIF, 12 .EQU USART13_STR_RDRIF, 11 .EQU USART13_STR_TXFR, 10 .EQU USART13_STR_RCFR, 9 .EQU USART13_STR_CTSIF, 8 .EQU USART13_STR_REIF, 7 .EQU USART13_STR_TEIF, 6 .EQU USART13_STR_WUIF, 5 .EQU USART13_STR_ABTOIF, 4 .EQU USART13_STR_BRIF, 3 .EQU USART13_STR_FREIF, 2 .EQU USART13_STR_PAREIF, 1 .EQU USART13_STR_OVFEIF, 0 // register------------------------------------- .EQU USART13_TBUFR, 0x4000498C // 0x4000 498C USART13_TBUFR Bits------------------------------------- .EQU USART13_TBUFR_TBUF7, 7 .EQU USART13_TBUFR_TBUF6, 6 .EQU USART13_TBUFR_TBUF5, 5 .EQU USART13_TBUFR_TBUF4, 4 .EQU USART13_TBUFR_TBUF3, 3 .EQU USART13_TBUFR_TBUF2, 2 .EQU USART13_TBUFR_TBUF1, 1 .EQU USART13_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART13_RBUFR, 0x4000498C // 0x4000 498C USART13_RBUFR Bits------------------------------------- .EQU USART13_RBUFR_RBUF8, 8 .EQU USART13_RBUFR_RBUF7, 7 .EQU USART13_RBUFR_RBUF6, 6 .EQU USART13_RBUFR_RBUF5, 5 .EQU USART13_RBUFR_RBUF4, 4 .EQU USART13_RBUFR_RBUF3, 3 .EQU USART13_RBUFR_RBUF2, 2 .EQU USART13_RBUFR_RBUF1, 1 .EQU USART13_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART13_U7816R, 0x40004990 // 0x4000 4990 USART13_U7816R Bits------------------------------------- .EQU USART13_U7816R_EGT7, 31 .EQU USART13_U7816R_EGT6, 30 .EQU USART13_U7816R_EGT5, 29 .EQU USART13_U7816R_EGT4, 28 .EQU USART13_U7816R_EGT3, 27 .EQU USART13_U7816R_EGT2, 26 .EQU USART13_U7816R_EGT1, 25 .EQU USART13_U7816R_EGT0, 24 .EQU USART13_U7816R_CLKDIV7, 22 .EQU USART13_U7816R_CLKDIV6, 21 .EQU USART13_U7816R_CLKDIV5, 20 .EQU USART13_U7816R_CLKDIV4, 19 .EQU USART13_U7816R_CLKDIV3, 18 .EQU USART13_U7816R_CLKDIV2, 17 .EQU USART13_U7816R_CLKDIV1, 16 .EQU USART13_U7816R_CLKDIV0, 15 .EQU USART13_U7816R_TREPMS, 14 .EQU USART13_U7816R_RXRE1, 13 .EQU USART13_U7816R_RXRE0, 12 .EQU USART13_U7816R_TXRE1, 11 .EQU USART13_U7816R_TXRE0, 10 .EQU USART13_U7816R_RREPEN, 9 .EQU USART13_U7816R_TREPEN, 8 .EQU USART13_U7816R_BGTEN, 5 .EQU USART13_U7816R_PSEL, 4 .EQU USART13_U7816R_ERSW1, 3 .EQU USART13_U7816R_ERSW0, 2 .EQU USART13_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART13_IER, 0x40004994 // 0x4000 4994 USART13_IER Bits------------------------------------- .EQU USART13_IER_UADMIE, 18 .EQU USART13_IER_UTXDE, 17 .EQU USART13_IER_URCDE, 16 .EQU USART13_IER_IDLEIE, 12 .EQU USART13_IER_TXEIE, 11 .EQU USART13_IER_TFEIE, 10 .EQU USART13_IER_RDRIE, 9 .EQU USART13_IER_CTSIE, 8 .EQU USART13_IER_REIE, 7 .EQU USART13_IER_TEIE, 6 .EQU USART13_IER_WUIE, 5 .EQU USART13_IER_ABTOIE, 4 .EQU USART13_IER_BRIE, 3 .EQU USART13_IER_FREIE, 2 .EQU USART13_IER_PAREIE, 1 .EQU USART13_IER_OVFEIE, 0 // register------------------------------------- .EQU USART13_ADM, 0x40004998 // 0x4000 4998 USART13_ADM Bits------------------------------------- .EQU USART13_ADM_ADM7, 7 .EQU USART13_ADM_ADM6, 6 .EQU USART13_ADM_ADM5, 5 .EQU USART13_ADM_ADM4, 4 .EQU USART13_ADM_ADM3, 3 .EQU USART13_ADM_ADM2, 2 .EQU USART13_ADM_ADM1, 1 .EQU USART13_ADM_ADM0, 0 // register------------------------------------- .EQU ECC4_CTL, 0x40004A00 // 0x4000 4A00 ECC4_CTL Bits------------------------------------- .EQU ECC4_CTL_MEM2BITERRIC, 14 .EQU ECC4_CTL_MEM1BITERRIC, 13 .EQU ECC4_CTL_MEMERRIC, 12 .EQU ECC4_CTL_MEM2BITERRIE, 10 .EQU ECC4_CTL_MEM1BITERRIE, 9 .EQU ECC4_CTL_MEMERRIE, 8 .EQU ECC4_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC4_INT, 0x40004A04 // 0x4000 4A04 ECC4_INT Bits------------------------------------- .EQU ECC4_INT_MEM2BITERRIF, 2 .EQU ECC4_INT_MEM1BITERRIF, 1 .EQU ECC4_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC4_ERRADDR, 0x40004A08 // 0x4000 4A08 ECC4_ERRADDR Bits------------------------------------- .EQU ECC4_ERRADDR_ERRADDR31, 31 .EQU ECC4_ERRADDR_ERRADDR30, 30 .EQU ECC4_ERRADDR_ERRADDR29, 29 .EQU ECC4_ERRADDR_ERRADDR28, 28 .EQU ECC4_ERRADDR_ERRADDR27, 27 .EQU ECC4_ERRADDR_ERRADDR26, 26 .EQU ECC4_ERRADDR_ERRADDR25, 25 .EQU ECC4_ERRADDR_ERRADDR24, 24 .EQU ECC4_ERRADDR_ERRADDR23, 23 .EQU ECC4_ERRADDR_ERRADDR22, 22 .EQU ECC4_ERRADDR_ERRADDR21, 21 .EQU ECC4_ERRADDR_ERRADDR20, 20 .EQU ECC4_ERRADDR_ERRADDR19, 19 .EQU ECC4_ERRADDR_ERRADDR18, 18 .EQU ECC4_ERRADDR_ERRADDR17, 17 .EQU ECC4_ERRADDR_ERRADDR16, 16 .EQU ECC4_ERRADDR_ERRADDR15, 15 .EQU ECC4_ERRADDR_ERRADDR14, 14 .EQU ECC4_ERRADDR_ERRADDR13, 13 .EQU ECC4_ERRADDR_ERRADDR12, 12 .EQU ECC4_ERRADDR_ERRADDR11, 11 .EQU ECC4_ERRADDR_ERRADDR10, 10 .EQU ECC4_ERRADDR_ERRADDR9, 9 .EQU ECC4_ERRADDR_ERRADDR8, 8 .EQU ECC4_ERRADDR_ERRADDR7, 7 .EQU ECC4_ERRADDR_ERRADDR6, 6 .EQU ECC4_ERRADDR_ERRADDR5, 5 .EQU ECC4_ERRADDR_ERRADDR4, 4 .EQU ECC4_ERRADDR_ERRADDR3, 3 .EQU ECC4_ERRADDR_ERRADDR2, 2 .EQU ECC4_ERRADDR_ERRADDR1, 1 .EQU ECC4_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC4_EBR0, 0x40004A10 // 0x4000 4A10 ECC4_EBR0 Bits------------------------------------- .EQU ECC4_EBR0_ERRIBTEN31, 31 .EQU ECC4_EBR0_ERRIBTEN30, 30 .EQU ECC4_EBR0_ERRIBTEN29, 29 .EQU ECC4_EBR0_ERRIBTEN28, 28 .EQU ECC4_EBR0_ERRIBTEN27, 27 .EQU ECC4_EBR0_ERRIBTEN26, 26 .EQU ECC4_EBR0_ERRIBTEN25, 25 .EQU ECC4_EBR0_ERRIBTEN24, 24 .EQU ECC4_EBR0_ERRIBTEN23, 23 .EQU ECC4_EBR0_ERRIBTEN22, 22 .EQU ECC4_EBR0_ERRIBTEN21, 21 .EQU ECC4_EBR0_ERRIBTEN20, 20 .EQU ECC4_EBR0_ERRIBTEN19, 19 .EQU ECC4_EBR0_ERRIBTEN18, 18 .EQU ECC4_EBR0_ERRIBTEN17, 17 .EQU ECC4_EBR0_ERRIBTEN16, 16 .EQU ECC4_EBR0_ERRIBTEN15, 15 .EQU ECC4_EBR0_ERRIBTEN14, 14 .EQU ECC4_EBR0_ERRIBTEN13, 13 .EQU ECC4_EBR0_ERRIBTEN12, 12 .EQU ECC4_EBR0_ERRIBTEN11, 11 .EQU ECC4_EBR0_ERRIBTEN10, 10 .EQU ECC4_EBR0_ERRIBTEN9, 9 .EQU ECC4_EBR0_ERRIBTEN8, 8 .EQU ECC4_EBR0_ERRIBTEN7, 7 .EQU ECC4_EBR0_ERRIBTEN6, 6 .EQU ECC4_EBR0_ERRIBTEN5, 5 .EQU ECC4_EBR0_ERRIBTEN4, 4 .EQU ECC4_EBR0_ERRIBTEN3, 3 .EQU ECC4_EBR0_ERRIBTEN2, 2 .EQU ECC4_EBR0_ERRIBTEN1, 1 .EQU ECC4_EBR0_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC4_EBR2, 0x40004A18 // 0x4000 4A18 ECC4_EBR2 Bits------------------------------------- .EQU ECC4_EBR2_ERRBITEN7, 7 .EQU ECC4_EBR2_ERRBITEN6, 6 .EQU ECC4_EBR2_ERRBITEN5, 5 .EQU ECC4_EBR2_ERRBITEN4, 4 .EQU ECC4_EBR2_ERRBITEN3, 3 .EQU ECC4_EBR2_ERRBITEN2, 2 .EQU ECC4_EBR2_ERRBITEN1, 1 .EQU ECC4_EBR2_ERRBITEN0, 0 // register------------------------------------- .EQU ECC5_CTL, 0x40004A80 // 0x4000 4A80 ECC5_CTL Bits------------------------------------- .EQU ECC5_CTL_MEM2BITERRIC, 14 .EQU ECC5_CTL_MEM1BITERRIC, 13 .EQU ECC5_CTL_MEMERRIC, 12 .EQU ECC5_CTL_MEM2BITERRIE, 10 .EQU ECC5_CTL_MEM1BITERRIE, 9 .EQU ECC5_CTL_MEMERRIE, 8 .EQU ECC5_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC5_INT, 0x40004A84 // 0x4000 4A84 ECC5_INT Bits------------------------------------- .EQU ECC5_INT_MEM2BITERRIF, 2 .EQU ECC5_INT_MEM1BITERRIF, 1 .EQU ECC5_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC5_ERRADDR, 0x40004A88 // 0x4000 4A88 ECC5_ERRADDR Bits------------------------------------- .EQU ECC5_ERRADDR_ERRADDR31, 31 .EQU ECC5_ERRADDR_ERRADDR30, 30 .EQU ECC5_ERRADDR_ERRADDR29, 29 .EQU ECC5_ERRADDR_ERRADDR28, 28 .EQU ECC5_ERRADDR_ERRADDR27, 27 .EQU ECC5_ERRADDR_ERRADDR26, 26 .EQU ECC5_ERRADDR_ERRADDR25, 25 .EQU ECC5_ERRADDR_ERRADDR24, 24 .EQU ECC5_ERRADDR_ERRADDR23, 23 .EQU ECC5_ERRADDR_ERRADDR22, 22 .EQU ECC5_ERRADDR_ERRADDR21, 21 .EQU ECC5_ERRADDR_ERRADDR20, 20 .EQU ECC5_ERRADDR_ERRADDR19, 19 .EQU ECC5_ERRADDR_ERRADDR18, 18 .EQU ECC5_ERRADDR_ERRADDR17, 17 .EQU ECC5_ERRADDR_ERRADDR16, 16 .EQU ECC5_ERRADDR_ERRADDR15, 15 .EQU ECC5_ERRADDR_ERRADDR14, 14 .EQU ECC5_ERRADDR_ERRADDR13, 13 .EQU ECC5_ERRADDR_ERRADDR12, 12 .EQU ECC5_ERRADDR_ERRADDR11, 11 .EQU ECC5_ERRADDR_ERRADDR10, 10 .EQU ECC5_ERRADDR_ERRADDR9, 9 .EQU ECC5_ERRADDR_ERRADDR8, 8 .EQU ECC5_ERRADDR_ERRADDR7, 7 .EQU ECC5_ERRADDR_ERRADDR6, 6 .EQU ECC5_ERRADDR_ERRADDR5, 5 .EQU ECC5_ERRADDR_ERRADDR4, 4 .EQU ECC5_ERRADDR_ERRADDR3, 3 .EQU ECC5_ERRADDR_ERRADDR2, 2 .EQU ECC5_ERRADDR_ERRADDR1, 1 .EQU ECC5_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC5_EBR0, 0x40004A90 // 0x4000 4A90 ECC5_EBR0 Bits------------------------------------- .EQU ECC5_EBR0_ERRIBTEN31, 31 .EQU ECC5_EBR0_ERRIBTEN30, 30 .EQU ECC5_EBR0_ERRIBTEN29, 29 .EQU ECC5_EBR0_ERRIBTEN28, 28 .EQU ECC5_EBR0_ERRIBTEN27, 27 .EQU ECC5_EBR0_ERRIBTEN26, 26 .EQU ECC5_EBR0_ERRIBTEN25, 25 .EQU ECC5_EBR0_ERRIBTEN24, 24 .EQU ECC5_EBR0_ERRIBTEN23, 23 .EQU ECC5_EBR0_ERRIBTEN22, 22 .EQU ECC5_EBR0_ERRIBTEN21, 21 .EQU ECC5_EBR0_ERRIBTEN20, 20 .EQU ECC5_EBR0_ERRIBTEN19, 19 .EQU ECC5_EBR0_ERRIBTEN18, 18 .EQU ECC5_EBR0_ERRIBTEN17, 17 .EQU ECC5_EBR0_ERRIBTEN16, 16 .EQU ECC5_EBR0_ERRIBTEN15, 15 .EQU ECC5_EBR0_ERRIBTEN14, 14 .EQU ECC5_EBR0_ERRIBTEN13, 13 .EQU ECC5_EBR0_ERRIBTEN12, 12 .EQU ECC5_EBR0_ERRIBTEN11, 11 .EQU ECC5_EBR0_ERRIBTEN10, 10 .EQU ECC5_EBR0_ERRIBTEN9, 9 .EQU ECC5_EBR0_ERRIBTEN8, 8 .EQU ECC5_EBR0_ERRIBTEN7, 7 .EQU ECC5_EBR0_ERRIBTEN6, 6 .EQU ECC5_EBR0_ERRIBTEN5, 5 .EQU ECC5_EBR0_ERRIBTEN4, 4 .EQU ECC5_EBR0_ERRIBTEN3, 3 .EQU ECC5_EBR0_ERRIBTEN2, 2 .EQU ECC5_EBR0_ERRIBTEN1, 1 .EQU ECC5_EBR0_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC5_EBR2, 0x40004A98 // 0x4000 4A98 ECC5_EBR2 Bits------------------------------------- .EQU ECC5_EBR2_ERRBITEN7, 7 .EQU ECC5_EBR2_ERRBITEN6, 6 .EQU ECC5_EBR2_ERRBITEN5, 5 .EQU ECC5_EBR2_ERRBITEN4, 4 .EQU ECC5_EBR2_ERRBITEN3, 3 .EQU ECC5_EBR2_ERRBITEN2, 2 .EQU ECC5_EBR2_ERRBITEN1, 1 .EQU ECC5_EBR2_ERRBITEN0, 0 // register------------------------------------- .EQU ECC6_CTL, 0x40004B00 // 0x4000 4B00 ECC6_CTL Bits------------------------------------- .EQU ECC6_CTL_MEM2BITERRIC, 14 .EQU ECC6_CTL_MEM1BITERRIC, 13 .EQU ECC6_CTL_MEMERRIC, 12 .EQU ECC6_CTL_MEM2BITERRIE, 10 .EQU ECC6_CTL_MEM1BITERRIE, 9 .EQU ECC6_CTL_MEMERRIE, 8 .EQU ECC6_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC6_INT, 0x40004B04 // 0x4000 4B04 ECC6_INT Bits------------------------------------- .EQU ECC6_INT_MEM2BITERRIF, 2 .EQU ECC6_INT_MEM1BITERRIF, 1 .EQU ECC6_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC6_ERRADDR, 0x40004B08 // 0x4000 4B08 ECC6_ERRADDR Bits------------------------------------- .EQU ECC6_ERRADDR_ERRADDR31, 31 .EQU ECC6_ERRADDR_ERRADDR30, 30 .EQU ECC6_ERRADDR_ERRADDR29, 29 .EQU ECC6_ERRADDR_ERRADDR28, 28 .EQU ECC6_ERRADDR_ERRADDR27, 27 .EQU ECC6_ERRADDR_ERRADDR26, 26 .EQU ECC6_ERRADDR_ERRADDR25, 25 .EQU ECC6_ERRADDR_ERRADDR24, 24 .EQU ECC6_ERRADDR_ERRADDR23, 23 .EQU ECC6_ERRADDR_ERRADDR22, 22 .EQU ECC6_ERRADDR_ERRADDR21, 21 .EQU ECC6_ERRADDR_ERRADDR20, 20 .EQU ECC6_ERRADDR_ERRADDR19, 19 .EQU ECC6_ERRADDR_ERRADDR18, 18 .EQU ECC6_ERRADDR_ERRADDR17, 17 .EQU ECC6_ERRADDR_ERRADDR16, 16 .EQU ECC6_ERRADDR_ERRADDR15, 15 .EQU ECC6_ERRADDR_ERRADDR14, 14 .EQU ECC6_ERRADDR_ERRADDR13, 13 .EQU ECC6_ERRADDR_ERRADDR12, 12 .EQU ECC6_ERRADDR_ERRADDR11, 11 .EQU ECC6_ERRADDR_ERRADDR10, 10 .EQU ECC6_ERRADDR_ERRADDR9, 9 .EQU ECC6_ERRADDR_ERRADDR8, 8 .EQU ECC6_ERRADDR_ERRADDR7, 7 .EQU ECC6_ERRADDR_ERRADDR6, 6 .EQU ECC6_ERRADDR_ERRADDR5, 5 .EQU ECC6_ERRADDR_ERRADDR4, 4 .EQU ECC6_ERRADDR_ERRADDR3, 3 .EQU ECC6_ERRADDR_ERRADDR2, 2 .EQU ECC6_ERRADDR_ERRADDR1, 1 .EQU ECC6_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC7_CTL, 0x40004B80 // 0x4000 4B80 ECC7_CTL Bits------------------------------------- .EQU ECC7_CTL_MEM2BITERRIC, 14 .EQU ECC7_CTL_MEM1BITERRIC, 13 .EQU ECC7_CTL_MEMERRIC, 12 .EQU ECC7_CTL_MEM2BITERRIE, 10 .EQU ECC7_CTL_MEM1BITERRIE, 9 .EQU ECC7_CTL_MEMERRIE, 8 .EQU ECC7_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC7_INT, 0x40004B84 // 0x4000 4B84 ECC7_INT Bits------------------------------------- .EQU ECC7_INT_MEM2BITERRIF, 2 .EQU ECC7_INT_MEM1BITERRIF, 1 .EQU ECC7_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC7_ERRADDR, 0x40004B88 // 0x4000 4B88 ECC7_ERRADDR Bits------------------------------------- .EQU ECC7_ERRADDR_ERRADDR31, 31 .EQU ECC7_ERRADDR_ERRADDR30, 30 .EQU ECC7_ERRADDR_ERRADDR29, 29 .EQU ECC7_ERRADDR_ERRADDR28, 28 .EQU ECC7_ERRADDR_ERRADDR27, 27 .EQU ECC7_ERRADDR_ERRADDR26, 26 .EQU ECC7_ERRADDR_ERRADDR25, 25 .EQU ECC7_ERRADDR_ERRADDR24, 24 .EQU ECC7_ERRADDR_ERRADDR23, 23 .EQU ECC7_ERRADDR_ERRADDR22, 22 .EQU ECC7_ERRADDR_ERRADDR21, 21 .EQU ECC7_ERRADDR_ERRADDR20, 20 .EQU ECC7_ERRADDR_ERRADDR19, 19 .EQU ECC7_ERRADDR_ERRADDR18, 18 .EQU ECC7_ERRADDR_ERRADDR17, 17 .EQU ECC7_ERRADDR_ERRADDR16, 16 .EQU ECC7_ERRADDR_ERRADDR15, 15 .EQU ECC7_ERRADDR_ERRADDR14, 14 .EQU ECC7_ERRADDR_ERRADDR13, 13 .EQU ECC7_ERRADDR_ERRADDR12, 12 .EQU ECC7_ERRADDR_ERRADDR11, 11 .EQU ECC7_ERRADDR_ERRADDR10, 10 .EQU ECC7_ERRADDR_ERRADDR9, 9 .EQU ECC7_ERRADDR_ERRADDR8, 8 .EQU ECC7_ERRADDR_ERRADDR7, 7 .EQU ECC7_ERRADDR_ERRADDR6, 6 .EQU ECC7_ERRADDR_ERRADDR5, 5 .EQU ECC7_ERRADDR_ERRADDR4, 4 .EQU ECC7_ERRADDR_ERRADDR3, 3 .EQU ECC7_ERRADDR_ERRADDR2, 2 .EQU ECC7_ERRADDR_ERRADDR1, 1 .EQU ECC7_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC8_CTL, 0x40004C00 // 0x4000 4C00 ECC8_CTL Bits------------------------------------- .EQU ECC8_CTL_MEM2BITERRIC, 14 .EQU ECC8_CTL_MEM1BITERRIC, 13 .EQU ECC8_CTL_MEMERRIC, 12 .EQU ECC8_CTL_MEM2BITERRIE, 10 .EQU ECC8_CTL_MEM1BITERRIE, 9 .EQU ECC8_CTL_MEMERRIE, 8 .EQU ECC8_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC8_INT, 0x40004C04 // 0x4000 4C04 ECC8_INT Bits------------------------------------- .EQU ECC8_INT_MEM2BITERRIF, 2 .EQU ECC8_INT_MEM1BITERRIF, 1 .EQU ECC8_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC8_ERRADDR, 0x40004C08 // 0x4000 4C08 ECC8_ERRADDR Bits------------------------------------- .EQU ECC8_ERRADDR_ERRADDR31, 31 .EQU ECC8_ERRADDR_ERRADDR30, 30 .EQU ECC8_ERRADDR_ERRADDR29, 29 .EQU ECC8_ERRADDR_ERRADDR28, 28 .EQU ECC8_ERRADDR_ERRADDR27, 27 .EQU ECC8_ERRADDR_ERRADDR26, 26 .EQU ECC8_ERRADDR_ERRADDR25, 25 .EQU ECC8_ERRADDR_ERRADDR24, 24 .EQU ECC8_ERRADDR_ERRADDR23, 23 .EQU ECC8_ERRADDR_ERRADDR22, 22 .EQU ECC8_ERRADDR_ERRADDR21, 21 .EQU ECC8_ERRADDR_ERRADDR20, 20 .EQU ECC8_ERRADDR_ERRADDR19, 19 .EQU ECC8_ERRADDR_ERRADDR18, 18 .EQU ECC8_ERRADDR_ERRADDR17, 17 .EQU ECC8_ERRADDR_ERRADDR16, 16 .EQU ECC8_ERRADDR_ERRADDR15, 15 .EQU ECC8_ERRADDR_ERRADDR14, 14 .EQU ECC8_ERRADDR_ERRADDR13, 13 .EQU ECC8_ERRADDR_ERRADDR12, 12 .EQU ECC8_ERRADDR_ERRADDR11, 11 .EQU ECC8_ERRADDR_ERRADDR10, 10 .EQU ECC8_ERRADDR_ERRADDR9, 9 .EQU ECC8_ERRADDR_ERRADDR8, 8 .EQU ECC8_ERRADDR_ERRADDR7, 7 .EQU ECC8_ERRADDR_ERRADDR6, 6 .EQU ECC8_ERRADDR_ERRADDR5, 5 .EQU ECC8_ERRADDR_ERRADDR4, 4 .EQU ECC8_ERRADDR_ERRADDR3, 3 .EQU ECC8_ERRADDR_ERRADDR2, 2 .EQU ECC8_ERRADDR_ERRADDR1, 1 .EQU ECC8_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC9_CTL, 0x40004C80 // 0x4000 4C80 ECC9_CTL Bits------------------------------------- .EQU ECC9_CTL_MEM2BITERRIC, 14 .EQU ECC9_CTL_MEM1BITERRIC, 13 .EQU ECC9_CTL_MEMERRIC, 12 .EQU ECC9_CTL_MEM2BITERRIE, 10 .EQU ECC9_CTL_MEM1BITERRIE, 9 .EQU ECC9_CTL_MEMERRIE, 8 .EQU ECC9_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC9_INT, 0x40004C84 // 0x4000 4C84 ECC9_INT Bits------------------------------------- .EQU ECC9_INT_MEM2BITERRIF, 2 .EQU ECC9_INT_MEM1BITERRIF, 1 .EQU ECC9_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC9_ERRADDR, 0x40004C88 // 0x4000 4C88 ECC9_ERRADDR Bits------------------------------------- .EQU ECC9_ERRADDR_ERRADDR31, 31 .EQU ECC9_ERRADDR_ERRADDR30, 30 .EQU ECC9_ERRADDR_ERRADDR29, 29 .EQU ECC9_ERRADDR_ERRADDR28, 28 .EQU ECC9_ERRADDR_ERRADDR27, 27 .EQU ECC9_ERRADDR_ERRADDR26, 26 .EQU ECC9_ERRADDR_ERRADDR25, 25 .EQU ECC9_ERRADDR_ERRADDR24, 24 .EQU ECC9_ERRADDR_ERRADDR23, 23 .EQU ECC9_ERRADDR_ERRADDR22, 22 .EQU ECC9_ERRADDR_ERRADDR21, 21 .EQU ECC9_ERRADDR_ERRADDR20, 20 .EQU ECC9_ERRADDR_ERRADDR19, 19 .EQU ECC9_ERRADDR_ERRADDR18, 18 .EQU ECC9_ERRADDR_ERRADDR17, 17 .EQU ECC9_ERRADDR_ERRADDR16, 16 .EQU ECC9_ERRADDR_ERRADDR15, 15 .EQU ECC9_ERRADDR_ERRADDR14, 14 .EQU ECC9_ERRADDR_ERRADDR13, 13 .EQU ECC9_ERRADDR_ERRADDR12, 12 .EQU ECC9_ERRADDR_ERRADDR11, 11 .EQU ECC9_ERRADDR_ERRADDR10, 10 .EQU ECC9_ERRADDR_ERRADDR9, 9 .EQU ECC9_ERRADDR_ERRADDR8, 8 .EQU ECC9_ERRADDR_ERRADDR7, 7 .EQU ECC9_ERRADDR_ERRADDR6, 6 .EQU ECC9_ERRADDR_ERRADDR5, 5 .EQU ECC9_ERRADDR_ERRADDR4, 4 .EQU ECC9_ERRADDR_ERRADDR3, 3 .EQU ECC9_ERRADDR_ERRADDR2, 2 .EQU ECC9_ERRADDR_ERRADDR1, 1 .EQU ECC9_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC10_CTL, 0x40004D00 // 0x4000 4D00 ECC10_CTL Bits------------------------------------- .EQU ECC10_CTL_MEM2BITERRIC, 14 .EQU ECC10_CTL_MEM1BITERRIC, 13 .EQU ECC10_CTL_MEMERRIC, 12 .EQU ECC10_CTL_MEM2BITERRIE, 10 .EQU ECC10_CTL_MEM1BITERRIE, 9 .EQU ECC10_CTL_MEMERRIE, 8 .EQU ECC10_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC10_INT, 0x40004D04 // 0x4000 4D04 ECC10_INT Bits------------------------------------- .EQU ECC10_INT_MEM2BITERRIF, 2 .EQU ECC10_INT_MEM1BITERRIF, 1 .EQU ECC10_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC10_ERRADDR, 0x40004D08 // 0x4000 4D08 ECC10_ERRADDR Bits------------------------------------- .EQU ECC10_ERRADDR_ERRADDR31, 31 .EQU ECC10_ERRADDR_ERRADDR30, 30 .EQU ECC10_ERRADDR_ERRADDR29, 29 .EQU ECC10_ERRADDR_ERRADDR28, 28 .EQU ECC10_ERRADDR_ERRADDR27, 27 .EQU ECC10_ERRADDR_ERRADDR26, 26 .EQU ECC10_ERRADDR_ERRADDR25, 25 .EQU ECC10_ERRADDR_ERRADDR24, 24 .EQU ECC10_ERRADDR_ERRADDR23, 23 .EQU ECC10_ERRADDR_ERRADDR22, 22 .EQU ECC10_ERRADDR_ERRADDR21, 21 .EQU ECC10_ERRADDR_ERRADDR20, 20 .EQU ECC10_ERRADDR_ERRADDR19, 19 .EQU ECC10_ERRADDR_ERRADDR18, 18 .EQU ECC10_ERRADDR_ERRADDR17, 17 .EQU ECC10_ERRADDR_ERRADDR16, 16 .EQU ECC10_ERRADDR_ERRADDR15, 15 .EQU ECC10_ERRADDR_ERRADDR14, 14 .EQU ECC10_ERRADDR_ERRADDR13, 13 .EQU ECC10_ERRADDR_ERRADDR12, 12 .EQU ECC10_ERRADDR_ERRADDR11, 11 .EQU ECC10_ERRADDR_ERRADDR10, 10 .EQU ECC10_ERRADDR_ERRADDR9, 9 .EQU ECC10_ERRADDR_ERRADDR8, 8 .EQU ECC10_ERRADDR_ERRADDR7, 7 .EQU ECC10_ERRADDR_ERRADDR6, 6 .EQU ECC10_ERRADDR_ERRADDR5, 5 .EQU ECC10_ERRADDR_ERRADDR4, 4 .EQU ECC10_ERRADDR_ERRADDR3, 3 .EQU ECC10_ERRADDR_ERRADDR2, 2 .EQU ECC10_ERRADDR_ERRADDR1, 1 .EQU ECC10_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC11_CTL, 0x40004D80 // 0x4000 4D80 ECC11_CTL Bits------------------------------------- .EQU ECC11_CTL_MEM2BITERRIC, 14 .EQU ECC11_CTL_MEM1BITERRIC, 13 .EQU ECC11_CTL_MEMERRIC, 12 .EQU ECC11_CTL_MEM2BITERRIE, 10 .EQU ECC11_CTL_MEM1BITERRIE, 9 .EQU ECC11_CTL_MEMERRIE, 8 .EQU ECC11_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC11_INT, 0x40004D84 // 0x4000 4D84 ECC11_INT Bits------------------------------------- .EQU ECC11_INT_MEM2BITERRIF, 2 .EQU ECC11_INT_MEM1BITERRIF, 1 .EQU ECC11_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC11_ERRADDR, 0x40004D88 // 0x4000 4D88 ECC11_ERRADDR Bits------------------------------------- .EQU ECC11_ERRADDR_ERRADDR31, 31 .EQU ECC11_ERRADDR_ERRADDR30, 30 .EQU ECC11_ERRADDR_ERRADDR29, 29 .EQU ECC11_ERRADDR_ERRADDR28, 28 .EQU ECC11_ERRADDR_ERRADDR27, 27 .EQU ECC11_ERRADDR_ERRADDR26, 26 .EQU ECC11_ERRADDR_ERRADDR25, 25 .EQU ECC11_ERRADDR_ERRADDR24, 24 .EQU ECC11_ERRADDR_ERRADDR23, 23 .EQU ECC11_ERRADDR_ERRADDR22, 22 .EQU ECC11_ERRADDR_ERRADDR21, 21 .EQU ECC11_ERRADDR_ERRADDR20, 20 .EQU ECC11_ERRADDR_ERRADDR19, 19 .EQU ECC11_ERRADDR_ERRADDR18, 18 .EQU ECC11_ERRADDR_ERRADDR17, 17 .EQU ECC11_ERRADDR_ERRADDR16, 16 .EQU ECC11_ERRADDR_ERRADDR15, 15 .EQU ECC11_ERRADDR_ERRADDR14, 14 .EQU ECC11_ERRADDR_ERRADDR13, 13 .EQU ECC11_ERRADDR_ERRADDR12, 12 .EQU ECC11_ERRADDR_ERRADDR11, 11 .EQU ECC11_ERRADDR_ERRADDR10, 10 .EQU ECC11_ERRADDR_ERRADDR9, 9 .EQU ECC11_ERRADDR_ERRADDR8, 8 .EQU ECC11_ERRADDR_ERRADDR7, 7 .EQU ECC11_ERRADDR_ERRADDR6, 6 .EQU ECC11_ERRADDR_ERRADDR5, 5 .EQU ECC11_ERRADDR_ERRADDR4, 4 .EQU ECC11_ERRADDR_ERRADDR3, 3 .EQU ECC11_ERRADDR_ERRADDR2, 2 .EQU ECC11_ERRADDR_ERRADDR1, 1 .EQU ECC11_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC12_CTL, 0x40004E00 // 0x4000 4E00 ECC12_CTL Bits------------------------------------- .EQU ECC12_CTL_MEM2BITERRIC, 14 .EQU ECC12_CTL_MEM1BITERRIC, 13 .EQU ECC12_CTL_MEMERRIC, 12 .EQU ECC12_CTL_MEM2BITERRIE, 10 .EQU ECC12_CTL_MEM1BITERRIE, 9 .EQU ECC12_CTL_MEMERRIE, 8 .EQU ECC12_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC12_INT, 0x40004E04 // 0x4000 4E04 ECC12_INT Bits------------------------------------- .EQU ECC12_INT_MEM2BITERRIF, 2 .EQU ECC12_INT_MEM1BITERRIF, 1 .EQU ECC12_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC12_ERRADDR, 0x40004E08 // 0x4000 4E08 ECC12_ERRADDR Bits------------------------------------- .EQU ECC12_ERRADDR_ERRADDR31, 31 .EQU ECC12_ERRADDR_ERRADDR30, 30 .EQU ECC12_ERRADDR_ERRADDR29, 29 .EQU ECC12_ERRADDR_ERRADDR28, 28 .EQU ECC12_ERRADDR_ERRADDR27, 27 .EQU ECC12_ERRADDR_ERRADDR26, 26 .EQU ECC12_ERRADDR_ERRADDR25, 25 .EQU ECC12_ERRADDR_ERRADDR24, 24 .EQU ECC12_ERRADDR_ERRADDR23, 23 .EQU ECC12_ERRADDR_ERRADDR22, 22 .EQU ECC12_ERRADDR_ERRADDR21, 21 .EQU ECC12_ERRADDR_ERRADDR20, 20 .EQU ECC12_ERRADDR_ERRADDR19, 19 .EQU ECC12_ERRADDR_ERRADDR18, 18 .EQU ECC12_ERRADDR_ERRADDR17, 17 .EQU ECC12_ERRADDR_ERRADDR16, 16 .EQU ECC12_ERRADDR_ERRADDR15, 15 .EQU ECC12_ERRADDR_ERRADDR14, 14 .EQU ECC12_ERRADDR_ERRADDR13, 13 .EQU ECC12_ERRADDR_ERRADDR12, 12 .EQU ECC12_ERRADDR_ERRADDR11, 11 .EQU ECC12_ERRADDR_ERRADDR10, 10 .EQU ECC12_ERRADDR_ERRADDR9, 9 .EQU ECC12_ERRADDR_ERRADDR8, 8 .EQU ECC12_ERRADDR_ERRADDR7, 7 .EQU ECC12_ERRADDR_ERRADDR6, 6 .EQU ECC12_ERRADDR_ERRADDR5, 5 .EQU ECC12_ERRADDR_ERRADDR4, 4 .EQU ECC12_ERRADDR_ERRADDR3, 3 .EQU ECC12_ERRADDR_ERRADDR2, 2 .EQU ECC12_ERRADDR_ERRADDR1, 1 .EQU ECC12_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC14_CTL, 0x40004E80 // 0x4000 4E80 ECC14_CTL Bits------------------------------------- .EQU ECC14_CTL_MEM2BITERRIC, 14 .EQU ECC14_CTL_MEM1BITERRIC, 13 .EQU ECC14_CTL_MEMERRIC, 12 .EQU ECC14_CTL_MEM2BITERRIE, 10 .EQU ECC14_CTL_MEM1BITERRIE, 9 .EQU ECC14_CTL_MEMERRIE, 8 .EQU ECC14_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC14_INT, 0x40004E84 // 0x4000 4E84 ECC14_INT Bits------------------------------------- .EQU ECC14_INT_MEM2BITERRIF, 2 .EQU ECC14_INT_MEM1BITERRIF, 1 .EQU ECC14_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC14_ERRADDR, 0x40004E88 // 0x4000 4E88 ECC14_ERRADDR Bits------------------------------------- .EQU ECC14_ERRADDR_ERRADDR31, 31 .EQU ECC14_ERRADDR_ERRADDR30, 30 .EQU ECC14_ERRADDR_ERRADDR29, 29 .EQU ECC14_ERRADDR_ERRADDR28, 28 .EQU ECC14_ERRADDR_ERRADDR27, 27 .EQU ECC14_ERRADDR_ERRADDR26, 26 .EQU ECC14_ERRADDR_ERRADDR25, 25 .EQU ECC14_ERRADDR_ERRADDR24, 24 .EQU ECC14_ERRADDR_ERRADDR23, 23 .EQU ECC14_ERRADDR_ERRADDR22, 22 .EQU ECC14_ERRADDR_ERRADDR21, 21 .EQU ECC14_ERRADDR_ERRADDR20, 20 .EQU ECC14_ERRADDR_ERRADDR19, 19 .EQU ECC14_ERRADDR_ERRADDR18, 18 .EQU ECC14_ERRADDR_ERRADDR17, 17 .EQU ECC14_ERRADDR_ERRADDR16, 16 .EQU ECC14_ERRADDR_ERRADDR15, 15 .EQU ECC14_ERRADDR_ERRADDR14, 14 .EQU ECC14_ERRADDR_ERRADDR13, 13 .EQU ECC14_ERRADDR_ERRADDR12, 12 .EQU ECC14_ERRADDR_ERRADDR11, 11 .EQU ECC14_ERRADDR_ERRADDR10, 10 .EQU ECC14_ERRADDR_ERRADDR9, 9 .EQU ECC14_ERRADDR_ERRADDR8, 8 .EQU ECC14_ERRADDR_ERRADDR7, 7 .EQU ECC14_ERRADDR_ERRADDR6, 6 .EQU ECC14_ERRADDR_ERRADDR5, 5 .EQU ECC14_ERRADDR_ERRADDR4, 4 .EQU ECC14_ERRADDR_ERRADDR3, 3 .EQU ECC14_ERRADDR_ERRADDR2, 2 .EQU ECC14_ERRADDR_ERRADDR1, 1 .EQU ECC14_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC0_CTL, 0x40004F00 // 0x4000 4F00 ECC0_CTL Bits------------------------------------- .EQU ECC0_CTL_MEM2BITERRIC, 14 .EQU ECC0_CTL_MEM1BITERRIC, 13 .EQU ECC0_CTL_MEMERRIC, 12 .EQU ECC0_CTL_MEM2BITERRIE, 10 .EQU ECC0_CTL_MEM1BITERRIE, 9 .EQU ECC0_CTL_MEMERRIE, 8 .EQU ECC0_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC0_INT, 0x40004F04 // 0x4000 4F04 ECC0_INT Bits------------------------------------- .EQU ECC0_INT_MEM2BITERRIF, 2 .EQU ECC0_INT_MEM1BITERRIF, 1 .EQU ECC0_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC0_ERRADDR, 0x40004F08 // 0x4000 4F08 ECC0_ERRADDR Bits------------------------------------- .EQU ECC0_ERRADDR_ERRADDR31, 31 .EQU ECC0_ERRADDR_ERRADDR30, 30 .EQU ECC0_ERRADDR_ERRADDR29, 29 .EQU ECC0_ERRADDR_ERRADDR28, 28 .EQU ECC0_ERRADDR_ERRADDR27, 27 .EQU ECC0_ERRADDR_ERRADDR26, 26 .EQU ECC0_ERRADDR_ERRADDR25, 25 .EQU ECC0_ERRADDR_ERRADDR24, 24 .EQU ECC0_ERRADDR_ERRADDR23, 23 .EQU ECC0_ERRADDR_ERRADDR22, 22 .EQU ECC0_ERRADDR_ERRADDR21, 21 .EQU ECC0_ERRADDR_ERRADDR20, 20 .EQU ECC0_ERRADDR_ERRADDR19, 19 .EQU ECC0_ERRADDR_ERRADDR18, 18 .EQU ECC0_ERRADDR_ERRADDR17, 17 .EQU ECC0_ERRADDR_ERRADDR16, 16 .EQU ECC0_ERRADDR_ERRADDR15, 15 .EQU ECC0_ERRADDR_ERRADDR14, 14 .EQU ECC0_ERRADDR_ERRADDR13, 13 .EQU ECC0_ERRADDR_ERRADDR12, 12 .EQU ECC0_ERRADDR_ERRADDR11, 11 .EQU ECC0_ERRADDR_ERRADDR10, 10 .EQU ECC0_ERRADDR_ERRADDR9, 9 .EQU ECC0_ERRADDR_ERRADDR8, 8 .EQU ECC0_ERRADDR_ERRADDR7, 7 .EQU ECC0_ERRADDR_ERRADDR6, 6 .EQU ECC0_ERRADDR_ERRADDR5, 5 .EQU ECC0_ERRADDR_ERRADDR4, 4 .EQU ECC0_ERRADDR_ERRADDR3, 3 .EQU ECC0_ERRADDR_ERRADDR2, 2 .EQU ECC0_ERRADDR_ERRADDR1, 1 .EQU ECC0_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC0_EBR0, 0x40004F10 // 0x4000 4F10 ECC0_EBR0 Bits------------------------------------- .EQU ECC0_EBR0_ERRIBTEN31, 31 .EQU ECC0_EBR0_ERRIBTEN30, 30 .EQU ECC0_EBR0_ERRIBTEN29, 29 .EQU ECC0_EBR0_ERRIBTEN28, 28 .EQU ECC0_EBR0_ERRIBTEN27, 27 .EQU ECC0_EBR0_ERRIBTEN26, 26 .EQU ECC0_EBR0_ERRIBTEN25, 25 .EQU ECC0_EBR0_ERRIBTEN24, 24 .EQU ECC0_EBR0_ERRIBTEN23, 23 .EQU ECC0_EBR0_ERRIBTEN22, 22 .EQU ECC0_EBR0_ERRIBTEN21, 21 .EQU ECC0_EBR0_ERRIBTEN20, 20 .EQU ECC0_EBR0_ERRIBTEN19, 19 .EQU ECC0_EBR0_ERRIBTEN18, 18 .EQU ECC0_EBR0_ERRIBTEN17, 17 .EQU ECC0_EBR0_ERRIBTEN16, 16 .EQU ECC0_EBR0_ERRIBTEN15, 15 .EQU ECC0_EBR0_ERRIBTEN14, 14 .EQU ECC0_EBR0_ERRIBTEN13, 13 .EQU ECC0_EBR0_ERRIBTEN12, 12 .EQU ECC0_EBR0_ERRIBTEN11, 11 .EQU ECC0_EBR0_ERRIBTEN10, 10 .EQU ECC0_EBR0_ERRIBTEN9, 9 .EQU ECC0_EBR0_ERRIBTEN8, 8 .EQU ECC0_EBR0_ERRIBTEN7, 7 .EQU ECC0_EBR0_ERRIBTEN6, 6 .EQU ECC0_EBR0_ERRIBTEN5, 5 .EQU ECC0_EBR0_ERRIBTEN4, 4 .EQU ECC0_EBR0_ERRIBTEN3, 3 .EQU ECC0_EBR0_ERRIBTEN2, 2 .EQU ECC0_EBR0_ERRIBTEN1, 1 .EQU ECC0_EBR0_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC0_EBR1, 0x40004F14 // 0x4000 4F14 ECC0_EBR1 Bits------------------------------------- .EQU ECC0_EBR1_ERRIBTEN31, 31 .EQU ECC0_EBR1_ERRIBTEN30, 30 .EQU ECC0_EBR1_ERRIBTEN29, 29 .EQU ECC0_EBR1_ERRIBTEN28, 28 .EQU ECC0_EBR1_ERRIBTEN27, 27 .EQU ECC0_EBR1_ERRIBTEN26, 26 .EQU ECC0_EBR1_ERRIBTEN25, 25 .EQU ECC0_EBR1_ERRIBTEN24, 24 .EQU ECC0_EBR1_ERRIBTEN23, 23 .EQU ECC0_EBR1_ERRIBTEN22, 22 .EQU ECC0_EBR1_ERRIBTEN21, 21 .EQU ECC0_EBR1_ERRIBTEN20, 20 .EQU ECC0_EBR1_ERRIBTEN19, 19 .EQU ECC0_EBR1_ERRIBTEN18, 18 .EQU ECC0_EBR1_ERRIBTEN17, 17 .EQU ECC0_EBR1_ERRIBTEN16, 16 .EQU ECC0_EBR1_ERRIBTEN15, 15 .EQU ECC0_EBR1_ERRIBTEN14, 14 .EQU ECC0_EBR1_ERRIBTEN13, 13 .EQU ECC0_EBR1_ERRIBTEN12, 12 .EQU ECC0_EBR1_ERRIBTEN11, 11 .EQU ECC0_EBR1_ERRIBTEN10, 10 .EQU ECC0_EBR1_ERRIBTEN9, 9 .EQU ECC0_EBR1_ERRIBTEN8, 8 .EQU ECC0_EBR1_ERRIBTEN7, 7 .EQU ECC0_EBR1_ERRIBTEN6, 6 .EQU ECC0_EBR1_ERRIBTEN5, 5 .EQU ECC0_EBR1_ERRIBTEN4, 4 .EQU ECC0_EBR1_ERRIBTEN3, 3 .EQU ECC0_EBR1_ERRIBTEN2, 2 .EQU ECC0_EBR1_ERRIBTEN1, 1 .EQU ECC0_EBR1_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC0_EBR2, 0x40004F18 // 0x4000 4F18 ECC0_EBR2 Bits------------------------------------- .EQU ECC0_EBR2_ERRBITEN7, 7 .EQU ECC0_EBR2_ERRBITEN6, 6 .EQU ECC0_EBR2_ERRBITEN5, 5 .EQU ECC0_EBR2_ERRBITEN4, 4 .EQU ECC0_EBR2_ERRBITEN3, 3 .EQU ECC0_EBR2_ERRBITEN2, 2 .EQU ECC0_EBR2_ERRBITEN1, 1 .EQU ECC0_EBR2_ERRBITEN0, 0 // register------------------------------------- .EQU ECC1_CTL, 0x40004F80 // 0x4000 4F80 ECC1_CTL Bits------------------------------------- .EQU ECC1_CTL_MEM2BITERRIC, 14 .EQU ECC1_CTL_MEM1BITERRIC, 13 .EQU ECC1_CTL_MEMERRIC, 12 .EQU ECC1_CTL_MEM2BITERRIE, 10 .EQU ECC1_CTL_MEM1BITERRIE, 9 .EQU ECC1_CTL_MEMERRIE, 8 .EQU ECC1_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC1_INT, 0x40004F84 // 0x4000 4F84 ECC1_INT Bits------------------------------------- .EQU ECC1_INT_MEM2BITERRIF, 2 .EQU ECC1_INT_MEM1BITERRIF, 1 .EQU ECC1_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC1_ERRADDR, 0x40004F88 // 0x4000 4F88 ECC1_ERRADDR Bits------------------------------------- .EQU ECC1_ERRADDR_ERRADDR31, 31 .EQU ECC1_ERRADDR_ERRADDR30, 30 .EQU ECC1_ERRADDR_ERRADDR29, 29 .EQU ECC1_ERRADDR_ERRADDR28, 28 .EQU ECC1_ERRADDR_ERRADDR27, 27 .EQU ECC1_ERRADDR_ERRADDR26, 26 .EQU ECC1_ERRADDR_ERRADDR25, 25 .EQU ECC1_ERRADDR_ERRADDR24, 24 .EQU ECC1_ERRADDR_ERRADDR23, 23 .EQU ECC1_ERRADDR_ERRADDR22, 22 .EQU ECC1_ERRADDR_ERRADDR21, 21 .EQU ECC1_ERRADDR_ERRADDR20, 20 .EQU ECC1_ERRADDR_ERRADDR19, 19 .EQU ECC1_ERRADDR_ERRADDR18, 18 .EQU ECC1_ERRADDR_ERRADDR17, 17 .EQU ECC1_ERRADDR_ERRADDR16, 16 .EQU ECC1_ERRADDR_ERRADDR15, 15 .EQU ECC1_ERRADDR_ERRADDR14, 14 .EQU ECC1_ERRADDR_ERRADDR13, 13 .EQU ECC1_ERRADDR_ERRADDR12, 12 .EQU ECC1_ERRADDR_ERRADDR11, 11 .EQU ECC1_ERRADDR_ERRADDR10, 10 .EQU ECC1_ERRADDR_ERRADDR9, 9 .EQU ECC1_ERRADDR_ERRADDR8, 8 .EQU ECC1_ERRADDR_ERRADDR7, 7 .EQU ECC1_ERRADDR_ERRADDR6, 6 .EQU ECC1_ERRADDR_ERRADDR5, 5 .EQU ECC1_ERRADDR_ERRADDR4, 4 .EQU ECC1_ERRADDR_ERRADDR3, 3 .EQU ECC1_ERRADDR_ERRADDR2, 2 .EQU ECC1_ERRADDR_ERRADDR1, 1 .EQU ECC1_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC1_EBR0, 0x40004F90 // 0x4000 4F90 ECC1_EBR0 Bits------------------------------------- .EQU ECC1_EBR0_ERRIBTEN31, 31 .EQU ECC1_EBR0_ERRIBTEN30, 30 .EQU ECC1_EBR0_ERRIBTEN29, 29 .EQU ECC1_EBR0_ERRIBTEN28, 28 .EQU ECC1_EBR0_ERRIBTEN27, 27 .EQU ECC1_EBR0_ERRIBTEN26, 26 .EQU ECC1_EBR0_ERRIBTEN25, 25 .EQU ECC1_EBR0_ERRIBTEN24, 24 .EQU ECC1_EBR0_ERRIBTEN23, 23 .EQU ECC1_EBR0_ERRIBTEN22, 22 .EQU ECC1_EBR0_ERRIBTEN21, 21 .EQU ECC1_EBR0_ERRIBTEN20, 20 .EQU ECC1_EBR0_ERRIBTEN19, 19 .EQU ECC1_EBR0_ERRIBTEN18, 18 .EQU ECC1_EBR0_ERRIBTEN17, 17 .EQU ECC1_EBR0_ERRIBTEN16, 16 .EQU ECC1_EBR0_ERRIBTEN15, 15 .EQU ECC1_EBR0_ERRIBTEN14, 14 .EQU ECC1_EBR0_ERRIBTEN13, 13 .EQU ECC1_EBR0_ERRIBTEN12, 12 .EQU ECC1_EBR0_ERRIBTEN11, 11 .EQU ECC1_EBR0_ERRIBTEN10, 10 .EQU ECC1_EBR0_ERRIBTEN9, 9 .EQU ECC1_EBR0_ERRIBTEN8, 8 .EQU ECC1_EBR0_ERRIBTEN7, 7 .EQU ECC1_EBR0_ERRIBTEN6, 6 .EQU ECC1_EBR0_ERRIBTEN5, 5 .EQU ECC1_EBR0_ERRIBTEN4, 4 .EQU ECC1_EBR0_ERRIBTEN3, 3 .EQU ECC1_EBR0_ERRIBTEN2, 2 .EQU ECC1_EBR0_ERRIBTEN1, 1 .EQU ECC1_EBR0_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC1_EBR1, 0x40004F94 // 0x4000 4F94 ECC1_EBR1 Bits------------------------------------- .EQU ECC1_EBR1_ERRIBTEN31, 31 .EQU ECC1_EBR1_ERRIBTEN30, 30 .EQU ECC1_EBR1_ERRIBTEN29, 29 .EQU ECC1_EBR1_ERRIBTEN28, 28 .EQU ECC1_EBR1_ERRIBTEN27, 27 .EQU ECC1_EBR1_ERRIBTEN26, 26 .EQU ECC1_EBR1_ERRIBTEN25, 25 .EQU ECC1_EBR1_ERRIBTEN24, 24 .EQU ECC1_EBR1_ERRIBTEN23, 23 .EQU ECC1_EBR1_ERRIBTEN22, 22 .EQU ECC1_EBR1_ERRIBTEN21, 21 .EQU ECC1_EBR1_ERRIBTEN20, 20 .EQU ECC1_EBR1_ERRIBTEN19, 19 .EQU ECC1_EBR1_ERRIBTEN18, 18 .EQU ECC1_EBR1_ERRIBTEN17, 17 .EQU ECC1_EBR1_ERRIBTEN16, 16 .EQU ECC1_EBR1_ERRIBTEN15, 15 .EQU ECC1_EBR1_ERRIBTEN14, 14 .EQU ECC1_EBR1_ERRIBTEN13, 13 .EQU ECC1_EBR1_ERRIBTEN12, 12 .EQU ECC1_EBR1_ERRIBTEN11, 11 .EQU ECC1_EBR1_ERRIBTEN10, 10 .EQU ECC1_EBR1_ERRIBTEN9, 9 .EQU ECC1_EBR1_ERRIBTEN8, 8 .EQU ECC1_EBR1_ERRIBTEN7, 7 .EQU ECC1_EBR1_ERRIBTEN6, 6 .EQU ECC1_EBR1_ERRIBTEN5, 5 .EQU ECC1_EBR1_ERRIBTEN4, 4 .EQU ECC1_EBR1_ERRIBTEN3, 3 .EQU ECC1_EBR1_ERRIBTEN2, 2 .EQU ECC1_EBR1_ERRIBTEN1, 1 .EQU ECC1_EBR1_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC1_EBR2, 0x40004F98 // 0x4000 4F98 ECC1_EBR2 Bits------------------------------------- .EQU ECC1_EBR2_ERRBITEN7, 7 .EQU ECC1_EBR2_ERRBITEN6, 6 .EQU ECC1_EBR2_ERRBITEN5, 5 .EQU ECC1_EBR2_ERRBITEN4, 4 .EQU ECC1_EBR2_ERRBITEN3, 3 .EQU ECC1_EBR2_ERRBITEN2, 2 .EQU ECC1_EBR2_ERRBITEN1, 1 .EQU ECC1_EBR2_ERRBITEN0, 0 // register------------------------------------- .EQU ECC2_CTL, 0x40005000 // 0x4000 5000 ECC2_CTL Bits------------------------------------- .EQU ECC2_CTL_MEM2BITERRIC, 14 .EQU ECC2_CTL_MEM1BITERRIC, 13 .EQU ECC2_CTL_MEMERRIC, 12 .EQU ECC2_CTL_MEM2BITERRIE, 10 .EQU ECC2_CTL_MEM1BITERRIE, 9 .EQU ECC2_CTL_MEMERRIE, 8 .EQU ECC2_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC2_INT, 0x40005004 // 0x4000 5004 ECC2_INT Bits------------------------------------- .EQU ECC2_INT_MEM2BITERRIF, 2 .EQU ECC2_INT_MEM1BITERRIF, 1 .EQU ECC2_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC2_ERRADDR, 0x40005008 // 0x4000 5008 ECC2_ERRADDR Bits------------------------------------- .EQU ECC2_ERRADDR_ERRADDR31, 31 .EQU ECC2_ERRADDR_ERRADDR30, 30 .EQU ECC2_ERRADDR_ERRADDR29, 29 .EQU ECC2_ERRADDR_ERRADDR28, 28 .EQU ECC2_ERRADDR_ERRADDR27, 27 .EQU ECC2_ERRADDR_ERRADDR26, 26 .EQU ECC2_ERRADDR_ERRADDR25, 25 .EQU ECC2_ERRADDR_ERRADDR24, 24 .EQU ECC2_ERRADDR_ERRADDR23, 23 .EQU ECC2_ERRADDR_ERRADDR22, 22 .EQU ECC2_ERRADDR_ERRADDR21, 21 .EQU ECC2_ERRADDR_ERRADDR20, 20 .EQU ECC2_ERRADDR_ERRADDR19, 19 .EQU ECC2_ERRADDR_ERRADDR18, 18 .EQU ECC2_ERRADDR_ERRADDR17, 17 .EQU ECC2_ERRADDR_ERRADDR16, 16 .EQU ECC2_ERRADDR_ERRADDR15, 15 .EQU ECC2_ERRADDR_ERRADDR14, 14 .EQU ECC2_ERRADDR_ERRADDR13, 13 .EQU ECC2_ERRADDR_ERRADDR12, 12 .EQU ECC2_ERRADDR_ERRADDR11, 11 .EQU ECC2_ERRADDR_ERRADDR10, 10 .EQU ECC2_ERRADDR_ERRADDR9, 9 .EQU ECC2_ERRADDR_ERRADDR8, 8 .EQU ECC2_ERRADDR_ERRADDR7, 7 .EQU ECC2_ERRADDR_ERRADDR6, 6 .EQU ECC2_ERRADDR_ERRADDR5, 5 .EQU ECC2_ERRADDR_ERRADDR4, 4 .EQU ECC2_ERRADDR_ERRADDR3, 3 .EQU ECC2_ERRADDR_ERRADDR2, 2 .EQU ECC2_ERRADDR_ERRADDR1, 1 .EQU ECC2_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC2_EBR0, 0x40005010 // 0x4000 5010 ECC2_EBR0 Bits------------------------------------- .EQU ECC2_EBR0_ERRIBTEN31, 31 .EQU ECC2_EBR0_ERRIBTEN30, 30 .EQU ECC2_EBR0_ERRIBTEN29, 29 .EQU ECC2_EBR0_ERRIBTEN28, 28 .EQU ECC2_EBR0_ERRIBTEN27, 27 .EQU ECC2_EBR0_ERRIBTEN26, 26 .EQU ECC2_EBR0_ERRIBTEN25, 25 .EQU ECC2_EBR0_ERRIBTEN24, 24 .EQU ECC2_EBR0_ERRIBTEN23, 23 .EQU ECC2_EBR0_ERRIBTEN22, 22 .EQU ECC2_EBR0_ERRIBTEN21, 21 .EQU ECC2_EBR0_ERRIBTEN20, 20 .EQU ECC2_EBR0_ERRIBTEN19, 19 .EQU ECC2_EBR0_ERRIBTEN18, 18 .EQU ECC2_EBR0_ERRIBTEN17, 17 .EQU ECC2_EBR0_ERRIBTEN16, 16 .EQU ECC2_EBR0_ERRIBTEN15, 15 .EQU ECC2_EBR0_ERRIBTEN14, 14 .EQU ECC2_EBR0_ERRIBTEN13, 13 .EQU ECC2_EBR0_ERRIBTEN12, 12 .EQU ECC2_EBR0_ERRIBTEN11, 11 .EQU ECC2_EBR0_ERRIBTEN10, 10 .EQU ECC2_EBR0_ERRIBTEN9, 9 .EQU ECC2_EBR0_ERRIBTEN8, 8 .EQU ECC2_EBR0_ERRIBTEN7, 7 .EQU ECC2_EBR0_ERRIBTEN6, 6 .EQU ECC2_EBR0_ERRIBTEN5, 5 .EQU ECC2_EBR0_ERRIBTEN4, 4 .EQU ECC2_EBR0_ERRIBTEN3, 3 .EQU ECC2_EBR0_ERRIBTEN2, 2 .EQU ECC2_EBR0_ERRIBTEN1, 1 .EQU ECC2_EBR0_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC2_EBR1, 0x40005014 // 0x4000 5014 ECC2_EBR1 Bits------------------------------------- .EQU ECC2_EBR1_ERRIBTEN31, 31 .EQU ECC2_EBR1_ERRIBTEN30, 30 .EQU ECC2_EBR1_ERRIBTEN29, 29 .EQU ECC2_EBR1_ERRIBTEN28, 28 .EQU ECC2_EBR1_ERRIBTEN27, 27 .EQU ECC2_EBR1_ERRIBTEN26, 26 .EQU ECC2_EBR1_ERRIBTEN25, 25 .EQU ECC2_EBR1_ERRIBTEN24, 24 .EQU ECC2_EBR1_ERRIBTEN23, 23 .EQU ECC2_EBR1_ERRIBTEN22, 22 .EQU ECC2_EBR1_ERRIBTEN21, 21 .EQU ECC2_EBR1_ERRIBTEN20, 20 .EQU ECC2_EBR1_ERRIBTEN19, 19 .EQU ECC2_EBR1_ERRIBTEN18, 18 .EQU ECC2_EBR1_ERRIBTEN17, 17 .EQU ECC2_EBR1_ERRIBTEN16, 16 .EQU ECC2_EBR1_ERRIBTEN15, 15 .EQU ECC2_EBR1_ERRIBTEN14, 14 .EQU ECC2_EBR1_ERRIBTEN13, 13 .EQU ECC2_EBR1_ERRIBTEN12, 12 .EQU ECC2_EBR1_ERRIBTEN11, 11 .EQU ECC2_EBR1_ERRIBTEN10, 10 .EQU ECC2_EBR1_ERRIBTEN9, 9 .EQU ECC2_EBR1_ERRIBTEN8, 8 .EQU ECC2_EBR1_ERRIBTEN7, 7 .EQU ECC2_EBR1_ERRIBTEN6, 6 .EQU ECC2_EBR1_ERRIBTEN5, 5 .EQU ECC2_EBR1_ERRIBTEN4, 4 .EQU ECC2_EBR1_ERRIBTEN3, 3 .EQU ECC2_EBR1_ERRIBTEN2, 2 .EQU ECC2_EBR1_ERRIBTEN1, 1 .EQU ECC2_EBR1_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC2_EBR2, 0x40005018 // 0x4000 5018 ECC2_EBR2 Bits------------------------------------- .EQU ECC2_EBR2_ERRBITEN7, 7 .EQU ECC2_EBR2_ERRBITEN6, 6 .EQU ECC2_EBR2_ERRBITEN5, 5 .EQU ECC2_EBR2_ERRBITEN4, 4 .EQU ECC2_EBR2_ERRBITEN3, 3 .EQU ECC2_EBR2_ERRBITEN2, 2 .EQU ECC2_EBR2_ERRBITEN1, 1 .EQU ECC2_EBR2_ERRBITEN0, 0 // register------------------------------------- .EQU ECC3_CTL, 0x40005080 // 0x4000 5080 ECC3_CTL Bits------------------------------------- .EQU ECC3_CTL_MEM2BITERRIC, 14 .EQU ECC3_CTL_MEM1BITERRIC, 13 .EQU ECC3_CTL_MEMERRIC, 12 .EQU ECC3_CTL_MEM2BITERRIE, 10 .EQU ECC3_CTL_MEM1BITERRIE, 9 .EQU ECC3_CTL_MEMERRIE, 8 .EQU ECC3_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC3_INT, 0x40005084 // 0x4000 5084 ECC3_INT Bits------------------------------------- .EQU ECC3_INT_MEM2BITERRIF, 2 .EQU ECC3_INT_MEM1BITERRIF, 1 .EQU ECC3_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC3_ERRADDR, 0x40005088 // 0x4000 5088 ECC3_ERRADDR Bits------------------------------------- .EQU ECC3_ERRADDR_ERRADDR31, 31 .EQU ECC3_ERRADDR_ERRADDR30, 30 .EQU ECC3_ERRADDR_ERRADDR29, 29 .EQU ECC3_ERRADDR_ERRADDR28, 28 .EQU ECC3_ERRADDR_ERRADDR27, 27 .EQU ECC3_ERRADDR_ERRADDR26, 26 .EQU ECC3_ERRADDR_ERRADDR25, 25 .EQU ECC3_ERRADDR_ERRADDR24, 24 .EQU ECC3_ERRADDR_ERRADDR23, 23 .EQU ECC3_ERRADDR_ERRADDR22, 22 .EQU ECC3_ERRADDR_ERRADDR21, 21 .EQU ECC3_ERRADDR_ERRADDR20, 20 .EQU ECC3_ERRADDR_ERRADDR19, 19 .EQU ECC3_ERRADDR_ERRADDR18, 18 .EQU ECC3_ERRADDR_ERRADDR17, 17 .EQU ECC3_ERRADDR_ERRADDR16, 16 .EQU ECC3_ERRADDR_ERRADDR15, 15 .EQU ECC3_ERRADDR_ERRADDR14, 14 .EQU ECC3_ERRADDR_ERRADDR13, 13 .EQU ECC3_ERRADDR_ERRADDR12, 12 .EQU ECC3_ERRADDR_ERRADDR11, 11 .EQU ECC3_ERRADDR_ERRADDR10, 10 .EQU ECC3_ERRADDR_ERRADDR9, 9 .EQU ECC3_ERRADDR_ERRADDR8, 8 .EQU ECC3_ERRADDR_ERRADDR7, 7 .EQU ECC3_ERRADDR_ERRADDR6, 6 .EQU ECC3_ERRADDR_ERRADDR5, 5 .EQU ECC3_ERRADDR_ERRADDR4, 4 .EQU ECC3_ERRADDR_ERRADDR3, 3 .EQU ECC3_ERRADDR_ERRADDR2, 2 .EQU ECC3_ERRADDR_ERRADDR1, 1 .EQU ECC3_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC3_EBR0, 0x40005090 // 0x4000 5090 ECC3_EBR0 Bits------------------------------------- .EQU ECC3_EBR0_ERRIBTEN31, 31 .EQU ECC3_EBR0_ERRIBTEN30, 30 .EQU ECC3_EBR0_ERRIBTEN29, 29 .EQU ECC3_EBR0_ERRIBTEN28, 28 .EQU ECC3_EBR0_ERRIBTEN27, 27 .EQU ECC3_EBR0_ERRIBTEN26, 26 .EQU ECC3_EBR0_ERRIBTEN25, 25 .EQU ECC3_EBR0_ERRIBTEN24, 24 .EQU ECC3_EBR0_ERRIBTEN23, 23 .EQU ECC3_EBR0_ERRIBTEN22, 22 .EQU ECC3_EBR0_ERRIBTEN21, 21 .EQU ECC3_EBR0_ERRIBTEN20, 20 .EQU ECC3_EBR0_ERRIBTEN19, 19 .EQU ECC3_EBR0_ERRIBTEN18, 18 .EQU ECC3_EBR0_ERRIBTEN17, 17 .EQU ECC3_EBR0_ERRIBTEN16, 16 .EQU ECC3_EBR0_ERRIBTEN15, 15 .EQU ECC3_EBR0_ERRIBTEN14, 14 .EQU ECC3_EBR0_ERRIBTEN13, 13 .EQU ECC3_EBR0_ERRIBTEN12, 12 .EQU ECC3_EBR0_ERRIBTEN11, 11 .EQU ECC3_EBR0_ERRIBTEN10, 10 .EQU ECC3_EBR0_ERRIBTEN9, 9 .EQU ECC3_EBR0_ERRIBTEN8, 8 .EQU ECC3_EBR0_ERRIBTEN7, 7 .EQU ECC3_EBR0_ERRIBTEN6, 6 .EQU ECC3_EBR0_ERRIBTEN5, 5 .EQU ECC3_EBR0_ERRIBTEN4, 4 .EQU ECC3_EBR0_ERRIBTEN3, 3 .EQU ECC3_EBR0_ERRIBTEN2, 2 .EQU ECC3_EBR0_ERRIBTEN1, 1 .EQU ECC3_EBR0_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC3_EBR1, 0x40005094 // 0x4000 5094 ECC3_EBR1 Bits------------------------------------- .EQU ECC3_EBR1_ERRIBTEN31, 31 .EQU ECC3_EBR1_ERRIBTEN30, 30 .EQU ECC3_EBR1_ERRIBTEN29, 29 .EQU ECC3_EBR1_ERRIBTEN28, 28 .EQU ECC3_EBR1_ERRIBTEN27, 27 .EQU ECC3_EBR1_ERRIBTEN26, 26 .EQU ECC3_EBR1_ERRIBTEN25, 25 .EQU ECC3_EBR1_ERRIBTEN24, 24 .EQU ECC3_EBR1_ERRIBTEN23, 23 .EQU ECC3_EBR1_ERRIBTEN22, 22 .EQU ECC3_EBR1_ERRIBTEN21, 21 .EQU ECC3_EBR1_ERRIBTEN20, 20 .EQU ECC3_EBR1_ERRIBTEN19, 19 .EQU ECC3_EBR1_ERRIBTEN18, 18 .EQU ECC3_EBR1_ERRIBTEN17, 17 .EQU ECC3_EBR1_ERRIBTEN16, 16 .EQU ECC3_EBR1_ERRIBTEN15, 15 .EQU ECC3_EBR1_ERRIBTEN14, 14 .EQU ECC3_EBR1_ERRIBTEN13, 13 .EQU ECC3_EBR1_ERRIBTEN12, 12 .EQU ECC3_EBR1_ERRIBTEN11, 11 .EQU ECC3_EBR1_ERRIBTEN10, 10 .EQU ECC3_EBR1_ERRIBTEN9, 9 .EQU ECC3_EBR1_ERRIBTEN8, 8 .EQU ECC3_EBR1_ERRIBTEN7, 7 .EQU ECC3_EBR1_ERRIBTEN6, 6 .EQU ECC3_EBR1_ERRIBTEN5, 5 .EQU ECC3_EBR1_ERRIBTEN4, 4 .EQU ECC3_EBR1_ERRIBTEN3, 3 .EQU ECC3_EBR1_ERRIBTEN2, 2 .EQU ECC3_EBR1_ERRIBTEN1, 1 .EQU ECC3_EBR1_ERRIBTEN0, 0 // register------------------------------------- .EQU ECC3_EBR2, 0x40005098 // 0x4000 5098 ECC3_EBR2 Bits------------------------------------- .EQU ECC3_EBR2_ERRBITEN7, 7 .EQU ECC3_EBR2_ERRBITEN6, 6 .EQU ECC3_EBR2_ERRBITEN5, 5 .EQU ECC3_EBR2_ERRBITEN4, 4 .EQU ECC3_EBR2_ERRBITEN3, 3 .EQU ECC3_EBR2_ERRBITEN2, 2 .EQU ECC3_EBR2_ERRBITEN1, 1 .EQU ECC3_EBR2_ERRBITEN0, 0 // register------------------------------------- .EQU T31_CNT, 0x40005200 // 0x4000 5200 T31_CNT Bits------------------------------------- .EQU T31_CNT_TXCNT31, 31 .EQU T31_CNT_TXCNT30, 30 .EQU T31_CNT_TXCNT29, 29 .EQU T31_CNT_TXCNT28, 28 .EQU T31_CNT_TXCNT27, 27 .EQU T31_CNT_TXCNT26, 26 .EQU T31_CNT_TXCNT25, 25 .EQU T31_CNT_TXCNT24, 24 .EQU T31_CNT_TXCNT23, 23 .EQU T31_CNT_TXCNT22, 22 .EQU T31_CNT_TXCNT21, 21 .EQU T31_CNT_TXCNT20, 20 .EQU T31_CNT_TXCNT19, 19 .EQU T31_CNT_TXCNT18, 18 .EQU T31_CNT_TXCNT17, 17 .EQU T31_CNT_TXCNT16, 16 .EQU T31_CNT_TXCNT15, 15 .EQU T31_CNT_TXCNT14, 14 .EQU T31_CNT_TXCNT13, 13 .EQU T31_CNT_TXCNT12, 12 .EQU T31_CNT_TXCNT11, 11 .EQU T31_CNT_TXCNT10, 10 .EQU T31_CNT_TXCNT9, 9 .EQU T31_CNT_TXCNT8, 8 .EQU T31_CNT_TXCNT7, 7 .EQU T31_CNT_TXCNT6, 6 .EQU T31_CNT_TXCNT5, 5 .EQU T31_CNT_TXCNT4, 4 .EQU T31_CNT_TXCNT3, 3 .EQU T31_CNT_TXCNT2, 2 .EQU T31_CNT_TXCNT1, 1 .EQU T31_CNT_TXCNT0, 0 // register------------------------------------- .EQU T31_PHS, 0x40005204 // 0x4000 5204 T31_PHS Bits------------------------------------- .EQU T31_PHS_TXPHS31, 31 .EQU T31_PHS_TXPHS30, 30 .EQU T31_PHS_TXPHS29, 29 .EQU T31_PHS_TXPHS28, 28 .EQU T31_PHS_TXPHS27, 27 .EQU T31_PHS_TXPHS26, 26 .EQU T31_PHS_TXPHS25, 25 .EQU T31_PHS_TXPHS24, 24 .EQU T31_PHS_TXPHS23, 23 .EQU T31_PHS_TXPHS22, 22 .EQU T31_PHS_TXPHS21, 21 .EQU T31_PHS_TXPHS20, 20 .EQU T31_PHS_TXPHS19, 19 .EQU T31_PHS_TXPHS18, 18 .EQU T31_PHS_TXPHS17, 17 .EQU T31_PHS_TXPHS16, 16 .EQU T31_PHS_TXPHS15, 15 .EQU T31_PHS_TXPHS14, 14 .EQU T31_PHS_TXPHS13, 13 .EQU T31_PHS_TXPHS12, 12 .EQU T31_PHS_TXPHS11, 11 .EQU T31_PHS_TXPHS10, 10 .EQU T31_PHS_TXPHS9, 9 .EQU T31_PHS_TXPHS8, 8 .EQU T31_PHS_TXPHS7, 7 .EQU T31_PHS_TXPHS6, 6 .EQU T31_PHS_TXPHS5, 5 .EQU T31_PHS_TXPHS4, 4 .EQU T31_PHS_TXPHS3, 3 .EQU T31_PHS_TXPHS2, 2 .EQU T31_PHS_TXPHS1, 1 .EQU T31_PHS_TXPHS0, 0 // register------------------------------------- .EQU T31_PPX, 0x40005208 // 0x4000 5208 T31_PPX Bits------------------------------------- .EQU T31_PPX_PPX31, 31 .EQU T31_PPX_PPX30, 30 .EQU T31_PPX_PPX29, 29 .EQU T31_PPX_PPX28, 28 .EQU T31_PPX_PPX27, 27 .EQU T31_PPX_PPX26, 26 .EQU T31_PPX_PPX25, 25 .EQU T31_PPX_PPX24, 24 .EQU T31_PPX_PPX23, 23 .EQU T31_PPX_PPX22, 22 .EQU T31_PPX_PPX21, 21 .EQU T31_PPX_PPX20, 20 .EQU T31_PPX_PPX19, 19 .EQU T31_PPX_PPX18, 18 .EQU T31_PPX_PPX17, 17 .EQU T31_PPX_PPX16, 16 .EQU T31_PPX_PPX15, 15 .EQU T31_PPX_PPX14, 14 .EQU T31_PPX_PPX13, 13 .EQU T31_PPX_PPX12, 12 .EQU T31_PPX_PPX11, 11 .EQU T31_PPX_PPX10, 10 .EQU T31_PPX_PPX9, 9 .EQU T31_PPX_PPX8, 8 .EQU T31_PPX_PPX7, 7 .EQU T31_PPX_PPX6, 6 .EQU T31_PPX_PPX5, 5 .EQU T31_PPX_PPX4, 4 .EQU T31_PPX_PPX3, 3 .EQU T31_PPX_PPX2, 2 .EQU T31_PPX_PPX1, 1 .EQU T31_PPX_PPX0, 0 // register------------------------------------- .EQU T31_PRSC, 0x4000520C // 0x4000 520C T31_PRSC Bits------------------------------------- .EQU T31_PRSC_TXPRSC31, 31 .EQU T31_PRSC_TXPRSC30, 30 .EQU T31_PRSC_TXPRSC29, 29 .EQU T31_PRSC_TXPRSC28, 28 .EQU T31_PRSC_TXPRSC27, 27 .EQU T31_PRSC_TXPRSC26, 26 .EQU T31_PRSC_TXPRSC25, 25 .EQU T31_PRSC_TXPRSC24, 24 .EQU T31_PRSC_TXPRSC23, 23 .EQU T31_PRSC_TXPRSC22, 22 .EQU T31_PRSC_TXPRSC21, 21 .EQU T31_PRSC_TXPRSC20, 20 .EQU T31_PRSC_TXPRSC19, 19 .EQU T31_PRSC_TXPRSC18, 18 .EQU T31_PRSC_TXPRSC17, 17 .EQU T31_PRSC_TXPRSC16, 16 .EQU T31_PRSC_TXPRSC15, 15 .EQU T31_PRSC_TXPRSC14, 14 .EQU T31_PRSC_TXPRSC13, 13 .EQU T31_PRSC_TXPRSC12, 12 .EQU T31_PRSC_TXPRSC11, 11 .EQU T31_PRSC_TXPRSC10, 10 .EQU T31_PRSC_TXPRSC9, 9 .EQU T31_PRSC_TXPRSC8, 8 .EQU T31_PRSC_TXPRSC7, 7 .EQU T31_PRSC_TXPRSC6, 6 .EQU T31_PRSC_TXPRSC5, 5 .EQU T31_PRSC_TXPRSC4, 4 .EQU T31_PRSC_TXPRSC3, 3 .EQU T31_PRSC_TXPRSC2, 2 .EQU T31_PRSC_TXPRSC1, 1 .EQU T31_PRSC_TXPRSC0, 0 // register------------------------------------- .EQU T31_CTL, 0x40005210 // 0x4000 5210 T31_CTL Bits------------------------------------- .EQU T31_CTL_BLINKEN, 31 .EQU T31_CTL_UDSYNEN, 29 .EQU T31_CTL_HRLOCK, 28 .EQU T31_CTL_ETLOCK, 27 .EQU T31_CTL_PCLOCK, 26 .EQU T31_CTL_DBLOCK, 25 .EQU T31_CTL_AQLOCKB, 24 .EQU T31_CTL_AQLOCKA, 23 .EQU T31_CTL_CAPEN, 22 .EQU T31_CTL_CAPSEL, 21 .EQU T31_CTL_TXMAX, 19 .EQU T31_CTL_PHSDIR, 18 .EQU T31_CTL_SWFSYNC, 17 .EQU T31_CTL_SYNCOSEL1, 16 .EQU T31_CTL_SYNCOSEL0, 15 .EQU T31_CTL_PHSEN, 14 .EQU T31_CTL_SYNCI, 13 .EQU T31_CTL_TXUR, 12 .EQU T31_CTL_TXUDEVT, 11 .EQU T31_CTL_TXUDEN, 10 .EQU T31_CTL_TXCMS2, 9 .EQU T31_CTL_TXCMS1, 8 .EQU T31_CTL_TXCMS0, 7 .EQU T31_CTL_TXDIR, 6 .EQU T31_CTL_TXCLK1, 5 .EQU T31_CTL_TXCLK0, 4 .EQU T31_CTL_TXSY, 3 .EQU T31_CTL_TXGATE, 2 .EQU T31_CTL_TXCS, 1 .EQU T31_CTL_TXEN, 0 // register------------------------------------- .EQU EPWM31_RA, 0x40005214 // 0x4000 5214 EPWM31_RA Bits------------------------------------- .EQU EPWM31_RA_EPWMRA31, 31 .EQU EPWM31_RA_EPWMRA30, 30 .EQU EPWM31_RA_EPWMRA29, 29 .EQU EPWM31_RA_EPWMRA28, 28 .EQU EPWM31_RA_EPWMRA27, 27 .EQU EPWM31_RA_EPWMRA26, 26 .EQU EPWM31_RA_EPWMRA25, 25 .EQU EPWM31_RA_EPWMRA24, 24 .EQU EPWM31_RA_EPWMRA23, 23 .EQU EPWM31_RA_EPWMRA22, 22 .EQU EPWM31_RA_EPWMRA21, 21 .EQU EPWM31_RA_EPWMRA20, 20 .EQU EPWM31_RA_EPWMRA19, 19 .EQU EPWM31_RA_EPWMRA18, 18 .EQU EPWM31_RA_EPWMRA17, 17 .EQU EPWM31_RA_EPWMRA16, 16 .EQU EPWM31_RA_EPWMRA15, 15 .EQU EPWM31_RA_EPWMRA14, 14 .EQU EPWM31_RA_EPWMRA13, 13 .EQU EPWM31_RA_EPWMRA12, 12 .EQU EPWM31_RA_EPWMRA11, 11 .EQU EPWM31_RA_EPWMRA10, 10 .EQU EPWM31_RA_EPWMRA9, 9 .EQU EPWM31_RA_EPWMRA8, 8 .EQU EPWM31_RA_EPWMRA7, 7 .EQU EPWM31_RA_EPWMRA6, 6 .EQU EPWM31_RA_EPWMRA5, 5 .EQU EPWM31_RA_EPWMRA4, 4 .EQU EPWM31_RA_EPWMRA3, 3 .EQU EPWM31_RA_EPWMRA2, 2 .EQU EPWM31_RA_EPWMRA1, 1 .EQU EPWM31_RA_EPWMRA0, 0 // register------------------------------------- .EQU EPWM31_RB, 0x40005218 // 0x4000 5218 EPWM31_RB Bits------------------------------------- .EQU EPWM31_RB_EPWMRB31, 31 .EQU EPWM31_RB_EPWMRB30, 30 .EQU EPWM31_RB_EPWMRB29, 29 .EQU EPWM31_RB_EPWMRB28, 28 .EQU EPWM31_RB_EPWMRB27, 27 .EQU EPWM31_RB_EPWMRB26, 26 .EQU EPWM31_RB_EPWMRB25, 25 .EQU EPWM31_RB_EPWMRB24, 24 .EQU EPWM31_RB_EPWMRB23, 23 .EQU EPWM31_RB_EPWMRB22, 22 .EQU EPWM31_RB_EPWMRB21, 21 .EQU EPWM31_RB_EPWMRB20, 20 .EQU EPWM31_RB_EPWMRB19, 19 .EQU EPWM31_RB_EPWMRB18, 18 .EQU EPWM31_RB_EPWMRB17, 17 .EQU EPWM31_RB_EPWMRB16, 16 .EQU EPWM31_RB_EPWMRB15, 15 .EQU EPWM31_RB_EPWMRB14, 14 .EQU EPWM31_RB_EPWMRB13, 13 .EQU EPWM31_RB_EPWMRB12, 12 .EQU EPWM31_RB_EPWMRB11, 11 .EQU EPWM31_RB_EPWMRB10, 10 .EQU EPWM31_RB_EPWMRB9, 9 .EQU EPWM31_RB_EPWMRB8, 8 .EQU EPWM31_RB_EPWMRB7, 7 .EQU EPWM31_RB_EPWMRB6, 6 .EQU EPWM31_RB_EPWMRB5, 5 .EQU EPWM31_RB_EPWMRB4, 4 .EQU EPWM31_RB_EPWMRB3, 3 .EQU EPWM31_RB_EPWMRB2, 2 .EQU EPWM31_RB_EPWMRB1, 1 .EQU EPWM31_RB_EPWMRB0, 0 // register------------------------------------- .EQU EPWM31_CTLA, 0x4000521C // 0x4000 521C EPWM31_CTLA Bits------------------------------------- .EQU EPWM31_CTLA_OTSFA, 16 .EQU EPWM31_CTLA_ACTSFA1, 15 .EQU EPWM31_CTLA_ACTSFA0, 14 .EQU EPWM31_CTLA_CSFA1, 13 .EQU EPWM31_CTLA_CSFA0, 12 .EQU EPWM31_CTLA_ACBD1, 11 .EQU EPWM31_CTLA_ACBD0, 10 .EQU EPWM31_CTLA_ACBU1, 9 .EQU EPWM31_CTLA_ACBU0, 8 .EQU EPWM31_CTLA_ACAD1, 7 .EQU EPWM31_CTLA_ACAD0, 6 .EQU EPWM31_CTLA_ACAU1, 5 .EQU EPWM31_CTLA_ACAU0, 4 .EQU EPWM31_CTLA_APRD1, 3 .EQU EPWM31_CTLA_APRD0, 2 .EQU EPWM31_CTLA_AZRO1, 1 .EQU EPWM31_CTLA_AZRO0, 0 // register------------------------------------- .EQU EPWM31_CTLB, 0x40005220 // 0x4000 5220 EPWM31_CTLB Bits------------------------------------- .EQU EPWM31_CTLB_OTSFB, 16 .EQU EPWM31_CTLB_ACTSFB1, 15 .EQU EPWM31_CTLB_ACTSFB0, 14 .EQU EPWM31_CTLB_CSFB1, 13 .EQU EPWM31_CTLB_CSFB0, 12 .EQU EPWM31_CTLB_BCBD1, 11 .EQU EPWM31_CTLB_BCBD0, 10 .EQU EPWM31_CTLB_BCBU1, 9 .EQU EPWM31_CTLB_BCBU0, 8 .EQU EPWM31_CTLB_BCAD1, 7 .EQU EPWM31_CTLB_BCAD0, 6 .EQU EPWM31_CTLB_BCAU1, 5 .EQU EPWM31_CTLB_BCAU0, 4 .EQU EPWM31_CTLB_BPRD1, 3 .EQU EPWM31_CTLB_BPRD0, 2 .EQU EPWM31_CTLB_BZRO1, 1 .EQU EPWM31_CTLB_BZRO0, 0 // register------------------------------------- .EQU EPWM31_DBCTL, 0x40005224 // 0x4000 5224 EPWM31_DBCTL Bits------------------------------------- .EQU EPWM31_DBCTL_INMODE1, 5 .EQU EPWM31_DBCTL_INMODE0, 4 .EQU EPWM31_DBCTL_POLSEL1, 3 .EQU EPWM31_DBCTL_POLSEL0, 2 .EQU EPWM31_DBCTL_OUTMODE1, 1 .EQU EPWM31_DBCTL_OUTMODE0, 0 // register------------------------------------- .EQU EPWM31_DBT, 0x40005228 // 0x4000 5228 EPWM31_DBT Bits------------------------------------- .EQU EPWM31_DBT_RDBT15, 31 .EQU EPWM31_DBT_RDBT14, 30 .EQU EPWM31_DBT_RDBT13, 29 .EQU EPWM31_DBT_RDBT12, 28 .EQU EPWM31_DBT_RDBT11, 27 .EQU EPWM31_DBT_RDBT10, 26 .EQU EPWM31_DBT_RDBT9, 25 .EQU EPWM31_DBT_RDBT8, 24 .EQU EPWM31_DBT_RDBT7, 23 .EQU EPWM31_DBT_RDBT6, 22 .EQU EPWM31_DBT_RDBT5, 21 .EQU EPWM31_DBT_RDBT4, 20 .EQU EPWM31_DBT_RDBT3, 19 .EQU EPWM31_DBT_RDBT2, 18 .EQU EPWM31_DBT_RDBT1, 17 .EQU EPWM31_DBT_RDBT0, 16 .EQU EPWM31_DBT_FDBT15, 15 .EQU EPWM31_DBT_FDBT14, 14 .EQU EPWM31_DBT_FDBT13, 13 .EQU EPWM31_DBT_FDBT12, 12 .EQU EPWM31_DBT_FDBT11, 11 .EQU EPWM31_DBT_FDBT10, 10 .EQU EPWM31_DBT_FDBT9, 9 .EQU EPWM31_DBT_FDBT8, 8 .EQU EPWM31_DBT_FDBT7, 7 .EQU EPWM31_DBT_FDBT6, 6 .EQU EPWM31_DBT_FDBT5, 5 .EQU EPWM31_DBT_FDBT4, 4 .EQU EPWM31_DBT_FDBT3, 3 .EQU EPWM31_DBT_FDBT2, 2 .EQU EPWM31_DBT_FDBT1, 1 .EQU EPWM31_DBT_FDBT0, 0 // register------------------------------------- .EQU EPWM31_PCCTL, 0x4000522C // 0x4000 522C EPWM31_PCCTL Bits------------------------------------- .EQU EPWM31_PCCTL_CHPFREQ2, 10 .EQU EPWM31_PCCTL_CHPFREQ1, 9 .EQU EPWM31_PCCTL_CHPFREQ0, 8 .EQU EPWM31_PCCTL_CHPDUTY2, 7 .EQU EPWM31_PCCTL_CHPDUTY1, 6 .EQU EPWM31_PCCTL_CHPDUTY0, 5 .EQU EPWM31_PCCTL_OSHTWTH3, 4 .EQU EPWM31_PCCTL_OSHTWTH2, 3 .EQU EPWM31_PCCTL_OSHTWTH1, 2 .EQU EPWM31_PCCTL_OSHTWTH0, 1 .EQU EPWM31_PCCTL_CHPEN, 0 // register------------------------------------- .EQU EPWM31_PXASCTL, 0x40005230 // 0x4000 5230 EPWM31_PXASCTL Bits------------------------------------- .EQU EPWM31_PXASCTL_PXRSEN, 8 .EQU EPWM31_PXASCTL_PXSSA1, 7 .EQU EPWM31_PXASCTL_PXSSA0, 6 .EQU EPWM31_PXASCTL_PXSSB1, 5 .EQU EPWM31_PXASCTL_PXSSB0, 4 .EQU EPWM31_PXASCTL_PXASE, 3 .EQU EPWM31_PXASCTL_PXASS2, 2 .EQU EPWM31_PXASCTL_PXASS1, 1 .EQU EPWM31_PXASCTL_PXASS0, 0 // register------------------------------------- .EQU EPWM31_ETCTL, 0x40005234 // 0x4000 5234 EPWM31_ETCTL Bits------------------------------------- .EQU EPWM31_ETCTL_BTSEL1, 25 .EQU EPWM31_ETCTL_BTSEL0, 24 .EQU EPWM31_ETCTL_FRCB, 19 .EQU EPWM31_ETCTL_TOADENB, 16 .EQU EPWM31_ETCTL_ATSEL1, 9 .EQU EPWM31_ETCTL_ATSEL0, 8 .EQU EPWM31_ETCTL_FRCA, 3 .EQU EPWM31_ETCTL_TOADENA, 0 // register------------------------------------- .EQU EPWM31_IE, 0x40005238 // 0x4000 5238 EPWM31_IE Bits------------------------------------- .EQU EPWM31_IE_CAPIE, 9 .EQU EPWM31_IE_TXDIE, 8 .EQU EPWM31_IE_TXCIE, 7 .EQU EPWM31_IE_TXAIE, 6 .EQU EPWM31_IE_TXBIE, 5 .EQU EPWM31_IE_TXIE, 4 .EQU EPWM31_IE_TXUIE, 3 .EQU EPWM31_IE_TXGIE, 2 .EQU EPWM31_IE_TXTIE1, 1 .EQU EPWM31_IE_TXTIE0, 0 // register------------------------------------- .EQU EPWM31_IF, 0x4000523C // 0x4000 523C EPWM31_IF Bits------------------------------------- .EQU EPWM31_IF_CAPIF, 9 .EQU EPWM31_IF_TXDIF, 8 .EQU EPWM31_IF_TXCIF, 7 .EQU EPWM31_IF_TXAIF, 6 .EQU EPWM31_IF_TXBIF, 5 .EQU EPWM31_IF_TXIF, 4 .EQU EPWM31_IF_TXUIF, 3 .EQU EPWM31_IF_TXGIF, 2 .EQU EPWM31_IF_TXTIF1, 1 .EQU EPWM31_IF_TXTIF0, 0 // register------------------------------------- .EQU EPWM31_IC, 0x40005240 // 0x4000 5240 EPWM31_IC Bits------------------------------------- .EQU EPWM31_IC_CAPIC1, 10 .EQU EPWM31_IC_CAPIC0, 9 .EQU EPWM31_IC_TXDIC, 8 .EQU EPWM31_IC_TXCIC, 7 .EQU EPWM31_IC_TXAIC, 6 .EQU EPWM31_IC_TXBIC, 5 .EQU EPWM31_IC_TXIC, 4 .EQU EPWM31_IC_TXUIC, 3 .EQU EPWM31_IC_TXGIC, 2 .EQU EPWM31_IC_TXTIC1, 1 .EQU EPWM31_IC_TXTIC0, 0 // register------------------------------------- .EQU EPWM31_DE, 0x40005244 // 0x4000 5244 EPWM31_DE Bits------------------------------------- .EQU EPWM31_DE_TXDDE, 8 .EQU EPWM31_DE_TXCDE, 7 .EQU EPWM31_DE_TXADE, 6 .EQU EPWM31_DE_TXBDE, 5 .EQU EPWM31_DE_TXDE, 4 .EQU EPWM31_DE_TXUDE, 3 .EQU EPWM31_DE_TXGDE, 2 .EQU EPWM31_DE_TXTDE1, 1 .EQU EPWM31_DE_TXTDE0, 0 // register------------------------------------- .EQU EPWM31_DF, 0x40005248 // 0x4000 5248 EPWM31_DF Bits------------------------------------- .EQU EPWM31_DF_TXDDF, 8 .EQU EPWM31_DF_TXCDF, 7 .EQU EPWM31_DF_TXADF, 6 .EQU EPWM31_DF_TXBDF, 5 .EQU EPWM31_DF_TXDF, 4 .EQU EPWM31_DF_TXUDF, 3 .EQU EPWM31_DF_TXGDF, 2 .EQU EPWM31_DF_TXTDF1, 1 .EQU EPWM31_DF_TXTDF0, 0 // register------------------------------------- .EQU EPWM31_HRPWMCTLA, 0x40005250 // 0x4000 5250 EPWM31_HRPWMCTLA Bits------------------------------------- .EQU EPWM31_HRPWMCTLA_HRPHSENA, 6 .EQU EPWM31_HRPWMCTLA_HRFENA, 5 .EQU EPWM31_HRPWMCTLA_HRRENA, 4 .EQU EPWM31_HRPWMCTLA_HRPENA, 3 .EQU EPWM31_HRPWMCTLA_HRDENA, 2 .EQU EPWM31_HRPWMCTLA_HRSELA, 1 .EQU EPWM31_HRPWMCTLA_HRENA, 0 // register------------------------------------- .EQU EPWM31_HRCMPA, 0x40005254 // 0x4000 5254 EPWM31_HRCMPA Bits------------------------------------- .EQU EPWM31_HRCMPA_HRCMPA7, 7 .EQU EPWM31_HRCMPA_HRCMPA6, 6 .EQU EPWM31_HRCMPA_HRCMPA5, 5 .EQU EPWM31_HRCMPA_HRCMPA4, 4 .EQU EPWM31_HRCMPA_HRCMPA3, 3 .EQU EPWM31_HRCMPA_HRCMPA2, 2 .EQU EPWM31_HRCMPA_HRCMPA1, 1 .EQU EPWM31_HRCMPA_HRCMPA0, 0 // register------------------------------------- .EQU EPWM31_CAP, 0x40005258 // 0x4000 5258 EPWM31_CAP Bits------------------------------------- .EQU EPWM31_CAP_CAP31, 31 .EQU EPWM31_CAP_CAP30, 30 .EQU EPWM31_CAP_CAP29, 29 .EQU EPWM31_CAP_CAP28, 28 .EQU EPWM31_CAP_CAP27, 27 .EQU EPWM31_CAP_CAP26, 26 .EQU EPWM31_CAP_CAP25, 25 .EQU EPWM31_CAP_CAP24, 24 .EQU EPWM31_CAP_CAP23, 23 .EQU EPWM31_CAP_CAP22, 22 .EQU EPWM31_CAP_CAP21, 21 .EQU EPWM31_CAP_CAP20, 20 .EQU EPWM31_CAP_CAP19, 19 .EQU EPWM31_CAP_CAP18, 18 .EQU EPWM31_CAP_CAP17, 17 .EQU EPWM31_CAP_CAP16, 16 .EQU EPWM31_CAP_CAP15, 15 .EQU EPWM31_CAP_CAP14, 14 .EQU EPWM31_CAP_CAP13, 13 .EQU EPWM31_CAP_CAP12, 12 .EQU EPWM31_CAP_CAP11, 11 .EQU EPWM31_CAP_CAP10, 10 .EQU EPWM31_CAP_CAP9, 9 .EQU EPWM31_CAP_CAP8, 8 .EQU EPWM31_CAP_CAP7, 7 .EQU EPWM31_CAP_CAP6, 6 .EQU EPWM31_CAP_CAP5, 5 .EQU EPWM31_CAP_CAP4, 4 .EQU EPWM31_CAP_CAP3, 3 .EQU EPWM31_CAP_CAP2, 2 .EQU EPWM31_CAP_CAP1, 1 .EQU EPWM31_CAP_CAP0, 0 // register------------------------------------- .EQU EPWM31_RC, 0x4000525C // 0x4000 525C EPWM31_RC Bits------------------------------------- .EQU EPWM31_RC_EPWMRC31, 31 .EQU EPWM31_RC_EPWMRC30, 30 .EQU EPWM31_RC_EPWMRC29, 29 .EQU EPWM31_RC_EPWMRC28, 28 .EQU EPWM31_RC_EPWMRC27, 27 .EQU EPWM31_RC_EPWMRC26, 26 .EQU EPWM31_RC_EPWMRC25, 25 .EQU EPWM31_RC_EPWMRC24, 24 .EQU EPWM31_RC_EPWMRC23, 23 .EQU EPWM31_RC_EPWMRC22, 22 .EQU EPWM31_RC_EPWMRC21, 21 .EQU EPWM31_RC_EPWMRC20, 20 .EQU EPWM31_RC_EPWMRC19, 19 .EQU EPWM31_RC_EPWMRC18, 18 .EQU EPWM31_RC_EPWMRC17, 17 .EQU EPWM31_RC_EPWMRC16, 16 .EQU EPWM31_RC_EPWMRC15, 15 .EQU EPWM31_RC_EPWMRC14, 14 .EQU EPWM31_RC_EPWMRC13, 13 .EQU EPWM31_RC_EPWMRC12, 12 .EQU EPWM31_RC_EPWMRC11, 11 .EQU EPWM31_RC_EPWMRC10, 10 .EQU EPWM31_RC_EPWMRC9, 9 .EQU EPWM31_RC_EPWMRC8, 8 .EQU EPWM31_RC_EPWMRC7, 7 .EQU EPWM31_RC_EPWMRC6, 6 .EQU EPWM31_RC_EPWMRC5, 5 .EQU EPWM31_RC_EPWMRC4, 4 .EQU EPWM31_RC_EPWMRC3, 3 .EQU EPWM31_RC_EPWMRC2, 2 .EQU EPWM31_RC_EPWMRC1, 1 .EQU EPWM31_RC_EPWMRC0, 0 // register------------------------------------- .EQU EPWM31_RD, 0x40005260 // 0x4000 5260 EPWM31_RD Bits------------------------------------- .EQU EPWM31_RD_EPWMRD31, 31 .EQU EPWM31_RD_EPWMRD30, 30 .EQU EPWM31_RD_EPWMRD29, 29 .EQU EPWM31_RD_EPWMRD28, 28 .EQU EPWM31_RD_EPWMRD27, 27 .EQU EPWM31_RD_EPWMRD26, 26 .EQU EPWM31_RD_EPWMRD25, 25 .EQU EPWM31_RD_EPWMRD24, 24 .EQU EPWM31_RD_EPWMRD23, 23 .EQU EPWM31_RD_EPWMRD22, 22 .EQU EPWM31_RD_EPWMRD21, 21 .EQU EPWM31_RD_EPWMRD20, 20 .EQU EPWM31_RD_EPWMRD19, 19 .EQU EPWM31_RD_EPWMRD18, 18 .EQU EPWM31_RD_EPWMRD17, 17 .EQU EPWM31_RD_EPWMRD16, 16 .EQU EPWM31_RD_EPWMRD15, 15 .EQU EPWM31_RD_EPWMRD14, 14 .EQU EPWM31_RD_EPWMRD13, 13 .EQU EPWM31_RD_EPWMRD12, 12 .EQU EPWM31_RD_EPWMRD11, 11 .EQU EPWM31_RD_EPWMRD10, 10 .EQU EPWM31_RD_EPWMRD9, 9 .EQU EPWM31_RD_EPWMRD8, 8 .EQU EPWM31_RD_EPWMRD7, 7 .EQU EPWM31_RD_EPWMRD6, 6 .EQU EPWM31_RD_EPWMRD5, 5 .EQU EPWM31_RD_EPWMRD4, 4 .EQU EPWM31_RD_EPWMRD3, 3 .EQU EPWM31_RD_EPWMRD2, 2 .EQU EPWM31_RD_EPWMRD1, 1 .EQU EPWM31_RD_EPWMRD0, 0 // register------------------------------------- .EQU EPWM31_UDCTL, 0x40005264 // 0x4000 5264 EPWM31_UDCTL Bits------------------------------------- .EQU EPWM31_UDCTL_GBUDEN, 27 .EQU EPWM31_UDCTL_HRPUDSEL1, 26 .EQU EPWM31_UDCTL_HRPUDSEL0, 25 .EQU EPWM31_UDCTL_HRPUDEN, 24 .EQU EPWM31_UDCTL_EBUDSEL1, 23 .EQU EPWM31_UDCTL_EBUDSEL0, 22 .EQU EPWM31_UDCTL_EBUDEN, 21 .EQU EPWM31_UDCTL_EAUDSEL1, 20 .EQU EPWM31_UDCTL_EAUDSEL0, 19 .EQU EPWM31_UDCTL_EAUDEN, 18 .EQU EPWM31_UDCTL_CMDUDSEL1, 17 .EQU EPWM31_UDCTL_CMDUDSEL0, 16 .EQU EPWM31_UDCTL_CMDUDEN, 15 .EQU EPWM31_UDCTL_CMCUDSEL1, 14 .EQU EPWM31_UDCTL_CMCUDSEL0, 13 .EQU EPWM31_UDCTL_CMCUDEN, 12 .EQU EPWM31_UDCTL_CMBUDSEL1, 11 .EQU EPWM31_UDCTL_CMBUDSEL0, 10 .EQU EPWM31_UDCTL_CMBUDEN, 9 .EQU EPWM31_UDCTL_CMAUDSEL1, 8 .EQU EPWM31_UDCTL_CMAUDSEL0, 7 .EQU EPWM31_UDCTL_CMAUDEN, 6 .EQU EPWM31_UDCTL_PRUDSEL1, 5 .EQU EPWM31_UDCTL_PRUDSEL0, 4 .EQU EPWM31_UDCTL_PRUDEN, 3 .EQU EPWM31_UDCTL_PPUDSEL1, 2 .EQU EPWM31_UDCTL_PPUDSEL0, 1 .EQU EPWM31_UDCTL_PPUDEN, 0 // register------------------------------------- .EQU EPWM31_SRT, 0x40005268 // 0x4000 5268 EPWM31_SRT Bits------------------------------------- .EQU EPWM31_SRT_T31, 31 .EQU EPWM31_SRT_T30, 30 .EQU EPWM31_SRT_T29, 29 .EQU EPWM31_SRT_T28, 28 .EQU EPWM31_SRT_T27, 27 .EQU EPWM31_SRT_T26, 26 .EQU EPWM31_SRT_T25, 25 .EQU EPWM31_SRT_T24, 24 .EQU EPWM31_SRT_T23, 23 .EQU EPWM31_SRT_T22, 22 .EQU EPWM31_SRT_T21, 21 .EQU EPWM31_SRT_T20, 20 .EQU EPWM31_SRT_T19, 19 .EQU EPWM31_SRT_T18, 18 .EQU EPWM31_SRT_T17, 17 .EQU EPWM31_SRT_T16, 16 .EQU EPWM31_SRT_T15, 15 .EQU EPWM31_SRT_T14, 14 .EQU EPWM31_SRT_T13, 13 .EQU EPWM31_SRT_T12, 12 .EQU EPWM31_SRT_T11, 11 .EQU EPWM31_SRT_T10, 10 .EQU EPWM31_SRT_T9, 9 .EQU EPWM31_SRT_T8, 8 .EQU EPWM31_SRT_T7, 7 .EQU EPWM31_SRT_T6, 6 .EQU EPWM31_SRT_T5, 5 .EQU EPWM31_SRT_T4, 4 .EQU EPWM31_SRT_T3, 3 .EQU EPWM31_SRT_T2, 2 .EQU EPWM31_SRT_T1, 1 .EQU EPWM31_SRT_T0, 0 // register------------------------------------- .EQU EPWM31_HRPWMCTLB, 0x4000526C // 0x4000 526C EPWM31_HRPWMCTLB Bits------------------------------------- .EQU EPWM31_HRPWMCTLB_HRPHSENB, 6 .EQU EPWM31_HRPWMCTLB_HRFENB, 5 .EQU EPWM31_HRPWMCTLB_HRRENB, 4 .EQU EPWM31_HRPWMCTLB_HRPENB, 3 .EQU EPWM31_HRPWMCTLB_HRDENB, 2 .EQU EPWM31_HRPWMCTLB_HRSELB, 1 .EQU EPWM31_HRPWMCTLB_HRENB, 0 // register------------------------------------- .EQU EPWM31_HRCMPB, 0x40005270 // 0x4000 5270 EPWM31_HRCMPB Bits------------------------------------- .EQU EPWM31_HRCMPB_HRCMPB7, 7 .EQU EPWM31_HRCMPB_HRCMPB6, 6 .EQU EPWM31_HRCMPB_HRCMPB5, 5 .EQU EPWM31_HRCMPB_HRCMPB4, 4 .EQU EPWM31_HRCMPB_HRCMPB3, 3 .EQU EPWM31_HRCMPB_HRCMPB2, 2 .EQU EPWM31_HRCMPB_HRCMPB1, 1 .EQU EPWM31_HRCMPB_HRCMPB0, 0 // register------------------------------------- .EQU EPWM31_HRDB, 0x40005274 // 0x4000 5274 EPWM31_HRDB Bits------------------------------------- .EQU EPWM31_HRDB_HRR7, 15 .EQU EPWM31_HRDB_HRR6, 14 .EQU EPWM31_HRDB_HRR5, 13 .EQU EPWM31_HRDB_HRR4, 12 .EQU EPWM31_HRDB_HRR3, 11 .EQU EPWM31_HRDB_HRR2, 10 .EQU EPWM31_HRDB_HRR1, 9 .EQU EPWM31_HRDB_HRR0, 8 .EQU EPWM31_HRDB_HRF7, 7 .EQU EPWM31_HRDB_HRF6, 6 .EQU EPWM31_HRDB_HRF5, 5 .EQU EPWM31_HRDB_HRF4, 4 .EQU EPWM31_HRDB_HRF3, 3 .EQU EPWM31_HRDB_HRF2, 2 .EQU EPWM31_HRDB_HRF1, 1 .EQU EPWM31_HRDB_HRF0, 0 // register------------------------------------- .EQU EPWM31_HRPHS, 0x40005278 // 0x4000 5278 EPWM31_HRPHS Bits------------------------------------- .EQU EPWM31_HRPHS_HRPRE7, 15 .EQU EPWM31_HRPHS_HRPRE6, 14 .EQU EPWM31_HRPHS_HRPRE5, 13 .EQU EPWM31_HRPHS_HRPRE4, 12 .EQU EPWM31_HRPHS_HRPRE3, 11 .EQU EPWM31_HRPHS_HRPRE2, 10 .EQU EPWM31_HRPHS_HRPRE1, 9 .EQU EPWM31_HRPHS_HRPRE0, 8 .EQU EPWM31_HRPHS_HRPHS7, 7 .EQU EPWM31_HRPHS_HRPHS6, 6 .EQU EPWM31_HRPHS_HRPHS5, 5 .EQU EPWM31_HRPHS_HRPHS4, 4 .EQU EPWM31_HRPHS_HRPHS3, 3 .EQU EPWM31_HRPHS_HRPHS2, 2 .EQU EPWM31_HRPHS_HRPHS1, 1 .EQU EPWM31_HRPHS_HRPHS0, 0 // register------------------------------------- .EQU EPWM31_HRCFG, 0x4000527C // 0x4000 527C EPWM31_HRCFG Bits------------------------------------- .EQU EPWM31_HRCFG_STEP7, 15 .EQU EPWM31_HRCFG_STEP6, 14 .EQU EPWM31_HRCFG_STEP5, 13 .EQU EPWM31_HRCFG_STEP4, 12 .EQU EPWM31_HRCFG_STEP3, 11 .EQU EPWM31_HRCFG_STEP2, 10 .EQU EPWM31_HRCFG_STEP1, 9 .EQU EPWM31_HRCFG_STEP0, 8 .EQU EPWM31_HRCFG_TIMS7, 7 .EQU EPWM31_HRCFG_TIMS6, 6 .EQU EPWM31_HRCFG_TIMS5, 5 .EQU EPWM31_HRCFG_TIMS4, 4 .EQU EPWM31_HRCFG_TIMS3, 3 .EQU EPWM31_HRCFG_TIMS2, 2 .EQU EPWM31_HRCFG_TIMS1, 1 .EQU EPWM31_HRCFG_TIMS0, 0 // register------------------------------------- .EQU EPWM31_HRDELAY, 0x40005280 // 0x4000 5280 EPWM31_HRDELAY Bits------------------------------------- .EQU EPWM31_HRDELAY_REDBHR7, 31 .EQU EPWM31_HRDELAY_REDBHR6, 30 .EQU EPWM31_HRDELAY_REDBHR5, 29 .EQU EPWM31_HRDELAY_REDBHR4, 28 .EQU EPWM31_HRDELAY_REDBHR3, 27 .EQU EPWM31_HRDELAY_REDBHR2, 26 .EQU EPWM31_HRDELAY_REDBHR1, 25 .EQU EPWM31_HRDELAY_REDBHR0, 24 .EQU EPWM31_HRDELAY_FEDBHR7, 23 .EQU EPWM31_HRDELAY_FEDBHR6, 22 .EQU EPWM31_HRDELAY_FEDBHR5, 21 .EQU EPWM31_HRDELAY_FEDBHR4, 20 .EQU EPWM31_HRDELAY_FEDBHR3, 19 .EQU EPWM31_HRDELAY_FEDBHR2, 18 .EQU EPWM31_HRDELAY_FEDBHR1, 17 .EQU EPWM31_HRDELAY_FEDBHR0, 16 .EQU EPWM31_HRDELAY_REDAHR7, 15 .EQU EPWM31_HRDELAY_REDAHR6, 14 .EQU EPWM31_HRDELAY_REDAHR5, 13 .EQU EPWM31_HRDELAY_REDAHR4, 12 .EQU EPWM31_HRDELAY_REDAHR3, 11 .EQU EPWM31_HRDELAY_REDAHR2, 10 .EQU EPWM31_HRDELAY_REDAHR1, 9 .EQU EPWM31_HRDELAY_REDAHR0, 8 .EQU EPWM31_HRDELAY_FEDAHR7, 7 .EQU EPWM31_HRDELAY_FEDAHR6, 6 .EQU EPWM31_HRDELAY_FEDAHR5, 5 .EQU EPWM31_HRDELAY_FEDAHR4, 4 .EQU EPWM31_HRDELAY_FEDAHR3, 3 .EQU EPWM31_HRDELAY_FEDAHR2, 2 .EQU EPWM31_HRDELAY_FEDAHR1, 1 .EQU EPWM31_HRDELAY_FEDAHR0, 0 // register------------------------------------- .EQU T31_CTL2, 0x40005284 // 0x4000 5284 T31_CTL2 Bits------------------------------------- .EQU T31_CTL2_LPHSEN, 24 .EQU T31_CTL2_CAPMOD, 23 .EQU T31_CTL2_CAPUF, 22 .EQU T31_CTL2_HRCFGUF, 21 .EQU T31_CTL2_HRPHSUF, 20 .EQU T31_CTL2_HRDBUF, 19 .EQU T31_CTL2_DBTUF, 18 .EQU T31_CTL2_HRPBUF, 17 .EQU T31_CTL2_HRPAUF, 16 .EQU T31_CTL2_EBFUF, 15 .EQU T31_CTL2_EAFUF, 14 .EQU T31_CTL2_PRFUF, 13 .EQU T31_CTL2_PPFUF, 12 .EQU T31_CTL2_CMDFUF, 11 .EQU T31_CTL2_CMCFUF, 10 .EQU T31_CTL2_CMBFUF, 9 .EQU T31_CTL2_CMAFUF, 8 .EQU T31_CTL2_TRGIOS, 7 .EQU T31_CTL2_SYNCIOS, 6 .EQU T31_CTL2_DUDBSEL, 5 .EQU T31_CTL2_DUDBEN, 4 .EQU T31_CTL2_BWINDTSEL, 3 .EQU T31_CTL2_BWINDPOL, 2 .EQU T31_CTL2_BWINDEN, 1 .EQU T31_CTL2_SWCLRPF, 0 // register------------------------------------- .EQU EPWM31_BWCFG, 0x40005288 // 0x4000 5288 EPWM31_BWCFG Bits------------------------------------- .EQU EPWM31_BWCFG_BWOFFSET15, 31 .EQU EPWM31_BWCFG_BWOFFSET14, 30 .EQU EPWM31_BWCFG_BWOFFSET13, 29 .EQU EPWM31_BWCFG_BWOFFSET12, 28 .EQU EPWM31_BWCFG_BWOFFSET11, 27 .EQU EPWM31_BWCFG_BWOFFSET10, 26 .EQU EPWM31_BWCFG_BWOFFSET9, 25 .EQU EPWM31_BWCFG_BWOFFSET8, 24 .EQU EPWM31_BWCFG_BWOFFSET7, 23 .EQU EPWM31_BWCFG_BWOFFSET6, 22 .EQU EPWM31_BWCFG_BWOFFSET5, 21 .EQU EPWM31_BWCFG_BWOFFSET4, 20 .EQU EPWM31_BWCFG_BWOFFSET3, 19 .EQU EPWM31_BWCFG_BWOFFSET2, 18 .EQU EPWM31_BWCFG_BWOFFSET1, 17 .EQU EPWM31_BWCFG_BWOFFSET0, 16 .EQU EPWM31_BWCFG_BWIDTH15, 15 .EQU EPWM31_BWCFG_BWIDTH14, 14 .EQU EPWM31_BWCFG_BWIDTH13, 13 .EQU EPWM31_BWCFG_BWIDTH12, 12 .EQU EPWM31_BWCFG_BWIDTH11, 11 .EQU EPWM31_BWCFG_BWIDTH10, 10 .EQU EPWM31_BWCFG_BWIDTH9, 9 .EQU EPWM31_BWCFG_BWIDTH8, 8 .EQU EPWM31_BWCFG_BWIDTH7, 7 .EQU EPWM31_BWCFG_BWIDTH6, 6 .EQU EPWM31_BWCFG_BWIDTH5, 5 .EQU EPWM31_BWCFG_BWIDTH4, 4 .EQU EPWM31_BWCFG_BWIDTH3, 3 .EQU EPWM31_BWCFG_BWIDTH2, 2 .EQU EPWM31_BWCFG_BWIDTH1, 1 .EQU EPWM31_BWCFG_BWIDTH0, 0 // register------------------------------------- .EQU EPWM31_BWCNT, 0x4000528C // 0x4000 528C EPWM31_BWCNT Bits------------------------------------- .EQU EPWM31_BWCNT_WITCNT15, 31 .EQU EPWM31_BWCNT_WITCNT14, 30 .EQU EPWM31_BWCNT_WITCNT13, 29 .EQU EPWM31_BWCNT_WITCNT12, 28 .EQU EPWM31_BWCNT_WITCNT11, 27 .EQU EPWM31_BWCNT_WITCNT10, 26 .EQU EPWM31_BWCNT_WITCNT9, 25 .EQU EPWM31_BWCNT_WITCNT8, 24 .EQU EPWM31_BWCNT_WITCNT7, 23 .EQU EPWM31_BWCNT_WITCNT6, 22 .EQU EPWM31_BWCNT_WITCNT5, 21 .EQU EPWM31_BWCNT_WITCNT4, 20 .EQU EPWM31_BWCNT_WITCNT3, 19 .EQU EPWM31_BWCNT_WITCNT2, 18 .EQU EPWM31_BWCNT_WITCNT1, 17 .EQU EPWM31_BWCNT_WITCNT0, 16 .EQU EPWM31_BWCNT_OFFCNT15, 15 .EQU EPWM31_BWCNT_OFFCNT14, 14 .EQU EPWM31_BWCNT_OFFCNT13, 13 .EQU EPWM31_BWCNT_OFFCNT12, 12 .EQU EPWM31_BWCNT_OFFCNT11, 11 .EQU EPWM31_BWCNT_OFFCNT10, 10 .EQU EPWM31_BWCNT_OFFCNT9, 9 .EQU EPWM31_BWCNT_OFFCNT8, 8 .EQU EPWM31_BWCNT_OFFCNT7, 7 .EQU EPWM31_BWCNT_OFFCNT6, 6 .EQU EPWM31_BWCNT_OFFCNT5, 5 .EQU EPWM31_BWCNT_OFFCNT4, 4 .EQU EPWM31_BWCNT_OFFCNT3, 3 .EQU EPWM31_BWCNT_OFFCNT2, 2 .EQU EPWM31_BWCNT_OFFCNT1, 1 .EQU EPWM31_BWCNT_OFFCNT0, 0 // register------------------------------------- .EQU EPWM31_ETCTL2, 0x40005290 // 0x4000 5290 EPWM31_ETCTL2 Bits------------------------------------- .EQU EPWM31_ETCTL2_BT3, 26 .EQU EPWM31_ETCTL2_BT2, 25 .EQU EPWM31_ETCTL2_BT1, 24 .EQU EPWM31_ETCTL2_BT0, 23 .EQU EPWM31_ETCTL2_BPP3, 22 .EQU EPWM31_ETCTL2_BPP2, 21 .EQU EPWM31_ETCTL2_BPP1, 20 .EQU EPWM31_ETCTL2_BPP0, 19 .EQU EPWM31_ETCTL2_SELB2, 18 .EQU EPWM31_ETCTL2_SELB1, 17 .EQU EPWM31_ETCTL2_SELB0, 16 .EQU EPWM31_ETCTL2_AT3, 10 .EQU EPWM31_ETCTL2_AT2, 9 .EQU EPWM31_ETCTL2_AT1, 8 .EQU EPWM31_ETCTL2_AT0, 7 .EQU EPWM31_ETCTL2_APP3, 6 .EQU EPWM31_ETCTL2_APP2, 5 .EQU EPWM31_ETCTL2_APP1, 4 .EQU EPWM31_ETCTL2_APP0, 3 .EQU EPWM31_ETCTL2_SELA2, 2 .EQU EPWM31_ETCTL2_SELA1, 1 .EQU EPWM31_ETCTL2_SELA0, 0 // register------------------------------------- .EQU EPWM31_GLDCTL, 0x40005294 // 0x4000 5294 EPWM31_GLDCTL Bits------------------------------------- .EQU EPWM31_GLDCTL_HRCFGUDSEL1, 22 .EQU EPWM31_GLDCTL_HRCFGUDSEL0, 21 .EQU EPWM31_GLDCTL_HRCFGUDEN, 20 .EQU EPWM31_GLDCTL_HRPHSUDSEL1, 19 .EQU EPWM31_GLDCTL_HRPHSUDSEL0, 18 .EQU EPWM31_GLDCTL_HRPHSUDEN, 17 .EQU EPWM31_GLDCTL_HRDBUDSEL1, 16 .EQU EPWM31_GLDCTL_HRDBUDSEL0, 15 .EQU EPWM31_GLDCTL_HRDBUDEN, 14 .EQU EPWM31_GLDCTL_DBUDSEL1, 13 .EQU EPWM31_GLDCTL_DBUDSEL0, 12 .EQU EPWM31_GLDCTL_DBUDEN, 11 .EQU EPWM31_GLDCTL_HRPBUDSEL1, 10 .EQU EPWM31_GLDCTL_HRPBUDSEL0, 9 .EQU EPWM31_GLDCTL_HRPBUDEN, 8 .EQU EPWM31_GLDCTL_CLDPRCS7, 7 .EQU EPWM31_GLDCTL_CLDPRCS6, 6 .EQU EPWM31_GLDCTL_CLDPRCS5, 5 .EQU EPWM31_GLDCTL_CLDPRCS4, 4 .EQU EPWM31_GLDCTL_CLDPRCS3, 3 .EQU EPWM31_GLDCTL_CLDPRCS2, 2 .EQU EPWM31_GLDCTL_CLDPRCS1, 1 .EQU EPWM31_GLDCTL_CLDPRCS0, 0 // register------------------------------------- .EQU EPWM31_FILTCTL, 0x40005298 // 0x4000 5298 EPWM31_FILTCTL Bits------------------------------------- .EQU EPWM31_FILTCTL_SYDELAY2, 23 .EQU EPWM31_FILTCTL_SYDELAY1, 22 .EQU EPWM31_FILTCTL_SYDELAY0, 21 .EQU EPWM31_FILTCTL_SYFDIV3, 20 .EQU EPWM31_FILTCTL_SYFDIV2, 19 .EQU EPWM31_FILTCTL_SYFDIV1, 18 .EQU EPWM31_FILTCTL_SYFDIV0, 17 .EQU EPWM31_FILTCTL_SYNCFEN, 16 .EQU EPWM31_FILTCTL_TCKDELAY2, 15 .EQU EPWM31_FILTCTL_TCKDELAY1, 14 .EQU EPWM31_FILTCTL_TCKDELAY0, 13 .EQU EPWM31_FILTCTL_TCKFDIV3, 12 .EQU EPWM31_FILTCTL_TCKFDIV2, 11 .EQU EPWM31_FILTCTL_TCKFDIV1, 10 .EQU EPWM31_FILTCTL_TCKFDIV0, 9 .EQU EPWM31_FILTCTL_TXCKFEN, 8 .EQU EPWM31_FILTCTL_CFDELAY2, 7 .EQU EPWM31_FILTCTL_CFDELAY1, 6 .EQU EPWM31_FILTCTL_CFDELAY0, 5 .EQU EPWM31_FILTCTL_CFDIV3, 4 .EQU EPWM31_FILTCTL_CFDIV2, 3 .EQU EPWM31_FILTCTL_CFDIV1, 2 .EQU EPWM31_FILTCTL_CFDIV0, 1 .EQU EPWM31_FILTCTL_CAPFEN, 0 // register------------------------------------- .EQU T32_CNT, 0x40005300 // 0x4000 5300 T32_CNT Bits------------------------------------- .EQU T32_CNT_TXCNT31, 31 .EQU T32_CNT_TXCNT30, 30 .EQU T32_CNT_TXCNT29, 29 .EQU T32_CNT_TXCNT28, 28 .EQU T32_CNT_TXCNT27, 27 .EQU T32_CNT_TXCNT26, 26 .EQU T32_CNT_TXCNT25, 25 .EQU T32_CNT_TXCNT24, 24 .EQU T32_CNT_TXCNT23, 23 .EQU T32_CNT_TXCNT22, 22 .EQU T32_CNT_TXCNT21, 21 .EQU T32_CNT_TXCNT20, 20 .EQU T32_CNT_TXCNT19, 19 .EQU T32_CNT_TXCNT18, 18 .EQU T32_CNT_TXCNT17, 17 .EQU T32_CNT_TXCNT16, 16 .EQU T32_CNT_TXCNT15, 15 .EQU T32_CNT_TXCNT14, 14 .EQU T32_CNT_TXCNT13, 13 .EQU T32_CNT_TXCNT12, 12 .EQU T32_CNT_TXCNT11, 11 .EQU T32_CNT_TXCNT10, 10 .EQU T32_CNT_TXCNT9, 9 .EQU T32_CNT_TXCNT8, 8 .EQU T32_CNT_TXCNT7, 7 .EQU T32_CNT_TXCNT6, 6 .EQU T32_CNT_TXCNT5, 5 .EQU T32_CNT_TXCNT4, 4 .EQU T32_CNT_TXCNT3, 3 .EQU T32_CNT_TXCNT2, 2 .EQU T32_CNT_TXCNT1, 1 .EQU T32_CNT_TXCNT0, 0 // register------------------------------------- .EQU T32_PHS, 0x40005304 // 0x4000 5304 T32_PHS Bits------------------------------------- .EQU T32_PHS_TXPHS31, 31 .EQU T32_PHS_TXPHS30, 30 .EQU T32_PHS_TXPHS29, 29 .EQU T32_PHS_TXPHS28, 28 .EQU T32_PHS_TXPHS27, 27 .EQU T32_PHS_TXPHS26, 26 .EQU T32_PHS_TXPHS25, 25 .EQU T32_PHS_TXPHS24, 24 .EQU T32_PHS_TXPHS23, 23 .EQU T32_PHS_TXPHS22, 22 .EQU T32_PHS_TXPHS21, 21 .EQU T32_PHS_TXPHS20, 20 .EQU T32_PHS_TXPHS19, 19 .EQU T32_PHS_TXPHS18, 18 .EQU T32_PHS_TXPHS17, 17 .EQU T32_PHS_TXPHS16, 16 .EQU T32_PHS_TXPHS15, 15 .EQU T32_PHS_TXPHS14, 14 .EQU T32_PHS_TXPHS13, 13 .EQU T32_PHS_TXPHS12, 12 .EQU T32_PHS_TXPHS11, 11 .EQU T32_PHS_TXPHS10, 10 .EQU T32_PHS_TXPHS9, 9 .EQU T32_PHS_TXPHS8, 8 .EQU T32_PHS_TXPHS7, 7 .EQU T32_PHS_TXPHS6, 6 .EQU T32_PHS_TXPHS5, 5 .EQU T32_PHS_TXPHS4, 4 .EQU T32_PHS_TXPHS3, 3 .EQU T32_PHS_TXPHS2, 2 .EQU T32_PHS_TXPHS1, 1 .EQU T32_PHS_TXPHS0, 0 // register------------------------------------- .EQU T32_PPX, 0x40005308 // 0x4000 5308 T32_PPX Bits------------------------------------- .EQU T32_PPX_PPX31, 31 .EQU T32_PPX_PPX30, 30 .EQU T32_PPX_PPX29, 29 .EQU T32_PPX_PPX28, 28 .EQU T32_PPX_PPX27, 27 .EQU T32_PPX_PPX26, 26 .EQU T32_PPX_PPX25, 25 .EQU T32_PPX_PPX24, 24 .EQU T32_PPX_PPX23, 23 .EQU T32_PPX_PPX22, 22 .EQU T32_PPX_PPX21, 21 .EQU T32_PPX_PPX20, 20 .EQU T32_PPX_PPX19, 19 .EQU T32_PPX_PPX18, 18 .EQU T32_PPX_PPX17, 17 .EQU T32_PPX_PPX16, 16 .EQU T32_PPX_PPX15, 15 .EQU T32_PPX_PPX14, 14 .EQU T32_PPX_PPX13, 13 .EQU T32_PPX_PPX12, 12 .EQU T32_PPX_PPX11, 11 .EQU T32_PPX_PPX10, 10 .EQU T32_PPX_PPX9, 9 .EQU T32_PPX_PPX8, 8 .EQU T32_PPX_PPX7, 7 .EQU T32_PPX_PPX6, 6 .EQU T32_PPX_PPX5, 5 .EQU T32_PPX_PPX4, 4 .EQU T32_PPX_PPX3, 3 .EQU T32_PPX_PPX2, 2 .EQU T32_PPX_PPX1, 1 .EQU T32_PPX_PPX0, 0 // register------------------------------------- .EQU T32_PRSC, 0x4000530C // 0x4000 530C T32_PRSC Bits------------------------------------- .EQU T32_PRSC_TXPRSC31, 31 .EQU T32_PRSC_TXPRSC30, 30 .EQU T32_PRSC_TXPRSC29, 29 .EQU T32_PRSC_TXPRSC28, 28 .EQU T32_PRSC_TXPRSC27, 27 .EQU T32_PRSC_TXPRSC26, 26 .EQU T32_PRSC_TXPRSC25, 25 .EQU T32_PRSC_TXPRSC24, 24 .EQU T32_PRSC_TXPRSC23, 23 .EQU T32_PRSC_TXPRSC22, 22 .EQU T32_PRSC_TXPRSC21, 21 .EQU T32_PRSC_TXPRSC20, 20 .EQU T32_PRSC_TXPRSC19, 19 .EQU T32_PRSC_TXPRSC18, 18 .EQU T32_PRSC_TXPRSC17, 17 .EQU T32_PRSC_TXPRSC16, 16 .EQU T32_PRSC_TXPRSC15, 15 .EQU T32_PRSC_TXPRSC14, 14 .EQU T32_PRSC_TXPRSC13, 13 .EQU T32_PRSC_TXPRSC12, 12 .EQU T32_PRSC_TXPRSC11, 11 .EQU T32_PRSC_TXPRSC10, 10 .EQU T32_PRSC_TXPRSC9, 9 .EQU T32_PRSC_TXPRSC8, 8 .EQU T32_PRSC_TXPRSC7, 7 .EQU T32_PRSC_TXPRSC6, 6 .EQU T32_PRSC_TXPRSC5, 5 .EQU T32_PRSC_TXPRSC4, 4 .EQU T32_PRSC_TXPRSC3, 3 .EQU T32_PRSC_TXPRSC2, 2 .EQU T32_PRSC_TXPRSC1, 1 .EQU T32_PRSC_TXPRSC0, 0 // register------------------------------------- .EQU T32_CTL, 0x40005310 // 0x4000 5310 T32_CTL Bits------------------------------------- .EQU T32_CTL_BLINKEN, 31 .EQU T32_CTL_UDSYNEN, 29 .EQU T32_CTL_HRLOCK, 28 .EQU T32_CTL_ETLOCK, 27 .EQU T32_CTL_PCLOCK, 26 .EQU T32_CTL_DBLOCK, 25 .EQU T32_CTL_AQLOCKB, 24 .EQU T32_CTL_AQLOCKA, 23 .EQU T32_CTL_CAPEN, 22 .EQU T32_CTL_CAPSEL, 21 .EQU T32_CTL_TXMAX, 19 .EQU T32_CTL_PHSDIR, 18 .EQU T32_CTL_SWFSYNC, 17 .EQU T32_CTL_SYNCOSEL1, 16 .EQU T32_CTL_SYNCOSEL0, 15 .EQU T32_CTL_PHSEN, 14 .EQU T32_CTL_SYNCI, 13 .EQU T32_CTL_TXUR, 12 .EQU T32_CTL_TXUDEVT, 11 .EQU T32_CTL_TXUDEN, 10 .EQU T32_CTL_TXCMS2, 9 .EQU T32_CTL_TXCMS1, 8 .EQU T32_CTL_TXCMS0, 7 .EQU T32_CTL_TXDIR, 6 .EQU T32_CTL_TXCLK1, 5 .EQU T32_CTL_TXCLK0, 4 .EQU T32_CTL_TXSY, 3 .EQU T32_CTL_TXGATE, 2 .EQU T32_CTL_TXCS, 1 .EQU T32_CTL_TXEN, 0 // register------------------------------------- .EQU EPWM32_RA, 0x40005314 // 0x4000 5314 EPWM32_RA Bits------------------------------------- .EQU EPWM32_RA_EPWMRA31, 31 .EQU EPWM32_RA_EPWMRA30, 30 .EQU EPWM32_RA_EPWMRA29, 29 .EQU EPWM32_RA_EPWMRA28, 28 .EQU EPWM32_RA_EPWMRA27, 27 .EQU EPWM32_RA_EPWMRA26, 26 .EQU EPWM32_RA_EPWMRA25, 25 .EQU EPWM32_RA_EPWMRA24, 24 .EQU EPWM32_RA_EPWMRA23, 23 .EQU EPWM32_RA_EPWMRA22, 22 .EQU EPWM32_RA_EPWMRA21, 21 .EQU EPWM32_RA_EPWMRA20, 20 .EQU EPWM32_RA_EPWMRA19, 19 .EQU EPWM32_RA_EPWMRA18, 18 .EQU EPWM32_RA_EPWMRA17, 17 .EQU EPWM32_RA_EPWMRA16, 16 .EQU EPWM32_RA_EPWMRA15, 15 .EQU EPWM32_RA_EPWMRA14, 14 .EQU EPWM32_RA_EPWMRA13, 13 .EQU EPWM32_RA_EPWMRA12, 12 .EQU EPWM32_RA_EPWMRA11, 11 .EQU EPWM32_RA_EPWMRA10, 10 .EQU EPWM32_RA_EPWMRA9, 9 .EQU EPWM32_RA_EPWMRA8, 8 .EQU EPWM32_RA_EPWMRA7, 7 .EQU EPWM32_RA_EPWMRA6, 6 .EQU EPWM32_RA_EPWMRA5, 5 .EQU EPWM32_RA_EPWMRA4, 4 .EQU EPWM32_RA_EPWMRA3, 3 .EQU EPWM32_RA_EPWMRA2, 2 .EQU EPWM32_RA_EPWMRA1, 1 .EQU EPWM32_RA_EPWMRA0, 0 // register------------------------------------- .EQU EPWM32_RB, 0x40005318 // 0x4000 5318 EPWM32_RB Bits------------------------------------- .EQU EPWM32_RB_EPWMRB31, 31 .EQU EPWM32_RB_EPWMRB30, 30 .EQU EPWM32_RB_EPWMRB29, 29 .EQU EPWM32_RB_EPWMRB28, 28 .EQU EPWM32_RB_EPWMRB27, 27 .EQU EPWM32_RB_EPWMRB26, 26 .EQU EPWM32_RB_EPWMRB25, 25 .EQU EPWM32_RB_EPWMRB24, 24 .EQU EPWM32_RB_EPWMRB23, 23 .EQU EPWM32_RB_EPWMRB22, 22 .EQU EPWM32_RB_EPWMRB21, 21 .EQU EPWM32_RB_EPWMRB20, 20 .EQU EPWM32_RB_EPWMRB19, 19 .EQU EPWM32_RB_EPWMRB18, 18 .EQU EPWM32_RB_EPWMRB17, 17 .EQU EPWM32_RB_EPWMRB16, 16 .EQU EPWM32_RB_EPWMRB15, 15 .EQU EPWM32_RB_EPWMRB14, 14 .EQU EPWM32_RB_EPWMRB13, 13 .EQU EPWM32_RB_EPWMRB12, 12 .EQU EPWM32_RB_EPWMRB11, 11 .EQU EPWM32_RB_EPWMRB10, 10 .EQU EPWM32_RB_EPWMRB9, 9 .EQU EPWM32_RB_EPWMRB8, 8 .EQU EPWM32_RB_EPWMRB7, 7 .EQU EPWM32_RB_EPWMRB6, 6 .EQU EPWM32_RB_EPWMRB5, 5 .EQU EPWM32_RB_EPWMRB4, 4 .EQU EPWM32_RB_EPWMRB3, 3 .EQU EPWM32_RB_EPWMRB2, 2 .EQU EPWM32_RB_EPWMRB1, 1 .EQU EPWM32_RB_EPWMRB0, 0 // register------------------------------------- .EQU EPWM32_CTLA, 0x4000531C // 0x4000 531C EPWM32_CTLA Bits------------------------------------- .EQU EPWM32_CTLA_OTSFA, 16 .EQU EPWM32_CTLA_ACTSFA1, 15 .EQU EPWM32_CTLA_ACTSFA0, 14 .EQU EPWM32_CTLA_CSFA1, 13 .EQU EPWM32_CTLA_CSFA0, 12 .EQU EPWM32_CTLA_ACBD1, 11 .EQU EPWM32_CTLA_ACBD0, 10 .EQU EPWM32_CTLA_ACBU1, 9 .EQU EPWM32_CTLA_ACBU0, 8 .EQU EPWM32_CTLA_ACAD1, 7 .EQU EPWM32_CTLA_ACAD0, 6 .EQU EPWM32_CTLA_ACAU1, 5 .EQU EPWM32_CTLA_ACAU0, 4 .EQU EPWM32_CTLA_APRD1, 3 .EQU EPWM32_CTLA_APRD0, 2 .EQU EPWM32_CTLA_AZRO1, 1 .EQU EPWM32_CTLA_AZRO0, 0 // register------------------------------------- .EQU EPWM32_CTLB, 0x40005320 // 0x4000 5320 EPWM32_CTLB Bits------------------------------------- .EQU EPWM32_CTLB_OTSFB, 16 .EQU EPWM32_CTLB_ACTSFB1, 15 .EQU EPWM32_CTLB_ACTSFB0, 14 .EQU EPWM32_CTLB_CSFB1, 13 .EQU EPWM32_CTLB_CSFB0, 12 .EQU EPWM32_CTLB_BCBD1, 11 .EQU EPWM32_CTLB_BCBD0, 10 .EQU EPWM32_CTLB_BCBU1, 9 .EQU EPWM32_CTLB_BCBU0, 8 .EQU EPWM32_CTLB_BCAD1, 7 .EQU EPWM32_CTLB_BCAD0, 6 .EQU EPWM32_CTLB_BCAU1, 5 .EQU EPWM32_CTLB_BCAU0, 4 .EQU EPWM32_CTLB_BPRD1, 3 .EQU EPWM32_CTLB_BPRD0, 2 .EQU EPWM32_CTLB_BZRO1, 1 .EQU EPWM32_CTLB_BZRO0, 0 // register------------------------------------- .EQU EPWM32_DBCTL, 0x40005324 // 0x4000 5324 EPWM32_DBCTL Bits------------------------------------- .EQU EPWM32_DBCTL_INMODE1, 5 .EQU EPWM32_DBCTL_INMODE0, 4 .EQU EPWM32_DBCTL_POLSEL1, 3 .EQU EPWM32_DBCTL_POLSEL0, 2 .EQU EPWM32_DBCTL_OUTMODE1, 1 .EQU EPWM32_DBCTL_OUTMODE0, 0 // register------------------------------------- .EQU EPWM32_DBT, 0x40005328 // 0x4000 5328 EPWM32_DBT Bits------------------------------------- .EQU EPWM32_DBT_RDBT15, 31 .EQU EPWM32_DBT_RDBT14, 30 .EQU EPWM32_DBT_RDBT13, 29 .EQU EPWM32_DBT_RDBT12, 28 .EQU EPWM32_DBT_RDBT11, 27 .EQU EPWM32_DBT_RDBT10, 26 .EQU EPWM32_DBT_RDBT9, 25 .EQU EPWM32_DBT_RDBT8, 24 .EQU EPWM32_DBT_RDBT7, 23 .EQU EPWM32_DBT_RDBT6, 22 .EQU EPWM32_DBT_RDBT5, 21 .EQU EPWM32_DBT_RDBT4, 20 .EQU EPWM32_DBT_RDBT3, 19 .EQU EPWM32_DBT_RDBT2, 18 .EQU EPWM32_DBT_RDBT1, 17 .EQU EPWM32_DBT_RDBT0, 16 .EQU EPWM32_DBT_FDBT15, 15 .EQU EPWM32_DBT_FDBT14, 14 .EQU EPWM32_DBT_FDBT13, 13 .EQU EPWM32_DBT_FDBT12, 12 .EQU EPWM32_DBT_FDBT11, 11 .EQU EPWM32_DBT_FDBT10, 10 .EQU EPWM32_DBT_FDBT9, 9 .EQU EPWM32_DBT_FDBT8, 8 .EQU EPWM32_DBT_FDBT7, 7 .EQU EPWM32_DBT_FDBT6, 6 .EQU EPWM32_DBT_FDBT5, 5 .EQU EPWM32_DBT_FDBT4, 4 .EQU EPWM32_DBT_FDBT3, 3 .EQU EPWM32_DBT_FDBT2, 2 .EQU EPWM32_DBT_FDBT1, 1 .EQU EPWM32_DBT_FDBT0, 0 // register------------------------------------- .EQU EPWM32_PCCTL, 0x4000532C // 0x4000 532C EPWM32_PCCTL Bits------------------------------------- .EQU EPWM32_PCCTL_CHPFREQ2, 10 .EQU EPWM32_PCCTL_CHPFREQ1, 9 .EQU EPWM32_PCCTL_CHPFREQ0, 8 .EQU EPWM32_PCCTL_CHPDUTY2, 7 .EQU EPWM32_PCCTL_CHPDUTY1, 6 .EQU EPWM32_PCCTL_CHPDUTY0, 5 .EQU EPWM32_PCCTL_OSHTWTH3, 4 .EQU EPWM32_PCCTL_OSHTWTH2, 3 .EQU EPWM32_PCCTL_OSHTWTH1, 2 .EQU EPWM32_PCCTL_OSHTWTH0, 1 .EQU EPWM32_PCCTL_CHPEN, 0 // register------------------------------------- .EQU EPWM32_PXASCTL, 0x40005330 // 0x4000 5330 EPWM32_PXASCTL Bits------------------------------------- .EQU EPWM32_PXASCTL_PXRSEN, 8 .EQU EPWM32_PXASCTL_PXSSA1, 7 .EQU EPWM32_PXASCTL_PXSSA0, 6 .EQU EPWM32_PXASCTL_PXSSB1, 5 .EQU EPWM32_PXASCTL_PXSSB0, 4 .EQU EPWM32_PXASCTL_PXASE, 3 .EQU EPWM32_PXASCTL_PXASS2, 2 .EQU EPWM32_PXASCTL_PXASS1, 1 .EQU EPWM32_PXASCTL_PXASS0, 0 // register------------------------------------- .EQU EPWM32_ETCTL, 0x40005334 // 0x4000 5334 EPWM32_ETCTL Bits------------------------------------- .EQU EPWM32_ETCTL_BTSEL1, 25 .EQU EPWM32_ETCTL_BTSEL0, 24 .EQU EPWM32_ETCTL_FRCB, 19 .EQU EPWM32_ETCTL_TOADENB, 16 .EQU EPWM32_ETCTL_ATSEL1, 9 .EQU EPWM32_ETCTL_ATSEL0, 8 .EQU EPWM32_ETCTL_FRCA, 3 .EQU EPWM32_ETCTL_TOADENA, 0 // register------------------------------------- .EQU EPWM32_IE, 0x40005338 // 0x4000 5338 EPWM32_IE Bits------------------------------------- .EQU EPWM32_IE_CAPIE, 9 .EQU EPWM32_IE_TXDIE, 8 .EQU EPWM32_IE_TXCIE, 7 .EQU EPWM32_IE_TXAIE, 6 .EQU EPWM32_IE_TXBIE, 5 .EQU EPWM32_IE_TXIE, 4 .EQU EPWM32_IE_TXUIE, 3 .EQU EPWM32_IE_TXGIE, 2 .EQU EPWM32_IE_TXTIE1, 1 .EQU EPWM32_IE_TXTIE0, 0 // register------------------------------------- .EQU EPWM32_IF, 0x4000533C // 0x4000 533C EPWM32_IF Bits------------------------------------- .EQU EPWM32_IF_CAPIF, 9 .EQU EPWM32_IF_TXDIF, 8 .EQU EPWM32_IF_TXCIF, 7 .EQU EPWM32_IF_TXAIF, 6 .EQU EPWM32_IF_TXBIF, 5 .EQU EPWM32_IF_TXIF, 4 .EQU EPWM32_IF_TXUIF, 3 .EQU EPWM32_IF_TXGIF, 2 .EQU EPWM32_IF_TXTIF1, 1 .EQU EPWM32_IF_TXTIF0, 0 // register------------------------------------- .EQU EPWM32_IC, 0x40005340 // 0x4000 5340 EPWM32_IC Bits------------------------------------- .EQU EPWM32_IC_CAPIC1, 10 .EQU EPWM32_IC_CAPIC0, 9 .EQU EPWM32_IC_TXDIC, 8 .EQU EPWM32_IC_TXCIC, 7 .EQU EPWM32_IC_TXAIC, 6 .EQU EPWM32_IC_TXBIC, 5 .EQU EPWM32_IC_TXIC, 4 .EQU EPWM32_IC_TXUIC, 3 .EQU EPWM32_IC_TXGIC, 2 .EQU EPWM32_IC_TXTIC1, 1 .EQU EPWM32_IC_TXTIC0, 0 // register------------------------------------- .EQU EPWM32_DE, 0x40005344 // 0x4000 5344 EPWM32_DE Bits------------------------------------- .EQU EPWM32_DE_TXDDE, 8 .EQU EPWM32_DE_TXCDE, 7 .EQU EPWM32_DE_TXADE, 6 .EQU EPWM32_DE_TXBDE, 5 .EQU EPWM32_DE_TXDE, 4 .EQU EPWM32_DE_TXUDE, 3 .EQU EPWM32_DE_TXGDE, 2 .EQU EPWM32_DE_TXTDE1, 1 .EQU EPWM32_DE_TXTDE0, 0 // register------------------------------------- .EQU EPWM32_DF, 0x40005348 // 0x4000 5348 EPWM32_DF Bits------------------------------------- .EQU EPWM32_DF_TXDDF, 8 .EQU EPWM32_DF_TXCDF, 7 .EQU EPWM32_DF_TXADF, 6 .EQU EPWM32_DF_TXBDF, 5 .EQU EPWM32_DF_TXDF, 4 .EQU EPWM32_DF_TXUDF, 3 .EQU EPWM32_DF_TXGDF, 2 .EQU EPWM32_DF_TXTDF1, 1 .EQU EPWM32_DF_TXTDF0, 0 // register------------------------------------- .EQU EPWM32_HRPWMCTLA, 0x40005350 // 0x4000 5350 EPWM32_HRPWMCTLA Bits------------------------------------- .EQU EPWM32_HRPWMCTLA_HRPHSENA, 6 .EQU EPWM32_HRPWMCTLA_HRFENA, 5 .EQU EPWM32_HRPWMCTLA_HRRENA, 4 .EQU EPWM32_HRPWMCTLA_HRPENA, 3 .EQU EPWM32_HRPWMCTLA_HRDENA, 2 .EQU EPWM32_HRPWMCTLA_HRSELA, 1 .EQU EPWM32_HRPWMCTLA_HRENA, 0 // register------------------------------------- .EQU EPWM32_HRCMPA, 0x40005354 // 0x4000 5354 EPWM32_HRCMPA Bits------------------------------------- .EQU EPWM32_HRCMPA_HRCMPA7, 7 .EQU EPWM32_HRCMPA_HRCMPA6, 6 .EQU EPWM32_HRCMPA_HRCMPA5, 5 .EQU EPWM32_HRCMPA_HRCMPA4, 4 .EQU EPWM32_HRCMPA_HRCMPA3, 3 .EQU EPWM32_HRCMPA_HRCMPA2, 2 .EQU EPWM32_HRCMPA_HRCMPA1, 1 .EQU EPWM32_HRCMPA_HRCMPA0, 0 // register------------------------------------- .EQU EPWM32_CAP, 0x40005358 // 0x4000 5358 EPWM32_CAP Bits------------------------------------- .EQU EPWM32_CAP_CAP31, 31 .EQU EPWM32_CAP_CAP30, 30 .EQU EPWM32_CAP_CAP29, 29 .EQU EPWM32_CAP_CAP28, 28 .EQU EPWM32_CAP_CAP27, 27 .EQU EPWM32_CAP_CAP26, 26 .EQU EPWM32_CAP_CAP25, 25 .EQU EPWM32_CAP_CAP24, 24 .EQU EPWM32_CAP_CAP23, 23 .EQU EPWM32_CAP_CAP22, 22 .EQU EPWM32_CAP_CAP21, 21 .EQU EPWM32_CAP_CAP20, 20 .EQU EPWM32_CAP_CAP19, 19 .EQU EPWM32_CAP_CAP18, 18 .EQU EPWM32_CAP_CAP17, 17 .EQU EPWM32_CAP_CAP16, 16 .EQU EPWM32_CAP_CAP15, 15 .EQU EPWM32_CAP_CAP14, 14 .EQU EPWM32_CAP_CAP13, 13 .EQU EPWM32_CAP_CAP12, 12 .EQU EPWM32_CAP_CAP11, 11 .EQU EPWM32_CAP_CAP10, 10 .EQU EPWM32_CAP_CAP9, 9 .EQU EPWM32_CAP_CAP8, 8 .EQU EPWM32_CAP_CAP7, 7 .EQU EPWM32_CAP_CAP6, 6 .EQU EPWM32_CAP_CAP5, 5 .EQU EPWM32_CAP_CAP4, 4 .EQU EPWM32_CAP_CAP3, 3 .EQU EPWM32_CAP_CAP2, 2 .EQU EPWM32_CAP_CAP1, 1 .EQU EPWM32_CAP_CAP0, 0 // register------------------------------------- .EQU EPWM32_RC, 0x4000535C // 0x4000 535C EPWM32_RC Bits------------------------------------- .EQU EPWM32_RC_EPWMRC31, 31 .EQU EPWM32_RC_EPWMRC30, 30 .EQU EPWM32_RC_EPWMRC29, 29 .EQU EPWM32_RC_EPWMRC28, 28 .EQU EPWM32_RC_EPWMRC27, 27 .EQU EPWM32_RC_EPWMRC26, 26 .EQU EPWM32_RC_EPWMRC25, 25 .EQU EPWM32_RC_EPWMRC24, 24 .EQU EPWM32_RC_EPWMRC23, 23 .EQU EPWM32_RC_EPWMRC22, 22 .EQU EPWM32_RC_EPWMRC21, 21 .EQU EPWM32_RC_EPWMRC20, 20 .EQU EPWM32_RC_EPWMRC19, 19 .EQU EPWM32_RC_EPWMRC18, 18 .EQU EPWM32_RC_EPWMRC17, 17 .EQU EPWM32_RC_EPWMRC16, 16 .EQU EPWM32_RC_EPWMRC15, 15 .EQU EPWM32_RC_EPWMRC14, 14 .EQU EPWM32_RC_EPWMRC13, 13 .EQU EPWM32_RC_EPWMRC12, 12 .EQU EPWM32_RC_EPWMRC11, 11 .EQU EPWM32_RC_EPWMRC10, 10 .EQU EPWM32_RC_EPWMRC9, 9 .EQU EPWM32_RC_EPWMRC8, 8 .EQU EPWM32_RC_EPWMRC7, 7 .EQU EPWM32_RC_EPWMRC6, 6 .EQU EPWM32_RC_EPWMRC5, 5 .EQU EPWM32_RC_EPWMRC4, 4 .EQU EPWM32_RC_EPWMRC3, 3 .EQU EPWM32_RC_EPWMRC2, 2 .EQU EPWM32_RC_EPWMRC1, 1 .EQU EPWM32_RC_EPWMRC0, 0 // register------------------------------------- .EQU EPWM32_RD, 0x40005360 // 0x4000 5360 EPWM32_RD Bits------------------------------------- .EQU EPWM32_RD_EPWMRD31, 31 .EQU EPWM32_RD_EPWMRD30, 30 .EQU EPWM32_RD_EPWMRD29, 29 .EQU EPWM32_RD_EPWMRD28, 28 .EQU EPWM32_RD_EPWMRD27, 27 .EQU EPWM32_RD_EPWMRD26, 26 .EQU EPWM32_RD_EPWMRD25, 25 .EQU EPWM32_RD_EPWMRD24, 24 .EQU EPWM32_RD_EPWMRD23, 23 .EQU EPWM32_RD_EPWMRD22, 22 .EQU EPWM32_RD_EPWMRD21, 21 .EQU EPWM32_RD_EPWMRD20, 20 .EQU EPWM32_RD_EPWMRD19, 19 .EQU EPWM32_RD_EPWMRD18, 18 .EQU EPWM32_RD_EPWMRD17, 17 .EQU EPWM32_RD_EPWMRD16, 16 .EQU EPWM32_RD_EPWMRD15, 15 .EQU EPWM32_RD_EPWMRD14, 14 .EQU EPWM32_RD_EPWMRD13, 13 .EQU EPWM32_RD_EPWMRD12, 12 .EQU EPWM32_RD_EPWMRD11, 11 .EQU EPWM32_RD_EPWMRD10, 10 .EQU EPWM32_RD_EPWMRD9, 9 .EQU EPWM32_RD_EPWMRD8, 8 .EQU EPWM32_RD_EPWMRD7, 7 .EQU EPWM32_RD_EPWMRD6, 6 .EQU EPWM32_RD_EPWMRD5, 5 .EQU EPWM32_RD_EPWMRD4, 4 .EQU EPWM32_RD_EPWMRD3, 3 .EQU EPWM32_RD_EPWMRD2, 2 .EQU EPWM32_RD_EPWMRD1, 1 .EQU EPWM32_RD_EPWMRD0, 0 // register------------------------------------- .EQU EPWM32_UDCTL, 0x40005364 // 0x4000 5364 EPWM32_UDCTL Bits------------------------------------- .EQU EPWM32_UDCTL_GBUDEN, 27 .EQU EPWM32_UDCTL_HRPUDSEL1, 26 .EQU EPWM32_UDCTL_HRPUDSEL0, 25 .EQU EPWM32_UDCTL_HRPUDEN, 24 .EQU EPWM32_UDCTL_EBUDSEL1, 23 .EQU EPWM32_UDCTL_EBUDSEL0, 22 .EQU EPWM32_UDCTL_EBUDEN, 21 .EQU EPWM32_UDCTL_EAUDSEL1, 20 .EQU EPWM32_UDCTL_EAUDSEL0, 19 .EQU EPWM32_UDCTL_EAUDEN, 18 .EQU EPWM32_UDCTL_CMDUDSEL1, 17 .EQU EPWM32_UDCTL_CMDUDSEL0, 16 .EQU EPWM32_UDCTL_CMDUDEN, 15 .EQU EPWM32_UDCTL_CMCUDSEL1, 14 .EQU EPWM32_UDCTL_CMCUDSEL0, 13 .EQU EPWM32_UDCTL_CMCUDEN, 12 .EQU EPWM32_UDCTL_CMBUDSEL1, 11 .EQU EPWM32_UDCTL_CMBUDSEL0, 10 .EQU EPWM32_UDCTL_CMBUDEN, 9 .EQU EPWM32_UDCTL_CMAUDSEL1, 8 .EQU EPWM32_UDCTL_CMAUDSEL0, 7 .EQU EPWM32_UDCTL_CMAUDEN, 6 .EQU EPWM32_UDCTL_PRUDSEL1, 5 .EQU EPWM32_UDCTL_PRUDSEL0, 4 .EQU EPWM32_UDCTL_PRUDEN, 3 .EQU EPWM32_UDCTL_PPUDSEL1, 2 .EQU EPWM32_UDCTL_PPUDSEL0, 1 .EQU EPWM32_UDCTL_PPUDEN, 0 // register------------------------------------- .EQU EPWM32_SRT, 0x40005368 // 0x4000 5368 EPWM32_SRT Bits------------------------------------- .EQU EPWM32_SRT_T31, 31 .EQU EPWM32_SRT_T30, 30 .EQU EPWM32_SRT_T29, 29 .EQU EPWM32_SRT_T28, 28 .EQU EPWM32_SRT_T27, 27 .EQU EPWM32_SRT_T26, 26 .EQU EPWM32_SRT_T25, 25 .EQU EPWM32_SRT_T24, 24 .EQU EPWM32_SRT_T23, 23 .EQU EPWM32_SRT_T22, 22 .EQU EPWM32_SRT_T21, 21 .EQU EPWM32_SRT_T20, 20 .EQU EPWM32_SRT_T19, 19 .EQU EPWM32_SRT_T18, 18 .EQU EPWM32_SRT_T17, 17 .EQU EPWM32_SRT_T16, 16 .EQU EPWM32_SRT_T15, 15 .EQU EPWM32_SRT_T14, 14 .EQU EPWM32_SRT_T13, 13 .EQU EPWM32_SRT_T12, 12 .EQU EPWM32_SRT_T11, 11 .EQU EPWM32_SRT_T10, 10 .EQU EPWM32_SRT_T9, 9 .EQU EPWM32_SRT_T8, 8 .EQU EPWM32_SRT_T7, 7 .EQU EPWM32_SRT_T6, 6 .EQU EPWM32_SRT_T5, 5 .EQU EPWM32_SRT_T4, 4 .EQU EPWM32_SRT_T3, 3 .EQU EPWM32_SRT_T2, 2 .EQU EPWM32_SRT_T1, 1 .EQU EPWM32_SRT_T0, 0 // register------------------------------------- .EQU EPWM32_HRPWMCTLB, 0x4000536C // 0x4000 536C EPWM32_HRPWMCTLB Bits------------------------------------- .EQU EPWM32_HRPWMCTLB_HRPHSENB, 6 .EQU EPWM32_HRPWMCTLB_HRFENB, 5 .EQU EPWM32_HRPWMCTLB_HRRENB, 4 .EQU EPWM32_HRPWMCTLB_HRPENB, 3 .EQU EPWM32_HRPWMCTLB_HRDENB, 2 .EQU EPWM32_HRPWMCTLB_HRSELB, 1 .EQU EPWM32_HRPWMCTLB_HRENB, 0 // register------------------------------------- .EQU EPWM32_HRCMPB, 0x40005370 // 0x4000 5370 EPWM32_HRCMPB Bits------------------------------------- .EQU EPWM32_HRCMPB_HRCMPB7, 7 .EQU EPWM32_HRCMPB_HRCMPB6, 6 .EQU EPWM32_HRCMPB_HRCMPB5, 5 .EQU EPWM32_HRCMPB_HRCMPB4, 4 .EQU EPWM32_HRCMPB_HRCMPB3, 3 .EQU EPWM32_HRCMPB_HRCMPB2, 2 .EQU EPWM32_HRCMPB_HRCMPB1, 1 .EQU EPWM32_HRCMPB_HRCMPB0, 0 // register------------------------------------- .EQU EPWM32_HRDB, 0x40005374 // 0x4000 5374 EPWM32_HRDB Bits------------------------------------- .EQU EPWM32_HRDB_HRR7, 15 .EQU EPWM32_HRDB_HRR6, 14 .EQU EPWM32_HRDB_HRR5, 13 .EQU EPWM32_HRDB_HRR4, 12 .EQU EPWM32_HRDB_HRR3, 11 .EQU EPWM32_HRDB_HRR2, 10 .EQU EPWM32_HRDB_HRR1, 9 .EQU EPWM32_HRDB_HRR0, 8 .EQU EPWM32_HRDB_HRF7, 7 .EQU EPWM32_HRDB_HRF6, 6 .EQU EPWM32_HRDB_HRF5, 5 .EQU EPWM32_HRDB_HRF4, 4 .EQU EPWM32_HRDB_HRF3, 3 .EQU EPWM32_HRDB_HRF2, 2 .EQU EPWM32_HRDB_HRF1, 1 .EQU EPWM32_HRDB_HRF0, 0 // register------------------------------------- .EQU EPWM32_HRPHS, 0x40005378 // 0x4000 5378 EPWM32_HRPHS Bits------------------------------------- .EQU EPWM32_HRPHS_HRPRE7, 15 .EQU EPWM32_HRPHS_HRPRE6, 14 .EQU EPWM32_HRPHS_HRPRE5, 13 .EQU EPWM32_HRPHS_HRPRE4, 12 .EQU EPWM32_HRPHS_HRPRE3, 11 .EQU EPWM32_HRPHS_HRPRE2, 10 .EQU EPWM32_HRPHS_HRPRE1, 9 .EQU EPWM32_HRPHS_HRPRE0, 8 .EQU EPWM32_HRPHS_HRPHS7, 7 .EQU EPWM32_HRPHS_HRPHS6, 6 .EQU EPWM32_HRPHS_HRPHS5, 5 .EQU EPWM32_HRPHS_HRPHS4, 4 .EQU EPWM32_HRPHS_HRPHS3, 3 .EQU EPWM32_HRPHS_HRPHS2, 2 .EQU EPWM32_HRPHS_HRPHS1, 1 .EQU EPWM32_HRPHS_HRPHS0, 0 // register------------------------------------- .EQU EPWM32_HRCFG, 0x4000537C // 0x4000 537C EPWM32_HRCFG Bits------------------------------------- .EQU EPWM32_HRCFG_STEP7, 15 .EQU EPWM32_HRCFG_STEP6, 14 .EQU EPWM32_HRCFG_STEP5, 13 .EQU EPWM32_HRCFG_STEP4, 12 .EQU EPWM32_HRCFG_STEP3, 11 .EQU EPWM32_HRCFG_STEP2, 10 .EQU EPWM32_HRCFG_STEP1, 9 .EQU EPWM32_HRCFG_STEP0, 8 .EQU EPWM32_HRCFG_TIMS7, 7 .EQU EPWM32_HRCFG_TIMS6, 6 .EQU EPWM32_HRCFG_TIMS5, 5 .EQU EPWM32_HRCFG_TIMS4, 4 .EQU EPWM32_HRCFG_TIMS3, 3 .EQU EPWM32_HRCFG_TIMS2, 2 .EQU EPWM32_HRCFG_TIMS1, 1 .EQU EPWM32_HRCFG_TIMS0, 0 // register------------------------------------- .EQU EPWM32_HRDELAY, 0x40005380 // 0x4000 5380 EPWM32_HRDELAY Bits------------------------------------- .EQU EPWM32_HRDELAY_REDBHR7, 31 .EQU EPWM32_HRDELAY_REDBHR6, 30 .EQU EPWM32_HRDELAY_REDBHR5, 29 .EQU EPWM32_HRDELAY_REDBHR4, 28 .EQU EPWM32_HRDELAY_REDBHR3, 27 .EQU EPWM32_HRDELAY_REDBHR2, 26 .EQU EPWM32_HRDELAY_REDBHR1, 25 .EQU EPWM32_HRDELAY_REDBHR0, 24 .EQU EPWM32_HRDELAY_FEDBHR7, 23 .EQU EPWM32_HRDELAY_FEDBHR6, 22 .EQU EPWM32_HRDELAY_FEDBHR5, 21 .EQU EPWM32_HRDELAY_FEDBHR4, 20 .EQU EPWM32_HRDELAY_FEDBHR3, 19 .EQU EPWM32_HRDELAY_FEDBHR2, 18 .EQU EPWM32_HRDELAY_FEDBHR1, 17 .EQU EPWM32_HRDELAY_FEDBHR0, 16 .EQU EPWM32_HRDELAY_REDAHR7, 15 .EQU EPWM32_HRDELAY_REDAHR6, 14 .EQU EPWM32_HRDELAY_REDAHR5, 13 .EQU EPWM32_HRDELAY_REDAHR4, 12 .EQU EPWM32_HRDELAY_REDAHR3, 11 .EQU EPWM32_HRDELAY_REDAHR2, 10 .EQU EPWM32_HRDELAY_REDAHR1, 9 .EQU EPWM32_HRDELAY_REDAHR0, 8 .EQU EPWM32_HRDELAY_FEDAHR7, 7 .EQU EPWM32_HRDELAY_FEDAHR6, 6 .EQU EPWM32_HRDELAY_FEDAHR5, 5 .EQU EPWM32_HRDELAY_FEDAHR4, 4 .EQU EPWM32_HRDELAY_FEDAHR3, 3 .EQU EPWM32_HRDELAY_FEDAHR2, 2 .EQU EPWM32_HRDELAY_FEDAHR1, 1 .EQU EPWM32_HRDELAY_FEDAHR0, 0 // register------------------------------------- .EQU T32_CTL2, 0x40005384 // 0x4000 5384 T32_CTL2 Bits------------------------------------- .EQU T32_CTL2_LPHSEN, 24 .EQU T32_CTL2_CAPMOD, 23 .EQU T32_CTL2_CAPUF, 22 .EQU T32_CTL2_HRCFGUF, 21 .EQU T32_CTL2_HRPHSUF, 20 .EQU T32_CTL2_HRDBUF, 19 .EQU T32_CTL2_DBTUF, 18 .EQU T32_CTL2_HRPBUF, 17 .EQU T32_CTL2_HRPAUF, 16 .EQU T32_CTL2_EBFUF, 15 .EQU T32_CTL2_EAFUF, 14 .EQU T32_CTL2_PRFUF, 13 .EQU T32_CTL2_PPFUF, 12 .EQU T32_CTL2_CMDFUF, 11 .EQU T32_CTL2_CMCFUF, 10 .EQU T32_CTL2_CMBFUF, 9 .EQU T32_CTL2_CMAFUF, 8 .EQU T32_CTL2_TRGIOS, 7 .EQU T32_CTL2_SYNCIOS, 6 .EQU T32_CTL2_DUDBSEL, 5 .EQU T32_CTL2_DUDBEN, 4 .EQU T32_CTL2_BWINDTSEL, 3 .EQU T32_CTL2_BWINDPOL, 2 .EQU T32_CTL2_BWINDEN, 1 .EQU T32_CTL2_SWCLRPF, 0 // register------------------------------------- .EQU EPWM32_BWCFG, 0x40005388 // 0x4000 5388 EPWM32_BWCFG Bits------------------------------------- .EQU EPWM32_BWCFG_BWOFFSET15, 31 .EQU EPWM32_BWCFG_BWOFFSET14, 30 .EQU EPWM32_BWCFG_BWOFFSET13, 29 .EQU EPWM32_BWCFG_BWOFFSET12, 28 .EQU EPWM32_BWCFG_BWOFFSET11, 27 .EQU EPWM32_BWCFG_BWOFFSET10, 26 .EQU EPWM32_BWCFG_BWOFFSET9, 25 .EQU EPWM32_BWCFG_BWOFFSET8, 24 .EQU EPWM32_BWCFG_BWOFFSET7, 23 .EQU EPWM32_BWCFG_BWOFFSET6, 22 .EQU EPWM32_BWCFG_BWOFFSET5, 21 .EQU EPWM32_BWCFG_BWOFFSET4, 20 .EQU EPWM32_BWCFG_BWOFFSET3, 19 .EQU EPWM32_BWCFG_BWOFFSET2, 18 .EQU EPWM32_BWCFG_BWOFFSET1, 17 .EQU EPWM32_BWCFG_BWOFFSET0, 16 .EQU EPWM32_BWCFG_BWIDTH15, 15 .EQU EPWM32_BWCFG_BWIDTH14, 14 .EQU EPWM32_BWCFG_BWIDTH13, 13 .EQU EPWM32_BWCFG_BWIDTH12, 12 .EQU EPWM32_BWCFG_BWIDTH11, 11 .EQU EPWM32_BWCFG_BWIDTH10, 10 .EQU EPWM32_BWCFG_BWIDTH9, 9 .EQU EPWM32_BWCFG_BWIDTH8, 8 .EQU EPWM32_BWCFG_BWIDTH7, 7 .EQU EPWM32_BWCFG_BWIDTH6, 6 .EQU EPWM32_BWCFG_BWIDTH5, 5 .EQU EPWM32_BWCFG_BWIDTH4, 4 .EQU EPWM32_BWCFG_BWIDTH3, 3 .EQU EPWM32_BWCFG_BWIDTH2, 2 .EQU EPWM32_BWCFG_BWIDTH1, 1 .EQU EPWM32_BWCFG_BWIDTH0, 0 // register------------------------------------- .EQU EPWM32_BWCNT, 0x4000538C // 0x4000 538C EPWM32_BWCNT Bits------------------------------------- .EQU EPWM32_BWCNT_WITCNT15, 31 .EQU EPWM32_BWCNT_WITCNT14, 30 .EQU EPWM32_BWCNT_WITCNT13, 29 .EQU EPWM32_BWCNT_WITCNT12, 28 .EQU EPWM32_BWCNT_WITCNT11, 27 .EQU EPWM32_BWCNT_WITCNT10, 26 .EQU EPWM32_BWCNT_WITCNT9, 25 .EQU EPWM32_BWCNT_WITCNT8, 24 .EQU EPWM32_BWCNT_WITCNT7, 23 .EQU EPWM32_BWCNT_WITCNT6, 22 .EQU EPWM32_BWCNT_WITCNT5, 21 .EQU EPWM32_BWCNT_WITCNT4, 20 .EQU EPWM32_BWCNT_WITCNT3, 19 .EQU EPWM32_BWCNT_WITCNT2, 18 .EQU EPWM32_BWCNT_WITCNT1, 17 .EQU EPWM32_BWCNT_WITCNT0, 16 .EQU EPWM32_BWCNT_OFFCNT15, 15 .EQU EPWM32_BWCNT_OFFCNT14, 14 .EQU EPWM32_BWCNT_OFFCNT13, 13 .EQU EPWM32_BWCNT_OFFCNT12, 12 .EQU EPWM32_BWCNT_OFFCNT11, 11 .EQU EPWM32_BWCNT_OFFCNT10, 10 .EQU EPWM32_BWCNT_OFFCNT9, 9 .EQU EPWM32_BWCNT_OFFCNT8, 8 .EQU EPWM32_BWCNT_OFFCNT7, 7 .EQU EPWM32_BWCNT_OFFCNT6, 6 .EQU EPWM32_BWCNT_OFFCNT5, 5 .EQU EPWM32_BWCNT_OFFCNT4, 4 .EQU EPWM32_BWCNT_OFFCNT3, 3 .EQU EPWM32_BWCNT_OFFCNT2, 2 .EQU EPWM32_BWCNT_OFFCNT1, 1 .EQU EPWM32_BWCNT_OFFCNT0, 0 // register------------------------------------- .EQU EPWM32_ETCTL2, 0x40005390 // 0x4000 5390 EPWM32_ETCTL2 Bits------------------------------------- .EQU EPWM32_ETCTL2_BT3, 26 .EQU EPWM32_ETCTL2_BT2, 25 .EQU EPWM32_ETCTL2_BT1, 24 .EQU EPWM32_ETCTL2_BT0, 23 .EQU EPWM32_ETCTL2_BPP3, 22 .EQU EPWM32_ETCTL2_BPP2, 21 .EQU EPWM32_ETCTL2_BPP1, 20 .EQU EPWM32_ETCTL2_BPP0, 19 .EQU EPWM32_ETCTL2_SELB2, 18 .EQU EPWM32_ETCTL2_SELB1, 17 .EQU EPWM32_ETCTL2_SELB0, 16 .EQU EPWM32_ETCTL2_AT3, 10 .EQU EPWM32_ETCTL2_AT2, 9 .EQU EPWM32_ETCTL2_AT1, 8 .EQU EPWM32_ETCTL2_AT0, 7 .EQU EPWM32_ETCTL2_APP3, 6 .EQU EPWM32_ETCTL2_APP2, 5 .EQU EPWM32_ETCTL2_APP1, 4 .EQU EPWM32_ETCTL2_APP0, 3 .EQU EPWM32_ETCTL2_SELA2, 2 .EQU EPWM32_ETCTL2_SELA1, 1 .EQU EPWM32_ETCTL2_SELA0, 0 // register------------------------------------- .EQU EPWM32_GLDCTL, 0x40005394 // 0x4000 5394 EPWM32_GLDCTL Bits------------------------------------- .EQU EPWM32_GLDCTL_HRCFGUDSEL1, 22 .EQU EPWM32_GLDCTL_HRCFGUDSEL0, 21 .EQU EPWM32_GLDCTL_HRCFGUDEN, 20 .EQU EPWM32_GLDCTL_HRPHSUDSEL1, 19 .EQU EPWM32_GLDCTL_HRPHSUDSEL0, 18 .EQU EPWM32_GLDCTL_HRPHSUDEN, 17 .EQU EPWM32_GLDCTL_HRDBUDSEL1, 16 .EQU EPWM32_GLDCTL_HRDBUDSEL0, 15 .EQU EPWM32_GLDCTL_HRDBUDEN, 14 .EQU EPWM32_GLDCTL_DBUDSEL1, 13 .EQU EPWM32_GLDCTL_DBUDSEL0, 12 .EQU EPWM32_GLDCTL_DBUDEN, 11 .EQU EPWM32_GLDCTL_HRPBUDSEL1, 10 .EQU EPWM32_GLDCTL_HRPBUDSEL0, 9 .EQU EPWM32_GLDCTL_HRPBUDEN, 8 .EQU EPWM32_GLDCTL_CLDPRCS7, 7 .EQU EPWM32_GLDCTL_CLDPRCS6, 6 .EQU EPWM32_GLDCTL_CLDPRCS5, 5 .EQU EPWM32_GLDCTL_CLDPRCS4, 4 .EQU EPWM32_GLDCTL_CLDPRCS3, 3 .EQU EPWM32_GLDCTL_CLDPRCS2, 2 .EQU EPWM32_GLDCTL_CLDPRCS1, 1 .EQU EPWM32_GLDCTL_CLDPRCS0, 0 // register------------------------------------- .EQU EPWM32_FILTCTL, 0x40005398 // 0x4000 5398 EPWM32_FILTCTL Bits------------------------------------- .EQU EPWM32_FILTCTL_SYDELAY2, 23 .EQU EPWM32_FILTCTL_SYDELAY1, 22 .EQU EPWM32_FILTCTL_SYDELAY0, 21 .EQU EPWM32_FILTCTL_SYFDIV3, 20 .EQU EPWM32_FILTCTL_SYFDIV2, 19 .EQU EPWM32_FILTCTL_SYFDIV1, 18 .EQU EPWM32_FILTCTL_SYFDIV0, 17 .EQU EPWM32_FILTCTL_SYNCFEN, 16 .EQU EPWM32_FILTCTL_TCKDELAY2, 15 .EQU EPWM32_FILTCTL_TCKDELAY1, 14 .EQU EPWM32_FILTCTL_TCKDELAY0, 13 .EQU EPWM32_FILTCTL_TCKFDIV3, 12 .EQU EPWM32_FILTCTL_TCKFDIV2, 11 .EQU EPWM32_FILTCTL_TCKFDIV1, 10 .EQU EPWM32_FILTCTL_TCKFDIV0, 9 .EQU EPWM32_FILTCTL_TXCKFEN, 8 .EQU EPWM32_FILTCTL_CFDELAY2, 7 .EQU EPWM32_FILTCTL_CFDELAY1, 6 .EQU EPWM32_FILTCTL_CFDELAY0, 5 .EQU EPWM32_FILTCTL_CFDIV3, 4 .EQU EPWM32_FILTCTL_CFDIV2, 3 .EQU EPWM32_FILTCTL_CFDIV1, 2 .EQU EPWM32_FILTCTL_CFDIV0, 1 .EQU EPWM32_FILTCTL_CAPFEN, 0 // register------------------------------------- .EQU T33_CNT, 0x40005400 // 0x4000 5400 T33_CNT Bits------------------------------------- .EQU T33_CNT_TXCNT31, 31 .EQU T33_CNT_TXCNT30, 30 .EQU T33_CNT_TXCNT29, 29 .EQU T33_CNT_TXCNT28, 28 .EQU T33_CNT_TXCNT27, 27 .EQU T33_CNT_TXCNT26, 26 .EQU T33_CNT_TXCNT25, 25 .EQU T33_CNT_TXCNT24, 24 .EQU T33_CNT_TXCNT23, 23 .EQU T33_CNT_TXCNT22, 22 .EQU T33_CNT_TXCNT21, 21 .EQU T33_CNT_TXCNT20, 20 .EQU T33_CNT_TXCNT19, 19 .EQU T33_CNT_TXCNT18, 18 .EQU T33_CNT_TXCNT17, 17 .EQU T33_CNT_TXCNT16, 16 .EQU T33_CNT_TXCNT15, 15 .EQU T33_CNT_TXCNT14, 14 .EQU T33_CNT_TXCNT13, 13 .EQU T33_CNT_TXCNT12, 12 .EQU T33_CNT_TXCNT11, 11 .EQU T33_CNT_TXCNT10, 10 .EQU T33_CNT_TXCNT9, 9 .EQU T33_CNT_TXCNT8, 8 .EQU T33_CNT_TXCNT7, 7 .EQU T33_CNT_TXCNT6, 6 .EQU T33_CNT_TXCNT5, 5 .EQU T33_CNT_TXCNT4, 4 .EQU T33_CNT_TXCNT3, 3 .EQU T33_CNT_TXCNT2, 2 .EQU T33_CNT_TXCNT1, 1 .EQU T33_CNT_TXCNT0, 0 // register------------------------------------- .EQU T33_PHS, 0x40005404 // 0x4000 5404 T33_PHS Bits------------------------------------- .EQU T33_PHS_TXPHS31, 31 .EQU T33_PHS_TXPHS30, 30 .EQU T33_PHS_TXPHS29, 29 .EQU T33_PHS_TXPHS28, 28 .EQU T33_PHS_TXPHS27, 27 .EQU T33_PHS_TXPHS26, 26 .EQU T33_PHS_TXPHS25, 25 .EQU T33_PHS_TXPHS24, 24 .EQU T33_PHS_TXPHS23, 23 .EQU T33_PHS_TXPHS22, 22 .EQU T33_PHS_TXPHS21, 21 .EQU T33_PHS_TXPHS20, 20 .EQU T33_PHS_TXPHS19, 19 .EQU T33_PHS_TXPHS18, 18 .EQU T33_PHS_TXPHS17, 17 .EQU T33_PHS_TXPHS16, 16 .EQU T33_PHS_TXPHS15, 15 .EQU T33_PHS_TXPHS14, 14 .EQU T33_PHS_TXPHS13, 13 .EQU T33_PHS_TXPHS12, 12 .EQU T33_PHS_TXPHS11, 11 .EQU T33_PHS_TXPHS10, 10 .EQU T33_PHS_TXPHS9, 9 .EQU T33_PHS_TXPHS8, 8 .EQU T33_PHS_TXPHS7, 7 .EQU T33_PHS_TXPHS6, 6 .EQU T33_PHS_TXPHS5, 5 .EQU T33_PHS_TXPHS4, 4 .EQU T33_PHS_TXPHS3, 3 .EQU T33_PHS_TXPHS2, 2 .EQU T33_PHS_TXPHS1, 1 .EQU T33_PHS_TXPHS0, 0 // register------------------------------------- .EQU T33_PPX, 0x40005408 // 0x4000 5408 T33_PPX Bits------------------------------------- .EQU T33_PPX_PPX31, 31 .EQU T33_PPX_PPX30, 30 .EQU T33_PPX_PPX29, 29 .EQU T33_PPX_PPX28, 28 .EQU T33_PPX_PPX27, 27 .EQU T33_PPX_PPX26, 26 .EQU T33_PPX_PPX25, 25 .EQU T33_PPX_PPX24, 24 .EQU T33_PPX_PPX23, 23 .EQU T33_PPX_PPX22, 22 .EQU T33_PPX_PPX21, 21 .EQU T33_PPX_PPX20, 20 .EQU T33_PPX_PPX19, 19 .EQU T33_PPX_PPX18, 18 .EQU T33_PPX_PPX17, 17 .EQU T33_PPX_PPX16, 16 .EQU T33_PPX_PPX15, 15 .EQU T33_PPX_PPX14, 14 .EQU T33_PPX_PPX13, 13 .EQU T33_PPX_PPX12, 12 .EQU T33_PPX_PPX11, 11 .EQU T33_PPX_PPX10, 10 .EQU T33_PPX_PPX9, 9 .EQU T33_PPX_PPX8, 8 .EQU T33_PPX_PPX7, 7 .EQU T33_PPX_PPX6, 6 .EQU T33_PPX_PPX5, 5 .EQU T33_PPX_PPX4, 4 .EQU T33_PPX_PPX3, 3 .EQU T33_PPX_PPX2, 2 .EQU T33_PPX_PPX1, 1 .EQU T33_PPX_PPX0, 0 // register------------------------------------- .EQU T33_PRSC, 0x4000540C // 0x4000 540C T33_PRSC Bits------------------------------------- .EQU T33_PRSC_TXPRSC31, 31 .EQU T33_PRSC_TXPRSC30, 30 .EQU T33_PRSC_TXPRSC29, 29 .EQU T33_PRSC_TXPRSC28, 28 .EQU T33_PRSC_TXPRSC27, 27 .EQU T33_PRSC_TXPRSC26, 26 .EQU T33_PRSC_TXPRSC25, 25 .EQU T33_PRSC_TXPRSC24, 24 .EQU T33_PRSC_TXPRSC23, 23 .EQU T33_PRSC_TXPRSC22, 22 .EQU T33_PRSC_TXPRSC21, 21 .EQU T33_PRSC_TXPRSC20, 20 .EQU T33_PRSC_TXPRSC19, 19 .EQU T33_PRSC_TXPRSC18, 18 .EQU T33_PRSC_TXPRSC17, 17 .EQU T33_PRSC_TXPRSC16, 16 .EQU T33_PRSC_TXPRSC15, 15 .EQU T33_PRSC_TXPRSC14, 14 .EQU T33_PRSC_TXPRSC13, 13 .EQU T33_PRSC_TXPRSC12, 12 .EQU T33_PRSC_TXPRSC11, 11 .EQU T33_PRSC_TXPRSC10, 10 .EQU T33_PRSC_TXPRSC9, 9 .EQU T33_PRSC_TXPRSC8, 8 .EQU T33_PRSC_TXPRSC7, 7 .EQU T33_PRSC_TXPRSC6, 6 .EQU T33_PRSC_TXPRSC5, 5 .EQU T33_PRSC_TXPRSC4, 4 .EQU T33_PRSC_TXPRSC3, 3 .EQU T33_PRSC_TXPRSC2, 2 .EQU T33_PRSC_TXPRSC1, 1 .EQU T33_PRSC_TXPRSC0, 0 // register------------------------------------- .EQU T33_CTL, 0x40005410 // 0x4000 5410 T33_CTL Bits------------------------------------- .EQU T33_CTL_BLINKEN, 31 .EQU T33_CTL_UDSYNEN, 29 .EQU T33_CTL_HRLOCK, 28 .EQU T33_CTL_ETLOCK, 27 .EQU T33_CTL_PCLOCK, 26 .EQU T33_CTL_DBLOCK, 25 .EQU T33_CTL_AQLOCKB, 24 .EQU T33_CTL_AQLOCKA, 23 .EQU T33_CTL_CAPEN, 22 .EQU T33_CTL_CAPSEL, 21 .EQU T33_CTL_TXMAX, 19 .EQU T33_CTL_PHSDIR, 18 .EQU T33_CTL_SWFSYNC, 17 .EQU T33_CTL_SYNCOSEL1, 16 .EQU T33_CTL_SYNCOSEL0, 15 .EQU T33_CTL_PHSEN, 14 .EQU T33_CTL_SYNCI, 13 .EQU T33_CTL_TXUR, 12 .EQU T33_CTL_TXUDEVT, 11 .EQU T33_CTL_TXUDEN, 10 .EQU T33_CTL_TXCMS2, 9 .EQU T33_CTL_TXCMS1, 8 .EQU T33_CTL_TXCMS0, 7 .EQU T33_CTL_TXDIR, 6 .EQU T33_CTL_TXCLK1, 5 .EQU T33_CTL_TXCLK0, 4 .EQU T33_CTL_TXSY, 3 .EQU T33_CTL_TXGATE, 2 .EQU T33_CTL_TXCS, 1 .EQU T33_CTL_TXEN, 0 // register------------------------------------- .EQU EPWM33_RA, 0x40005414 // 0x4000 5414 EPWM33_RA Bits------------------------------------- .EQU EPWM33_RA_EPWMRA31, 31 .EQU EPWM33_RA_EPWMRA30, 30 .EQU EPWM33_RA_EPWMRA29, 29 .EQU EPWM33_RA_EPWMRA28, 28 .EQU EPWM33_RA_EPWMRA27, 27 .EQU EPWM33_RA_EPWMRA26, 26 .EQU EPWM33_RA_EPWMRA25, 25 .EQU EPWM33_RA_EPWMRA24, 24 .EQU EPWM33_RA_EPWMRA23, 23 .EQU EPWM33_RA_EPWMRA22, 22 .EQU EPWM33_RA_EPWMRA21, 21 .EQU EPWM33_RA_EPWMRA20, 20 .EQU EPWM33_RA_EPWMRA19, 19 .EQU EPWM33_RA_EPWMRA18, 18 .EQU EPWM33_RA_EPWMRA17, 17 .EQU EPWM33_RA_EPWMRA16, 16 .EQU EPWM33_RA_EPWMRA15, 15 .EQU EPWM33_RA_EPWMRA14, 14 .EQU EPWM33_RA_EPWMRA13, 13 .EQU EPWM33_RA_EPWMRA12, 12 .EQU EPWM33_RA_EPWMRA11, 11 .EQU EPWM33_RA_EPWMRA10, 10 .EQU EPWM33_RA_EPWMRA9, 9 .EQU EPWM33_RA_EPWMRA8, 8 .EQU EPWM33_RA_EPWMRA7, 7 .EQU EPWM33_RA_EPWMRA6, 6 .EQU EPWM33_RA_EPWMRA5, 5 .EQU EPWM33_RA_EPWMRA4, 4 .EQU EPWM33_RA_EPWMRA3, 3 .EQU EPWM33_RA_EPWMRA2, 2 .EQU EPWM33_RA_EPWMRA1, 1 .EQU EPWM33_RA_EPWMRA0, 0 // register------------------------------------- .EQU EPWM33_RB, 0x40005418 // 0x4000 5418 EPWM33_RB Bits------------------------------------- .EQU EPWM33_RB_EPWMRB31, 31 .EQU EPWM33_RB_EPWMRB30, 30 .EQU EPWM33_RB_EPWMRB29, 29 .EQU EPWM33_RB_EPWMRB28, 28 .EQU EPWM33_RB_EPWMRB27, 27 .EQU EPWM33_RB_EPWMRB26, 26 .EQU EPWM33_RB_EPWMRB25, 25 .EQU EPWM33_RB_EPWMRB24, 24 .EQU EPWM33_RB_EPWMRB23, 23 .EQU EPWM33_RB_EPWMRB22, 22 .EQU EPWM33_RB_EPWMRB21, 21 .EQU EPWM33_RB_EPWMRB20, 20 .EQU EPWM33_RB_EPWMRB19, 19 .EQU EPWM33_RB_EPWMRB18, 18 .EQU EPWM33_RB_EPWMRB17, 17 .EQU EPWM33_RB_EPWMRB16, 16 .EQU EPWM33_RB_EPWMRB15, 15 .EQU EPWM33_RB_EPWMRB14, 14 .EQU EPWM33_RB_EPWMRB13, 13 .EQU EPWM33_RB_EPWMRB12, 12 .EQU EPWM33_RB_EPWMRB11, 11 .EQU EPWM33_RB_EPWMRB10, 10 .EQU EPWM33_RB_EPWMRB9, 9 .EQU EPWM33_RB_EPWMRB8, 8 .EQU EPWM33_RB_EPWMRB7, 7 .EQU EPWM33_RB_EPWMRB6, 6 .EQU EPWM33_RB_EPWMRB5, 5 .EQU EPWM33_RB_EPWMRB4, 4 .EQU EPWM33_RB_EPWMRB3, 3 .EQU EPWM33_RB_EPWMRB2, 2 .EQU EPWM33_RB_EPWMRB1, 1 .EQU EPWM33_RB_EPWMRB0, 0 // register------------------------------------- .EQU EPWM33_CTLA, 0x4000541C // 0x4000 541C EPWM33_CTLA Bits------------------------------------- .EQU EPWM33_CTLA_OTSFA, 16 .EQU EPWM33_CTLA_ACTSFA1, 15 .EQU EPWM33_CTLA_ACTSFA0, 14 .EQU EPWM33_CTLA_CSFA1, 13 .EQU EPWM33_CTLA_CSFA0, 12 .EQU EPWM33_CTLA_ACBD1, 11 .EQU EPWM33_CTLA_ACBD0, 10 .EQU EPWM33_CTLA_ACBU1, 9 .EQU EPWM33_CTLA_ACBU0, 8 .EQU EPWM33_CTLA_ACAD1, 7 .EQU EPWM33_CTLA_ACAD0, 6 .EQU EPWM33_CTLA_ACAU1, 5 .EQU EPWM33_CTLA_ACAU0, 4 .EQU EPWM33_CTLA_APRD1, 3 .EQU EPWM33_CTLA_APRD0, 2 .EQU EPWM33_CTLA_AZRO1, 1 .EQU EPWM33_CTLA_AZRO0, 0 // register------------------------------------- .EQU EPWM33_CTLB, 0x40005420 // 0x4000 5420 EPWM33_CTLB Bits------------------------------------- .EQU EPWM33_CTLB_OTSFB, 16 .EQU EPWM33_CTLB_ACTSFB1, 15 .EQU EPWM33_CTLB_ACTSFB0, 14 .EQU EPWM33_CTLB_CSFB1, 13 .EQU EPWM33_CTLB_CSFB0, 12 .EQU EPWM33_CTLB_BCBD1, 11 .EQU EPWM33_CTLB_BCBD0, 10 .EQU EPWM33_CTLB_BCBU1, 9 .EQU EPWM33_CTLB_BCBU0, 8 .EQU EPWM33_CTLB_BCAD1, 7 .EQU EPWM33_CTLB_BCAD0, 6 .EQU EPWM33_CTLB_BCAU1, 5 .EQU EPWM33_CTLB_BCAU0, 4 .EQU EPWM33_CTLB_BPRD1, 3 .EQU EPWM33_CTLB_BPRD0, 2 .EQU EPWM33_CTLB_BZRO1, 1 .EQU EPWM33_CTLB_BZRO0, 0 // register------------------------------------- .EQU EPWM33_DBCTL, 0x40005424 // 0x4000 5424 EPWM33_DBCTL Bits------------------------------------- .EQU EPWM33_DBCTL_INMODE1, 5 .EQU EPWM33_DBCTL_INMODE0, 4 .EQU EPWM33_DBCTL_POLSEL1, 3 .EQU EPWM33_DBCTL_POLSEL0, 2 .EQU EPWM33_DBCTL_OUTMODE1, 1 .EQU EPWM33_DBCTL_OUTMODE0, 0 // register------------------------------------- .EQU EPWM33_DBT, 0x40005428 // 0x4000 5428 EPWM33_DBT Bits------------------------------------- .EQU EPWM33_DBT_RDBT15, 31 .EQU EPWM33_DBT_RDBT14, 30 .EQU EPWM33_DBT_RDBT13, 29 .EQU EPWM33_DBT_RDBT12, 28 .EQU EPWM33_DBT_RDBT11, 27 .EQU EPWM33_DBT_RDBT10, 26 .EQU EPWM33_DBT_RDBT9, 25 .EQU EPWM33_DBT_RDBT8, 24 .EQU EPWM33_DBT_RDBT7, 23 .EQU EPWM33_DBT_RDBT6, 22 .EQU EPWM33_DBT_RDBT5, 21 .EQU EPWM33_DBT_RDBT4, 20 .EQU EPWM33_DBT_RDBT3, 19 .EQU EPWM33_DBT_RDBT2, 18 .EQU EPWM33_DBT_RDBT1, 17 .EQU EPWM33_DBT_RDBT0, 16 .EQU EPWM33_DBT_FDBT15, 15 .EQU EPWM33_DBT_FDBT14, 14 .EQU EPWM33_DBT_FDBT13, 13 .EQU EPWM33_DBT_FDBT12, 12 .EQU EPWM33_DBT_FDBT11, 11 .EQU EPWM33_DBT_FDBT10, 10 .EQU EPWM33_DBT_FDBT9, 9 .EQU EPWM33_DBT_FDBT8, 8 .EQU EPWM33_DBT_FDBT7, 7 .EQU EPWM33_DBT_FDBT6, 6 .EQU EPWM33_DBT_FDBT5, 5 .EQU EPWM33_DBT_FDBT4, 4 .EQU EPWM33_DBT_FDBT3, 3 .EQU EPWM33_DBT_FDBT2, 2 .EQU EPWM33_DBT_FDBT1, 1 .EQU EPWM33_DBT_FDBT0, 0 // register------------------------------------- .EQU EPWM33_PCCTL, 0x4000542C // 0x4000 542C EPWM33_PCCTL Bits------------------------------------- .EQU EPWM33_PCCTL_CHPFREQ2, 10 .EQU EPWM33_PCCTL_CHPFREQ1, 9 .EQU EPWM33_PCCTL_CHPFREQ0, 8 .EQU EPWM33_PCCTL_CHPDUTY2, 7 .EQU EPWM33_PCCTL_CHPDUTY1, 6 .EQU EPWM33_PCCTL_CHPDUTY0, 5 .EQU EPWM33_PCCTL_OSHTWTH3, 4 .EQU EPWM33_PCCTL_OSHTWTH2, 3 .EQU EPWM33_PCCTL_OSHTWTH1, 2 .EQU EPWM33_PCCTL_OSHTWTH0, 1 .EQU EPWM33_PCCTL_CHPEN, 0 // register------------------------------------- .EQU EPWM33_PXASCTL, 0x40005430 // 0x4000 5430 EPWM33_PXASCTL Bits------------------------------------- .EQU EPWM33_PXASCTL_PXRSEN, 8 .EQU EPWM33_PXASCTL_PXSSA1, 7 .EQU EPWM33_PXASCTL_PXSSA0, 6 .EQU EPWM33_PXASCTL_PXSSB1, 5 .EQU EPWM33_PXASCTL_PXSSB0, 4 .EQU EPWM33_PXASCTL_PXASE, 3 .EQU EPWM33_PXASCTL_PXASS2, 2 .EQU EPWM33_PXASCTL_PXASS1, 1 .EQU EPWM33_PXASCTL_PXASS0, 0 // register------------------------------------- .EQU EPWM33_ETCTL, 0x40005434 // 0x4000 5434 EPWM33_ETCTL Bits------------------------------------- .EQU EPWM33_ETCTL_BTSEL1, 25 .EQU EPWM33_ETCTL_BTSEL0, 24 .EQU EPWM33_ETCTL_FRCB, 19 .EQU EPWM33_ETCTL_TOADENB, 16 .EQU EPWM33_ETCTL_ATSEL1, 9 .EQU EPWM33_ETCTL_ATSEL0, 8 .EQU EPWM33_ETCTL_FRCA, 3 .EQU EPWM33_ETCTL_TOADENA, 0 // register------------------------------------- .EQU EPWM33_IE, 0x40005438 // 0x4000 5438 EPWM33_IE Bits------------------------------------- .EQU EPWM33_IE_CAPIE, 9 .EQU EPWM33_IE_TXDIE, 8 .EQU EPWM33_IE_TXCIE, 7 .EQU EPWM33_IE_TXAIE, 6 .EQU EPWM33_IE_TXBIE, 5 .EQU EPWM33_IE_TXIE, 4 .EQU EPWM33_IE_TXUIE, 3 .EQU EPWM33_IE_TXGIE, 2 .EQU EPWM33_IE_TXTIE1, 1 .EQU EPWM33_IE_TXTIE0, 0 // register------------------------------------- .EQU EPWM33_IF, 0x4000543C // 0x4000 543C EPWM33_IF Bits------------------------------------- .EQU EPWM33_IF_CAPIF, 9 .EQU EPWM33_IF_TXDIF, 8 .EQU EPWM33_IF_TXCIF, 7 .EQU EPWM33_IF_TXAIF, 6 .EQU EPWM33_IF_TXBIF, 5 .EQU EPWM33_IF_TXIF, 4 .EQU EPWM33_IF_TXUIF, 3 .EQU EPWM33_IF_TXGIF, 2 .EQU EPWM33_IF_TXTIF1, 1 .EQU EPWM33_IF_TXTIF0, 0 // register------------------------------------- .EQU EPWM33_IC, 0x40005440 // 0x4000 5440 EPWM33_IC Bits------------------------------------- .EQU EPWM33_IC_CAPIC1, 10 .EQU EPWM33_IC_CAPIC0, 9 .EQU EPWM33_IC_TXDIC, 8 .EQU EPWM33_IC_TXCIC, 7 .EQU EPWM33_IC_TXAIC, 6 .EQU EPWM33_IC_TXBIC, 5 .EQU EPWM33_IC_TXIC, 4 .EQU EPWM33_IC_TXUIC, 3 .EQU EPWM33_IC_TXGIC, 2 .EQU EPWM33_IC_TXTIC1, 1 .EQU EPWM33_IC_TXTIC0, 0 // register------------------------------------- .EQU EPWM33_DE, 0x40005444 // 0x4000 5444 EPWM33_DE Bits------------------------------------- .EQU EPWM33_DE_TXDDE, 8 .EQU EPWM33_DE_TXCDE, 7 .EQU EPWM33_DE_TXADE, 6 .EQU EPWM33_DE_TXBDE, 5 .EQU EPWM33_DE_TXDE, 4 .EQU EPWM33_DE_TXUDE, 3 .EQU EPWM33_DE_TXGDE, 2 .EQU EPWM33_DE_TXTDE1, 1 .EQU EPWM33_DE_TXTDE0, 0 // register------------------------------------- .EQU EPWM33_DF, 0x40005448 // 0x4000 5448 EPWM33_DF Bits------------------------------------- .EQU EPWM33_DF_TXDDF, 8 .EQU EPWM33_DF_TXCDF, 7 .EQU EPWM33_DF_TXADF, 6 .EQU EPWM33_DF_TXBDF, 5 .EQU EPWM33_DF_TXDF, 4 .EQU EPWM33_DF_TXUDF, 3 .EQU EPWM33_DF_TXGDF, 2 .EQU EPWM33_DF_TXTDF1, 1 .EQU EPWM33_DF_TXTDF0, 0 // register------------------------------------- .EQU EPWM33_HRPWMCTLA, 0x40005450 // 0x4000 5450 EPWM33_HRPWMCTLA Bits------------------------------------- .EQU EPWM33_HRPWMCTLA_HRPHSENA, 6 .EQU EPWM33_HRPWMCTLA_HRFENA, 5 .EQU EPWM33_HRPWMCTLA_HRRENA, 4 .EQU EPWM33_HRPWMCTLA_HRPENA, 3 .EQU EPWM33_HRPWMCTLA_HRDENA, 2 .EQU EPWM33_HRPWMCTLA_HRSELA, 1 .EQU EPWM33_HRPWMCTLA_HRENA, 0 // register------------------------------------- .EQU EPWM33_HRCMPA, 0x40005454 // 0x4000 5454 EPWM33_HRCMPA Bits------------------------------------- .EQU EPWM33_HRCMPA_HRCMPA7, 7 .EQU EPWM33_HRCMPA_HRCMPA6, 6 .EQU EPWM33_HRCMPA_HRCMPA5, 5 .EQU EPWM33_HRCMPA_HRCMPA4, 4 .EQU EPWM33_HRCMPA_HRCMPA3, 3 .EQU EPWM33_HRCMPA_HRCMPA2, 2 .EQU EPWM33_HRCMPA_HRCMPA1, 1 .EQU EPWM33_HRCMPA_HRCMPA0, 0 // register------------------------------------- .EQU EPWM33_CAP, 0x40005458 // 0x4000 5458 EPWM33_CAP Bits------------------------------------- .EQU EPWM33_CAP_CAP31, 31 .EQU EPWM33_CAP_CAP30, 30 .EQU EPWM33_CAP_CAP29, 29 .EQU EPWM33_CAP_CAP28, 28 .EQU EPWM33_CAP_CAP27, 27 .EQU EPWM33_CAP_CAP26, 26 .EQU EPWM33_CAP_CAP25, 25 .EQU EPWM33_CAP_CAP24, 24 .EQU EPWM33_CAP_CAP23, 23 .EQU EPWM33_CAP_CAP22, 22 .EQU EPWM33_CAP_CAP21, 21 .EQU EPWM33_CAP_CAP20, 20 .EQU EPWM33_CAP_CAP19, 19 .EQU EPWM33_CAP_CAP18, 18 .EQU EPWM33_CAP_CAP17, 17 .EQU EPWM33_CAP_CAP16, 16 .EQU EPWM33_CAP_CAP15, 15 .EQU EPWM33_CAP_CAP14, 14 .EQU EPWM33_CAP_CAP13, 13 .EQU EPWM33_CAP_CAP12, 12 .EQU EPWM33_CAP_CAP11, 11 .EQU EPWM33_CAP_CAP10, 10 .EQU EPWM33_CAP_CAP9, 9 .EQU EPWM33_CAP_CAP8, 8 .EQU EPWM33_CAP_CAP7, 7 .EQU EPWM33_CAP_CAP6, 6 .EQU EPWM33_CAP_CAP5, 5 .EQU EPWM33_CAP_CAP4, 4 .EQU EPWM33_CAP_CAP3, 3 .EQU EPWM33_CAP_CAP2, 2 .EQU EPWM33_CAP_CAP1, 1 .EQU EPWM33_CAP_CAP0, 0 // register------------------------------------- .EQU EPWM33_RC, 0x4000545C // 0x4000 545C EPWM33_RC Bits------------------------------------- .EQU EPWM33_RC_EPWMRC31, 31 .EQU EPWM33_RC_EPWMRC30, 30 .EQU EPWM33_RC_EPWMRC29, 29 .EQU EPWM33_RC_EPWMRC28, 28 .EQU EPWM33_RC_EPWMRC27, 27 .EQU EPWM33_RC_EPWMRC26, 26 .EQU EPWM33_RC_EPWMRC25, 25 .EQU EPWM33_RC_EPWMRC24, 24 .EQU EPWM33_RC_EPWMRC23, 23 .EQU EPWM33_RC_EPWMRC22, 22 .EQU EPWM33_RC_EPWMRC21, 21 .EQU EPWM33_RC_EPWMRC20, 20 .EQU EPWM33_RC_EPWMRC19, 19 .EQU EPWM33_RC_EPWMRC18, 18 .EQU EPWM33_RC_EPWMRC17, 17 .EQU EPWM33_RC_EPWMRC16, 16 .EQU EPWM33_RC_EPWMRC15, 15 .EQU EPWM33_RC_EPWMRC14, 14 .EQU EPWM33_RC_EPWMRC13, 13 .EQU EPWM33_RC_EPWMRC12, 12 .EQU EPWM33_RC_EPWMRC11, 11 .EQU EPWM33_RC_EPWMRC10, 10 .EQU EPWM33_RC_EPWMRC9, 9 .EQU EPWM33_RC_EPWMRC8, 8 .EQU EPWM33_RC_EPWMRC7, 7 .EQU EPWM33_RC_EPWMRC6, 6 .EQU EPWM33_RC_EPWMRC5, 5 .EQU EPWM33_RC_EPWMRC4, 4 .EQU EPWM33_RC_EPWMRC3, 3 .EQU EPWM33_RC_EPWMRC2, 2 .EQU EPWM33_RC_EPWMRC1, 1 .EQU EPWM33_RC_EPWMRC0, 0 // register------------------------------------- .EQU EPWM33_RD, 0x40005460 // 0x4000 5460 EPWM33_RD Bits------------------------------------- .EQU EPWM33_RD_EPWMRD31, 31 .EQU EPWM33_RD_EPWMRD30, 30 .EQU EPWM33_RD_EPWMRD29, 29 .EQU EPWM33_RD_EPWMRD28, 28 .EQU EPWM33_RD_EPWMRD27, 27 .EQU EPWM33_RD_EPWMRD26, 26 .EQU EPWM33_RD_EPWMRD25, 25 .EQU EPWM33_RD_EPWMRD24, 24 .EQU EPWM33_RD_EPWMRD23, 23 .EQU EPWM33_RD_EPWMRD22, 22 .EQU EPWM33_RD_EPWMRD21, 21 .EQU EPWM33_RD_EPWMRD20, 20 .EQU EPWM33_RD_EPWMRD19, 19 .EQU EPWM33_RD_EPWMRD18, 18 .EQU EPWM33_RD_EPWMRD17, 17 .EQU EPWM33_RD_EPWMRD16, 16 .EQU EPWM33_RD_EPWMRD15, 15 .EQU EPWM33_RD_EPWMRD14, 14 .EQU EPWM33_RD_EPWMRD13, 13 .EQU EPWM33_RD_EPWMRD12, 12 .EQU EPWM33_RD_EPWMRD11, 11 .EQU EPWM33_RD_EPWMRD10, 10 .EQU EPWM33_RD_EPWMRD9, 9 .EQU EPWM33_RD_EPWMRD8, 8 .EQU EPWM33_RD_EPWMRD7, 7 .EQU EPWM33_RD_EPWMRD6, 6 .EQU EPWM33_RD_EPWMRD5, 5 .EQU EPWM33_RD_EPWMRD4, 4 .EQU EPWM33_RD_EPWMRD3, 3 .EQU EPWM33_RD_EPWMRD2, 2 .EQU EPWM33_RD_EPWMRD1, 1 .EQU EPWM33_RD_EPWMRD0, 0 // register------------------------------------- .EQU EPWM33_UDCTL, 0x40005464 // 0x4000 5464 EPWM33_UDCTL Bits------------------------------------- .EQU EPWM33_UDCTL_GBUDEN, 27 .EQU EPWM33_UDCTL_HRPUDSEL1, 26 .EQU EPWM33_UDCTL_HRPUDSEL0, 25 .EQU EPWM33_UDCTL_HRPUDEN, 24 .EQU EPWM33_UDCTL_EBUDSEL1, 23 .EQU EPWM33_UDCTL_EBUDSEL0, 22 .EQU EPWM33_UDCTL_EBUDEN, 21 .EQU EPWM33_UDCTL_EAUDSEL1, 20 .EQU EPWM33_UDCTL_EAUDSEL0, 19 .EQU EPWM33_UDCTL_EAUDEN, 18 .EQU EPWM33_UDCTL_CMDUDSEL1, 17 .EQU EPWM33_UDCTL_CMDUDSEL0, 16 .EQU EPWM33_UDCTL_CMDUDEN, 15 .EQU EPWM33_UDCTL_CMCUDSEL1, 14 .EQU EPWM33_UDCTL_CMCUDSEL0, 13 .EQU EPWM33_UDCTL_CMCUDEN, 12 .EQU EPWM33_UDCTL_CMBUDSEL1, 11 .EQU EPWM33_UDCTL_CMBUDSEL0, 10 .EQU EPWM33_UDCTL_CMBUDEN, 9 .EQU EPWM33_UDCTL_CMAUDSEL1, 8 .EQU EPWM33_UDCTL_CMAUDSEL0, 7 .EQU EPWM33_UDCTL_CMAUDEN, 6 .EQU EPWM33_UDCTL_PRUDSEL1, 5 .EQU EPWM33_UDCTL_PRUDSEL0, 4 .EQU EPWM33_UDCTL_PRUDEN, 3 .EQU EPWM33_UDCTL_PPUDSEL1, 2 .EQU EPWM33_UDCTL_PPUDSEL0, 1 .EQU EPWM33_UDCTL_PPUDEN, 0 // register------------------------------------- .EQU EPWM33_SRT, 0x40005468 // 0x4000 5468 EPWM33_SRT Bits------------------------------------- .EQU EPWM33_SRT_T31, 31 .EQU EPWM33_SRT_T30, 30 .EQU EPWM33_SRT_T29, 29 .EQU EPWM33_SRT_T28, 28 .EQU EPWM33_SRT_T27, 27 .EQU EPWM33_SRT_T26, 26 .EQU EPWM33_SRT_T25, 25 .EQU EPWM33_SRT_T24, 24 .EQU EPWM33_SRT_T23, 23 .EQU EPWM33_SRT_T22, 22 .EQU EPWM33_SRT_T21, 21 .EQU EPWM33_SRT_T20, 20 .EQU EPWM33_SRT_T19, 19 .EQU EPWM33_SRT_T18, 18 .EQU EPWM33_SRT_T17, 17 .EQU EPWM33_SRT_T16, 16 .EQU EPWM33_SRT_T15, 15 .EQU EPWM33_SRT_T14, 14 .EQU EPWM33_SRT_T13, 13 .EQU EPWM33_SRT_T12, 12 .EQU EPWM33_SRT_T11, 11 .EQU EPWM33_SRT_T10, 10 .EQU EPWM33_SRT_T9, 9 .EQU EPWM33_SRT_T8, 8 .EQU EPWM33_SRT_T7, 7 .EQU EPWM33_SRT_T6, 6 .EQU EPWM33_SRT_T5, 5 .EQU EPWM33_SRT_T4, 4 .EQU EPWM33_SRT_T3, 3 .EQU EPWM33_SRT_T2, 2 .EQU EPWM33_SRT_T1, 1 .EQU EPWM33_SRT_T0, 0 // register------------------------------------- .EQU EPWM33_HRPWMCTLB, 0x4000546C // 0x4000 546C EPWM33_HRPWMCTLB Bits------------------------------------- .EQU EPWM33_HRPWMCTLB_HRPHSENB, 6 .EQU EPWM33_HRPWMCTLB_HRFENB, 5 .EQU EPWM33_HRPWMCTLB_HRRENB, 4 .EQU EPWM33_HRPWMCTLB_HRPENB, 3 .EQU EPWM33_HRPWMCTLB_HRDENB, 2 .EQU EPWM33_HRPWMCTLB_HRSELB, 1 .EQU EPWM33_HRPWMCTLB_HRENB, 0 // register------------------------------------- .EQU EPWM33_HRCMPB, 0x40005470 // 0x4000 5470 EPWM33_HRCMPB Bits------------------------------------- .EQU EPWM33_HRCMPB_HRCMPB7, 7 .EQU EPWM33_HRCMPB_HRCMPB6, 6 .EQU EPWM33_HRCMPB_HRCMPB5, 5 .EQU EPWM33_HRCMPB_HRCMPB4, 4 .EQU EPWM33_HRCMPB_HRCMPB3, 3 .EQU EPWM33_HRCMPB_HRCMPB2, 2 .EQU EPWM33_HRCMPB_HRCMPB1, 1 .EQU EPWM33_HRCMPB_HRCMPB0, 0 // register------------------------------------- .EQU EPWM33_HRDB, 0x40005474 // 0x4000 5474 EPWM33_HRDB Bits------------------------------------- .EQU EPWM33_HRDB_HRR7, 15 .EQU EPWM33_HRDB_HRR6, 14 .EQU EPWM33_HRDB_HRR5, 13 .EQU EPWM33_HRDB_HRR4, 12 .EQU EPWM33_HRDB_HRR3, 11 .EQU EPWM33_HRDB_HRR2, 10 .EQU EPWM33_HRDB_HRR1, 9 .EQU EPWM33_HRDB_HRR0, 8 .EQU EPWM33_HRDB_HRF7, 7 .EQU EPWM33_HRDB_HRF6, 6 .EQU EPWM33_HRDB_HRF5, 5 .EQU EPWM33_HRDB_HRF4, 4 .EQU EPWM33_HRDB_HRF3, 3 .EQU EPWM33_HRDB_HRF2, 2 .EQU EPWM33_HRDB_HRF1, 1 .EQU EPWM33_HRDB_HRF0, 0 // register------------------------------------- .EQU EPWM33_HRPHS, 0x40005478 // 0x4000 5478 EPWM33_HRPHS Bits------------------------------------- .EQU EPWM33_HRPHS_HRPRE7, 15 .EQU EPWM33_HRPHS_HRPRE6, 14 .EQU EPWM33_HRPHS_HRPRE5, 13 .EQU EPWM33_HRPHS_HRPRE4, 12 .EQU EPWM33_HRPHS_HRPRE3, 11 .EQU EPWM33_HRPHS_HRPRE2, 10 .EQU EPWM33_HRPHS_HRPRE1, 9 .EQU EPWM33_HRPHS_HRPRE0, 8 .EQU EPWM33_HRPHS_HRPHS7, 7 .EQU EPWM33_HRPHS_HRPHS6, 6 .EQU EPWM33_HRPHS_HRPHS5, 5 .EQU EPWM33_HRPHS_HRPHS4, 4 .EQU EPWM33_HRPHS_HRPHS3, 3 .EQU EPWM33_HRPHS_HRPHS2, 2 .EQU EPWM33_HRPHS_HRPHS1, 1 .EQU EPWM33_HRPHS_HRPHS0, 0 // register------------------------------------- .EQU EPWM33_HRCFG, 0x4000547C // 0x4000 547C EPWM33_HRCFG Bits------------------------------------- .EQU EPWM33_HRCFG_STEP7, 15 .EQU EPWM33_HRCFG_STEP6, 14 .EQU EPWM33_HRCFG_STEP5, 13 .EQU EPWM33_HRCFG_STEP4, 12 .EQU EPWM33_HRCFG_STEP3, 11 .EQU EPWM33_HRCFG_STEP2, 10 .EQU EPWM33_HRCFG_STEP1, 9 .EQU EPWM33_HRCFG_STEP0, 8 .EQU EPWM33_HRCFG_TIMS7, 7 .EQU EPWM33_HRCFG_TIMS6, 6 .EQU EPWM33_HRCFG_TIMS5, 5 .EQU EPWM33_HRCFG_TIMS4, 4 .EQU EPWM33_HRCFG_TIMS3, 3 .EQU EPWM33_HRCFG_TIMS2, 2 .EQU EPWM33_HRCFG_TIMS1, 1 .EQU EPWM33_HRCFG_TIMS0, 0 // register------------------------------------- .EQU EPWM33_HRDELAY, 0x40005480 // 0x4000 5480 EPWM33_HRDELAY Bits------------------------------------- .EQU EPWM33_HRDELAY_REDBHR7, 31 .EQU EPWM33_HRDELAY_REDBHR6, 30 .EQU EPWM33_HRDELAY_REDBHR5, 29 .EQU EPWM33_HRDELAY_REDBHR4, 28 .EQU EPWM33_HRDELAY_REDBHR3, 27 .EQU EPWM33_HRDELAY_REDBHR2, 26 .EQU EPWM33_HRDELAY_REDBHR1, 25 .EQU EPWM33_HRDELAY_REDBHR0, 24 .EQU EPWM33_HRDELAY_FEDBHR7, 23 .EQU EPWM33_HRDELAY_FEDBHR6, 22 .EQU EPWM33_HRDELAY_FEDBHR5, 21 .EQU EPWM33_HRDELAY_FEDBHR4, 20 .EQU EPWM33_HRDELAY_FEDBHR3, 19 .EQU EPWM33_HRDELAY_FEDBHR2, 18 .EQU EPWM33_HRDELAY_FEDBHR1, 17 .EQU EPWM33_HRDELAY_FEDBHR0, 16 .EQU EPWM33_HRDELAY_REDAHR7, 15 .EQU EPWM33_HRDELAY_REDAHR6, 14 .EQU EPWM33_HRDELAY_REDAHR5, 13 .EQU EPWM33_HRDELAY_REDAHR4, 12 .EQU EPWM33_HRDELAY_REDAHR3, 11 .EQU EPWM33_HRDELAY_REDAHR2, 10 .EQU EPWM33_HRDELAY_REDAHR1, 9 .EQU EPWM33_HRDELAY_REDAHR0, 8 .EQU EPWM33_HRDELAY_FEDAHR7, 7 .EQU EPWM33_HRDELAY_FEDAHR6, 6 .EQU EPWM33_HRDELAY_FEDAHR5, 5 .EQU EPWM33_HRDELAY_FEDAHR4, 4 .EQU EPWM33_HRDELAY_FEDAHR3, 3 .EQU EPWM33_HRDELAY_FEDAHR2, 2 .EQU EPWM33_HRDELAY_FEDAHR1, 1 .EQU EPWM33_HRDELAY_FEDAHR0, 0 // register------------------------------------- .EQU T33_CTL2, 0x40005484 // 0x4000 5484 T33_CTL2 Bits------------------------------------- .EQU T33_CTL2_LPHSEN, 24 .EQU T33_CTL2_CAPMOD, 23 .EQU T33_CTL2_CAPUF, 22 .EQU T33_CTL2_HRCFGUF, 21 .EQU T33_CTL2_HRPHSUF, 20 .EQU T33_CTL2_HRDBUF, 19 .EQU T33_CTL2_DBTUF, 18 .EQU T33_CTL2_HRPBUF, 17 .EQU T33_CTL2_HRPAUF, 16 .EQU T33_CTL2_EBFUF, 15 .EQU T33_CTL2_EAFUF, 14 .EQU T33_CTL2_PRFUF, 13 .EQU T33_CTL2_PPFUF, 12 .EQU T33_CTL2_CMDFUF, 11 .EQU T33_CTL2_CMCFUF, 10 .EQU T33_CTL2_CMBFUF, 9 .EQU T33_CTL2_CMAFUF, 8 .EQU T33_CTL2_TRGIOS, 7 .EQU T33_CTL2_SYNCIOS, 6 .EQU T33_CTL2_DUDBSEL, 5 .EQU T33_CTL2_DUDBEN, 4 .EQU T33_CTL2_BWINDTSEL, 3 .EQU T33_CTL2_BWINDPOL, 2 .EQU T33_CTL2_BWINDEN, 1 .EQU T33_CTL2_SWCLRPF, 0 // register------------------------------------- .EQU EPWM33_BWCFG, 0x40005488 // 0x4000 5488 EPWM33_BWCFG Bits------------------------------------- .EQU EPWM33_BWCFG_BWOFFSET15, 31 .EQU EPWM33_BWCFG_BWOFFSET14, 30 .EQU EPWM33_BWCFG_BWOFFSET13, 29 .EQU EPWM33_BWCFG_BWOFFSET12, 28 .EQU EPWM33_BWCFG_BWOFFSET11, 27 .EQU EPWM33_BWCFG_BWOFFSET10, 26 .EQU EPWM33_BWCFG_BWOFFSET9, 25 .EQU EPWM33_BWCFG_BWOFFSET8, 24 .EQU EPWM33_BWCFG_BWOFFSET7, 23 .EQU EPWM33_BWCFG_BWOFFSET6, 22 .EQU EPWM33_BWCFG_BWOFFSET5, 21 .EQU EPWM33_BWCFG_BWOFFSET4, 20 .EQU EPWM33_BWCFG_BWOFFSET3, 19 .EQU EPWM33_BWCFG_BWOFFSET2, 18 .EQU EPWM33_BWCFG_BWOFFSET1, 17 .EQU EPWM33_BWCFG_BWOFFSET0, 16 .EQU EPWM33_BWCFG_BWIDTH15, 15 .EQU EPWM33_BWCFG_BWIDTH14, 14 .EQU EPWM33_BWCFG_BWIDTH13, 13 .EQU EPWM33_BWCFG_BWIDTH12, 12 .EQU EPWM33_BWCFG_BWIDTH11, 11 .EQU EPWM33_BWCFG_BWIDTH10, 10 .EQU EPWM33_BWCFG_BWIDTH9, 9 .EQU EPWM33_BWCFG_BWIDTH8, 8 .EQU EPWM33_BWCFG_BWIDTH7, 7 .EQU EPWM33_BWCFG_BWIDTH6, 6 .EQU EPWM33_BWCFG_BWIDTH5, 5 .EQU EPWM33_BWCFG_BWIDTH4, 4 .EQU EPWM33_BWCFG_BWIDTH3, 3 .EQU EPWM33_BWCFG_BWIDTH2, 2 .EQU EPWM33_BWCFG_BWIDTH1, 1 .EQU EPWM33_BWCFG_BWIDTH0, 0 // register------------------------------------- .EQU EPWM33_BWCNT, 0x4000548C // 0x4000 548C EPWM33_BWCNT Bits------------------------------------- .EQU EPWM33_BWCNT_WITCNT15, 31 .EQU EPWM33_BWCNT_WITCNT14, 30 .EQU EPWM33_BWCNT_WITCNT13, 29 .EQU EPWM33_BWCNT_WITCNT12, 28 .EQU EPWM33_BWCNT_WITCNT11, 27 .EQU EPWM33_BWCNT_WITCNT10, 26 .EQU EPWM33_BWCNT_WITCNT9, 25 .EQU EPWM33_BWCNT_WITCNT8, 24 .EQU EPWM33_BWCNT_WITCNT7, 23 .EQU EPWM33_BWCNT_WITCNT6, 22 .EQU EPWM33_BWCNT_WITCNT5, 21 .EQU EPWM33_BWCNT_WITCNT4, 20 .EQU EPWM33_BWCNT_WITCNT3, 19 .EQU EPWM33_BWCNT_WITCNT2, 18 .EQU EPWM33_BWCNT_WITCNT1, 17 .EQU EPWM33_BWCNT_WITCNT0, 16 .EQU EPWM33_BWCNT_OFFCNT15, 15 .EQU EPWM33_BWCNT_OFFCNT14, 14 .EQU EPWM33_BWCNT_OFFCNT13, 13 .EQU EPWM33_BWCNT_OFFCNT12, 12 .EQU EPWM33_BWCNT_OFFCNT11, 11 .EQU EPWM33_BWCNT_OFFCNT10, 10 .EQU EPWM33_BWCNT_OFFCNT9, 9 .EQU EPWM33_BWCNT_OFFCNT8, 8 .EQU EPWM33_BWCNT_OFFCNT7, 7 .EQU EPWM33_BWCNT_OFFCNT6, 6 .EQU EPWM33_BWCNT_OFFCNT5, 5 .EQU EPWM33_BWCNT_OFFCNT4, 4 .EQU EPWM33_BWCNT_OFFCNT3, 3 .EQU EPWM33_BWCNT_OFFCNT2, 2 .EQU EPWM33_BWCNT_OFFCNT1, 1 .EQU EPWM33_BWCNT_OFFCNT0, 0 // register------------------------------------- .EQU EPWM33_ETCTL2, 0x40005490 // 0x4000 5490 EPWM33_ETCTL2 Bits------------------------------------- .EQU EPWM33_ETCTL2_BT3, 26 .EQU EPWM33_ETCTL2_BT2, 25 .EQU EPWM33_ETCTL2_BT1, 24 .EQU EPWM33_ETCTL2_BT0, 23 .EQU EPWM33_ETCTL2_BPP3, 22 .EQU EPWM33_ETCTL2_BPP2, 21 .EQU EPWM33_ETCTL2_BPP1, 20 .EQU EPWM33_ETCTL2_BPP0, 19 .EQU EPWM33_ETCTL2_SELB2, 18 .EQU EPWM33_ETCTL2_SELB1, 17 .EQU EPWM33_ETCTL2_SELB0, 16 .EQU EPWM33_ETCTL2_AT3, 10 .EQU EPWM33_ETCTL2_AT2, 9 .EQU EPWM33_ETCTL2_AT1, 8 .EQU EPWM33_ETCTL2_AT0, 7 .EQU EPWM33_ETCTL2_APP3, 6 .EQU EPWM33_ETCTL2_APP2, 5 .EQU EPWM33_ETCTL2_APP1, 4 .EQU EPWM33_ETCTL2_APP0, 3 .EQU EPWM33_ETCTL2_SELA2, 2 .EQU EPWM33_ETCTL2_SELA1, 1 .EQU EPWM33_ETCTL2_SELA0, 0 // register------------------------------------- .EQU EPWM33_GLDCTL, 0x40005494 // 0x4000 5494 EPWM33_GLDCTL Bits------------------------------------- .EQU EPWM33_GLDCTL_HRCFGUDSEL1, 22 .EQU EPWM33_GLDCTL_HRCFGUDSEL0, 21 .EQU EPWM33_GLDCTL_HRCFGUDEN, 20 .EQU EPWM33_GLDCTL_HRPHSUDSEL1, 19 .EQU EPWM33_GLDCTL_HRPHSUDSEL0, 18 .EQU EPWM33_GLDCTL_HRPHSUDEN, 17 .EQU EPWM33_GLDCTL_HRDBUDSEL1, 16 .EQU EPWM33_GLDCTL_HRDBUDSEL0, 15 .EQU EPWM33_GLDCTL_HRDBUDEN, 14 .EQU EPWM33_GLDCTL_DBUDSEL1, 13 .EQU EPWM33_GLDCTL_DBUDSEL0, 12 .EQU EPWM33_GLDCTL_DBUDEN, 11 .EQU EPWM33_GLDCTL_HRPBUDSEL1, 10 .EQU EPWM33_GLDCTL_HRPBUDSEL0, 9 .EQU EPWM33_GLDCTL_HRPBUDEN, 8 .EQU EPWM33_GLDCTL_CLDPRCS7, 7 .EQU EPWM33_GLDCTL_CLDPRCS6, 6 .EQU EPWM33_GLDCTL_CLDPRCS5, 5 .EQU EPWM33_GLDCTL_CLDPRCS4, 4 .EQU EPWM33_GLDCTL_CLDPRCS3, 3 .EQU EPWM33_GLDCTL_CLDPRCS2, 2 .EQU EPWM33_GLDCTL_CLDPRCS1, 1 .EQU EPWM33_GLDCTL_CLDPRCS0, 0 // register------------------------------------- .EQU EPWM33_FILTCTL, 0x40005498 // 0x4000 5498 EPWM33_FILTCTL Bits------------------------------------- .EQU EPWM33_FILTCTL_SYDELAY2, 23 .EQU EPWM33_FILTCTL_SYDELAY1, 22 .EQU EPWM33_FILTCTL_SYDELAY0, 21 .EQU EPWM33_FILTCTL_SYFDIV3, 20 .EQU EPWM33_FILTCTL_SYFDIV2, 19 .EQU EPWM33_FILTCTL_SYFDIV1, 18 .EQU EPWM33_FILTCTL_SYFDIV0, 17 .EQU EPWM33_FILTCTL_SYNCFEN, 16 .EQU EPWM33_FILTCTL_TCKDELAY2, 15 .EQU EPWM33_FILTCTL_TCKDELAY1, 14 .EQU EPWM33_FILTCTL_TCKDELAY0, 13 .EQU EPWM33_FILTCTL_TCKFDIV3, 12 .EQU EPWM33_FILTCTL_TCKFDIV2, 11 .EQU EPWM33_FILTCTL_TCKFDIV1, 10 .EQU EPWM33_FILTCTL_TCKFDIV0, 9 .EQU EPWM33_FILTCTL_TXCKFEN, 8 .EQU EPWM33_FILTCTL_CFDELAY2, 7 .EQU EPWM33_FILTCTL_CFDELAY1, 6 .EQU EPWM33_FILTCTL_CFDELAY0, 5 .EQU EPWM33_FILTCTL_CFDIV3, 4 .EQU EPWM33_FILTCTL_CFDIV2, 3 .EQU EPWM33_FILTCTL_CFDIV1, 2 .EQU EPWM33_FILTCTL_CFDIV0, 1 .EQU EPWM33_FILTCTL_CAPFEN, 0 // register------------------------------------- .EQU T36_CNT, 0x40005500 // 0x4000 5500 T36_CNT Bits------------------------------------- .EQU T36_CNT_TXCNT31, 31 .EQU T36_CNT_TXCNT30, 30 .EQU T36_CNT_TXCNT29, 29 .EQU T36_CNT_TXCNT28, 28 .EQU T36_CNT_TXCNT27, 27 .EQU T36_CNT_TXCNT26, 26 .EQU T36_CNT_TXCNT25, 25 .EQU T36_CNT_TXCNT24, 24 .EQU T36_CNT_TXCNT23, 23 .EQU T36_CNT_TXCNT22, 22 .EQU T36_CNT_TXCNT21, 21 .EQU T36_CNT_TXCNT20, 20 .EQU T36_CNT_TXCNT19, 19 .EQU T36_CNT_TXCNT18, 18 .EQU T36_CNT_TXCNT17, 17 .EQU T36_CNT_TXCNT16, 16 .EQU T36_CNT_TXCNT15, 15 .EQU T36_CNT_TXCNT14, 14 .EQU T36_CNT_TXCNT13, 13 .EQU T36_CNT_TXCNT12, 12 .EQU T36_CNT_TXCNT11, 11 .EQU T36_CNT_TXCNT10, 10 .EQU T36_CNT_TXCNT9, 9 .EQU T36_CNT_TXCNT8, 8 .EQU T36_CNT_TXCNT7, 7 .EQU T36_CNT_TXCNT6, 6 .EQU T36_CNT_TXCNT5, 5 .EQU T36_CNT_TXCNT4, 4 .EQU T36_CNT_TXCNT3, 3 .EQU T36_CNT_TXCNT2, 2 .EQU T36_CNT_TXCNT1, 1 .EQU T36_CNT_TXCNT0, 0 // register------------------------------------- .EQU T36_PHS, 0x40005504 // 0x4000 5504 T36_PHS Bits------------------------------------- .EQU T36_PHS_TXPHS31, 31 .EQU T36_PHS_TXPHS30, 30 .EQU T36_PHS_TXPHS29, 29 .EQU T36_PHS_TXPHS28, 28 .EQU T36_PHS_TXPHS27, 27 .EQU T36_PHS_TXPHS26, 26 .EQU T36_PHS_TXPHS25, 25 .EQU T36_PHS_TXPHS24, 24 .EQU T36_PHS_TXPHS23, 23 .EQU T36_PHS_TXPHS22, 22 .EQU T36_PHS_TXPHS21, 21 .EQU T36_PHS_TXPHS20, 20 .EQU T36_PHS_TXPHS19, 19 .EQU T36_PHS_TXPHS18, 18 .EQU T36_PHS_TXPHS17, 17 .EQU T36_PHS_TXPHS16, 16 .EQU T36_PHS_TXPHS15, 15 .EQU T36_PHS_TXPHS14, 14 .EQU T36_PHS_TXPHS13, 13 .EQU T36_PHS_TXPHS12, 12 .EQU T36_PHS_TXPHS11, 11 .EQU T36_PHS_TXPHS10, 10 .EQU T36_PHS_TXPHS9, 9 .EQU T36_PHS_TXPHS8, 8 .EQU T36_PHS_TXPHS7, 7 .EQU T36_PHS_TXPHS6, 6 .EQU T36_PHS_TXPHS5, 5 .EQU T36_PHS_TXPHS4, 4 .EQU T36_PHS_TXPHS3, 3 .EQU T36_PHS_TXPHS2, 2 .EQU T36_PHS_TXPHS1, 1 .EQU T36_PHS_TXPHS0, 0 // register------------------------------------- .EQU T36_PPX, 0x40005508 // 0x4000 5508 T36_PPX Bits------------------------------------- .EQU T36_PPX_PPX31, 31 .EQU T36_PPX_PPX30, 30 .EQU T36_PPX_PPX29, 29 .EQU T36_PPX_PPX28, 28 .EQU T36_PPX_PPX27, 27 .EQU T36_PPX_PPX26, 26 .EQU T36_PPX_PPX25, 25 .EQU T36_PPX_PPX24, 24 .EQU T36_PPX_PPX23, 23 .EQU T36_PPX_PPX22, 22 .EQU T36_PPX_PPX21, 21 .EQU T36_PPX_PPX20, 20 .EQU T36_PPX_PPX19, 19 .EQU T36_PPX_PPX18, 18 .EQU T36_PPX_PPX17, 17 .EQU T36_PPX_PPX16, 16 .EQU T36_PPX_PPX15, 15 .EQU T36_PPX_PPX14, 14 .EQU T36_PPX_PPX13, 13 .EQU T36_PPX_PPX12, 12 .EQU T36_PPX_PPX11, 11 .EQU T36_PPX_PPX10, 10 .EQU T36_PPX_PPX9, 9 .EQU T36_PPX_PPX8, 8 .EQU T36_PPX_PPX7, 7 .EQU T36_PPX_PPX6, 6 .EQU T36_PPX_PPX5, 5 .EQU T36_PPX_PPX4, 4 .EQU T36_PPX_PPX3, 3 .EQU T36_PPX_PPX2, 2 .EQU T36_PPX_PPX1, 1 .EQU T36_PPX_PPX0, 0 // register------------------------------------- .EQU T36_PRSC, 0x4000550C // 0x4000 550C T36_PRSC Bits------------------------------------- .EQU T36_PRSC_TXPRSC31, 31 .EQU T36_PRSC_TXPRSC30, 30 .EQU T36_PRSC_TXPRSC29, 29 .EQU T36_PRSC_TXPRSC28, 28 .EQU T36_PRSC_TXPRSC27, 27 .EQU T36_PRSC_TXPRSC26, 26 .EQU T36_PRSC_TXPRSC25, 25 .EQU T36_PRSC_TXPRSC24, 24 .EQU T36_PRSC_TXPRSC23, 23 .EQU T36_PRSC_TXPRSC22, 22 .EQU T36_PRSC_TXPRSC21, 21 .EQU T36_PRSC_TXPRSC20, 20 .EQU T36_PRSC_TXPRSC19, 19 .EQU T36_PRSC_TXPRSC18, 18 .EQU T36_PRSC_TXPRSC17, 17 .EQU T36_PRSC_TXPRSC16, 16 .EQU T36_PRSC_TXPRSC15, 15 .EQU T36_PRSC_TXPRSC14, 14 .EQU T36_PRSC_TXPRSC13, 13 .EQU T36_PRSC_TXPRSC12, 12 .EQU T36_PRSC_TXPRSC11, 11 .EQU T36_PRSC_TXPRSC10, 10 .EQU T36_PRSC_TXPRSC9, 9 .EQU T36_PRSC_TXPRSC8, 8 .EQU T36_PRSC_TXPRSC7, 7 .EQU T36_PRSC_TXPRSC6, 6 .EQU T36_PRSC_TXPRSC5, 5 .EQU T36_PRSC_TXPRSC4, 4 .EQU T36_PRSC_TXPRSC3, 3 .EQU T36_PRSC_TXPRSC2, 2 .EQU T36_PRSC_TXPRSC1, 1 .EQU T36_PRSC_TXPRSC0, 0 // register------------------------------------- .EQU T36_CTL, 0x40005510 // 0x4000 5510 T36_CTL Bits------------------------------------- .EQU T36_CTL_BLINKEN, 31 .EQU T36_CTL_UDSYNEN, 29 .EQU T36_CTL_HRLOCK, 28 .EQU T36_CTL_ETLOCK, 27 .EQU T36_CTL_PCLOCK, 26 .EQU T36_CTL_DBLOCK, 25 .EQU T36_CTL_AQLOCKB, 24 .EQU T36_CTL_AQLOCKA, 23 .EQU T36_CTL_CAPEN, 22 .EQU T36_CTL_CAPSEL, 21 .EQU T36_CTL_TXMAX, 19 .EQU T36_CTL_PHSDIR, 18 .EQU T36_CTL_SWFSYNC, 17 .EQU T36_CTL_SYNCOSEL1, 16 .EQU T36_CTL_SYNCOSEL0, 15 .EQU T36_CTL_PHSEN, 14 .EQU T36_CTL_SYNCI, 13 .EQU T36_CTL_TXUR, 12 .EQU T36_CTL_TXUDEVT, 11 .EQU T36_CTL_TXUDEN, 10 .EQU T36_CTL_TXCMS2, 9 .EQU T36_CTL_TXCMS1, 8 .EQU T36_CTL_TXCMS0, 7 .EQU T36_CTL_TXDIR, 6 .EQU T36_CTL_TXCLK1, 5 .EQU T36_CTL_TXCLK0, 4 .EQU T36_CTL_TXSY, 3 .EQU T36_CTL_TXGATE, 2 .EQU T36_CTL_TXCS, 1 .EQU T36_CTL_TXEN, 0 // register------------------------------------- .EQU EPWM36_RA, 0x40005514 // 0x4000 5514 EPWM36_RA Bits------------------------------------- .EQU EPWM36_RA_EPWMRA31, 31 .EQU EPWM36_RA_EPWMRA30, 30 .EQU EPWM36_RA_EPWMRA29, 29 .EQU EPWM36_RA_EPWMRA28, 28 .EQU EPWM36_RA_EPWMRA27, 27 .EQU EPWM36_RA_EPWMRA26, 26 .EQU EPWM36_RA_EPWMRA25, 25 .EQU EPWM36_RA_EPWMRA24, 24 .EQU EPWM36_RA_EPWMRA23, 23 .EQU EPWM36_RA_EPWMRA22, 22 .EQU EPWM36_RA_EPWMRA21, 21 .EQU EPWM36_RA_EPWMRA20, 20 .EQU EPWM36_RA_EPWMRA19, 19 .EQU EPWM36_RA_EPWMRA18, 18 .EQU EPWM36_RA_EPWMRA17, 17 .EQU EPWM36_RA_EPWMRA16, 16 .EQU EPWM36_RA_EPWMRA15, 15 .EQU EPWM36_RA_EPWMRA14, 14 .EQU EPWM36_RA_EPWMRA13, 13 .EQU EPWM36_RA_EPWMRA12, 12 .EQU EPWM36_RA_EPWMRA11, 11 .EQU EPWM36_RA_EPWMRA10, 10 .EQU EPWM36_RA_EPWMRA9, 9 .EQU EPWM36_RA_EPWMRA8, 8 .EQU EPWM36_RA_EPWMRA7, 7 .EQU EPWM36_RA_EPWMRA6, 6 .EQU EPWM36_RA_EPWMRA5, 5 .EQU EPWM36_RA_EPWMRA4, 4 .EQU EPWM36_RA_EPWMRA3, 3 .EQU EPWM36_RA_EPWMRA2, 2 .EQU EPWM36_RA_EPWMRA1, 1 .EQU EPWM36_RA_EPWMRA0, 0 // register------------------------------------- .EQU EPWM36_RB, 0x40005518 // 0x4000 5518 EPWM36_RB Bits------------------------------------- .EQU EPWM36_RB_EPWMRB31, 31 .EQU EPWM36_RB_EPWMRB30, 30 .EQU EPWM36_RB_EPWMRB29, 29 .EQU EPWM36_RB_EPWMRB28, 28 .EQU EPWM36_RB_EPWMRB27, 27 .EQU EPWM36_RB_EPWMRB26, 26 .EQU EPWM36_RB_EPWMRB25, 25 .EQU EPWM36_RB_EPWMRB24, 24 .EQU EPWM36_RB_EPWMRB23, 23 .EQU EPWM36_RB_EPWMRB22, 22 .EQU EPWM36_RB_EPWMRB21, 21 .EQU EPWM36_RB_EPWMRB20, 20 .EQU EPWM36_RB_EPWMRB19, 19 .EQU EPWM36_RB_EPWMRB18, 18 .EQU EPWM36_RB_EPWMRB17, 17 .EQU EPWM36_RB_EPWMRB16, 16 .EQU EPWM36_RB_EPWMRB15, 15 .EQU EPWM36_RB_EPWMRB14, 14 .EQU EPWM36_RB_EPWMRB13, 13 .EQU EPWM36_RB_EPWMRB12, 12 .EQU EPWM36_RB_EPWMRB11, 11 .EQU EPWM36_RB_EPWMRB10, 10 .EQU EPWM36_RB_EPWMRB9, 9 .EQU EPWM36_RB_EPWMRB8, 8 .EQU EPWM36_RB_EPWMRB7, 7 .EQU EPWM36_RB_EPWMRB6, 6 .EQU EPWM36_RB_EPWMRB5, 5 .EQU EPWM36_RB_EPWMRB4, 4 .EQU EPWM36_RB_EPWMRB3, 3 .EQU EPWM36_RB_EPWMRB2, 2 .EQU EPWM36_RB_EPWMRB1, 1 .EQU EPWM36_RB_EPWMRB0, 0 // register------------------------------------- .EQU EPWM36_CTLA, 0x4000551C // 0x4000 551C EPWM36_CTLA Bits------------------------------------- .EQU EPWM36_CTLA_OTSFA, 16 .EQU EPWM36_CTLA_ACTSFA1, 15 .EQU EPWM36_CTLA_ACTSFA0, 14 .EQU EPWM36_CTLA_CSFA1, 13 .EQU EPWM36_CTLA_CSFA0, 12 .EQU EPWM36_CTLA_ACBD1, 11 .EQU EPWM36_CTLA_ACBD0, 10 .EQU EPWM36_CTLA_ACBU1, 9 .EQU EPWM36_CTLA_ACBU0, 8 .EQU EPWM36_CTLA_ACAD1, 7 .EQU EPWM36_CTLA_ACAD0, 6 .EQU EPWM36_CTLA_ACAU1, 5 .EQU EPWM36_CTLA_ACAU0, 4 .EQU EPWM36_CTLA_APRD1, 3 .EQU EPWM36_CTLA_APRD0, 2 .EQU EPWM36_CTLA_AZRO1, 1 .EQU EPWM36_CTLA_AZRO0, 0 // register------------------------------------- .EQU EPWM36_CTLB, 0x40005520 // 0x4000 5520 EPWM36_CTLB Bits------------------------------------- .EQU EPWM36_CTLB_OTSFB, 16 .EQU EPWM36_CTLB_ACTSFB1, 15 .EQU EPWM36_CTLB_ACTSFB0, 14 .EQU EPWM36_CTLB_CSFB1, 13 .EQU EPWM36_CTLB_CSFB0, 12 .EQU EPWM36_CTLB_BCBD1, 11 .EQU EPWM36_CTLB_BCBD0, 10 .EQU EPWM36_CTLB_BCBU1, 9 .EQU EPWM36_CTLB_BCBU0, 8 .EQU EPWM36_CTLB_BCAD1, 7 .EQU EPWM36_CTLB_BCAD0, 6 .EQU EPWM36_CTLB_BCAU1, 5 .EQU EPWM36_CTLB_BCAU0, 4 .EQU EPWM36_CTLB_BPRD1, 3 .EQU EPWM36_CTLB_BPRD0, 2 .EQU EPWM36_CTLB_BZRO1, 1 .EQU EPWM36_CTLB_BZRO0, 0 // register------------------------------------- .EQU EPWM36_DBCTL, 0x40005524 // 0x4000 5524 EPWM36_DBCTL Bits------------------------------------- .EQU EPWM36_DBCTL_INMODE1, 5 .EQU EPWM36_DBCTL_INMODE0, 4 .EQU EPWM36_DBCTL_POLSEL1, 3 .EQU EPWM36_DBCTL_POLSEL0, 2 .EQU EPWM36_DBCTL_OUTMODE1, 1 .EQU EPWM36_DBCTL_OUTMODE0, 0 // register------------------------------------- .EQU EPWM36_DBT, 0x40005528 // 0x4000 5528 EPWM36_DBT Bits------------------------------------- .EQU EPWM36_DBT_RDBT15, 31 .EQU EPWM36_DBT_RDBT14, 30 .EQU EPWM36_DBT_RDBT13, 29 .EQU EPWM36_DBT_RDBT12, 28 .EQU EPWM36_DBT_RDBT11, 27 .EQU EPWM36_DBT_RDBT10, 26 .EQU EPWM36_DBT_RDBT9, 25 .EQU EPWM36_DBT_RDBT8, 24 .EQU EPWM36_DBT_RDBT7, 23 .EQU EPWM36_DBT_RDBT6, 22 .EQU EPWM36_DBT_RDBT5, 21 .EQU EPWM36_DBT_RDBT4, 20 .EQU EPWM36_DBT_RDBT3, 19 .EQU EPWM36_DBT_RDBT2, 18 .EQU EPWM36_DBT_RDBT1, 17 .EQU EPWM36_DBT_RDBT0, 16 .EQU EPWM36_DBT_FDBT15, 15 .EQU EPWM36_DBT_FDBT14, 14 .EQU EPWM36_DBT_FDBT13, 13 .EQU EPWM36_DBT_FDBT12, 12 .EQU EPWM36_DBT_FDBT11, 11 .EQU EPWM36_DBT_FDBT10, 10 .EQU EPWM36_DBT_FDBT9, 9 .EQU EPWM36_DBT_FDBT8, 8 .EQU EPWM36_DBT_FDBT7, 7 .EQU EPWM36_DBT_FDBT6, 6 .EQU EPWM36_DBT_FDBT5, 5 .EQU EPWM36_DBT_FDBT4, 4 .EQU EPWM36_DBT_FDBT3, 3 .EQU EPWM36_DBT_FDBT2, 2 .EQU EPWM36_DBT_FDBT1, 1 .EQU EPWM36_DBT_FDBT0, 0 // register------------------------------------- .EQU EPWM36_PCCTL, 0x4000552C // 0x4000 552C EPWM36_PCCTL Bits------------------------------------- .EQU EPWM36_PCCTL_CHPFREQ2, 10 .EQU EPWM36_PCCTL_CHPFREQ1, 9 .EQU EPWM36_PCCTL_CHPFREQ0, 8 .EQU EPWM36_PCCTL_CHPDUTY2, 7 .EQU EPWM36_PCCTL_CHPDUTY1, 6 .EQU EPWM36_PCCTL_CHPDUTY0, 5 .EQU EPWM36_PCCTL_OSHTWTH3, 4 .EQU EPWM36_PCCTL_OSHTWTH2, 3 .EQU EPWM36_PCCTL_OSHTWTH1, 2 .EQU EPWM36_PCCTL_OSHTWTH0, 1 .EQU EPWM36_PCCTL_CHPEN, 0 // register------------------------------------- .EQU EPWM36_PXASCTL, 0x40005530 // 0x4000 5530 EPWM36_PXASCTL Bits------------------------------------- .EQU EPWM36_PXASCTL_PXRSEN, 8 .EQU EPWM36_PXASCTL_PXSSA1, 7 .EQU EPWM36_PXASCTL_PXSSA0, 6 .EQU EPWM36_PXASCTL_PXSSB1, 5 .EQU EPWM36_PXASCTL_PXSSB0, 4 .EQU EPWM36_PXASCTL_PXASE, 3 .EQU EPWM36_PXASCTL_PXASS2, 2 .EQU EPWM36_PXASCTL_PXASS1, 1 .EQU EPWM36_PXASCTL_PXASS0, 0 // register------------------------------------- .EQU EPWM36_ETCTL, 0x40005534 // 0x4000 5534 EPWM36_ETCTL Bits------------------------------------- .EQU EPWM36_ETCTL_BTSEL1, 25 .EQU EPWM36_ETCTL_BTSEL0, 24 .EQU EPWM36_ETCTL_FRCB, 19 .EQU EPWM36_ETCTL_TOADENB, 16 .EQU EPWM36_ETCTL_ATSEL1, 9 .EQU EPWM36_ETCTL_ATSEL0, 8 .EQU EPWM36_ETCTL_FRCA, 3 .EQU EPWM36_ETCTL_TOADENA, 0 // register------------------------------------- .EQU EPWM36_IE, 0x40005538 // 0x4000 5538 EPWM36_IE Bits------------------------------------- .EQU EPWM36_IE_CAPIE, 9 .EQU EPWM36_IE_TXDIE, 8 .EQU EPWM36_IE_TXCIE, 7 .EQU EPWM36_IE_TXAIE, 6 .EQU EPWM36_IE_TXBIE, 5 .EQU EPWM36_IE_TXIE, 4 .EQU EPWM36_IE_TXUIE, 3 .EQU EPWM36_IE_TXGIE, 2 .EQU EPWM36_IE_TXTIE1, 1 .EQU EPWM36_IE_TXTIE0, 0 // register------------------------------------- .EQU EPWM36_IF, 0x4000553C // 0x4000 553C EPWM36_IF Bits------------------------------------- .EQU EPWM36_IF_CAPIF, 9 .EQU EPWM36_IF_TXDIF, 8 .EQU EPWM36_IF_TXCIF, 7 .EQU EPWM36_IF_TXAIF, 6 .EQU EPWM36_IF_TXBIF, 5 .EQU EPWM36_IF_TXIF, 4 .EQU EPWM36_IF_TXUIF, 3 .EQU EPWM36_IF_TXGIF, 2 .EQU EPWM36_IF_TXTIF1, 1 .EQU EPWM36_IF_TXTIF0, 0 // register------------------------------------- .EQU EPWM36_IC, 0x40005540 // 0x4000 5540 EPWM36_IC Bits------------------------------------- .EQU EPWM36_IC_CAPIC1, 10 .EQU EPWM36_IC_CAPIC0, 9 .EQU EPWM36_IC_TXDIC, 8 .EQU EPWM36_IC_TXCIC, 7 .EQU EPWM36_IC_TXAIC, 6 .EQU EPWM36_IC_TXBIC, 5 .EQU EPWM36_IC_TXIC, 4 .EQU EPWM36_IC_TXUIC, 3 .EQU EPWM36_IC_TXGIC, 2 .EQU EPWM36_IC_TXTIC1, 1 .EQU EPWM36_IC_TXTIC0, 0 // register------------------------------------- .EQU EPWM36_DE, 0x40005544 // 0x4000 5544 EPWM36_DE Bits------------------------------------- .EQU EPWM36_DE_TXDDE, 8 .EQU EPWM36_DE_TXCDE, 7 .EQU EPWM36_DE_TXADE, 6 .EQU EPWM36_DE_TXBDE, 5 .EQU EPWM36_DE_TXDE, 4 .EQU EPWM36_DE_TXUDE, 3 .EQU EPWM36_DE_TXGDE, 2 .EQU EPWM36_DE_TXTDE1, 1 .EQU EPWM36_DE_TXTDE0, 0 // register------------------------------------- .EQU EPWM36_DF, 0x40005548 // 0x4000 5548 EPWM36_DF Bits------------------------------------- .EQU EPWM36_DF_TXDDF, 8 .EQU EPWM36_DF_TXCDF, 7 .EQU EPWM36_DF_TXADF, 6 .EQU EPWM36_DF_TXBDF, 5 .EQU EPWM36_DF_TXDF, 4 .EQU EPWM36_DF_TXUDF, 3 .EQU EPWM36_DF_TXGDF, 2 .EQU EPWM36_DF_TXTDF1, 1 .EQU EPWM36_DF_TXTDF0, 0 // register------------------------------------- .EQU EPWM36_HRPWMCTLA, 0x40005550 // 0x4000 5550 EPWM36_HRPWMCTLA Bits------------------------------------- .EQU EPWM36_HRPWMCTLA_HRPHSENA, 6 .EQU EPWM36_HRPWMCTLA_HRFENA, 5 .EQU EPWM36_HRPWMCTLA_HRRENA, 4 .EQU EPWM36_HRPWMCTLA_HRPENA, 3 .EQU EPWM36_HRPWMCTLA_HRDENA, 2 .EQU EPWM36_HRPWMCTLA_HRSELA, 1 .EQU EPWM36_HRPWMCTLA_HRENA, 0 // register------------------------------------- .EQU EPWM36_HRCMPA, 0x40005554 // 0x4000 5554 EPWM36_HRCMPA Bits------------------------------------- .EQU EPWM36_HRCMPA_HRCMPA7, 7 .EQU EPWM36_HRCMPA_HRCMPA6, 6 .EQU EPWM36_HRCMPA_HRCMPA5, 5 .EQU EPWM36_HRCMPA_HRCMPA4, 4 .EQU EPWM36_HRCMPA_HRCMPA3, 3 .EQU EPWM36_HRCMPA_HRCMPA2, 2 .EQU EPWM36_HRCMPA_HRCMPA1, 1 .EQU EPWM36_HRCMPA_HRCMPA0, 0 // register------------------------------------- .EQU EPWM36_CAP, 0x40005558 // 0x4000 5558 EPWM36_CAP Bits------------------------------------- .EQU EPWM36_CAP_CAP31, 31 .EQU EPWM36_CAP_CAP30, 30 .EQU EPWM36_CAP_CAP29, 29 .EQU EPWM36_CAP_CAP28, 28 .EQU EPWM36_CAP_CAP27, 27 .EQU EPWM36_CAP_CAP26, 26 .EQU EPWM36_CAP_CAP25, 25 .EQU EPWM36_CAP_CAP24, 24 .EQU EPWM36_CAP_CAP23, 23 .EQU EPWM36_CAP_CAP22, 22 .EQU EPWM36_CAP_CAP21, 21 .EQU EPWM36_CAP_CAP20, 20 .EQU EPWM36_CAP_CAP19, 19 .EQU EPWM36_CAP_CAP18, 18 .EQU EPWM36_CAP_CAP17, 17 .EQU EPWM36_CAP_CAP16, 16 .EQU EPWM36_CAP_CAP15, 15 .EQU EPWM36_CAP_CAP14, 14 .EQU EPWM36_CAP_CAP13, 13 .EQU EPWM36_CAP_CAP12, 12 .EQU EPWM36_CAP_CAP11, 11 .EQU EPWM36_CAP_CAP10, 10 .EQU EPWM36_CAP_CAP9, 9 .EQU EPWM36_CAP_CAP8, 8 .EQU EPWM36_CAP_CAP7, 7 .EQU EPWM36_CAP_CAP6, 6 .EQU EPWM36_CAP_CAP5, 5 .EQU EPWM36_CAP_CAP4, 4 .EQU EPWM36_CAP_CAP3, 3 .EQU EPWM36_CAP_CAP2, 2 .EQU EPWM36_CAP_CAP1, 1 .EQU EPWM36_CAP_CAP0, 0 // register------------------------------------- .EQU EPWM36_RC, 0x4000555C // 0x4000 555C EPWM36_RC Bits------------------------------------- .EQU EPWM36_RC_EPWMRC31, 31 .EQU EPWM36_RC_EPWMRC30, 30 .EQU EPWM36_RC_EPWMRC29, 29 .EQU EPWM36_RC_EPWMRC28, 28 .EQU EPWM36_RC_EPWMRC27, 27 .EQU EPWM36_RC_EPWMRC26, 26 .EQU EPWM36_RC_EPWMRC25, 25 .EQU EPWM36_RC_EPWMRC24, 24 .EQU EPWM36_RC_EPWMRC23, 23 .EQU EPWM36_RC_EPWMRC22, 22 .EQU EPWM36_RC_EPWMRC21, 21 .EQU EPWM36_RC_EPWMRC20, 20 .EQU EPWM36_RC_EPWMRC19, 19 .EQU EPWM36_RC_EPWMRC18, 18 .EQU EPWM36_RC_EPWMRC17, 17 .EQU EPWM36_RC_EPWMRC16, 16 .EQU EPWM36_RC_EPWMRC15, 15 .EQU EPWM36_RC_EPWMRC14, 14 .EQU EPWM36_RC_EPWMRC13, 13 .EQU EPWM36_RC_EPWMRC12, 12 .EQU EPWM36_RC_EPWMRC11, 11 .EQU EPWM36_RC_EPWMRC10, 10 .EQU EPWM36_RC_EPWMRC9, 9 .EQU EPWM36_RC_EPWMRC8, 8 .EQU EPWM36_RC_EPWMRC7, 7 .EQU EPWM36_RC_EPWMRC6, 6 .EQU EPWM36_RC_EPWMRC5, 5 .EQU EPWM36_RC_EPWMRC4, 4 .EQU EPWM36_RC_EPWMRC3, 3 .EQU EPWM36_RC_EPWMRC2, 2 .EQU EPWM36_RC_EPWMRC1, 1 .EQU EPWM36_RC_EPWMRC0, 0 // register------------------------------------- .EQU EPWM36_RD, 0x40005560 // 0x4000 5560 EPWM36_RD Bits------------------------------------- .EQU EPWM36_RD_EPWMRD31, 31 .EQU EPWM36_RD_EPWMRD30, 30 .EQU EPWM36_RD_EPWMRD29, 29 .EQU EPWM36_RD_EPWMRD28, 28 .EQU EPWM36_RD_EPWMRD27, 27 .EQU EPWM36_RD_EPWMRD26, 26 .EQU EPWM36_RD_EPWMRD25, 25 .EQU EPWM36_RD_EPWMRD24, 24 .EQU EPWM36_RD_EPWMRD23, 23 .EQU EPWM36_RD_EPWMRD22, 22 .EQU EPWM36_RD_EPWMRD21, 21 .EQU EPWM36_RD_EPWMRD20, 20 .EQU EPWM36_RD_EPWMRD19, 19 .EQU EPWM36_RD_EPWMRD18, 18 .EQU EPWM36_RD_EPWMRD17, 17 .EQU EPWM36_RD_EPWMRD16, 16 .EQU EPWM36_RD_EPWMRD15, 15 .EQU EPWM36_RD_EPWMRD14, 14 .EQU EPWM36_RD_EPWMRD13, 13 .EQU EPWM36_RD_EPWMRD12, 12 .EQU EPWM36_RD_EPWMRD11, 11 .EQU EPWM36_RD_EPWMRD10, 10 .EQU EPWM36_RD_EPWMRD9, 9 .EQU EPWM36_RD_EPWMRD8, 8 .EQU EPWM36_RD_EPWMRD7, 7 .EQU EPWM36_RD_EPWMRD6, 6 .EQU EPWM36_RD_EPWMRD5, 5 .EQU EPWM36_RD_EPWMRD4, 4 .EQU EPWM36_RD_EPWMRD3, 3 .EQU EPWM36_RD_EPWMRD2, 2 .EQU EPWM36_RD_EPWMRD1, 1 .EQU EPWM36_RD_EPWMRD0, 0 // register------------------------------------- .EQU EPWM36_UDCTL, 0x40005564 // 0x4000 5564 EPWM36_UDCTL Bits------------------------------------- .EQU EPWM36_UDCTL_GBUDEN, 27 .EQU EPWM36_UDCTL_HRPUDSEL1, 26 .EQU EPWM36_UDCTL_HRPUDSEL0, 25 .EQU EPWM36_UDCTL_HRPUDEN, 24 .EQU EPWM36_UDCTL_EBUDSEL1, 23 .EQU EPWM36_UDCTL_EBUDSEL0, 22 .EQU EPWM36_UDCTL_EBUDEN, 21 .EQU EPWM36_UDCTL_EAUDSEL1, 20 .EQU EPWM36_UDCTL_EAUDSEL0, 19 .EQU EPWM36_UDCTL_EAUDEN, 18 .EQU EPWM36_UDCTL_CMDUDSEL1, 17 .EQU EPWM36_UDCTL_CMDUDSEL0, 16 .EQU EPWM36_UDCTL_CMDUDEN, 15 .EQU EPWM36_UDCTL_CMCUDSEL1, 14 .EQU EPWM36_UDCTL_CMCUDSEL0, 13 .EQU EPWM36_UDCTL_CMCUDEN, 12 .EQU EPWM36_UDCTL_CMBUDSEL1, 11 .EQU EPWM36_UDCTL_CMBUDSEL0, 10 .EQU EPWM36_UDCTL_CMBUDEN, 9 .EQU EPWM36_UDCTL_CMAUDSEL1, 8 .EQU EPWM36_UDCTL_CMAUDSEL0, 7 .EQU EPWM36_UDCTL_CMAUDEN, 6 .EQU EPWM36_UDCTL_PRUDSEL1, 5 .EQU EPWM36_UDCTL_PRUDSEL0, 4 .EQU EPWM36_UDCTL_PRUDEN, 3 .EQU EPWM36_UDCTL_PPUDSEL1, 2 .EQU EPWM36_UDCTL_PPUDSEL0, 1 .EQU EPWM36_UDCTL_PPUDEN, 0 // register------------------------------------- .EQU EPWM36_SRT, 0x40005568 // 0x4000 5568 EPWM36_SRT Bits------------------------------------- .EQU EPWM36_SRT_T31, 31 .EQU EPWM36_SRT_T30, 30 .EQU EPWM36_SRT_T29, 29 .EQU EPWM36_SRT_T28, 28 .EQU EPWM36_SRT_T27, 27 .EQU EPWM36_SRT_T26, 26 .EQU EPWM36_SRT_T25, 25 .EQU EPWM36_SRT_T24, 24 .EQU EPWM36_SRT_T23, 23 .EQU EPWM36_SRT_T22, 22 .EQU EPWM36_SRT_T21, 21 .EQU EPWM36_SRT_T20, 20 .EQU EPWM36_SRT_T19, 19 .EQU EPWM36_SRT_T18, 18 .EQU EPWM36_SRT_T17, 17 .EQU EPWM36_SRT_T16, 16 .EQU EPWM36_SRT_T15, 15 .EQU EPWM36_SRT_T14, 14 .EQU EPWM36_SRT_T13, 13 .EQU EPWM36_SRT_T12, 12 .EQU EPWM36_SRT_T11, 11 .EQU EPWM36_SRT_T10, 10 .EQU EPWM36_SRT_T9, 9 .EQU EPWM36_SRT_T8, 8 .EQU EPWM36_SRT_T7, 7 .EQU EPWM36_SRT_T6, 6 .EQU EPWM36_SRT_T5, 5 .EQU EPWM36_SRT_T4, 4 .EQU EPWM36_SRT_T3, 3 .EQU EPWM36_SRT_T2, 2 .EQU EPWM36_SRT_T1, 1 .EQU EPWM36_SRT_T0, 0 // register------------------------------------- .EQU EPWM36_HRPWMCTLB, 0x4000556C // 0x4000 556C EPWM36_HRPWMCTLB Bits------------------------------------- .EQU EPWM36_HRPWMCTLB_HRPHSENB, 6 .EQU EPWM36_HRPWMCTLB_HRFENB, 5 .EQU EPWM36_HRPWMCTLB_HRRENB, 4 .EQU EPWM36_HRPWMCTLB_HRPENB, 3 .EQU EPWM36_HRPWMCTLB_HRDENB, 2 .EQU EPWM36_HRPWMCTLB_HRSELB, 1 .EQU EPWM36_HRPWMCTLB_HRENB, 0 // register------------------------------------- .EQU EPWM36_HRCMPB, 0x40005570 // 0x4000 5570 EPWM36_HRCMPB Bits------------------------------------- .EQU EPWM36_HRCMPB_HRCMPB7, 7 .EQU EPWM36_HRCMPB_HRCMPB6, 6 .EQU EPWM36_HRCMPB_HRCMPB5, 5 .EQU EPWM36_HRCMPB_HRCMPB4, 4 .EQU EPWM36_HRCMPB_HRCMPB3, 3 .EQU EPWM36_HRCMPB_HRCMPB2, 2 .EQU EPWM36_HRCMPB_HRCMPB1, 1 .EQU EPWM36_HRCMPB_HRCMPB0, 0 // register------------------------------------- .EQU EPWM36_HRDB, 0x40005574 // 0x4000 5574 EPWM36_HRDB Bits------------------------------------- .EQU EPWM36_HRDB_HRR7, 15 .EQU EPWM36_HRDB_HRR6, 14 .EQU EPWM36_HRDB_HRR5, 13 .EQU EPWM36_HRDB_HRR4, 12 .EQU EPWM36_HRDB_HRR3, 11 .EQU EPWM36_HRDB_HRR2, 10 .EQU EPWM36_HRDB_HRR1, 9 .EQU EPWM36_HRDB_HRR0, 8 .EQU EPWM36_HRDB_HRF7, 7 .EQU EPWM36_HRDB_HRF6, 6 .EQU EPWM36_HRDB_HRF5, 5 .EQU EPWM36_HRDB_HRF4, 4 .EQU EPWM36_HRDB_HRF3, 3 .EQU EPWM36_HRDB_HRF2, 2 .EQU EPWM36_HRDB_HRF1, 1 .EQU EPWM36_HRDB_HRF0, 0 // register------------------------------------- .EQU EPWM36_HRPHS, 0x40005578 // 0x4000 5578 EPWM36_HRPHS Bits------------------------------------- .EQU EPWM36_HRPHS_HRPRE7, 15 .EQU EPWM36_HRPHS_HRPRE6, 14 .EQU EPWM36_HRPHS_HRPRE5, 13 .EQU EPWM36_HRPHS_HRPRE4, 12 .EQU EPWM36_HRPHS_HRPRE3, 11 .EQU EPWM36_HRPHS_HRPRE2, 10 .EQU EPWM36_HRPHS_HRPRE1, 9 .EQU EPWM36_HRPHS_HRPRE0, 8 .EQU EPWM36_HRPHS_HRPHS7, 7 .EQU EPWM36_HRPHS_HRPHS6, 6 .EQU EPWM36_HRPHS_HRPHS5, 5 .EQU EPWM36_HRPHS_HRPHS4, 4 .EQU EPWM36_HRPHS_HRPHS3, 3 .EQU EPWM36_HRPHS_HRPHS2, 2 .EQU EPWM36_HRPHS_HRPHS1, 1 .EQU EPWM36_HRPHS_HRPHS0, 0 // register------------------------------------- .EQU EPWM36_HRCFG, 0x4000557C // 0x4000 557C EPWM36_HRCFG Bits------------------------------------- .EQU EPWM36_HRCFG_STEP7, 15 .EQU EPWM36_HRCFG_STEP6, 14 .EQU EPWM36_HRCFG_STEP5, 13 .EQU EPWM36_HRCFG_STEP4, 12 .EQU EPWM36_HRCFG_STEP3, 11 .EQU EPWM36_HRCFG_STEP2, 10 .EQU EPWM36_HRCFG_STEP1, 9 .EQU EPWM36_HRCFG_STEP0, 8 .EQU EPWM36_HRCFG_TIMS7, 7 .EQU EPWM36_HRCFG_TIMS6, 6 .EQU EPWM36_HRCFG_TIMS5, 5 .EQU EPWM36_HRCFG_TIMS4, 4 .EQU EPWM36_HRCFG_TIMS3, 3 .EQU EPWM36_HRCFG_TIMS2, 2 .EQU EPWM36_HRCFG_TIMS1, 1 .EQU EPWM36_HRCFG_TIMS0, 0 // register------------------------------------- .EQU EPWM36_HRDELAY, 0x40005580 // 0x4000 5580 EPWM36_HRDELAY Bits------------------------------------- .EQU EPWM36_HRDELAY_REDBHR7, 31 .EQU EPWM36_HRDELAY_REDBHR6, 30 .EQU EPWM36_HRDELAY_REDBHR5, 29 .EQU EPWM36_HRDELAY_REDBHR4, 28 .EQU EPWM36_HRDELAY_REDBHR3, 27 .EQU EPWM36_HRDELAY_REDBHR2, 26 .EQU EPWM36_HRDELAY_REDBHR1, 25 .EQU EPWM36_HRDELAY_REDBHR0, 24 .EQU EPWM36_HRDELAY_FEDBHR7, 23 .EQU EPWM36_HRDELAY_FEDBHR6, 22 .EQU EPWM36_HRDELAY_FEDBHR5, 21 .EQU EPWM36_HRDELAY_FEDBHR4, 20 .EQU EPWM36_HRDELAY_FEDBHR3, 19 .EQU EPWM36_HRDELAY_FEDBHR2, 18 .EQU EPWM36_HRDELAY_FEDBHR1, 17 .EQU EPWM36_HRDELAY_FEDBHR0, 16 .EQU EPWM36_HRDELAY_REDAHR7, 15 .EQU EPWM36_HRDELAY_REDAHR6, 14 .EQU EPWM36_HRDELAY_REDAHR5, 13 .EQU EPWM36_HRDELAY_REDAHR4, 12 .EQU EPWM36_HRDELAY_REDAHR3, 11 .EQU EPWM36_HRDELAY_REDAHR2, 10 .EQU EPWM36_HRDELAY_REDAHR1, 9 .EQU EPWM36_HRDELAY_REDAHR0, 8 .EQU EPWM36_HRDELAY_FEDAHR7, 7 .EQU EPWM36_HRDELAY_FEDAHR6, 6 .EQU EPWM36_HRDELAY_FEDAHR5, 5 .EQU EPWM36_HRDELAY_FEDAHR4, 4 .EQU EPWM36_HRDELAY_FEDAHR3, 3 .EQU EPWM36_HRDELAY_FEDAHR2, 2 .EQU EPWM36_HRDELAY_FEDAHR1, 1 .EQU EPWM36_HRDELAY_FEDAHR0, 0 // register------------------------------------- .EQU T36_CTL2, 0x40005584 // 0x4000 5584 T36_CTL2 Bits------------------------------------- .EQU T36_CTL2_LPHSEN, 24 .EQU T36_CTL2_CAPMOD, 23 .EQU T36_CTL2_CAPUF, 22 .EQU T36_CTL2_HRCFGUF, 21 .EQU T36_CTL2_HRPHSUF, 20 .EQU T36_CTL2_HRDBUF, 19 .EQU T36_CTL2_DBTUF, 18 .EQU T36_CTL2_HRPBUF, 17 .EQU T36_CTL2_HRPAUF, 16 .EQU T36_CTL2_EBFUF, 15 .EQU T36_CTL2_EAFUF, 14 .EQU T36_CTL2_PRFUF, 13 .EQU T36_CTL2_PPFUF, 12 .EQU T36_CTL2_CMDFUF, 11 .EQU T36_CTL2_CMCFUF, 10 .EQU T36_CTL2_CMBFUF, 9 .EQU T36_CTL2_CMAFUF, 8 .EQU T36_CTL2_TRGIOS, 7 .EQU T36_CTL2_SYNCIOS, 6 .EQU T36_CTL2_DUDBSEL, 5 .EQU T36_CTL2_DUDBEN, 4 .EQU T36_CTL2_BWINDTSEL, 3 .EQU T36_CTL2_BWINDPOL, 2 .EQU T36_CTL2_BWINDEN, 1 .EQU T36_CTL2_SWCLRPF, 0 // register------------------------------------- .EQU EPWM36_BWCFG, 0x40005588 // 0x4000 5588 EPWM36_BWCFG Bits------------------------------------- .EQU EPWM36_BWCFG_BWOFFSET15, 31 .EQU EPWM36_BWCFG_BWOFFSET14, 30 .EQU EPWM36_BWCFG_BWOFFSET13, 29 .EQU EPWM36_BWCFG_BWOFFSET12, 28 .EQU EPWM36_BWCFG_BWOFFSET11, 27 .EQU EPWM36_BWCFG_BWOFFSET10, 26 .EQU EPWM36_BWCFG_BWOFFSET9, 25 .EQU EPWM36_BWCFG_BWOFFSET8, 24 .EQU EPWM36_BWCFG_BWOFFSET7, 23 .EQU EPWM36_BWCFG_BWOFFSET6, 22 .EQU EPWM36_BWCFG_BWOFFSET5, 21 .EQU EPWM36_BWCFG_BWOFFSET4, 20 .EQU EPWM36_BWCFG_BWOFFSET3, 19 .EQU EPWM36_BWCFG_BWOFFSET2, 18 .EQU EPWM36_BWCFG_BWOFFSET1, 17 .EQU EPWM36_BWCFG_BWOFFSET0, 16 .EQU EPWM36_BWCFG_BWIDTH15, 15 .EQU EPWM36_BWCFG_BWIDTH14, 14 .EQU EPWM36_BWCFG_BWIDTH13, 13 .EQU EPWM36_BWCFG_BWIDTH12, 12 .EQU EPWM36_BWCFG_BWIDTH11, 11 .EQU EPWM36_BWCFG_BWIDTH10, 10 .EQU EPWM36_BWCFG_BWIDTH9, 9 .EQU EPWM36_BWCFG_BWIDTH8, 8 .EQU EPWM36_BWCFG_BWIDTH7, 7 .EQU EPWM36_BWCFG_BWIDTH6, 6 .EQU EPWM36_BWCFG_BWIDTH5, 5 .EQU EPWM36_BWCFG_BWIDTH4, 4 .EQU EPWM36_BWCFG_BWIDTH3, 3 .EQU EPWM36_BWCFG_BWIDTH2, 2 .EQU EPWM36_BWCFG_BWIDTH1, 1 .EQU EPWM36_BWCFG_BWIDTH0, 0 // register------------------------------------- .EQU EPWM36_BWCNT, 0x4000558C // 0x4000 558C EPWM36_BWCNT Bits------------------------------------- .EQU EPWM36_BWCNT_WITCNT15, 31 .EQU EPWM36_BWCNT_WITCNT14, 30 .EQU EPWM36_BWCNT_WITCNT13, 29 .EQU EPWM36_BWCNT_WITCNT12, 28 .EQU EPWM36_BWCNT_WITCNT11, 27 .EQU EPWM36_BWCNT_WITCNT10, 26 .EQU EPWM36_BWCNT_WITCNT9, 25 .EQU EPWM36_BWCNT_WITCNT8, 24 .EQU EPWM36_BWCNT_WITCNT7, 23 .EQU EPWM36_BWCNT_WITCNT6, 22 .EQU EPWM36_BWCNT_WITCNT5, 21 .EQU EPWM36_BWCNT_WITCNT4, 20 .EQU EPWM36_BWCNT_WITCNT3, 19 .EQU EPWM36_BWCNT_WITCNT2, 18 .EQU EPWM36_BWCNT_WITCNT1, 17 .EQU EPWM36_BWCNT_WITCNT0, 16 .EQU EPWM36_BWCNT_OFFCNT15, 15 .EQU EPWM36_BWCNT_OFFCNT14, 14 .EQU EPWM36_BWCNT_OFFCNT13, 13 .EQU EPWM36_BWCNT_OFFCNT12, 12 .EQU EPWM36_BWCNT_OFFCNT11, 11 .EQU EPWM36_BWCNT_OFFCNT10, 10 .EQU EPWM36_BWCNT_OFFCNT9, 9 .EQU EPWM36_BWCNT_OFFCNT8, 8 .EQU EPWM36_BWCNT_OFFCNT7, 7 .EQU EPWM36_BWCNT_OFFCNT6, 6 .EQU EPWM36_BWCNT_OFFCNT5, 5 .EQU EPWM36_BWCNT_OFFCNT4, 4 .EQU EPWM36_BWCNT_OFFCNT3, 3 .EQU EPWM36_BWCNT_OFFCNT2, 2 .EQU EPWM36_BWCNT_OFFCNT1, 1 .EQU EPWM36_BWCNT_OFFCNT0, 0 // register------------------------------------- .EQU EPWM36_ETCTL2, 0x40005590 // 0x4000 5590 EPWM36_ETCTL2 Bits------------------------------------- .EQU EPWM36_ETCTL2_BT3, 26 .EQU EPWM36_ETCTL2_BT2, 25 .EQU EPWM36_ETCTL2_BT1, 24 .EQU EPWM36_ETCTL2_BT0, 23 .EQU EPWM36_ETCTL2_BPP3, 22 .EQU EPWM36_ETCTL2_BPP2, 21 .EQU EPWM36_ETCTL2_BPP1, 20 .EQU EPWM36_ETCTL2_BPP0, 19 .EQU EPWM36_ETCTL2_SELB2, 18 .EQU EPWM36_ETCTL2_SELB1, 17 .EQU EPWM36_ETCTL2_SELB0, 16 .EQU EPWM36_ETCTL2_AT3, 10 .EQU EPWM36_ETCTL2_AT2, 9 .EQU EPWM36_ETCTL2_AT1, 8 .EQU EPWM36_ETCTL2_AT0, 7 .EQU EPWM36_ETCTL2_APP3, 6 .EQU EPWM36_ETCTL2_APP2, 5 .EQU EPWM36_ETCTL2_APP1, 4 .EQU EPWM36_ETCTL2_APP0, 3 .EQU EPWM36_ETCTL2_SELA2, 2 .EQU EPWM36_ETCTL2_SELA1, 1 .EQU EPWM36_ETCTL2_SELA0, 0 // register------------------------------------- .EQU EPWM36_GLDCTL, 0x40005594 // 0x4000 5594 EPWM36_GLDCTL Bits------------------------------------- .EQU EPWM36_GLDCTL_HRCFGUDSEL1, 22 .EQU EPWM36_GLDCTL_HRCFGUDSEL0, 21 .EQU EPWM36_GLDCTL_HRCFGUDEN, 20 .EQU EPWM36_GLDCTL_HRPHSUDSEL1, 19 .EQU EPWM36_GLDCTL_HRPHSUDSEL0, 18 .EQU EPWM36_GLDCTL_HRPHSUDEN, 17 .EQU EPWM36_GLDCTL_HRDBUDSEL1, 16 .EQU EPWM36_GLDCTL_HRDBUDSEL0, 15 .EQU EPWM36_GLDCTL_HRDBUDEN, 14 .EQU EPWM36_GLDCTL_DBUDSEL1, 13 .EQU EPWM36_GLDCTL_DBUDSEL0, 12 .EQU EPWM36_GLDCTL_DBUDEN, 11 .EQU EPWM36_GLDCTL_HRPBUDSEL1, 10 .EQU EPWM36_GLDCTL_HRPBUDSEL0, 9 .EQU EPWM36_GLDCTL_HRPBUDEN, 8 .EQU EPWM36_GLDCTL_CLDPRCS7, 7 .EQU EPWM36_GLDCTL_CLDPRCS6, 6 .EQU EPWM36_GLDCTL_CLDPRCS5, 5 .EQU EPWM36_GLDCTL_CLDPRCS4, 4 .EQU EPWM36_GLDCTL_CLDPRCS3, 3 .EQU EPWM36_GLDCTL_CLDPRCS2, 2 .EQU EPWM36_GLDCTL_CLDPRCS1, 1 .EQU EPWM36_GLDCTL_CLDPRCS0, 0 // register------------------------------------- .EQU EPWM36_FILTCTL, 0x40005598 // 0x4000 5598 EPWM36_FILTCTL Bits------------------------------------- .EQU EPWM36_FILTCTL_SYDELAY2, 23 .EQU EPWM36_FILTCTL_SYDELAY1, 22 .EQU EPWM36_FILTCTL_SYDELAY0, 21 .EQU EPWM36_FILTCTL_SYFDIV3, 20 .EQU EPWM36_FILTCTL_SYFDIV2, 19 .EQU EPWM36_FILTCTL_SYFDIV1, 18 .EQU EPWM36_FILTCTL_SYFDIV0, 17 .EQU EPWM36_FILTCTL_SYNCFEN, 16 .EQU EPWM36_FILTCTL_TCKDELAY2, 15 .EQU EPWM36_FILTCTL_TCKDELAY1, 14 .EQU EPWM36_FILTCTL_TCKDELAY0, 13 .EQU EPWM36_FILTCTL_TCKFDIV3, 12 .EQU EPWM36_FILTCTL_TCKFDIV2, 11 .EQU EPWM36_FILTCTL_TCKFDIV1, 10 .EQU EPWM36_FILTCTL_TCKFDIV0, 9 .EQU EPWM36_FILTCTL_TXCKFEN, 8 .EQU EPWM36_FILTCTL_CFDELAY2, 7 .EQU EPWM36_FILTCTL_CFDELAY1, 6 .EQU EPWM36_FILTCTL_CFDELAY0, 5 .EQU EPWM36_FILTCTL_CFDIV3, 4 .EQU EPWM36_FILTCTL_CFDIV2, 3 .EQU EPWM36_FILTCTL_CFDIV1, 2 .EQU EPWM36_FILTCTL_CFDIV0, 1 .EQU EPWM36_FILTCTL_CAPFEN, 0 // register------------------------------------- .EQU ECC18_CTL, 0x40005600 // 0x4000 5600 ECC18_CTL Bits------------------------------------- .EQU ECC18_CTL_MEM2BITERRIC, 14 .EQU ECC18_CTL_MEM1BITERRIC, 13 .EQU ECC18_CTL_MEMERRIC, 12 .EQU ECC18_CTL_MEM2BITERRIE, 10 .EQU ECC18_CTL_MEM1BITERRIE, 9 .EQU ECC18_CTL_MEMERRIE, 8 .EQU ECC18_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC18_INT, 0x40005604 // 0x4000 5604 ECC18_INT Bits------------------------------------- .EQU ECC18_INT_MEM2BITERRIF, 2 .EQU ECC18_INT_MEM1BITERRIF, 1 .EQU ECC18_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC18_ERRADDR, 0x40005608 // 0x4000 5608 ECC18_ERRADDR Bits------------------------------------- .EQU ECC18_ERRADDR_ERRADDR31, 31 .EQU ECC18_ERRADDR_ERRADDR30, 30 .EQU ECC18_ERRADDR_ERRADDR29, 29 .EQU ECC18_ERRADDR_ERRADDR28, 28 .EQU ECC18_ERRADDR_ERRADDR27, 27 .EQU ECC18_ERRADDR_ERRADDR26, 26 .EQU ECC18_ERRADDR_ERRADDR25, 25 .EQU ECC18_ERRADDR_ERRADDR24, 24 .EQU ECC18_ERRADDR_ERRADDR23, 23 .EQU ECC18_ERRADDR_ERRADDR22, 22 .EQU ECC18_ERRADDR_ERRADDR21, 21 .EQU ECC18_ERRADDR_ERRADDR20, 20 .EQU ECC18_ERRADDR_ERRADDR19, 19 .EQU ECC18_ERRADDR_ERRADDR18, 18 .EQU ECC18_ERRADDR_ERRADDR17, 17 .EQU ECC18_ERRADDR_ERRADDR16, 16 .EQU ECC18_ERRADDR_ERRADDR15, 15 .EQU ECC18_ERRADDR_ERRADDR14, 14 .EQU ECC18_ERRADDR_ERRADDR13, 13 .EQU ECC18_ERRADDR_ERRADDR12, 12 .EQU ECC18_ERRADDR_ERRADDR11, 11 .EQU ECC18_ERRADDR_ERRADDR10, 10 .EQU ECC18_ERRADDR_ERRADDR9, 9 .EQU ECC18_ERRADDR_ERRADDR8, 8 .EQU ECC18_ERRADDR_ERRADDR7, 7 .EQU ECC18_ERRADDR_ERRADDR6, 6 .EQU ECC18_ERRADDR_ERRADDR5, 5 .EQU ECC18_ERRADDR_ERRADDR4, 4 .EQU ECC18_ERRADDR_ERRADDR3, 3 .EQU ECC18_ERRADDR_ERRADDR2, 2 .EQU ECC18_ERRADDR_ERRADDR1, 1 .EQU ECC18_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU USART14_CTLR, 0x40005680 // 0x4000 5680 USART14_CTLR Bits------------------------------------- .EQU USART14_CTLR_SLMEN, 31 .EQU USART14_CTLR_RESHD, 30 .EQU USART14_CTLR_IRDAEN, 29 .EQU USART14_CTLR_BKPWS, 26 .EQU USART14_CTLR_RTSE, 25 .EQU USART14_CTLR_CTSE, 24 .EQU USART14_CTLR_TRGSEL1, 23 .EQU USART14_CTLR_TRGSEL0, 22 .EQU USART14_CTLR_DT9EN, 21 .EQU USART14_CTLR_PARM, 20 .EQU USART14_CTLR_TX9SEL, 19 .EQU USART14_CTLR_STPW, 18 .EQU USART14_CTLR_TIDLEEN, 17 .EQU USART14_CTLR_RXEN, 16 .EQU USART14_CTLR_TXEN, 15 .EQU USART14_CTLR_SYNC, 14 .EQU USART14_CTLR_SENDB, 13 .EQU USART14_CTLR_RIDLES, 12 .EQU USART14_CTLR_ABRDEN, 11 .EQU USART14_CTLR_ADREN, 9 .EQU USART14_CTLR_CSRS, 8 .EQU USART14_CTLR_WUEN, 7 .EQU USART14_CTLR_DINV, 6 .EQU USART14_CTLR_RCONV, 5 .EQU USART14_CTLR_TCONV, 4 .EQU USART14_CTLR_SCKPS, 3 .EQU USART14_CTLR_BRCKS1, 2 .EQU USART14_CTLR_BRCKS0, 1 .EQU USART14_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART14_BRGR, 0x40005684 // 0x4000 5684 USART14_BRGR Bits------------------------------------- .EQU USART14_BRGR_BRGF2_3, 23 .EQU USART14_BRGR_BRGF2_2, 22 .EQU USART14_BRGR_BRGF2_1, 21 .EQU USART14_BRGR_BRGF2_0, 20 .EQU USART14_BRGR_BRGF1_3, 19 .EQU USART14_BRGR_BRGF1_2, 18 .EQU USART14_BRGR_BRGF1_1, 17 .EQU USART14_BRGR_BRGF1_0, 16 .EQU USART14_BRGR_BRGM15, 15 .EQU USART14_BRGR_BRGM14, 14 .EQU USART14_BRGR_BRGM13, 13 .EQU USART14_BRGR_BRGM12, 12 .EQU USART14_BRGR_BRGM11, 11 .EQU USART14_BRGR_BRGM10, 10 .EQU USART14_BRGR_BRGM9, 9 .EQU USART14_BRGR_BRGM8, 8 .EQU USART14_BRGR_BRGM7, 7 .EQU USART14_BRGR_BRGM6, 6 .EQU USART14_BRGR_BRGM5, 5 .EQU USART14_BRGR_BRGM4, 4 .EQU USART14_BRGR_BRGM3, 3 .EQU USART14_BRGR_BRGM2, 2 .EQU USART14_BRGR_BRGM1, 1 .EQU USART14_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART14_STR, 0x40005688 // 0x4000 5688 USART14_STR Bits------------------------------------- .EQU USART14_STR_TX0SEL, 31 .EQU USART14_STR_TX1SEL, 30 .EQU USART14_STR_RXDSEL, 29 .EQU USART14_STR_CTSSEL, 28 .EQU USART14_STR_TXFIF, 27 .EQU USART14_STR_IDLEIC, 26 .EQU USART14_STR_UADMIC, 25 .EQU USART14_STR_CTSIC, 24 .EQU USART14_STR_REIC, 23 .EQU USART14_STR_TEIC, 22 .EQU USART14_STR_WUIC, 21 .EQU USART14_STR_ABTOIC, 20 .EQU USART14_STR_BRIC, 19 .EQU USART14_STR_FREIC, 18 .EQU USART14_STR_PAREIC, 17 .EQU USART14_STR_OVFEIC, 16 .EQU USART14_STR_IDLFIF, 15 .EQU USART14_STR_UADMIF, 14 .EQU USART14_STR_TXEIF, 13 .EQU USART14_STR_TFEIF, 12 .EQU USART14_STR_RDRIF, 11 .EQU USART14_STR_TXFR, 10 .EQU USART14_STR_RCFR, 9 .EQU USART14_STR_CTSIF, 8 .EQU USART14_STR_REIF, 7 .EQU USART14_STR_TEIF, 6 .EQU USART14_STR_WUIF, 5 .EQU USART14_STR_ABTOIF, 4 .EQU USART14_STR_BRIF, 3 .EQU USART14_STR_FREIF, 2 .EQU USART14_STR_PAREIF, 1 .EQU USART14_STR_OVFEIF, 0 // register------------------------------------- .EQU USART14_TBUFR, 0x4000568C // 0x4000 568C USART14_TBUFR Bits------------------------------------- .EQU USART14_TBUFR_TBUF7, 7 .EQU USART14_TBUFR_TBUF6, 6 .EQU USART14_TBUFR_TBUF5, 5 .EQU USART14_TBUFR_TBUF4, 4 .EQU USART14_TBUFR_TBUF3, 3 .EQU USART14_TBUFR_TBUF2, 2 .EQU USART14_TBUFR_TBUF1, 1 .EQU USART14_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART14_RBUFR, 0x4000568C // 0x4000 568C USART14_RBUFR Bits------------------------------------- .EQU USART14_RBUFR_RBUF8, 8 .EQU USART14_RBUFR_RBUF7, 7 .EQU USART14_RBUFR_RBUF6, 6 .EQU USART14_RBUFR_RBUF5, 5 .EQU USART14_RBUFR_RBUF4, 4 .EQU USART14_RBUFR_RBUF3, 3 .EQU USART14_RBUFR_RBUF2, 2 .EQU USART14_RBUFR_RBUF1, 1 .EQU USART14_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART14_U7816R, 0x40005690 // 0x4000 5690 USART14_U7816R Bits------------------------------------- .EQU USART14_U7816R_EGT7, 31 .EQU USART14_U7816R_EGT6, 30 .EQU USART14_U7816R_EGT5, 29 .EQU USART14_U7816R_EGT4, 28 .EQU USART14_U7816R_EGT3, 27 .EQU USART14_U7816R_EGT2, 26 .EQU USART14_U7816R_EGT1, 25 .EQU USART14_U7816R_EGT0, 24 .EQU USART14_U7816R_CLKDIV7, 22 .EQU USART14_U7816R_CLKDIV6, 21 .EQU USART14_U7816R_CLKDIV5, 20 .EQU USART14_U7816R_CLKDIV4, 19 .EQU USART14_U7816R_CLKDIV3, 18 .EQU USART14_U7816R_CLKDIV2, 17 .EQU USART14_U7816R_CLKDIV1, 16 .EQU USART14_U7816R_CLKDIV0, 15 .EQU USART14_U7816R_TREPMS, 14 .EQU USART14_U7816R_RXRE1, 13 .EQU USART14_U7816R_RXRE0, 12 .EQU USART14_U7816R_TXRE1, 11 .EQU USART14_U7816R_TXRE0, 10 .EQU USART14_U7816R_RREPEN, 9 .EQU USART14_U7816R_TREPEN, 8 .EQU USART14_U7816R_BGTEN, 5 .EQU USART14_U7816R_PSEL, 4 .EQU USART14_U7816R_ERSW1, 3 .EQU USART14_U7816R_ERSW0, 2 .EQU USART14_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART14_IER, 0x40005694 // 0x4000 5694 USART14_IER Bits------------------------------------- .EQU USART14_IER_UADMIE, 18 .EQU USART14_IER_UTXDE, 17 .EQU USART14_IER_URCDE, 16 .EQU USART14_IER_IDLEIE, 12 .EQU USART14_IER_TXEIE, 11 .EQU USART14_IER_TFEIE, 10 .EQU USART14_IER_RDRIE, 9 .EQU USART14_IER_CTSIE, 8 .EQU USART14_IER_REIE, 7 .EQU USART14_IER_TEIE, 6 .EQU USART14_IER_WUIE, 5 .EQU USART14_IER_ABTOIE, 4 .EQU USART14_IER_BRIE, 3 .EQU USART14_IER_FREIE, 2 .EQU USART14_IER_PAREIE, 1 .EQU USART14_IER_OVFEIE, 0 // register------------------------------------- .EQU USART14_ADM, 0x40005698 // 0x4000 5698 USART14_ADM Bits------------------------------------- .EQU USART14_ADM_ADM7, 7 .EQU USART14_ADM_ADM6, 6 .EQU USART14_ADM_ADM5, 5 .EQU USART14_ADM_ADM4, 4 .EQU USART14_ADM_ADM3, 3 .EQU USART14_ADM_ADM2, 2 .EQU USART14_ADM_ADM1, 1 .EQU USART14_ADM_ADM0, 0 // register------------------------------------- .EQU USART15_CTLR, 0x40005700 // 0x4000 5700 USART15_CTLR Bits------------------------------------- .EQU USART15_CTLR_SLMEN, 31 .EQU USART15_CTLR_RESHD, 30 .EQU USART15_CTLR_IRDAEN, 29 .EQU USART15_CTLR_BKPWS, 26 .EQU USART15_CTLR_RTSE, 25 .EQU USART15_CTLR_CTSE, 24 .EQU USART15_CTLR_TRGSEL1, 23 .EQU USART15_CTLR_TRGSEL0, 22 .EQU USART15_CTLR_DT9EN, 21 .EQU USART15_CTLR_PARM, 20 .EQU USART15_CTLR_TX9SEL, 19 .EQU USART15_CTLR_STPW, 18 .EQU USART15_CTLR_TIDLEEN, 17 .EQU USART15_CTLR_RXEN, 16 .EQU USART15_CTLR_TXEN, 15 .EQU USART15_CTLR_SYNC, 14 .EQU USART15_CTLR_SENDB, 13 .EQU USART15_CTLR_RIDLES, 12 .EQU USART15_CTLR_ABRDEN, 11 .EQU USART15_CTLR_ADREN, 9 .EQU USART15_CTLR_CSRS, 8 .EQU USART15_CTLR_WUEN, 7 .EQU USART15_CTLR_DINV, 6 .EQU USART15_CTLR_RCONV, 5 .EQU USART15_CTLR_TCONV, 4 .EQU USART15_CTLR_SCKPS, 3 .EQU USART15_CTLR_BRCKS1, 2 .EQU USART15_CTLR_BRCKS0, 1 .EQU USART15_CTLR_USARTEN, 0 // register------------------------------------- .EQU USART15_BRGR, 0x40005704 // 0x4000 5704 USART15_BRGR Bits------------------------------------- .EQU USART15_BRGR_BRGF2_3, 23 .EQU USART15_BRGR_BRGF2_2, 22 .EQU USART15_BRGR_BRGF2_1, 21 .EQU USART15_BRGR_BRGF2_0, 20 .EQU USART15_BRGR_BRGF1_3, 19 .EQU USART15_BRGR_BRGF1_2, 18 .EQU USART15_BRGR_BRGF1_1, 17 .EQU USART15_BRGR_BRGF1_0, 16 .EQU USART15_BRGR_BRGM15, 15 .EQU USART15_BRGR_BRGM14, 14 .EQU USART15_BRGR_BRGM13, 13 .EQU USART15_BRGR_BRGM12, 12 .EQU USART15_BRGR_BRGM11, 11 .EQU USART15_BRGR_BRGM10, 10 .EQU USART15_BRGR_BRGM9, 9 .EQU USART15_BRGR_BRGM8, 8 .EQU USART15_BRGR_BRGM7, 7 .EQU USART15_BRGR_BRGM6, 6 .EQU USART15_BRGR_BRGM5, 5 .EQU USART15_BRGR_BRGM4, 4 .EQU USART15_BRGR_BRGM3, 3 .EQU USART15_BRGR_BRGM2, 2 .EQU USART15_BRGR_BRGM1, 1 .EQU USART15_BRGR_BRGM0, 0 // register------------------------------------- .EQU USART15_STR, 0x40005708 // 0x4000 5708 USART15_STR Bits------------------------------------- .EQU USART15_STR_TX0SEL, 31 .EQU USART15_STR_TX1SEL, 30 .EQU USART15_STR_RXDSEL, 29 .EQU USART15_STR_CTSSEL, 28 .EQU USART15_STR_TXFIF, 27 .EQU USART15_STR_IDLEIC, 26 .EQU USART15_STR_UADMIC, 25 .EQU USART15_STR_CTSIC, 24 .EQU USART15_STR_REIC, 23 .EQU USART15_STR_TEIC, 22 .EQU USART15_STR_WUIC, 21 .EQU USART15_STR_ABTOIC, 20 .EQU USART15_STR_BRIC, 19 .EQU USART15_STR_FREIC, 18 .EQU USART15_STR_PAREIC, 17 .EQU USART15_STR_OVFEIC, 16 .EQU USART15_STR_IDLFIF, 15 .EQU USART15_STR_UADMIF, 14 .EQU USART15_STR_TXEIF, 13 .EQU USART15_STR_TFEIF, 12 .EQU USART15_STR_RDRIF, 11 .EQU USART15_STR_TXFR, 10 .EQU USART15_STR_RCFR, 9 .EQU USART15_STR_CTSIF, 8 .EQU USART15_STR_REIF, 7 .EQU USART15_STR_TEIF, 6 .EQU USART15_STR_WUIF, 5 .EQU USART15_STR_ABTOIF, 4 .EQU USART15_STR_BRIF, 3 .EQU USART15_STR_FREIF, 2 .EQU USART15_STR_PAREIF, 1 .EQU USART15_STR_OVFEIF, 0 // register------------------------------------- .EQU USART15_TBUFR, 0x4000570C // 0x4000 570C USART15_TBUFR Bits------------------------------------- .EQU USART15_TBUFR_TBUF7, 7 .EQU USART15_TBUFR_TBUF6, 6 .EQU USART15_TBUFR_TBUF5, 5 .EQU USART15_TBUFR_TBUF4, 4 .EQU USART15_TBUFR_TBUF3, 3 .EQU USART15_TBUFR_TBUF2, 2 .EQU USART15_TBUFR_TBUF1, 1 .EQU USART15_TBUFR_TBUF0, 0 // register------------------------------------- .EQU USART15_RBUFR, 0x4000570C // 0x4000 570C USART15_RBUFR Bits------------------------------------- .EQU USART15_RBUFR_RBUF8, 8 .EQU USART15_RBUFR_RBUF7, 7 .EQU USART15_RBUFR_RBUF6, 6 .EQU USART15_RBUFR_RBUF5, 5 .EQU USART15_RBUFR_RBUF4, 4 .EQU USART15_RBUFR_RBUF3, 3 .EQU USART15_RBUFR_RBUF2, 2 .EQU USART15_RBUFR_RBUF1, 1 .EQU USART15_RBUFR_RBUF0, 0 // register------------------------------------- .EQU USART15_U7816R, 0x40005710 // 0x4000 5710 USART15_U7816R Bits------------------------------------- .EQU USART15_U7816R_EGT7, 31 .EQU USART15_U7816R_EGT6, 30 .EQU USART15_U7816R_EGT5, 29 .EQU USART15_U7816R_EGT4, 28 .EQU USART15_U7816R_EGT3, 27 .EQU USART15_U7816R_EGT2, 26 .EQU USART15_U7816R_EGT1, 25 .EQU USART15_U7816R_EGT0, 24 .EQU USART15_U7816R_CLKDIV7, 22 .EQU USART15_U7816R_CLKDIV6, 21 .EQU USART15_U7816R_CLKDIV5, 20 .EQU USART15_U7816R_CLKDIV4, 19 .EQU USART15_U7816R_CLKDIV3, 18 .EQU USART15_U7816R_CLKDIV2, 17 .EQU USART15_U7816R_CLKDIV1, 16 .EQU USART15_U7816R_CLKDIV0, 15 .EQU USART15_U7816R_TREPMS, 14 .EQU USART15_U7816R_RXRE1, 13 .EQU USART15_U7816R_RXRE0, 12 .EQU USART15_U7816R_TXRE1, 11 .EQU USART15_U7816R_TXRE0, 10 .EQU USART15_U7816R_RREPEN, 9 .EQU USART15_U7816R_TREPEN, 8 .EQU USART15_U7816R_BGTEN, 5 .EQU USART15_U7816R_PSEL, 4 .EQU USART15_U7816R_ERSW1, 3 .EQU USART15_U7816R_ERSW0, 2 .EQU USART15_U7816R_CLKOUT, 1 // register------------------------------------- .EQU USART15_IER, 0x40005714 // 0x4000 5714 USART15_IER Bits------------------------------------- .EQU USART15_IER_UADMIE, 18 .EQU USART15_IER_UTXDE, 17 .EQU USART15_IER_URCDE, 16 .EQU USART15_IER_IDLEIE, 12 .EQU USART15_IER_TXEIE, 11 .EQU USART15_IER_TFEIE, 10 .EQU USART15_IER_RDRIE, 9 .EQU USART15_IER_CTSIE, 8 .EQU USART15_IER_REIE, 7 .EQU USART15_IER_TEIE, 6 .EQU USART15_IER_WUIE, 5 .EQU USART15_IER_ABTOIE, 4 .EQU USART15_IER_BRIE, 3 .EQU USART15_IER_FREIE, 2 .EQU USART15_IER_PAREIE, 1 .EQU USART15_IER_OVFEIE, 0 // register------------------------------------- .EQU USART15_ADM, 0x40005718 // 0x4000 5718 USART15_ADM Bits------------------------------------- .EQU USART15_ADM_ADM7, 7 .EQU USART15_ADM_ADM6, 6 .EQU USART15_ADM_ADM5, 5 .EQU USART15_ADM_ADM4, 4 .EQU USART15_ADM_ADM3, 3 .EQU USART15_ADM_ADM2, 2 .EQU USART15_ADM_ADM1, 1 .EQU USART15_ADM_ADM0, 0 // register------------------------------------- .EQU ECC13_CTL, 0x40005780 // 0x4000 5780 ECC13_CTL Bits------------------------------------- .EQU ECC13_CTL_MEM2BITERRIC, 14 .EQU ECC13_CTL_MEM1BITERRIC, 13 .EQU ECC13_CTL_MEMERRIC, 12 .EQU ECC13_CTL_MEM2BITERRIE, 10 .EQU ECC13_CTL_MEM1BITERRIE, 9 .EQU ECC13_CTL_MEMERRIE, 8 .EQU ECC13_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC13_INT, 0x40005784 // 0x4000 5784 ECC13_INT Bits------------------------------------- .EQU ECC13_INT_MEM2BITERRIF, 2 .EQU ECC13_INT_MEM1BITERRIF, 1 .EQU ECC13_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC13_ERRADDR, 0x40005788 // 0x4000 5788 ECC13_ERRADDR Bits------------------------------------- .EQU ECC13_ERRADDR_ERRADDR31, 31 .EQU ECC13_ERRADDR_ERRADDR30, 30 .EQU ECC13_ERRADDR_ERRADDR29, 29 .EQU ECC13_ERRADDR_ERRADDR28, 28 .EQU ECC13_ERRADDR_ERRADDR27, 27 .EQU ECC13_ERRADDR_ERRADDR26, 26 .EQU ECC13_ERRADDR_ERRADDR25, 25 .EQU ECC13_ERRADDR_ERRADDR24, 24 .EQU ECC13_ERRADDR_ERRADDR23, 23 .EQU ECC13_ERRADDR_ERRADDR22, 22 .EQU ECC13_ERRADDR_ERRADDR21, 21 .EQU ECC13_ERRADDR_ERRADDR20, 20 .EQU ECC13_ERRADDR_ERRADDR19, 19 .EQU ECC13_ERRADDR_ERRADDR18, 18 .EQU ECC13_ERRADDR_ERRADDR17, 17 .EQU ECC13_ERRADDR_ERRADDR16, 16 .EQU ECC13_ERRADDR_ERRADDR15, 15 .EQU ECC13_ERRADDR_ERRADDR14, 14 .EQU ECC13_ERRADDR_ERRADDR13, 13 .EQU ECC13_ERRADDR_ERRADDR12, 12 .EQU ECC13_ERRADDR_ERRADDR11, 11 .EQU ECC13_ERRADDR_ERRADDR10, 10 .EQU ECC13_ERRADDR_ERRADDR9, 9 .EQU ECC13_ERRADDR_ERRADDR8, 8 .EQU ECC13_ERRADDR_ERRADDR7, 7 .EQU ECC13_ERRADDR_ERRADDR6, 6 .EQU ECC13_ERRADDR_ERRADDR5, 5 .EQU ECC13_ERRADDR_ERRADDR4, 4 .EQU ECC13_ERRADDR_ERRADDR3, 3 .EQU ECC13_ERRADDR_ERRADDR2, 2 .EQU ECC13_ERRADDR_ERRADDR1, 1 .EQU ECC13_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU MPU_CTLESR, 0x40005A00 // 0x4000 5A00 MPU_CTLESR Bits------------------------------------- .EQU MPU_CTLESR_SPERIF3, 23 .EQU MPU_CTLESR_SPERIF2, 22 .EQU MPU_CTLESR_SPERIF1, 21 .EQU MPU_CTLESR_SPERIF0, 20 .EQU MPU_CTLESR_MPUEN, 0 // register------------------------------------- .EQU MPU_IER, 0x40005A04 // 0x4000 5A04 MPU_IER Bits------------------------------------- .EQU MPU_IER_SPERIC3, 19 .EQU MPU_IER_SPERIC2, 18 .EQU MPU_IER_SPERIC1, 17 .EQU MPU_IER_SPERIC0, 16 .EQU MPU_IER_SPERIE3, 3 .EQU MPU_IER_SPERIE2, 2 .EQU MPU_IER_SPERIE1, 1 .EQU MPU_IER_SPERIE0, 0 // register------------------------------------- .EQU MPU_IDR, 0x40005A08 // 0x4000 5A08 MPU_IDR Bits------------------------------------- .EQU MPU_IDR_MPUID7, 7 .EQU MPU_IDR_MPUID6, 6 .EQU MPU_IDR_MPUID5, 5 .EQU MPU_IDR_MPUID4, 4 .EQU MPU_IDR_MPUID3, 3 .EQU MPU_IDR_MPUID2, 2 .EQU MPU_IDR_MPUID1, 1 .EQU MPU_IDR_MPUID0, 0 // register------------------------------------- .EQU MPU_ERRARS0, 0x40005A10 // 0x4000 5A10 MPU_ERRARS0 Bits------------------------------------- .EQU MPU_ERRARS0_ERRADDR31, 31 .EQU MPU_ERRARS0_ERRADDR30, 30 .EQU MPU_ERRARS0_ERRADDR29, 29 .EQU MPU_ERRARS0_ERRADDR28, 28 .EQU MPU_ERRARS0_ERRADDR27, 27 .EQU MPU_ERRARS0_ERRADDR26, 26 .EQU MPU_ERRARS0_ERRADDR25, 25 .EQU MPU_ERRARS0_ERRADDR24, 24 .EQU MPU_ERRARS0_ERRADDR23, 23 .EQU MPU_ERRARS0_ERRADDR22, 22 .EQU MPU_ERRARS0_ERRADDR21, 21 .EQU MPU_ERRARS0_ERRADDR20, 20 .EQU MPU_ERRARS0_ERRADDR19, 19 .EQU MPU_ERRARS0_ERRADDR18, 18 .EQU MPU_ERRARS0_ERRADDR17, 17 .EQU MPU_ERRARS0_ERRADDR16, 16 .EQU MPU_ERRARS0_ERRADDR15, 15 .EQU MPU_ERRARS0_ERRADDR14, 14 .EQU MPU_ERRARS0_ERRADDR13, 13 .EQU MPU_ERRARS0_ERRADDR12, 12 .EQU MPU_ERRARS0_ERRADDR11, 11 .EQU MPU_ERRARS0_ERRADDR10, 10 .EQU MPU_ERRARS0_ERRADDR9, 9 .EQU MPU_ERRARS0_ERRADDR8, 8 .EQU MPU_ERRARS0_ERRADDR7, 7 .EQU MPU_ERRARS0_ERRADDR6, 6 .EQU MPU_ERRARS0_ERRADDR5, 5 .EQU MPU_ERRARS0_ERRADDR4, 4 .EQU MPU_ERRARS0_ERRADDR3, 3 .EQU MPU_ERRARS0_ERRADDR2, 2 .EQU MPU_ERRARS0_ERRADDR1, 1 .EQU MPU_ERRARS0_ERRADDR0, 0 // register------------------------------------- .EQU MPU_ERRDRS0, 0x40005A14 // 0x4000 5A14 MPU_ERRDRS0 Bits------------------------------------- .EQU MPU_ERRDRS0_ERRACD15, 31 .EQU MPU_ERRDRS0_ERRACD14, 30 .EQU MPU_ERRDRS0_ERRACD13, 29 .EQU MPU_ERRDRS0_ERRACD12, 28 .EQU MPU_ERRDRS0_ERRACD11, 27 .EQU MPU_ERRDRS0_ERRACD10, 26 .EQU MPU_ERRDRS0_ERRACD9, 25 .EQU MPU_ERRDRS0_ERRACD8, 24 .EQU MPU_ERRDRS0_ERRACD7, 23 .EQU MPU_ERRDRS0_ERRACD6, 22 .EQU MPU_ERRDRS0_ERRACD5, 21 .EQU MPU_ERRDRS0_ERRACD4, 20 .EQU MPU_ERRDRS0_ERRACD3, 19 .EQU MPU_ERRDRS0_ERRACD2, 18 .EQU MPU_ERRDRS0_ERRACD1, 17 .EQU MPU_ERRDRS0_ERRACD0, 16 .EQU MPU_ERRDRS0_ERRPID7, 15 .EQU MPU_ERRDRS0_ERRPID6, 14 .EQU MPU_ERRDRS0_ERRPID5, 13 .EQU MPU_ERRDRS0_ERRPID4, 12 .EQU MPU_ERRDRS0_ERRPID3, 11 .EQU MPU_ERRDRS0_ERRPID2, 10 .EQU MPU_ERRDRS0_ERRPID1, 9 .EQU MPU_ERRDRS0_ERRPID0, 8 .EQU MPU_ERRDRS0_ERRMNU3, 7 .EQU MPU_ERRDRS0_ERRMNU2, 6 .EQU MPU_ERRDRS0_ERRMNU1, 5 .EQU MPU_ERRDRS0_ERRMNU0, 4 .EQU MPU_ERRDRS0_ERRATR2, 3 .EQU MPU_ERRDRS0_ERRATR1, 2 .EQU MPU_ERRDRS0_ERRATR0, 1 .EQU MPU_ERRDRS0_ERRRW, 0 // register------------------------------------- .EQU MPU_ERRARS1, 0x40005A18 // 0x4000 5A18 MPU_ERRARS1 Bits------------------------------------- .EQU MPU_ERRARS1_ERRADDR31, 31 .EQU MPU_ERRARS1_ERRADDR30, 30 .EQU MPU_ERRARS1_ERRADDR29, 29 .EQU MPU_ERRARS1_ERRADDR28, 28 .EQU MPU_ERRARS1_ERRADDR27, 27 .EQU MPU_ERRARS1_ERRADDR26, 26 .EQU MPU_ERRARS1_ERRADDR25, 25 .EQU MPU_ERRARS1_ERRADDR24, 24 .EQU MPU_ERRARS1_ERRADDR23, 23 .EQU MPU_ERRARS1_ERRADDR22, 22 .EQU MPU_ERRARS1_ERRADDR21, 21 .EQU MPU_ERRARS1_ERRADDR20, 20 .EQU MPU_ERRARS1_ERRADDR19, 19 .EQU MPU_ERRARS1_ERRADDR18, 18 .EQU MPU_ERRARS1_ERRADDR17, 17 .EQU MPU_ERRARS1_ERRADDR16, 16 .EQU MPU_ERRARS1_ERRADDR15, 15 .EQU MPU_ERRARS1_ERRADDR14, 14 .EQU MPU_ERRARS1_ERRADDR13, 13 .EQU MPU_ERRARS1_ERRADDR12, 12 .EQU MPU_ERRARS1_ERRADDR11, 11 .EQU MPU_ERRARS1_ERRADDR10, 10 .EQU MPU_ERRARS1_ERRADDR9, 9 .EQU MPU_ERRARS1_ERRADDR8, 8 .EQU MPU_ERRARS1_ERRADDR7, 7 .EQU MPU_ERRARS1_ERRADDR6, 6 .EQU MPU_ERRARS1_ERRADDR5, 5 .EQU MPU_ERRARS1_ERRADDR4, 4 .EQU MPU_ERRARS1_ERRADDR3, 3 .EQU MPU_ERRARS1_ERRADDR2, 2 .EQU MPU_ERRARS1_ERRADDR1, 1 .EQU MPU_ERRARS1_ERRADDR0, 0 // register------------------------------------- .EQU MPU_ERRDRS1, 0x40005A1C // 0x4000 5A1C MPU_ERRDRS1 Bits------------------------------------- .EQU MPU_ERRDRS1_ERRACD15, 31 .EQU MPU_ERRDRS1_ERRACD14, 30 .EQU MPU_ERRDRS1_ERRACD13, 29 .EQU MPU_ERRDRS1_ERRACD12, 28 .EQU MPU_ERRDRS1_ERRACD11, 27 .EQU MPU_ERRDRS1_ERRACD10, 26 .EQU MPU_ERRDRS1_ERRACD9, 25 .EQU MPU_ERRDRS1_ERRACD8, 24 .EQU MPU_ERRDRS1_ERRACD7, 23 .EQU MPU_ERRDRS1_ERRACD6, 22 .EQU MPU_ERRDRS1_ERRACD5, 21 .EQU MPU_ERRDRS1_ERRACD4, 20 .EQU MPU_ERRDRS1_ERRACD3, 19 .EQU MPU_ERRDRS1_ERRACD2, 18 .EQU MPU_ERRDRS1_ERRACD1, 17 .EQU MPU_ERRDRS1_ERRACD0, 16 .EQU MPU_ERRDRS1_ERRPID7, 15 .EQU MPU_ERRDRS1_ERRPID6, 14 .EQU MPU_ERRDRS1_ERRPID5, 13 .EQU MPU_ERRDRS1_ERRPID4, 12 .EQU MPU_ERRDRS1_ERRPID3, 11 .EQU MPU_ERRDRS1_ERRPID2, 10 .EQU MPU_ERRDRS1_ERRPID1, 9 .EQU MPU_ERRDRS1_ERRPID0, 8 .EQU MPU_ERRDRS1_ERRMNU3, 7 .EQU MPU_ERRDRS1_ERRMNU2, 6 .EQU MPU_ERRDRS1_ERRMNU1, 5 .EQU MPU_ERRDRS1_ERRMNU0, 4 .EQU MPU_ERRDRS1_ERRATR2, 3 .EQU MPU_ERRDRS1_ERRATR1, 2 .EQU MPU_ERRDRS1_ERRATR0, 1 .EQU MPU_ERRDRS1_ERRRW, 0 // register------------------------------------- .EQU MPU_ERRARS2, 0x40005A20 // 0x4000 5A20 MPU_ERRARS2 Bits------------------------------------- .EQU MPU_ERRARS2_ERRADDR31, 31 .EQU MPU_ERRARS2_ERRADDR30, 30 .EQU MPU_ERRARS2_ERRADDR29, 29 .EQU MPU_ERRARS2_ERRADDR28, 28 .EQU MPU_ERRARS2_ERRADDR27, 27 .EQU MPU_ERRARS2_ERRADDR26, 26 .EQU MPU_ERRARS2_ERRADDR25, 25 .EQU MPU_ERRARS2_ERRADDR24, 24 .EQU MPU_ERRARS2_ERRADDR23, 23 .EQU MPU_ERRARS2_ERRADDR22, 22 .EQU MPU_ERRARS2_ERRADDR21, 21 .EQU MPU_ERRARS2_ERRADDR20, 20 .EQU MPU_ERRARS2_ERRADDR19, 19 .EQU MPU_ERRARS2_ERRADDR18, 18 .EQU MPU_ERRARS2_ERRADDR17, 17 .EQU MPU_ERRARS2_ERRADDR16, 16 .EQU MPU_ERRARS2_ERRADDR15, 15 .EQU MPU_ERRARS2_ERRADDR14, 14 .EQU MPU_ERRARS2_ERRADDR13, 13 .EQU MPU_ERRARS2_ERRADDR12, 12 .EQU MPU_ERRARS2_ERRADDR11, 11 .EQU MPU_ERRARS2_ERRADDR10, 10 .EQU MPU_ERRARS2_ERRADDR9, 9 .EQU MPU_ERRARS2_ERRADDR8, 8 .EQU MPU_ERRARS2_ERRADDR7, 7 .EQU MPU_ERRARS2_ERRADDR6, 6 .EQU MPU_ERRARS2_ERRADDR5, 5 .EQU MPU_ERRARS2_ERRADDR4, 4 .EQU MPU_ERRARS2_ERRADDR3, 3 .EQU MPU_ERRARS2_ERRADDR2, 2 .EQU MPU_ERRARS2_ERRADDR1, 1 .EQU MPU_ERRARS2_ERRADDR0, 0 // register------------------------------------- .EQU MPU_ERRDRS2, 0x40005A24 // 0x4000 5A24 MPU_ERRDRS2 Bits------------------------------------- .EQU MPU_ERRDRS2_ERRACD15, 31 .EQU MPU_ERRDRS2_ERRACD14, 30 .EQU MPU_ERRDRS2_ERRACD13, 29 .EQU MPU_ERRDRS2_ERRACD12, 28 .EQU MPU_ERRDRS2_ERRACD11, 27 .EQU MPU_ERRDRS2_ERRACD10, 26 .EQU MPU_ERRDRS2_ERRACD9, 25 .EQU MPU_ERRDRS2_ERRACD8, 24 .EQU MPU_ERRDRS2_ERRACD7, 23 .EQU MPU_ERRDRS2_ERRACD6, 22 .EQU MPU_ERRDRS2_ERRACD5, 21 .EQU MPU_ERRDRS2_ERRACD4, 20 .EQU MPU_ERRDRS2_ERRACD3, 19 .EQU MPU_ERRDRS2_ERRACD2, 18 .EQU MPU_ERRDRS2_ERRACD1, 17 .EQU MPU_ERRDRS2_ERRACD0, 16 .EQU MPU_ERRDRS2_ERRPID7, 15 .EQU MPU_ERRDRS2_ERRPID6, 14 .EQU MPU_ERRDRS2_ERRPID5, 13 .EQU MPU_ERRDRS2_ERRPID4, 12 .EQU MPU_ERRDRS2_ERRPID3, 11 .EQU MPU_ERRDRS2_ERRPID2, 10 .EQU MPU_ERRDRS2_ERRPID1, 9 .EQU MPU_ERRDRS2_ERRPID0, 8 .EQU MPU_ERRDRS2_ERRMNU3, 7 .EQU MPU_ERRDRS2_ERRMNU2, 6 .EQU MPU_ERRDRS2_ERRMNU1, 5 .EQU MPU_ERRDRS2_ERRMNU0, 4 .EQU MPU_ERRDRS2_ERRATR2, 3 .EQU MPU_ERRDRS2_ERRATR1, 2 .EQU MPU_ERRDRS2_ERRATR0, 1 .EQU MPU_ERRDRS2_ERRRW, 0 // register------------------------------------- .EQU MPU_ERRARS3, 0x40005A28 // 0x4000 5A28 MPU_ERRARS3 Bits------------------------------------- .EQU MPU_ERRARS3_ERRADDR31, 31 .EQU MPU_ERRARS3_ERRADDR30, 30 .EQU MPU_ERRARS3_ERRADDR29, 29 .EQU MPU_ERRARS3_ERRADDR28, 28 .EQU MPU_ERRARS3_ERRADDR27, 27 .EQU MPU_ERRARS3_ERRADDR26, 26 .EQU MPU_ERRARS3_ERRADDR25, 25 .EQU MPU_ERRARS3_ERRADDR24, 24 .EQU MPU_ERRARS3_ERRADDR23, 23 .EQU MPU_ERRARS3_ERRADDR22, 22 .EQU MPU_ERRARS3_ERRADDR21, 21 .EQU MPU_ERRARS3_ERRADDR20, 20 .EQU MPU_ERRARS3_ERRADDR19, 19 .EQU MPU_ERRARS3_ERRADDR18, 18 .EQU MPU_ERRARS3_ERRADDR17, 17 .EQU MPU_ERRARS3_ERRADDR16, 16 .EQU MPU_ERRARS3_ERRADDR15, 15 .EQU MPU_ERRARS3_ERRADDR14, 14 .EQU MPU_ERRARS3_ERRADDR13, 13 .EQU MPU_ERRARS3_ERRADDR12, 12 .EQU MPU_ERRARS3_ERRADDR11, 11 .EQU MPU_ERRARS3_ERRADDR10, 10 .EQU MPU_ERRARS3_ERRADDR9, 9 .EQU MPU_ERRARS3_ERRADDR8, 8 .EQU MPU_ERRARS3_ERRADDR7, 7 .EQU MPU_ERRARS3_ERRADDR6, 6 .EQU MPU_ERRARS3_ERRADDR5, 5 .EQU MPU_ERRARS3_ERRADDR4, 4 .EQU MPU_ERRARS3_ERRADDR3, 3 .EQU MPU_ERRARS3_ERRADDR2, 2 .EQU MPU_ERRARS3_ERRADDR1, 1 .EQU MPU_ERRARS3_ERRADDR0, 0 // register------------------------------------- .EQU MPU_ERRDRS3, 0x40005A2C // 0x4000 5A2C MPU_ERRDRS3 Bits------------------------------------- .EQU MPU_ERRDRS3_ERRACD15, 31 .EQU MPU_ERRDRS3_ERRACD14, 30 .EQU MPU_ERRDRS3_ERRACD13, 29 .EQU MPU_ERRDRS3_ERRACD12, 28 .EQU MPU_ERRDRS3_ERRACD11, 27 .EQU MPU_ERRDRS3_ERRACD10, 26 .EQU MPU_ERRDRS3_ERRACD9, 25 .EQU MPU_ERRDRS3_ERRACD8, 24 .EQU MPU_ERRDRS3_ERRACD7, 23 .EQU MPU_ERRDRS3_ERRACD6, 22 .EQU MPU_ERRDRS3_ERRACD5, 21 .EQU MPU_ERRDRS3_ERRACD4, 20 .EQU MPU_ERRDRS3_ERRACD3, 19 .EQU MPU_ERRDRS3_ERRACD2, 18 .EQU MPU_ERRDRS3_ERRACD1, 17 .EQU MPU_ERRDRS3_ERRACD0, 16 .EQU MPU_ERRDRS3_ERRPID7, 15 .EQU MPU_ERRDRS3_ERRPID6, 14 .EQU MPU_ERRDRS3_ERRPID5, 13 .EQU MPU_ERRDRS3_ERRPID4, 12 .EQU MPU_ERRDRS3_ERRPID3, 11 .EQU MPU_ERRDRS3_ERRPID2, 10 .EQU MPU_ERRDRS3_ERRPID1, 9 .EQU MPU_ERRDRS3_ERRPID0, 8 .EQU MPU_ERRDRS3_ERRMNU3, 7 .EQU MPU_ERRDRS3_ERRMNU2, 6 .EQU MPU_ERRDRS3_ERRMNU1, 5 .EQU MPU_ERRDRS3_ERRMNU0, 4 .EQU MPU_ERRDRS3_ERRATR2, 3 .EQU MPU_ERRDRS3_ERRATR1, 2 .EQU MPU_ERRDRS3_ERRATR0, 1 .EQU MPU_ERRDRS3_ERRRW, 0 // register------------------------------------- .EQU MPU_RGDE0W0, 0x40005B00 // 0x4000 5B00 MPU_RGDE0W0 Bits------------------------------------- .EQU MPU_RGDE0W0_STRADDR31, 31 .EQU MPU_RGDE0W0_STRADDR30, 30 .EQU MPU_RGDE0W0_STRADDR29, 29 .EQU MPU_RGDE0W0_STRADDR28, 28 .EQU MPU_RGDE0W0_STRADDR27, 27 .EQU MPU_RGDE0W0_STRADDR26, 26 .EQU MPU_RGDE0W0_STRADDR25, 25 .EQU MPU_RGDE0W0_STRADDR24, 24 .EQU MPU_RGDE0W0_STRADDR23, 23 .EQU MPU_RGDE0W0_STRADDR22, 22 .EQU MPU_RGDE0W0_STRADDR21, 21 .EQU MPU_RGDE0W0_STRADDR20, 20 .EQU MPU_RGDE0W0_STRADDR19, 19 .EQU MPU_RGDE0W0_STRADDR18, 18 .EQU MPU_RGDE0W0_STRADDR17, 17 .EQU MPU_RGDE0W0_STRADDR16, 16 .EQU MPU_RGDE0W0_STRADDR15, 15 .EQU MPU_RGDE0W0_STRADDR14, 14 .EQU MPU_RGDE0W0_STRADDR13, 13 .EQU MPU_RGDE0W0_STRADDR12, 12 .EQU MPU_RGDE0W0_STRADDR11, 11 .EQU MPU_RGDE0W0_STRADDR10, 10 .EQU MPU_RGDE0W0_STRADDR9, 9 .EQU MPU_RGDE0W0_STRADDR8, 8 .EQU MPU_RGDE0W0_STRADDR7, 7 .EQU MPU_RGDE0W0_STRADDR6, 6 .EQU MPU_RGDE0W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE0W1, 0x40005B04 // 0x4000 5B04 MPU_RGDE0W1 Bits------------------------------------- .EQU MPU_RGDE0W1_ENDADDR31, 31 .EQU MPU_RGDE0W1_ENDADDR30, 30 .EQU MPU_RGDE0W1_ENDADDR29, 29 .EQU MPU_RGDE0W1_ENDADDR28, 28 .EQU MPU_RGDE0W1_ENDADDR27, 27 .EQU MPU_RGDE0W1_ENDADDR26, 26 .EQU MPU_RGDE0W1_ENDADDR25, 25 .EQU MPU_RGDE0W1_ENDADDR24, 24 .EQU MPU_RGDE0W1_ENDADDR23, 23 .EQU MPU_RGDE0W1_ENDADDR22, 22 .EQU MPU_RGDE0W1_ENDADDR21, 21 .EQU MPU_RGDE0W1_ENDADDR20, 20 .EQU MPU_RGDE0W1_ENDADDR19, 19 .EQU MPU_RGDE0W1_ENDADDR18, 18 .EQU MPU_RGDE0W1_ENDADDR17, 17 .EQU MPU_RGDE0W1_ENDADDR16, 16 .EQU MPU_RGDE0W1_ENDADDR15, 15 .EQU MPU_RGDE0W1_ENDADDR14, 14 .EQU MPU_RGDE0W1_ENDADDR13, 13 .EQU MPU_RGDE0W1_ENDADDR12, 12 .EQU MPU_RGDE0W1_ENDADDR11, 11 .EQU MPU_RGDE0W1_ENDADDR10, 10 .EQU MPU_RGDE0W1_ENDADDR9, 9 .EQU MPU_RGDE0W1_ENDADDR8, 8 .EQU MPU_RGDE0W1_ENDADDR7, 7 .EQU MPU_RGDE0W1_ENDADDR6, 6 .EQU MPU_RGDE0W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE0W2, 0x40005B08 // 0x4000 5B08 MPU_RGDE0W2 Bits------------------------------------- .EQU MPU_RGDE0W2_M2SMAC1, 16 .EQU MPU_RGDE0W2_M2SMAC0, 15 .EQU MPU_RGDE0W2_M2UMAC2, 14 .EQU MPU_RGDE0W2_M2UMAC1, 13 .EQU MPU_RGDE0W2_M2UMAC0, 12 .EQU MPU_RGDE0W2_M1PEN, 11 .EQU MPU_RGDE0W2_M1SMAC1, 10 .EQU MPU_RGDE0W2_M1SMAC0, 9 .EQU MPU_RGDE0W2_M1UMAC2, 8 .EQU MPU_RGDE0W2_M1UMAC1, 7 .EQU MPU_RGDE0W2_M1UMAC0, 6 .EQU MPU_RGDE0W2_M0PEN, 5 .EQU MPU_RGDE0W2_M0SMAC1, 4 .EQU MPU_RGDE0W2_M0SMAC0, 3 .EQU MPU_RGDE0W2_M0UMAC2, 2 .EQU MPU_RGDE0W2_M0UMAC1, 1 .EQU MPU_RGDE0W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE0W3, 0x40005B0C // 0x4000 5B0C MPU_RGDE0W3 Bits------------------------------------- .EQU MPU_RGDE0W3_PID7, 31 .EQU MPU_RGDE0W3_PID6, 30 .EQU MPU_RGDE0W3_PID5, 29 .EQU MPU_RGDE0W3_PID4, 28 .EQU MPU_RGDE0W3_PID3, 27 .EQU MPU_RGDE0W3_PID2, 26 .EQU MPU_RGDE0W3_PID1, 25 .EQU MPU_RGDE0W3_PID0, 24 .EQU MPU_RGDE0W3_PIDMSK7, 23 .EQU MPU_RGDE0W3_PIDMSK6, 22 .EQU MPU_RGDE0W3_PIDMSK5, 21 .EQU MPU_RGDE0W3_PIDMSK4, 20 .EQU MPU_RGDE0W3_PIDMSK3, 19 .EQU MPU_RGDE0W3_PIDMSK2, 18 .EQU MPU_RGDE0W3_PIDMSK1, 17 .EQU MPU_RGDE0W3_PIDMSK0, 16 .EQU MPU_RGDE0W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE1W0, 0x40005B10 // 0x4000 5B10 MPU_RGDE1W0 Bits------------------------------------- .EQU MPU_RGDE1W0_STRADDR31, 31 .EQU MPU_RGDE1W0_STRADDR30, 30 .EQU MPU_RGDE1W0_STRADDR29, 29 .EQU MPU_RGDE1W0_STRADDR28, 28 .EQU MPU_RGDE1W0_STRADDR27, 27 .EQU MPU_RGDE1W0_STRADDR26, 26 .EQU MPU_RGDE1W0_STRADDR25, 25 .EQU MPU_RGDE1W0_STRADDR24, 24 .EQU MPU_RGDE1W0_STRADDR23, 23 .EQU MPU_RGDE1W0_STRADDR22, 22 .EQU MPU_RGDE1W0_STRADDR21, 21 .EQU MPU_RGDE1W0_STRADDR20, 20 .EQU MPU_RGDE1W0_STRADDR19, 19 .EQU MPU_RGDE1W0_STRADDR18, 18 .EQU MPU_RGDE1W0_STRADDR17, 17 .EQU MPU_RGDE1W0_STRADDR16, 16 .EQU MPU_RGDE1W0_STRADDR15, 15 .EQU MPU_RGDE1W0_STRADDR14, 14 .EQU MPU_RGDE1W0_STRADDR13, 13 .EQU MPU_RGDE1W0_STRADDR12, 12 .EQU MPU_RGDE1W0_STRADDR11, 11 .EQU MPU_RGDE1W0_STRADDR10, 10 .EQU MPU_RGDE1W0_STRADDR9, 9 .EQU MPU_RGDE1W0_STRADDR8, 8 .EQU MPU_RGDE1W0_STRADDR7, 7 .EQU MPU_RGDE1W0_STRADDR6, 6 .EQU MPU_RGDE1W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE1W1, 0x40005B14 // 0x4000 5B14 MPU_RGDE1W1 Bits------------------------------------- .EQU MPU_RGDE1W1_ENDADDR31, 31 .EQU MPU_RGDE1W1_ENDADDR30, 30 .EQU MPU_RGDE1W1_ENDADDR29, 29 .EQU MPU_RGDE1W1_ENDADDR28, 28 .EQU MPU_RGDE1W1_ENDADDR27, 27 .EQU MPU_RGDE1W1_ENDADDR26, 26 .EQU MPU_RGDE1W1_ENDADDR25, 25 .EQU MPU_RGDE1W1_ENDADDR24, 24 .EQU MPU_RGDE1W1_ENDADDR23, 23 .EQU MPU_RGDE1W1_ENDADDR22, 22 .EQU MPU_RGDE1W1_ENDADDR21, 21 .EQU MPU_RGDE1W1_ENDADDR20, 20 .EQU MPU_RGDE1W1_ENDADDR19, 19 .EQU MPU_RGDE1W1_ENDADDR18, 18 .EQU MPU_RGDE1W1_ENDADDR17, 17 .EQU MPU_RGDE1W1_ENDADDR16, 16 .EQU MPU_RGDE1W1_ENDADDR15, 15 .EQU MPU_RGDE1W1_ENDADDR14, 14 .EQU MPU_RGDE1W1_ENDADDR13, 13 .EQU MPU_RGDE1W1_ENDADDR12, 12 .EQU MPU_RGDE1W1_ENDADDR11, 11 .EQU MPU_RGDE1W1_ENDADDR10, 10 .EQU MPU_RGDE1W1_ENDADDR9, 9 .EQU MPU_RGDE1W1_ENDADDR8, 8 .EQU MPU_RGDE1W1_ENDADDR7, 7 .EQU MPU_RGDE1W1_ENDADDR6, 6 .EQU MPU_RGDE1W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE1W2, 0x40005B18 // 0x4000 5B18 MPU_RGDE1W2 Bits------------------------------------- .EQU MPU_RGDE1W2_M2SMAC1, 16 .EQU MPU_RGDE1W2_M2SMAC0, 15 .EQU MPU_RGDE1W2_M2UMAC2, 14 .EQU MPU_RGDE1W2_M2UMAC1, 13 .EQU MPU_RGDE1W2_M2UMAC0, 12 .EQU MPU_RGDE1W2_M1PEN, 11 .EQU MPU_RGDE1W2_M1SMAC1, 10 .EQU MPU_RGDE1W2_M1SMAC0, 9 .EQU MPU_RGDE1W2_M1UMAC2, 8 .EQU MPU_RGDE1W2_M1UMAC1, 7 .EQU MPU_RGDE1W2_M1UMAC0, 6 .EQU MPU_RGDE1W2_M0PEN, 5 .EQU MPU_RGDE1W2_M0SMAC1, 4 .EQU MPU_RGDE1W2_M0SMAC0, 3 .EQU MPU_RGDE1W2_M0UMAC2, 2 .EQU MPU_RGDE1W2_M0UMAC1, 1 .EQU MPU_RGDE1W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE1W3, 0x40005B1C // 0x4000 5B1C MPU_RGDE1W3 Bits------------------------------------- .EQU MPU_RGDE1W3_PID7, 31 .EQU MPU_RGDE1W3_PID6, 30 .EQU MPU_RGDE1W3_PID5, 29 .EQU MPU_RGDE1W3_PID4, 28 .EQU MPU_RGDE1W3_PID3, 27 .EQU MPU_RGDE1W3_PID2, 26 .EQU MPU_RGDE1W3_PID1, 25 .EQU MPU_RGDE1W3_PID0, 24 .EQU MPU_RGDE1W3_PIDMSK7, 23 .EQU MPU_RGDE1W3_PIDMSK6, 22 .EQU MPU_RGDE1W3_PIDMSK5, 21 .EQU MPU_RGDE1W3_PIDMSK4, 20 .EQU MPU_RGDE1W3_PIDMSK3, 19 .EQU MPU_RGDE1W3_PIDMSK2, 18 .EQU MPU_RGDE1W3_PIDMSK1, 17 .EQU MPU_RGDE1W3_PIDMSK0, 16 .EQU MPU_RGDE1W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE2W0, 0x40005B20 // 0x4000 5B20 MPU_RGDE2W0 Bits------------------------------------- .EQU MPU_RGDE2W0_STRADDR31, 31 .EQU MPU_RGDE2W0_STRADDR30, 30 .EQU MPU_RGDE2W0_STRADDR29, 29 .EQU MPU_RGDE2W0_STRADDR28, 28 .EQU MPU_RGDE2W0_STRADDR27, 27 .EQU MPU_RGDE2W0_STRADDR26, 26 .EQU MPU_RGDE2W0_STRADDR25, 25 .EQU MPU_RGDE2W0_STRADDR24, 24 .EQU MPU_RGDE2W0_STRADDR23, 23 .EQU MPU_RGDE2W0_STRADDR22, 22 .EQU MPU_RGDE2W0_STRADDR21, 21 .EQU MPU_RGDE2W0_STRADDR20, 20 .EQU MPU_RGDE2W0_STRADDR19, 19 .EQU MPU_RGDE2W0_STRADDR18, 18 .EQU MPU_RGDE2W0_STRADDR17, 17 .EQU MPU_RGDE2W0_STRADDR16, 16 .EQU MPU_RGDE2W0_STRADDR15, 15 .EQU MPU_RGDE2W0_STRADDR14, 14 .EQU MPU_RGDE2W0_STRADDR13, 13 .EQU MPU_RGDE2W0_STRADDR12, 12 .EQU MPU_RGDE2W0_STRADDR11, 11 .EQU MPU_RGDE2W0_STRADDR10, 10 .EQU MPU_RGDE2W0_STRADDR9, 9 .EQU MPU_RGDE2W0_STRADDR8, 8 .EQU MPU_RGDE2W0_STRADDR7, 7 .EQU MPU_RGDE2W0_STRADDR6, 6 .EQU MPU_RGDE2W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE2W1, 0x40005B24 // 0x4000 5B24 MPU_RGDE2W1 Bits------------------------------------- .EQU MPU_RGDE2W1_ENDADDR31, 31 .EQU MPU_RGDE2W1_ENDADDR30, 30 .EQU MPU_RGDE2W1_ENDADDR29, 29 .EQU MPU_RGDE2W1_ENDADDR28, 28 .EQU MPU_RGDE2W1_ENDADDR27, 27 .EQU MPU_RGDE2W1_ENDADDR26, 26 .EQU MPU_RGDE2W1_ENDADDR25, 25 .EQU MPU_RGDE2W1_ENDADDR24, 24 .EQU MPU_RGDE2W1_ENDADDR23, 23 .EQU MPU_RGDE2W1_ENDADDR22, 22 .EQU MPU_RGDE2W1_ENDADDR21, 21 .EQU MPU_RGDE2W1_ENDADDR20, 20 .EQU MPU_RGDE2W1_ENDADDR19, 19 .EQU MPU_RGDE2W1_ENDADDR18, 18 .EQU MPU_RGDE2W1_ENDADDR17, 17 .EQU MPU_RGDE2W1_ENDADDR16, 16 .EQU MPU_RGDE2W1_ENDADDR15, 15 .EQU MPU_RGDE2W1_ENDADDR14, 14 .EQU MPU_RGDE2W1_ENDADDR13, 13 .EQU MPU_RGDE2W1_ENDADDR12, 12 .EQU MPU_RGDE2W1_ENDADDR11, 11 .EQU MPU_RGDE2W1_ENDADDR10, 10 .EQU MPU_RGDE2W1_ENDADDR9, 9 .EQU MPU_RGDE2W1_ENDADDR8, 8 .EQU MPU_RGDE2W1_ENDADDR7, 7 .EQU MPU_RGDE2W1_ENDADDR6, 6 .EQU MPU_RGDE2W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE2W2, 0x40005B28 // 0x4000 5B28 MPU_RGDE2W2 Bits------------------------------------- .EQU MPU_RGDE2W2_M2SMAC1, 16 .EQU MPU_RGDE2W2_M2SMAC0, 15 .EQU MPU_RGDE2W2_M2UMAC2, 14 .EQU MPU_RGDE2W2_M2UMAC1, 13 .EQU MPU_RGDE2W2_M2UMAC0, 12 .EQU MPU_RGDE2W2_M1PEN, 11 .EQU MPU_RGDE2W2_M1SMAC1, 10 .EQU MPU_RGDE2W2_M1SMAC0, 9 .EQU MPU_RGDE2W2_M1UMAC2, 8 .EQU MPU_RGDE2W2_M1UMAC1, 7 .EQU MPU_RGDE2W2_M1UMAC0, 6 .EQU MPU_RGDE2W2_M0PEN, 5 .EQU MPU_RGDE2W2_M0SMAC1, 4 .EQU MPU_RGDE2W2_M0SMAC0, 3 .EQU MPU_RGDE2W2_M0UMAC2, 2 .EQU MPU_RGDE2W2_M0UMAC1, 1 .EQU MPU_RGDE2W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE2W3, 0x40005B2C // 0x4000 5B2C MPU_RGDE2W3 Bits------------------------------------- .EQU MPU_RGDE2W3_PID7, 31 .EQU MPU_RGDE2W3_PID6, 30 .EQU MPU_RGDE2W3_PID5, 29 .EQU MPU_RGDE2W3_PID4, 28 .EQU MPU_RGDE2W3_PID3, 27 .EQU MPU_RGDE2W3_PID2, 26 .EQU MPU_RGDE2W3_PID1, 25 .EQU MPU_RGDE2W3_PID0, 24 .EQU MPU_RGDE2W3_PIDMSK7, 23 .EQU MPU_RGDE2W3_PIDMSK6, 22 .EQU MPU_RGDE2W3_PIDMSK5, 21 .EQU MPU_RGDE2W3_PIDMSK4, 20 .EQU MPU_RGDE2W3_PIDMSK3, 19 .EQU MPU_RGDE2W3_PIDMSK2, 18 .EQU MPU_RGDE2W3_PIDMSK1, 17 .EQU MPU_RGDE2W3_PIDMSK0, 16 .EQU MPU_RGDE2W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE3W0, 0x40005B30 // 0x4000 5B30 MPU_RGDE3W0 Bits------------------------------------- .EQU MPU_RGDE3W0_STRADDR31, 31 .EQU MPU_RGDE3W0_STRADDR30, 30 .EQU MPU_RGDE3W0_STRADDR29, 29 .EQU MPU_RGDE3W0_STRADDR28, 28 .EQU MPU_RGDE3W0_STRADDR27, 27 .EQU MPU_RGDE3W0_STRADDR26, 26 .EQU MPU_RGDE3W0_STRADDR25, 25 .EQU MPU_RGDE3W0_STRADDR24, 24 .EQU MPU_RGDE3W0_STRADDR23, 23 .EQU MPU_RGDE3W0_STRADDR22, 22 .EQU MPU_RGDE3W0_STRADDR21, 21 .EQU MPU_RGDE3W0_STRADDR20, 20 .EQU MPU_RGDE3W0_STRADDR19, 19 .EQU MPU_RGDE3W0_STRADDR18, 18 .EQU MPU_RGDE3W0_STRADDR17, 17 .EQU MPU_RGDE3W0_STRADDR16, 16 .EQU MPU_RGDE3W0_STRADDR15, 15 .EQU MPU_RGDE3W0_STRADDR14, 14 .EQU MPU_RGDE3W0_STRADDR13, 13 .EQU MPU_RGDE3W0_STRADDR12, 12 .EQU MPU_RGDE3W0_STRADDR11, 11 .EQU MPU_RGDE3W0_STRADDR10, 10 .EQU MPU_RGDE3W0_STRADDR9, 9 .EQU MPU_RGDE3W0_STRADDR8, 8 .EQU MPU_RGDE3W0_STRADDR7, 7 .EQU MPU_RGDE3W0_STRADDR6, 6 .EQU MPU_RGDE3W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE3W1, 0x40005B34 // 0x4000 5B34 MPU_RGDE3W1 Bits------------------------------------- .EQU MPU_RGDE3W1_ENDADDR31, 31 .EQU MPU_RGDE3W1_ENDADDR30, 30 .EQU MPU_RGDE3W1_ENDADDR29, 29 .EQU MPU_RGDE3W1_ENDADDR28, 28 .EQU MPU_RGDE3W1_ENDADDR27, 27 .EQU MPU_RGDE3W1_ENDADDR26, 26 .EQU MPU_RGDE3W1_ENDADDR25, 25 .EQU MPU_RGDE3W1_ENDADDR24, 24 .EQU MPU_RGDE3W1_ENDADDR23, 23 .EQU MPU_RGDE3W1_ENDADDR22, 22 .EQU MPU_RGDE3W1_ENDADDR21, 21 .EQU MPU_RGDE3W1_ENDADDR20, 20 .EQU MPU_RGDE3W1_ENDADDR19, 19 .EQU MPU_RGDE3W1_ENDADDR18, 18 .EQU MPU_RGDE3W1_ENDADDR17, 17 .EQU MPU_RGDE3W1_ENDADDR16, 16 .EQU MPU_RGDE3W1_ENDADDR15, 15 .EQU MPU_RGDE3W1_ENDADDR14, 14 .EQU MPU_RGDE3W1_ENDADDR13, 13 .EQU MPU_RGDE3W1_ENDADDR12, 12 .EQU MPU_RGDE3W1_ENDADDR11, 11 .EQU MPU_RGDE3W1_ENDADDR10, 10 .EQU MPU_RGDE3W1_ENDADDR9, 9 .EQU MPU_RGDE3W1_ENDADDR8, 8 .EQU MPU_RGDE3W1_ENDADDR7, 7 .EQU MPU_RGDE3W1_ENDADDR6, 6 .EQU MPU_RGDE3W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE3W2, 0x40005B38 // 0x4000 5B38 MPU_RGDE3W2 Bits------------------------------------- .EQU MPU_RGDE3W2_M2SMAC1, 16 .EQU MPU_RGDE3W2_M2SMAC0, 15 .EQU MPU_RGDE3W2_M2UMAC2, 14 .EQU MPU_RGDE3W2_M2UMAC1, 13 .EQU MPU_RGDE3W2_M2UMAC0, 12 .EQU MPU_RGDE3W2_M1PEN, 11 .EQU MPU_RGDE3W2_M1SMAC1, 10 .EQU MPU_RGDE3W2_M1SMAC0, 9 .EQU MPU_RGDE3W2_M1UMAC2, 8 .EQU MPU_RGDE3W2_M1UMAC1, 7 .EQU MPU_RGDE3W2_M1UMAC0, 6 .EQU MPU_RGDE3W2_M0PEN, 5 .EQU MPU_RGDE3W2_M0SMAC1, 4 .EQU MPU_RGDE3W2_M0SMAC0, 3 .EQU MPU_RGDE3W2_M0UMAC2, 2 .EQU MPU_RGDE3W2_M0UMAC1, 1 .EQU MPU_RGDE3W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE3W3, 0x40005B3C // 0x4000 5B3C MPU_RGDE3W3 Bits------------------------------------- .EQU MPU_RGDE3W3_PID7, 31 .EQU MPU_RGDE3W3_PID6, 30 .EQU MPU_RGDE3W3_PID5, 29 .EQU MPU_RGDE3W3_PID4, 28 .EQU MPU_RGDE3W3_PID3, 27 .EQU MPU_RGDE3W3_PID2, 26 .EQU MPU_RGDE3W3_PID1, 25 .EQU MPU_RGDE3W3_PID0, 24 .EQU MPU_RGDE3W3_PIDMSK7, 23 .EQU MPU_RGDE3W3_PIDMSK6, 22 .EQU MPU_RGDE3W3_PIDMSK5, 21 .EQU MPU_RGDE3W3_PIDMSK4, 20 .EQU MPU_RGDE3W3_PIDMSK3, 19 .EQU MPU_RGDE3W3_PIDMSK2, 18 .EQU MPU_RGDE3W3_PIDMSK1, 17 .EQU MPU_RGDE3W3_PIDMSK0, 16 .EQU MPU_RGDE3W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE4W0, 0x40005B40 // 0x4000 5B40 MPU_RGDE4W0 Bits------------------------------------- .EQU MPU_RGDE4W0_STRADDR31, 31 .EQU MPU_RGDE4W0_STRADDR30, 30 .EQU MPU_RGDE4W0_STRADDR29, 29 .EQU MPU_RGDE4W0_STRADDR28, 28 .EQU MPU_RGDE4W0_STRADDR27, 27 .EQU MPU_RGDE4W0_STRADDR26, 26 .EQU MPU_RGDE4W0_STRADDR25, 25 .EQU MPU_RGDE4W0_STRADDR24, 24 .EQU MPU_RGDE4W0_STRADDR23, 23 .EQU MPU_RGDE4W0_STRADDR22, 22 .EQU MPU_RGDE4W0_STRADDR21, 21 .EQU MPU_RGDE4W0_STRADDR20, 20 .EQU MPU_RGDE4W0_STRADDR19, 19 .EQU MPU_RGDE4W0_STRADDR18, 18 .EQU MPU_RGDE4W0_STRADDR17, 17 .EQU MPU_RGDE4W0_STRADDR16, 16 .EQU MPU_RGDE4W0_STRADDR15, 15 .EQU MPU_RGDE4W0_STRADDR14, 14 .EQU MPU_RGDE4W0_STRADDR13, 13 .EQU MPU_RGDE4W0_STRADDR12, 12 .EQU MPU_RGDE4W0_STRADDR11, 11 .EQU MPU_RGDE4W0_STRADDR10, 10 .EQU MPU_RGDE4W0_STRADDR9, 9 .EQU MPU_RGDE4W0_STRADDR8, 8 .EQU MPU_RGDE4W0_STRADDR7, 7 .EQU MPU_RGDE4W0_STRADDR6, 6 .EQU MPU_RGDE4W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE4W1, 0x40005B44 // 0x4000 5B44 MPU_RGDE4W1 Bits------------------------------------- .EQU MPU_RGDE4W1_ENDADDR31, 31 .EQU MPU_RGDE4W1_ENDADDR30, 30 .EQU MPU_RGDE4W1_ENDADDR29, 29 .EQU MPU_RGDE4W1_ENDADDR28, 28 .EQU MPU_RGDE4W1_ENDADDR27, 27 .EQU MPU_RGDE4W1_ENDADDR26, 26 .EQU MPU_RGDE4W1_ENDADDR25, 25 .EQU MPU_RGDE4W1_ENDADDR24, 24 .EQU MPU_RGDE4W1_ENDADDR23, 23 .EQU MPU_RGDE4W1_ENDADDR22, 22 .EQU MPU_RGDE4W1_ENDADDR21, 21 .EQU MPU_RGDE4W1_ENDADDR20, 20 .EQU MPU_RGDE4W1_ENDADDR19, 19 .EQU MPU_RGDE4W1_ENDADDR18, 18 .EQU MPU_RGDE4W1_ENDADDR17, 17 .EQU MPU_RGDE4W1_ENDADDR16, 16 .EQU MPU_RGDE4W1_ENDADDR15, 15 .EQU MPU_RGDE4W1_ENDADDR14, 14 .EQU MPU_RGDE4W1_ENDADDR13, 13 .EQU MPU_RGDE4W1_ENDADDR12, 12 .EQU MPU_RGDE4W1_ENDADDR11, 11 .EQU MPU_RGDE4W1_ENDADDR10, 10 .EQU MPU_RGDE4W1_ENDADDR9, 9 .EQU MPU_RGDE4W1_ENDADDR8, 8 .EQU MPU_RGDE4W1_ENDADDR7, 7 .EQU MPU_RGDE4W1_ENDADDR6, 6 .EQU MPU_RGDE4W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE4W2, 0x40005B48 // 0x4000 5B48 MPU_RGDE4W2 Bits------------------------------------- .EQU MPU_RGDE4W2_M2SMAC1, 16 .EQU MPU_RGDE4W2_M2SMAC0, 15 .EQU MPU_RGDE4W2_M2UMAC2, 14 .EQU MPU_RGDE4W2_M2UMAC1, 13 .EQU MPU_RGDE4W2_M2UMAC0, 12 .EQU MPU_RGDE4W2_M1PEN, 11 .EQU MPU_RGDE4W2_M1SMAC1, 10 .EQU MPU_RGDE4W2_M1SMAC0, 9 .EQU MPU_RGDE4W2_M1UMAC2, 8 .EQU MPU_RGDE4W2_M1UMAC1, 7 .EQU MPU_RGDE4W2_M1UMAC0, 6 .EQU MPU_RGDE4W2_M0PEN, 5 .EQU MPU_RGDE4W2_M0SMAC1, 4 .EQU MPU_RGDE4W2_M0SMAC0, 3 .EQU MPU_RGDE4W2_M0UMAC2, 2 .EQU MPU_RGDE4W2_M0UMAC1, 1 .EQU MPU_RGDE4W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE4W3, 0x40005B4C // 0x4000 5B4C MPU_RGDE4W3 Bits------------------------------------- .EQU MPU_RGDE4W3_PID7, 31 .EQU MPU_RGDE4W3_PID6, 30 .EQU MPU_RGDE4W3_PID5, 29 .EQU MPU_RGDE4W3_PID4, 28 .EQU MPU_RGDE4W3_PID3, 27 .EQU MPU_RGDE4W3_PID2, 26 .EQU MPU_RGDE4W3_PID1, 25 .EQU MPU_RGDE4W3_PID0, 24 .EQU MPU_RGDE4W3_PIDMSK7, 23 .EQU MPU_RGDE4W3_PIDMSK6, 22 .EQU MPU_RGDE4W3_PIDMSK5, 21 .EQU MPU_RGDE4W3_PIDMSK4, 20 .EQU MPU_RGDE4W3_PIDMSK3, 19 .EQU MPU_RGDE4W3_PIDMSK2, 18 .EQU MPU_RGDE4W3_PIDMSK1, 17 .EQU MPU_RGDE4W3_PIDMSK0, 16 .EQU MPU_RGDE4W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE5W0, 0x40005B50 // 0x4000 5B50 MPU_RGDE5W0 Bits------------------------------------- .EQU MPU_RGDE5W0_STRADDR31, 31 .EQU MPU_RGDE5W0_STRADDR30, 30 .EQU MPU_RGDE5W0_STRADDR29, 29 .EQU MPU_RGDE5W0_STRADDR28, 28 .EQU MPU_RGDE5W0_STRADDR27, 27 .EQU MPU_RGDE5W0_STRADDR26, 26 .EQU MPU_RGDE5W0_STRADDR25, 25 .EQU MPU_RGDE5W0_STRADDR24, 24 .EQU MPU_RGDE5W0_STRADDR23, 23 .EQU MPU_RGDE5W0_STRADDR22, 22 .EQU MPU_RGDE5W0_STRADDR21, 21 .EQU MPU_RGDE5W0_STRADDR20, 20 .EQU MPU_RGDE5W0_STRADDR19, 19 .EQU MPU_RGDE5W0_STRADDR18, 18 .EQU MPU_RGDE5W0_STRADDR17, 17 .EQU MPU_RGDE5W0_STRADDR16, 16 .EQU MPU_RGDE5W0_STRADDR15, 15 .EQU MPU_RGDE5W0_STRADDR14, 14 .EQU MPU_RGDE5W0_STRADDR13, 13 .EQU MPU_RGDE5W0_STRADDR12, 12 .EQU MPU_RGDE5W0_STRADDR11, 11 .EQU MPU_RGDE5W0_STRADDR10, 10 .EQU MPU_RGDE5W0_STRADDR9, 9 .EQU MPU_RGDE5W0_STRADDR8, 8 .EQU MPU_RGDE5W0_STRADDR7, 7 .EQU MPU_RGDE5W0_STRADDR6, 6 .EQU MPU_RGDE5W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE5W1, 0x40005B54 // 0x4000 5B54 MPU_RGDE5W1 Bits------------------------------------- .EQU MPU_RGDE5W1_ENDADDR31, 31 .EQU MPU_RGDE5W1_ENDADDR30, 30 .EQU MPU_RGDE5W1_ENDADDR29, 29 .EQU MPU_RGDE5W1_ENDADDR28, 28 .EQU MPU_RGDE5W1_ENDADDR27, 27 .EQU MPU_RGDE5W1_ENDADDR26, 26 .EQU MPU_RGDE5W1_ENDADDR25, 25 .EQU MPU_RGDE5W1_ENDADDR24, 24 .EQU MPU_RGDE5W1_ENDADDR23, 23 .EQU MPU_RGDE5W1_ENDADDR22, 22 .EQU MPU_RGDE5W1_ENDADDR21, 21 .EQU MPU_RGDE5W1_ENDADDR20, 20 .EQU MPU_RGDE5W1_ENDADDR19, 19 .EQU MPU_RGDE5W1_ENDADDR18, 18 .EQU MPU_RGDE5W1_ENDADDR17, 17 .EQU MPU_RGDE5W1_ENDADDR16, 16 .EQU MPU_RGDE5W1_ENDADDR15, 15 .EQU MPU_RGDE5W1_ENDADDR14, 14 .EQU MPU_RGDE5W1_ENDADDR13, 13 .EQU MPU_RGDE5W1_ENDADDR12, 12 .EQU MPU_RGDE5W1_ENDADDR11, 11 .EQU MPU_RGDE5W1_ENDADDR10, 10 .EQU MPU_RGDE5W1_ENDADDR9, 9 .EQU MPU_RGDE5W1_ENDADDR8, 8 .EQU MPU_RGDE5W1_ENDADDR7, 7 .EQU MPU_RGDE5W1_ENDADDR6, 6 .EQU MPU_RGDE5W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE5W2, 0x40005B58 // 0x4000 5B58 MPU_RGDE5W2 Bits------------------------------------- .EQU MPU_RGDE5W2_M2SMAC1, 16 .EQU MPU_RGDE5W2_M2SMAC0, 15 .EQU MPU_RGDE5W2_M2UMAC2, 14 .EQU MPU_RGDE5W2_M2UMAC1, 13 .EQU MPU_RGDE5W2_M2UMAC0, 12 .EQU MPU_RGDE5W2_M1PEN, 11 .EQU MPU_RGDE5W2_M1SMAC1, 10 .EQU MPU_RGDE5W2_M1SMAC0, 9 .EQU MPU_RGDE5W2_M1UMAC2, 8 .EQU MPU_RGDE5W2_M1UMAC1, 7 .EQU MPU_RGDE5W2_M1UMAC0, 6 .EQU MPU_RGDE5W2_M0PEN, 5 .EQU MPU_RGDE5W2_M0SMAC1, 4 .EQU MPU_RGDE5W2_M0SMAC0, 3 .EQU MPU_RGDE5W2_M0UMAC2, 2 .EQU MPU_RGDE5W2_M0UMAC1, 1 .EQU MPU_RGDE5W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE5W3, 0x40005B5C // 0x4000 5B5C MPU_RGDE5W3 Bits------------------------------------- .EQU MPU_RGDE5W3_PID7, 31 .EQU MPU_RGDE5W3_PID6, 30 .EQU MPU_RGDE5W3_PID5, 29 .EQU MPU_RGDE5W3_PID4, 28 .EQU MPU_RGDE5W3_PID3, 27 .EQU MPU_RGDE5W3_PID2, 26 .EQU MPU_RGDE5W3_PID1, 25 .EQU MPU_RGDE5W3_PID0, 24 .EQU MPU_RGDE5W3_PIDMSK7, 23 .EQU MPU_RGDE5W3_PIDMSK6, 22 .EQU MPU_RGDE5W3_PIDMSK5, 21 .EQU MPU_RGDE5W3_PIDMSK4, 20 .EQU MPU_RGDE5W3_PIDMSK3, 19 .EQU MPU_RGDE5W3_PIDMSK2, 18 .EQU MPU_RGDE5W3_PIDMSK1, 17 .EQU MPU_RGDE5W3_PIDMSK0, 16 .EQU MPU_RGDE5W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE6W0, 0x40005B60 // 0x4000 5B60 MPU_RGDE6W0 Bits------------------------------------- .EQU MPU_RGDE6W0_STRADDR31, 31 .EQU MPU_RGDE6W0_STRADDR30, 30 .EQU MPU_RGDE6W0_STRADDR29, 29 .EQU MPU_RGDE6W0_STRADDR28, 28 .EQU MPU_RGDE6W0_STRADDR27, 27 .EQU MPU_RGDE6W0_STRADDR26, 26 .EQU MPU_RGDE6W0_STRADDR25, 25 .EQU MPU_RGDE6W0_STRADDR24, 24 .EQU MPU_RGDE6W0_STRADDR23, 23 .EQU MPU_RGDE6W0_STRADDR22, 22 .EQU MPU_RGDE6W0_STRADDR21, 21 .EQU MPU_RGDE6W0_STRADDR20, 20 .EQU MPU_RGDE6W0_STRADDR19, 19 .EQU MPU_RGDE6W0_STRADDR18, 18 .EQU MPU_RGDE6W0_STRADDR17, 17 .EQU MPU_RGDE6W0_STRADDR16, 16 .EQU MPU_RGDE6W0_STRADDR15, 15 .EQU MPU_RGDE6W0_STRADDR14, 14 .EQU MPU_RGDE6W0_STRADDR13, 13 .EQU MPU_RGDE6W0_STRADDR12, 12 .EQU MPU_RGDE6W0_STRADDR11, 11 .EQU MPU_RGDE6W0_STRADDR10, 10 .EQU MPU_RGDE6W0_STRADDR9, 9 .EQU MPU_RGDE6W0_STRADDR8, 8 .EQU MPU_RGDE6W0_STRADDR7, 7 .EQU MPU_RGDE6W0_STRADDR6, 6 .EQU MPU_RGDE6W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE6W1, 0x40005B64 // 0x4000 5B64 MPU_RGDE6W1 Bits------------------------------------- .EQU MPU_RGDE6W1_ENDADDR31, 31 .EQU MPU_RGDE6W1_ENDADDR30, 30 .EQU MPU_RGDE6W1_ENDADDR29, 29 .EQU MPU_RGDE6W1_ENDADDR28, 28 .EQU MPU_RGDE6W1_ENDADDR27, 27 .EQU MPU_RGDE6W1_ENDADDR26, 26 .EQU MPU_RGDE6W1_ENDADDR25, 25 .EQU MPU_RGDE6W1_ENDADDR24, 24 .EQU MPU_RGDE6W1_ENDADDR23, 23 .EQU MPU_RGDE6W1_ENDADDR22, 22 .EQU MPU_RGDE6W1_ENDADDR21, 21 .EQU MPU_RGDE6W1_ENDADDR20, 20 .EQU MPU_RGDE6W1_ENDADDR19, 19 .EQU MPU_RGDE6W1_ENDADDR18, 18 .EQU MPU_RGDE6W1_ENDADDR17, 17 .EQU MPU_RGDE6W1_ENDADDR16, 16 .EQU MPU_RGDE6W1_ENDADDR15, 15 .EQU MPU_RGDE6W1_ENDADDR14, 14 .EQU MPU_RGDE6W1_ENDADDR13, 13 .EQU MPU_RGDE6W1_ENDADDR12, 12 .EQU MPU_RGDE6W1_ENDADDR11, 11 .EQU MPU_RGDE6W1_ENDADDR10, 10 .EQU MPU_RGDE6W1_ENDADDR9, 9 .EQU MPU_RGDE6W1_ENDADDR8, 8 .EQU MPU_RGDE6W1_ENDADDR7, 7 .EQU MPU_RGDE6W1_ENDADDR6, 6 .EQU MPU_RGDE6W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE6W2, 0x40005B68 // 0x4000 5B68 MPU_RGDE6W2 Bits------------------------------------- .EQU MPU_RGDE6W2_M2SMAC1, 16 .EQU MPU_RGDE6W2_M2SMAC0, 15 .EQU MPU_RGDE6W2_M2UMAC2, 14 .EQU MPU_RGDE6W2_M2UMAC1, 13 .EQU MPU_RGDE6W2_M2UMAC0, 12 .EQU MPU_RGDE6W2_M1PEN, 11 .EQU MPU_RGDE6W2_M1SMAC1, 10 .EQU MPU_RGDE6W2_M1SMAC0, 9 .EQU MPU_RGDE6W2_M1UMAC2, 8 .EQU MPU_RGDE6W2_M1UMAC1, 7 .EQU MPU_RGDE6W2_M1UMAC0, 6 .EQU MPU_RGDE6W2_M0PEN, 5 .EQU MPU_RGDE6W2_M0SMAC1, 4 .EQU MPU_RGDE6W2_M0SMAC0, 3 .EQU MPU_RGDE6W2_M0UMAC2, 2 .EQU MPU_RGDE6W2_M0UMAC1, 1 .EQU MPU_RGDE6W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE6W3, 0x40005B6C // 0x4000 5B6C MPU_RGDE6W3 Bits------------------------------------- .EQU MPU_RGDE6W3_PID7, 31 .EQU MPU_RGDE6W3_PID6, 30 .EQU MPU_RGDE6W3_PID5, 29 .EQU MPU_RGDE6W3_PID4, 28 .EQU MPU_RGDE6W3_PID3, 27 .EQU MPU_RGDE6W3_PID2, 26 .EQU MPU_RGDE6W3_PID1, 25 .EQU MPU_RGDE6W3_PID0, 24 .EQU MPU_RGDE6W3_PIDMSK7, 23 .EQU MPU_RGDE6W3_PIDMSK6, 22 .EQU MPU_RGDE6W3_PIDMSK5, 21 .EQU MPU_RGDE6W3_PIDMSK4, 20 .EQU MPU_RGDE6W3_PIDMSK3, 19 .EQU MPU_RGDE6W3_PIDMSK2, 18 .EQU MPU_RGDE6W3_PIDMSK1, 17 .EQU MPU_RGDE6W3_PIDMSK0, 16 .EQU MPU_RGDE6W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE7W0, 0x40005B70 // 0x4000 5B70 MPU_RGDE7W0 Bits------------------------------------- .EQU MPU_RGDE7W0_STRADDR31, 31 .EQU MPU_RGDE7W0_STRADDR30, 30 .EQU MPU_RGDE7W0_STRADDR29, 29 .EQU MPU_RGDE7W0_STRADDR28, 28 .EQU MPU_RGDE7W0_STRADDR27, 27 .EQU MPU_RGDE7W0_STRADDR26, 26 .EQU MPU_RGDE7W0_STRADDR25, 25 .EQU MPU_RGDE7W0_STRADDR24, 24 .EQU MPU_RGDE7W0_STRADDR23, 23 .EQU MPU_RGDE7W0_STRADDR22, 22 .EQU MPU_RGDE7W0_STRADDR21, 21 .EQU MPU_RGDE7W0_STRADDR20, 20 .EQU MPU_RGDE7W0_STRADDR19, 19 .EQU MPU_RGDE7W0_STRADDR18, 18 .EQU MPU_RGDE7W0_STRADDR17, 17 .EQU MPU_RGDE7W0_STRADDR16, 16 .EQU MPU_RGDE7W0_STRADDR15, 15 .EQU MPU_RGDE7W0_STRADDR14, 14 .EQU MPU_RGDE7W0_STRADDR13, 13 .EQU MPU_RGDE7W0_STRADDR12, 12 .EQU MPU_RGDE7W0_STRADDR11, 11 .EQU MPU_RGDE7W0_STRADDR10, 10 .EQU MPU_RGDE7W0_STRADDR9, 9 .EQU MPU_RGDE7W0_STRADDR8, 8 .EQU MPU_RGDE7W0_STRADDR7, 7 .EQU MPU_RGDE7W0_STRADDR6, 6 .EQU MPU_RGDE7W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE7W1, 0x40005B74 // 0x4000 5B74 MPU_RGDE7W1 Bits------------------------------------- .EQU MPU_RGDE7W1_ENDADDR31, 31 .EQU MPU_RGDE7W1_ENDADDR30, 30 .EQU MPU_RGDE7W1_ENDADDR29, 29 .EQU MPU_RGDE7W1_ENDADDR28, 28 .EQU MPU_RGDE7W1_ENDADDR27, 27 .EQU MPU_RGDE7W1_ENDADDR26, 26 .EQU MPU_RGDE7W1_ENDADDR25, 25 .EQU MPU_RGDE7W1_ENDADDR24, 24 .EQU MPU_RGDE7W1_ENDADDR23, 23 .EQU MPU_RGDE7W1_ENDADDR22, 22 .EQU MPU_RGDE7W1_ENDADDR21, 21 .EQU MPU_RGDE7W1_ENDADDR20, 20 .EQU MPU_RGDE7W1_ENDADDR19, 19 .EQU MPU_RGDE7W1_ENDADDR18, 18 .EQU MPU_RGDE7W1_ENDADDR17, 17 .EQU MPU_RGDE7W1_ENDADDR16, 16 .EQU MPU_RGDE7W1_ENDADDR15, 15 .EQU MPU_RGDE7W1_ENDADDR14, 14 .EQU MPU_RGDE7W1_ENDADDR13, 13 .EQU MPU_RGDE7W1_ENDADDR12, 12 .EQU MPU_RGDE7W1_ENDADDR11, 11 .EQU MPU_RGDE7W1_ENDADDR10, 10 .EQU MPU_RGDE7W1_ENDADDR9, 9 .EQU MPU_RGDE7W1_ENDADDR8, 8 .EQU MPU_RGDE7W1_ENDADDR7, 7 .EQU MPU_RGDE7W1_ENDADDR6, 6 .EQU MPU_RGDE7W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE7W2, 0x40005B78 // 0x4000 5B78 MPU_RGDE7W2 Bits------------------------------------- .EQU MPU_RGDE7W2_M2SMAC1, 16 .EQU MPU_RGDE7W2_M2SMAC0, 15 .EQU MPU_RGDE7W2_M2UMAC2, 14 .EQU MPU_RGDE7W2_M2UMAC1, 13 .EQU MPU_RGDE7W2_M2UMAC0, 12 .EQU MPU_RGDE7W2_M1PEN, 11 .EQU MPU_RGDE7W2_M1SMAC1, 10 .EQU MPU_RGDE7W2_M1SMAC0, 9 .EQU MPU_RGDE7W2_M1UMAC2, 8 .EQU MPU_RGDE7W2_M1UMAC1, 7 .EQU MPU_RGDE7W2_M1UMAC0, 6 .EQU MPU_RGDE7W2_M0PEN, 5 .EQU MPU_RGDE7W2_M0SMAC1, 4 .EQU MPU_RGDE7W2_M0SMAC0, 3 .EQU MPU_RGDE7W2_M0UMAC2, 2 .EQU MPU_RGDE7W2_M0UMAC1, 1 .EQU MPU_RGDE7W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE7W3, 0x40005B7C // 0x4000 5B7C MPU_RGDE7W3 Bits------------------------------------- .EQU MPU_RGDE7W3_PID7, 31 .EQU MPU_RGDE7W3_PID6, 30 .EQU MPU_RGDE7W3_PID5, 29 .EQU MPU_RGDE7W3_PID4, 28 .EQU MPU_RGDE7W3_PID3, 27 .EQU MPU_RGDE7W3_PID2, 26 .EQU MPU_RGDE7W3_PID1, 25 .EQU MPU_RGDE7W3_PID0, 24 .EQU MPU_RGDE7W3_PIDMSK7, 23 .EQU MPU_RGDE7W3_PIDMSK6, 22 .EQU MPU_RGDE7W3_PIDMSK5, 21 .EQU MPU_RGDE7W3_PIDMSK4, 20 .EQU MPU_RGDE7W3_PIDMSK3, 19 .EQU MPU_RGDE7W3_PIDMSK2, 18 .EQU MPU_RGDE7W3_PIDMSK1, 17 .EQU MPU_RGDE7W3_PIDMSK0, 16 .EQU MPU_RGDE7W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE8W0, 0x40005B80 // 0x4000 5B80 MPU_RGDE8W0 Bits------------------------------------- .EQU MPU_RGDE8W0_STRADDR31, 31 .EQU MPU_RGDE8W0_STRADDR30, 30 .EQU MPU_RGDE8W0_STRADDR29, 29 .EQU MPU_RGDE8W0_STRADDR28, 28 .EQU MPU_RGDE8W0_STRADDR27, 27 .EQU MPU_RGDE8W0_STRADDR26, 26 .EQU MPU_RGDE8W0_STRADDR25, 25 .EQU MPU_RGDE8W0_STRADDR24, 24 .EQU MPU_RGDE8W0_STRADDR23, 23 .EQU MPU_RGDE8W0_STRADDR22, 22 .EQU MPU_RGDE8W0_STRADDR21, 21 .EQU MPU_RGDE8W0_STRADDR20, 20 .EQU MPU_RGDE8W0_STRADDR19, 19 .EQU MPU_RGDE8W0_STRADDR18, 18 .EQU MPU_RGDE8W0_STRADDR17, 17 .EQU MPU_RGDE8W0_STRADDR16, 16 .EQU MPU_RGDE8W0_STRADDR15, 15 .EQU MPU_RGDE8W0_STRADDR14, 14 .EQU MPU_RGDE8W0_STRADDR13, 13 .EQU MPU_RGDE8W0_STRADDR12, 12 .EQU MPU_RGDE8W0_STRADDR11, 11 .EQU MPU_RGDE8W0_STRADDR10, 10 .EQU MPU_RGDE8W0_STRADDR9, 9 .EQU MPU_RGDE8W0_STRADDR8, 8 .EQU MPU_RGDE8W0_STRADDR7, 7 .EQU MPU_RGDE8W0_STRADDR6, 6 .EQU MPU_RGDE8W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE8W1, 0x40005B84 // 0x4000 5B84 MPU_RGDE8W1 Bits------------------------------------- .EQU MPU_RGDE8W1_ENDADDR31, 31 .EQU MPU_RGDE8W1_ENDADDR30, 30 .EQU MPU_RGDE8W1_ENDADDR29, 29 .EQU MPU_RGDE8W1_ENDADDR28, 28 .EQU MPU_RGDE8W1_ENDADDR27, 27 .EQU MPU_RGDE8W1_ENDADDR26, 26 .EQU MPU_RGDE8W1_ENDADDR25, 25 .EQU MPU_RGDE8W1_ENDADDR24, 24 .EQU MPU_RGDE8W1_ENDADDR23, 23 .EQU MPU_RGDE8W1_ENDADDR22, 22 .EQU MPU_RGDE8W1_ENDADDR21, 21 .EQU MPU_RGDE8W1_ENDADDR20, 20 .EQU MPU_RGDE8W1_ENDADDR19, 19 .EQU MPU_RGDE8W1_ENDADDR18, 18 .EQU MPU_RGDE8W1_ENDADDR17, 17 .EQU MPU_RGDE8W1_ENDADDR16, 16 .EQU MPU_RGDE8W1_ENDADDR15, 15 .EQU MPU_RGDE8W1_ENDADDR14, 14 .EQU MPU_RGDE8W1_ENDADDR13, 13 .EQU MPU_RGDE8W1_ENDADDR12, 12 .EQU MPU_RGDE8W1_ENDADDR11, 11 .EQU MPU_RGDE8W1_ENDADDR10, 10 .EQU MPU_RGDE8W1_ENDADDR9, 9 .EQU MPU_RGDE8W1_ENDADDR8, 8 .EQU MPU_RGDE8W1_ENDADDR7, 7 .EQU MPU_RGDE8W1_ENDADDR6, 6 .EQU MPU_RGDE8W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE8W2, 0x40005B88 // 0x4000 5B88 MPU_RGDE8W2 Bits------------------------------------- .EQU MPU_RGDE8W2_M2SMAC1, 16 .EQU MPU_RGDE8W2_M2SMAC0, 15 .EQU MPU_RGDE8W2_M2UMAC2, 14 .EQU MPU_RGDE8W2_M2UMAC1, 13 .EQU MPU_RGDE8W2_M2UMAC0, 12 .EQU MPU_RGDE8W2_M1PEN, 11 .EQU MPU_RGDE8W2_M1SMAC1, 10 .EQU MPU_RGDE8W2_M1SMAC0, 9 .EQU MPU_RGDE8W2_M1UMAC2, 8 .EQU MPU_RGDE8W2_M1UMAC1, 7 .EQU MPU_RGDE8W2_M1UMAC0, 6 .EQU MPU_RGDE8W2_M0PEN, 5 .EQU MPU_RGDE8W2_M0SMAC1, 4 .EQU MPU_RGDE8W2_M0SMAC0, 3 .EQU MPU_RGDE8W2_M0UMAC2, 2 .EQU MPU_RGDE8W2_M0UMAC1, 1 .EQU MPU_RGDE8W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE8W3, 0x40005B8C // 0x4000 5B8C MPU_RGDE8W3 Bits------------------------------------- .EQU MPU_RGDE8W3_PID7, 31 .EQU MPU_RGDE8W3_PID6, 30 .EQU MPU_RGDE8W3_PID5, 29 .EQU MPU_RGDE8W3_PID4, 28 .EQU MPU_RGDE8W3_PID3, 27 .EQU MPU_RGDE8W3_PID2, 26 .EQU MPU_RGDE8W3_PID1, 25 .EQU MPU_RGDE8W3_PID0, 24 .EQU MPU_RGDE8W3_PIDMSK7, 23 .EQU MPU_RGDE8W3_PIDMSK6, 22 .EQU MPU_RGDE8W3_PIDMSK5, 21 .EQU MPU_RGDE8W3_PIDMSK4, 20 .EQU MPU_RGDE8W3_PIDMSK3, 19 .EQU MPU_RGDE8W3_PIDMSK2, 18 .EQU MPU_RGDE8W3_PIDMSK1, 17 .EQU MPU_RGDE8W3_PIDMSK0, 16 .EQU MPU_RGDE8W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE9W0, 0x40005B90 // 0x4000 5B90 MPU_RGDE9W0 Bits------------------------------------- .EQU MPU_RGDE9W0_STRADDR31, 31 .EQU MPU_RGDE9W0_STRADDR30, 30 .EQU MPU_RGDE9W0_STRADDR29, 29 .EQU MPU_RGDE9W0_STRADDR28, 28 .EQU MPU_RGDE9W0_STRADDR27, 27 .EQU MPU_RGDE9W0_STRADDR26, 26 .EQU MPU_RGDE9W0_STRADDR25, 25 .EQU MPU_RGDE9W0_STRADDR24, 24 .EQU MPU_RGDE9W0_STRADDR23, 23 .EQU MPU_RGDE9W0_STRADDR22, 22 .EQU MPU_RGDE9W0_STRADDR21, 21 .EQU MPU_RGDE9W0_STRADDR20, 20 .EQU MPU_RGDE9W0_STRADDR19, 19 .EQU MPU_RGDE9W0_STRADDR18, 18 .EQU MPU_RGDE9W0_STRADDR17, 17 .EQU MPU_RGDE9W0_STRADDR16, 16 .EQU MPU_RGDE9W0_STRADDR15, 15 .EQU MPU_RGDE9W0_STRADDR14, 14 .EQU MPU_RGDE9W0_STRADDR13, 13 .EQU MPU_RGDE9W0_STRADDR12, 12 .EQU MPU_RGDE9W0_STRADDR11, 11 .EQU MPU_RGDE9W0_STRADDR10, 10 .EQU MPU_RGDE9W0_STRADDR9, 9 .EQU MPU_RGDE9W0_STRADDR8, 8 .EQU MPU_RGDE9W0_STRADDR7, 7 .EQU MPU_RGDE9W0_STRADDR6, 6 .EQU MPU_RGDE9W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE9W1, 0x40005B94 // 0x4000 5B94 MPU_RGDE9W1 Bits------------------------------------- .EQU MPU_RGDE9W1_ENDADDR31, 31 .EQU MPU_RGDE9W1_ENDADDR30, 30 .EQU MPU_RGDE9W1_ENDADDR29, 29 .EQU MPU_RGDE9W1_ENDADDR28, 28 .EQU MPU_RGDE9W1_ENDADDR27, 27 .EQU MPU_RGDE9W1_ENDADDR26, 26 .EQU MPU_RGDE9W1_ENDADDR25, 25 .EQU MPU_RGDE9W1_ENDADDR24, 24 .EQU MPU_RGDE9W1_ENDADDR23, 23 .EQU MPU_RGDE9W1_ENDADDR22, 22 .EQU MPU_RGDE9W1_ENDADDR21, 21 .EQU MPU_RGDE9W1_ENDADDR20, 20 .EQU MPU_RGDE9W1_ENDADDR19, 19 .EQU MPU_RGDE9W1_ENDADDR18, 18 .EQU MPU_RGDE9W1_ENDADDR17, 17 .EQU MPU_RGDE9W1_ENDADDR16, 16 .EQU MPU_RGDE9W1_ENDADDR15, 15 .EQU MPU_RGDE9W1_ENDADDR14, 14 .EQU MPU_RGDE9W1_ENDADDR13, 13 .EQU MPU_RGDE9W1_ENDADDR12, 12 .EQU MPU_RGDE9W1_ENDADDR11, 11 .EQU MPU_RGDE9W1_ENDADDR10, 10 .EQU MPU_RGDE9W1_ENDADDR9, 9 .EQU MPU_RGDE9W1_ENDADDR8, 8 .EQU MPU_RGDE9W1_ENDADDR7, 7 .EQU MPU_RGDE9W1_ENDADDR6, 6 .EQU MPU_RGDE9W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE9W2, 0x40005B98 // 0x4000 5B98 MPU_RGDE9W2 Bits------------------------------------- .EQU MPU_RGDE9W2_M2SMAC1, 16 .EQU MPU_RGDE9W2_M2SMAC0, 15 .EQU MPU_RGDE9W2_M2UMAC2, 14 .EQU MPU_RGDE9W2_M2UMAC1, 13 .EQU MPU_RGDE9W2_M2UMAC0, 12 .EQU MPU_RGDE9W2_M1PEN, 11 .EQU MPU_RGDE9W2_M1SMAC1, 10 .EQU MPU_RGDE9W2_M1SMAC0, 9 .EQU MPU_RGDE9W2_M1UMAC2, 8 .EQU MPU_RGDE9W2_M1UMAC1, 7 .EQU MPU_RGDE9W2_M1UMAC0, 6 .EQU MPU_RGDE9W2_M0PEN, 5 .EQU MPU_RGDE9W2_M0SMAC1, 4 .EQU MPU_RGDE9W2_M0SMAC0, 3 .EQU MPU_RGDE9W2_M0UMAC2, 2 .EQU MPU_RGDE9W2_M0UMAC1, 1 .EQU MPU_RGDE9W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE9W3, 0x40005B9C // 0x4000 5B9C MPU_RGDE9W3 Bits------------------------------------- .EQU MPU_RGDE9W3_PID7, 31 .EQU MPU_RGDE9W3_PID6, 30 .EQU MPU_RGDE9W3_PID5, 29 .EQU MPU_RGDE9W3_PID4, 28 .EQU MPU_RGDE9W3_PID3, 27 .EQU MPU_RGDE9W3_PID2, 26 .EQU MPU_RGDE9W3_PID1, 25 .EQU MPU_RGDE9W3_PID0, 24 .EQU MPU_RGDE9W3_PIDMSK7, 23 .EQU MPU_RGDE9W3_PIDMSK6, 22 .EQU MPU_RGDE9W3_PIDMSK5, 21 .EQU MPU_RGDE9W3_PIDMSK4, 20 .EQU MPU_RGDE9W3_PIDMSK3, 19 .EQU MPU_RGDE9W3_PIDMSK2, 18 .EQU MPU_RGDE9W3_PIDMSK1, 17 .EQU MPU_RGDE9W3_PIDMSK0, 16 .EQU MPU_RGDE9W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE10W0, 0x40005BA0 // 0x4000 5BA0 MPU_RGDE10W0 Bits------------------------------------- .EQU MPU_RGDE10W0_STRADDR31, 31 .EQU MPU_RGDE10W0_STRADDR30, 30 .EQU MPU_RGDE10W0_STRADDR29, 29 .EQU MPU_RGDE10W0_STRADDR28, 28 .EQU MPU_RGDE10W0_STRADDR27, 27 .EQU MPU_RGDE10W0_STRADDR26, 26 .EQU MPU_RGDE10W0_STRADDR25, 25 .EQU MPU_RGDE10W0_STRADDR24, 24 .EQU MPU_RGDE10W0_STRADDR23, 23 .EQU MPU_RGDE10W0_STRADDR22, 22 .EQU MPU_RGDE10W0_STRADDR21, 21 .EQU MPU_RGDE10W0_STRADDR20, 20 .EQU MPU_RGDE10W0_STRADDR19, 19 .EQU MPU_RGDE10W0_STRADDR18, 18 .EQU MPU_RGDE10W0_STRADDR17, 17 .EQU MPU_RGDE10W0_STRADDR16, 16 .EQU MPU_RGDE10W0_STRADDR15, 15 .EQU MPU_RGDE10W0_STRADDR14, 14 .EQU MPU_RGDE10W0_STRADDR13, 13 .EQU MPU_RGDE10W0_STRADDR12, 12 .EQU MPU_RGDE10W0_STRADDR11, 11 .EQU MPU_RGDE10W0_STRADDR10, 10 .EQU MPU_RGDE10W0_STRADDR9, 9 .EQU MPU_RGDE10W0_STRADDR8, 8 .EQU MPU_RGDE10W0_STRADDR7, 7 .EQU MPU_RGDE10W0_STRADDR6, 6 .EQU MPU_RGDE10W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE10W1, 0x40005BA4 // 0x4000 5BA4 MPU_RGDE10W1 Bits------------------------------------- .EQU MPU_RGDE10W1_ENDADDR31, 31 .EQU MPU_RGDE10W1_ENDADDR30, 30 .EQU MPU_RGDE10W1_ENDADDR29, 29 .EQU MPU_RGDE10W1_ENDADDR28, 28 .EQU MPU_RGDE10W1_ENDADDR27, 27 .EQU MPU_RGDE10W1_ENDADDR26, 26 .EQU MPU_RGDE10W1_ENDADDR25, 25 .EQU MPU_RGDE10W1_ENDADDR24, 24 .EQU MPU_RGDE10W1_ENDADDR23, 23 .EQU MPU_RGDE10W1_ENDADDR22, 22 .EQU MPU_RGDE10W1_ENDADDR21, 21 .EQU MPU_RGDE10W1_ENDADDR20, 20 .EQU MPU_RGDE10W1_ENDADDR19, 19 .EQU MPU_RGDE10W1_ENDADDR18, 18 .EQU MPU_RGDE10W1_ENDADDR17, 17 .EQU MPU_RGDE10W1_ENDADDR16, 16 .EQU MPU_RGDE10W1_ENDADDR15, 15 .EQU MPU_RGDE10W1_ENDADDR14, 14 .EQU MPU_RGDE10W1_ENDADDR13, 13 .EQU MPU_RGDE10W1_ENDADDR12, 12 .EQU MPU_RGDE10W1_ENDADDR11, 11 .EQU MPU_RGDE10W1_ENDADDR10, 10 .EQU MPU_RGDE10W1_ENDADDR9, 9 .EQU MPU_RGDE10W1_ENDADDR8, 8 .EQU MPU_RGDE10W1_ENDADDR7, 7 .EQU MPU_RGDE10W1_ENDADDR6, 6 .EQU MPU_RGDE10W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE10W2, 0x40005BA8 // 0x4000 5BA8 MPU_RGDE10W2 Bits------------------------------------- .EQU MPU_RGDE10W2_M2SMAC1, 16 .EQU MPU_RGDE10W2_M2SMAC0, 15 .EQU MPU_RGDE10W2_M2UMAC2, 14 .EQU MPU_RGDE10W2_M2UMAC1, 13 .EQU MPU_RGDE10W2_M2UMAC0, 12 .EQU MPU_RGDE10W2_M1PEN, 11 .EQU MPU_RGDE10W2_M1SMAC1, 10 .EQU MPU_RGDE10W2_M1SMAC0, 9 .EQU MPU_RGDE10W2_M1UMAC2, 8 .EQU MPU_RGDE10W2_M1UMAC1, 7 .EQU MPU_RGDE10W2_M1UMAC0, 6 .EQU MPU_RGDE10W2_M0PEN, 5 .EQU MPU_RGDE10W2_M0SMAC1, 4 .EQU MPU_RGDE10W2_M0SMAC0, 3 .EQU MPU_RGDE10W2_M0UMAC2, 2 .EQU MPU_RGDE10W2_M0UMAC1, 1 .EQU MPU_RGDE10W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE10W3, 0x40005BAC // 0x4000 5BAC MPU_RGDE10W3 Bits------------------------------------- .EQU MPU_RGDE10W3_PID7, 31 .EQU MPU_RGDE10W3_PID6, 30 .EQU MPU_RGDE10W3_PID5, 29 .EQU MPU_RGDE10W3_PID4, 28 .EQU MPU_RGDE10W3_PID3, 27 .EQU MPU_RGDE10W3_PID2, 26 .EQU MPU_RGDE10W3_PID1, 25 .EQU MPU_RGDE10W3_PID0, 24 .EQU MPU_RGDE10W3_PIDMSK7, 23 .EQU MPU_RGDE10W3_PIDMSK6, 22 .EQU MPU_RGDE10W3_PIDMSK5, 21 .EQU MPU_RGDE10W3_PIDMSK4, 20 .EQU MPU_RGDE10W3_PIDMSK3, 19 .EQU MPU_RGDE10W3_PIDMSK2, 18 .EQU MPU_RGDE10W3_PIDMSK1, 17 .EQU MPU_RGDE10W3_PIDMSK0, 16 .EQU MPU_RGDE10W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE11W0, 0x40005BB0 // 0x4000 5BB0 MPU_RGDE11W0 Bits------------------------------------- .EQU MPU_RGDE11W0_STRADDR31, 31 .EQU MPU_RGDE11W0_STRADDR30, 30 .EQU MPU_RGDE11W0_STRADDR29, 29 .EQU MPU_RGDE11W0_STRADDR28, 28 .EQU MPU_RGDE11W0_STRADDR27, 27 .EQU MPU_RGDE11W0_STRADDR26, 26 .EQU MPU_RGDE11W0_STRADDR25, 25 .EQU MPU_RGDE11W0_STRADDR24, 24 .EQU MPU_RGDE11W0_STRADDR23, 23 .EQU MPU_RGDE11W0_STRADDR22, 22 .EQU MPU_RGDE11W0_STRADDR21, 21 .EQU MPU_RGDE11W0_STRADDR20, 20 .EQU MPU_RGDE11W0_STRADDR19, 19 .EQU MPU_RGDE11W0_STRADDR18, 18 .EQU MPU_RGDE11W0_STRADDR17, 17 .EQU MPU_RGDE11W0_STRADDR16, 16 .EQU MPU_RGDE11W0_STRADDR15, 15 .EQU MPU_RGDE11W0_STRADDR14, 14 .EQU MPU_RGDE11W0_STRADDR13, 13 .EQU MPU_RGDE11W0_STRADDR12, 12 .EQU MPU_RGDE11W0_STRADDR11, 11 .EQU MPU_RGDE11W0_STRADDR10, 10 .EQU MPU_RGDE11W0_STRADDR9, 9 .EQU MPU_RGDE11W0_STRADDR8, 8 .EQU MPU_RGDE11W0_STRADDR7, 7 .EQU MPU_RGDE11W0_STRADDR6, 6 .EQU MPU_RGDE11W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE11W1, 0x40005BB4 // 0x4000 5BB4 MPU_RGDE11W1 Bits------------------------------------- .EQU MPU_RGDE11W1_ENDADDR31, 31 .EQU MPU_RGDE11W1_ENDADDR30, 30 .EQU MPU_RGDE11W1_ENDADDR29, 29 .EQU MPU_RGDE11W1_ENDADDR28, 28 .EQU MPU_RGDE11W1_ENDADDR27, 27 .EQU MPU_RGDE11W1_ENDADDR26, 26 .EQU MPU_RGDE11W1_ENDADDR25, 25 .EQU MPU_RGDE11W1_ENDADDR24, 24 .EQU MPU_RGDE11W1_ENDADDR23, 23 .EQU MPU_RGDE11W1_ENDADDR22, 22 .EQU MPU_RGDE11W1_ENDADDR21, 21 .EQU MPU_RGDE11W1_ENDADDR20, 20 .EQU MPU_RGDE11W1_ENDADDR19, 19 .EQU MPU_RGDE11W1_ENDADDR18, 18 .EQU MPU_RGDE11W1_ENDADDR17, 17 .EQU MPU_RGDE11W1_ENDADDR16, 16 .EQU MPU_RGDE11W1_ENDADDR15, 15 .EQU MPU_RGDE11W1_ENDADDR14, 14 .EQU MPU_RGDE11W1_ENDADDR13, 13 .EQU MPU_RGDE11W1_ENDADDR12, 12 .EQU MPU_RGDE11W1_ENDADDR11, 11 .EQU MPU_RGDE11W1_ENDADDR10, 10 .EQU MPU_RGDE11W1_ENDADDR9, 9 .EQU MPU_RGDE11W1_ENDADDR8, 8 .EQU MPU_RGDE11W1_ENDADDR7, 7 .EQU MPU_RGDE11W1_ENDADDR6, 6 .EQU MPU_RGDE11W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE11W2, 0x40005BB8 // 0x4000 5BB8 MPU_RGDE11W2 Bits------------------------------------- .EQU MPU_RGDE11W2_M2SMAC1, 16 .EQU MPU_RGDE11W2_M2SMAC0, 15 .EQU MPU_RGDE11W2_M2UMAC2, 14 .EQU MPU_RGDE11W2_M2UMAC1, 13 .EQU MPU_RGDE11W2_M2UMAC0, 12 .EQU MPU_RGDE11W2_M1PEN, 11 .EQU MPU_RGDE11W2_M1SMAC1, 10 .EQU MPU_RGDE11W2_M1SMAC0, 9 .EQU MPU_RGDE11W2_M1UMAC2, 8 .EQU MPU_RGDE11W2_M1UMAC1, 7 .EQU MPU_RGDE11W2_M1UMAC0, 6 .EQU MPU_RGDE11W2_M0PEN, 5 .EQU MPU_RGDE11W2_M0SMAC1, 4 .EQU MPU_RGDE11W2_M0SMAC0, 3 .EQU MPU_RGDE11W2_M0UMAC2, 2 .EQU MPU_RGDE11W2_M0UMAC1, 1 .EQU MPU_RGDE11W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE11W3, 0x40005BBC // 0x4000 5BBC MPU_RGDE11W3 Bits------------------------------------- .EQU MPU_RGDE11W3_PID7, 31 .EQU MPU_RGDE11W3_PID6, 30 .EQU MPU_RGDE11W3_PID5, 29 .EQU MPU_RGDE11W3_PID4, 28 .EQU MPU_RGDE11W3_PID3, 27 .EQU MPU_RGDE11W3_PID2, 26 .EQU MPU_RGDE11W3_PID1, 25 .EQU MPU_RGDE11W3_PID0, 24 .EQU MPU_RGDE11W3_PIDMSK7, 23 .EQU MPU_RGDE11W3_PIDMSK6, 22 .EQU MPU_RGDE11W3_PIDMSK5, 21 .EQU MPU_RGDE11W3_PIDMSK4, 20 .EQU MPU_RGDE11W3_PIDMSK3, 19 .EQU MPU_RGDE11W3_PIDMSK2, 18 .EQU MPU_RGDE11W3_PIDMSK1, 17 .EQU MPU_RGDE11W3_PIDMSK0, 16 .EQU MPU_RGDE11W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE12W0, 0x40005BC0 // 0x4000 5BC0 MPU_RGDE12W0 Bits------------------------------------- .EQU MPU_RGDE12W0_STRADDR31, 31 .EQU MPU_RGDE12W0_STRADDR30, 30 .EQU MPU_RGDE12W0_STRADDR29, 29 .EQU MPU_RGDE12W0_STRADDR28, 28 .EQU MPU_RGDE12W0_STRADDR27, 27 .EQU MPU_RGDE12W0_STRADDR26, 26 .EQU MPU_RGDE12W0_STRADDR25, 25 .EQU MPU_RGDE12W0_STRADDR24, 24 .EQU MPU_RGDE12W0_STRADDR23, 23 .EQU MPU_RGDE12W0_STRADDR22, 22 .EQU MPU_RGDE12W0_STRADDR21, 21 .EQU MPU_RGDE12W0_STRADDR20, 20 .EQU MPU_RGDE12W0_STRADDR19, 19 .EQU MPU_RGDE12W0_STRADDR18, 18 .EQU MPU_RGDE12W0_STRADDR17, 17 .EQU MPU_RGDE12W0_STRADDR16, 16 .EQU MPU_RGDE12W0_STRADDR15, 15 .EQU MPU_RGDE12W0_STRADDR14, 14 .EQU MPU_RGDE12W0_STRADDR13, 13 .EQU MPU_RGDE12W0_STRADDR12, 12 .EQU MPU_RGDE12W0_STRADDR11, 11 .EQU MPU_RGDE12W0_STRADDR10, 10 .EQU MPU_RGDE12W0_STRADDR9, 9 .EQU MPU_RGDE12W0_STRADDR8, 8 .EQU MPU_RGDE12W0_STRADDR7, 7 .EQU MPU_RGDE12W0_STRADDR6, 6 .EQU MPU_RGDE12W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE12W1, 0x40005BC4 // 0x4000 5BC4 MPU_RGDE12W1 Bits------------------------------------- .EQU MPU_RGDE12W1_ENDADDR31, 31 .EQU MPU_RGDE12W1_ENDADDR30, 30 .EQU MPU_RGDE12W1_ENDADDR29, 29 .EQU MPU_RGDE12W1_ENDADDR28, 28 .EQU MPU_RGDE12W1_ENDADDR27, 27 .EQU MPU_RGDE12W1_ENDADDR26, 26 .EQU MPU_RGDE12W1_ENDADDR25, 25 .EQU MPU_RGDE12W1_ENDADDR24, 24 .EQU MPU_RGDE12W1_ENDADDR23, 23 .EQU MPU_RGDE12W1_ENDADDR22, 22 .EQU MPU_RGDE12W1_ENDADDR21, 21 .EQU MPU_RGDE12W1_ENDADDR20, 20 .EQU MPU_RGDE12W1_ENDADDR19, 19 .EQU MPU_RGDE12W1_ENDADDR18, 18 .EQU MPU_RGDE12W1_ENDADDR17, 17 .EQU MPU_RGDE12W1_ENDADDR16, 16 .EQU MPU_RGDE12W1_ENDADDR15, 15 .EQU MPU_RGDE12W1_ENDADDR14, 14 .EQU MPU_RGDE12W1_ENDADDR13, 13 .EQU MPU_RGDE12W1_ENDADDR12, 12 .EQU MPU_RGDE12W1_ENDADDR11, 11 .EQU MPU_RGDE12W1_ENDADDR10, 10 .EQU MPU_RGDE12W1_ENDADDR9, 9 .EQU MPU_RGDE12W1_ENDADDR8, 8 .EQU MPU_RGDE12W1_ENDADDR7, 7 .EQU MPU_RGDE12W1_ENDADDR6, 6 .EQU MPU_RGDE12W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE12W2, 0x40005BC8 // 0x4000 5BC8 MPU_RGDE12W2 Bits------------------------------------- .EQU MPU_RGDE12W2_M2SMAC1, 16 .EQU MPU_RGDE12W2_M2SMAC0, 15 .EQU MPU_RGDE12W2_M2UMAC2, 14 .EQU MPU_RGDE12W2_M2UMAC1, 13 .EQU MPU_RGDE12W2_M2UMAC0, 12 .EQU MPU_RGDE12W2_M1PEN, 11 .EQU MPU_RGDE12W2_M1SMAC1, 10 .EQU MPU_RGDE12W2_M1SMAC0, 9 .EQU MPU_RGDE12W2_M1UMAC2, 8 .EQU MPU_RGDE12W2_M1UMAC1, 7 .EQU MPU_RGDE12W2_M1UMAC0, 6 .EQU MPU_RGDE12W2_M0PEN, 5 .EQU MPU_RGDE12W2_M0SMAC1, 4 .EQU MPU_RGDE12W2_M0SMAC0, 3 .EQU MPU_RGDE12W2_M0UMAC2, 2 .EQU MPU_RGDE12W2_M0UMAC1, 1 .EQU MPU_RGDE12W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE12W3, 0x40005BCC // 0x4000 5BCC MPU_RGDE12W3 Bits------------------------------------- .EQU MPU_RGDE12W3_PID7, 31 .EQU MPU_RGDE12W3_PID6, 30 .EQU MPU_RGDE12W3_PID5, 29 .EQU MPU_RGDE12W3_PID4, 28 .EQU MPU_RGDE12W3_PID3, 27 .EQU MPU_RGDE12W3_PID2, 26 .EQU MPU_RGDE12W3_PID1, 25 .EQU MPU_RGDE12W3_PID0, 24 .EQU MPU_RGDE12W3_PIDMSK7, 23 .EQU MPU_RGDE12W3_PIDMSK6, 22 .EQU MPU_RGDE12W3_PIDMSK5, 21 .EQU MPU_RGDE12W3_PIDMSK4, 20 .EQU MPU_RGDE12W3_PIDMSK3, 19 .EQU MPU_RGDE12W3_PIDMSK2, 18 .EQU MPU_RGDE12W3_PIDMSK1, 17 .EQU MPU_RGDE12W3_PIDMSK0, 16 .EQU MPU_RGDE12W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE13W0, 0x40005BD0 // 0x4000 5BD0 MPU_RGDE13W0 Bits------------------------------------- .EQU MPU_RGDE13W0_STRADDR31, 31 .EQU MPU_RGDE13W0_STRADDR30, 30 .EQU MPU_RGDE13W0_STRADDR29, 29 .EQU MPU_RGDE13W0_STRADDR28, 28 .EQU MPU_RGDE13W0_STRADDR27, 27 .EQU MPU_RGDE13W0_STRADDR26, 26 .EQU MPU_RGDE13W0_STRADDR25, 25 .EQU MPU_RGDE13W0_STRADDR24, 24 .EQU MPU_RGDE13W0_STRADDR23, 23 .EQU MPU_RGDE13W0_STRADDR22, 22 .EQU MPU_RGDE13W0_STRADDR21, 21 .EQU MPU_RGDE13W0_STRADDR20, 20 .EQU MPU_RGDE13W0_STRADDR19, 19 .EQU MPU_RGDE13W0_STRADDR18, 18 .EQU MPU_RGDE13W0_STRADDR17, 17 .EQU MPU_RGDE13W0_STRADDR16, 16 .EQU MPU_RGDE13W0_STRADDR15, 15 .EQU MPU_RGDE13W0_STRADDR14, 14 .EQU MPU_RGDE13W0_STRADDR13, 13 .EQU MPU_RGDE13W0_STRADDR12, 12 .EQU MPU_RGDE13W0_STRADDR11, 11 .EQU MPU_RGDE13W0_STRADDR10, 10 .EQU MPU_RGDE13W0_STRADDR9, 9 .EQU MPU_RGDE13W0_STRADDR8, 8 .EQU MPU_RGDE13W0_STRADDR7, 7 .EQU MPU_RGDE13W0_STRADDR6, 6 .EQU MPU_RGDE13W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE13W1, 0x40005BD4 // 0x4000 5BD4 MPU_RGDE13W1 Bits------------------------------------- .EQU MPU_RGDE13W1_ENDADDR31, 31 .EQU MPU_RGDE13W1_ENDADDR30, 30 .EQU MPU_RGDE13W1_ENDADDR29, 29 .EQU MPU_RGDE13W1_ENDADDR28, 28 .EQU MPU_RGDE13W1_ENDADDR27, 27 .EQU MPU_RGDE13W1_ENDADDR26, 26 .EQU MPU_RGDE13W1_ENDADDR25, 25 .EQU MPU_RGDE13W1_ENDADDR24, 24 .EQU MPU_RGDE13W1_ENDADDR23, 23 .EQU MPU_RGDE13W1_ENDADDR22, 22 .EQU MPU_RGDE13W1_ENDADDR21, 21 .EQU MPU_RGDE13W1_ENDADDR20, 20 .EQU MPU_RGDE13W1_ENDADDR19, 19 .EQU MPU_RGDE13W1_ENDADDR18, 18 .EQU MPU_RGDE13W1_ENDADDR17, 17 .EQU MPU_RGDE13W1_ENDADDR16, 16 .EQU MPU_RGDE13W1_ENDADDR15, 15 .EQU MPU_RGDE13W1_ENDADDR14, 14 .EQU MPU_RGDE13W1_ENDADDR13, 13 .EQU MPU_RGDE13W1_ENDADDR12, 12 .EQU MPU_RGDE13W1_ENDADDR11, 11 .EQU MPU_RGDE13W1_ENDADDR10, 10 .EQU MPU_RGDE13W1_ENDADDR9, 9 .EQU MPU_RGDE13W1_ENDADDR8, 8 .EQU MPU_RGDE13W1_ENDADDR7, 7 .EQU MPU_RGDE13W1_ENDADDR6, 6 .EQU MPU_RGDE13W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE13W2, 0x40005BD8 // 0x4000 5BD8 MPU_RGDE13W2 Bits------------------------------------- .EQU MPU_RGDE13W2_M2SMAC1, 16 .EQU MPU_RGDE13W2_M2SMAC0, 15 .EQU MPU_RGDE13W2_M2UMAC2, 14 .EQU MPU_RGDE13W2_M2UMAC1, 13 .EQU MPU_RGDE13W2_M2UMAC0, 12 .EQU MPU_RGDE13W2_M1PEN, 11 .EQU MPU_RGDE13W2_M1SMAC1, 10 .EQU MPU_RGDE13W2_M1SMAC0, 9 .EQU MPU_RGDE13W2_M1UMAC2, 8 .EQU MPU_RGDE13W2_M1UMAC1, 7 .EQU MPU_RGDE13W2_M1UMAC0, 6 .EQU MPU_RGDE13W2_M0PEN, 5 .EQU MPU_RGDE13W2_M0SMAC1, 4 .EQU MPU_RGDE13W2_M0SMAC0, 3 .EQU MPU_RGDE13W2_M0UMAC2, 2 .EQU MPU_RGDE13W2_M0UMAC1, 1 .EQU MPU_RGDE13W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE13W3, 0x40005BDC // 0x4000 5BDC MPU_RGDE13W3 Bits------------------------------------- .EQU MPU_RGDE13W3_PID7, 31 .EQU MPU_RGDE13W3_PID6, 30 .EQU MPU_RGDE13W3_PID5, 29 .EQU MPU_RGDE13W3_PID4, 28 .EQU MPU_RGDE13W3_PID3, 27 .EQU MPU_RGDE13W3_PID2, 26 .EQU MPU_RGDE13W3_PID1, 25 .EQU MPU_RGDE13W3_PID0, 24 .EQU MPU_RGDE13W3_PIDMSK7, 23 .EQU MPU_RGDE13W3_PIDMSK6, 22 .EQU MPU_RGDE13W3_PIDMSK5, 21 .EQU MPU_RGDE13W3_PIDMSK4, 20 .EQU MPU_RGDE13W3_PIDMSK3, 19 .EQU MPU_RGDE13W3_PIDMSK2, 18 .EQU MPU_RGDE13W3_PIDMSK1, 17 .EQU MPU_RGDE13W3_PIDMSK0, 16 .EQU MPU_RGDE13W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE14W0, 0x40005BE0 // 0x4000 5BE0 MPU_RGDE14W0 Bits------------------------------------- .EQU MPU_RGDE14W0_STRADDR31, 31 .EQU MPU_RGDE14W0_STRADDR30, 30 .EQU MPU_RGDE14W0_STRADDR29, 29 .EQU MPU_RGDE14W0_STRADDR28, 28 .EQU MPU_RGDE14W0_STRADDR27, 27 .EQU MPU_RGDE14W0_STRADDR26, 26 .EQU MPU_RGDE14W0_STRADDR25, 25 .EQU MPU_RGDE14W0_STRADDR24, 24 .EQU MPU_RGDE14W0_STRADDR23, 23 .EQU MPU_RGDE14W0_STRADDR22, 22 .EQU MPU_RGDE14W0_STRADDR21, 21 .EQU MPU_RGDE14W0_STRADDR20, 20 .EQU MPU_RGDE14W0_STRADDR19, 19 .EQU MPU_RGDE14W0_STRADDR18, 18 .EQU MPU_RGDE14W0_STRADDR17, 17 .EQU MPU_RGDE14W0_STRADDR16, 16 .EQU MPU_RGDE14W0_STRADDR15, 15 .EQU MPU_RGDE14W0_STRADDR14, 14 .EQU MPU_RGDE14W0_STRADDR13, 13 .EQU MPU_RGDE14W0_STRADDR12, 12 .EQU MPU_RGDE14W0_STRADDR11, 11 .EQU MPU_RGDE14W0_STRADDR10, 10 .EQU MPU_RGDE14W0_STRADDR9, 9 .EQU MPU_RGDE14W0_STRADDR8, 8 .EQU MPU_RGDE14W0_STRADDR7, 7 .EQU MPU_RGDE14W0_STRADDR6, 6 .EQU MPU_RGDE14W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE14W1, 0x40005BE4 // 0x4000 5BE4 MPU_RGDE14W1 Bits------------------------------------- .EQU MPU_RGDE14W1_ENDADDR31, 31 .EQU MPU_RGDE14W1_ENDADDR30, 30 .EQU MPU_RGDE14W1_ENDADDR29, 29 .EQU MPU_RGDE14W1_ENDADDR28, 28 .EQU MPU_RGDE14W1_ENDADDR27, 27 .EQU MPU_RGDE14W1_ENDADDR26, 26 .EQU MPU_RGDE14W1_ENDADDR25, 25 .EQU MPU_RGDE14W1_ENDADDR24, 24 .EQU MPU_RGDE14W1_ENDADDR23, 23 .EQU MPU_RGDE14W1_ENDADDR22, 22 .EQU MPU_RGDE14W1_ENDADDR21, 21 .EQU MPU_RGDE14W1_ENDADDR20, 20 .EQU MPU_RGDE14W1_ENDADDR19, 19 .EQU MPU_RGDE14W1_ENDADDR18, 18 .EQU MPU_RGDE14W1_ENDADDR17, 17 .EQU MPU_RGDE14W1_ENDADDR16, 16 .EQU MPU_RGDE14W1_ENDADDR15, 15 .EQU MPU_RGDE14W1_ENDADDR14, 14 .EQU MPU_RGDE14W1_ENDADDR13, 13 .EQU MPU_RGDE14W1_ENDADDR12, 12 .EQU MPU_RGDE14W1_ENDADDR11, 11 .EQU MPU_RGDE14W1_ENDADDR10, 10 .EQU MPU_RGDE14W1_ENDADDR9, 9 .EQU MPU_RGDE14W1_ENDADDR8, 8 .EQU MPU_RGDE14W1_ENDADDR7, 7 .EQU MPU_RGDE14W1_ENDADDR6, 6 .EQU MPU_RGDE14W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE14W2, 0x40005BE8 // 0x4000 5BE8 MPU_RGDE14W2 Bits------------------------------------- .EQU MPU_RGDE14W2_M2SMAC1, 16 .EQU MPU_RGDE14W2_M2SMAC0, 15 .EQU MPU_RGDE14W2_M2UMAC2, 14 .EQU MPU_RGDE14W2_M2UMAC1, 13 .EQU MPU_RGDE14W2_M2UMAC0, 12 .EQU MPU_RGDE14W2_M1PEN, 11 .EQU MPU_RGDE14W2_M1SMAC1, 10 .EQU MPU_RGDE14W2_M1SMAC0, 9 .EQU MPU_RGDE14W2_M1UMAC2, 8 .EQU MPU_RGDE14W2_M1UMAC1, 7 .EQU MPU_RGDE14W2_M1UMAC0, 6 .EQU MPU_RGDE14W2_M0PEN, 5 .EQU MPU_RGDE14W2_M0SMAC1, 4 .EQU MPU_RGDE14W2_M0SMAC0, 3 .EQU MPU_RGDE14W2_M0UMAC2, 2 .EQU MPU_RGDE14W2_M0UMAC1, 1 .EQU MPU_RGDE14W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE14W3, 0x40005BEC // 0x4000 5BEC MPU_RGDE14W3 Bits------------------------------------- .EQU MPU_RGDE14W3_PID7, 31 .EQU MPU_RGDE14W3_PID6, 30 .EQU MPU_RGDE14W3_PID5, 29 .EQU MPU_RGDE14W3_PID4, 28 .EQU MPU_RGDE14W3_PID3, 27 .EQU MPU_RGDE14W3_PID2, 26 .EQU MPU_RGDE14W3_PID1, 25 .EQU MPU_RGDE14W3_PID0, 24 .EQU MPU_RGDE14W3_PIDMSK7, 23 .EQU MPU_RGDE14W3_PIDMSK6, 22 .EQU MPU_RGDE14W3_PIDMSK5, 21 .EQU MPU_RGDE14W3_PIDMSK4, 20 .EQU MPU_RGDE14W3_PIDMSK3, 19 .EQU MPU_RGDE14W3_PIDMSK2, 18 .EQU MPU_RGDE14W3_PIDMSK1, 17 .EQU MPU_RGDE14W3_PIDMSK0, 16 .EQU MPU_RGDE14W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDE15W0, 0x40005BF0 // 0x4000 5BF0 MPU_RGDE15W0 Bits------------------------------------- .EQU MPU_RGDE15W0_STRADDR31, 31 .EQU MPU_RGDE15W0_STRADDR30, 30 .EQU MPU_RGDE15W0_STRADDR29, 29 .EQU MPU_RGDE15W0_STRADDR28, 28 .EQU MPU_RGDE15W0_STRADDR27, 27 .EQU MPU_RGDE15W0_STRADDR26, 26 .EQU MPU_RGDE15W0_STRADDR25, 25 .EQU MPU_RGDE15W0_STRADDR24, 24 .EQU MPU_RGDE15W0_STRADDR23, 23 .EQU MPU_RGDE15W0_STRADDR22, 22 .EQU MPU_RGDE15W0_STRADDR21, 21 .EQU MPU_RGDE15W0_STRADDR20, 20 .EQU MPU_RGDE15W0_STRADDR19, 19 .EQU MPU_RGDE15W0_STRADDR18, 18 .EQU MPU_RGDE15W0_STRADDR17, 17 .EQU MPU_RGDE15W0_STRADDR16, 16 .EQU MPU_RGDE15W0_STRADDR15, 15 .EQU MPU_RGDE15W0_STRADDR14, 14 .EQU MPU_RGDE15W0_STRADDR13, 13 .EQU MPU_RGDE15W0_STRADDR12, 12 .EQU MPU_RGDE15W0_STRADDR11, 11 .EQU MPU_RGDE15W0_STRADDR10, 10 .EQU MPU_RGDE15W0_STRADDR9, 9 .EQU MPU_RGDE15W0_STRADDR8, 8 .EQU MPU_RGDE15W0_STRADDR7, 7 .EQU MPU_RGDE15W0_STRADDR6, 6 .EQU MPU_RGDE15W0_STRADDR5, 5 // register------------------------------------- .EQU MPU_RGDE15W1, 0x40005BF4 // 0x4000 5BF4 MPU_RGDE15W1 Bits------------------------------------- .EQU MPU_RGDE15W1_ENDADDR31, 31 .EQU MPU_RGDE15W1_ENDADDR30, 30 .EQU MPU_RGDE15W1_ENDADDR29, 29 .EQU MPU_RGDE15W1_ENDADDR28, 28 .EQU MPU_RGDE15W1_ENDADDR27, 27 .EQU MPU_RGDE15W1_ENDADDR26, 26 .EQU MPU_RGDE15W1_ENDADDR25, 25 .EQU MPU_RGDE15W1_ENDADDR24, 24 .EQU MPU_RGDE15W1_ENDADDR23, 23 .EQU MPU_RGDE15W1_ENDADDR22, 22 .EQU MPU_RGDE15W1_ENDADDR21, 21 .EQU MPU_RGDE15W1_ENDADDR20, 20 .EQU MPU_RGDE15W1_ENDADDR19, 19 .EQU MPU_RGDE15W1_ENDADDR18, 18 .EQU MPU_RGDE15W1_ENDADDR17, 17 .EQU MPU_RGDE15W1_ENDADDR16, 16 .EQU MPU_RGDE15W1_ENDADDR15, 15 .EQU MPU_RGDE15W1_ENDADDR14, 14 .EQU MPU_RGDE15W1_ENDADDR13, 13 .EQU MPU_RGDE15W1_ENDADDR12, 12 .EQU MPU_RGDE15W1_ENDADDR11, 11 .EQU MPU_RGDE15W1_ENDADDR10, 10 .EQU MPU_RGDE15W1_ENDADDR9, 9 .EQU MPU_RGDE15W1_ENDADDR8, 8 .EQU MPU_RGDE15W1_ENDADDR7, 7 .EQU MPU_RGDE15W1_ENDADDR6, 6 .EQU MPU_RGDE15W1_ENDADDR5, 5 // register------------------------------------- .EQU MPU_RGDE15W2, 0x40005BF8 // 0x4000 5BF8 MPU_RGDE15W2 Bits------------------------------------- .EQU MPU_RGDE15W2_M2SMAC1, 16 .EQU MPU_RGDE15W2_M2SMAC0, 15 .EQU MPU_RGDE15W2_M2UMAC2, 14 .EQU MPU_RGDE15W2_M2UMAC1, 13 .EQU MPU_RGDE15W2_M2UMAC0, 12 .EQU MPU_RGDE15W2_M1PEN, 11 .EQU MPU_RGDE15W2_M1SMAC1, 10 .EQU MPU_RGDE15W2_M1SMAC0, 9 .EQU MPU_RGDE15W2_M1UMAC2, 8 .EQU MPU_RGDE15W2_M1UMAC1, 7 .EQU MPU_RGDE15W2_M1UMAC0, 6 .EQU MPU_RGDE15W2_M0PEN, 5 .EQU MPU_RGDE15W2_M0SMAC1, 4 .EQU MPU_RGDE15W2_M0SMAC0, 3 .EQU MPU_RGDE15W2_M0UMAC2, 2 .EQU MPU_RGDE15W2_M0UMAC1, 1 .EQU MPU_RGDE15W2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDE15W3, 0x40005BFC // 0x4000 5BFC MPU_RGDE15W3 Bits------------------------------------- .EQU MPU_RGDE15W3_PID7, 31 .EQU MPU_RGDE15W3_PID6, 30 .EQU MPU_RGDE15W3_PID5, 29 .EQU MPU_RGDE15W3_PID4, 28 .EQU MPU_RGDE15W3_PID3, 27 .EQU MPU_RGDE15W3_PID2, 26 .EQU MPU_RGDE15W3_PID1, 25 .EQU MPU_RGDE15W3_PID0, 24 .EQU MPU_RGDE15W3_PIDMSK7, 23 .EQU MPU_RGDE15W3_PIDMSK6, 22 .EQU MPU_RGDE15W3_PIDMSK5, 21 .EQU MPU_RGDE15W3_PIDMSK4, 20 .EQU MPU_RGDE15W3_PIDMSK3, 19 .EQU MPU_RGDE15W3_PIDMSK2, 18 .EQU MPU_RGDE15W3_PIDMSK1, 17 .EQU MPU_RGDE15W3_PIDMSK0, 16 .EQU MPU_RGDE15W3_RGDEVLD, 0 // register------------------------------------- .EQU MPU_RGDEACC0, 0x40005D00 // 0x4000 5D00 MPU_RGDEACC0 Bits------------------------------------- .EQU MPU_RGDEACC0_M2SMAC1, 16 .EQU MPU_RGDEACC0_M2SMAC0, 15 .EQU MPU_RGDEACC0_M2UMAC2, 14 .EQU MPU_RGDEACC0_M2UMAC1, 13 .EQU MPU_RGDEACC0_M2UMAC0, 12 .EQU MPU_RGDEACC0_M1PEN, 11 .EQU MPU_RGDEACC0_M1SMAC1, 10 .EQU MPU_RGDEACC0_M1SMAC0, 9 .EQU MPU_RGDEACC0_M1UMAC2, 8 .EQU MPU_RGDEACC0_M1UMAC1, 7 .EQU MPU_RGDEACC0_M1UMAC0, 6 .EQU MPU_RGDEACC0_M0PEN, 5 .EQU MPU_RGDEACC0_M0SMAC1, 4 .EQU MPU_RGDEACC0_M0SMAC0, 3 .EQU MPU_RGDEACC0_M0UMAC2, 2 .EQU MPU_RGDEACC0_M0UMAC1, 1 .EQU MPU_RGDEACC0_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC1, 0x40005D04 // 0x4000 5D04 MPU_RGDEACC1 Bits------------------------------------- .EQU MPU_RGDEACC1_M2SMAC1, 16 .EQU MPU_RGDEACC1_M2SMAC0, 15 .EQU MPU_RGDEACC1_M2UMAC2, 14 .EQU MPU_RGDEACC1_M2UMAC1, 13 .EQU MPU_RGDEACC1_M2UMAC0, 12 .EQU MPU_RGDEACC1_M1PEN, 11 .EQU MPU_RGDEACC1_M1SMAC1, 10 .EQU MPU_RGDEACC1_M1SMAC0, 9 .EQU MPU_RGDEACC1_M1UMAC2, 8 .EQU MPU_RGDEACC1_M1UMAC1, 7 .EQU MPU_RGDEACC1_M1UMAC0, 6 .EQU MPU_RGDEACC1_M0PEN, 5 .EQU MPU_RGDEACC1_M0SMAC1, 4 .EQU MPU_RGDEACC1_M0SMAC0, 3 .EQU MPU_RGDEACC1_M0UMAC2, 2 .EQU MPU_RGDEACC1_M0UMAC1, 1 .EQU MPU_RGDEACC1_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC2, 0x40005D08 // 0x4000 5D08 MPU_RGDEACC2 Bits------------------------------------- .EQU MPU_RGDEACC2_M2SMAC1, 16 .EQU MPU_RGDEACC2_M2SMAC0, 15 .EQU MPU_RGDEACC2_M2UMAC2, 14 .EQU MPU_RGDEACC2_M2UMAC1, 13 .EQU MPU_RGDEACC2_M2UMAC0, 12 .EQU MPU_RGDEACC2_M1PEN, 11 .EQU MPU_RGDEACC2_M1SMAC1, 10 .EQU MPU_RGDEACC2_M1SMAC0, 9 .EQU MPU_RGDEACC2_M1UMAC2, 8 .EQU MPU_RGDEACC2_M1UMAC1, 7 .EQU MPU_RGDEACC2_M1UMAC0, 6 .EQU MPU_RGDEACC2_M0PEN, 5 .EQU MPU_RGDEACC2_M0SMAC1, 4 .EQU MPU_RGDEACC2_M0SMAC0, 3 .EQU MPU_RGDEACC2_M0UMAC2, 2 .EQU MPU_RGDEACC2_M0UMAC1, 1 .EQU MPU_RGDEACC2_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC3, 0x40005D0C // 0x4000 5D0C MPU_RGDEACC3 Bits------------------------------------- .EQU MPU_RGDEACC3_M2SMAC1, 16 .EQU MPU_RGDEACC3_M2SMAC0, 15 .EQU MPU_RGDEACC3_M2UMAC2, 14 .EQU MPU_RGDEACC3_M2UMAC1, 13 .EQU MPU_RGDEACC3_M2UMAC0, 12 .EQU MPU_RGDEACC3_M1PEN, 11 .EQU MPU_RGDEACC3_M1SMAC1, 10 .EQU MPU_RGDEACC3_M1SMAC0, 9 .EQU MPU_RGDEACC3_M1UMAC2, 8 .EQU MPU_RGDEACC3_M1UMAC1, 7 .EQU MPU_RGDEACC3_M1UMAC0, 6 .EQU MPU_RGDEACC3_M0PEN, 5 .EQU MPU_RGDEACC3_M0SMAC1, 4 .EQU MPU_RGDEACC3_M0SMAC0, 3 .EQU MPU_RGDEACC3_M0UMAC2, 2 .EQU MPU_RGDEACC3_M0UMAC1, 1 .EQU MPU_RGDEACC3_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC4, 0x40005D10 // 0x4000 5D10 MPU_RGDEACC4 Bits------------------------------------- .EQU MPU_RGDEACC4_M2SMAC1, 16 .EQU MPU_RGDEACC4_M2SMAC0, 15 .EQU MPU_RGDEACC4_M2UMAC2, 14 .EQU MPU_RGDEACC4_M2UMAC1, 13 .EQU MPU_RGDEACC4_M2UMAC0, 12 .EQU MPU_RGDEACC4_M1PEN, 11 .EQU MPU_RGDEACC4_M1SMAC1, 10 .EQU MPU_RGDEACC4_M1SMAC0, 9 .EQU MPU_RGDEACC4_M1UMAC2, 8 .EQU MPU_RGDEACC4_M1UMAC1, 7 .EQU MPU_RGDEACC4_M1UMAC0, 6 .EQU MPU_RGDEACC4_M0PEN, 5 .EQU MPU_RGDEACC4_M0SMAC1, 4 .EQU MPU_RGDEACC4_M0SMAC0, 3 .EQU MPU_RGDEACC4_M0UMAC2, 2 .EQU MPU_RGDEACC4_M0UMAC1, 1 .EQU MPU_RGDEACC4_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC5, 0x40005D14 // 0x4000 5D14 MPU_RGDEACC5 Bits------------------------------------- .EQU MPU_RGDEACC5_M2SMAC1, 16 .EQU MPU_RGDEACC5_M2SMAC0, 15 .EQU MPU_RGDEACC5_M2UMAC2, 14 .EQU MPU_RGDEACC5_M2UMAC1, 13 .EQU MPU_RGDEACC5_M2UMAC0, 12 .EQU MPU_RGDEACC5_M1PEN, 11 .EQU MPU_RGDEACC5_M1SMAC1, 10 .EQU MPU_RGDEACC5_M1SMAC0, 9 .EQU MPU_RGDEACC5_M1UMAC2, 8 .EQU MPU_RGDEACC5_M1UMAC1, 7 .EQU MPU_RGDEACC5_M1UMAC0, 6 .EQU MPU_RGDEACC5_M0PEN, 5 .EQU MPU_RGDEACC5_M0SMAC1, 4 .EQU MPU_RGDEACC5_M0SMAC0, 3 .EQU MPU_RGDEACC5_M0UMAC2, 2 .EQU MPU_RGDEACC5_M0UMAC1, 1 .EQU MPU_RGDEACC5_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC6, 0x40005D18 // 0x4000 5D18 MPU_RGDEACC6 Bits------------------------------------- .EQU MPU_RGDEACC6_M2SMAC1, 16 .EQU MPU_RGDEACC6_M2SMAC0, 15 .EQU MPU_RGDEACC6_M2UMAC2, 14 .EQU MPU_RGDEACC6_M2UMAC1, 13 .EQU MPU_RGDEACC6_M2UMAC0, 12 .EQU MPU_RGDEACC6_M1PEN, 11 .EQU MPU_RGDEACC6_M1SMAC1, 10 .EQU MPU_RGDEACC6_M1SMAC0, 9 .EQU MPU_RGDEACC6_M1UMAC2, 8 .EQU MPU_RGDEACC6_M1UMAC1, 7 .EQU MPU_RGDEACC6_M1UMAC0, 6 .EQU MPU_RGDEACC6_M0PEN, 5 .EQU MPU_RGDEACC6_M0SMAC1, 4 .EQU MPU_RGDEACC6_M0SMAC0, 3 .EQU MPU_RGDEACC6_M0UMAC2, 2 .EQU MPU_RGDEACC6_M0UMAC1, 1 .EQU MPU_RGDEACC6_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC7, 0x40005D1C // 0x4000 5D1C MPU_RGDEACC7 Bits------------------------------------- .EQU MPU_RGDEACC7_M2SMAC1, 16 .EQU MPU_RGDEACC7_M2SMAC0, 15 .EQU MPU_RGDEACC7_M2UMAC2, 14 .EQU MPU_RGDEACC7_M2UMAC1, 13 .EQU MPU_RGDEACC7_M2UMAC0, 12 .EQU MPU_RGDEACC7_M1PEN, 11 .EQU MPU_RGDEACC7_M1SMAC1, 10 .EQU MPU_RGDEACC7_M1SMAC0, 9 .EQU MPU_RGDEACC7_M1UMAC2, 8 .EQU MPU_RGDEACC7_M1UMAC1, 7 .EQU MPU_RGDEACC7_M1UMAC0, 6 .EQU MPU_RGDEACC7_M0PEN, 5 .EQU MPU_RGDEACC7_M0SMAC1, 4 .EQU MPU_RGDEACC7_M0SMAC0, 3 .EQU MPU_RGDEACC7_M0UMAC2, 2 .EQU MPU_RGDEACC7_M0UMAC1, 1 .EQU MPU_RGDEACC7_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC8, 0x40005D20 // 0x4000 5D20 MPU_RGDEACC8 Bits------------------------------------- .EQU MPU_RGDEACC8_M2SMAC1, 16 .EQU MPU_RGDEACC8_M2SMAC0, 15 .EQU MPU_RGDEACC8_M2UMAC2, 14 .EQU MPU_RGDEACC8_M2UMAC1, 13 .EQU MPU_RGDEACC8_M2UMAC0, 12 .EQU MPU_RGDEACC8_M1PEN, 11 .EQU MPU_RGDEACC8_M1SMAC1, 10 .EQU MPU_RGDEACC8_M1SMAC0, 9 .EQU MPU_RGDEACC8_M1UMAC2, 8 .EQU MPU_RGDEACC8_M1UMAC1, 7 .EQU MPU_RGDEACC8_M1UMAC0, 6 .EQU MPU_RGDEACC8_M0PEN, 5 .EQU MPU_RGDEACC8_M0SMAC1, 4 .EQU MPU_RGDEACC8_M0SMAC0, 3 .EQU MPU_RGDEACC8_M0UMAC2, 2 .EQU MPU_RGDEACC8_M0UMAC1, 1 .EQU MPU_RGDEACC8_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC9, 0x40005D24 // 0x4000 5D24 MPU_RGDEACC9 Bits------------------------------------- .EQU MPU_RGDEACC9_M2SMAC1, 16 .EQU MPU_RGDEACC9_M2SMAC0, 15 .EQU MPU_RGDEACC9_M2UMAC2, 14 .EQU MPU_RGDEACC9_M2UMAC1, 13 .EQU MPU_RGDEACC9_M2UMAC0, 12 .EQU MPU_RGDEACC9_M1PEN, 11 .EQU MPU_RGDEACC9_M1SMAC1, 10 .EQU MPU_RGDEACC9_M1SMAC0, 9 .EQU MPU_RGDEACC9_M1UMAC2, 8 .EQU MPU_RGDEACC9_M1UMAC1, 7 .EQU MPU_RGDEACC9_M1UMAC0, 6 .EQU MPU_RGDEACC9_M0PEN, 5 .EQU MPU_RGDEACC9_M0SMAC1, 4 .EQU MPU_RGDEACC9_M0SMAC0, 3 .EQU MPU_RGDEACC9_M0UMAC2, 2 .EQU MPU_RGDEACC9_M0UMAC1, 1 .EQU MPU_RGDEACC9_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC10, 0x40005D28 // 0x4000 5D28 MPU_RGDEACC10 Bits------------------------------------- .EQU MPU_RGDEACC10_M2SMAC1, 16 .EQU MPU_RGDEACC10_M2SMAC0, 15 .EQU MPU_RGDEACC10_M2UMAC2, 14 .EQU MPU_RGDEACC10_M2UMAC1, 13 .EQU MPU_RGDEACC10_M2UMAC0, 12 .EQU MPU_RGDEACC10_M1PEN, 11 .EQU MPU_RGDEACC10_M1SMAC1, 10 .EQU MPU_RGDEACC10_M1SMAC0, 9 .EQU MPU_RGDEACC10_M1UMAC2, 8 .EQU MPU_RGDEACC10_M1UMAC1, 7 .EQU MPU_RGDEACC10_M1UMAC0, 6 .EQU MPU_RGDEACC10_M0PEN, 5 .EQU MPU_RGDEACC10_M0SMAC1, 4 .EQU MPU_RGDEACC10_M0SMAC0, 3 .EQU MPU_RGDEACC10_M0UMAC2, 2 .EQU MPU_RGDEACC10_M0UMAC1, 1 .EQU MPU_RGDEACC10_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC11, 0x40005D2C // 0x4000 5D2C MPU_RGDEACC11 Bits------------------------------------- .EQU MPU_RGDEACC11_M2SMAC1, 16 .EQU MPU_RGDEACC11_M2SMAC0, 15 .EQU MPU_RGDEACC11_M2UMAC2, 14 .EQU MPU_RGDEACC11_M2UMAC1, 13 .EQU MPU_RGDEACC11_M2UMAC0, 12 .EQU MPU_RGDEACC11_M1PEN, 11 .EQU MPU_RGDEACC11_M1SMAC1, 10 .EQU MPU_RGDEACC11_M1SMAC0, 9 .EQU MPU_RGDEACC11_M1UMAC2, 8 .EQU MPU_RGDEACC11_M1UMAC1, 7 .EQU MPU_RGDEACC11_M1UMAC0, 6 .EQU MPU_RGDEACC11_M0PEN, 5 .EQU MPU_RGDEACC11_M0SMAC1, 4 .EQU MPU_RGDEACC11_M0SMAC0, 3 .EQU MPU_RGDEACC11_M0UMAC2, 2 .EQU MPU_RGDEACC11_M0UMAC1, 1 .EQU MPU_RGDEACC11_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC12, 0x40005D30 // 0x4000 5D30 MPU_RGDEACC12 Bits------------------------------------- .EQU MPU_RGDEACC12_M2SMAC1, 16 .EQU MPU_RGDEACC12_M2SMAC0, 15 .EQU MPU_RGDEACC12_M2UMAC2, 14 .EQU MPU_RGDEACC12_M2UMAC1, 13 .EQU MPU_RGDEACC12_M2UMAC0, 12 .EQU MPU_RGDEACC12_M1PEN, 11 .EQU MPU_RGDEACC12_M1SMAC1, 10 .EQU MPU_RGDEACC12_M1SMAC0, 9 .EQU MPU_RGDEACC12_M1UMAC2, 8 .EQU MPU_RGDEACC12_M1UMAC1, 7 .EQU MPU_RGDEACC12_M1UMAC0, 6 .EQU MPU_RGDEACC12_M0PEN, 5 .EQU MPU_RGDEACC12_M0SMAC1, 4 .EQU MPU_RGDEACC12_M0SMAC0, 3 .EQU MPU_RGDEACC12_M0UMAC2, 2 .EQU MPU_RGDEACC12_M0UMAC1, 1 .EQU MPU_RGDEACC12_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC13, 0x40005D34 // 0x4000 5D34 MPU_RGDEACC13 Bits------------------------------------- .EQU MPU_RGDEACC13_M2SMAC1, 16 .EQU MPU_RGDEACC13_M2SMAC0, 15 .EQU MPU_RGDEACC13_M2UMAC2, 14 .EQU MPU_RGDEACC13_M2UMAC1, 13 .EQU MPU_RGDEACC13_M2UMAC0, 12 .EQU MPU_RGDEACC13_M1PEN, 11 .EQU MPU_RGDEACC13_M1SMAC1, 10 .EQU MPU_RGDEACC13_M1SMAC0, 9 .EQU MPU_RGDEACC13_M1UMAC2, 8 .EQU MPU_RGDEACC13_M1UMAC1, 7 .EQU MPU_RGDEACC13_M1UMAC0, 6 .EQU MPU_RGDEACC13_M0PEN, 5 .EQU MPU_RGDEACC13_M0SMAC1, 4 .EQU MPU_RGDEACC13_M0SMAC0, 3 .EQU MPU_RGDEACC13_M0UMAC2, 2 .EQU MPU_RGDEACC13_M0UMAC1, 1 .EQU MPU_RGDEACC13_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC14, 0x40005D38 // 0x4000 5D38 MPU_RGDEACC14 Bits------------------------------------- .EQU MPU_RGDEACC14_M2SMAC1, 16 .EQU MPU_RGDEACC14_M2SMAC0, 15 .EQU MPU_RGDEACC14_M2UMAC2, 14 .EQU MPU_RGDEACC14_M2UMAC1, 13 .EQU MPU_RGDEACC14_M2UMAC0, 12 .EQU MPU_RGDEACC14_M1PEN, 11 .EQU MPU_RGDEACC14_M1SMAC1, 10 .EQU MPU_RGDEACC14_M1SMAC0, 9 .EQU MPU_RGDEACC14_M1UMAC2, 8 .EQU MPU_RGDEACC14_M1UMAC1, 7 .EQU MPU_RGDEACC14_M1UMAC0, 6 .EQU MPU_RGDEACC14_M0PEN, 5 .EQU MPU_RGDEACC14_M0SMAC1, 4 .EQU MPU_RGDEACC14_M0SMAC0, 3 .EQU MPU_RGDEACC14_M0UMAC2, 2 .EQU MPU_RGDEACC14_M0UMAC1, 1 .EQU MPU_RGDEACC14_M0UMAC0, 0 // register------------------------------------- .EQU MPU_RGDEACC15, 0x40005D3C // 0x4000 5D3C MPU_RGDEACC15 Bits------------------------------------- .EQU MPU_RGDEACC15_M2SMAC1, 16 .EQU MPU_RGDEACC15_M2SMAC0, 15 .EQU MPU_RGDEACC15_M2UMAC2, 14 .EQU MPU_RGDEACC15_M2UMAC1, 13 .EQU MPU_RGDEACC15_M2UMAC0, 12 .EQU MPU_RGDEACC15_M1PEN, 11 .EQU MPU_RGDEACC15_M1SMAC1, 10 .EQU MPU_RGDEACC15_M1SMAC0, 9 .EQU MPU_RGDEACC15_M1UMAC2, 8 .EQU MPU_RGDEACC15_M1UMAC1, 7 .EQU MPU_RGDEACC15_M1UMAC0, 6 .EQU MPU_RGDEACC15_M0PEN, 5 .EQU MPU_RGDEACC15_M0SMAC1, 4 .EQU MPU_RGDEACC15_M0SMAC0, 3 .EQU MPU_RGDEACC15_M0UMAC2, 2 .EQU MPU_RGDEACC15_M0UMAC1, 1 .EQU MPU_RGDEACC15_M0UMAC0, 0 // register------------------------------------- .EQU ECC17_CTL, 0x40005E00 // 0x4000 5E00 ECC17_CTL Bits------------------------------------- .EQU ECC17_CTL_MEM2BITERRIC, 14 .EQU ECC17_CTL_MEM1BITERRIC, 13 .EQU ECC17_CTL_MEMERRIC, 12 .EQU ECC17_CTL_MEM2BITERRIE, 10 .EQU ECC17_CTL_MEM1BITERRIE, 9 .EQU ECC17_CTL_MEMERRIE, 8 .EQU ECC17_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC17_INT, 0x40005E04 // 0x4000 5E04 ECC17_INT Bits------------------------------------- .EQU ECC17_INT_MEM2BITERRIF, 2 .EQU ECC17_INT_MEM1BITERRIF, 1 .EQU ECC17_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC17_ERRADDR, 0x40005E08 // 0x4000 5E08 ECC17_ERRADDR Bits------------------------------------- .EQU ECC17_ERRADDR_ERRADDR31, 31 .EQU ECC17_ERRADDR_ERRADDR30, 30 .EQU ECC17_ERRADDR_ERRADDR29, 29 .EQU ECC17_ERRADDR_ERRADDR28, 28 .EQU ECC17_ERRADDR_ERRADDR27, 27 .EQU ECC17_ERRADDR_ERRADDR26, 26 .EQU ECC17_ERRADDR_ERRADDR25, 25 .EQU ECC17_ERRADDR_ERRADDR24, 24 .EQU ECC17_ERRADDR_ERRADDR23, 23 .EQU ECC17_ERRADDR_ERRADDR22, 22 .EQU ECC17_ERRADDR_ERRADDR21, 21 .EQU ECC17_ERRADDR_ERRADDR20, 20 .EQU ECC17_ERRADDR_ERRADDR19, 19 .EQU ECC17_ERRADDR_ERRADDR18, 18 .EQU ECC17_ERRADDR_ERRADDR17, 17 .EQU ECC17_ERRADDR_ERRADDR16, 16 .EQU ECC17_ERRADDR_ERRADDR15, 15 .EQU ECC17_ERRADDR_ERRADDR14, 14 .EQU ECC17_ERRADDR_ERRADDR13, 13 .EQU ECC17_ERRADDR_ERRADDR12, 12 .EQU ECC17_ERRADDR_ERRADDR11, 11 .EQU ECC17_ERRADDR_ERRADDR10, 10 .EQU ECC17_ERRADDR_ERRADDR9, 9 .EQU ECC17_ERRADDR_ERRADDR8, 8 .EQU ECC17_ERRADDR_ERRADDR7, 7 .EQU ECC17_ERRADDR_ERRADDR6, 6 .EQU ECC17_ERRADDR_ERRADDR5, 5 .EQU ECC17_ERRADDR_ERRADDR4, 4 .EQU ECC17_ERRADDR_ERRADDR3, 3 .EQU ECC17_ERRADDR_ERRADDR2, 2 .EQU ECC17_ERRADDR_ERRADDR1, 1 .EQU ECC17_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ECC16_CTL, 0x40005E80 // 0x4000 5E80 ECC16_CTL Bits------------------------------------- .EQU ECC16_CTL_MEM2BITERRIC, 14 .EQU ECC16_CTL_MEM1BITERRIC, 13 .EQU ECC16_CTL_MEMERRIC, 12 .EQU ECC16_CTL_MEM2BITERRIE, 10 .EQU ECC16_CTL_MEM1BITERRIE, 9 .EQU ECC16_CTL_MEMERRIE, 8 .EQU ECC16_CTL_ECCTESTEN, 0 // register------------------------------------- .EQU ECC16_INT, 0x40005E84 // 0x4000 5E84 ECC16_INT Bits------------------------------------- .EQU ECC16_INT_MEM2BITERRIF, 2 .EQU ECC16_INT_MEM1BITERRIF, 1 .EQU ECC16_INT_MEMERRIF, 0 // register------------------------------------- .EQU ECC16_ERRADDR, 0x40005E88 // 0x4000 5E88 ECC16_ERRADDR Bits------------------------------------- .EQU ECC16_ERRADDR_ERRADDR31, 31 .EQU ECC16_ERRADDR_ERRADDR30, 30 .EQU ECC16_ERRADDR_ERRADDR29, 29 .EQU ECC16_ERRADDR_ERRADDR28, 28 .EQU ECC16_ERRADDR_ERRADDR27, 27 .EQU ECC16_ERRADDR_ERRADDR26, 26 .EQU ECC16_ERRADDR_ERRADDR25, 25 .EQU ECC16_ERRADDR_ERRADDR24, 24 .EQU ECC16_ERRADDR_ERRADDR23, 23 .EQU ECC16_ERRADDR_ERRADDR22, 22 .EQU ECC16_ERRADDR_ERRADDR21, 21 .EQU ECC16_ERRADDR_ERRADDR20, 20 .EQU ECC16_ERRADDR_ERRADDR19, 19 .EQU ECC16_ERRADDR_ERRADDR18, 18 .EQU ECC16_ERRADDR_ERRADDR17, 17 .EQU ECC16_ERRADDR_ERRADDR16, 16 .EQU ECC16_ERRADDR_ERRADDR15, 15 .EQU ECC16_ERRADDR_ERRADDR14, 14 .EQU ECC16_ERRADDR_ERRADDR13, 13 .EQU ECC16_ERRADDR_ERRADDR12, 12 .EQU ECC16_ERRADDR_ERRADDR11, 11 .EQU ECC16_ERRADDR_ERRADDR10, 10 .EQU ECC16_ERRADDR_ERRADDR9, 9 .EQU ECC16_ERRADDR_ERRADDR8, 8 .EQU ECC16_ERRADDR_ERRADDR7, 7 .EQU ECC16_ERRADDR_ERRADDR6, 6 .EQU ECC16_ERRADDR_ERRADDR5, 5 .EQU ECC16_ERRADDR_ERRADDR4, 4 .EQU ECC16_ERRADDR_ERRADDR3, 3 .EQU ECC16_ERRADDR_ERRADDR2, 2 .EQU ECC16_ERRADDR_ERRADDR1, 1 .EQU ECC16_ERRADDR_ERRADDR0, 0 // register------------------------------------- .EQU ISMU_STA, 0x40005F00 // 0x4000 5F00 ISMU_STA Bits------------------------------------- .EQU ISMU_STA_DEBCHAFIN, 9 .EQU ISMU_STA_INITFIN, 8 .EQU ISMU_STA_IDB, 7 .EQU ISMU_STA_EDB, 6 .EQU ISMU_STA_RNGINIT, 5 .EQU ISMU_STA_BOK, 4 .EQU ISMU_STA_BFN, 3 .EQU ISMU_STA_BINIT, 2 .EQU ISMU_STA_BSTA, 1 .EQU ISMU_STA_BUSY, 0 // register------------------------------------- .EQU INT_CTL0, 0x40200000 // 0x4020 0000 INT_CTL0 Bits------------------------------------- .EQU INT_CTL0_INTCAT6, 30 .EQU INT_CTL0_INTCAT5, 29 .EQU INT_CTL0_INTCAT4, 28 .EQU INT_CTL0_INTCAT3, 27 .EQU INT_CTL0_INTCAT2, 26 .EQU INT_CTL0_INTCAT1, 25 .EQU INT_CTL0_INTCAT0, 24 .EQU INT_CTL0_INTPEND6, 22 .EQU INT_CTL0_INTPEND5, 21 .EQU INT_CTL0_INTPEND4, 20 .EQU INT_CTL0_INTPEND3, 19 .EQU INT_CTL0_INTPEND2, 18 .EQU INT_CTL0_INTPEND1, 17 .EQU INT_CTL0_INTPEND0, 16 .EQU INT_CTL0_PRIBASE3, 15 .EQU INT_CTL0_PRIBASE2, 14 .EQU INT_CTL0_PRIBASE1, 13 .EQU INT_CTL0_PRIBASE0, 12 .EQU INT_CTL0_DSALIGN, 7 .EQU INT_CTL0_FAULTMASK, 6 .EQU INT_CTL0_INTPREEMPT, 5 .EQU INT_CTL0_INTPENDING, 4 .EQU INT_CTL0_PRIGROUP1, 2 .EQU INT_CTL0_PRIGROUP0, 1 .EQU INT_CTL0_AIE, 0 // register------------------------------------- .EQU INT_EIE0, 0x40200004 // 0x4020 0004 INT_EIE0 Bits------------------------------------- .EQU INT_EIE0_SYSTICKIE, 15 .EQU INT_EIE0_SOFTSVIE, 14 .EQU INT_EIE0_SVCIE, 11 .EQU INT_EIE0_ARIFAULTIE, 6 .EQU INT_EIE0_STACKIE, 5 .EQU INT_EIE0_HADRFAULTIE, 3 // register------------------------------------- .EQU INT_EIE1, 0x4020000C // 0x4020 000C INT_EIE1 Bits------------------------------------- .EQU INT_EIE1_SPI1IE, 31 .EQU INT_EIE1_SPI0IE, 30 .EQU INT_EIE1_USART1IE, 29 .EQU INT_EIE1_USART0IE, 28 .EQU INT_EIE1_CMPIE, 27 .EQU INT_EIE1_DMA0IE, 26 .EQU INT_EIE1_T0IE, 25 .EQU INT_EIE1_T11IE, 24 .EQU INT_EIE1_CFGLIE, 23 .EQU INT_EIE1_ADC1IE, 22 .EQU INT_EIE1_ADC0IE, 21 .EQU INT_EIE1_EXMCIE, 20 .EQU INT_EIE1_FDC2IE, 19 .EQU INT_EIE1_T14IE, 17 .EQU INT_EIE1_CAN4IE, 16 .EQU INT_EIE1_ECFGLIE, 15 .EQU INT_EIE1_QEI1IE, 14 .EQU INT_EIE1_QEI0IE, 13 .EQU INT_EIE1_T6IE, 12 .EQU INT_EIE1_T5IE, 11 .EQU INT_EIE1_T3IE, 10 .EQU INT_EIE1_T1IE, 9 .EQU INT_EIE1_PXIE, 8 .EQU INT_EIE1_PFIE, 7 .EQU INT_EIE1_PEIE, 6 .EQU INT_EIE1_PDIE, 5 .EQU INT_EIE1_PCIE, 4 .EQU INT_EIE1_PBIE, 3 .EQU INT_EIE1_PAIE, 2 .EQU INT_EIE1_EINT16IE, 1 .EQU INT_EIE1_WWDTIE, 0 // register------------------------------------- .EQU INT_EIE2, 0x40200014 // 0x4020 0014 INT_EIE2 Bits------------------------------------- .EQU INT_EIE2_USART7IE, 31 .EQU INT_EIE2_HRCAP2IE, 30 .EQU INT_EIE2_USART5IE, 29 .EQU INT_EIE2_I2C3IE, 28 .EQU INT_EIE2_T21IE, 27 .EQU INT_EIE2_HRCAP1IE, 26 .EQU INT_EIE2_WKPIE, 25 .EQU INT_EIE2_HRCAP0IE, 24 .EQU INT_EIE2_T19IE, 23 .EQU INT_EIE2_T18IE, 22 .EQU INT_EIE2_ADC2IE, 21 .EQU INT_EIE2_SPI3IE, 20 .EQU INT_EIE2_SPI2IE, 19 .EQU INT_EIE2_USART4IE, 18 .EQU INT_EIE2_T16IE, 17 .EQU INT_EIE2_USART2IE, 16 .EQU INT_EIE2_T13IE, 15 .EQU INT_EIE2_T4IE, 14 .EQU INT_EIE2_T2IE, 13 .EQU INT_EIE2_T12IE, 12 .EQU INT_EIE2_I2C2IE, 11 .EQU INT_EIE2_I2C1IE, 10 .EQU INT_EIE2_I2C0IE, 9 .EQU INT_EIE2_OSCIE, 8 .EQU INT_EIE2_CMUIE, 7 .EQU INT_EIE2_EINT31TO20IE, 6 .EQU INT_EIE2_FDC1IE, 5 .EQU INT_EIE2_FDC0IE, 4 .EQU INT_EIE2_CANFD7IE, 3 .EQU INT_EIE2_CANFD6IE, 2 .EQU INT_EIE2_EINT19TO17IE, 1 .EQU INT_EIE2_DMA1IE, 0 // register------------------------------------- .EQU INT_EIE3, 0x40200018 // 0x4020 0018 INT_EIE3 Bits------------------------------------- .EQU INT_EIE3_MPUIE, 31 .EQU INT_EIE3_FLASHECCIE, 30 .EQU INT_EIE3_CACHEECCIE, 29 .EQU INT_EIE3_DRAMECCIE, 28 .EQU INT_EIE3_SRAMECCIE, 27 .EQU INT_EIE3_T23IE, 26 .EQU INT_EIE3_T22IE, 25 .EQU INT_EIE3_T20IE, 24 .EQU INT_EIE3_T26IE, 23 .EQU INT_EIE3_T25IE, 22 .EQU INT_EIE3_T10IE, 21 .EQU INT_EIE3_T9IE, 20 .EQU INT_EIE3_T36IE, 19 .EQU INT_EIE3_T33IE, 18 .EQU INT_EIE3_T32IE, 17 .EQU INT_EIE3_T31IE, 16 .EQU INT_EIE3_CANFD13IE, 15 .EQU INT_EIE3_CANFD12IE, 14 .EQU INT_EIE3_CANFD11IE, 13 .EQU INT_EIE3_CANFD10IE, 12 .EQU INT_EIE3_CANFD9IE, 11 .EQU INT_EIE3_CANFD8IE, 10 .EQU INT_EIE3_USART15IE, 9 .EQU INT_EIE3_USART14IE, 8 .EQU INT_EIE3_USART13IE, 7 .EQU INT_EIE3_USART12IE, 6 .EQU INT_EIE3_USART11IE, 5 .EQU INT_EIE3_USART10IE, 4 .EQU INT_EIE3_USART9IE, 3 .EQU INT_EIE3_USART8IE, 2 .EQU INT_EIE3_USART6IE, 1 .EQU INT_EIE3_USART3IE, 0 // register------------------------------------- .EQU INT_EIF0, 0x4020001C // 0x4020 001C INT_EIF0 Bits------------------------------------- .EQU INT_EIF0_SYSTICKIF, 15 .EQU INT_EIF0_SOFTSVIF, 14 .EQU INT_EIF0_SVCIF, 11 .EQU INT_EIF0_ARIFAULTIF, 6 .EQU INT_EIF0_STACKIF, 5 .EQU INT_EIF0_HADRFAULTIF, 3 .EQU INT_EIF0_NMIIF, 2 // register------------------------------------- .EQU INT_EIF1, 0x40200024 // 0x4020 0024 INT_EIF1 Bits------------------------------------- .EQU INT_EIF1_SPI1IF, 31 .EQU INT_EIF1_SPI0IF, 30 .EQU INT_EIF1_USART1IF, 29 .EQU INT_EIF1_USART0IF, 28 .EQU INT_EIF1_CMPIF, 27 .EQU INT_EIF1_DMA0IF, 26 .EQU INT_EIF1_T0IF, 25 .EQU INT_EIF1_T11IF, 24 .EQU INT_EIF1_CFGLIF, 23 .EQU INT_EIF1_ADC1IF, 22 .EQU INT_EIF1_ADC0IF, 21 .EQU INT_EIF1_EXMCIF, 20 .EQU INT_EIF1_FDC2IF, 19 .EQU INT_EIF1_T14IF, 17 .EQU INT_EIF1_CAN4IF, 16 .EQU INT_EIF1_ECFGLIF, 15 .EQU INT_EIF1_QEI1IF, 14 .EQU INT_EIF1_QEI0IF, 13 .EQU INT_EIF1_T6IF, 12 .EQU INT_EIF1_T5IF, 11 .EQU INT_EIF1_T3IF, 10 .EQU INT_EIF1_T1IF, 9 .EQU INT_EIF1_PXIF, 8 .EQU INT_EIF1_PFIF, 7 .EQU INT_EIF1_PEIF, 6 .EQU INT_EIF1_PDIF, 5 .EQU INT_EIF1_PCIF, 4 .EQU INT_EIF1_PBIF, 3 .EQU INT_EIF1_PAIF, 2 .EQU INT_EIF1_EINT16IF, 1 .EQU INT_EIF1_WWDTIF, 0 // register------------------------------------- .EQU INT_EIF2, 0x4020002C // 0x4020 002C INT_EIF2 Bits------------------------------------- .EQU INT_EIF2_USART7IF, 31 .EQU INT_EIF2_HRCAP2IF, 30 .EQU INT_EIF2_USART5IF, 29 .EQU INT_EIF2_I2C3IF, 28 .EQU INT_EIF2_T21IF, 27 .EQU INT_EIF2_HRCAP1IF, 26 .EQU INT_EIF2_WKPIF, 25 .EQU INT_EIF2_HRCAP0IF, 24 .EQU INT_EIF2_T19IF, 23 .EQU INT_EIF2_T18IF, 22 .EQU INT_EIF2_ADC2IF, 21 .EQU INT_EIF2_SPI3IF, 20 .EQU INT_EIF2_SPI2IF, 19 .EQU INT_EIF2_USART4IF, 18 .EQU INT_EIF2_T16IF, 17 .EQU INT_EIF2_USART2IF, 16 .EQU INT_EIF2_T13IF, 15 .EQU INT_EIF2_T4IF, 14 .EQU INT_EIF2_T2IF, 13 .EQU INT_EIF2_T12IF, 12 .EQU INT_EIF2_I2C2IF, 11 .EQU INT_EIF2_I2C1IF, 10 .EQU INT_EIF2_I2C0IF, 9 .EQU INT_EIF2_OSCIF, 8 .EQU INT_EIF2_CMUIF, 7 .EQU INT_EIF2_EINT31TO20IF, 6 .EQU INT_EIF2_FDC1IF, 5 .EQU INT_EIF2_FDC0IF, 4 .EQU INT_EIF2_CANFD7IF, 3 .EQU INT_EIF2_CANFD6IF, 2 .EQU INT_EIF2_EINT19TO17IF, 1 .EQU INT_EIF2_DMA1IF, 0 // register------------------------------------- .EQU INT_EIF3, 0x40200030 // 0x4020 0030 INT_EIF3 Bits------------------------------------- .EQU INT_EIF3_MPUIF, 31 .EQU INT_EIF3_FLASHECCIF, 30 .EQU INT_EIF3_CACHEECCIF, 29 .EQU INT_EIF3_DRAMECCIF, 28 .EQU INT_EIF3_SRAMECCIF, 27 .EQU INT_EIF3_T23IF, 26 .EQU INT_EIF3_T22IF, 25 .EQU INT_EIF3_T20IF, 24 .EQU INT_EIF3_T26IF, 23 .EQU INT_EIF3_T25IF, 22 .EQU INT_EIF3_T10IF, 21 .EQU INT_EIF3_T9IF, 20 .EQU INT_EIF3_T36IF, 19 .EQU INT_EIF3_T33IF, 18 .EQU INT_EIF3_T32IF, 17 .EQU INT_EIF3_T31IF, 16 .EQU INT_EIF3_CANFD13IF, 15 .EQU INT_EIF3_CANFD12IF, 14 .EQU INT_EIF3_CANFD11IF, 13 .EQU INT_EIF3_CANFD10IF, 12 .EQU INT_EIF3_CANFD9IF, 11 .EQU INT_EIF3_CANFD8IF, 10 .EQU INT_EIF3_USART15IF, 9 .EQU INT_EIF3_USART14IF, 8 .EQU INT_EIF3_USART13IF, 7 .EQU INT_EIF3_USART12IF, 6 .EQU INT_EIF3_USART11IF, 5 .EQU INT_EIF3_USART10IF, 4 .EQU INT_EIF3_USART9IF, 3 .EQU INT_EIF3_USART8IF, 2 .EQU INT_EIF3_USART6IF, 1 .EQU INT_EIF3_USART3IF, 0 // register------------------------------------- .EQU INT_IP0, 0x40200034 // 0x4020 0034 INT_IP0 Bits------------------------------------- .EQU INT_IP0_PRI7_7, 31 .EQU INT_IP0_PRI7_6, 30 .EQU INT_IP0_PRI7_5, 29 .EQU INT_IP0_PRI7_4, 28 .EQU INT_IP0_PRI7_3, 27 .EQU INT_IP0_PRI7_2, 26 .EQU INT_IP0_PRI7_1, 25 .EQU INT_IP0_PRI7_0, 24 .EQU INT_IP0_PRI6_7, 23 .EQU INT_IP0_PRI6_6, 22 .EQU INT_IP0_PRI6_5, 21 .EQU INT_IP0_PRI6_4, 20 .EQU INT_IP0_PRI6_3, 19 .EQU INT_IP0_PRI6_2, 18 .EQU INT_IP0_PRI6_1, 17 .EQU INT_IP0_PRI6_0, 16 .EQU INT_IP0_PRI5_7, 15 .EQU INT_IP0_PRI5_6, 14 .EQU INT_IP0_PRI5_5, 13 .EQU INT_IP0_PRI5_4, 12 .EQU INT_IP0_PRI5_3, 11 .EQU INT_IP0_PRI5_2, 10 .EQU INT_IP0_PRI5_1, 9 .EQU INT_IP0_PRI5_0, 8 .EQU INT_IP0_PRI4_7, 7 .EQU INT_IP0_PRI4_6, 6 .EQU INT_IP0_PRI4_5, 5 .EQU INT_IP0_PRI4_4, 4 .EQU INT_IP0_PRI4_3, 3 .EQU INT_IP0_PRI4_2, 2 .EQU INT_IP0_PRI4_1, 1 .EQU INT_IP0_PRI4_0, 0 // register------------------------------------- .EQU INT_IP1, 0x40200038 // 0x4020 0038 INT_IP1 Bits------------------------------------- .EQU INT_IP1_PRI11_7, 31 .EQU INT_IP1_PRI11_6, 30 .EQU INT_IP1_PRI11_5, 29 .EQU INT_IP1_PRI11_4, 28 .EQU INT_IP1_PRI11_3, 27 .EQU INT_IP1_PRI11_2, 26 .EQU INT_IP1_PRI11_1, 25 .EQU INT_IP1_PRI11_0, 24 .EQU INT_IP1_PRI10_7, 23 .EQU INT_IP1_PRI10_6, 22 .EQU INT_IP1_PRI10_5, 21 .EQU INT_IP1_PRI10_4, 20 .EQU INT_IP1_PRI10_3, 19 .EQU INT_IP1_PRI10_2, 18 .EQU INT_IP1_PRI10_1, 17 .EQU INT_IP1_PRI10_0, 16 .EQU INT_IP1_PRI9_7, 15 .EQU INT_IP1_PRI9_6, 14 .EQU INT_IP1_PRI9_5, 13 .EQU INT_IP1_PRI9_4, 12 .EQU INT_IP1_PRI9_3, 11 .EQU INT_IP1_PRI9_2, 10 .EQU INT_IP1_PRI9_1, 9 .EQU INT_IP1_PRI9_0, 8 .EQU INT_IP1_PRI8_7, 7 .EQU INT_IP1_PRI8_6, 6 .EQU INT_IP1_PRI8_5, 5 .EQU INT_IP1_PRI8_4, 4 .EQU INT_IP1_PRI8_3, 3 .EQU INT_IP1_PRI8_2, 2 .EQU INT_IP1_PRI8_1, 1 .EQU INT_IP1_PRI8_0, 0 // register------------------------------------- .EQU INT_IP2, 0x4020003C // 0x4020 003C INT_IP2 Bits------------------------------------- .EQU INT_IP2_PRI15_7, 31 .EQU INT_IP2_PRI15_6, 30 .EQU INT_IP2_PRI15_5, 29 .EQU INT_IP2_PRI15_4, 28 .EQU INT_IP2_PRI15_3, 27 .EQU INT_IP2_PRI15_2, 26 .EQU INT_IP2_PRI15_1, 25 .EQU INT_IP2_PRI15_0, 24 .EQU INT_IP2_PRI14_7, 23 .EQU INT_IP2_PRI14_6, 22 .EQU INT_IP2_PRI14_5, 21 .EQU INT_IP2_PRI14_4, 20 .EQU INT_IP2_PRI14_3, 19 .EQU INT_IP2_PRI14_2, 18 .EQU INT_IP2_PRI14_1, 17 .EQU INT_IP2_PRI14_0, 16 .EQU INT_IP2_PRI13_7, 15 .EQU INT_IP2_PRI13_6, 14 .EQU INT_IP2_PRI13_5, 13 .EQU INT_IP2_PRI13_4, 12 .EQU INT_IP2_PRI13_3, 11 .EQU INT_IP2_PRI13_2, 10 .EQU INT_IP2_PRI13_1, 9 .EQU INT_IP2_PRI13_0, 8 .EQU INT_IP2_PRI12_7, 7 .EQU INT_IP2_PRI12_6, 6 .EQU INT_IP2_PRI12_5, 5 .EQU INT_IP2_PRI12_4, 4 .EQU INT_IP2_PRI12_3, 3 .EQU INT_IP2_PRI12_2, 2 .EQU INT_IP2_PRI12_1, 1 .EQU INT_IP2_PRI12_0, 0 // register------------------------------------- .EQU INT_IP3, 0x40200040 // 0x4020 0040 INT_IP3 Bits------------------------------------- .EQU INT_IP3_PRI19_7, 31 .EQU INT_IP3_PRI19_6, 30 .EQU INT_IP3_PRI19_5, 29 .EQU INT_IP3_PRI19_4, 28 .EQU INT_IP3_PRI19_3, 27 .EQU INT_IP3_PRI19_2, 26 .EQU INT_IP3_PRI19_1, 25 .EQU INT_IP3_PRI19_0, 24 .EQU INT_IP3_PRI18_7, 23 .EQU INT_IP3_PRI18_6, 22 .EQU INT_IP3_PRI18_5, 21 .EQU INT_IP3_PRI18_4, 20 .EQU INT_IP3_PRI18_3, 19 .EQU INT_IP3_PRI18_2, 18 .EQU INT_IP3_PRI18_1, 17 .EQU INT_IP3_PRI18_0, 16 .EQU INT_IP3_PRI17_7, 15 .EQU INT_IP3_PRI17_6, 14 .EQU INT_IP3_PRI17_5, 13 .EQU INT_IP3_PRI17_4, 12 .EQU INT_IP3_PRI17_3, 11 .EQU INT_IP3_PRI17_2, 10 .EQU INT_IP3_PRI17_1, 9 .EQU INT_IP3_PRI17_0, 8 .EQU INT_IP3_PRI16_7, 7 .EQU INT_IP3_PRI16_6, 6 .EQU INT_IP3_PRI16_5, 5 .EQU INT_IP3_PRI16_4, 4 .EQU INT_IP3_PRI16_3, 3 .EQU INT_IP3_PRI16_2, 2 .EQU INT_IP3_PRI16_1, 1 .EQU INT_IP3_PRI16_0, 0 // register------------------------------------- .EQU INT_IP4, 0x40200044 // 0x4020 0044 INT_IP4 Bits------------------------------------- .EQU INT_IP4_PRI23_7, 31 .EQU INT_IP4_PRI23_6, 30 .EQU INT_IP4_PRI23_5, 29 .EQU INT_IP4_PRI23_4, 28 .EQU INT_IP4_PRI23_3, 27 .EQU INT_IP4_PRI23_2, 26 .EQU INT_IP4_PRI23_1, 25 .EQU INT_IP4_PRI23_0, 24 .EQU INT_IP4_PRI22_7, 23 .EQU INT_IP4_PRI22_6, 22 .EQU INT_IP4_PRI22_5, 21 .EQU INT_IP4_PRI22_4, 20 .EQU INT_IP4_PRI22_3, 19 .EQU INT_IP4_PRI22_2, 18 .EQU INT_IP4_PRI22_1, 17 .EQU INT_IP4_PRI22_0, 16 .EQU INT_IP4_PRI21_7, 15 .EQU INT_IP4_PRI21_6, 14 .EQU INT_IP4_PRI21_5, 13 .EQU INT_IP4_PRI21_4, 12 .EQU INT_IP4_PRI21_3, 11 .EQU INT_IP4_PRI21_2, 10 .EQU INT_IP4_PRI21_1, 9 .EQU INT_IP4_PRI21_0, 8 .EQU INT_IP4_PRI20_7, 7 .EQU INT_IP4_PRI20_6, 6 .EQU INT_IP4_PRI20_5, 5 .EQU INT_IP4_PRI20_4, 4 .EQU INT_IP4_PRI20_3, 3 .EQU INT_IP4_PRI20_2, 2 .EQU INT_IP4_PRI20_1, 1 .EQU INT_IP4_PRI20_0, 0 // register------------------------------------- .EQU INT_IP5, 0x40200048 // 0x4020 0048 INT_IP5 Bits------------------------------------- .EQU INT_IP5_PRI27_7, 31 .EQU INT_IP5_PRI27_6, 30 .EQU INT_IP5_PRI27_5, 29 .EQU INT_IP5_PRI27_4, 28 .EQU INT_IP5_PRI27_3, 27 .EQU INT_IP5_PRI27_2, 26 .EQU INT_IP5_PRI27_1, 25 .EQU INT_IP5_PRI27_0, 24 .EQU INT_IP5_PRI26_7, 23 .EQU INT_IP5_PRI26_6, 22 .EQU INT_IP5_PRI26_5, 21 .EQU INT_IP5_PRI26_4, 20 .EQU INT_IP5_PRI26_3, 19 .EQU INT_IP5_PRI26_2, 18 .EQU INT_IP5_PRI26_1, 17 .EQU INT_IP5_PRI26_0, 16 .EQU INT_IP5_PRI25_7, 15 .EQU INT_IP5_PRI25_6, 14 .EQU INT_IP5_PRI25_5, 13 .EQU INT_IP5_PRI25_4, 12 .EQU INT_IP5_PRI25_3, 11 .EQU INT_IP5_PRI25_2, 10 .EQU INT_IP5_PRI25_1, 9 .EQU INT_IP5_PRI25_0, 8 .EQU INT_IP5_PRI24_7, 7 .EQU INT_IP5_PRI24_6, 6 .EQU INT_IP5_PRI24_5, 5 .EQU INT_IP5_PRI24_4, 4 .EQU INT_IP5_PRI24_3, 3 .EQU INT_IP5_PRI24_2, 2 .EQU INT_IP5_PRI24_1, 1 .EQU INT_IP5_PRI24_0, 0 // register------------------------------------- .EQU INT_IP6, 0x4020004C // 0x4020 004C INT_IP6 Bits------------------------------------- .EQU INT_IP6_PRI31_7, 31 .EQU INT_IP6_PRI31_6, 30 .EQU INT_IP6_PRI31_5, 29 .EQU INT_IP6_PRI31_4, 28 .EQU INT_IP6_PRI31_3, 27 .EQU INT_IP6_PRI31_2, 26 .EQU INT_IP6_PRI31_1, 25 .EQU INT_IP6_PRI31_0, 24 .EQU INT_IP6_PRI30_7, 23 .EQU INT_IP6_PRI30_6, 22 .EQU INT_IP6_PRI30_5, 21 .EQU INT_IP6_PRI30_4, 20 .EQU INT_IP6_PRI30_3, 19 .EQU INT_IP6_PRI30_2, 18 .EQU INT_IP6_PRI30_1, 17 .EQU INT_IP6_PRI30_0, 16 .EQU INT_IP6_PRI29_7, 15 .EQU INT_IP6_PRI29_6, 14 .EQU INT_IP6_PRI29_5, 13 .EQU INT_IP6_PRI29_4, 12 .EQU INT_IP6_PRI29_3, 11 .EQU INT_IP6_PRI29_2, 10 .EQU INT_IP6_PRI29_1, 9 .EQU INT_IP6_PRI29_0, 8 .EQU INT_IP6_PRI28_7, 7 .EQU INT_IP6_PRI28_6, 6 .EQU INT_IP6_PRI28_5, 5 .EQU INT_IP6_PRI28_4, 4 .EQU INT_IP6_PRI28_3, 3 .EQU INT_IP6_PRI28_2, 2 .EQU INT_IP6_PRI28_1, 1 .EQU INT_IP6_PRI28_0, 0 // register------------------------------------- .EQU INT_IP7, 0x40200050 // 0x4020 0050 INT_IP7 Bits------------------------------------- .EQU INT_IP7_PRI35_7, 31 .EQU INT_IP7_PRI35_6, 30 .EQU INT_IP7_PRI35_5, 29 .EQU INT_IP7_PRI35_4, 28 .EQU INT_IP7_PRI35_3, 27 .EQU INT_IP7_PRI35_2, 26 .EQU INT_IP7_PRI35_1, 25 .EQU INT_IP7_PRI35_0, 24 .EQU INT_IP7_PRI34_7, 23 .EQU INT_IP7_PRI34_6, 22 .EQU INT_IP7_PRI34_5, 21 .EQU INT_IP7_PRI34_4, 20 .EQU INT_IP7_PRI34_3, 19 .EQU INT_IP7_PRI34_2, 18 .EQU INT_IP7_PRI34_1, 17 .EQU INT_IP7_PRI34_0, 16 .EQU INT_IP7_PRI33_7, 15 .EQU INT_IP7_PRI33_6, 14 .EQU INT_IP7_PRI33_5, 13 .EQU INT_IP7_PRI33_4, 12 .EQU INT_IP7_PRI33_3, 11 .EQU INT_IP7_PRI33_2, 10 .EQU INT_IP7_PRI33_1, 9 .EQU INT_IP7_PRI33_0, 8 .EQU INT_IP7_PRI32_7, 7 .EQU INT_IP7_PRI32_6, 6 .EQU INT_IP7_PRI32_5, 5 .EQU INT_IP7_PRI32_4, 4 .EQU INT_IP7_PRI32_3, 3 .EQU INT_IP7_PRI32_2, 2 .EQU INT_IP7_PRI32_1, 1 .EQU INT_IP7_PRI32_0, 0 // register------------------------------------- .EQU INT_IP8, 0x40200054 // 0x4020 0054 INT_IP8 Bits------------------------------------- .EQU INT_IP8_PRI39_7, 31 .EQU INT_IP8_PRI39_6, 30 .EQU INT_IP8_PRI39_5, 29 .EQU INT_IP8_PRI39_4, 28 .EQU INT_IP8_PRI39_3, 27 .EQU INT_IP8_PRI39_2, 26 .EQU INT_IP8_PRI39_1, 25 .EQU INT_IP8_PRI39_0, 24 .EQU INT_IP8_PRI38_7, 23 .EQU INT_IP8_PRI38_6, 22 .EQU INT_IP8_PRI38_5, 21 .EQU INT_IP8_PRI38_4, 20 .EQU INT_IP8_PRI38_3, 19 .EQU INT_IP8_PRI38_2, 18 .EQU INT_IP8_PRI38_1, 17 .EQU INT_IP8_PRI38_0, 16 .EQU INT_IP8_PRI37_7, 15 .EQU INT_IP8_PRI37_6, 14 .EQU INT_IP8_PRI37_5, 13 .EQU INT_IP8_PRI37_4, 12 .EQU INT_IP8_PRI37_3, 11 .EQU INT_IP8_PRI37_2, 10 .EQU INT_IP8_PRI37_1, 9 .EQU INT_IP8_PRI37_0, 8 .EQU INT_IP8_PRI36_7, 7 .EQU INT_IP8_PRI36_6, 6 .EQU INT_IP8_PRI36_5, 5 .EQU INT_IP8_PRI36_4, 4 .EQU INT_IP8_PRI36_3, 3 .EQU INT_IP8_PRI36_2, 2 .EQU INT_IP8_PRI36_1, 1 .EQU INT_IP8_PRI36_0, 0 // register------------------------------------- .EQU INT_IP9, 0x40200058 // 0x4020 0058 INT_IP9 Bits------------------------------------- .EQU INT_IP9_PRI43_7, 31 .EQU INT_IP9_PRI43_6, 30 .EQU INT_IP9_PRI43_5, 29 .EQU INT_IP9_PRI43_4, 28 .EQU INT_IP9_PRI43_3, 27 .EQU INT_IP9_PRI43_2, 26 .EQU INT_IP9_PRI43_1, 25 .EQU INT_IP9_PRI43_0, 24 .EQU INT_IP9_PRI42_7, 23 .EQU INT_IP9_PRI42_6, 22 .EQU INT_IP9_PRI42_5, 21 .EQU INT_IP9_PRI42_4, 20 .EQU INT_IP9_PRI42_3, 19 .EQU INT_IP9_PRI42_2, 18 .EQU INT_IP9_PRI42_1, 17 .EQU INT_IP9_PRI42_0, 16 .EQU INT_IP9_PRI41_7, 15 .EQU INT_IP9_PRI41_6, 14 .EQU INT_IP9_PRI41_5, 13 .EQU INT_IP9_PRI41_4, 12 .EQU INT_IP9_PRI41_3, 11 .EQU INT_IP9_PRI41_2, 10 .EQU INT_IP9_PRI41_1, 9 .EQU INT_IP9_PRI41_0, 8 .EQU INT_IP9_PRI40_7, 7 .EQU INT_IP9_PRI40_6, 6 .EQU INT_IP9_PRI40_5, 5 .EQU INT_IP9_PRI40_4, 4 .EQU INT_IP9_PRI40_3, 3 .EQU INT_IP9_PRI40_2, 2 .EQU INT_IP9_PRI40_1, 1 .EQU INT_IP9_PRI40_0, 0 // register------------------------------------- .EQU INT_IP10, 0x4020005C // 0x4020 005C INT_IP10 Bits------------------------------------- .EQU INT_IP10_PRI47_7, 31 .EQU INT_IP10_PRI47_6, 30 .EQU INT_IP10_PRI47_5, 29 .EQU INT_IP10_PRI47_4, 28 .EQU INT_IP10_PRI47_3, 27 .EQU INT_IP10_PRI47_2, 26 .EQU INT_IP10_PRI47_1, 25 .EQU INT_IP10_PRI47_0, 24 .EQU INT_IP10_PRI46_7, 23 .EQU INT_IP10_PRI46_6, 22 .EQU INT_IP10_PRI46_5, 21 .EQU INT_IP10_PRI46_4, 20 .EQU INT_IP10_PRI46_3, 19 .EQU INT_IP10_PRI46_2, 18 .EQU INT_IP10_PRI46_1, 17 .EQU INT_IP10_PRI46_0, 16 .EQU INT_IP10_PRI45_7, 15 .EQU INT_IP10_PRI45_6, 14 .EQU INT_IP10_PRI45_5, 13 .EQU INT_IP10_PRI45_4, 12 .EQU INT_IP10_PRI45_3, 11 .EQU INT_IP10_PRI45_2, 10 .EQU INT_IP10_PRI45_1, 9 .EQU INT_IP10_PRI45_0, 8 .EQU INT_IP10_PRI44_7, 7 .EQU INT_IP10_PRI44_6, 6 .EQU INT_IP10_PRI44_5, 5 .EQU INT_IP10_PRI44_4, 4 .EQU INT_IP10_PRI44_3, 3 .EQU INT_IP10_PRI44_2, 2 .EQU INT_IP10_PRI44_1, 1 .EQU INT_IP10_PRI44_0, 0 // register------------------------------------- .EQU INT_IP11, 0x40200060 // 0x4020 0060 INT_IP11 Bits------------------------------------- .EQU INT_IP11_PRI51_7, 31 .EQU INT_IP11_PRI51_6, 30 .EQU INT_IP11_PRI51_5, 29 .EQU INT_IP11_PRI51_4, 28 .EQU INT_IP11_PRI51_3, 27 .EQU INT_IP11_PRI51_2, 26 .EQU INT_IP11_PRI51_1, 25 .EQU INT_IP11_PRI51_0, 24 .EQU INT_IP11_PRI50_7, 23 .EQU INT_IP11_PRI50_6, 22 .EQU INT_IP11_PRI50_5, 21 .EQU INT_IP11_PRI50_4, 20 .EQU INT_IP11_PRI50_3, 19 .EQU INT_IP11_PRI50_2, 18 .EQU INT_IP11_PRI50_1, 17 .EQU INT_IP11_PRI50_0, 16 .EQU INT_IP11_PRI49_7, 15 .EQU INT_IP11_PRI49_6, 14 .EQU INT_IP11_PRI49_5, 13 .EQU INT_IP11_PRI49_4, 12 .EQU INT_IP11_PRI49_3, 11 .EQU INT_IP11_PRI49_2, 10 .EQU INT_IP11_PRI49_1, 9 .EQU INT_IP11_PRI49_0, 8 .EQU INT_IP11_PRI48_7, 7 .EQU INT_IP11_PRI48_6, 6 .EQU INT_IP11_PRI48_5, 5 .EQU INT_IP11_PRI48_4, 4 .EQU INT_IP11_PRI48_3, 3 .EQU INT_IP11_PRI48_2, 2 .EQU INT_IP11_PRI48_1, 1 .EQU INT_IP11_PRI48_0, 0 // register------------------------------------- .EQU INT_IP12, 0x40200064 // 0x4020 0064 INT_IP12 Bits------------------------------------- .EQU INT_IP12_PRI55_7, 31 .EQU INT_IP12_PRI55_6, 30 .EQU INT_IP12_PRI55_5, 29 .EQU INT_IP12_PRI55_4, 28 .EQU INT_IP12_PRI55_3, 27 .EQU INT_IP12_PRI55_2, 26 .EQU INT_IP12_PRI55_1, 25 .EQU INT_IP12_PRI55_0, 24 .EQU INT_IP12_PRI54_7, 23 .EQU INT_IP12_PRI54_6, 22 .EQU INT_IP12_PRI54_5, 21 .EQU INT_IP12_PRI54_4, 20 .EQU INT_IP12_PRI54_3, 19 .EQU INT_IP12_PRI54_2, 18 .EQU INT_IP12_PRI54_1, 17 .EQU INT_IP12_PRI54_0, 16 .EQU INT_IP12_PRI53_7, 15 .EQU INT_IP12_PRI53_6, 14 .EQU INT_IP12_PRI53_5, 13 .EQU INT_IP12_PRI53_4, 12 .EQU INT_IP12_PRI53_3, 11 .EQU INT_IP12_PRI53_2, 10 .EQU INT_IP12_PRI53_1, 9 .EQU INT_IP12_PRI53_0, 8 .EQU INT_IP12_PRI52_7, 7 .EQU INT_IP12_PRI52_6, 6 .EQU INT_IP12_PRI52_5, 5 .EQU INT_IP12_PRI52_4, 4 .EQU INT_IP12_PRI52_3, 3 .EQU INT_IP12_PRI52_2, 2 .EQU INT_IP12_PRI52_1, 1 .EQU INT_IP12_PRI52_0, 0 // register------------------------------------- .EQU INT_IP13, 0x40200068 // 0x4020 0068 INT_IP13 Bits------------------------------------- .EQU INT_IP13_PRI59_7, 31 .EQU INT_IP13_PRI59_6, 30 .EQU INT_IP13_PRI59_5, 29 .EQU INT_IP13_PRI59_4, 28 .EQU INT_IP13_PRI59_3, 27 .EQU INT_IP13_PRI59_2, 26 .EQU INT_IP13_PRI59_1, 25 .EQU INT_IP13_PRI59_0, 24 .EQU INT_IP13_PRI58_7, 23 .EQU INT_IP13_PRI58_6, 22 .EQU INT_IP13_PRI58_5, 21 .EQU INT_IP13_PRI58_4, 20 .EQU INT_IP13_PRI58_3, 19 .EQU INT_IP13_PRI58_2, 18 .EQU INT_IP13_PRI58_1, 17 .EQU INT_IP13_PRI58_0, 16 .EQU INT_IP13_PRI57_7, 15 .EQU INT_IP13_PRI57_6, 14 .EQU INT_IP13_PRI57_5, 13 .EQU INT_IP13_PRI57_4, 12 .EQU INT_IP13_PRI57_3, 11 .EQU INT_IP13_PRI57_2, 10 .EQU INT_IP13_PRI57_1, 9 .EQU INT_IP13_PRI57_0, 8 .EQU INT_IP13_PRI56_7, 7 .EQU INT_IP13_PRI56_6, 6 .EQU INT_IP13_PRI56_5, 5 .EQU INT_IP13_PRI56_4, 4 .EQU INT_IP13_PRI56_3, 3 .EQU INT_IP13_PRI56_2, 2 .EQU INT_IP13_PRI56_1, 1 .EQU INT_IP13_PRI56_0, 0 // register------------------------------------- .EQU INT_IP14, 0x4020006C // 0x4020 006C INT_IP14 Bits------------------------------------- .EQU INT_IP14_PRI63_7, 31 .EQU INT_IP14_PRI63_6, 30 .EQU INT_IP14_PRI63_5, 29 .EQU INT_IP14_PRI63_4, 28 .EQU INT_IP14_PRI63_3, 27 .EQU INT_IP14_PRI63_2, 26 .EQU INT_IP14_PRI63_1, 25 .EQU INT_IP14_PRI63_0, 24 .EQU INT_IP14_PRI62_7, 23 .EQU INT_IP14_PRI62_6, 22 .EQU INT_IP14_PRI62_5, 21 .EQU INT_IP14_PRI62_4, 20 .EQU INT_IP14_PRI62_3, 19 .EQU INT_IP14_PRI62_2, 18 .EQU INT_IP14_PRI62_1, 17 .EQU INT_IP14_PRI62_0, 16 .EQU INT_IP14_PRI61_7, 15 .EQU INT_IP14_PRI61_6, 14 .EQU INT_IP14_PRI61_5, 13 .EQU INT_IP14_PRI61_4, 12 .EQU INT_IP14_PRI61_3, 11 .EQU INT_IP14_PRI61_2, 10 .EQU INT_IP14_PRI61_1, 9 .EQU INT_IP14_PRI61_0, 8 .EQU INT_IP14_PRI60_7, 7 .EQU INT_IP14_PRI60_6, 6 .EQU INT_IP14_PRI60_5, 5 .EQU INT_IP14_PRI60_4, 4 .EQU INT_IP14_PRI60_3, 3 .EQU INT_IP14_PRI60_2, 2 .EQU INT_IP14_PRI60_1, 1 .EQU INT_IP14_PRI60_0, 0 // register------------------------------------- .EQU INT_IP15, 0x40200070 // 0x4020 0070 INT_IP15 Bits------------------------------------- .EQU INT_IP15_PRI67_7, 31 .EQU INT_IP15_PRI67_6, 30 .EQU INT_IP15_PRI67_5, 29 .EQU INT_IP15_PRI67_4, 28 .EQU INT_IP15_PRI67_3, 27 .EQU INT_IP15_PRI67_2, 26 .EQU INT_IP15_PRI67_1, 25 .EQU INT_IP15_PRI67_0, 24 .EQU INT_IP15_PRI66_7, 23 .EQU INT_IP15_PRI66_6, 22 .EQU INT_IP15_PRI66_5, 21 .EQU INT_IP15_PRI66_4, 20 .EQU INT_IP15_PRI66_3, 19 .EQU INT_IP15_PRI66_2, 18 .EQU INT_IP15_PRI66_1, 17 .EQU INT_IP15_PRI66_0, 16 .EQU INT_IP15_PRI65_7, 15 .EQU INT_IP15_PRI65_6, 14 .EQU INT_IP15_PRI65_5, 13 .EQU INT_IP15_PRI65_4, 12 .EQU INT_IP15_PRI65_3, 11 .EQU INT_IP15_PRI65_2, 10 .EQU INT_IP15_PRI65_1, 9 .EQU INT_IP15_PRI65_0, 8 .EQU INT_IP15_PRI64_7, 7 .EQU INT_IP15_PRI64_6, 6 .EQU INT_IP15_PRI64_5, 5 .EQU INT_IP15_PRI64_4, 4 .EQU INT_IP15_PRI64_3, 3 .EQU INT_IP15_PRI64_2, 2 .EQU INT_IP15_PRI64_1, 1 .EQU INT_IP15_PRI64_0, 0 // register------------------------------------- .EQU INT_IP16, 0x40200074 // 0x4020 0074 INT_IP16 Bits------------------------------------- .EQU INT_IP16_PRI71_7, 31 .EQU INT_IP16_PRI71_6, 30 .EQU INT_IP16_PRI71_5, 29 .EQU INT_IP16_PRI71_4, 28 .EQU INT_IP16_PRI71_3, 27 .EQU INT_IP16_PRI71_2, 26 .EQU INT_IP16_PRI71_1, 25 .EQU INT_IP16_PRI71_0, 24 .EQU INT_IP16_PRI70_7, 23 .EQU INT_IP16_PRI70_6, 22 .EQU INT_IP16_PRI70_5, 21 .EQU INT_IP16_PRI70_4, 20 .EQU INT_IP16_PRI70_3, 19 .EQU INT_IP16_PRI70_2, 18 .EQU INT_IP16_PRI70_1, 17 .EQU INT_IP16_PRI70_0, 16 .EQU INT_IP16_PRI69_7, 15 .EQU INT_IP16_PRI69_6, 14 .EQU INT_IP16_PRI69_5, 13 .EQU INT_IP16_PRI69_4, 12 .EQU INT_IP16_PRI69_3, 11 .EQU INT_IP16_PRI69_2, 10 .EQU INT_IP16_PRI69_1, 9 .EQU INT_IP16_PRI69_0, 8 .EQU INT_IP16_PRI68_7, 7 .EQU INT_IP16_PRI68_6, 6 .EQU INT_IP16_PRI68_5, 5 .EQU INT_IP16_PRI68_4, 4 .EQU INT_IP16_PRI68_3, 3 .EQU INT_IP16_PRI68_2, 2 .EQU INT_IP16_PRI68_1, 1 .EQU INT_IP16_PRI68_0, 0 // register------------------------------------- .EQU INT_IP17, 0x40200078 // 0x4020 0078 INT_IP17 Bits------------------------------------- .EQU INT_IP17_PRI75_7, 31 .EQU INT_IP17_PRI75_6, 30 .EQU INT_IP17_PRI75_5, 29 .EQU INT_IP17_PRI75_4, 28 .EQU INT_IP17_PRI75_3, 27 .EQU INT_IP17_PRI75_2, 26 .EQU INT_IP17_PRI75_1, 25 .EQU INT_IP17_PRI75_0, 24 .EQU INT_IP17_PRI74_7, 23 .EQU INT_IP17_PRI74_6, 22 .EQU INT_IP17_PRI74_5, 21 .EQU INT_IP17_PRI74_4, 20 .EQU INT_IP17_PRI74_3, 19 .EQU INT_IP17_PRI74_2, 18 .EQU INT_IP17_PRI74_1, 17 .EQU INT_IP17_PRI74_0, 16 .EQU INT_IP17_PRI73_7, 15 .EQU INT_IP17_PRI73_6, 14 .EQU INT_IP17_PRI73_5, 13 .EQU INT_IP17_PRI73_4, 12 .EQU INT_IP17_PRI73_3, 11 .EQU INT_IP17_PRI73_2, 10 .EQU INT_IP17_PRI73_1, 9 .EQU INT_IP17_PRI73_0, 8 .EQU INT_IP17_PRI72_7, 7 .EQU INT_IP17_PRI72_6, 6 .EQU INT_IP17_PRI72_5, 5 .EQU INT_IP17_PRI72_4, 4 .EQU INT_IP17_PRI72_3, 3 .EQU INT_IP17_PRI72_2, 2 .EQU INT_IP17_PRI72_1, 1 .EQU INT_IP17_PRI72_0, 0 // register------------------------------------- .EQU INT_IP18, 0x4020007C // 0x4020 007C INT_IP18 Bits------------------------------------- .EQU INT_IP18_PRI79_7, 31 .EQU INT_IP18_PRI79_6, 30 .EQU INT_IP18_PRI79_5, 29 .EQU INT_IP18_PRI79_4, 28 .EQU INT_IP18_PRI79_3, 27 .EQU INT_IP18_PRI79_2, 26 .EQU INT_IP18_PRI79_1, 25 .EQU INT_IP18_PRI79_0, 24 .EQU INT_IP18_PRI78_7, 23 .EQU INT_IP18_PRI78_6, 22 .EQU INT_IP18_PRI78_5, 21 .EQU INT_IP18_PRI78_4, 20 .EQU INT_IP18_PRI78_3, 19 .EQU INT_IP18_PRI78_2, 18 .EQU INT_IP18_PRI78_1, 17 .EQU INT_IP18_PRI78_0, 16 .EQU INT_IP18_PRI77_7, 15 .EQU INT_IP18_PRI77_6, 14 .EQU INT_IP18_PRI77_5, 13 .EQU INT_IP18_PRI77_4, 12 .EQU INT_IP18_PRI77_3, 11 .EQU INT_IP18_PRI77_2, 10 .EQU INT_IP18_PRI77_1, 9 .EQU INT_IP18_PRI77_0, 8 .EQU INT_IP18_PRI76_7, 7 .EQU INT_IP18_PRI76_6, 6 .EQU INT_IP18_PRI76_5, 5 .EQU INT_IP18_PRI76_4, 4 .EQU INT_IP18_PRI76_3, 3 .EQU INT_IP18_PRI76_2, 2 .EQU INT_IP18_PRI76_1, 1 .EQU INT_IP18_PRI76_0, 0 // register------------------------------------- .EQU INT_EINTMASK, 0x40200080 // 0x4020 0080 INT_EINTMASK Bits------------------------------------- .EQU INT_EINTMASK_EINTM31, 31 .EQU INT_EINTMASK_EINTM30, 30 .EQU INT_EINTMASK_EINTM29, 29 .EQU INT_EINTMASK_EINTM28, 28 .EQU INT_EINTMASK_EINTM27, 27 .EQU INT_EINTMASK_EINTM26, 26 .EQU INT_EINTMASK_EINTM25, 25 .EQU INT_EINTMASK_EINTM24, 24 .EQU INT_EINTMASK_EINTM23, 23 .EQU INT_EINTMASK_EINTM22, 22 .EQU INT_EINTMASK_EINTM21, 21 .EQU INT_EINTMASK_EINTM20, 20 .EQU INT_EINTMASK_EINTM19, 19 .EQU INT_EINTMASK_EINTM18, 18 .EQU INT_EINTMASK_EINTM17, 17 .EQU INT_EINTMASK_EINTM16, 16 // register------------------------------------- .EQU INT_EINTRISE, 0x40200084 // 0x4020 0084 INT_EINTRISE Bits------------------------------------- .EQU INT_EINTRISE_EINTRI31, 31 .EQU INT_EINTRISE_EINTRI30, 30 .EQU INT_EINTRISE_EINTRI29, 29 .EQU INT_EINTRISE_EINTRI28, 28 .EQU INT_EINTRISE_EINTRI27, 27 .EQU INT_EINTRISE_EINTRI26, 26 .EQU INT_EINTRISE_EINTRI25, 25 .EQU INT_EINTRISE_EINTRI24, 24 .EQU INT_EINTRISE_EINTRI23, 23 .EQU INT_EINTRISE_EINTRI22, 22 .EQU INT_EINTRISE_EINTRI21, 21 .EQU INT_EINTRISE_EINTRI20, 20 .EQU INT_EINTRISE_EINTRI19, 19 .EQU INT_EINTRISE_EINTRI18, 18 .EQU INT_EINTRISE_EINTRI17, 17 .EQU INT_EINTRISE_EINTRI16, 16 // register------------------------------------- .EQU INT_EINTFALL, 0x40200088 // 0x4020 0088 INT_EINTFALL Bits------------------------------------- .EQU INT_EINTFALL_EINTFA31, 31 .EQU INT_EINTFALL_EINTFA30, 30 .EQU INT_EINTFALL_EINTFA29, 29 .EQU INT_EINTFALL_EINTFA28, 28 .EQU INT_EINTFALL_EINTFA27, 27 .EQU INT_EINTFALL_EINTFA26, 26 .EQU INT_EINTFALL_EINTFA25, 25 .EQU INT_EINTFALL_EINTFA24, 24 .EQU INT_EINTFALL_EINTFA23, 23 .EQU INT_EINTFALL_EINTFA22, 22 .EQU INT_EINTFALL_EINTFA21, 21 .EQU INT_EINTFALL_EINTFA20, 20 .EQU INT_EINTFALL_EINTFA19, 19 .EQU INT_EINTFALL_EINTFA18, 18 .EQU INT_EINTFALL_EINTFA17, 17 .EQU INT_EINTFALL_EINTFA16, 16 // register------------------------------------- .EQU INT_EINTF, 0x4020008C // 0x4020 008C INT_EINTF Bits------------------------------------- .EQU INT_EINTF_EINTIF31, 31 .EQU INT_EINTF_EINTIF30, 30 .EQU INT_EINTF_EINTIF29, 29 .EQU INT_EINTF_EINTIF28, 28 .EQU INT_EINTF_EINTIF27, 27 .EQU INT_EINTF_EINTIF26, 26 .EQU INT_EINTF_EINTIF25, 25 .EQU INT_EINTF_EINTIF24, 24 .EQU INT_EINTF_EINTIF23, 23 .EQU INT_EINTF_EINTIF22, 22 .EQU INT_EINTF_EINTIF21, 21 .EQU INT_EINTF_EINTIF20, 20 .EQU INT_EINTF_EINTIF19, 19 .EQU INT_EINTF_EINTIF18, 18 .EQU INT_EINTF_EINTIF17, 17 .EQU INT_EINTF_EINTIF16, 16 // register------------------------------------- .EQU INT_EINTEL, 0x40200090 // 0x4020 0090 INT_EINTEL Bits------------------------------------- .EQU INT_EINTEL_EINTEL31, 31 .EQU INT_EINTEL_EINTEL30, 30 .EQU INT_EINTEL_EINTEL29, 29 .EQU INT_EINTEL_EINTEL28, 28 .EQU INT_EINTEL_EINTEL27, 27 .EQU INT_EINTEL_EINTEL26, 26 .EQU INT_EINTEL_EINTEL25, 25 .EQU INT_EINTEL_EINTEL24, 24 .EQU INT_EINTEL_EINTEL23, 23 .EQU INT_EINTEL_EINTEL22, 22 .EQU INT_EINTEL_EINTEL21, 21 .EQU INT_EINTEL_EINTEL20, 20 .EQU INT_EINTEL_EINTEL19, 19 .EQU INT_EINTEL_EINTEL18, 18 .EQU INT_EINTEL_EINTEL17, 17 .EQU INT_EINTEL_EINTEL16, 16 // register------------------------------------- .EQU INT_CTL1, 0x4020009C // 0x4020 009C INT_CTL1 Bits------------------------------------- .EQU INT_CTL1_INTDELY7, 7 .EQU INT_CTL1_INTDELY6, 6 .EQU INT_CTL1_INTDELY5, 5 .EQU INT_CTL1_INTDELY4, 4 .EQU INT_CTL1_INTDELY3, 3 .EQU INT_CTL1_INTDELY2, 2 .EQU INT_CTL1_INTDELY1, 1 .EQU INT_CTL1_INTDELY0, 0 // register------------------------------------- .EQU ST_CTL, 0x402000A0 // 0x4020 00A0 ST_CTL Bits------------------------------------- .EQU ST_CTL_COUNTZERO, 16 .EQU ST_CTL_STCLKS, 2 .EQU ST_CTL_TICKINTEN, 1 .EQU ST_CTL_STEN, 0 // register------------------------------------- .EQU ST_RELOAD, 0x402000A4 // 0x4020 00A4 ST_RELOAD Bits------------------------------------- .EQU ST_RELOAD_STRELOAD23, 23 .EQU ST_RELOAD_STRELOAD22, 22 .EQU ST_RELOAD_STRELOAD21, 21 .EQU ST_RELOAD_STRELOAD20, 20 .EQU ST_RELOAD_STRELOAD19, 19 .EQU ST_RELOAD_STRELOAD18, 18 .EQU ST_RELOAD_STRELOAD17, 17 .EQU ST_RELOAD_STRELOAD16, 16 .EQU ST_RELOAD_STRELOAD15, 15 .EQU ST_RELOAD_STRELOAD14, 14 .EQU ST_RELOAD_STRELOAD13, 13 .EQU ST_RELOAD_STRELOAD12, 12 .EQU ST_RELOAD_STRELOAD11, 11 .EQU ST_RELOAD_STRELOAD10, 10 .EQU ST_RELOAD_STRELOAD9, 9 .EQU ST_RELOAD_STRELOAD8, 8 .EQU ST_RELOAD_STRELOAD7, 7 .EQU ST_RELOAD_STRELOAD6, 6 .EQU ST_RELOAD_STRELOAD5, 5 .EQU ST_RELOAD_STRELOAD4, 4 .EQU ST_RELOAD_STRELOAD3, 3 .EQU ST_RELOAD_STRELOAD2, 2 .EQU ST_RELOAD_STRELOAD1, 1 .EQU ST_RELOAD_STRELOAD0, 0 // register------------------------------------- .EQU ST_CV, 0x402000A8 // 0x4020 00A8 ST_CV Bits------------------------------------- .EQU ST_CV_STCV23, 23 .EQU ST_CV_STCV22, 22 .EQU ST_CV_STCV21, 21 .EQU ST_CV_STCV20, 20 .EQU ST_CV_STCV19, 19 .EQU ST_CV_STCV18, 18 .EQU ST_CV_STCV17, 17 .EQU ST_CV_STCV16, 16 .EQU ST_CV_STCV15, 15 .EQU ST_CV_STCV14, 14 .EQU ST_CV_STCV13, 13 .EQU ST_CV_STCV12, 12 .EQU ST_CV_STCV11, 11 .EQU ST_CV_STCV10, 10 .EQU ST_CV_STCV9, 9 .EQU ST_CV_STCV8, 8 .EQU ST_CV_STCV7, 7 .EQU ST_CV_STCV6, 6 .EQU ST_CV_STCV5, 5 .EQU ST_CV_STCV4, 4 .EQU ST_CV_STCV3, 3 .EQU ST_CV_STCV2, 2 .EQU ST_CV_STCV1, 1 .EQU ST_CV_STCV0, 0 // register------------------------------------- .EQU ST_CALI, 0x402000AC // 0x4020 00AC ST_CALI Bits------------------------------------- .EQU ST_CALI_STCLKREF, 31 .EQU ST_CALI_SKEW, 30 .EQU ST_CALI_STCALIB23, 23 .EQU ST_CALI_STCALIB22, 22 .EQU ST_CALI_STCALIB21, 21 .EQU ST_CALI_STCALIB20, 20 .EQU ST_CALI_STCALIB19, 19 .EQU ST_CALI_STCALIB18, 18 .EQU ST_CALI_STCALIB17, 17 .EQU ST_CALI_STCALIB16, 16 .EQU ST_CALI_STCALIB15, 15 .EQU ST_CALI_STCALIB14, 14 .EQU ST_CALI_STCALIB13, 13 .EQU ST_CALI_STCALIB12, 12 .EQU ST_CALI_STCALIB11, 11 .EQU ST_CALI_STCALIB10, 10 .EQU ST_CALI_STCALIB9, 9 .EQU ST_CALI_STCALIB8, 8 .EQU ST_CALI_STCALIB7, 7 .EQU ST_CALI_STCALIB6, 6 .EQU ST_CALI_STCALIB5, 5 .EQU ST_CALI_STCALIB4, 4 .EQU ST_CALI_STCALIB3, 3 .EQU ST_CALI_STCALIB2, 2 .EQU ST_CALI_STCALIB1, 1 .EQU ST_CALI_STCALIB0, 0 // register------------------------------------- .EQU SYS_PSW, 0x402000B0 // 0x4020 00B0 SYS_PSW Bits------------------------------------- .EQU SYS_PSW_N, 31 .EQU SYS_PSW_Z, 30 .EQU SYS_PSW_C, 29 .EQU SYS_PSW_V, 28 // register------------------------------------- .EQU SYS_MCTL, 0x402000B4 // 0x4020 00B4 SYS_MCTL Bits------------------------------------- .EQU SYS_MCTL_SPSEL, 16 .EQU SYS_MCTL_SUSTA, 15 .EQU SYS_MCTL_STACKALIGN, 9 .EQU SYS_MCTL_SLPONMOD, 4 .EQU SYS_MCTL_SLEEPONEXIT, 1 // register------------------------------------- .EQU SYS_ARCTL, 0x402000B8 // 0x4020 00B8 SYS_ARCTL Bits------------------------------------- .EQU SYS_ARCTL_ARKEY31, 31 .EQU SYS_ARCTL_ARKEY30, 30 .EQU SYS_ARCTL_ARKEY29, 29 .EQU SYS_ARCTL_ARKEY28, 28 .EQU SYS_ARCTL_ARKEY27, 27 .EQU SYS_ARCTL_ARKEY26, 26 .EQU SYS_ARCTL_ARKEY25, 25 .EQU SYS_ARCTL_ARKEY24, 24 .EQU SYS_ARCTL_ARKEY23, 23 .EQU SYS_ARCTL_ARKEY22, 22 .EQU SYS_ARCTL_ARKEY21, 21 .EQU SYS_ARCTL_ARKEY20, 20 .EQU SYS_ARCTL_ARKEY19, 19 .EQU SYS_ARCTL_ARKEY18, 18 .EQU SYS_ARCTL_ARKEY17, 17 .EQU SYS_ARCTL_ARKEY16, 16 .EQU SYS_ARCTL_CDMALDC1, 10 .EQU SYS_ARCTL_CDMALDC0, 9 .EQU SYS_ARCTL_CDBUGBS, 8 .EQU SYS_ARCTL_CDMADC, 7 .EQU SYS_ARCTL_CRWDC, 6 .EQU SYS_ARCTL_CDMAAM, 5 .EQU SYS_ARCTL_CDMAR, 4 .EQU SYS_ARCTL_SYSTEMRST, 2 // register------------------------------------- .EQU SYS_VECTOFF, 0x402000BC // 0x4020 00BC SYS_VECTOFF Bits------------------------------------- .EQU SYS_VECTOFF_TBLOFF31, 31 .EQU SYS_VECTOFF_TBLOFF30, 30 .EQU SYS_VECTOFF_TBLOFF29, 29 .EQU SYS_VECTOFF_TBLOFF28, 28 .EQU SYS_VECTOFF_TBLOFF27, 27 .EQU SYS_VECTOFF_TBLOFF26, 26 .EQU SYS_VECTOFF_TBLOFF25, 25 .EQU SYS_VECTOFF_TBLOFF24, 24 .EQU SYS_VECTOFF_TBLOFF23, 23 .EQU SYS_VECTOFF_TBLOFF22, 22 .EQU SYS_VECTOFF_TBLOFF21, 21 .EQU SYS_VECTOFF_TBLOFF20, 20 .EQU SYS_VECTOFF_TBLOFF19, 19 .EQU SYS_VECTOFF_TBLOFF18, 18 .EQU SYS_VECTOFF_TBLOFF17, 17 .EQU SYS_VECTOFF_TBLOFF16, 16 .EQU SYS_VECTOFF_TBLOFF15, 15 .EQU SYS_VECTOFF_TBLOFF14, 14 .EQU SYS_VECTOFF_TBLOFF13, 13 .EQU SYS_VECTOFF_TBLOFF12, 12 .EQU SYS_VECTOFF_TBLOFF11, 11 .EQU SYS_VECTOFF_TBLOFF10, 10 .EQU SYS_VECTOFF_TBLOFF9, 9 .EQU SYS_VECTOFF_TBLOFF8, 8 .EQU SYS_VECTOFF_TBLOFF7, 7 .EQU SYS_VECTOFF_TBLOFF6, 6 .EQU SYS_VECTOFF_TBLOFF5, 5 .EQU SYS_VECTOFF_TBLOFF4, 4 .EQU SYS_VECTOFF_TBLOFF3, 3 .EQU SYS_VECTOFF_TBLOFF2, 2 .EQU SYS_VECTOFF_TBLOFF1, 1 .EQU SYS_VECTOFF_TBLOFF0, 0 // register------------------------------------- .EQU CACHE_CTLR, 0x402000C0 // 0x4020 00C0 CACHE_CTLR Bits------------------------------------- .EQU CACHE_CTLR_CECCEN, 4 .EQU CACHE_CTLR_ICRD2LEN, 3 .EQU CACHE_CTLR_ICWR2LEN, 2 .EQU CACHE_CTLR_CACHERST, 1 .EQU CACHE_CTLR_CACHEEN, 0 // register------------------------------------- .EQU SYS_RAMSPA, 0x402000C4 // 0x4020 00C4 SYS_RAMSPA Bits------------------------------------- .EQU SYS_RAMSPA_RAMSPA25, 25 .EQU SYS_RAMSPA_RAMSPA24, 24 .EQU SYS_RAMSPA_RAMSPA23, 23 .EQU SYS_RAMSPA_RAMSPA22, 22 .EQU SYS_RAMSPA_RAMSPA21, 21 .EQU SYS_RAMSPA_RAMSPA20, 20 .EQU SYS_RAMSPA_RAMSPA19, 19 .EQU SYS_RAMSPA_RAMSPA18, 18 .EQU SYS_RAMSPA_RAMSPA17, 17 .EQU SYS_RAMSPA_RAMSPA16, 16 .EQU SYS_RAMSPA_RAMSPA15, 15 .EQU SYS_RAMSPA_RAMSPA14, 14 .EQU SYS_RAMSPA_RAMSPA13, 13 .EQU SYS_RAMSPA_RAMSPA12, 12 .EQU SYS_RAMSPA_RAMSPA11, 11 .EQU SYS_RAMSPA_RAMSPA10, 10 .EQU SYS_RAMSPA_RAMSPA9, 9 .EQU SYS_RAMSPA_RAMSPA8, 8 .EQU SYS_RAMSPA_RAMSPA7, 7 .EQU SYS_RAMSPA_RAMSPA6, 6 .EQU SYS_RAMSPA_RAMSPA5, 5 .EQU SYS_RAMSPA_RAMSPA4, 4 .EQU SYS_RAMSPA_RAMSPA3, 3 .EQU SYS_RAMSPA_RAMSPA2, 2 .EQU SYS_RAMSPA_RAMSPA1, 1 .EQU SYS_RAMSPA_RAMSPA0, 0 // register------------------------------------- .EQU SYS_MEMCTL, 0x402000C8 // 0x4020 00C8 SYS_MEMCTL Bits------------------------------------- .EQU SYS_MEMCTL_MEMM1, 1 .EQU SYS_MEMCTL_MEMM0, 0 // register------------------------------------- .EQU SYS_MSPSPA, 0x402000CC // 0x4020 00CC SYS_MSPSPA Bits------------------------------------- .EQU SYS_MSPSPA_MSPSPAH15, 31 .EQU SYS_MSPSPA_MSPSPAH14, 30 .EQU SYS_MSPSPA_MSPSPAH13, 29 .EQU SYS_MSPSPA_MSPSPAH12, 28 .EQU SYS_MSPSPA_MSPSPAH11, 27 .EQU SYS_MSPSPA_MSPSPAH10, 26 .EQU SYS_MSPSPA_MSPSPAH9, 25 .EQU SYS_MSPSPA_MSPSPAH8, 24 .EQU SYS_MSPSPA_MSPSPAH7, 23 .EQU SYS_MSPSPA_MSPSPAH6, 22 .EQU SYS_MSPSPA_MSPSPAH5, 21 .EQU SYS_MSPSPA_MSPSPAH4, 20 .EQU SYS_MSPSPA_MSPSPAH3, 19 .EQU SYS_MSPSPA_MSPSPAH2, 18 .EQU SYS_MSPSPA_MSPSPAH1, 17 .EQU SYS_MSPSPA_MSPSPAH0, 16 .EQU SYS_MSPSPA_MSPSPAL15, 15 .EQU SYS_MSPSPA_MSPSPAL14, 14 .EQU SYS_MSPSPA_MSPSPAL13, 13 .EQU SYS_MSPSPA_MSPSPAL12, 12 .EQU SYS_MSPSPA_MSPSPAL11, 11 .EQU SYS_MSPSPA_MSPSPAL10, 10 .EQU SYS_MSPSPA_MSPSPAL9, 9 .EQU SYS_MSPSPA_MSPSPAL8, 8 .EQU SYS_MSPSPA_MSPSPAL7, 7 .EQU SYS_MSPSPA_MSPSPAL6, 6 .EQU SYS_MSPSPA_MSPSPAL5, 5 .EQU SYS_MSPSPA_MSPSPAL4, 4 .EQU SYS_MSPSPA_MSPSPAL3, 3 .EQU SYS_MSPSPA_MSPSPAL2, 2 .EQU SYS_MSPSPA_MSPSPAL1, 1 .EQU SYS_MSPSPA_MSPSPAL0, 0 // register------------------------------------- .EQU SYS_PSPSPA, 0x402000D0 // 0x4020 00D0 SYS_PSPSPA Bits------------------------------------- .EQU SYS_PSPSPA_PSPSPAH15, 31 .EQU SYS_PSPSPA_PSPSPAH14, 30 .EQU SYS_PSPSPA_PSPSPAH13, 29 .EQU SYS_PSPSPA_PSPSPAH12, 28 .EQU SYS_PSPSPA_PSPSPAH11, 27 .EQU SYS_PSPSPA_PSPSPAH10, 26 .EQU SYS_PSPSPA_PSPSPAH9, 25 .EQU SYS_PSPSPA_PSPSPAH8, 24 .EQU SYS_PSPSPA_PSPSPAH7, 23 .EQU SYS_PSPSPA_PSPSPAH6, 22 .EQU SYS_PSPSPA_PSPSPAH5, 21 .EQU SYS_PSPSPA_PSPSPAH4, 20 .EQU SYS_PSPSPA_PSPSPAH3, 19 .EQU SYS_PSPSPA_PSPSPAH2, 18 .EQU SYS_PSPSPA_PSPSPAH1, 17 .EQU SYS_PSPSPA_PSPSPAH0, 16 .EQU SYS_PSPSPA_PSPSPAL15, 15 .EQU SYS_PSPSPA_PSPSPAL14, 14 .EQU SYS_PSPSPA_PSPSPAL13, 13 .EQU SYS_PSPSPA_PSPSPAL12, 12 .EQU SYS_PSPSPA_PSPSPAL11, 11 .EQU SYS_PSPSPA_PSPSPAL10, 10 .EQU SYS_PSPSPA_PSPSPAL9, 9 .EQU SYS_PSPSPA_PSPSPAL8, 8 .EQU SYS_PSPSPA_PSPSPAL7, 7 .EQU SYS_PSPSPA_PSPSPAL6, 6 .EQU SYS_PSPSPA_PSPSPAL5, 5 .EQU SYS_PSPSPA_PSPSPAL4, 4 .EQU SYS_PSPSPA_PSPSPAL3, 3 .EQU SYS_PSPSPA_PSPSPAL2, 2 .EQU SYS_PSPSPA_PSPSPAL1, 1 .EQU SYS_PSPSPA_PSPSPAL0, 0 // register------------------------------------- .EQU INT_IP19, 0x402000E0 // 0x4020 00E0 INT_IP19 Bits------------------------------------- .EQU INT_IP19_PRI83_7, 31 .EQU INT_IP19_PRI83_6, 30 .EQU INT_IP19_PRI83_5, 29 .EQU INT_IP19_PRI83_4, 28 .EQU INT_IP19_PRI83_3, 27 .EQU INT_IP19_PRI83_2, 26 .EQU INT_IP19_PRI83_1, 25 .EQU INT_IP19_PRI83_0, 24 .EQU INT_IP19_PRI82_7, 23 .EQU INT_IP19_PRI82_6, 22 .EQU INT_IP19_PRI82_5, 21 .EQU INT_IP19_PRI82_4, 20 .EQU INT_IP19_PRI82_3, 19 .EQU INT_IP19_PRI82_2, 18 .EQU INT_IP19_PRI82_1, 17 .EQU INT_IP19_PRI82_0, 16 .EQU INT_IP19_PRI81_7, 15 .EQU INT_IP19_PRI81_6, 14 .EQU INT_IP19_PRI81_5, 13 .EQU INT_IP19_PRI81_4, 12 .EQU INT_IP19_PRI81_3, 11 .EQU INT_IP19_PRI81_2, 10 .EQU INT_IP19_PRI81_1, 9 .EQU INT_IP19_PRI81_0, 8 .EQU INT_IP19_PRI80_7, 7 .EQU INT_IP19_PRI80_6, 6 .EQU INT_IP19_PRI80_5, 5 .EQU INT_IP19_PRI80_4, 4 .EQU INT_IP19_PRI80_3, 3 .EQU INT_IP19_PRI80_2, 2 .EQU INT_IP19_PRI80_1, 1 .EQU INT_IP19_PRI80_0, 0 // register------------------------------------- .EQU INT_IP20, 0x402000E4 // 0x4020 00E4 INT_IP20 Bits------------------------------------- .EQU INT_IP20_PRI87_7, 31 .EQU INT_IP20_PRI87_6, 30 .EQU INT_IP20_PRI87_5, 29 .EQU INT_IP20_PRI87_4, 28 .EQU INT_IP20_PRI87_3, 27 .EQU INT_IP20_PRI87_2, 26 .EQU INT_IP20_PRI87_1, 25 .EQU INT_IP20_PRI87_0, 24 .EQU INT_IP20_PRI86_7, 23 .EQU INT_IP20_PRI86_6, 22 .EQU INT_IP20_PRI86_5, 21 .EQU INT_IP20_PRI86_4, 20 .EQU INT_IP20_PRI86_3, 19 .EQU INT_IP20_PRI86_2, 18 .EQU INT_IP20_PRI86_1, 17 .EQU INT_IP20_PRI86_0, 16 .EQU INT_IP20_PRI85_7, 15 .EQU INT_IP20_PRI85_6, 14 .EQU INT_IP20_PRI85_5, 13 .EQU INT_IP20_PRI85_4, 12 .EQU INT_IP20_PRI85_3, 11 .EQU INT_IP20_PRI85_2, 10 .EQU INT_IP20_PRI85_1, 9 .EQU INT_IP20_PRI85_0, 8 .EQU INT_IP20_PRI84_7, 7 .EQU INT_IP20_PRI84_6, 6 .EQU INT_IP20_PRI84_5, 5 .EQU INT_IP20_PRI84_4, 4 .EQU INT_IP20_PRI84_3, 3 .EQU INT_IP20_PRI84_2, 2 .EQU INT_IP20_PRI84_1, 1 .EQU INT_IP20_PRI84_0, 0 // register------------------------------------- .EQU INT_IP21, 0x402000E8 // 0x4020 00E8 INT_IP21 Bits------------------------------------- .EQU INT_IP21_PRI91_7, 31 .EQU INT_IP21_PRI91_6, 30 .EQU INT_IP21_PRI91_5, 29 .EQU INT_IP21_PRI91_4, 28 .EQU INT_IP21_PRI91_3, 27 .EQU INT_IP21_PRI91_2, 26 .EQU INT_IP21_PRI91_1, 25 .EQU INT_IP21_PRI91_0, 24 .EQU INT_IP21_PRI90_7, 23 .EQU INT_IP21_PRI90_6, 22 .EQU INT_IP21_PRI90_5, 21 .EQU INT_IP21_PRI90_4, 20 .EQU INT_IP21_PRI90_3, 19 .EQU INT_IP21_PRI90_2, 18 .EQU INT_IP21_PRI90_1, 17 .EQU INT_IP21_PRI90_0, 16 .EQU INT_IP21_PRI89_7, 15 .EQU INT_IP21_PRI89_6, 14 .EQU INT_IP21_PRI89_5, 13 .EQU INT_IP21_PRI89_4, 12 .EQU INT_IP21_PRI89_3, 11 .EQU INT_IP21_PRI89_2, 10 .EQU INT_IP21_PRI89_1, 9 .EQU INT_IP21_PRI89_0, 8 .EQU INT_IP21_PRI88_7, 7 .EQU INT_IP21_PRI88_6, 6 .EQU INT_IP21_PRI88_5, 5 .EQU INT_IP21_PRI88_4, 4 .EQU INT_IP21_PRI88_3, 3 .EQU INT_IP21_PRI88_2, 2 .EQU INT_IP21_PRI88_1, 1 .EQU INT_IP21_PRI88_0, 0 // register------------------------------------- .EQU INT_IP22, 0x402000EC // 0x4020 00EC INT_IP22 Bits------------------------------------- .EQU INT_IP22_PRI95_7, 31 .EQU INT_IP22_PRI95_6, 30 .EQU INT_IP22_PRI95_5, 29 .EQU INT_IP22_PRI95_4, 28 .EQU INT_IP22_PRI95_3, 27 .EQU INT_IP22_PRI95_2, 26 .EQU INT_IP22_PRI95_1, 25 .EQU INT_IP22_PRI95_0, 24 .EQU INT_IP22_PRI94_7, 23 .EQU INT_IP22_PRI94_6, 22 .EQU INT_IP22_PRI94_5, 21 .EQU INT_IP22_PRI94_4, 20 .EQU INT_IP22_PRI94_3, 19 .EQU INT_IP22_PRI94_2, 18 .EQU INT_IP22_PRI94_1, 17 .EQU INT_IP22_PRI94_0, 16 .EQU INT_IP22_PRI93_7, 15 .EQU INT_IP22_PRI93_6, 14 .EQU INT_IP22_PRI93_5, 13 .EQU INT_IP22_PRI93_4, 12 .EQU INT_IP22_PRI93_3, 11 .EQU INT_IP22_PRI93_2, 10 .EQU INT_IP22_PRI93_1, 9 .EQU INT_IP22_PRI93_0, 8 .EQU INT_IP22_PRI92_7, 7 .EQU INT_IP22_PRI92_6, 6 .EQU INT_IP22_PRI92_5, 5 .EQU INT_IP22_PRI92_4, 4 .EQU INT_IP22_PRI92_3, 3 .EQU INT_IP22_PRI92_2, 2 .EQU INT_IP22_PRI92_1, 1 .EQU INT_IP22_PRI92_0, 0 // register------------------------------------- .EQU INT_IP23, 0x402000F0 // 0x4020 00F0 INT_IP23 Bits------------------------------------- .EQU INT_IP23_PRI99_7, 31 .EQU INT_IP23_PRI99_6, 30 .EQU INT_IP23_PRI99_5, 29 .EQU INT_IP23_PRI99_4, 28 .EQU INT_IP23_PRI99_3, 27 .EQU INT_IP23_PRI99_2, 26 .EQU INT_IP23_PRI99_1, 25 .EQU INT_IP23_PRI99_0, 24 .EQU INT_IP23_PRI98_7, 23 .EQU INT_IP23_PRI98_6, 22 .EQU INT_IP23_PRI98_5, 21 .EQU INT_IP23_PRI98_4, 20 .EQU INT_IP23_PRI98_3, 19 .EQU INT_IP23_PRI98_2, 18 .EQU INT_IP23_PRI98_1, 17 .EQU INT_IP23_PRI98_0, 16 .EQU INT_IP23_PRI97_7, 15 .EQU INT_IP23_PRI97_6, 14 .EQU INT_IP23_PRI97_5, 13 .EQU INT_IP23_PRI97_4, 12 .EQU INT_IP23_PRI97_3, 11 .EQU INT_IP23_PRI97_2, 10 .EQU INT_IP23_PRI97_1, 9 .EQU INT_IP23_PRI97_0, 8 .EQU INT_IP23_PRI96_7, 7 .EQU INT_IP23_PRI96_6, 6 .EQU INT_IP23_PRI96_5, 5 .EQU INT_IP23_PRI96_4, 4 .EQU INT_IP23_PRI96_3, 3 .EQU INT_IP23_PRI96_2, 2 .EQU INT_IP23_PRI96_1, 1 .EQU INT_IP23_PRI96_0, 0 // register------------------------------------- .EQU INT_IP24, 0x402000F4 // 0x4020 00F4 INT_IP24 Bits------------------------------------- .EQU INT_IP24_PRI103_7, 31 .EQU INT_IP24_PRI103_6, 30 .EQU INT_IP24_PRI103_5, 29 .EQU INT_IP24_PRI103_4, 28 .EQU INT_IP24_PRI103_3, 27 .EQU INT_IP24_PRI103_2, 26 .EQU INT_IP24_PRI103_1, 25 .EQU INT_IP24_PRI103_0, 24 .EQU INT_IP24_PRI102_7, 23 .EQU INT_IP24_PRI102_6, 22 .EQU INT_IP24_PRI102_5, 21 .EQU INT_IP24_PRI102_4, 20 .EQU INT_IP24_PRI102_3, 19 .EQU INT_IP24_PRI102_2, 18 .EQU INT_IP24_PRI102_1, 17 .EQU INT_IP24_PRI102_0, 16 .EQU INT_IP24_PRI101_7, 15 .EQU INT_IP24_PRI101_6, 14 .EQU INT_IP24_PRI101_5, 13 .EQU INT_IP24_PRI101_4, 12 .EQU INT_IP24_PRI101_3, 11 .EQU INT_IP24_PRI101_2, 10 .EQU INT_IP24_PRI101_1, 9 .EQU INT_IP24_PRI101_0, 8 .EQU INT_IP24_PRI100_7, 7 .EQU INT_IP24_PRI100_6, 6 .EQU INT_IP24_PRI100_5, 5 .EQU INT_IP24_PRI100_4, 4 .EQU INT_IP24_PRI100_3, 3 .EQU INT_IP24_PRI100_2, 2 .EQU INT_IP24_PRI100_1, 1 .EQU INT_IP24_PRI100_0, 0 // register------------------------------------- .EQU INT_IP25, 0x402000F8 // 0x4020 00F8 INT_IP25 Bits------------------------------------- .EQU INT_IP25_PRI107_7, 31 .EQU INT_IP25_PRI107_6, 30 .EQU INT_IP25_PRI107_5, 29 .EQU INT_IP25_PRI107_4, 28 .EQU INT_IP25_PRI107_3, 27 .EQU INT_IP25_PRI107_2, 26 .EQU INT_IP25_PRI107_1, 25 .EQU INT_IP25_PRI107_0, 24 .EQU INT_IP25_PRI106_7, 23 .EQU INT_IP25_PRI106_6, 22 .EQU INT_IP25_PRI106_5, 21 .EQU INT_IP25_PRI106_4, 20 .EQU INT_IP25_PRI106_3, 19 .EQU INT_IP25_PRI106_2, 18 .EQU INT_IP25_PRI106_1, 17 .EQU INT_IP25_PRI106_0, 16 .EQU INT_IP25_PRI105_7, 15 .EQU INT_IP25_PRI105_6, 14 .EQU INT_IP25_PRI105_5, 13 .EQU INT_IP25_PRI105_4, 12 .EQU INT_IP25_PRI105_3, 11 .EQU INT_IP25_PRI105_2, 10 .EQU INT_IP25_PRI105_1, 9 .EQU INT_IP25_PRI105_0, 8 .EQU INT_IP25_PRI104_7, 7 .EQU INT_IP25_PRI104_6, 6 .EQU INT_IP25_PRI104_5, 5 .EQU INT_IP25_PRI104_4, 4 .EQU INT_IP25_PRI104_3, 3 .EQU INT_IP25_PRI104_2, 2 .EQU INT_IP25_PRI104_1, 1 .EQU INT_IP25_PRI104_0, 0 // register------------------------------------- .EQU INT_IP26, 0x402000FC // 0x4020 00FC INT_IP26 Bits------------------------------------- .EQU INT_IP26_PRI111_7, 31 .EQU INT_IP26_PRI111_6, 30 .EQU INT_IP26_PRI111_5, 29 .EQU INT_IP26_PRI111_4, 28 .EQU INT_IP26_PRI111_3, 27 .EQU INT_IP26_PRI111_2, 26 .EQU INT_IP26_PRI111_1, 25 .EQU INT_IP26_PRI111_0, 24 .EQU INT_IP26_PRI110_7, 23 .EQU INT_IP26_PRI110_6, 22 .EQU INT_IP26_PRI110_5, 21 .EQU INT_IP26_PRI110_4, 20 .EQU INT_IP26_PRI110_3, 19 .EQU INT_IP26_PRI110_2, 18 .EQU INT_IP26_PRI110_1, 17 .EQU INT_IP26_PRI110_0, 16 .EQU INT_IP26_PRI109_7, 15 .EQU INT_IP26_PRI109_6, 14 .EQU INT_IP26_PRI109_5, 13 .EQU INT_IP26_PRI109_4, 12 .EQU INT_IP26_PRI109_3, 11 .EQU INT_IP26_PRI109_2, 10 .EQU INT_IP26_PRI109_1, 9 .EQU INT_IP26_PRI109_0, 8 .EQU INT_IP26_PRI108_7, 7 .EQU INT_IP26_PRI108_6, 6 .EQU INT_IP26_PRI108_5, 5 .EQU INT_IP26_PRI108_4, 4 .EQU INT_IP26_PRI108_3, 3 .EQU INT_IP26_PRI108_2, 2 .EQU INT_IP26_PRI108_1, 1 .EQU INT_IP26_PRI108_0, 0 // register------------------------------------- .EQU FLASH_CFG, 0x40200114 // 0x4020 0114 FLASH_CFG Bits------------------------------------- .EQU FLASH_CFG_TCFG3, 3 .EQU FLASH_CFG_TCFG2, 2 .EQU FLASH_CFG_TCFG1, 1 .EQU FLASH_CFG_TCFG0, 0 // register------------------------------------- .EQU FLASH_STATE, 0x40200120 // 0x4020 0120 FLASH_STATE Bits------------------------------------- .EQU FLASH_STATE_SIGDONE, 1 // register------------------------------------- .EQU FLASH_CSSTART, 0x40200138 // 0x4020 0138 FLASH_CSSTART Bits------------------------------------- .EQU FLASH_CSSTART_CKSTADDR20, 20 .EQU FLASH_CSSTART_CKSTADDR19, 19 .EQU FLASH_CSSTART_CKSTADDR18, 18 .EQU FLASH_CSSTART_CKSTADDR17, 17 .EQU FLASH_CSSTART_CKSTADDR16, 16 .EQU FLASH_CSSTART_CKSTADDR15, 15 .EQU FLASH_CSSTART_CKSTADDR14, 14 .EQU FLASH_CSSTART_CKSTADDR13, 13 .EQU FLASH_CSSTART_CKSTADDR12, 12 .EQU FLASH_CSSTART_CKSTADDR11, 11 .EQU FLASH_CSSTART_CKSTADDR10, 10 .EQU FLASH_CSSTART_CKSTADDR9, 9 .EQU FLASH_CSSTART_CKSTADDR8, 8 .EQU FLASH_CSSTART_CKSTADDR7, 7 .EQU FLASH_CSSTART_CKSTADDR6, 6 .EQU FLASH_CSSTART_CKSTADDR5, 5 .EQU FLASH_CSSTART_CKSTADDR4, 4 // register------------------------------------- .EQU FLASH_CSSTOP, 0x4020013C // 0x4020 013C FLASH_CSSTOP Bits------------------------------------- .EQU FLASH_CSSTOP_SIGGO, 31 .EQU FLASH_CSSTOP_CKSPADDR20, 20 .EQU FLASH_CSSTOP_CKSPADDR19, 19 .EQU FLASH_CSSTOP_CKSPADDR18, 18 .EQU FLASH_CSSTOP_CKSPADDR17, 17 .EQU FLASH_CSSTOP_CKSPADDR16, 16 .EQU FLASH_CSSTOP_CKSPADDR15, 15 .EQU FLASH_CSSTOP_CKSPADDR14, 14 .EQU FLASH_CSSTOP_CKSPADDR13, 13 .EQU FLASH_CSSTOP_CKSPADDR12, 12 .EQU FLASH_CSSTOP_CKSPADDR11, 11 .EQU FLASH_CSSTOP_CKSPADDR10, 10 .EQU FLASH_CSSTOP_CKSPADDR9, 9 .EQU FLASH_CSSTOP_CKSPADDR8, 8 .EQU FLASH_CSSTOP_CKSPADDR7, 7 .EQU FLASH_CSSTOP_CKSPADDR6, 6 .EQU FLASH_CSSTOP_CKSPADDR5, 5 .EQU FLASH_CSSTOP_CKSPADDR4, 4 // register------------------------------------- .EQU FLASH_CSRES0, 0x40200140 // 0x4020 0140 FLASH_CSRES0 Bits------------------------------------- .EQU FLASH_CSRES0_CKSPRES0_31, 31 .EQU FLASH_CSRES0_CKSPRES0_30, 30 .EQU FLASH_CSRES0_CKSPRES0_29, 29 .EQU FLASH_CSRES0_CKSPRES0_28, 28 .EQU FLASH_CSRES0_CKSPRES0_27, 27 .EQU FLASH_CSRES0_CKSPRES0_26, 26 .EQU FLASH_CSRES0_CKSPRES0_25, 25 .EQU FLASH_CSRES0_CKSPRES0_24, 24 .EQU FLASH_CSRES0_CKSPRES0_23, 23 .EQU FLASH_CSRES0_CKSPRES0_22, 22 .EQU FLASH_CSRES0_CKSPRES0_21, 21 .EQU FLASH_CSRES0_CKSPRES0_20, 20 .EQU FLASH_CSRES0_CKSPRES0_19, 19 .EQU FLASH_CSRES0_CKSPRES0_18, 18 .EQU FLASH_CSRES0_CKSPRES0_17, 17 .EQU FLASH_CSRES0_CKSPRES0_16, 16 .EQU FLASH_CSRES0_CKSPRES0_15, 15 .EQU FLASH_CSRES0_CKSPRES0_14, 14 .EQU FLASH_CSRES0_CKSPRES0_13, 13 .EQU FLASH_CSRES0_CKSPRES0_12, 12 .EQU FLASH_CSRES0_CKSPRES0_11, 11 .EQU FLASH_CSRES0_CKSPRES0_10, 10 .EQU FLASH_CSRES0_CKSPRES0_9, 9 .EQU FLASH_CSRES0_CKSPRES0_8, 8 .EQU FLASH_CSRES0_CKSPRES0_7, 7 .EQU FLASH_CSRES0_CKSPRES0_6, 6 .EQU FLASH_CSRES0_CKSPRES0_5, 5 .EQU FLASH_CSRES0_CKSPRES0_4, 4 .EQU FLASH_CSRES0_CKSPRES0_3, 3 .EQU FLASH_CSRES0_CKSPRES0_2, 2 .EQU FLASH_CSRES0_CKSPRES0_1, 1 .EQU FLASH_CSRES0_CKSPRES0_0, 0 // register------------------------------------- .EQU FLASH_CSRES1, 0x40200144 // 0x4020 0144 FLASH_CSRES1 Bits------------------------------------- .EQU FLASH_CSRES1_CKSPRES1_31, 31 .EQU FLASH_CSRES1_CKSPRES1_30, 30 .EQU FLASH_CSRES1_CKSPRES1_29, 29 .EQU FLASH_CSRES1_CKSPRES1_28, 28 .EQU FLASH_CSRES1_CKSPRES1_27, 27 .EQU FLASH_CSRES1_CKSPRES1_26, 26 .EQU FLASH_CSRES1_CKSPRES1_25, 25 .EQU FLASH_CSRES1_CKSPRES1_24, 24 .EQU FLASH_CSRES1_CKSPRES1_23, 23 .EQU FLASH_CSRES1_CKSPRES1_22, 22 .EQU FLASH_CSRES1_CKSPRES1_21, 21 .EQU FLASH_CSRES1_CKSPRES1_20, 20 .EQU FLASH_CSRES1_CKSPRES1_19, 19 .EQU FLASH_CSRES1_CKSPRES1_18, 18 .EQU FLASH_CSRES1_CKSPRES1_17, 17 .EQU FLASH_CSRES1_CKSPRES1_16, 16 .EQU FLASH_CSRES1_CKSPRES1_15, 15 .EQU FLASH_CSRES1_CKSPRES1_14, 14 .EQU FLASH_CSRES1_CKSPRES1_13, 13 .EQU FLASH_CSRES1_CKSPRES1_12, 12 .EQU FLASH_CSRES1_CKSPRES1_11, 11 .EQU FLASH_CSRES1_CKSPRES1_10, 10 .EQU FLASH_CSRES1_CKSPRES1_9, 9 .EQU FLASH_CSRES1_CKSPRES1_8, 8 .EQU FLASH_CSRES1_CKSPRES1_7, 7 .EQU FLASH_CSRES1_CKSPRES1_6, 6 .EQU FLASH_CSRES1_CKSPRES1_5, 5 .EQU FLASH_CSRES1_CKSPRES1_4, 4 .EQU FLASH_CSRES1_CKSPRES1_3, 3 .EQU FLASH_CSRES1_CKSPRES1_2, 2 .EQU FLASH_CSRES1_CKSPRES1_1, 1 .EQU FLASH_CSRES1_CKSPRES1_0, 0 // register------------------------------------- .EQU FLASH_CSRES2, 0x40200148 // 0x4020 0148 FLASH_CSRES2 Bits------------------------------------- .EQU FLASH_CSRES2_CKSPRES2_31, 31 .EQU FLASH_CSRES2_CKSPRES2_30, 30 .EQU FLASH_CSRES2_CKSPRES2_29, 29 .EQU FLASH_CSRES2_CKSPRES2_28, 28 .EQU FLASH_CSRES2_CKSPRES2_27, 27 .EQU FLASH_CSRES2_CKSPRES2_26, 26 .EQU FLASH_CSRES2_CKSPRES2_25, 25 .EQU FLASH_CSRES2_CKSPRES2_24, 24 .EQU FLASH_CSRES2_CKSPRES2_23, 23 .EQU FLASH_CSRES2_CKSPRES2_22, 22 .EQU FLASH_CSRES2_CKSPRES2_21, 21 .EQU FLASH_CSRES2_CKSPRES2_20, 20 .EQU FLASH_CSRES2_CKSPRES2_19, 19 .EQU FLASH_CSRES2_CKSPRES2_18, 18 .EQU FLASH_CSRES2_CKSPRES2_17, 17 .EQU FLASH_CSRES2_CKSPRES2_16, 16 .EQU FLASH_CSRES2_CKSPRES2_15, 15 .EQU FLASH_CSRES2_CKSPRES2_14, 14 .EQU FLASH_CSRES2_CKSPRES2_13, 13 .EQU FLASH_CSRES2_CKSPRES2_12, 12 .EQU FLASH_CSRES2_CKSPRES2_11, 11 .EQU FLASH_CSRES2_CKSPRES2_10, 10 .EQU FLASH_CSRES2_CKSPRES2_9, 9 .EQU FLASH_CSRES2_CKSPRES2_8, 8 .EQU FLASH_CSRES2_CKSPRES2_7, 7 .EQU FLASH_CSRES2_CKSPRES2_6, 6 .EQU FLASH_CSRES2_CKSPRES2_5, 5 .EQU FLASH_CSRES2_CKSPRES2_4, 4 .EQU FLASH_CSRES2_CKSPRES2_3, 3 .EQU FLASH_CSRES2_CKSPRES2_2, 2 .EQU FLASH_CSRES2_CKSPRES2_1, 1 .EQU FLASH_CSRES2_CKSPRES2_0, 0 // register------------------------------------- .EQU FLASH_CSRES3, 0x4020014C // 0x4020 014C FLASH_CSRES3 Bits------------------------------------- .EQU FLASH_CSRES3_CKSPRES3_31, 31 .EQU FLASH_CSRES3_CKSPRES3_30, 30 .EQU FLASH_CSRES3_CKSPRES3_29, 29 .EQU FLASH_CSRES3_CKSPRES3_28, 28 .EQU FLASH_CSRES3_CKSPRES3_27, 27 .EQU FLASH_CSRES3_CKSPRES3_26, 26 .EQU FLASH_CSRES3_CKSPRES3_25, 25 .EQU FLASH_CSRES3_CKSPRES3_24, 24 .EQU FLASH_CSRES3_CKSPRES3_23, 23 .EQU FLASH_CSRES3_CKSPRES3_22, 22 .EQU FLASH_CSRES3_CKSPRES3_21, 21 .EQU FLASH_CSRES3_CKSPRES3_20, 20 .EQU FLASH_CSRES3_CKSPRES3_19, 19 .EQU FLASH_CSRES3_CKSPRES3_18, 18 .EQU FLASH_CSRES3_CKSPRES3_17, 17 .EQU FLASH_CSRES3_CKSPRES3_16, 16 .EQU FLASH_CSRES3_CKSPRES3_15, 15 .EQU FLASH_CSRES3_CKSPRES3_14, 14 .EQU FLASH_CSRES3_CKSPRES3_13, 13 .EQU FLASH_CSRES3_CKSPRES3_12, 12 .EQU FLASH_CSRES3_CKSPRES3_11, 11 .EQU FLASH_CSRES3_CKSPRES3_10, 10 .EQU FLASH_CSRES3_CKSPRES3_9, 9 .EQU FLASH_CSRES3_CKSPRES3_8, 8 .EQU FLASH_CSRES3_CKSPRES3_7, 7 .EQU FLASH_CSRES3_CKSPRES3_6, 6 .EQU FLASH_CSRES3_CKSPRES3_5, 5 .EQU FLASH_CSRES3_CKSPRES3_4, 4 .EQU FLASH_CSRES3_CKSPRES3_3, 3 .EQU FLASH_CSRES3_CKSPRES3_2, 2 .EQU FLASH_CSRES3_CKSPRES3_1, 1 .EQU FLASH_CSRES3_CKSPRES3_0, 0 // register------------------------------------- .EQU INT_EIE4, 0x40200300 // 0x4020 0300 INT_EIE4 Bits------------------------------------- .EQU INT_EIE4_HRCAP5IE, 4 .EQU INT_EIE4_HRCAP4IE, 3 .EQU INT_EIE4_HRCAP3IE, 2 .EQU INT_EIE4_CTOUCHIE, 1 .EQU INT_EIE4_QSPIIE, 0 // register------------------------------------- .EQU INT_EIF4, 0x40200304 // 0x4020 0304 INT_EIF4 Bits------------------------------------- .EQU INT_EIF4_HRCAP5IF, 4 .EQU INT_EIF4_HRCAP4IF, 3 .EQU INT_EIF4_HRCAP3IF, 2 .EQU INT_EIF4_CTOUCHIF, 1 .EQU INT_EIF4_QSPIIF, 0 // register------------------------------------- .EQU INT_IP27, 0x40200308 // 0x4020 0308 INT_IP27 Bits------------------------------------- .EQU INT_IP27_PRI115_7, 31 .EQU INT_IP27_PRI115_6, 30 .EQU INT_IP27_PRI115_5, 29 .EQU INT_IP27_PRI115_4, 28 .EQU INT_IP27_PRI115_3, 27 .EQU INT_IP27_PRI115_2, 26 .EQU INT_IP27_PRI115_1, 25 .EQU INT_IP27_PRI115_0, 24 .EQU INT_IP27_PRI114_7, 23 .EQU INT_IP27_PRI114_6, 22 .EQU INT_IP27_PRI114_5, 21 .EQU INT_IP27_PRI114_4, 20 .EQU INT_IP27_PRI114_3, 19 .EQU INT_IP27_PRI114_2, 18 .EQU INT_IP27_PRI114_1, 17 .EQU INT_IP27_PRI114_0, 16 .EQU INT_IP27_PRI113_7, 15 .EQU INT_IP27_PRI113_6, 14 .EQU INT_IP27_PRI113_5, 13 .EQU INT_IP27_PRI113_4, 12 .EQU INT_IP27_PRI113_3, 11 .EQU INT_IP27_PRI113_2, 10 .EQU INT_IP27_PRI113_1, 9 .EQU INT_IP27_PRI113_0, 8 .EQU INT_IP27_PRI112_7, 7 .EQU INT_IP27_PRI112_6, 6 .EQU INT_IP27_PRI112_5, 5 .EQU INT_IP27_PRI112_4, 4 .EQU INT_IP27_PRI112_3, 3 .EQU INT_IP27_PRI112_2, 2 .EQU INT_IP27_PRI112_1, 1 .EQU INT_IP27_PRI112_0, 0 // register------------------------------------- .EQU INT_IP28, 0x4020030C // 0x4020 030C INT_IP28 Bits------------------------------------- .EQU INT_IP28_PRI119_7, 31 .EQU INT_IP28_PRI119_6, 30 .EQU INT_IP28_PRI119_5, 29 .EQU INT_IP28_PRI119_4, 28 .EQU INT_IP28_PRI119_3, 27 .EQU INT_IP28_PRI119_2, 26 .EQU INT_IP28_PRI119_1, 25 .EQU INT_IP28_PRI119_0, 24 .EQU INT_IP28_PRI118_7, 23 .EQU INT_IP28_PRI118_6, 22 .EQU INT_IP28_PRI118_5, 21 .EQU INT_IP28_PRI118_4, 20 .EQU INT_IP28_PRI118_3, 19 .EQU INT_IP28_PRI118_2, 18 .EQU INT_IP28_PRI118_1, 17 .EQU INT_IP28_PRI118_0, 16 .EQU INT_IP28_PRI117_7, 15 .EQU INT_IP28_PRI117_6, 14 .EQU INT_IP28_PRI117_5, 13 .EQU INT_IP28_PRI117_4, 12 .EQU INT_IP28_PRI117_3, 11 .EQU INT_IP28_PRI117_2, 10 .EQU INT_IP28_PRI117_1, 9 .EQU INT_IP28_PRI117_0, 8 .EQU INT_IP28_PRI116_7, 7 .EQU INT_IP28_PRI116_6, 6 .EQU INT_IP28_PRI116_5, 5 .EQU INT_IP28_PRI116_4, 4 .EQU INT_IP28_PRI116_3, 3 .EQU INT_IP28_PRI116_2, 2 .EQU INT_IP28_PRI116_1, 1 .EQU INT_IP28_PRI116_0, 0 // register------------------------------------- .EQU INT_IP29, 0x40200310 // 0x4020 0310 INT_IP29 Bits------------------------------------- .EQU INT_IP29_PRI123_7, 31 .EQU INT_IP29_PRI123_6, 30 .EQU INT_IP29_PRI123_5, 29 .EQU INT_IP29_PRI123_4, 28 .EQU INT_IP29_PRI123_3, 27 .EQU INT_IP29_PRI123_2, 26 .EQU INT_IP29_PRI123_1, 25 .EQU INT_IP29_PRI123_0, 24 .EQU INT_IP29_PRI122_7, 23 .EQU INT_IP29_PRI122_6, 22 .EQU INT_IP29_PRI122_5, 21 .EQU INT_IP29_PRI122_4, 20 .EQU INT_IP29_PRI122_3, 19 .EQU INT_IP29_PRI122_2, 18 .EQU INT_IP29_PRI122_1, 17 .EQU INT_IP29_PRI122_0, 16 .EQU INT_IP29_PRI121_7, 15 .EQU INT_IP29_PRI121_6, 14 .EQU INT_IP29_PRI121_5, 13 .EQU INT_IP29_PRI121_4, 12 .EQU INT_IP29_PRI121_3, 11 .EQU INT_IP29_PRI121_2, 10 .EQU INT_IP29_PRI121_1, 9 .EQU INT_IP29_PRI121_0, 8 .EQU INT_IP29_PRI120_7, 7 .EQU INT_IP29_PRI120_6, 6 .EQU INT_IP29_PRI120_5, 5 .EQU INT_IP29_PRI120_4, 4 .EQU INT_IP29_PRI120_3, 3 .EQU INT_IP29_PRI120_2, 2 .EQU INT_IP29_PRI120_1, 1 .EQU INT_IP29_PRI120_0, 0 // register------------------------------------- .EQU INT_IP30, 0x40200314 // 0x4020 0314 INT_IP30 Bits------------------------------------- .EQU INT_IP30_PRI127_7, 31 .EQU INT_IP30_PRI127_6, 30 .EQU INT_IP30_PRI127_5, 29 .EQU INT_IP30_PRI127_4, 28 .EQU INT_IP30_PRI127_3, 27 .EQU INT_IP30_PRI127_2, 26 .EQU INT_IP30_PRI127_1, 25 .EQU INT_IP30_PRI127_0, 24 .EQU INT_IP30_PRI126_7, 23 .EQU INT_IP30_PRI126_6, 22 .EQU INT_IP30_PRI126_5, 21 .EQU INT_IP30_PRI126_4, 20 .EQU INT_IP30_PRI126_3, 19 .EQU INT_IP30_PRI126_2, 18 .EQU INT_IP30_PRI126_1, 17 .EQU INT_IP30_PRI126_0, 16 .EQU INT_IP30_PRI125_7, 15 .EQU INT_IP30_PRI125_6, 14 .EQU INT_IP30_PRI125_5, 13 .EQU INT_IP30_PRI125_4, 12 .EQU INT_IP30_PRI125_3, 11 .EQU INT_IP30_PRI125_2, 10 .EQU INT_IP30_PRI125_1, 9 .EQU INT_IP30_PRI125_0, 8 .EQU INT_IP30_PRI124_7, 7 .EQU INT_IP30_PRI124_6, 6 .EQU INT_IP30_PRI124_5, 5 .EQU INT_IP30_PRI124_4, 4 .EQU INT_IP30_PRI124_3, 3 .EQU INT_IP30_PRI124_2, 2 .EQU INT_IP30_PRI124_1, 1 .EQU INT_IP30_PRI124_0, 0 // register------------------------------------- .EQU GPIOA_PIR, 0x50000000 // 0x5000 0000 GPIOA_PIR Bits------------------------------------- .EQU GPIOA_PIR_PXDIR15, 15 .EQU GPIOA_PIR_PXDIR14, 14 .EQU GPIOA_PIR_PXDIR13, 13 .EQU GPIOA_PIR_PXDIR12, 12 .EQU GPIOA_PIR_PXDIR11, 11 .EQU GPIOA_PIR_PXDIR10, 10 .EQU GPIOA_PIR_PXDIR9, 9 .EQU GPIOA_PIR_PXDIR8, 8 .EQU GPIOA_PIR_PXDIR7, 7 .EQU GPIOA_PIR_PXDIR6, 6 .EQU GPIOA_PIR_PXDIR5, 5 .EQU GPIOA_PIR_PXDIR4, 4 .EQU GPIOA_PIR_PXDIR3, 3 .EQU GPIOA_PIR_PXDIR2, 2 .EQU GPIOA_PIR_PXDIR1, 1 .EQU GPIOA_PIR_PXDIR0, 0 // register------------------------------------- .EQU GPIOA_POR, 0x50000004 // 0x5000 0004 GPIOA_POR Bits------------------------------------- .EQU GPIOA_POR_PXPOR15, 15 .EQU GPIOA_POR_PXPOR14, 14 .EQU GPIOA_POR_PXPOR13, 13 .EQU GPIOA_POR_PXPOR12, 12 .EQU GPIOA_POR_PXPOR11, 11 .EQU GPIOA_POR_PXPOR10, 10 .EQU GPIOA_POR_PXPOR9, 9 .EQU GPIOA_POR_PXPOR8, 8 .EQU GPIOA_POR_PXPOR7, 7 .EQU GPIOA_POR_PXPOR6, 6 .EQU GPIOA_POR_PXPOR5, 5 .EQU GPIOA_POR_PXPOR4, 4 .EQU GPIOA_POR_PXPOR3, 3 .EQU GPIOA_POR_PXPOR2, 2 .EQU GPIOA_POR_PXPOR1, 1 .EQU GPIOA_POR_PXPOR0, 0 // register------------------------------------- .EQU GPIOA_PUR, 0x50000008 // 0x5000 0008 GPIOA_PUR Bits------------------------------------- .EQU GPIOA_PUR_PXPUR15, 15 .EQU GPIOA_PUR_PXPUR14, 14 .EQU GPIOA_PUR_PXPUR13, 13 .EQU GPIOA_PUR_PXPUR12, 12 .EQU GPIOA_PUR_PXPUR11, 11 .EQU GPIOA_PUR_PXPUR10, 10 .EQU GPIOA_PUR_PXPUR9, 9 .EQU GPIOA_PUR_PXPUR8, 8 .EQU GPIOA_PUR_PXPUR7, 7 .EQU GPIOA_PUR_PXPUR6, 6 .EQU GPIOA_PUR_PXPUR5, 5 .EQU GPIOA_PUR_PXPUR4, 4 .EQU GPIOA_PUR_PXPUR3, 3 .EQU GPIOA_PUR_PXPUR2, 2 .EQU GPIOA_PUR_PXPUR1, 1 .EQU GPIOA_PUR_PXPUR0, 0 // register------------------------------------- .EQU GPIOA_PDR, 0x5000000C // 0x5000 000C GPIOA_PDR Bits------------------------------------- .EQU GPIOA_PDR_PXPDR15, 15 .EQU GPIOA_PDR_PXPDR14, 14 .EQU GPIOA_PDR_PXPDR13, 13 .EQU GPIOA_PDR_PXPDR12, 12 .EQU GPIOA_PDR_PXPDR11, 11 .EQU GPIOA_PDR_PXPDR10, 10 .EQU GPIOA_PDR_PXPDR9, 9 .EQU GPIOA_PDR_PXPDR8, 8 .EQU GPIOA_PDR_PXPDR7, 7 .EQU GPIOA_PDR_PXPDR6, 6 .EQU GPIOA_PDR_PXPDR5, 5 .EQU GPIOA_PDR_PXPDR4, 4 .EQU GPIOA_PDR_PXPDR3, 3 .EQU GPIOA_PDR_PXPDR2, 2 .EQU GPIOA_PDR_PXPDR1, 1 .EQU GPIOA_PDR_PXPDR0, 0 // register------------------------------------- .EQU GPIOA_PODR, 0x50000010 // 0x5000 0010 GPIOA_PODR Bits------------------------------------- .EQU GPIOA_PODR_PXPODR15, 15 .EQU GPIOA_PODR_PXPODR14, 14 .EQU GPIOA_PODR_PXPODR13, 13 .EQU GPIOA_PODR_PXPODR12, 12 .EQU GPIOA_PODR_PXPODR11, 11 .EQU GPIOA_PODR_PXPODR10, 10 .EQU GPIOA_PODR_PXPODR9, 9 .EQU GPIOA_PODR_PXPODR8, 8 .EQU GPIOA_PODR_PXPODR7, 7 .EQU GPIOA_PODR_PXPODR6, 6 .EQU GPIOA_PODR_PXPODR5, 5 .EQU GPIOA_PODR_PXPODR4, 4 .EQU GPIOA_PODR_PXPODR3, 3 .EQU GPIOA_PODR_PXPODR2, 2 .EQU GPIOA_PODR_PXPODR1, 1 .EQU GPIOA_PODR_PXPODR0, 0 // register------------------------------------- .EQU GPIOA_PMOD, 0x50000014 // 0x5000 0014 GPIOA_PMOD Bits------------------------------------- .EQU GPIOA_PMOD_PXPMD15_1, 31 .EQU GPIOA_PMOD_PXPMD15_0, 30 .EQU GPIOA_PMOD_PXPMD14_1, 29 .EQU GPIOA_PMOD_PXPMD14_0, 28 .EQU GPIOA_PMOD_PXPMD13_1, 27 .EQU GPIOA_PMOD_PXPMD13_0, 26 .EQU GPIOA_PMOD_PXPMD12_1, 25 .EQU GPIOA_PMOD_PXPMD12_0, 24 .EQU GPIOA_PMOD_PXPMD11_1, 23 .EQU GPIOA_PMOD_PXPMD11_0, 22 .EQU GPIOA_PMOD_PXPMD10_1, 21 .EQU GPIOA_PMOD_PXPMD10_0, 20 .EQU GPIOA_PMOD_PXPMD9_1, 19 .EQU GPIOA_PMOD_PXPMD9_0, 18 .EQU GPIOA_PMOD_PXPMD8_1, 17 .EQU GPIOA_PMOD_PXPMD8_0, 16 .EQU GPIOA_PMOD_PXPMD7_1, 15 .EQU GPIOA_PMOD_PXPMD7_0, 14 .EQU GPIOA_PMOD_PXPMD6_1, 13 .EQU GPIOA_PMOD_PXPMD6_0, 12 .EQU GPIOA_PMOD_PXPMD5_1, 11 .EQU GPIOA_PMOD_PXPMD5_0, 10 .EQU GPIOA_PMOD_PXPMD4_1, 9 .EQU GPIOA_PMOD_PXPMD4_0, 8 .EQU GPIOA_PMOD_PXPMD3_1, 7 .EQU GPIOA_PMOD_PXPMD3_0, 6 .EQU GPIOA_PMOD_PXPMD2_1, 5 .EQU GPIOA_PMOD_PXPMD2_0, 4 .EQU GPIOA_PMOD_PXPMD1_1, 3 .EQU GPIOA_PMOD_PXPMD1_0, 2 .EQU GPIOA_PMOD_PXPMD0_1, 1 .EQU GPIOA_PMOD_PXPMD0_0, 0 // register------------------------------------- .EQU GPIOA_OMOD, 0x50000018 // 0x5000 0018 GPIOA_OMOD Bits------------------------------------- .EQU GPIOA_OMOD_PXOMD15, 30 .EQU GPIOA_OMOD_PXOMD14, 28 .EQU GPIOA_OMOD_PXOMD13, 26 .EQU GPIOA_OMOD_PXOMD12, 24 .EQU GPIOA_OMOD_PXOMD11, 22 .EQU GPIOA_OMOD_PXOMD10, 20 .EQU GPIOA_OMOD_PXOMD9, 18 .EQU GPIOA_OMOD_PXOMD8, 16 .EQU GPIOA_OMOD_PXOMD7, 14 .EQU GPIOA_OMOD_PXOMD6, 12 .EQU GPIOA_OMOD_PXOMD5, 10 .EQU GPIOA_OMOD_PXOMD4, 8 .EQU GPIOA_OMOD_PXOMD3, 6 .EQU GPIOA_OMOD_PXOMD2, 4 .EQU GPIOA_OMOD_PXOMD1, 2 .EQU GPIOA_OMOD_PXOMD0, 0 // register------------------------------------- .EQU GPIOA_LOCK, 0x5000001C // 0x5000 001C GPIOA_LOCK Bits------------------------------------- .EQU GPIOA_LOCK_PXLCKKEY15, 31 .EQU GPIOA_LOCK_PXLCKKEY14, 30 .EQU GPIOA_LOCK_PXLCKKEY13, 29 .EQU GPIOA_LOCK_PXLCKKEY12, 28 .EQU GPIOA_LOCK_PXLCKKEY11, 27 .EQU GPIOA_LOCK_PXLCKKEY10, 26 .EQU GPIOA_LOCK_PXLCKKEY9, 25 .EQU GPIOA_LOCK_PXLCKKEY8, 24 .EQU GPIOA_LOCK_PXLCKKEY7, 23 .EQU GPIOA_LOCK_PXLCKKEY6, 22 .EQU GPIOA_LOCK_PXLCKKEY5, 21 .EQU GPIOA_LOCK_PXLCKKEY4, 20 .EQU GPIOA_LOCK_PXLCKKEY3, 19 .EQU GPIOA_LOCK_PXLCKKEY2, 18 .EQU GPIOA_LOCK_PXLCKKEY1, 17 .EQU GPIOA_LOCK_PXLCKKEY0, 16 .EQU GPIOA_LOCK_PXLCK15, 15 .EQU GPIOA_LOCK_PXLCK14, 14 .EQU GPIOA_LOCK_PXLCK13, 13 .EQU GPIOA_LOCK_PXLCK12, 12 .EQU GPIOA_LOCK_PXLCK11, 11 .EQU GPIOA_LOCK_PXLCK10, 10 .EQU GPIOA_LOCK_PXLCK9, 9 .EQU GPIOA_LOCK_PXLCK8, 8 .EQU GPIOA_LOCK_PXLCK7, 7 .EQU GPIOA_LOCK_PXLCK6, 6 .EQU GPIOA_LOCK_PXLCK5, 5 .EQU GPIOA_LOCK_PXLCK4, 4 .EQU GPIOA_LOCK_PXLCK3, 3 .EQU GPIOA_LOCK_PXLCK2, 2 .EQU GPIOA_LOCK_PXLCK1, 1 .EQU GPIOA_LOCK_PXLCK0, 0 // register------------------------------------- .EQU GPIOA_RMPL, 0x50000020 // 0x5000 0020 GPIOA_RMPL Bits------------------------------------- .EQU GPIOA_RMPL_PXRMP7_3, 31 .EQU GPIOA_RMPL_PXRMP7_2, 30 .EQU GPIOA_RMPL_PXRMP7_1, 29 .EQU GPIOA_RMPL_PXRMP7_0, 28 .EQU GPIOA_RMPL_PXRMP6_3, 27 .EQU GPIOA_RMPL_PXRMP6_2, 26 .EQU GPIOA_RMPL_PXRMP6_1, 25 .EQU GPIOA_RMPL_PXRMP6_0, 24 .EQU GPIOA_RMPL_PXRMP5_3, 23 .EQU GPIOA_RMPL_PXRMP5_2, 22 .EQU GPIOA_RMPL_PXRMP5_1, 21 .EQU GPIOA_RMPL_PXRMP5_0, 20 .EQU GPIOA_RMPL_PXRMP4_3, 19 .EQU GPIOA_RMPL_PXRMP4_2, 18 .EQU GPIOA_RMPL_PXRMP4_1, 17 .EQU GPIOA_RMPL_PXRMP4_0, 16 .EQU GPIOA_RMPL_PXRMP3_3, 15 .EQU GPIOA_RMPL_PXRMP3_2, 14 .EQU GPIOA_RMPL_PXRMP3_1, 13 .EQU GPIOA_RMPL_PXRMP3_0, 12 .EQU GPIOA_RMPL_PXRMP2_3, 11 .EQU GPIOA_RMPL_PXRMP2_2, 10 .EQU GPIOA_RMPL_PXRMP2_1, 9 .EQU GPIOA_RMPL_PXRMP2_0, 8 .EQU GPIOA_RMPL_PXRMP1_3, 7 .EQU GPIOA_RMPL_PXRMP1_2, 6 .EQU GPIOA_RMPL_PXRMP1_1, 5 .EQU GPIOA_RMPL_PXRMP1_0, 4 .EQU GPIOA_RMPL_PXRMP0_3, 3 .EQU GPIOA_RMPL_PXRMP0_2, 2 .EQU GPIOA_RMPL_PXRMP0_1, 1 .EQU GPIOA_RMPL_PXRMP0_0, 0 // register------------------------------------- .EQU GPIOA_RMPH, 0x50000024 // 0x5000 0024 GPIOA_RMPH Bits------------------------------------- .EQU GPIOA_RMPH_PXRMP15_3, 31 .EQU GPIOA_RMPH_PXRMP15_2, 30 .EQU GPIOA_RMPH_PXRMP15_1, 29 .EQU GPIOA_RMPH_PXRMP15_0, 28 .EQU GPIOA_RMPH_PXRMP14_3, 27 .EQU GPIOA_RMPH_PXRMP14_2, 26 .EQU GPIOA_RMPH_PXRMP14_1, 25 .EQU GPIOA_RMPH_PXRMP14_0, 24 .EQU GPIOA_RMPH_PXRMP13_3, 23 .EQU GPIOA_RMPH_PXRMP13_2, 22 .EQU GPIOA_RMPH_PXRMP13_1, 21 .EQU GPIOA_RMPH_PXRMP13_0, 20 .EQU GPIOA_RMPH_PXRMP12_3, 19 .EQU GPIOA_RMPH_PXRMP12_2, 18 .EQU GPIOA_RMPH_PXRMP12_1, 17 .EQU GPIOA_RMPH_PXRMP12_0, 16 .EQU GPIOA_RMPH_PXRMP11_3, 15 .EQU GPIOA_RMPH_PXRMP11_2, 14 .EQU GPIOA_RMPH_PXRMP11_1, 13 .EQU GPIOA_RMPH_PXRMP11_0, 12 .EQU GPIOA_RMPH_PXRMP10_3, 11 .EQU GPIOA_RMPH_PXRMP10_2, 10 .EQU GPIOA_RMPH_PXRMP10_1, 9 .EQU GPIOA_RMPH_PXRMP10_0, 8 .EQU GPIOA_RMPH_PXRMP9_3, 7 .EQU GPIOA_RMPH_PXRMP9_2, 6 .EQU GPIOA_RMPH_PXRMP9_1, 5 .EQU GPIOA_RMPH_PXRMP9_0, 4 .EQU GPIOA_RMPH_PXRMP8_3, 3 .EQU GPIOA_RMPH_PXRMP8_2, 2 .EQU GPIOA_RMPH_PXRMP8_1, 1 .EQU GPIOA_RMPH_PXRMP8_0, 0 // register------------------------------------- .EQU GPIOA_RMP_MSB, 0x50000034 // 0x5000 0034 GPIOA_RMP_MSB Bits------------------------------------- .EQU GPIOA_RMP_MSB_RMPMSB31, 31 .EQU GPIOA_RMP_MSB_RMPMSB30, 30 .EQU GPIOA_RMP_MSB_RMPMSB29, 29 .EQU GPIOA_RMP_MSB_RMPMSB28, 28 .EQU GPIOA_RMP_MSB_RMPMSB27, 27 .EQU GPIOA_RMP_MSB_RMPMSB26, 26 .EQU GPIOA_RMP_MSB_RMPMSB25, 25 .EQU GPIOA_RMP_MSB_RMPMSB24, 24 .EQU GPIOA_RMP_MSB_RMPMSB23, 23 .EQU GPIOA_RMP_MSB_RMPMSB22, 22 .EQU GPIOA_RMP_MSB_RMPMSB21, 21 .EQU GPIOA_RMP_MSB_RMPMSB20, 20 .EQU GPIOA_RMP_MSB_RMPMSB19, 19 .EQU GPIOA_RMP_MSB_RMPMSB18, 18 .EQU GPIOA_RMP_MSB_RMPMSB17, 17 .EQU GPIOA_RMP_MSB_RMPMSB16, 16 .EQU GPIOA_RMP_MSB_RMPMSB15, 15 .EQU GPIOA_RMP_MSB_RMPMSB14, 14 .EQU GPIOA_RMP_MSB_RMPMSB13, 13 .EQU GPIOA_RMP_MSB_RMPMSB12, 12 .EQU GPIOA_RMP_MSB_RMPMSB11, 11 .EQU GPIOA_RMP_MSB_RMPMSB10, 10 .EQU GPIOA_RMP_MSB_RMPMSB9, 9 .EQU GPIOA_RMP_MSB_RMPMSB8, 8 .EQU GPIOA_RMP_MSB_RMPMSB7, 7 .EQU GPIOA_RMP_MSB_RMPMSB6, 6 .EQU GPIOA_RMP_MSB_RMPMSB5, 5 .EQU GPIOA_RMP_MSB_RMPMSB4, 4 .EQU GPIOA_RMP_MSB_RMPMSB3, 3 .EQU GPIOA_RMP_MSB_RMPMSB2, 2 .EQU GPIOA_RMP_MSB_RMPMSB1, 1 .EQU GPIOA_RMP_MSB_RMPMSB0, 0 // register------------------------------------- .EQU GPIOA_SDE, 0x50000038 // 0x5000 0038 GPIOA_SDE Bits------------------------------------- .EQU GPIOA_SDE_SDEF15, 31 .EQU GPIOA_SDE_SDEF14, 30 .EQU GPIOA_SDE_SDEF13, 29 .EQU GPIOA_SDE_SDEF12, 28 .EQU GPIOA_SDE_SDEF11, 27 .EQU GPIOA_SDE_SDEF10, 26 .EQU GPIOA_SDE_SDEF9, 25 .EQU GPIOA_SDE_SDEF8, 24 .EQU GPIOA_SDE_SDEF7, 23 .EQU GPIOA_SDE_SDEF6, 22 .EQU GPIOA_SDE_SDEF5, 21 .EQU GPIOA_SDE_SDEF4, 20 .EQU GPIOA_SDE_SDEF3, 19 .EQU GPIOA_SDE_SDEF2, 18 .EQU GPIOA_SDE_SDEF1, 17 .EQU GPIOA_SDE_SDEF0, 16 .EQU GPIOA_SDE_SDEN15, 15 .EQU GPIOA_SDE_SDEN14, 14 .EQU GPIOA_SDE_SDEN13, 13 .EQU GPIOA_SDE_SDEN12, 12 .EQU GPIOA_SDE_SDEN11, 11 .EQU GPIOA_SDE_SDEN10, 10 .EQU GPIOA_SDE_SDEN9, 9 .EQU GPIOA_SDE_SDEN8, 8 .EQU GPIOA_SDE_SDEN7, 7 .EQU GPIOA_SDE_SDEN6, 6 .EQU GPIOA_SDE_SDEN5, 5 .EQU GPIOA_SDE_SDEN4, 4 .EQU GPIOA_SDE_SDEN3, 3 .EQU GPIOA_SDE_SDEN2, 2 .EQU GPIOA_SDE_SDEN1, 1 .EQU GPIOA_SDE_SDEN0, 0 // register------------------------------------- .EQU GPIOA_SDCTL, 0x5000003C // 0x5000 003C GPIOA_SDCTL Bits------------------------------------- .EQU GPIOA_SDCTL_PSDEF, 2 .EQU GPIOA_SDCTL_LINKEN, 1 .EQU GPIOA_SDCTL_SWSAMCLK, 0 // register------------------------------------- .EQU GPIOB_PIR, 0x50000040 // 0x5000 0040 GPIOB_PIR Bits------------------------------------- .EQU GPIOB_PIR_PXDIR15, 15 .EQU GPIOB_PIR_PXDIR14, 14 .EQU GPIOB_PIR_PXDIR13, 13 .EQU GPIOB_PIR_PXDIR12, 12 .EQU GPIOB_PIR_PXDIR11, 11 .EQU GPIOB_PIR_PXDIR10, 10 .EQU GPIOB_PIR_PXDIR9, 9 .EQU GPIOB_PIR_PXDIR8, 8 .EQU GPIOB_PIR_PXDIR7, 7 .EQU GPIOB_PIR_PXDIR6, 6 .EQU GPIOB_PIR_PXDIR5, 5 .EQU GPIOB_PIR_PXDIR4, 4 .EQU GPIOB_PIR_PXDIR3, 3 .EQU GPIOB_PIR_PXDIR2, 2 .EQU GPIOB_PIR_PXDIR1, 1 .EQU GPIOB_PIR_PXDIR0, 0 // register------------------------------------- .EQU GPIOB_POR, 0x50000044 // 0x5000 0044 GPIOB_POR Bits------------------------------------- .EQU GPIOB_POR_PXPOR15, 15 .EQU GPIOB_POR_PXPOR14, 14 .EQU GPIOB_POR_PXPOR13, 13 .EQU GPIOB_POR_PXPOR12, 12 .EQU GPIOB_POR_PXPOR11, 11 .EQU GPIOB_POR_PXPOR10, 10 .EQU GPIOB_POR_PXPOR9, 9 .EQU GPIOB_POR_PXPOR8, 8 .EQU GPIOB_POR_PXPOR7, 7 .EQU GPIOB_POR_PXPOR6, 6 .EQU GPIOB_POR_PXPOR5, 5 .EQU GPIOB_POR_PXPOR4, 4 .EQU GPIOB_POR_PXPOR3, 3 .EQU GPIOB_POR_PXPOR2, 2 .EQU GPIOB_POR_PXPOR1, 1 .EQU GPIOB_POR_PXPOR0, 0 // register------------------------------------- .EQU GPIOB_PUR, 0x50000048 // 0x5000 0048 GPIOB_PUR Bits------------------------------------- .EQU GPIOB_PUR_PXPUR15, 15 .EQU GPIOB_PUR_PXPUR14, 14 .EQU GPIOB_PUR_PXPUR13, 13 .EQU GPIOB_PUR_PXPUR12, 12 .EQU GPIOB_PUR_PXPUR11, 11 .EQU GPIOB_PUR_PXPUR10, 10 .EQU GPIOB_PUR_PXPUR9, 9 .EQU GPIOB_PUR_PXPUR8, 8 .EQU GPIOB_PUR_PXPUR7, 7 .EQU GPIOB_PUR_PXPUR6, 6 .EQU GPIOB_PUR_PXPUR5, 5 .EQU GPIOB_PUR_PXPUR4, 4 .EQU GPIOB_PUR_PXPUR3, 3 .EQU GPIOB_PUR_PXPUR2, 2 .EQU GPIOB_PUR_PXPUR1, 1 .EQU GPIOB_PUR_PXPUR0, 0 // register------------------------------------- .EQU GPIOB_PDR, 0x5000004C // 0x5000 004C GPIOB_PDR Bits------------------------------------- .EQU GPIOB_PDR_PXPDR15, 15 .EQU GPIOB_PDR_PXPDR14, 14 .EQU GPIOB_PDR_PXPDR13, 13 .EQU GPIOB_PDR_PXPDR12, 12 .EQU GPIOB_PDR_PXPDR11, 11 .EQU GPIOB_PDR_PXPDR10, 10 .EQU GPIOB_PDR_PXPDR9, 9 .EQU GPIOB_PDR_PXPDR8, 8 .EQU GPIOB_PDR_PXPDR7, 7 .EQU GPIOB_PDR_PXPDR6, 6 .EQU GPIOB_PDR_PXPDR5, 5 .EQU GPIOB_PDR_PXPDR4, 4 .EQU GPIOB_PDR_PXPDR3, 3 .EQU GPIOB_PDR_PXPDR2, 2 .EQU GPIOB_PDR_PXPDR1, 1 .EQU GPIOB_PDR_PXPDR0, 0 // register------------------------------------- .EQU GPIOB_PODR, 0x50000050 // 0x5000 0050 GPIOB_PODR Bits------------------------------------- .EQU GPIOB_PODR_PXPODR15, 15 .EQU GPIOB_PODR_PXPODR14, 14 .EQU GPIOB_PODR_PXPODR13, 13 .EQU GPIOB_PODR_PXPODR12, 12 .EQU GPIOB_PODR_PXPODR11, 11 .EQU GPIOB_PODR_PXPODR10, 10 .EQU GPIOB_PODR_PXPODR9, 9 .EQU GPIOB_PODR_PXPODR8, 8 .EQU GPIOB_PODR_PXPODR7, 7 .EQU GPIOB_PODR_PXPODR6, 6 .EQU GPIOB_PODR_PXPODR5, 5 .EQU GPIOB_PODR_PXPODR4, 4 .EQU GPIOB_PODR_PXPODR3, 3 .EQU GPIOB_PODR_PXPODR2, 2 .EQU GPIOB_PODR_PXPODR1, 1 .EQU GPIOB_PODR_PXPODR0, 0 // register------------------------------------- .EQU GPIOB_PMOD, 0x50000054 // 0x5000 0054 GPIOB_PMOD Bits------------------------------------- .EQU GPIOB_PMOD_PXPMD15_1, 31 .EQU GPIOB_PMOD_PXPMD15_0, 30 .EQU GPIOB_PMOD_PXPMD14_1, 29 .EQU GPIOB_PMOD_PXPMD14_0, 28 .EQU GPIOB_PMOD_PXPMD13_1, 27 .EQU GPIOB_PMOD_PXPMD13_0, 26 .EQU GPIOB_PMOD_PXPMD12_1, 25 .EQU GPIOB_PMOD_PXPMD12_0, 24 .EQU GPIOB_PMOD_PXPMD11_1, 23 .EQU GPIOB_PMOD_PXPMD11_0, 22 .EQU GPIOB_PMOD_PXPMD10_1, 21 .EQU GPIOB_PMOD_PXPMD10_0, 20 .EQU GPIOB_PMOD_PXPMD9_1, 19 .EQU GPIOB_PMOD_PXPMD9_0, 18 .EQU GPIOB_PMOD_PXPMD8_1, 17 .EQU GPIOB_PMOD_PXPMD8_0, 16 .EQU GPIOB_PMOD_PXPMD7_1, 15 .EQU GPIOB_PMOD_PXPMD7_0, 14 .EQU GPIOB_PMOD_PXPMD6_1, 13 .EQU GPIOB_PMOD_PXPMD6_0, 12 .EQU GPIOB_PMOD_PXPMD5_1, 11 .EQU GPIOB_PMOD_PXPMD5_0, 10 .EQU GPIOB_PMOD_PXPMD4_1, 9 .EQU GPIOB_PMOD_PXPMD4_0, 8 .EQU GPIOB_PMOD_PXPMD3_1, 7 .EQU GPIOB_PMOD_PXPMD3_0, 6 .EQU GPIOB_PMOD_PXPMD2_1, 5 .EQU GPIOB_PMOD_PXPMD2_0, 4 .EQU GPIOB_PMOD_PXPMD1_1, 3 .EQU GPIOB_PMOD_PXPMD1_0, 2 .EQU GPIOB_PMOD_PXPMD0_1, 1 .EQU GPIOB_PMOD_PXPMD0_0, 0 // register------------------------------------- .EQU GPIOB_OMOD, 0x50000058 // 0x5000 0058 GPIOB_OMOD Bits------------------------------------- .EQU GPIOB_OMOD_PXOMD15, 30 .EQU GPIOB_OMOD_PXOMD14, 28 .EQU GPIOB_OMOD_PXOMD13, 26 .EQU GPIOB_OMOD_PXOMD12, 24 .EQU GPIOB_OMOD_PXOMD11, 22 .EQU GPIOB_OMOD_PXOMD10, 20 .EQU GPIOB_OMOD_PXOMD9, 18 .EQU GPIOB_OMOD_PXOMD8, 16 .EQU GPIOB_OMOD_PXOMD7, 14 .EQU GPIOB_OMOD_PXOMD6, 12 .EQU GPIOB_OMOD_PXOMD5, 10 .EQU GPIOB_OMOD_PXOMD4, 8 .EQU GPIOB_OMOD_PXOMD3, 6 .EQU GPIOB_OMOD_PXOMD2, 4 .EQU GPIOB_OMOD_PXOMD1, 2 .EQU GPIOB_OMOD_PXOMD0, 0 // register------------------------------------- .EQU GPIOB_LOCK, 0x5000005C // 0x5000 005C GPIOB_LOCK Bits------------------------------------- .EQU GPIOB_LOCK_PXLCKKEY15, 31 .EQU GPIOB_LOCK_PXLCKKEY14, 30 .EQU GPIOB_LOCK_PXLCKKEY13, 29 .EQU GPIOB_LOCK_PXLCKKEY12, 28 .EQU GPIOB_LOCK_PXLCKKEY11, 27 .EQU GPIOB_LOCK_PXLCKKEY10, 26 .EQU GPIOB_LOCK_PXLCKKEY9, 25 .EQU GPIOB_LOCK_PXLCKKEY8, 24 .EQU GPIOB_LOCK_PXLCKKEY7, 23 .EQU GPIOB_LOCK_PXLCKKEY6, 22 .EQU GPIOB_LOCK_PXLCKKEY5, 21 .EQU GPIOB_LOCK_PXLCKKEY4, 20 .EQU GPIOB_LOCK_PXLCKKEY3, 19 .EQU GPIOB_LOCK_PXLCKKEY2, 18 .EQU GPIOB_LOCK_PXLCKKEY1, 17 .EQU GPIOB_LOCK_PXLCKKEY0, 16 .EQU GPIOB_LOCK_PXLCK15, 15 .EQU GPIOB_LOCK_PXLCK14, 14 .EQU GPIOB_LOCK_PXLCK13, 13 .EQU GPIOB_LOCK_PXLCK12, 12 .EQU GPIOB_LOCK_PXLCK11, 11 .EQU GPIOB_LOCK_PXLCK10, 10 .EQU GPIOB_LOCK_PXLCK9, 9 .EQU GPIOB_LOCK_PXLCK8, 8 .EQU GPIOB_LOCK_PXLCK7, 7 .EQU GPIOB_LOCK_PXLCK6, 6 .EQU GPIOB_LOCK_PXLCK5, 5 .EQU GPIOB_LOCK_PXLCK4, 4 .EQU GPIOB_LOCK_PXLCK3, 3 .EQU GPIOB_LOCK_PXLCK2, 2 .EQU GPIOB_LOCK_PXLCK1, 1 .EQU GPIOB_LOCK_PXLCK0, 0 // register------------------------------------- .EQU GPIOB_RMPL, 0x50000060 // 0x5000 0060 GPIOB_RMPL Bits------------------------------------- .EQU GPIOB_RMPL_PXRMP7_3, 31 .EQU GPIOB_RMPL_PXRMP7_2, 30 .EQU GPIOB_RMPL_PXRMP7_1, 29 .EQU GPIOB_RMPL_PXRMP7_0, 28 .EQU GPIOB_RMPL_PXRMP6_3, 27 .EQU GPIOB_RMPL_PXRMP6_2, 26 .EQU GPIOB_RMPL_PXRMP6_1, 25 .EQU GPIOB_RMPL_PXRMP6_0, 24 .EQU GPIOB_RMPL_PXRMP5_3, 23 .EQU GPIOB_RMPL_PXRMP5_2, 22 .EQU GPIOB_RMPL_PXRMP5_1, 21 .EQU GPIOB_RMPL_PXRMP5_0, 20 .EQU GPIOB_RMPL_PXRMP4_3, 19 .EQU GPIOB_RMPL_PXRMP4_2, 18 .EQU GPIOB_RMPL_PXRMP4_1, 17 .EQU GPIOB_RMPL_PXRMP4_0, 16 .EQU GPIOB_RMPL_PXRMP3_3, 15 .EQU GPIOB_RMPL_PXRMP3_2, 14 .EQU GPIOB_RMPL_PXRMP3_1, 13 .EQU GPIOB_RMPL_PXRMP3_0, 12 .EQU GPIOB_RMPL_PXRMP2_3, 11 .EQU GPIOB_RMPL_PXRMP2_2, 10 .EQU GPIOB_RMPL_PXRMP2_1, 9 .EQU GPIOB_RMPL_PXRMP2_0, 8 .EQU GPIOB_RMPL_PXRMP1_3, 7 .EQU GPIOB_RMPL_PXRMP1_2, 6 .EQU GPIOB_RMPL_PXRMP1_1, 5 .EQU GPIOB_RMPL_PXRMP1_0, 4 .EQU GPIOB_RMPL_PXRMP0_3, 3 .EQU GPIOB_RMPL_PXRMP0_2, 2 .EQU GPIOB_RMPL_PXRMP0_1, 1 .EQU GPIOB_RMPL_PXRMP0_0, 0 // register------------------------------------- .EQU GPIOB_RMPH, 0x50000064 // 0x5000 0064 GPIOB_RMPH Bits------------------------------------- .EQU GPIOB_RMPH_PXRMP15_3, 31 .EQU GPIOB_RMPH_PXRMP15_2, 30 .EQU GPIOB_RMPH_PXRMP15_1, 29 .EQU GPIOB_RMPH_PXRMP15_0, 28 .EQU GPIOB_RMPH_PXRMP14_3, 27 .EQU GPIOB_RMPH_PXRMP14_2, 26 .EQU GPIOB_RMPH_PXRMP14_1, 25 .EQU GPIOB_RMPH_PXRMP14_0, 24 .EQU GPIOB_RMPH_PXRMP13_3, 23 .EQU GPIOB_RMPH_PXRMP13_2, 22 .EQU GPIOB_RMPH_PXRMP13_1, 21 .EQU GPIOB_RMPH_PXRMP13_0, 20 .EQU GPIOB_RMPH_PXRMP12_3, 19 .EQU GPIOB_RMPH_PXRMP12_2, 18 .EQU GPIOB_RMPH_PXRMP12_1, 17 .EQU GPIOB_RMPH_PXRMP12_0, 16 .EQU GPIOB_RMPH_PXRMP11_3, 15 .EQU GPIOB_RMPH_PXRMP11_2, 14 .EQU GPIOB_RMPH_PXRMP11_1, 13 .EQU GPIOB_RMPH_PXRMP11_0, 12 .EQU GPIOB_RMPH_PXRMP10_3, 11 .EQU GPIOB_RMPH_PXRMP10_2, 10 .EQU GPIOB_RMPH_PXRMP10_1, 9 .EQU GPIOB_RMPH_PXRMP10_0, 8 .EQU GPIOB_RMPH_PXRMP9_3, 7 .EQU GPIOB_RMPH_PXRMP9_2, 6 .EQU GPIOB_RMPH_PXRMP9_1, 5 .EQU GPIOB_RMPH_PXRMP9_0, 4 .EQU GPIOB_RMPH_PXRMP8_3, 3 .EQU GPIOB_RMPH_PXRMP8_2, 2 .EQU GPIOB_RMPH_PXRMP8_1, 1 .EQU GPIOB_RMPH_PXRMP8_0, 0 // register------------------------------------- .EQU GPIOB_RMP_MSB, 0x50000074 // 0x5000 0074 GPIOB_RMP_MSB Bits------------------------------------- .EQU GPIOB_RMP_MSB_RMPMSB31, 31 .EQU GPIOB_RMP_MSB_RMPMSB30, 30 .EQU GPIOB_RMP_MSB_RMPMSB29, 29 .EQU GPIOB_RMP_MSB_RMPMSB28, 28 .EQU GPIOB_RMP_MSB_RMPMSB27, 27 .EQU GPIOB_RMP_MSB_RMPMSB26, 26 .EQU GPIOB_RMP_MSB_RMPMSB25, 25 .EQU GPIOB_RMP_MSB_RMPMSB24, 24 .EQU GPIOB_RMP_MSB_RMPMSB23, 23 .EQU GPIOB_RMP_MSB_RMPMSB22, 22 .EQU GPIOB_RMP_MSB_RMPMSB21, 21 .EQU GPIOB_RMP_MSB_RMPMSB20, 20 .EQU GPIOB_RMP_MSB_RMPMSB19, 19 .EQU GPIOB_RMP_MSB_RMPMSB18, 18 .EQU GPIOB_RMP_MSB_RMPMSB17, 17 .EQU GPIOB_RMP_MSB_RMPMSB16, 16 .EQU GPIOB_RMP_MSB_RMPMSB15, 15 .EQU GPIOB_RMP_MSB_RMPMSB14, 14 .EQU GPIOB_RMP_MSB_RMPMSB13, 13 .EQU GPIOB_RMP_MSB_RMPMSB12, 12 .EQU GPIOB_RMP_MSB_RMPMSB11, 11 .EQU GPIOB_RMP_MSB_RMPMSB10, 10 .EQU GPIOB_RMP_MSB_RMPMSB9, 9 .EQU GPIOB_RMP_MSB_RMPMSB8, 8 .EQU GPIOB_RMP_MSB_RMPMSB7, 7 .EQU GPIOB_RMP_MSB_RMPMSB6, 6 .EQU GPIOB_RMP_MSB_RMPMSB5, 5 .EQU GPIOB_RMP_MSB_RMPMSB4, 4 .EQU GPIOB_RMP_MSB_RMPMSB3, 3 .EQU GPIOB_RMP_MSB_RMPMSB2, 2 .EQU GPIOB_RMP_MSB_RMPMSB1, 1 .EQU GPIOB_RMP_MSB_RMPMSB0, 0 // register------------------------------------- .EQU GPIOB_SDE, 0x50000078 // 0x5000 0078 GPIOB_SDE Bits------------------------------------- .EQU GPIOB_SDE_SDEF15, 31 .EQU GPIOB_SDE_SDEF14, 30 .EQU GPIOB_SDE_SDEF13, 29 .EQU GPIOB_SDE_SDEF12, 28 .EQU GPIOB_SDE_SDEF11, 27 .EQU GPIOB_SDE_SDEF10, 26 .EQU GPIOB_SDE_SDEF9, 25 .EQU GPIOB_SDE_SDEF8, 24 .EQU GPIOB_SDE_SDEF7, 23 .EQU GPIOB_SDE_SDEF6, 22 .EQU GPIOB_SDE_SDEF5, 21 .EQU GPIOB_SDE_SDEF4, 20 .EQU GPIOB_SDE_SDEF3, 19 .EQU GPIOB_SDE_SDEF2, 18 .EQU GPIOB_SDE_SDEF1, 17 .EQU GPIOB_SDE_SDEF0, 16 .EQU GPIOB_SDE_SDEN15, 15 .EQU GPIOB_SDE_SDEN14, 14 .EQU GPIOB_SDE_SDEN13, 13 .EQU GPIOB_SDE_SDEN12, 12 .EQU GPIOB_SDE_SDEN11, 11 .EQU GPIOB_SDE_SDEN10, 10 .EQU GPIOB_SDE_SDEN9, 9 .EQU GPIOB_SDE_SDEN8, 8 .EQU GPIOB_SDE_SDEN7, 7 .EQU GPIOB_SDE_SDEN6, 6 .EQU GPIOB_SDE_SDEN5, 5 .EQU GPIOB_SDE_SDEN4, 4 .EQU GPIOB_SDE_SDEN3, 3 .EQU GPIOB_SDE_SDEN2, 2 .EQU GPIOB_SDE_SDEN1, 1 .EQU GPIOB_SDE_SDEN0, 0 // register------------------------------------- .EQU GPIOB_SDCTL, 0x5000007C // 0x5000 007C GPIOB_SDCTL Bits------------------------------------- .EQU GPIOB_SDCTL_PSDEF, 2 .EQU GPIOB_SDCTL_LINKEN, 1 .EQU GPIOB_SDCTL_SWSAMCLK, 0 // register------------------------------------- .EQU GPIOC_PIR, 0x50000080 // 0x5000 0080 GPIOC_PIR Bits------------------------------------- .EQU GPIOC_PIR_PXDIR15, 15 .EQU GPIOC_PIR_PXDIR14, 14 .EQU GPIOC_PIR_PXDIR13, 13 .EQU GPIOC_PIR_PXDIR12, 12 .EQU GPIOC_PIR_PXDIR11, 11 .EQU GPIOC_PIR_PXDIR10, 10 .EQU GPIOC_PIR_PXDIR9, 9 .EQU GPIOC_PIR_PXDIR8, 8 .EQU GPIOC_PIR_PXDIR7, 7 .EQU GPIOC_PIR_PXDIR6, 6 .EQU GPIOC_PIR_PXDIR5, 5 .EQU GPIOC_PIR_PXDIR4, 4 .EQU GPIOC_PIR_PXDIR3, 3 .EQU GPIOC_PIR_PXDIR2, 2 .EQU GPIOC_PIR_PXDIR1, 1 .EQU GPIOC_PIR_PXDIR0, 0 // register------------------------------------- .EQU GPIOC_POR, 0x50000084 // 0x5000 0084 GPIOC_POR Bits------------------------------------- .EQU GPIOC_POR_PXPOR15, 15 .EQU GPIOC_POR_PXPOR14, 14 .EQU GPIOC_POR_PXPOR13, 13 .EQU GPIOC_POR_PXPOR12, 12 .EQU GPIOC_POR_PXPOR11, 11 .EQU GPIOC_POR_PXPOR10, 10 .EQU GPIOC_POR_PXPOR9, 9 .EQU GPIOC_POR_PXPOR8, 8 .EQU GPIOC_POR_PXPOR7, 7 .EQU GPIOC_POR_PXPOR6, 6 .EQU GPIOC_POR_PXPOR5, 5 .EQU GPIOC_POR_PXPOR4, 4 .EQU GPIOC_POR_PXPOR3, 3 .EQU GPIOC_POR_PXPOR2, 2 .EQU GPIOC_POR_PXPOR1, 1 .EQU GPIOC_POR_PXPOR0, 0 // register------------------------------------- .EQU GPIOC_PUR, 0x50000088 // 0x5000 0088 GPIOC_PUR Bits------------------------------------- .EQU GPIOC_PUR_PXPUR15, 15 .EQU GPIOC_PUR_PXPUR14, 14 .EQU GPIOC_PUR_PXPUR13, 13 .EQU GPIOC_PUR_PXPUR12, 12 .EQU GPIOC_PUR_PXPUR11, 11 .EQU GPIOC_PUR_PXPUR10, 10 .EQU GPIOC_PUR_PXPUR9, 9 .EQU GPIOC_PUR_PXPUR8, 8 .EQU GPIOC_PUR_PXPUR7, 7 .EQU GPIOC_PUR_PXPUR6, 6 .EQU GPIOC_PUR_PXPUR5, 5 .EQU GPIOC_PUR_PXPUR4, 4 .EQU GPIOC_PUR_PXPUR3, 3 .EQU GPIOC_PUR_PXPUR2, 2 .EQU GPIOC_PUR_PXPUR1, 1 .EQU GPIOC_PUR_PXPUR0, 0 // register------------------------------------- .EQU GPIOC_PDR, 0x5000008C // 0x5000 008C GPIOC_PDR Bits------------------------------------- .EQU GPIOC_PDR_PXPDR15, 15 .EQU GPIOC_PDR_PXPDR14, 14 .EQU GPIOC_PDR_PXPDR13, 13 .EQU GPIOC_PDR_PXPDR12, 12 .EQU GPIOC_PDR_PXPDR11, 11 .EQU GPIOC_PDR_PXPDR10, 10 .EQU GPIOC_PDR_PXPDR9, 9 .EQU GPIOC_PDR_PXPDR8, 8 .EQU GPIOC_PDR_PXPDR7, 7 .EQU GPIOC_PDR_PXPDR6, 6 .EQU GPIOC_PDR_PXPDR5, 5 .EQU GPIOC_PDR_PXPDR4, 4 .EQU GPIOC_PDR_PXPDR3, 3 .EQU GPIOC_PDR_PXPDR2, 2 .EQU GPIOC_PDR_PXPDR1, 1 .EQU GPIOC_PDR_PXPDR0, 0 // register------------------------------------- .EQU GPIOC_PODR, 0x50000090 // 0x5000 0090 GPIOC_PODR Bits------------------------------------- .EQU GPIOC_PODR_PXPODR15, 15 .EQU GPIOC_PODR_PXPODR14, 14 .EQU GPIOC_PODR_PXPODR13, 13 .EQU GPIOC_PODR_PXPODR12, 12 .EQU GPIOC_PODR_PXPODR11, 11 .EQU GPIOC_PODR_PXPODR10, 10 .EQU GPIOC_PODR_PXPODR9, 9 .EQU GPIOC_PODR_PXPODR8, 8 .EQU GPIOC_PODR_PXPODR7, 7 .EQU GPIOC_PODR_PXPODR6, 6 .EQU GPIOC_PODR_PXPODR5, 5 .EQU GPIOC_PODR_PXPODR4, 4 .EQU GPIOC_PODR_PXPODR3, 3 .EQU GPIOC_PODR_PXPODR2, 2 .EQU GPIOC_PODR_PXPODR1, 1 .EQU GPIOC_PODR_PXPODR0, 0 // register------------------------------------- .EQU GPIOC_PMOD, 0x50000094 // 0x5000 0094 GPIOC_PMOD Bits------------------------------------- .EQU GPIOC_PMOD_PXPMD15_1, 31 .EQU GPIOC_PMOD_PXPMD15_0, 30 .EQU GPIOC_PMOD_PXPMD14_1, 29 .EQU GPIOC_PMOD_PXPMD14_0, 28 .EQU GPIOC_PMOD_PXPMD13_1, 27 .EQU GPIOC_PMOD_PXPMD13_0, 26 .EQU GPIOC_PMOD_PXPMD12_1, 25 .EQU GPIOC_PMOD_PXPMD12_0, 24 .EQU GPIOC_PMOD_PXPMD11_1, 23 .EQU GPIOC_PMOD_PXPMD11_0, 22 .EQU GPIOC_PMOD_PXPMD10_1, 21 .EQU GPIOC_PMOD_PXPMD10_0, 20 .EQU GPIOC_PMOD_PXPMD9_1, 19 .EQU GPIOC_PMOD_PXPMD9_0, 18 .EQU GPIOC_PMOD_PXPMD8_1, 17 .EQU GPIOC_PMOD_PXPMD8_0, 16 .EQU GPIOC_PMOD_PXPMD7_1, 15 .EQU GPIOC_PMOD_PXPMD7_0, 14 .EQU GPIOC_PMOD_PXPMD6_1, 13 .EQU GPIOC_PMOD_PXPMD6_0, 12 .EQU GPIOC_PMOD_PXPMD5_1, 11 .EQU GPIOC_PMOD_PXPMD5_0, 10 .EQU GPIOC_PMOD_PXPMD4_1, 9 .EQU GPIOC_PMOD_PXPMD4_0, 8 .EQU GPIOC_PMOD_PXPMD3_1, 7 .EQU GPIOC_PMOD_PXPMD3_0, 6 .EQU GPIOC_PMOD_PXPMD2_1, 5 .EQU GPIOC_PMOD_PXPMD2_0, 4 .EQU GPIOC_PMOD_PXPMD1_1, 3 .EQU GPIOC_PMOD_PXPMD1_0, 2 .EQU GPIOC_PMOD_PXPMD0_1, 1 .EQU GPIOC_PMOD_PXPMD0_0, 0 // register------------------------------------- .EQU GPIOC_OMOD, 0x50000098 // 0x5000 0098 GPIOC_OMOD Bits------------------------------------- .EQU GPIOC_OMOD_PXOMD15, 30 .EQU GPIOC_OMOD_PXOMD14, 28 .EQU GPIOC_OMOD_PXOMD13, 26 .EQU GPIOC_OMOD_PXOMD12, 24 .EQU GPIOC_OMOD_PXOMD11, 22 .EQU GPIOC_OMOD_PXOMD10, 20 .EQU GPIOC_OMOD_PXOMD9, 18 .EQU GPIOC_OMOD_PXOMD8, 16 .EQU GPIOC_OMOD_PXOMD7, 14 .EQU GPIOC_OMOD_PXOMD6, 12 .EQU GPIOC_OMOD_PXOMD5, 10 .EQU GPIOC_OMOD_PXOMD4, 8 .EQU GPIOC_OMOD_PXOMD3, 6 .EQU GPIOC_OMOD_PXOMD2, 4 .EQU GPIOC_OMOD_PXOMD1, 2 .EQU GPIOC_OMOD_PXOMD0, 0 // register------------------------------------- .EQU GPIOC_LOCK, 0x5000009C // 0x5000 009C GPIOC_LOCK Bits------------------------------------- .EQU GPIOC_LOCK_PXLCKKEY15, 31 .EQU GPIOC_LOCK_PXLCKKEY14, 30 .EQU GPIOC_LOCK_PXLCKKEY13, 29 .EQU GPIOC_LOCK_PXLCKKEY12, 28 .EQU GPIOC_LOCK_PXLCKKEY11, 27 .EQU GPIOC_LOCK_PXLCKKEY10, 26 .EQU GPIOC_LOCK_PXLCKKEY9, 25 .EQU GPIOC_LOCK_PXLCKKEY8, 24 .EQU GPIOC_LOCK_PXLCKKEY7, 23 .EQU GPIOC_LOCK_PXLCKKEY6, 22 .EQU GPIOC_LOCK_PXLCKKEY5, 21 .EQU GPIOC_LOCK_PXLCKKEY4, 20 .EQU GPIOC_LOCK_PXLCKKEY3, 19 .EQU GPIOC_LOCK_PXLCKKEY2, 18 .EQU GPIOC_LOCK_PXLCKKEY1, 17 .EQU GPIOC_LOCK_PXLCKKEY0, 16 .EQU GPIOC_LOCK_PXLCK15, 15 .EQU GPIOC_LOCK_PXLCK14, 14 .EQU GPIOC_LOCK_PXLCK13, 13 .EQU GPIOC_LOCK_PXLCK12, 12 .EQU GPIOC_LOCK_PXLCK11, 11 .EQU GPIOC_LOCK_PXLCK10, 10 .EQU GPIOC_LOCK_PXLCK9, 9 .EQU GPIOC_LOCK_PXLCK8, 8 .EQU GPIOC_LOCK_PXLCK7, 7 .EQU GPIOC_LOCK_PXLCK6, 6 .EQU GPIOC_LOCK_PXLCK5, 5 .EQU GPIOC_LOCK_PXLCK4, 4 .EQU GPIOC_LOCK_PXLCK3, 3 .EQU GPIOC_LOCK_PXLCK2, 2 .EQU GPIOC_LOCK_PXLCK1, 1 .EQU GPIOC_LOCK_PXLCK0, 0 // register------------------------------------- .EQU GPIOC_RMPL, 0x500000A0 // 0x5000 00A0 GPIOC_RMPL Bits------------------------------------- .EQU GPIOC_RMPL_PXRMP7_3, 31 .EQU GPIOC_RMPL_PXRMP7_2, 30 .EQU GPIOC_RMPL_PXRMP7_1, 29 .EQU GPIOC_RMPL_PXRMP7_0, 28 .EQU GPIOC_RMPL_PXRMP6_3, 27 .EQU GPIOC_RMPL_PXRMP6_2, 26 .EQU GPIOC_RMPL_PXRMP6_1, 25 .EQU GPIOC_RMPL_PXRMP6_0, 24 .EQU GPIOC_RMPL_PXRMP5_3, 23 .EQU GPIOC_RMPL_PXRMP5_2, 22 .EQU GPIOC_RMPL_PXRMP5_1, 21 .EQU GPIOC_RMPL_PXRMP5_0, 20 .EQU GPIOC_RMPL_PXRMP4_3, 19 .EQU GPIOC_RMPL_PXRMP4_2, 18 .EQU GPIOC_RMPL_PXRMP4_1, 17 .EQU GPIOC_RMPL_PXRMP4_0, 16 .EQU GPIOC_RMPL_PXRMP3_3, 15 .EQU GPIOC_RMPL_PXRMP3_2, 14 .EQU GPIOC_RMPL_PXRMP3_1, 13 .EQU GPIOC_RMPL_PXRMP3_0, 12 .EQU GPIOC_RMPL_PXRMP2_3, 11 .EQU GPIOC_RMPL_PXRMP2_2, 10 .EQU GPIOC_RMPL_PXRMP2_1, 9 .EQU GPIOC_RMPL_PXRMP2_0, 8 .EQU GPIOC_RMPL_PXRMP1_3, 7 .EQU GPIOC_RMPL_PXRMP1_2, 6 .EQU GPIOC_RMPL_PXRMP1_1, 5 .EQU GPIOC_RMPL_PXRMP1_0, 4 .EQU GPIOC_RMPL_PXRMP0_3, 3 .EQU GPIOC_RMPL_PXRMP0_2, 2 .EQU GPIOC_RMPL_PXRMP0_1, 1 .EQU GPIOC_RMPL_PXRMP0_0, 0 // register------------------------------------- .EQU GPIOC_RMPH, 0x500000A4 // 0x5000 00A4 GPIOC_RMPH Bits------------------------------------- .EQU GPIOC_RMPH_PXRMP15_3, 31 .EQU GPIOC_RMPH_PXRMP15_2, 30 .EQU GPIOC_RMPH_PXRMP15_1, 29 .EQU GPIOC_RMPH_PXRMP15_0, 28 .EQU GPIOC_RMPH_PXRMP14_3, 27 .EQU GPIOC_RMPH_PXRMP14_2, 26 .EQU GPIOC_RMPH_PXRMP14_1, 25 .EQU GPIOC_RMPH_PXRMP14_0, 24 .EQU GPIOC_RMPH_PXRMP13_3, 23 .EQU GPIOC_RMPH_PXRMP13_2, 22 .EQU GPIOC_RMPH_PXRMP13_1, 21 .EQU GPIOC_RMPH_PXRMP13_0, 20 .EQU GPIOC_RMPH_PXRMP12_3, 19 .EQU GPIOC_RMPH_PXRMP12_2, 18 .EQU GPIOC_RMPH_PXRMP12_1, 17 .EQU GPIOC_RMPH_PXRMP12_0, 16 .EQU GPIOC_RMPH_PXRMP11_3, 15 .EQU GPIOC_RMPH_PXRMP11_2, 14 .EQU GPIOC_RMPH_PXRMP11_1, 13 .EQU GPIOC_RMPH_PXRMP11_0, 12 .EQU GPIOC_RMPH_PXRMP10_3, 11 .EQU GPIOC_RMPH_PXRMP10_2, 10 .EQU GPIOC_RMPH_PXRMP10_1, 9 .EQU GPIOC_RMPH_PXRMP10_0, 8 .EQU GPIOC_RMPH_PXRMP9_3, 7 .EQU GPIOC_RMPH_PXRMP9_2, 6 .EQU GPIOC_RMPH_PXRMP9_1, 5 .EQU GPIOC_RMPH_PXRMP9_0, 4 .EQU GPIOC_RMPH_PXRMP8_3, 3 .EQU GPIOC_RMPH_PXRMP8_2, 2 .EQU GPIOC_RMPH_PXRMP8_1, 1 .EQU GPIOC_RMPH_PXRMP8_0, 0 // register------------------------------------- .EQU GPIOC_RMP_MSB, 0x500000B4 // 0x5000 00B4 GPIOC_RMP_MSB Bits------------------------------------- .EQU GPIOC_RMP_MSB_RMPMSB31, 31 .EQU GPIOC_RMP_MSB_RMPMSB30, 30 .EQU GPIOC_RMP_MSB_RMPMSB29, 29 .EQU GPIOC_RMP_MSB_RMPMSB28, 28 .EQU GPIOC_RMP_MSB_RMPMSB27, 27 .EQU GPIOC_RMP_MSB_RMPMSB26, 26 .EQU GPIOC_RMP_MSB_RMPMSB25, 25 .EQU GPIOC_RMP_MSB_RMPMSB24, 24 .EQU GPIOC_RMP_MSB_RMPMSB23, 23 .EQU GPIOC_RMP_MSB_RMPMSB22, 22 .EQU GPIOC_RMP_MSB_RMPMSB21, 21 .EQU GPIOC_RMP_MSB_RMPMSB20, 20 .EQU GPIOC_RMP_MSB_RMPMSB19, 19 .EQU GPIOC_RMP_MSB_RMPMSB18, 18 .EQU GPIOC_RMP_MSB_RMPMSB17, 17 .EQU GPIOC_RMP_MSB_RMPMSB16, 16 .EQU GPIOC_RMP_MSB_RMPMSB15, 15 .EQU GPIOC_RMP_MSB_RMPMSB14, 14 .EQU GPIOC_RMP_MSB_RMPMSB13, 13 .EQU GPIOC_RMP_MSB_RMPMSB12, 12 .EQU GPIOC_RMP_MSB_RMPMSB11, 11 .EQU GPIOC_RMP_MSB_RMPMSB10, 10 .EQU GPIOC_RMP_MSB_RMPMSB9, 9 .EQU GPIOC_RMP_MSB_RMPMSB8, 8 .EQU GPIOC_RMP_MSB_RMPMSB7, 7 .EQU GPIOC_RMP_MSB_RMPMSB6, 6 .EQU GPIOC_RMP_MSB_RMPMSB5, 5 .EQU GPIOC_RMP_MSB_RMPMSB4, 4 .EQU GPIOC_RMP_MSB_RMPMSB3, 3 .EQU GPIOC_RMP_MSB_RMPMSB2, 2 .EQU GPIOC_RMP_MSB_RMPMSB1, 1 .EQU GPIOC_RMP_MSB_RMPMSB0, 0 // register------------------------------------- .EQU GPIOC_SDE, 0x500000B8 // 0x5000 00B8 GPIOC_SDE Bits------------------------------------- .EQU GPIOC_SDE_SDEF15, 31 .EQU GPIOC_SDE_SDEF14, 30 .EQU GPIOC_SDE_SDEF13, 29 .EQU GPIOC_SDE_SDEF12, 28 .EQU GPIOC_SDE_SDEF11, 27 .EQU GPIOC_SDE_SDEF10, 26 .EQU GPIOC_SDE_SDEF9, 25 .EQU GPIOC_SDE_SDEF8, 24 .EQU GPIOC_SDE_SDEF7, 23 .EQU GPIOC_SDE_SDEF6, 22 .EQU GPIOC_SDE_SDEF5, 21 .EQU GPIOC_SDE_SDEF4, 20 .EQU GPIOC_SDE_SDEF3, 19 .EQU GPIOC_SDE_SDEF2, 18 .EQU GPIOC_SDE_SDEF1, 17 .EQU GPIOC_SDE_SDEF0, 16 .EQU GPIOC_SDE_SDEN15, 15 .EQU GPIOC_SDE_SDEN14, 14 .EQU GPIOC_SDE_SDEN13, 13 .EQU GPIOC_SDE_SDEN12, 12 .EQU GPIOC_SDE_SDEN11, 11 .EQU GPIOC_SDE_SDEN10, 10 .EQU GPIOC_SDE_SDEN9, 9 .EQU GPIOC_SDE_SDEN8, 8 .EQU GPIOC_SDE_SDEN7, 7 .EQU GPIOC_SDE_SDEN6, 6 .EQU GPIOC_SDE_SDEN5, 5 .EQU GPIOC_SDE_SDEN4, 4 .EQU GPIOC_SDE_SDEN3, 3 .EQU GPIOC_SDE_SDEN2, 2 .EQU GPIOC_SDE_SDEN1, 1 .EQU GPIOC_SDE_SDEN0, 0 // register------------------------------------- .EQU GPIOC_SDCTL, 0x500000BC // 0x5000 00BC GPIOC_SDCTL Bits------------------------------------- .EQU GPIOC_SDCTL_PSDEF, 2 .EQU GPIOC_SDCTL_LINKEN, 1 .EQU GPIOC_SDCTL_SWSAMCLK, 0 // register------------------------------------- .EQU GPIOD_PIR, 0x500000C0 // 0x5000 00C0 GPIOD_PIR Bits------------------------------------- .EQU GPIOD_PIR_PXDIR15, 15 .EQU GPIOD_PIR_PXDIR14, 14 .EQU GPIOD_PIR_PXDIR13, 13 .EQU GPIOD_PIR_PXDIR12, 12 .EQU GPIOD_PIR_PXDIR11, 11 .EQU GPIOD_PIR_PXDIR10, 10 .EQU GPIOD_PIR_PXDIR9, 9 .EQU GPIOD_PIR_PXDIR8, 8 .EQU GPIOD_PIR_PXDIR7, 7 .EQU GPIOD_PIR_PXDIR6, 6 .EQU GPIOD_PIR_PXDIR5, 5 .EQU GPIOD_PIR_PXDIR4, 4 .EQU GPIOD_PIR_PXDIR3, 3 .EQU GPIOD_PIR_PXDIR2, 2 .EQU GPIOD_PIR_PXDIR1, 1 .EQU GPIOD_PIR_PXDIR0, 0 // register------------------------------------- .EQU GPIOD_POR, 0x500000C4 // 0x5000 00C4 GPIOD_POR Bits------------------------------------- .EQU GPIOD_POR_PXPOR15, 15 .EQU GPIOD_POR_PXPOR14, 14 .EQU GPIOD_POR_PXPOR13, 13 .EQU GPIOD_POR_PXPOR12, 12 .EQU GPIOD_POR_PXPOR11, 11 .EQU GPIOD_POR_PXPOR10, 10 .EQU GPIOD_POR_PXPOR9, 9 .EQU GPIOD_POR_PXPOR8, 8 .EQU GPIOD_POR_PXPOR7, 7 .EQU GPIOD_POR_PXPOR6, 6 .EQU GPIOD_POR_PXPOR5, 5 .EQU GPIOD_POR_PXPOR4, 4 .EQU GPIOD_POR_PXPOR3, 3 .EQU GPIOD_POR_PXPOR2, 2 .EQU GPIOD_POR_PXPOR1, 1 .EQU GPIOD_POR_PXPOR0, 0 // register------------------------------------- .EQU GPIOD_PUR, 0x500000C8 // 0x5000 00C8 GPIOD_PUR Bits------------------------------------- .EQU GPIOD_PUR_PXPUR15, 15 .EQU GPIOD_PUR_PXPUR14, 14 .EQU GPIOD_PUR_PXPUR13, 13 .EQU GPIOD_PUR_PXPUR12, 12 .EQU GPIOD_PUR_PXPUR11, 11 .EQU GPIOD_PUR_PXPUR10, 10 .EQU GPIOD_PUR_PXPUR9, 9 .EQU GPIOD_PUR_PXPUR8, 8 .EQU GPIOD_PUR_PXPUR7, 7 .EQU GPIOD_PUR_PXPUR6, 6 .EQU GPIOD_PUR_PXPUR5, 5 .EQU GPIOD_PUR_PXPUR4, 4 .EQU GPIOD_PUR_PXPUR3, 3 .EQU GPIOD_PUR_PXPUR2, 2 .EQU GPIOD_PUR_PXPUR1, 1 .EQU GPIOD_PUR_PXPUR0, 0 // register------------------------------------- .EQU GPIOD_PDR, 0x500000CC // 0x5000 00CC GPIOD_PDR Bits------------------------------------- .EQU GPIOD_PDR_PXPDR15, 15 .EQU GPIOD_PDR_PXPDR14, 14 .EQU GPIOD_PDR_PXPDR13, 13 .EQU GPIOD_PDR_PXPDR12, 12 .EQU GPIOD_PDR_PXPDR11, 11 .EQU GPIOD_PDR_PXPDR10, 10 .EQU GPIOD_PDR_PXPDR9, 9 .EQU GPIOD_PDR_PXPDR8, 8 .EQU GPIOD_PDR_PXPDR7, 7 .EQU GPIOD_PDR_PXPDR6, 6 .EQU GPIOD_PDR_PXPDR5, 5 .EQU GPIOD_PDR_PXPDR4, 4 .EQU GPIOD_PDR_PXPDR3, 3 .EQU GPIOD_PDR_PXPDR2, 2 .EQU GPIOD_PDR_PXPDR1, 1 .EQU GPIOD_PDR_PXPDR0, 0 // register------------------------------------- .EQU GPIOD_PODR, 0x500000D0 // 0x5000 00D0 GPIOD_PODR Bits------------------------------------- .EQU GPIOD_PODR_PXPODR15, 15 .EQU GPIOD_PODR_PXPODR14, 14 .EQU GPIOD_PODR_PXPODR13, 13 .EQU GPIOD_PODR_PXPODR12, 12 .EQU GPIOD_PODR_PXPODR11, 11 .EQU GPIOD_PODR_PXPODR10, 10 .EQU GPIOD_PODR_PXPODR9, 9 .EQU GPIOD_PODR_PXPODR8, 8 .EQU GPIOD_PODR_PXPODR7, 7 .EQU GPIOD_PODR_PXPODR6, 6 .EQU GPIOD_PODR_PXPODR5, 5 .EQU GPIOD_PODR_PXPODR4, 4 .EQU GPIOD_PODR_PXPODR3, 3 .EQU GPIOD_PODR_PXPODR2, 2 .EQU GPIOD_PODR_PXPODR1, 1 .EQU GPIOD_PODR_PXPODR0, 0 // register------------------------------------- .EQU GPIOD_PMOD, 0x500000D4 // 0x5000 00D4 GPIOD_PMOD Bits------------------------------------- .EQU GPIOD_PMOD_PXPMD15_1, 31 .EQU GPIOD_PMOD_PXPMD15_0, 30 .EQU GPIOD_PMOD_PXPMD14_1, 29 .EQU GPIOD_PMOD_PXPMD14_0, 28 .EQU GPIOD_PMOD_PXPMD13_1, 27 .EQU GPIOD_PMOD_PXPMD13_0, 26 .EQU GPIOD_PMOD_PXPMD12_1, 25 .EQU GPIOD_PMOD_PXPMD12_0, 24 .EQU GPIOD_PMOD_PXPMD11_1, 23 .EQU GPIOD_PMOD_PXPMD11_0, 22 .EQU GPIOD_PMOD_PXPMD10_1, 21 .EQU GPIOD_PMOD_PXPMD10_0, 20 .EQU GPIOD_PMOD_PXPMD9_1, 19 .EQU GPIOD_PMOD_PXPMD9_0, 18 .EQU GPIOD_PMOD_PXPMD8_1, 17 .EQU GPIOD_PMOD_PXPMD8_0, 16 .EQU GPIOD_PMOD_PXPMD7_1, 15 .EQU GPIOD_PMOD_PXPMD7_0, 14 .EQU GPIOD_PMOD_PXPMD6_1, 13 .EQU GPIOD_PMOD_PXPMD6_0, 12 .EQU GPIOD_PMOD_PXPMD5_1, 11 .EQU GPIOD_PMOD_PXPMD5_0, 10 .EQU GPIOD_PMOD_PXPMD4_1, 9 .EQU GPIOD_PMOD_PXPMD4_0, 8 .EQU GPIOD_PMOD_PXPMD3_1, 7 .EQU GPIOD_PMOD_PXPMD3_0, 6 .EQU GPIOD_PMOD_PXPMD2_1, 5 .EQU GPIOD_PMOD_PXPMD2_0, 4 .EQU GPIOD_PMOD_PXPMD1_1, 3 .EQU GPIOD_PMOD_PXPMD1_0, 2 .EQU GPIOD_PMOD_PXPMD0_1, 1 .EQU GPIOD_PMOD_PXPMD0_0, 0 // register------------------------------------- .EQU GPIOD_OMOD, 0x500000D8 // 0x5000 00D8 GPIOD_OMOD Bits------------------------------------- .EQU GPIOD_OMOD_PXOMD15, 30 .EQU GPIOD_OMOD_PXOMD14, 28 .EQU GPIOD_OMOD_PXOMD13, 26 .EQU GPIOD_OMOD_PXOMD12, 24 .EQU GPIOD_OMOD_PXOMD11, 22 .EQU GPIOD_OMOD_PXOMD10, 20 .EQU GPIOD_OMOD_PXOMD9, 18 .EQU GPIOD_OMOD_PXOMD8, 16 .EQU GPIOD_OMOD_PXOMD7, 14 .EQU GPIOD_OMOD_PXOMD6, 12 .EQU GPIOD_OMOD_PXOMD5, 10 .EQU GPIOD_OMOD_PXOMD4, 8 .EQU GPIOD_OMOD_PXOMD3, 6 .EQU GPIOD_OMOD_PXOMD2, 4 .EQU GPIOD_OMOD_PXOMD1, 2 .EQU GPIOD_OMOD_PXOMD0, 0 // register------------------------------------- .EQU GPIOD_LOCK, 0x500000DC // 0x5000 00DC GPIOD_LOCK Bits------------------------------------- .EQU GPIOD_LOCK_PXLCKKEY15, 31 .EQU GPIOD_LOCK_PXLCKKEY14, 30 .EQU GPIOD_LOCK_PXLCKKEY13, 29 .EQU GPIOD_LOCK_PXLCKKEY12, 28 .EQU GPIOD_LOCK_PXLCKKEY11, 27 .EQU GPIOD_LOCK_PXLCKKEY10, 26 .EQU GPIOD_LOCK_PXLCKKEY9, 25 .EQU GPIOD_LOCK_PXLCKKEY8, 24 .EQU GPIOD_LOCK_PXLCKKEY7, 23 .EQU GPIOD_LOCK_PXLCKKEY6, 22 .EQU GPIOD_LOCK_PXLCKKEY5, 21 .EQU GPIOD_LOCK_PXLCKKEY4, 20 .EQU GPIOD_LOCK_PXLCKKEY3, 19 .EQU GPIOD_LOCK_PXLCKKEY2, 18 .EQU GPIOD_LOCK_PXLCKKEY1, 17 .EQU GPIOD_LOCK_PXLCKKEY0, 16 .EQU GPIOD_LOCK_PXLCK15, 15 .EQU GPIOD_LOCK_PXLCK14, 14 .EQU GPIOD_LOCK_PXLCK13, 13 .EQU GPIOD_LOCK_PXLCK12, 12 .EQU GPIOD_LOCK_PXLCK11, 11 .EQU GPIOD_LOCK_PXLCK10, 10 .EQU GPIOD_LOCK_PXLCK9, 9 .EQU GPIOD_LOCK_PXLCK8, 8 .EQU GPIOD_LOCK_PXLCK7, 7 .EQU GPIOD_LOCK_PXLCK6, 6 .EQU GPIOD_LOCK_PXLCK5, 5 .EQU GPIOD_LOCK_PXLCK4, 4 .EQU GPIOD_LOCK_PXLCK3, 3 .EQU GPIOD_LOCK_PXLCK2, 2 .EQU GPIOD_LOCK_PXLCK1, 1 .EQU GPIOD_LOCK_PXLCK0, 0 // register------------------------------------- .EQU GPIOD_RMPL, 0x500000E0 // 0x5000 00E0 GPIOD_RMPL Bits------------------------------------- .EQU GPIOD_RMPL_PXRMP7_3, 31 .EQU GPIOD_RMPL_PXRMP7_2, 30 .EQU GPIOD_RMPL_PXRMP7_1, 29 .EQU GPIOD_RMPL_PXRMP7_0, 28 .EQU GPIOD_RMPL_PXRMP6_3, 27 .EQU GPIOD_RMPL_PXRMP6_2, 26 .EQU GPIOD_RMPL_PXRMP6_1, 25 .EQU GPIOD_RMPL_PXRMP6_0, 24 .EQU GPIOD_RMPL_PXRMP5_3, 23 .EQU GPIOD_RMPL_PXRMP5_2, 22 .EQU GPIOD_RMPL_PXRMP5_1, 21 .EQU GPIOD_RMPL_PXRMP5_0, 20 .EQU GPIOD_RMPL_PXRMP4_3, 19 .EQU GPIOD_RMPL_PXRMP4_2, 18 .EQU GPIOD_RMPL_PXRMP4_1, 17 .EQU GPIOD_RMPL_PXRMP4_0, 16 .EQU GPIOD_RMPL_PXRMP3_3, 15 .EQU GPIOD_RMPL_PXRMP3_2, 14 .EQU GPIOD_RMPL_PXRMP3_1, 13 .EQU GPIOD_RMPL_PXRMP3_0, 12 .EQU GPIOD_RMPL_PXRMP2_3, 11 .EQU GPIOD_RMPL_PXRMP2_2, 10 .EQU GPIOD_RMPL_PXRMP2_1, 9 .EQU GPIOD_RMPL_PXRMP2_0, 8 .EQU GPIOD_RMPL_PXRMP1_3, 7 .EQU GPIOD_RMPL_PXRMP1_2, 6 .EQU GPIOD_RMPL_PXRMP1_1, 5 .EQU GPIOD_RMPL_PXRMP1_0, 4 .EQU GPIOD_RMPL_PXRMP0_3, 3 .EQU GPIOD_RMPL_PXRMP0_2, 2 .EQU GPIOD_RMPL_PXRMP0_1, 1 .EQU GPIOD_RMPL_PXRMP0_0, 0 // register------------------------------------- .EQU GPIOD_RMPH, 0x500000E4 // 0x5000 00E4 GPIOD_RMPH Bits------------------------------------- .EQU GPIOD_RMPH_PXRMP15_3, 31 .EQU GPIOD_RMPH_PXRMP15_2, 30 .EQU GPIOD_RMPH_PXRMP15_1, 29 .EQU GPIOD_RMPH_PXRMP15_0, 28 .EQU GPIOD_RMPH_PXRMP14_3, 27 .EQU GPIOD_RMPH_PXRMP14_2, 26 .EQU GPIOD_RMPH_PXRMP14_1, 25 .EQU GPIOD_RMPH_PXRMP14_0, 24 .EQU GPIOD_RMPH_PXRMP13_3, 23 .EQU GPIOD_RMPH_PXRMP13_2, 22 .EQU GPIOD_RMPH_PXRMP13_1, 21 .EQU GPIOD_RMPH_PXRMP13_0, 20 .EQU GPIOD_RMPH_PXRMP12_3, 19 .EQU GPIOD_RMPH_PXRMP12_2, 18 .EQU GPIOD_RMPH_PXRMP12_1, 17 .EQU GPIOD_RMPH_PXRMP12_0, 16 .EQU GPIOD_RMPH_PXRMP11_3, 15 .EQU GPIOD_RMPH_PXRMP11_2, 14 .EQU GPIOD_RMPH_PXRMP11_1, 13 .EQU GPIOD_RMPH_PXRMP11_0, 12 .EQU GPIOD_RMPH_PXRMP10_3, 11 .EQU GPIOD_RMPH_PXRMP10_2, 10 .EQU GPIOD_RMPH_PXRMP10_1, 9 .EQU GPIOD_RMPH_PXRMP10_0, 8 .EQU GPIOD_RMPH_PXRMP9_3, 7 .EQU GPIOD_RMPH_PXRMP9_2, 6 .EQU GPIOD_RMPH_PXRMP9_1, 5 .EQU GPIOD_RMPH_PXRMP9_0, 4 .EQU GPIOD_RMPH_PXRMP8_3, 3 .EQU GPIOD_RMPH_PXRMP8_2, 2 .EQU GPIOD_RMPH_PXRMP8_1, 1 .EQU GPIOD_RMPH_PXRMP8_0, 0 // register------------------------------------- .EQU GPIOD_RMP_MSB, 0x500000F4 // 0x5000 00F4 GPIOD_RMP_MSB Bits------------------------------------- .EQU GPIOD_RMP_MSB_RMPMSB31, 31 .EQU GPIOD_RMP_MSB_RMPMSB30, 30 .EQU GPIOD_RMP_MSB_RMPMSB29, 29 .EQU GPIOD_RMP_MSB_RMPMSB28, 28 .EQU GPIOD_RMP_MSB_RMPMSB27, 27 .EQU GPIOD_RMP_MSB_RMPMSB26, 26 .EQU GPIOD_RMP_MSB_RMPMSB25, 25 .EQU GPIOD_RMP_MSB_RMPMSB24, 24 .EQU GPIOD_RMP_MSB_RMPMSB23, 23 .EQU GPIOD_RMP_MSB_RMPMSB22, 22 .EQU GPIOD_RMP_MSB_RMPMSB21, 21 .EQU GPIOD_RMP_MSB_RMPMSB20, 20 .EQU GPIOD_RMP_MSB_RMPMSB19, 19 .EQU GPIOD_RMP_MSB_RMPMSB18, 18 .EQU GPIOD_RMP_MSB_RMPMSB17, 17 .EQU GPIOD_RMP_MSB_RMPMSB16, 16 .EQU GPIOD_RMP_MSB_RMPMSB15, 15 .EQU GPIOD_RMP_MSB_RMPMSB14, 14 .EQU GPIOD_RMP_MSB_RMPMSB13, 13 .EQU GPIOD_RMP_MSB_RMPMSB12, 12 .EQU GPIOD_RMP_MSB_RMPMSB11, 11 .EQU GPIOD_RMP_MSB_RMPMSB10, 10 .EQU GPIOD_RMP_MSB_RMPMSB9, 9 .EQU GPIOD_RMP_MSB_RMPMSB8, 8 .EQU GPIOD_RMP_MSB_RMPMSB7, 7 .EQU GPIOD_RMP_MSB_RMPMSB6, 6 .EQU GPIOD_RMP_MSB_RMPMSB5, 5 .EQU GPIOD_RMP_MSB_RMPMSB4, 4 .EQU GPIOD_RMP_MSB_RMPMSB3, 3 .EQU GPIOD_RMP_MSB_RMPMSB2, 2 .EQU GPIOD_RMP_MSB_RMPMSB1, 1 .EQU GPIOD_RMP_MSB_RMPMSB0, 0 // register------------------------------------- .EQU GPIOD_SDE, 0x500000F8 // 0x5000 00F8 GPIOD_SDE Bits------------------------------------- .EQU GPIOD_SDE_SDEF15, 31 .EQU GPIOD_SDE_SDEF14, 30 .EQU GPIOD_SDE_SDEF13, 29 .EQU GPIOD_SDE_SDEF12, 28 .EQU GPIOD_SDE_SDEF11, 27 .EQU GPIOD_SDE_SDEF10, 26 .EQU GPIOD_SDE_SDEF9, 25 .EQU GPIOD_SDE_SDEF8, 24 .EQU GPIOD_SDE_SDEF7, 23 .EQU GPIOD_SDE_SDEF6, 22 .EQU GPIOD_SDE_SDEF5, 21 .EQU GPIOD_SDE_SDEF4, 20 .EQU GPIOD_SDE_SDEF3, 19 .EQU GPIOD_SDE_SDEF2, 18 .EQU GPIOD_SDE_SDEF1, 17 .EQU GPIOD_SDE_SDEF0, 16 .EQU GPIOD_SDE_SDEN15, 15 .EQU GPIOD_SDE_SDEN14, 14 .EQU GPIOD_SDE_SDEN13, 13 .EQU GPIOD_SDE_SDEN12, 12 .EQU GPIOD_SDE_SDEN11, 11 .EQU GPIOD_SDE_SDEN10, 10 .EQU GPIOD_SDE_SDEN9, 9 .EQU GPIOD_SDE_SDEN8, 8 .EQU GPIOD_SDE_SDEN7, 7 .EQU GPIOD_SDE_SDEN6, 6 .EQU GPIOD_SDE_SDEN5, 5 .EQU GPIOD_SDE_SDEN4, 4 .EQU GPIOD_SDE_SDEN3, 3 .EQU GPIOD_SDE_SDEN2, 2 .EQU GPIOD_SDE_SDEN1, 1 .EQU GPIOD_SDE_SDEN0, 0 // register------------------------------------- .EQU GPIOD_SDCTL, 0x500000FC // 0x5000 00FC GPIOD_SDCTL Bits------------------------------------- .EQU GPIOD_SDCTL_PSDEF, 2 .EQU GPIOD_SDCTL_LINKEN, 1 .EQU GPIOD_SDCTL_SWSAMCLK, 0 // register------------------------------------- .EQU GPIOE_PIR, 0x50000100 // 0x5000 0100 GPIOE_PIR Bits------------------------------------- .EQU GPIOE_PIR_PXDIR15, 15 .EQU GPIOE_PIR_PXDIR14, 14 .EQU GPIOE_PIR_PXDIR13, 13 .EQU GPIOE_PIR_PXDIR12, 12 .EQU GPIOE_PIR_PXDIR11, 11 .EQU GPIOE_PIR_PXDIR10, 10 .EQU GPIOE_PIR_PXDIR9, 9 .EQU GPIOE_PIR_PXDIR8, 8 .EQU GPIOE_PIR_PXDIR7, 7 .EQU GPIOE_PIR_PXDIR6, 6 .EQU GPIOE_PIR_PXDIR5, 5 .EQU GPIOE_PIR_PXDIR4, 4 .EQU GPIOE_PIR_PXDIR3, 3 .EQU GPIOE_PIR_PXDIR2, 2 .EQU GPIOE_PIR_PXDIR1, 1 .EQU GPIOE_PIR_PXDIR0, 0 // register------------------------------------- .EQU GPIOE_POR, 0x50000104 // 0x5000 0104 GPIOE_POR Bits------------------------------------- .EQU GPIOE_POR_PXPOR15, 15 .EQU GPIOE_POR_PXPOR14, 14 .EQU GPIOE_POR_PXPOR13, 13 .EQU GPIOE_POR_PXPOR12, 12 .EQU GPIOE_POR_PXPOR11, 11 .EQU GPIOE_POR_PXPOR10, 10 .EQU GPIOE_POR_PXPOR9, 9 .EQU GPIOE_POR_PXPOR8, 8 .EQU GPIOE_POR_PXPOR7, 7 .EQU GPIOE_POR_PXPOR6, 6 .EQU GPIOE_POR_PXPOR5, 5 .EQU GPIOE_POR_PXPOR4, 4 .EQU GPIOE_POR_PXPOR3, 3 .EQU GPIOE_POR_PXPOR2, 2 .EQU GPIOE_POR_PXPOR1, 1 .EQU GPIOE_POR_PXPOR0, 0 // register------------------------------------- .EQU GPIOE_PUR, 0x50000108 // 0x5000 0108 GPIOE_PUR Bits------------------------------------- .EQU GPIOE_PUR_PXPUR15, 15 .EQU GPIOE_PUR_PXPUR14, 14 .EQU GPIOE_PUR_PXPUR13, 13 .EQU GPIOE_PUR_PXPUR12, 12 .EQU GPIOE_PUR_PXPUR11, 11 .EQU GPIOE_PUR_PXPUR10, 10 .EQU GPIOE_PUR_PXPUR9, 9 .EQU GPIOE_PUR_PXPUR8, 8 .EQU GPIOE_PUR_PXPUR7, 7 .EQU GPIOE_PUR_PXPUR6, 6 .EQU GPIOE_PUR_PXPUR5, 5 .EQU GPIOE_PUR_PXPUR4, 4 .EQU GPIOE_PUR_PXPUR3, 3 .EQU GPIOE_PUR_PXPUR2, 2 .EQU GPIOE_PUR_PXPUR1, 1 .EQU GPIOE_PUR_PXPUR0, 0 // register------------------------------------- .EQU GPIOE_PDR, 0x5000010C // 0x5000 010C GPIOE_PDR Bits------------------------------------- .EQU GPIOE_PDR_PXPDR15, 15 .EQU GPIOE_PDR_PXPDR14, 14 .EQU GPIOE_PDR_PXPDR13, 13 .EQU GPIOE_PDR_PXPDR12, 12 .EQU GPIOE_PDR_PXPDR11, 11 .EQU GPIOE_PDR_PXPDR10, 10 .EQU GPIOE_PDR_PXPDR9, 9 .EQU GPIOE_PDR_PXPDR8, 8 .EQU GPIOE_PDR_PXPDR7, 7 .EQU GPIOE_PDR_PXPDR6, 6 .EQU GPIOE_PDR_PXPDR5, 5 .EQU GPIOE_PDR_PXPDR4, 4 .EQU GPIOE_PDR_PXPDR3, 3 .EQU GPIOE_PDR_PXPDR2, 2 .EQU GPIOE_PDR_PXPDR1, 1 .EQU GPIOE_PDR_PXPDR0, 0 // register------------------------------------- .EQU GPIOE_PODR, 0x50000110 // 0x5000 0110 GPIOE_PODR Bits------------------------------------- .EQU GPIOE_PODR_PXPODR15, 15 .EQU GPIOE_PODR_PXPODR14, 14 .EQU GPIOE_PODR_PXPODR13, 13 .EQU GPIOE_PODR_PXPODR12, 12 .EQU GPIOE_PODR_PXPODR11, 11 .EQU GPIOE_PODR_PXPODR10, 10 .EQU GPIOE_PODR_PXPODR9, 9 .EQU GPIOE_PODR_PXPODR8, 8 .EQU GPIOE_PODR_PXPODR7, 7 .EQU GPIOE_PODR_PXPODR6, 6 .EQU GPIOE_PODR_PXPODR5, 5 .EQU GPIOE_PODR_PXPODR4, 4 .EQU GPIOE_PODR_PXPODR3, 3 .EQU GPIOE_PODR_PXPODR2, 2 .EQU GPIOE_PODR_PXPODR1, 1 .EQU GPIOE_PODR_PXPODR0, 0 // register------------------------------------- .EQU GPIOE_PMOD, 0x50000114 // 0x5000 0114 GPIOE_PMOD Bits------------------------------------- .EQU GPIOE_PMOD_PXPMD15_1, 31 .EQU GPIOE_PMOD_PXPMD15_0, 30 .EQU GPIOE_PMOD_PXPMD14_1, 29 .EQU GPIOE_PMOD_PXPMD14_0, 28 .EQU GPIOE_PMOD_PXPMD13_1, 27 .EQU GPIOE_PMOD_PXPMD13_0, 26 .EQU GPIOE_PMOD_PXPMD12_1, 25 .EQU GPIOE_PMOD_PXPMD12_0, 24 .EQU GPIOE_PMOD_PXPMD11_1, 23 .EQU GPIOE_PMOD_PXPMD11_0, 22 .EQU GPIOE_PMOD_PXPMD10_1, 21 .EQU GPIOE_PMOD_PXPMD10_0, 20 .EQU GPIOE_PMOD_PXPMD9_1, 19 .EQU GPIOE_PMOD_PXPMD9_0, 18 .EQU GPIOE_PMOD_PXPMD8_1, 17 .EQU GPIOE_PMOD_PXPMD8_0, 16 .EQU GPIOE_PMOD_PXPMD7_1, 15 .EQU GPIOE_PMOD_PXPMD7_0, 14 .EQU GPIOE_PMOD_PXPMD6_1, 13 .EQU GPIOE_PMOD_PXPMD6_0, 12 .EQU GPIOE_PMOD_PXPMD5_1, 11 .EQU GPIOE_PMOD_PXPMD5_0, 10 .EQU GPIOE_PMOD_PXPMD4_1, 9 .EQU GPIOE_PMOD_PXPMD4_0, 8 .EQU GPIOE_PMOD_PXPMD3_1, 7 .EQU GPIOE_PMOD_PXPMD3_0, 6 .EQU GPIOE_PMOD_PXPMD2_1, 5 .EQU GPIOE_PMOD_PXPMD2_0, 4 .EQU GPIOE_PMOD_PXPMD1_1, 3 .EQU GPIOE_PMOD_PXPMD1_0, 2 .EQU GPIOE_PMOD_PXPMD0_1, 1 .EQU GPIOE_PMOD_PXPMD0_0, 0 // register------------------------------------- .EQU GPIOE_OMOD, 0x50000118 // 0x5000 0118 GPIOE_OMOD Bits------------------------------------- .EQU GPIOE_OMOD_PXOMD15, 30 .EQU GPIOE_OMOD_PXOMD14, 28 .EQU GPIOE_OMOD_PXOMD13, 26 .EQU GPIOE_OMOD_PXOMD12, 24 .EQU GPIOE_OMOD_PXOMD11, 22 .EQU GPIOE_OMOD_PXOMD10, 20 .EQU GPIOE_OMOD_PXOMD9, 18 .EQU GPIOE_OMOD_PXOMD8, 16 .EQU GPIOE_OMOD_PXOMD7, 14 .EQU GPIOE_OMOD_PXOMD6, 12 .EQU GPIOE_OMOD_PXOMD5, 10 .EQU GPIOE_OMOD_PXOMD4, 8 .EQU GPIOE_OMOD_PXOMD3, 6 .EQU GPIOE_OMOD_PXOMD2, 4 .EQU GPIOE_OMOD_PXOMD1, 2 .EQU GPIOE_OMOD_PXOMD0, 0 // register------------------------------------- .EQU GPIOE_LOCK, 0x5000011C // 0x5000 011C GPIOE_LOCK Bits------------------------------------- .EQU GPIOE_LOCK_PXLCKKEY15, 31 .EQU GPIOE_LOCK_PXLCKKEY14, 30 .EQU GPIOE_LOCK_PXLCKKEY13, 29 .EQU GPIOE_LOCK_PXLCKKEY12, 28 .EQU GPIOE_LOCK_PXLCKKEY11, 27 .EQU GPIOE_LOCK_PXLCKKEY10, 26 .EQU GPIOE_LOCK_PXLCKKEY9, 25 .EQU GPIOE_LOCK_PXLCKKEY8, 24 .EQU GPIOE_LOCK_PXLCKKEY7, 23 .EQU GPIOE_LOCK_PXLCKKEY6, 22 .EQU GPIOE_LOCK_PXLCKKEY5, 21 .EQU GPIOE_LOCK_PXLCKKEY4, 20 .EQU GPIOE_LOCK_PXLCKKEY3, 19 .EQU GPIOE_LOCK_PXLCKKEY2, 18 .EQU GPIOE_LOCK_PXLCKKEY1, 17 .EQU GPIOE_LOCK_PXLCKKEY0, 16 .EQU GPIOE_LOCK_PXLCK15, 15 .EQU GPIOE_LOCK_PXLCK14, 14 .EQU GPIOE_LOCK_PXLCK13, 13 .EQU GPIOE_LOCK_PXLCK12, 12 .EQU GPIOE_LOCK_PXLCK11, 11 .EQU GPIOE_LOCK_PXLCK10, 10 .EQU GPIOE_LOCK_PXLCK9, 9 .EQU GPIOE_LOCK_PXLCK8, 8 .EQU GPIOE_LOCK_PXLCK7, 7 .EQU GPIOE_LOCK_PXLCK6, 6 .EQU GPIOE_LOCK_PXLCK5, 5 .EQU GPIOE_LOCK_PXLCK4, 4 .EQU GPIOE_LOCK_PXLCK3, 3 .EQU GPIOE_LOCK_PXLCK2, 2 .EQU GPIOE_LOCK_PXLCK1, 1 .EQU GPIOE_LOCK_PXLCK0, 0 // register------------------------------------- .EQU GPIOE_RMPL, 0x50000120 // 0x5000 0120 GPIOE_RMPL Bits------------------------------------- .EQU GPIOE_RMPL_PXRMP7_3, 31 .EQU GPIOE_RMPL_PXRMP7_2, 30 .EQU GPIOE_RMPL_PXRMP7_1, 29 .EQU GPIOE_RMPL_PXRMP7_0, 28 .EQU GPIOE_RMPL_PXRMP6_3, 27 .EQU GPIOE_RMPL_PXRMP6_2, 26 .EQU GPIOE_RMPL_PXRMP6_1, 25 .EQU GPIOE_RMPL_PXRMP6_0, 24 .EQU GPIOE_RMPL_PXRMP5_3, 23 .EQU GPIOE_RMPL_PXRMP5_2, 22 .EQU GPIOE_RMPL_PXRMP5_1, 21 .EQU GPIOE_RMPL_PXRMP5_0, 20 .EQU GPIOE_RMPL_PXRMP4_3, 19 .EQU GPIOE_RMPL_PXRMP4_2, 18 .EQU GPIOE_RMPL_PXRMP4_1, 17 .EQU GPIOE_RMPL_PXRMP4_0, 16 .EQU GPIOE_RMPL_PXRMP3_3, 15 .EQU GPIOE_RMPL_PXRMP3_2, 14 .EQU GPIOE_RMPL_PXRMP3_1, 13 .EQU GPIOE_RMPL_PXRMP3_0, 12 .EQU GPIOE_RMPL_PXRMP2_3, 11 .EQU GPIOE_RMPL_PXRMP2_2, 10 .EQU GPIOE_RMPL_PXRMP2_1, 9 .EQU GPIOE_RMPL_PXRMP2_0, 8 .EQU GPIOE_RMPL_PXRMP1_3, 7 .EQU GPIOE_RMPL_PXRMP1_2, 6 .EQU GPIOE_RMPL_PXRMP1_1, 5 .EQU GPIOE_RMPL_PXRMP1_0, 4 .EQU GPIOE_RMPL_PXRMP0_3, 3 .EQU GPIOE_RMPL_PXRMP0_2, 2 .EQU GPIOE_RMPL_PXRMP0_1, 1 .EQU GPIOE_RMPL_PXRMP0_0, 0 // register------------------------------------- .EQU GPIOE_RMPH, 0x50000124 // 0x5000 0124 GPIOE_RMPH Bits------------------------------------- .EQU GPIOE_RMPH_PXRMP15_3, 31 .EQU GPIOE_RMPH_PXRMP15_2, 30 .EQU GPIOE_RMPH_PXRMP15_1, 29 .EQU GPIOE_RMPH_PXRMP15_0, 28 .EQU GPIOE_RMPH_PXRMP14_3, 27 .EQU GPIOE_RMPH_PXRMP14_2, 26 .EQU GPIOE_RMPH_PXRMP14_1, 25 .EQU GPIOE_RMPH_PXRMP14_0, 24 .EQU GPIOE_RMPH_PXRMP13_3, 23 .EQU GPIOE_RMPH_PXRMP13_2, 22 .EQU GPIOE_RMPH_PXRMP13_1, 21 .EQU GPIOE_RMPH_PXRMP13_0, 20 .EQU GPIOE_RMPH_PXRMP12_3, 19 .EQU GPIOE_RMPH_PXRMP12_2, 18 .EQU GPIOE_RMPH_PXRMP12_1, 17 .EQU GPIOE_RMPH_PXRMP12_0, 16 .EQU GPIOE_RMPH_PXRMP11_3, 15 .EQU GPIOE_RMPH_PXRMP11_2, 14 .EQU GPIOE_RMPH_PXRMP11_1, 13 .EQU GPIOE_RMPH_PXRMP11_0, 12 .EQU GPIOE_RMPH_PXRMP10_3, 11 .EQU GPIOE_RMPH_PXRMP10_2, 10 .EQU GPIOE_RMPH_PXRMP10_1, 9 .EQU GPIOE_RMPH_PXRMP10_0, 8 .EQU GPIOE_RMPH_PXRMP9_3, 7 .EQU GPIOE_RMPH_PXRMP9_2, 6 .EQU GPIOE_RMPH_PXRMP9_1, 5 .EQU GPIOE_RMPH_PXRMP9_0, 4 .EQU GPIOE_RMPH_PXRMP8_3, 3 .EQU GPIOE_RMPH_PXRMP8_2, 2 .EQU GPIOE_RMPH_PXRMP8_1, 1 .EQU GPIOE_RMPH_PXRMP8_0, 0 // register------------------------------------- .EQU GPIOE_RMP_MSB, 0x50000134 // 0x5000 0134 GPIOE_RMP_MSB Bits------------------------------------- .EQU GPIOE_RMP_MSB_RMPMSB31, 31 .EQU GPIOE_RMP_MSB_RMPMSB30, 30 .EQU GPIOE_RMP_MSB_RMPMSB29, 29 .EQU GPIOE_RMP_MSB_RMPMSB28, 28 .EQU GPIOE_RMP_MSB_RMPMSB27, 27 .EQU GPIOE_RMP_MSB_RMPMSB26, 26 .EQU GPIOE_RMP_MSB_RMPMSB25, 25 .EQU GPIOE_RMP_MSB_RMPMSB24, 24 .EQU GPIOE_RMP_MSB_RMPMSB23, 23 .EQU GPIOE_RMP_MSB_RMPMSB22, 22 .EQU GPIOE_RMP_MSB_RMPMSB21, 21 .EQU GPIOE_RMP_MSB_RMPMSB20, 20 .EQU GPIOE_RMP_MSB_RMPMSB19, 19 .EQU GPIOE_RMP_MSB_RMPMSB18, 18 .EQU GPIOE_RMP_MSB_RMPMSB17, 17 .EQU GPIOE_RMP_MSB_RMPMSB16, 16 .EQU GPIOE_RMP_MSB_RMPMSB15, 15 .EQU GPIOE_RMP_MSB_RMPMSB14, 14 .EQU GPIOE_RMP_MSB_RMPMSB13, 13 .EQU GPIOE_RMP_MSB_RMPMSB12, 12 .EQU GPIOE_RMP_MSB_RMPMSB11, 11 .EQU GPIOE_RMP_MSB_RMPMSB10, 10 .EQU GPIOE_RMP_MSB_RMPMSB9, 9 .EQU GPIOE_RMP_MSB_RMPMSB8, 8 .EQU GPIOE_RMP_MSB_RMPMSB7, 7 .EQU GPIOE_RMP_MSB_RMPMSB6, 6 .EQU GPIOE_RMP_MSB_RMPMSB5, 5 .EQU GPIOE_RMP_MSB_RMPMSB4, 4 .EQU GPIOE_RMP_MSB_RMPMSB3, 3 .EQU GPIOE_RMP_MSB_RMPMSB2, 2 .EQU GPIOE_RMP_MSB_RMPMSB1, 1 .EQU GPIOE_RMP_MSB_RMPMSB0, 0 // register------------------------------------- .EQU GPIOE_SDE, 0x50000138 // 0x5000 0138 GPIOE_SDE Bits------------------------------------- .EQU GPIOE_SDE_SDEF15, 31 .EQU GPIOE_SDE_SDEF14, 30 .EQU GPIOE_SDE_SDEF13, 29 .EQU GPIOE_SDE_SDEF12, 28 .EQU GPIOE_SDE_SDEF11, 27 .EQU GPIOE_SDE_SDEF10, 26 .EQU GPIOE_SDE_SDEF9, 25 .EQU GPIOE_SDE_SDEF8, 24 .EQU GPIOE_SDE_SDEF7, 23 .EQU GPIOE_SDE_SDEF6, 22 .EQU GPIOE_SDE_SDEF5, 21 .EQU GPIOE_SDE_SDEF4, 20 .EQU GPIOE_SDE_SDEF3, 19 .EQU GPIOE_SDE_SDEF2, 18 .EQU GPIOE_SDE_SDEF1, 17 .EQU GPIOE_SDE_SDEF0, 16 .EQU GPIOE_SDE_SDEN15, 15 .EQU GPIOE_SDE_SDEN14, 14 .EQU GPIOE_SDE_SDEN13, 13 .EQU GPIOE_SDE_SDEN12, 12 .EQU GPIOE_SDE_SDEN11, 11 .EQU GPIOE_SDE_SDEN10, 10 .EQU GPIOE_SDE_SDEN9, 9 .EQU GPIOE_SDE_SDEN8, 8 .EQU GPIOE_SDE_SDEN7, 7 .EQU GPIOE_SDE_SDEN6, 6 .EQU GPIOE_SDE_SDEN5, 5 .EQU GPIOE_SDE_SDEN4, 4 .EQU GPIOE_SDE_SDEN3, 3 .EQU GPIOE_SDE_SDEN2, 2 .EQU GPIOE_SDE_SDEN1, 1 .EQU GPIOE_SDE_SDEN0, 0 // register------------------------------------- .EQU GPIOE_SDCTL, 0x5000013C // 0x5000 013C GPIOE_SDCTL Bits------------------------------------- .EQU GPIOE_SDCTL_PSDEF, 2 .EQU GPIOE_SDCTL_LINKEN, 1 .EQU GPIOE_SDCTL_SWSAMCLK, 0 // register------------------------------------- .EQU GPIOF_PIR, 0x50000140 // 0x5000 0140 GPIOF_PIR Bits------------------------------------- .EQU GPIOF_PIR_PXDIR15, 15 .EQU GPIOF_PIR_PXDIR14, 14 .EQU GPIOF_PIR_PXDIR13, 13 .EQU GPIOF_PIR_PXDIR12, 12 .EQU GPIOF_PIR_PXDIR11, 11 .EQU GPIOF_PIR_PXDIR10, 10 .EQU GPIOF_PIR_PXDIR9, 9 .EQU GPIOF_PIR_PXDIR8, 8 .EQU GPIOF_PIR_PXDIR7, 7 .EQU GPIOF_PIR_PXDIR6, 6 .EQU GPIOF_PIR_PXDIR5, 5 .EQU GPIOF_PIR_PXDIR4, 4 .EQU GPIOF_PIR_PXDIR3, 3 .EQU GPIOF_PIR_PXDIR2, 2 .EQU GPIOF_PIR_PXDIR1, 1 .EQU GPIOF_PIR_PXDIR0, 0 // register------------------------------------- .EQU GPIOF_POR, 0x50000144 // 0x5000 0144 GPIOF_POR Bits------------------------------------- .EQU GPIOF_POR_PXPOR15, 15 .EQU GPIOF_POR_PXPOR14, 14 .EQU GPIOF_POR_PXPOR13, 13 .EQU GPIOF_POR_PXPOR12, 12 .EQU GPIOF_POR_PXPOR11, 11 .EQU GPIOF_POR_PXPOR10, 10 .EQU GPIOF_POR_PXPOR9, 9 .EQU GPIOF_POR_PXPOR8, 8 .EQU GPIOF_POR_PXPOR7, 7 .EQU GPIOF_POR_PXPOR6, 6 .EQU GPIOF_POR_PXPOR5, 5 .EQU GPIOF_POR_PXPOR4, 4 .EQU GPIOF_POR_PXPOR3, 3 .EQU GPIOF_POR_PXPOR2, 2 .EQU GPIOF_POR_PXPOR1, 1 .EQU GPIOF_POR_PXPOR0, 0 // register------------------------------------- .EQU GPIOF_PUR, 0x50000148 // 0x5000 0148 GPIOF_PUR Bits------------------------------------- .EQU GPIOF_PUR_PXPUR15, 15 .EQU GPIOF_PUR_PXPUR14, 14 .EQU GPIOF_PUR_PXPUR13, 13 .EQU GPIOF_PUR_PXPUR12, 12 .EQU GPIOF_PUR_PXPUR11, 11 .EQU GPIOF_PUR_PXPUR10, 10 .EQU GPIOF_PUR_PXPUR9, 9 .EQU GPIOF_PUR_PXPUR8, 8 .EQU GPIOF_PUR_PXPUR7, 7 .EQU GPIOF_PUR_PXPUR6, 6 .EQU GPIOF_PUR_PXPUR5, 5 .EQU GPIOF_PUR_PXPUR4, 4 .EQU GPIOF_PUR_PXPUR3, 3 .EQU GPIOF_PUR_PXPUR2, 2 .EQU GPIOF_PUR_PXPUR1, 1 .EQU GPIOF_PUR_PXPUR0, 0 // register------------------------------------- .EQU GPIOF_PDR, 0x5000014C // 0x5000 014C GPIOF_PDR Bits------------------------------------- .EQU GPIOF_PDR_PXPDR15, 15 .EQU GPIOF_PDR_PXPDR14, 14 .EQU GPIOF_PDR_PXPDR13, 13 .EQU GPIOF_PDR_PXPDR12, 12 .EQU GPIOF_PDR_PXPDR11, 11 .EQU GPIOF_PDR_PXPDR10, 10 .EQU GPIOF_PDR_PXPDR9, 9 .EQU GPIOF_PDR_PXPDR8, 8 .EQU GPIOF_PDR_PXPDR7, 7 .EQU GPIOF_PDR_PXPDR6, 6 .EQU GPIOF_PDR_PXPDR5, 5 .EQU GPIOF_PDR_PXPDR4, 4 .EQU GPIOF_PDR_PXPDR3, 3 .EQU GPIOF_PDR_PXPDR2, 2 .EQU GPIOF_PDR_PXPDR1, 1 .EQU GPIOF_PDR_PXPDR0, 0 // register------------------------------------- .EQU GPIOF_PODR, 0x50000150 // 0x5000 0150 GPIOF_PODR Bits------------------------------------- .EQU GPIOF_PODR_PXPODR15, 15 .EQU GPIOF_PODR_PXPODR14, 14 .EQU GPIOF_PODR_PXPODR13, 13 .EQU GPIOF_PODR_PXPODR12, 12 .EQU GPIOF_PODR_PXPODR11, 11 .EQU GPIOF_PODR_PXPODR10, 10 .EQU GPIOF_PODR_PXPODR9, 9 .EQU GPIOF_PODR_PXPODR8, 8 .EQU GPIOF_PODR_PXPODR7, 7 .EQU GPIOF_PODR_PXPODR6, 6 .EQU GPIOF_PODR_PXPODR5, 5 .EQU GPIOF_PODR_PXPODR4, 4 .EQU GPIOF_PODR_PXPODR3, 3 .EQU GPIOF_PODR_PXPODR2, 2 .EQU GPIOF_PODR_PXPODR1, 1 .EQU GPIOF_PODR_PXPODR0, 0 // register------------------------------------- .EQU GPIOF_PMOD, 0x50000154 // 0x5000 0154 GPIOF_PMOD Bits------------------------------------- .EQU GPIOF_PMOD_PXPMD15_1, 31 .EQU GPIOF_PMOD_PXPMD15_0, 30 .EQU GPIOF_PMOD_PXPMD14_1, 29 .EQU GPIOF_PMOD_PXPMD14_0, 28 .EQU GPIOF_PMOD_PXPMD13_1, 27 .EQU GPIOF_PMOD_PXPMD13_0, 26 .EQU GPIOF_PMOD_PXPMD12_1, 25 .EQU GPIOF_PMOD_PXPMD12_0, 24 .EQU GPIOF_PMOD_PXPMD11_1, 23 .EQU GPIOF_PMOD_PXPMD11_0, 22 .EQU GPIOF_PMOD_PXPMD10_1, 21 .EQU GPIOF_PMOD_PXPMD10_0, 20 .EQU GPIOF_PMOD_PXPMD9_1, 19 .EQU GPIOF_PMOD_PXPMD9_0, 18 .EQU GPIOF_PMOD_PXPMD8_1, 17 .EQU GPIOF_PMOD_PXPMD8_0, 16 .EQU GPIOF_PMOD_PXPMD7_1, 15 .EQU GPIOF_PMOD_PXPMD7_0, 14 .EQU GPIOF_PMOD_PXPMD6_1, 13 .EQU GPIOF_PMOD_PXPMD6_0, 12 .EQU GPIOF_PMOD_PXPMD5_1, 11 .EQU GPIOF_PMOD_PXPMD5_0, 10 .EQU GPIOF_PMOD_PXPMD4_1, 9 .EQU GPIOF_PMOD_PXPMD4_0, 8 .EQU GPIOF_PMOD_PXPMD3_1, 7 .EQU GPIOF_PMOD_PXPMD3_0, 6 .EQU GPIOF_PMOD_PXPMD2_1, 5 .EQU GPIOF_PMOD_PXPMD2_0, 4 .EQU GPIOF_PMOD_PXPMD1_1, 3 .EQU GPIOF_PMOD_PXPMD1_0, 2 .EQU GPIOF_PMOD_PXPMD0_1, 1 .EQU GPIOF_PMOD_PXPMD0_0, 0 // register------------------------------------- .EQU GPIOF_OMOD, 0x50000158 // 0x5000 0158 GPIOF_OMOD Bits------------------------------------- .EQU GPIOF_OMOD_PXOMD15, 30 .EQU GPIOF_OMOD_PXOMD14, 28 .EQU GPIOF_OMOD_PXOMD13, 26 .EQU GPIOF_OMOD_PXOMD12, 24 .EQU GPIOF_OMOD_PXOMD11, 22 .EQU GPIOF_OMOD_PXOMD10, 20 .EQU GPIOF_OMOD_PXOMD9, 18 .EQU GPIOF_OMOD_PXOMD8, 16 .EQU GPIOF_OMOD_PXOMD7, 14 .EQU GPIOF_OMOD_PXOMD6, 12 .EQU GPIOF_OMOD_PXOMD5, 10 .EQU GPIOF_OMOD_PXOMD4, 8 .EQU GPIOF_OMOD_PXOMD3, 6 .EQU GPIOF_OMOD_PXOMD2, 4 .EQU GPIOF_OMOD_PXOMD1, 2 .EQU GPIOF_OMOD_PXOMD0, 0 // register------------------------------------- .EQU GPIOF_LOCK, 0x5000015C // 0x5000 015C GPIOF_LOCK Bits------------------------------------- .EQU GPIOF_LOCK_PXLCKKEY15, 31 .EQU GPIOF_LOCK_PXLCKKEY14, 30 .EQU GPIOF_LOCK_PXLCKKEY13, 29 .EQU GPIOF_LOCK_PXLCKKEY12, 28 .EQU GPIOF_LOCK_PXLCKKEY11, 27 .EQU GPIOF_LOCK_PXLCKKEY10, 26 .EQU GPIOF_LOCK_PXLCKKEY9, 25 .EQU GPIOF_LOCK_PXLCKKEY8, 24 .EQU GPIOF_LOCK_PXLCKKEY7, 23 .EQU GPIOF_LOCK_PXLCKKEY6, 22 .EQU GPIOF_LOCK_PXLCKKEY5, 21 .EQU GPIOF_LOCK_PXLCKKEY4, 20 .EQU GPIOF_LOCK_PXLCKKEY3, 19 .EQU GPIOF_LOCK_PXLCKKEY2, 18 .EQU GPIOF_LOCK_PXLCKKEY1, 17 .EQU GPIOF_LOCK_PXLCKKEY0, 16 .EQU GPIOF_LOCK_PXLCK15, 15 .EQU GPIOF_LOCK_PXLCK14, 14 .EQU GPIOF_LOCK_PXLCK13, 13 .EQU GPIOF_LOCK_PXLCK12, 12 .EQU GPIOF_LOCK_PXLCK11, 11 .EQU GPIOF_LOCK_PXLCK10, 10 .EQU GPIOF_LOCK_PXLCK9, 9 .EQU GPIOF_LOCK_PXLCK8, 8 .EQU GPIOF_LOCK_PXLCK7, 7 .EQU GPIOF_LOCK_PXLCK6, 6 .EQU GPIOF_LOCK_PXLCK5, 5 .EQU GPIOF_LOCK_PXLCK4, 4 .EQU GPIOF_LOCK_PXLCK3, 3 .EQU GPIOF_LOCK_PXLCK2, 2 .EQU GPIOF_LOCK_PXLCK1, 1 .EQU GPIOF_LOCK_PXLCK0, 0 // register------------------------------------- .EQU GPIOF_RMPL, 0x50000160 // 0x5000 0160 GPIOF_RMPL Bits------------------------------------- .EQU GPIOF_RMPL_PXRMP7_3, 31 .EQU GPIOF_RMPL_PXRMP7_2, 30 .EQU GPIOF_RMPL_PXRMP7_1, 29 .EQU GPIOF_RMPL_PXRMP7_0, 28 .EQU GPIOF_RMPL_PXRMP6_3, 27 .EQU GPIOF_RMPL_PXRMP6_2, 26 .EQU GPIOF_RMPL_PXRMP6_1, 25 .EQU GPIOF_RMPL_PXRMP6_0, 24 .EQU GPIOF_RMPL_PXRMP5_3, 23 .EQU GPIOF_RMPL_PXRMP5_2, 22 .EQU GPIOF_RMPL_PXRMP5_1, 21 .EQU GPIOF_RMPL_PXRMP5_0, 20 .EQU GPIOF_RMPL_PXRMP4_3, 19 .EQU GPIOF_RMPL_PXRMP4_2, 18 .EQU GPIOF_RMPL_PXRMP4_1, 17 .EQU GPIOF_RMPL_PXRMP4_0, 16 .EQU GPIOF_RMPL_PXRMP3_3, 15 .EQU GPIOF_RMPL_PXRMP3_2, 14 .EQU GPIOF_RMPL_PXRMP3_1, 13 .EQU GPIOF_RMPL_PXRMP3_0, 12 .EQU GPIOF_RMPL_PXRMP2_3, 11 .EQU GPIOF_RMPL_PXRMP2_2, 10 .EQU GPIOF_RMPL_PXRMP2_1, 9 .EQU GPIOF_RMPL_PXRMP2_0, 8 .EQU GPIOF_RMPL_PXRMP1_3, 7 .EQU GPIOF_RMPL_PXRMP1_2, 6 .EQU GPIOF_RMPL_PXRMP1_1, 5 .EQU GPIOF_RMPL_PXRMP1_0, 4 .EQU GPIOF_RMPL_PXRMP0_3, 3 .EQU GPIOF_RMPL_PXRMP0_2, 2 .EQU GPIOF_RMPL_PXRMP0_1, 1 .EQU GPIOF_RMPL_PXRMP0_0, 0 // register------------------------------------- .EQU GPIOF_RMPH, 0x50000164 // 0x5000 0164 GPIOF_RMPH Bits------------------------------------- .EQU GPIOF_RMPH_PXRMP15_3, 31 .EQU GPIOF_RMPH_PXRMP15_2, 30 .EQU GPIOF_RMPH_PXRMP15_1, 29 .EQU GPIOF_RMPH_PXRMP15_0, 28 .EQU GPIOF_RMPH_PXRMP14_3, 27 .EQU GPIOF_RMPH_PXRMP14_2, 26 .EQU GPIOF_RMPH_PXRMP14_1, 25 .EQU GPIOF_RMPH_PXRMP14_0, 24 .EQU GPIOF_RMPH_PXRMP13_3, 23 .EQU GPIOF_RMPH_PXRMP13_2, 22 .EQU GPIOF_RMPH_PXRMP13_1, 21 .EQU GPIOF_RMPH_PXRMP13_0, 20 .EQU GPIOF_RMPH_PXRMP12_3, 19 .EQU GPIOF_RMPH_PXRMP12_2, 18 .EQU GPIOF_RMPH_PXRMP12_1, 17 .EQU GPIOF_RMPH_PXRMP12_0, 16 .EQU GPIOF_RMPH_PXRMP11_3, 15 .EQU GPIOF_RMPH_PXRMP11_2, 14 .EQU GPIOF_RMPH_PXRMP11_1, 13 .EQU GPIOF_RMPH_PXRMP11_0, 12 .EQU GPIOF_RMPH_PXRMP10_3, 11 .EQU GPIOF_RMPH_PXRMP10_2, 10 .EQU GPIOF_RMPH_PXRMP10_1, 9 .EQU GPIOF_RMPH_PXRMP10_0, 8 .EQU GPIOF_RMPH_PXRMP9_3, 7 .EQU GPIOF_RMPH_PXRMP9_2, 6 .EQU GPIOF_RMPH_PXRMP9_1, 5 .EQU GPIOF_RMPH_PXRMP9_0, 4 .EQU GPIOF_RMPH_PXRMP8_3, 3 .EQU GPIOF_RMPH_PXRMP8_2, 2 .EQU GPIOF_RMPH_PXRMP8_1, 1 .EQU GPIOF_RMPH_PXRMP8_0, 0 // register------------------------------------- .EQU GPIOF_RMP_MSB, 0x50000174 // 0x5000 0174 GPIOF_RMP_MSB Bits------------------------------------- .EQU GPIOF_RMP_MSB_RMPMSB31, 31 .EQU GPIOF_RMP_MSB_RMPMSB30, 30 .EQU GPIOF_RMP_MSB_RMPMSB29, 29 .EQU GPIOF_RMP_MSB_RMPMSB28, 28 .EQU GPIOF_RMP_MSB_RMPMSB27, 27 .EQU GPIOF_RMP_MSB_RMPMSB26, 26 .EQU GPIOF_RMP_MSB_RMPMSB25, 25 .EQU GPIOF_RMP_MSB_RMPMSB24, 24 .EQU GPIOF_RMP_MSB_RMPMSB23, 23 .EQU GPIOF_RMP_MSB_RMPMSB22, 22 .EQU GPIOF_RMP_MSB_RMPMSB21, 21 .EQU GPIOF_RMP_MSB_RMPMSB20, 20 .EQU GPIOF_RMP_MSB_RMPMSB19, 19 .EQU GPIOF_RMP_MSB_RMPMSB18, 18 .EQU GPIOF_RMP_MSB_RMPMSB17, 17 .EQU GPIOF_RMP_MSB_RMPMSB16, 16 .EQU GPIOF_RMP_MSB_RMPMSB15, 15 .EQU GPIOF_RMP_MSB_RMPMSB14, 14 .EQU GPIOF_RMP_MSB_RMPMSB13, 13 .EQU GPIOF_RMP_MSB_RMPMSB12, 12 .EQU GPIOF_RMP_MSB_RMPMSB11, 11 .EQU GPIOF_RMP_MSB_RMPMSB10, 10 .EQU GPIOF_RMP_MSB_RMPMSB9, 9 .EQU GPIOF_RMP_MSB_RMPMSB8, 8 .EQU GPIOF_RMP_MSB_RMPMSB7, 7 .EQU GPIOF_RMP_MSB_RMPMSB6, 6 .EQU GPIOF_RMP_MSB_RMPMSB5, 5 .EQU GPIOF_RMP_MSB_RMPMSB4, 4 .EQU GPIOF_RMP_MSB_RMPMSB3, 3 .EQU GPIOF_RMP_MSB_RMPMSB2, 2 .EQU GPIOF_RMP_MSB_RMPMSB1, 1 .EQU GPIOF_RMP_MSB_RMPMSB0, 0 // register------------------------------------- .EQU GPIOF_SDE, 0x50000178 // 0x5000 0178 GPIOF_SDE Bits------------------------------------- .EQU GPIOF_SDE_SDEF15, 31 .EQU GPIOF_SDE_SDEF14, 30 .EQU GPIOF_SDE_SDEF13, 29 .EQU GPIOF_SDE_SDEF12, 28 .EQU GPIOF_SDE_SDEF11, 27 .EQU GPIOF_SDE_SDEF10, 26 .EQU GPIOF_SDE_SDEF9, 25 .EQU GPIOF_SDE_SDEF8, 24 .EQU GPIOF_SDE_SDEF7, 23 .EQU GPIOF_SDE_SDEF6, 22 .EQU GPIOF_SDE_SDEF5, 21 .EQU GPIOF_SDE_SDEF4, 20 .EQU GPIOF_SDE_SDEF3, 19 .EQU GPIOF_SDE_SDEF2, 18 .EQU GPIOF_SDE_SDEF1, 17 .EQU GPIOF_SDE_SDEF0, 16 .EQU GPIOF_SDE_SDEN15, 15 .EQU GPIOF_SDE_SDEN14, 14 .EQU GPIOF_SDE_SDEN13, 13 .EQU GPIOF_SDE_SDEN12, 12 .EQU GPIOF_SDE_SDEN11, 11 .EQU GPIOF_SDE_SDEN10, 10 .EQU GPIOF_SDE_SDEN9, 9 .EQU GPIOF_SDE_SDEN8, 8 .EQU GPIOF_SDE_SDEN7, 7 .EQU GPIOF_SDE_SDEN6, 6 .EQU GPIOF_SDE_SDEN5, 5 .EQU GPIOF_SDE_SDEN4, 4 .EQU GPIOF_SDE_SDEN3, 3 .EQU GPIOF_SDE_SDEN2, 2 .EQU GPIOF_SDE_SDEN1, 1 .EQU GPIOF_SDE_SDEN0, 0 // register------------------------------------- .EQU GPIOF_SDCTL, 0x5000017C // 0x5000 017C GPIOF_SDCTL Bits------------------------------------- .EQU GPIOF_SDCTL_PSDEF, 2 .EQU GPIOF_SDCTL_LINKEN, 1 .EQU GPIOF_SDCTL_SWSAMCLK, 0 // register------------------------------------- .EQU GPIOG_PIR, 0x50000180 // 0x5000 0180 GPIOG_PIR Bits------------------------------------- .EQU GPIOG_PIR_PXDIR15, 15 .EQU GPIOG_PIR_PXDIR14, 14 .EQU GPIOG_PIR_PXDIR13, 13 .EQU GPIOG_PIR_PXDIR12, 12 .EQU GPIOG_PIR_PXDIR11, 11 .EQU GPIOG_PIR_PXDIR10, 10 .EQU GPIOG_PIR_PXDIR9, 9 .EQU GPIOG_PIR_PXDIR8, 8 .EQU GPIOG_PIR_PXDIR7, 7 .EQU GPIOG_PIR_PXDIR6, 6 .EQU GPIOG_PIR_PXDIR5, 5 .EQU GPIOG_PIR_PXDIR4, 4 .EQU GPIOG_PIR_PXDIR3, 3 .EQU GPIOG_PIR_PXDIR2, 2 .EQU GPIOG_PIR_PXDIR1, 1 .EQU GPIOG_PIR_PXDIR0, 0 // register------------------------------------- .EQU GPIOG_POR, 0x50000184 // 0x5000 0184 GPIOG_POR Bits------------------------------------- .EQU GPIOG_POR_PXPOR15, 15 .EQU GPIOG_POR_PXPOR14, 14 .EQU GPIOG_POR_PXPOR13, 13 .EQU GPIOG_POR_PXPOR12, 12 .EQU GPIOG_POR_PXPOR11, 11 .EQU GPIOG_POR_PXPOR10, 10 .EQU GPIOG_POR_PXPOR9, 9 .EQU GPIOG_POR_PXPOR8, 8 .EQU GPIOG_POR_PXPOR7, 7 .EQU GPIOG_POR_PXPOR6, 6 .EQU GPIOG_POR_PXPOR5, 5 .EQU GPIOG_POR_PXPOR4, 4 .EQU GPIOG_POR_PXPOR3, 3 .EQU GPIOG_POR_PXPOR2, 2 .EQU GPIOG_POR_PXPOR1, 1 .EQU GPIOG_POR_PXPOR0, 0 // register------------------------------------- .EQU GPIOG_PUR, 0x50000188 // 0x5000 0188 GPIOG_PUR Bits------------------------------------- .EQU GPIOG_PUR_PXPUR15, 15 .EQU GPIOG_PUR_PXPUR14, 14 .EQU GPIOG_PUR_PXPUR13, 13 .EQU GPIOG_PUR_PXPUR12, 12 .EQU GPIOG_PUR_PXPUR11, 11 .EQU GPIOG_PUR_PXPUR10, 10 .EQU GPIOG_PUR_PXPUR9, 9 .EQU GPIOG_PUR_PXPUR8, 8 .EQU GPIOG_PUR_PXPUR7, 7 .EQU GPIOG_PUR_PXPUR6, 6 .EQU GPIOG_PUR_PXPUR5, 5 .EQU GPIOG_PUR_PXPUR4, 4 .EQU GPIOG_PUR_PXPUR3, 3 .EQU GPIOG_PUR_PXPUR2, 2 .EQU GPIOG_PUR_PXPUR1, 1 .EQU GPIOG_PUR_PXPUR0, 0 // register------------------------------------- .EQU GPIOG_PDR, 0x5000018C // 0x5000 018C GPIOG_PDR Bits------------------------------------- .EQU GPIOG_PDR_PXPDR15, 15 .EQU GPIOG_PDR_PXPDR14, 14 .EQU GPIOG_PDR_PXPDR13, 13 .EQU GPIOG_PDR_PXPDR12, 12 .EQU GPIOG_PDR_PXPDR11, 11 .EQU GPIOG_PDR_PXPDR10, 10 .EQU GPIOG_PDR_PXPDR9, 9 .EQU GPIOG_PDR_PXPDR8, 8 .EQU GPIOG_PDR_PXPDR7, 7 .EQU GPIOG_PDR_PXPDR6, 6 .EQU GPIOG_PDR_PXPDR5, 5 .EQU GPIOG_PDR_PXPDR4, 4 .EQU GPIOG_PDR_PXPDR3, 3 .EQU GPIOG_PDR_PXPDR2, 2 .EQU GPIOG_PDR_PXPDR1, 1 .EQU GPIOG_PDR_PXPDR0, 0 // register------------------------------------- .EQU GPIOG_PODR, 0x50000190 // 0x5000 0190 GPIOG_PODR Bits------------------------------------- .EQU GPIOG_PODR_PXPODR15, 15 .EQU GPIOG_PODR_PXPODR14, 14 .EQU GPIOG_PODR_PXPODR13, 13 .EQU GPIOG_PODR_PXPODR12, 12 .EQU GPIOG_PODR_PXPODR11, 11 .EQU GPIOG_PODR_PXPODR10, 10 .EQU GPIOG_PODR_PXPODR9, 9 .EQU GPIOG_PODR_PXPODR8, 8 .EQU GPIOG_PODR_PXPODR7, 7 .EQU GPIOG_PODR_PXPODR6, 6 .EQU GPIOG_PODR_PXPODR5, 5 .EQU GPIOG_PODR_PXPODR4, 4 .EQU GPIOG_PODR_PXPODR3, 3 .EQU GPIOG_PODR_PXPODR2, 2 .EQU GPIOG_PODR_PXPODR1, 1 .EQU GPIOG_PODR_PXPODR0, 0 // register------------------------------------- .EQU GPIOG_PMOD, 0x50000194 // 0x5000 0194 GPIOG_PMOD Bits------------------------------------- .EQU GPIOG_PMOD_PXPMD15_1, 31 .EQU GPIOG_PMOD_PXPMD15_0, 30 .EQU GPIOG_PMOD_PXPMD14_1, 29 .EQU GPIOG_PMOD_PXPMD14_0, 28 .EQU GPIOG_PMOD_PXPMD13_1, 27 .EQU GPIOG_PMOD_PXPMD13_0, 26 .EQU GPIOG_PMOD_PXPMD12_1, 25 .EQU GPIOG_PMOD_PXPMD12_0, 24 .EQU GPIOG_PMOD_PXPMD11_1, 23 .EQU GPIOG_PMOD_PXPMD11_0, 22 .EQU GPIOG_PMOD_PXPMD10_1, 21 .EQU GPIOG_PMOD_PXPMD10_0, 20 .EQU GPIOG_PMOD_PXPMD9_1, 19 .EQU GPIOG_PMOD_PXPMD9_0, 18 .EQU GPIOG_PMOD_PXPMD8_1, 17 .EQU GPIOG_PMOD_PXPMD8_0, 16 .EQU GPIOG_PMOD_PXPMD7_1, 15 .EQU GPIOG_PMOD_PXPMD7_0, 14 .EQU GPIOG_PMOD_PXPMD6_1, 13 .EQU GPIOG_PMOD_PXPMD6_0, 12 .EQU GPIOG_PMOD_PXPMD5_1, 11 .EQU GPIOG_PMOD_PXPMD5_0, 10 .EQU GPIOG_PMOD_PXPMD4_1, 9 .EQU GPIOG_PMOD_PXPMD4_0, 8 .EQU GPIOG_PMOD_PXPMD3_1, 7 .EQU GPIOG_PMOD_PXPMD3_0, 6 .EQU GPIOG_PMOD_PXPMD2_1, 5 .EQU GPIOG_PMOD_PXPMD2_0, 4 .EQU GPIOG_PMOD_PXPMD1_1, 3 .EQU GPIOG_PMOD_PXPMD1_0, 2 .EQU GPIOG_PMOD_PXPMD0_1, 1 .EQU GPIOG_PMOD_PXPMD0_0, 0 // register------------------------------------- .EQU GPIOG_OMOD, 0x50000198 // 0x5000 0198 GPIOG_OMOD Bits------------------------------------- .EQU GPIOG_OMOD_PXOMD15, 30 .EQU GPIOG_OMOD_PXOMD14, 28 .EQU GPIOG_OMOD_PXOMD13, 26 .EQU GPIOG_OMOD_PXOMD12, 24 .EQU GPIOG_OMOD_PXOMD11, 22 .EQU GPIOG_OMOD_PXOMD10, 20 .EQU GPIOG_OMOD_PXOMD9, 18 .EQU GPIOG_OMOD_PXOMD8, 16 .EQU GPIOG_OMOD_PXOMD7, 14 .EQU GPIOG_OMOD_PXOMD6, 12 .EQU GPIOG_OMOD_PXOMD5, 10 .EQU GPIOG_OMOD_PXOMD4, 8 .EQU GPIOG_OMOD_PXOMD3, 6 .EQU GPIOG_OMOD_PXOMD2, 4 .EQU GPIOG_OMOD_PXOMD1, 2 .EQU GPIOG_OMOD_PXOMD0, 0 // register------------------------------------- .EQU GPIOG_LOCK, 0x5000019C // 0x5000 019C GPIOG_LOCK Bits------------------------------------- .EQU GPIOG_LOCK_PXLCKKEY15, 31 .EQU GPIOG_LOCK_PXLCKKEY14, 30 .EQU GPIOG_LOCK_PXLCKKEY13, 29 .EQU GPIOG_LOCK_PXLCKKEY12, 28 .EQU GPIOG_LOCK_PXLCKKEY11, 27 .EQU GPIOG_LOCK_PXLCKKEY10, 26 .EQU GPIOG_LOCK_PXLCKKEY9, 25 .EQU GPIOG_LOCK_PXLCKKEY8, 24 .EQU GPIOG_LOCK_PXLCKKEY7, 23 .EQU GPIOG_LOCK_PXLCKKEY6, 22 .EQU GPIOG_LOCK_PXLCKKEY5, 21 .EQU GPIOG_LOCK_PXLCKKEY4, 20 .EQU GPIOG_LOCK_PXLCKKEY3, 19 .EQU GPIOG_LOCK_PXLCKKEY2, 18 .EQU GPIOG_LOCK_PXLCKKEY1, 17 .EQU GPIOG_LOCK_PXLCKKEY0, 16 .EQU GPIOG_LOCK_PXLCK15, 15 .EQU GPIOG_LOCK_PXLCK14, 14 .EQU GPIOG_LOCK_PXLCK13, 13 .EQU GPIOG_LOCK_PXLCK12, 12 .EQU GPIOG_LOCK_PXLCK11, 11 .EQU GPIOG_LOCK_PXLCK10, 10 .EQU GPIOG_LOCK_PXLCK9, 9 .EQU GPIOG_LOCK_PXLCK8, 8 .EQU GPIOG_LOCK_PXLCK7, 7 .EQU GPIOG_LOCK_PXLCK6, 6 .EQU GPIOG_LOCK_PXLCK5, 5 .EQU GPIOG_LOCK_PXLCK4, 4 .EQU GPIOG_LOCK_PXLCK3, 3 .EQU GPIOG_LOCK_PXLCK2, 2 .EQU GPIOG_LOCK_PXLCK1, 1 .EQU GPIOG_LOCK_PXLCK0, 0 // register------------------------------------- .EQU GPIOG_RMPL, 0x500001A0 // 0x5000 01A0 GPIOG_RMPL Bits------------------------------------- .EQU GPIOG_RMPL_PXRMP7_3, 31 .EQU GPIOG_RMPL_PXRMP7_2, 30 .EQU GPIOG_RMPL_PXRMP7_1, 29 .EQU GPIOG_RMPL_PXRMP7_0, 28 .EQU GPIOG_RMPL_PXRMP6_3, 27 .EQU GPIOG_RMPL_PXRMP6_2, 26 .EQU GPIOG_RMPL_PXRMP6_1, 25 .EQU GPIOG_RMPL_PXRMP6_0, 24 .EQU GPIOG_RMPL_PXRMP5_3, 23 .EQU GPIOG_RMPL_PXRMP5_2, 22 .EQU GPIOG_RMPL_PXRMP5_1, 21 .EQU GPIOG_RMPL_PXRMP5_0, 20 .EQU GPIOG_RMPL_PXRMP4_3, 19 .EQU GPIOG_RMPL_PXRMP4_2, 18 .EQU GPIOG_RMPL_PXRMP4_1, 17 .EQU GPIOG_RMPL_PXRMP4_0, 16 .EQU GPIOG_RMPL_PXRMP3_3, 15 .EQU GPIOG_RMPL_PXRMP3_2, 14 .EQU GPIOG_RMPL_PXRMP3_1, 13 .EQU GPIOG_RMPL_PXRMP3_0, 12 .EQU GPIOG_RMPL_PXRMP2_3, 11 .EQU GPIOG_RMPL_PXRMP2_2, 10 .EQU GPIOG_RMPL_PXRMP2_1, 9 .EQU GPIOG_RMPL_PXRMP2_0, 8 .EQU GPIOG_RMPL_PXRMP1_3, 7 .EQU GPIOG_RMPL_PXRMP1_2, 6 .EQU GPIOG_RMPL_PXRMP1_1, 5 .EQU GPIOG_RMPL_PXRMP1_0, 4 .EQU GPIOG_RMPL_PXRMP0_3, 3 .EQU GPIOG_RMPL_PXRMP0_2, 2 .EQU GPIOG_RMPL_PXRMP0_1, 1 .EQU GPIOG_RMPL_PXRMP0_0, 0 // register------------------------------------- .EQU GPIOG_RMPH, 0x500001A4 // 0x5000 01A4 GPIOG_RMPH Bits------------------------------------- .EQU GPIOG_RMPH_PXRMP15_3, 31 .EQU GPIOG_RMPH_PXRMP15_2, 30 .EQU GPIOG_RMPH_PXRMP15_1, 29 .EQU GPIOG_RMPH_PXRMP15_0, 28 .EQU GPIOG_RMPH_PXRMP14_3, 27 .EQU GPIOG_RMPH_PXRMP14_2, 26 .EQU GPIOG_RMPH_PXRMP14_1, 25 .EQU GPIOG_RMPH_PXRMP14_0, 24 .EQU GPIOG_RMPH_PXRMP13_3, 23 .EQU GPIOG_RMPH_PXRMP13_2, 22 .EQU GPIOG_RMPH_PXRMP13_1, 21 .EQU GPIOG_RMPH_PXRMP13_0, 20 .EQU GPIOG_RMPH_PXRMP12_3, 19 .EQU GPIOG_RMPH_PXRMP12_2, 18 .EQU GPIOG_RMPH_PXRMP12_1, 17 .EQU GPIOG_RMPH_PXRMP12_0, 16 .EQU GPIOG_RMPH_PXRMP11_3, 15 .EQU GPIOG_RMPH_PXRMP11_2, 14 .EQU GPIOG_RMPH_PXRMP11_1, 13 .EQU GPIOG_RMPH_PXRMP11_0, 12 .EQU GPIOG_RMPH_PXRMP10_3, 11 .EQU GPIOG_RMPH_PXRMP10_2, 10 .EQU GPIOG_RMPH_PXRMP10_1, 9 .EQU GPIOG_RMPH_PXRMP10_0, 8 .EQU GPIOG_RMPH_PXRMP9_3, 7 .EQU GPIOG_RMPH_PXRMP9_2, 6 .EQU GPIOG_RMPH_PXRMP9_1, 5 .EQU GPIOG_RMPH_PXRMP9_0, 4 .EQU GPIOG_RMPH_PXRMP8_3, 3 .EQU GPIOG_RMPH_PXRMP8_2, 2 .EQU GPIOG_RMPH_PXRMP8_1, 1 .EQU GPIOG_RMPH_PXRMP8_0, 0 // register------------------------------------- .EQU GPIOG_RMP_MSB, 0x500001B4 // 0x5000 01B4 GPIOG_RMP_MSB Bits------------------------------------- .EQU GPIOG_RMP_MSB_RMPMSB31, 31 .EQU GPIOG_RMP_MSB_RMPMSB30, 30 .EQU GPIOG_RMP_MSB_RMPMSB29, 29 .EQU GPIOG_RMP_MSB_RMPMSB28, 28 .EQU GPIOG_RMP_MSB_RMPMSB27, 27 .EQU GPIOG_RMP_MSB_RMPMSB26, 26 .EQU GPIOG_RMP_MSB_RMPMSB25, 25 .EQU GPIOG_RMP_MSB_RMPMSB24, 24 .EQU GPIOG_RMP_MSB_RMPMSB23, 23 .EQU GPIOG_RMP_MSB_RMPMSB22, 22 .EQU GPIOG_RMP_MSB_RMPMSB21, 21 .EQU GPIOG_RMP_MSB_RMPMSB20, 20 .EQU GPIOG_RMP_MSB_RMPMSB19, 19 .EQU GPIOG_RMP_MSB_RMPMSB18, 18 .EQU GPIOG_RMP_MSB_RMPMSB17, 17 .EQU GPIOG_RMP_MSB_RMPMSB16, 16 .EQU GPIOG_RMP_MSB_RMPMSB15, 15 .EQU GPIOG_RMP_MSB_RMPMSB14, 14 .EQU GPIOG_RMP_MSB_RMPMSB13, 13 .EQU GPIOG_RMP_MSB_RMPMSB12, 12 .EQU GPIOG_RMP_MSB_RMPMSB11, 11 .EQU GPIOG_RMP_MSB_RMPMSB10, 10 .EQU GPIOG_RMP_MSB_RMPMSB9, 9 .EQU GPIOG_RMP_MSB_RMPMSB8, 8 .EQU GPIOG_RMP_MSB_RMPMSB7, 7 .EQU GPIOG_RMP_MSB_RMPMSB6, 6 .EQU GPIOG_RMP_MSB_RMPMSB5, 5 .EQU GPIOG_RMP_MSB_RMPMSB4, 4 .EQU GPIOG_RMP_MSB_RMPMSB3, 3 .EQU GPIOG_RMP_MSB_RMPMSB2, 2 .EQU GPIOG_RMP_MSB_RMPMSB1, 1 .EQU GPIOG_RMP_MSB_RMPMSB0, 0 // register------------------------------------- .EQU GPIOG_SDE, 0x500001B8 // 0x5000 01B8 GPIOG_SDE Bits------------------------------------- .EQU GPIOG_SDE_SDEF15, 31 .EQU GPIOG_SDE_SDEF14, 30 .EQU GPIOG_SDE_SDEF13, 29 .EQU GPIOG_SDE_SDEF12, 28 .EQU GPIOG_SDE_SDEF11, 27 .EQU GPIOG_SDE_SDEF10, 26 .EQU GPIOG_SDE_SDEF9, 25 .EQU GPIOG_SDE_SDEF8, 24 .EQU GPIOG_SDE_SDEF7, 23 .EQU GPIOG_SDE_SDEF6, 22 .EQU GPIOG_SDE_SDEF5, 21 .EQU GPIOG_SDE_SDEF4, 20 .EQU GPIOG_SDE_SDEF3, 19 .EQU GPIOG_SDE_SDEF2, 18 .EQU GPIOG_SDE_SDEF1, 17 .EQU GPIOG_SDE_SDEF0, 16 .EQU GPIOG_SDE_SDEN15, 15 .EQU GPIOG_SDE_SDEN14, 14 .EQU GPIOG_SDE_SDEN13, 13 .EQU GPIOG_SDE_SDEN12, 12 .EQU GPIOG_SDE_SDEN11, 11 .EQU GPIOG_SDE_SDEN10, 10 .EQU GPIOG_SDE_SDEN9, 9 .EQU GPIOG_SDE_SDEN8, 8 .EQU GPIOG_SDE_SDEN7, 7 .EQU GPIOG_SDE_SDEN6, 6 .EQU GPIOG_SDE_SDEN5, 5 .EQU GPIOG_SDE_SDEN4, 4 .EQU GPIOG_SDE_SDEN3, 3 .EQU GPIOG_SDE_SDEN2, 2 .EQU GPIOG_SDE_SDEN1, 1 .EQU GPIOG_SDE_SDEN0, 0 // register------------------------------------- .EQU GPIOG_SDCTL, 0x500001BC // 0x5000 01BC GPIOG_SDCTL Bits------------------------------------- .EQU GPIOG_SDCTL_PSDEF, 2 .EQU GPIOG_SDCTL_LINKEN, 1 .EQU GPIOG_SDCTL_SWSAMCLK, 0 // register------------------------------------- .EQU GPIOH_PIR, 0x500001C0 // 0x5000 01C0 GPIOH_PIR Bits------------------------------------- .EQU GPIOH_PIR_PXDIR15, 15 .EQU GPIOH_PIR_PXDIR14, 14 .EQU GPIOH_PIR_PXDIR13, 13 .EQU GPIOH_PIR_PXDIR12, 12 .EQU GPIOH_PIR_PXDIR11, 11 .EQU GPIOH_PIR_PXDIR10, 10 .EQU GPIOH_PIR_PXDIR9, 9 .EQU GPIOH_PIR_PXDIR8, 8 .EQU GPIOH_PIR_PXDIR7, 7 .EQU GPIOH_PIR_PXDIR6, 6 .EQU GPIOH_PIR_PXDIR5, 5 .EQU GPIOH_PIR_PXDIR4, 4 .EQU GPIOH_PIR_PXDIR3, 3 .EQU GPIOH_PIR_PXDIR2, 2 .EQU GPIOH_PIR_PXDIR1, 1 .EQU GPIOH_PIR_PXDIR0, 0 // register------------------------------------- .EQU GPIOH_POR, 0x500001C4 // 0x5000 01C4 GPIOH_POR Bits------------------------------------- .EQU GPIOH_POR_PXPOR15, 15 .EQU GPIOH_POR_PXPOR14, 14 .EQU GPIOH_POR_PXPOR13, 13 .EQU GPIOH_POR_PXPOR12, 12 .EQU GPIOH_POR_PXPOR11, 11 .EQU GPIOH_POR_PXPOR10, 10 .EQU GPIOH_POR_PXPOR9, 9 .EQU GPIOH_POR_PXPOR8, 8 .EQU GPIOH_POR_PXPOR7, 7 .EQU GPIOH_POR_PXPOR6, 6 .EQU GPIOH_POR_PXPOR5, 5 .EQU GPIOH_POR_PXPOR4, 4 .EQU GPIOH_POR_PXPOR3, 3 .EQU GPIOH_POR_PXPOR2, 2 .EQU GPIOH_POR_PXPOR1, 1 .EQU GPIOH_POR_PXPOR0, 0 // register------------------------------------- .EQU GPIOH_PUR, 0x500001C8 // 0x5000 01C8 GPIOH_PUR Bits------------------------------------- .EQU GPIOH_PUR_PXPUR15, 15 .EQU GPIOH_PUR_PXPUR14, 14 .EQU GPIOH_PUR_PXPUR13, 13 .EQU GPIOH_PUR_PXPUR12, 12 .EQU GPIOH_PUR_PXPUR11, 11 .EQU GPIOH_PUR_PXPUR10, 10 .EQU GPIOH_PUR_PXPUR9, 9 .EQU GPIOH_PUR_PXPUR8, 8 .EQU GPIOH_PUR_PXPUR7, 7 .EQU GPIOH_PUR_PXPUR6, 6 .EQU GPIOH_PUR_PXPUR5, 5 .EQU GPIOH_PUR_PXPUR4, 4 .EQU GPIOH_PUR_PXPUR3, 3 .EQU GPIOH_PUR_PXPUR2, 2 .EQU GPIOH_PUR_PXPUR1, 1 .EQU GPIOH_PUR_PXPUR0, 0 // register------------------------------------- .EQU GPIOH_PDR, 0x500001CC // 0x5000 01CC GPIOH_PDR Bits------------------------------------- .EQU GPIOH_PDR_PXPDR15, 15 .EQU GPIOH_PDR_PXPDR14, 14 .EQU GPIOH_PDR_PXPDR13, 13 .EQU GPIOH_PDR_PXPDR12, 12 .EQU GPIOH_PDR_PXPDR11, 11 .EQU GPIOH_PDR_PXPDR10, 10 .EQU GPIOH_PDR_PXPDR9, 9 .EQU GPIOH_PDR_PXPDR8, 8 .EQU GPIOH_PDR_PXPDR7, 7 .EQU GPIOH_PDR_PXPDR6, 6 .EQU GPIOH_PDR_PXPDR5, 5 .EQU GPIOH_PDR_PXPDR4, 4 .EQU GPIOH_PDR_PXPDR3, 3 .EQU GPIOH_PDR_PXPDR2, 2 .EQU GPIOH_PDR_PXPDR1, 1 .EQU GPIOH_PDR_PXPDR0, 0 // register------------------------------------- .EQU GPIOH_PODR, 0x500001D0 // 0x5000 01D0 GPIOH_PODR Bits------------------------------------- .EQU GPIOH_PODR_PXPODR15, 15 .EQU GPIOH_PODR_PXPODR14, 14 .EQU GPIOH_PODR_PXPODR13, 13 .EQU GPIOH_PODR_PXPODR12, 12 .EQU GPIOH_PODR_PXPODR11, 11 .EQU GPIOH_PODR_PXPODR10, 10 .EQU GPIOH_PODR_PXPODR9, 9 .EQU GPIOH_PODR_PXPODR8, 8 .EQU GPIOH_PODR_PXPODR7, 7 .EQU GPIOH_PODR_PXPODR6, 6 .EQU GPIOH_PODR_PXPODR5, 5 .EQU GPIOH_PODR_PXPODR4, 4 .EQU GPIOH_PODR_PXPODR3, 3 .EQU GPIOH_PODR_PXPODR2, 2 .EQU GPIOH_PODR_PXPODR1, 1 .EQU GPIOH_PODR_PXPODR0, 0 // register------------------------------------- .EQU GPIOH_PMOD, 0x500001D4 // 0x5000 01D4 GPIOH_PMOD Bits------------------------------------- .EQU GPIOH_PMOD_PXPMD15_1, 31 .EQU GPIOH_PMOD_PXPMD15_0, 30 .EQU GPIOH_PMOD_PXPMD14_1, 29 .EQU GPIOH_PMOD_PXPMD14_0, 28 .EQU GPIOH_PMOD_PXPMD13_1, 27 .EQU GPIOH_PMOD_PXPMD13_0, 26 .EQU GPIOH_PMOD_PXPMD12_1, 25 .EQU GPIOH_PMOD_PXPMD12_0, 24 .EQU GPIOH_PMOD_PXPMD11_1, 23 .EQU GPIOH_PMOD_PXPMD11_0, 22 .EQU GPIOH_PMOD_PXPMD10_1, 21 .EQU GPIOH_PMOD_PXPMD10_0, 20 .EQU GPIOH_PMOD_PXPMD9_1, 19 .EQU GPIOH_PMOD_PXPMD9_0, 18 .EQU GPIOH_PMOD_PXPMD8_1, 17 .EQU GPIOH_PMOD_PXPMD8_0, 16 .EQU GPIOH_PMOD_PXPMD7_1, 15 .EQU GPIOH_PMOD_PXPMD7_0, 14 .EQU GPIOH_PMOD_PXPMD6_1, 13 .EQU GPIOH_PMOD_PXPMD6_0, 12 .EQU GPIOH_PMOD_PXPMD5_1, 11 .EQU GPIOH_PMOD_PXPMD5_0, 10 .EQU GPIOH_PMOD_PXPMD4_1, 9 .EQU GPIOH_PMOD_PXPMD4_0, 8 .EQU GPIOH_PMOD_PXPMD3_1, 7 .EQU GPIOH_PMOD_PXPMD3_0, 6 .EQU GPIOH_PMOD_PXPMD2_1, 5 .EQU GPIOH_PMOD_PXPMD2_0, 4 .EQU GPIOH_PMOD_PXPMD1_1, 3 .EQU GPIOH_PMOD_PXPMD1_0, 2 .EQU GPIOH_PMOD_PXPMD0_1, 1 .EQU GPIOH_PMOD_PXPMD0_0, 0 // register------------------------------------- .EQU GPIOH_OMOD, 0x500001D8 // 0x5000 01D8 GPIOH_OMOD Bits------------------------------------- .EQU GPIOH_OMOD_PXOMD15, 30 .EQU GPIOH_OMOD_PXOMD14, 28 .EQU GPIOH_OMOD_PXOMD13, 26 .EQU GPIOH_OMOD_PXOMD12, 24 .EQU GPIOH_OMOD_PXOMD11, 22 .EQU GPIOH_OMOD_PXOMD10, 20 .EQU GPIOH_OMOD_PXOMD9, 18 .EQU GPIOH_OMOD_PXOMD8, 16 .EQU GPIOH_OMOD_PXOMD7, 14 .EQU GPIOH_OMOD_PXOMD6, 12 .EQU GPIOH_OMOD_PXOMD5, 10 .EQU GPIOH_OMOD_PXOMD4, 8 .EQU GPIOH_OMOD_PXOMD3, 6 .EQU GPIOH_OMOD_PXOMD2, 4 .EQU GPIOH_OMOD_PXOMD1, 2 .EQU GPIOH_OMOD_PXOMD0, 0 // register------------------------------------- .EQU GPIOH_LOCK, 0x500001DC // 0x5000 01DC GPIOH_LOCK Bits------------------------------------- .EQU GPIOH_LOCK_PXLCKKEY15, 31 .EQU GPIOH_LOCK_PXLCKKEY14, 30 .EQU GPIOH_LOCK_PXLCKKEY13, 29 .EQU GPIOH_LOCK_PXLCKKEY12, 28 .EQU GPIOH_LOCK_PXLCKKEY11, 27 .EQU GPIOH_LOCK_PXLCKKEY10, 26 .EQU GPIOH_LOCK_PXLCKKEY9, 25 .EQU GPIOH_LOCK_PXLCKKEY8, 24 .EQU GPIOH_LOCK_PXLCKKEY7, 23 .EQU GPIOH_LOCK_PXLCKKEY6, 22 .EQU GPIOH_LOCK_PXLCKKEY5, 21 .EQU GPIOH_LOCK_PXLCKKEY4, 20 .EQU GPIOH_LOCK_PXLCKKEY3, 19 .EQU GPIOH_LOCK_PXLCKKEY2, 18 .EQU GPIOH_LOCK_PXLCKKEY1, 17 .EQU GPIOH_LOCK_PXLCKKEY0, 16 .EQU GPIOH_LOCK_PXLCK15, 15 .EQU GPIOH_LOCK_PXLCK14, 14 .EQU GPIOH_LOCK_PXLCK13, 13 .EQU GPIOH_LOCK_PXLCK12, 12 .EQU GPIOH_LOCK_PXLCK11, 11 .EQU GPIOH_LOCK_PXLCK10, 10 .EQU GPIOH_LOCK_PXLCK9, 9 .EQU GPIOH_LOCK_PXLCK8, 8 .EQU GPIOH_LOCK_PXLCK7, 7 .EQU GPIOH_LOCK_PXLCK6, 6 .EQU GPIOH_LOCK_PXLCK5, 5 .EQU GPIOH_LOCK_PXLCK4, 4 .EQU GPIOH_LOCK_PXLCK3, 3 .EQU GPIOH_LOCK_PXLCK2, 2 .EQU GPIOH_LOCK_PXLCK1, 1 .EQU GPIOH_LOCK_PXLCK0, 0 // register------------------------------------- .EQU GPIOH_RMPL, 0x500001E0 // 0x5000 01E0 GPIOH_RMPL Bits------------------------------------- .EQU GPIOH_RMPL_PXRMP7_3, 31 .EQU GPIOH_RMPL_PXRMP7_2, 30 .EQU GPIOH_RMPL_PXRMP7_1, 29 .EQU GPIOH_RMPL_PXRMP7_0, 28 .EQU GPIOH_RMPL_PXRMP6_3, 27 .EQU GPIOH_RMPL_PXRMP6_2, 26 .EQU GPIOH_RMPL_PXRMP6_1, 25 .EQU GPIOH_RMPL_PXRMP6_0, 24 .EQU GPIOH_RMPL_PXRMP5_3, 23 .EQU GPIOH_RMPL_PXRMP5_2, 22 .EQU GPIOH_RMPL_PXRMP5_1, 21 .EQU GPIOH_RMPL_PXRMP5_0, 20 .EQU GPIOH_RMPL_PXRMP4_3, 19 .EQU GPIOH_RMPL_PXRMP4_2, 18 .EQU GPIOH_RMPL_PXRMP4_1, 17 .EQU GPIOH_RMPL_PXRMP4_0, 16 .EQU GPIOH_RMPL_PXRMP3_3, 15 .EQU GPIOH_RMPL_PXRMP3_2, 14 .EQU GPIOH_RMPL_PXRMP3_1, 13 .EQU GPIOH_RMPL_PXRMP3_0, 12 .EQU GPIOH_RMPL_PXRMP2_3, 11 .EQU GPIOH_RMPL_PXRMP2_2, 10 .EQU GPIOH_RMPL_PXRMP2_1, 9 .EQU GPIOH_RMPL_PXRMP2_0, 8 .EQU GPIOH_RMPL_PXRMP1_3, 7 .EQU GPIOH_RMPL_PXRMP1_2, 6 .EQU GPIOH_RMPL_PXRMP1_1, 5 .EQU GPIOH_RMPL_PXRMP1_0, 4 .EQU GPIOH_RMPL_PXRMP0_3, 3 .EQU GPIOH_RMPL_PXRMP0_2, 2 .EQU GPIOH_RMPL_PXRMP0_1, 1 .EQU GPIOH_RMPL_PXRMP0_0, 0 // register------------------------------------- .EQU GPIOH_RMPH, 0x500001E4 // 0x5000 01E4 GPIOH_RMPH Bits------------------------------------- .EQU GPIOH_RMPH_PXRMP15_3, 31 .EQU GPIOH_RMPH_PXRMP15_2, 30 .EQU GPIOH_RMPH_PXRMP15_1, 29 .EQU GPIOH_RMPH_PXRMP15_0, 28 .EQU GPIOH_RMPH_PXRMP14_3, 27 .EQU GPIOH_RMPH_PXRMP14_2, 26 .EQU GPIOH_RMPH_PXRMP14_1, 25 .EQU GPIOH_RMPH_PXRMP14_0, 24 .EQU GPIOH_RMPH_PXRMP13_3, 23 .EQU GPIOH_RMPH_PXRMP13_2, 22 .EQU GPIOH_RMPH_PXRMP13_1, 21 .EQU GPIOH_RMPH_PXRMP13_0, 20 .EQU GPIOH_RMPH_PXRMP12_3, 19 .EQU GPIOH_RMPH_PXRMP12_2, 18 .EQU GPIOH_RMPH_PXRMP12_1, 17 .EQU GPIOH_RMPH_PXRMP12_0, 16 .EQU GPIOH_RMPH_PXRMP11_3, 15 .EQU GPIOH_RMPH_PXRMP11_2, 14 .EQU GPIOH_RMPH_PXRMP11_1, 13 .EQU GPIOH_RMPH_PXRMP11_0, 12 .EQU GPIOH_RMPH_PXRMP10_3, 11 .EQU GPIOH_RMPH_PXRMP10_2, 10 .EQU GPIOH_RMPH_PXRMP10_1, 9 .EQU GPIOH_RMPH_PXRMP10_0, 8 .EQU GPIOH_RMPH_PXRMP9_3, 7 .EQU GPIOH_RMPH_PXRMP9_2, 6 .EQU GPIOH_RMPH_PXRMP9_1, 5 .EQU GPIOH_RMPH_PXRMP9_0, 4 .EQU GPIOH_RMPH_PXRMP8_3, 3 .EQU GPIOH_RMPH_PXRMP8_2, 2 .EQU GPIOH_RMPH_PXRMP8_1, 1 .EQU GPIOH_RMPH_PXRMP8_0, 0 // register------------------------------------- .EQU GPIOH_RMP_MSB, 0x500001F4 // 0x5000 01F4 GPIOH_RMP_MSB Bits------------------------------------- .EQU GPIOH_RMP_MSB_RMPMSB31, 31 .EQU GPIOH_RMP_MSB_RMPMSB30, 30 .EQU GPIOH_RMP_MSB_RMPMSB29, 29 .EQU GPIOH_RMP_MSB_RMPMSB28, 28 .EQU GPIOH_RMP_MSB_RMPMSB27, 27 .EQU GPIOH_RMP_MSB_RMPMSB26, 26 .EQU GPIOH_RMP_MSB_RMPMSB25, 25 .EQU GPIOH_RMP_MSB_RMPMSB24, 24 .EQU GPIOH_RMP_MSB_RMPMSB23, 23 .EQU GPIOH_RMP_MSB_RMPMSB22, 22 .EQU GPIOH_RMP_MSB_RMPMSB21, 21 .EQU GPIOH_RMP_MSB_RMPMSB20, 20 .EQU GPIOH_RMP_MSB_RMPMSB19, 19 .EQU GPIOH_RMP_MSB_RMPMSB18, 18 .EQU GPIOH_RMP_MSB_RMPMSB17, 17 .EQU GPIOH_RMP_MSB_RMPMSB16, 16 .EQU GPIOH_RMP_MSB_RMPMSB15, 15 .EQU GPIOH_RMP_MSB_RMPMSB14, 14 .EQU GPIOH_RMP_MSB_RMPMSB13, 13 .EQU GPIOH_RMP_MSB_RMPMSB12, 12 .EQU GPIOH_RMP_MSB_RMPMSB11, 11 .EQU GPIOH_RMP_MSB_RMPMSB10, 10 .EQU GPIOH_RMP_MSB_RMPMSB9, 9 .EQU GPIOH_RMP_MSB_RMPMSB8, 8 .EQU GPIOH_RMP_MSB_RMPMSB7, 7 .EQU GPIOH_RMP_MSB_RMPMSB6, 6 .EQU GPIOH_RMP_MSB_RMPMSB5, 5 .EQU GPIOH_RMP_MSB_RMPMSB4, 4 .EQU GPIOH_RMP_MSB_RMPMSB3, 3 .EQU GPIOH_RMP_MSB_RMPMSB2, 2 .EQU GPIOH_RMP_MSB_RMPMSB1, 1 .EQU GPIOH_RMP_MSB_RMPMSB0, 0 // register------------------------------------- .EQU GPIOH_SDE, 0x500001F8 // 0x5000 01F8 GPIOH_SDE Bits------------------------------------- .EQU GPIOH_SDE_SDEF15, 31 .EQU GPIOH_SDE_SDEF14, 30 .EQU GPIOH_SDE_SDEF13, 29 .EQU GPIOH_SDE_SDEF12, 28 .EQU GPIOH_SDE_SDEF11, 27 .EQU GPIOH_SDE_SDEF10, 26 .EQU GPIOH_SDE_SDEF9, 25 .EQU GPIOH_SDE_SDEF8, 24 .EQU GPIOH_SDE_SDEF7, 23 .EQU GPIOH_SDE_SDEF6, 22 .EQU GPIOH_SDE_SDEF5, 21 .EQU GPIOH_SDE_SDEF4, 20 .EQU GPIOH_SDE_SDEF3, 19 .EQU GPIOH_SDE_SDEF2, 18 .EQU GPIOH_SDE_SDEF1, 17 .EQU GPIOH_SDE_SDEF0, 16 .EQU GPIOH_SDE_SDEN15, 15 .EQU GPIOH_SDE_SDEN14, 14 .EQU GPIOH_SDE_SDEN13, 13 .EQU GPIOH_SDE_SDEN12, 12 .EQU GPIOH_SDE_SDEN11, 11 .EQU GPIOH_SDE_SDEN10, 10 .EQU GPIOH_SDE_SDEN9, 9 .EQU GPIOH_SDE_SDEN8, 8 .EQU GPIOH_SDE_SDEN7, 7 .EQU GPIOH_SDE_SDEN6, 6 .EQU GPIOH_SDE_SDEN5, 5 .EQU GPIOH_SDE_SDEN4, 4 .EQU GPIOH_SDE_SDEN3, 3 .EQU GPIOH_SDE_SDEN2, 2 .EQU GPIOH_SDE_SDEN1, 1 .EQU GPIOH_SDE_SDEN0, 0 // register------------------------------------- .EQU GPIOH_SDCTL, 0x500001FC // 0x5000 01FC GPIOH_SDCTL Bits------------------------------------- .EQU GPIOH_SDCTL_PSDEF, 2 .EQU GPIOH_SDCTL_LINKEN, 1 .EQU GPIOH_SDCTL_SWSAMCLK, 0 // register------------------------------------- .EQU GPIOJ_PIR, 0x50000200 // 0x5000 0200 GPIOJ_PIR Bits------------------------------------- .EQU GPIOJ_PIR_PXDIR15, 15 .EQU GPIOJ_PIR_PXDIR14, 14 .EQU GPIOJ_PIR_PXDIR13, 13 .EQU GPIOJ_PIR_PXDIR12, 12 .EQU GPIOJ_PIR_PXDIR11, 11 .EQU GPIOJ_PIR_PXDIR10, 10 .EQU GPIOJ_PIR_PXDIR9, 9 .EQU GPIOJ_PIR_PXDIR8, 8 .EQU GPIOJ_PIR_PXDIR7, 7 .EQU GPIOJ_PIR_PXDIR6, 6 .EQU GPIOJ_PIR_PXDIR5, 5 .EQU GPIOJ_PIR_PXDIR4, 4 .EQU GPIOJ_PIR_PXDIR3, 3 .EQU GPIOJ_PIR_PXDIR2, 2 .EQU GPIOJ_PIR_PXDIR1, 1 .EQU GPIOJ_PIR_PXDIR0, 0 // register------------------------------------- .EQU GPIOJ_POR, 0x50000204 // 0x5000 0204 GPIOJ_POR Bits------------------------------------- .EQU GPIOJ_POR_PXPOR15, 15 .EQU GPIOJ_POR_PXPOR14, 14 .EQU GPIOJ_POR_PXPOR13, 13 .EQU GPIOJ_POR_PXPOR12, 12 .EQU GPIOJ_POR_PXPOR11, 11 .EQU GPIOJ_POR_PXPOR10, 10 .EQU GPIOJ_POR_PXPOR9, 9 .EQU GPIOJ_POR_PXPOR8, 8 .EQU GPIOJ_POR_PXPOR7, 7 .EQU GPIOJ_POR_PXPOR6, 6 .EQU GPIOJ_POR_PXPOR5, 5 .EQU GPIOJ_POR_PXPOR4, 4 .EQU GPIOJ_POR_PXPOR3, 3 .EQU GPIOJ_POR_PXPOR2, 2 .EQU GPIOJ_POR_PXPOR1, 1 .EQU GPIOJ_POR_PXPOR0, 0 // register------------------------------------- .EQU GPIOJ_PUR, 0x50000208 // 0x5000 0208 GPIOJ_PUR Bits------------------------------------- .EQU GPIOJ_PUR_PXPUR15, 15 .EQU GPIOJ_PUR_PXPUR14, 14 .EQU GPIOJ_PUR_PXPUR13, 13 .EQU GPIOJ_PUR_PXPUR12, 12 .EQU GPIOJ_PUR_PXPUR11, 11 .EQU GPIOJ_PUR_PXPUR10, 10 .EQU GPIOJ_PUR_PXPUR9, 9 .EQU GPIOJ_PUR_PXPUR8, 8 .EQU GPIOJ_PUR_PXPUR7, 7 .EQU GPIOJ_PUR_PXPUR6, 6 .EQU GPIOJ_PUR_PXPUR5, 5 .EQU GPIOJ_PUR_PXPUR4, 4 .EQU GPIOJ_PUR_PXPUR3, 3 .EQU GPIOJ_PUR_PXPUR2, 2 .EQU GPIOJ_PUR_PXPUR1, 1 .EQU GPIOJ_PUR_PXPUR0, 0 // register------------------------------------- .EQU GPIOJ_PDR, 0x5000020C // 0x5000 020C GPIOJ_PDR Bits------------------------------------- .EQU GPIOJ_PDR_PXPDR15, 15 .EQU GPIOJ_PDR_PXPDR14, 14 .EQU GPIOJ_PDR_PXPDR13, 13 .EQU GPIOJ_PDR_PXPDR12, 12 .EQU GPIOJ_PDR_PXPDR11, 11 .EQU GPIOJ_PDR_PXPDR10, 10 .EQU GPIOJ_PDR_PXPDR9, 9 .EQU GPIOJ_PDR_PXPDR8, 8 .EQU GPIOJ_PDR_PXPDR7, 7 .EQU GPIOJ_PDR_PXPDR6, 6 .EQU GPIOJ_PDR_PXPDR5, 5 .EQU GPIOJ_PDR_PXPDR4, 4 .EQU GPIOJ_PDR_PXPDR3, 3 .EQU GPIOJ_PDR_PXPDR2, 2 .EQU GPIOJ_PDR_PXPDR1, 1 .EQU GPIOJ_PDR_PXPDR0, 0 // register------------------------------------- .EQU GPIOJ_PODR, 0x50000210 // 0x5000 0210 GPIOJ_PODR Bits------------------------------------- .EQU GPIOJ_PODR_PXPODR15, 15 .EQU GPIOJ_PODR_PXPODR14, 14 .EQU GPIOJ_PODR_PXPODR13, 13 .EQU GPIOJ_PODR_PXPODR12, 12 .EQU GPIOJ_PODR_PXPODR11, 11 .EQU GPIOJ_PODR_PXPODR10, 10 .EQU GPIOJ_PODR_PXPODR9, 9 .EQU GPIOJ_PODR_PXPODR8, 8 .EQU GPIOJ_PODR_PXPODR7, 7 .EQU GPIOJ_PODR_PXPODR6, 6 .EQU GPIOJ_PODR_PXPODR5, 5 .EQU GPIOJ_PODR_PXPODR4, 4 .EQU GPIOJ_PODR_PXPODR3, 3 .EQU GPIOJ_PODR_PXPODR2, 2 .EQU GPIOJ_PODR_PXPODR1, 1 .EQU GPIOJ_PODR_PXPODR0, 0 // register------------------------------------- .EQU GPIOJ_PMOD, 0x50000214 // 0x5000 0214 GPIOJ_PMOD Bits------------------------------------- .EQU GPIOJ_PMOD_PXPMD15_1, 31 .EQU GPIOJ_PMOD_PXPMD15_0, 30 .EQU GPIOJ_PMOD_PXPMD14_1, 29 .EQU GPIOJ_PMOD_PXPMD14_0, 28 .EQU GPIOJ_PMOD_PXPMD13_1, 27 .EQU GPIOJ_PMOD_PXPMD13_0, 26 .EQU GPIOJ_PMOD_PXPMD12_1, 25 .EQU GPIOJ_PMOD_PXPMD12_0, 24 .EQU GPIOJ_PMOD_PXPMD11_1, 23 .EQU GPIOJ_PMOD_PXPMD11_0, 22 .EQU GPIOJ_PMOD_PXPMD10_1, 21 .EQU GPIOJ_PMOD_PXPMD10_0, 20 .EQU GPIOJ_PMOD_PXPMD9_1, 19 .EQU GPIOJ_PMOD_PXPMD9_0, 18 .EQU GPIOJ_PMOD_PXPMD8_1, 17 .EQU GPIOJ_PMOD_PXPMD8_0, 16 .EQU GPIOJ_PMOD_PXPMD7_1, 15 .EQU GPIOJ_PMOD_PXPMD7_0, 14 .EQU GPIOJ_PMOD_PXPMD6_1, 13 .EQU GPIOJ_PMOD_PXPMD6_0, 12 .EQU GPIOJ_PMOD_PXPMD5_1, 11 .EQU GPIOJ_PMOD_PXPMD5_0, 10 .EQU GPIOJ_PMOD_PXPMD4_1, 9 .EQU GPIOJ_PMOD_PXPMD4_0, 8 .EQU GPIOJ_PMOD_PXPMD3_1, 7 .EQU GPIOJ_PMOD_PXPMD3_0, 6 .EQU GPIOJ_PMOD_PXPMD2_1, 5 .EQU GPIOJ_PMOD_PXPMD2_0, 4 .EQU GPIOJ_PMOD_PXPMD1_1, 3 .EQU GPIOJ_PMOD_PXPMD1_0, 2 .EQU GPIOJ_PMOD_PXPMD0_1, 1 .EQU GPIOJ_PMOD_PXPMD0_0, 0 // register------------------------------------- .EQU GPIOJ_OMOD, 0x50000218 // 0x5000 0218 GPIOJ_OMOD Bits------------------------------------- .EQU GPIOJ_OMOD_PXOMD15, 30 .EQU GPIOJ_OMOD_PXOMD14, 28 .EQU GPIOJ_OMOD_PXOMD13, 26 .EQU GPIOJ_OMOD_PXOMD12, 24 .EQU GPIOJ_OMOD_PXOMD11, 22 .EQU GPIOJ_OMOD_PXOMD10, 20 .EQU GPIOJ_OMOD_PXOMD9, 18 .EQU GPIOJ_OMOD_PXOMD8, 16 .EQU GPIOJ_OMOD_PXOMD7, 14 .EQU GPIOJ_OMOD_PXOMD6, 12 .EQU GPIOJ_OMOD_PXOMD5, 10 .EQU GPIOJ_OMOD_PXOMD4, 8 .EQU GPIOJ_OMOD_PXOMD3, 6 .EQU GPIOJ_OMOD_PXOMD2, 4 .EQU GPIOJ_OMOD_PXOMD1, 2 .EQU GPIOJ_OMOD_PXOMD0, 0 // register------------------------------------- .EQU GPIOJ_LOCK, 0x5000021C // 0x5000 021C GPIOJ_LOCK Bits------------------------------------- .EQU GPIOJ_LOCK_PXLCKKEY15, 31 .EQU GPIOJ_LOCK_PXLCKKEY14, 30 .EQU GPIOJ_LOCK_PXLCKKEY13, 29 .EQU GPIOJ_LOCK_PXLCKKEY12, 28 .EQU GPIOJ_LOCK_PXLCKKEY11, 27 .EQU GPIOJ_LOCK_PXLCKKEY10, 26 .EQU GPIOJ_LOCK_PXLCKKEY9, 25 .EQU GPIOJ_LOCK_PXLCKKEY8, 24 .EQU GPIOJ_LOCK_PXLCKKEY7, 23 .EQU GPIOJ_LOCK_PXLCKKEY6, 22 .EQU GPIOJ_LOCK_PXLCKKEY5, 21 .EQU GPIOJ_LOCK_PXLCKKEY4, 20 .EQU GPIOJ_LOCK_PXLCKKEY3, 19 .EQU GPIOJ_LOCK_PXLCKKEY2, 18 .EQU GPIOJ_LOCK_PXLCKKEY1, 17 .EQU GPIOJ_LOCK_PXLCKKEY0, 16 .EQU GPIOJ_LOCK_PXLCK15, 15 .EQU GPIOJ_LOCK_PXLCK14, 14 .EQU GPIOJ_LOCK_PXLCK13, 13 .EQU GPIOJ_LOCK_PXLCK12, 12 .EQU GPIOJ_LOCK_PXLCK11, 11 .EQU GPIOJ_LOCK_PXLCK10, 10 .EQU GPIOJ_LOCK_PXLCK9, 9 .EQU GPIOJ_LOCK_PXLCK8, 8 .EQU GPIOJ_LOCK_PXLCK7, 7 .EQU GPIOJ_LOCK_PXLCK6, 6 .EQU GPIOJ_LOCK_PXLCK5, 5 .EQU GPIOJ_LOCK_PXLCK4, 4 .EQU GPIOJ_LOCK_PXLCK3, 3 .EQU GPIOJ_LOCK_PXLCK2, 2 .EQU GPIOJ_LOCK_PXLCK1, 1 .EQU GPIOJ_LOCK_PXLCK0, 0 // register------------------------------------- .EQU GPIOJ_RMPL, 0x50000220 // 0x5000 0220 GPIOJ_RMPL Bits------------------------------------- .EQU GPIOJ_RMPL_PXRMP7_3, 31 .EQU GPIOJ_RMPL_PXRMP7_2, 30 .EQU GPIOJ_RMPL_PXRMP7_1, 29 .EQU GPIOJ_RMPL_PXRMP7_0, 28 .EQU GPIOJ_RMPL_PXRMP6_3, 27 .EQU GPIOJ_RMPL_PXRMP6_2, 26 .EQU GPIOJ_RMPL_PXRMP6_1, 25 .EQU GPIOJ_RMPL_PXRMP6_0, 24 .EQU GPIOJ_RMPL_PXRMP5_3, 23 .EQU GPIOJ_RMPL_PXRMP5_2, 22 .EQU GPIOJ_RMPL_PXRMP5_1, 21 .EQU GPIOJ_RMPL_PXRMP5_0, 20 .EQU GPIOJ_RMPL_PXRMP4_3, 19 .EQU GPIOJ_RMPL_PXRMP4_2, 18 .EQU GPIOJ_RMPL_PXRMP4_1, 17 .EQU GPIOJ_RMPL_PXRMP4_0, 16 .EQU GPIOJ_RMPL_PXRMP3_3, 15 .EQU GPIOJ_RMPL_PXRMP3_2, 14 .EQU GPIOJ_RMPL_PXRMP3_1, 13 .EQU GPIOJ_RMPL_PXRMP3_0, 12 .EQU GPIOJ_RMPL_PXRMP2_3, 11 .EQU GPIOJ_RMPL_PXRMP2_2, 10 .EQU GPIOJ_RMPL_PXRMP2_1, 9 .EQU GPIOJ_RMPL_PXRMP2_0, 8 .EQU GPIOJ_RMPL_PXRMP1_3, 7 .EQU GPIOJ_RMPL_PXRMP1_2, 6 .EQU GPIOJ_RMPL_PXRMP1_1, 5 .EQU GPIOJ_RMPL_PXRMP1_0, 4 .EQU GPIOJ_RMPL_PXRMP0_3, 3 .EQU GPIOJ_RMPL_PXRMP0_2, 2 .EQU GPIOJ_RMPL_PXRMP0_1, 1 .EQU GPIOJ_RMPL_PXRMP0_0, 0 // register------------------------------------- .EQU GPIOJ_RMPH, 0x50000224 // 0x5000 0224 GPIOJ_RMPH Bits------------------------------------- .EQU GPIOJ_RMPH_PXRMP15_3, 31 .EQU GPIOJ_RMPH_PXRMP15_2, 30 .EQU GPIOJ_RMPH_PXRMP15_1, 29 .EQU GPIOJ_RMPH_PXRMP15_0, 28 .EQU GPIOJ_RMPH_PXRMP14_3, 27 .EQU GPIOJ_RMPH_PXRMP14_2, 26 .EQU GPIOJ_RMPH_PXRMP14_1, 25 .EQU GPIOJ_RMPH_PXRMP14_0, 24 .EQU GPIOJ_RMPH_PXRMP13_3, 23 .EQU GPIOJ_RMPH_PXRMP13_2, 22 .EQU GPIOJ_RMPH_PXRMP13_1, 21 .EQU GPIOJ_RMPH_PXRMP13_0, 20 .EQU GPIOJ_RMPH_PXRMP12_3, 19 .EQU GPIOJ_RMPH_PXRMP12_2, 18 .EQU GPIOJ_RMPH_PXRMP12_1, 17 .EQU GPIOJ_RMPH_PXRMP12_0, 16 .EQU GPIOJ_RMPH_PXRMP11_3, 15 .EQU GPIOJ_RMPH_PXRMP11_2, 14 .EQU GPIOJ_RMPH_PXRMP11_1, 13 .EQU GPIOJ_RMPH_PXRMP11_0, 12 .EQU GPIOJ_RMPH_PXRMP10_3, 11 .EQU GPIOJ_RMPH_PXRMP10_2, 10 .EQU GPIOJ_RMPH_PXRMP10_1, 9 .EQU GPIOJ_RMPH_PXRMP10_0, 8 .EQU GPIOJ_RMPH_PXRMP9_3, 7 .EQU GPIOJ_RMPH_PXRMP9_2, 6 .EQU GPIOJ_RMPH_PXRMP9_1, 5 .EQU GPIOJ_RMPH_PXRMP9_0, 4 .EQU GPIOJ_RMPH_PXRMP8_3, 3 .EQU GPIOJ_RMPH_PXRMP8_2, 2 .EQU GPIOJ_RMPH_PXRMP8_1, 1 .EQU GPIOJ_RMPH_PXRMP8_0, 0 // register------------------------------------- .EQU GPIOJ_RMP_MSB, 0x50000234 // 0x5000 0234 GPIOJ_RMP_MSB Bits------------------------------------- .EQU GPIOJ_RMP_MSB_RMPMSB31, 31 .EQU GPIOJ_RMP_MSB_RMPMSB30, 30 .EQU GPIOJ_RMP_MSB_RMPMSB29, 29 .EQU GPIOJ_RMP_MSB_RMPMSB28, 28 .EQU GPIOJ_RMP_MSB_RMPMSB27, 27 .EQU GPIOJ_RMP_MSB_RMPMSB26, 26 .EQU GPIOJ_RMP_MSB_RMPMSB25, 25 .EQU GPIOJ_RMP_MSB_RMPMSB24, 24 .EQU GPIOJ_RMP_MSB_RMPMSB23, 23 .EQU GPIOJ_RMP_MSB_RMPMSB22, 22 .EQU GPIOJ_RMP_MSB_RMPMSB21, 21 .EQU GPIOJ_RMP_MSB_RMPMSB20, 20 .EQU GPIOJ_RMP_MSB_RMPMSB19, 19 .EQU GPIOJ_RMP_MSB_RMPMSB18, 18 .EQU GPIOJ_RMP_MSB_RMPMSB17, 17 .EQU GPIOJ_RMP_MSB_RMPMSB16, 16 .EQU GPIOJ_RMP_MSB_RMPMSB15, 15 .EQU GPIOJ_RMP_MSB_RMPMSB14, 14 .EQU GPIOJ_RMP_MSB_RMPMSB13, 13 .EQU GPIOJ_RMP_MSB_RMPMSB12, 12 .EQU GPIOJ_RMP_MSB_RMPMSB11, 11 .EQU GPIOJ_RMP_MSB_RMPMSB10, 10 .EQU GPIOJ_RMP_MSB_RMPMSB9, 9 .EQU GPIOJ_RMP_MSB_RMPMSB8, 8 .EQU GPIOJ_RMP_MSB_RMPMSB7, 7 .EQU GPIOJ_RMP_MSB_RMPMSB6, 6 .EQU GPIOJ_RMP_MSB_RMPMSB5, 5 .EQU GPIOJ_RMP_MSB_RMPMSB4, 4 .EQU GPIOJ_RMP_MSB_RMPMSB3, 3 .EQU GPIOJ_RMP_MSB_RMPMSB2, 2 .EQU GPIOJ_RMP_MSB_RMPMSB1, 1 .EQU GPIOJ_RMP_MSB_RMPMSB0, 0 // register------------------------------------- .EQU GPIOJ_SDE, 0x50000238 // 0x5000 0238 GPIOJ_SDE Bits------------------------------------- .EQU GPIOJ_SDE_SDEF15, 31 .EQU GPIOJ_SDE_SDEF14, 30 .EQU GPIOJ_SDE_SDEF13, 29 .EQU GPIOJ_SDE_SDEF12, 28 .EQU GPIOJ_SDE_SDEF11, 27 .EQU GPIOJ_SDE_SDEF10, 26 .EQU GPIOJ_SDE_SDEF9, 25 .EQU GPIOJ_SDE_SDEF8, 24 .EQU GPIOJ_SDE_SDEF7, 23 .EQU GPIOJ_SDE_SDEF6, 22 .EQU GPIOJ_SDE_SDEF5, 21 .EQU GPIOJ_SDE_SDEF4, 20 .EQU GPIOJ_SDE_SDEF3, 19 .EQU GPIOJ_SDE_SDEF2, 18 .EQU GPIOJ_SDE_SDEF1, 17 .EQU GPIOJ_SDE_SDEF0, 16 .EQU GPIOJ_SDE_SDEN15, 15 .EQU GPIOJ_SDE_SDEN14, 14 .EQU GPIOJ_SDE_SDEN13, 13 .EQU GPIOJ_SDE_SDEN12, 12 .EQU GPIOJ_SDE_SDEN11, 11 .EQU GPIOJ_SDE_SDEN10, 10 .EQU GPIOJ_SDE_SDEN9, 9 .EQU GPIOJ_SDE_SDEN8, 8 .EQU GPIOJ_SDE_SDEN7, 7 .EQU GPIOJ_SDE_SDEN6, 6 .EQU GPIOJ_SDE_SDEN5, 5 .EQU GPIOJ_SDE_SDEN4, 4 .EQU GPIOJ_SDE_SDEN3, 3 .EQU GPIOJ_SDE_SDEN2, 2 .EQU GPIOJ_SDE_SDEN1, 1 .EQU GPIOJ_SDE_SDEN0, 0 // register------------------------------------- .EQU GPIOJ_SDCTL, 0x5000023C // 0x5000 023C GPIOJ_SDCTL Bits------------------------------------- .EQU GPIOJ_SDCTL_PSDEF, 2 .EQU GPIOJ_SDCTL_LINKEN, 1 .EQU GPIOJ_SDCTL_SWSAMCLK, 0 // register------------------------------------- .EQU GPIOK_PIR, 0x50000240 // 0x5000 0240 GPIOK_PIR Bits------------------------------------- .EQU GPIOK_PIR_PXDIR15, 15 .EQU GPIOK_PIR_PXDIR14, 14 .EQU GPIOK_PIR_PXDIR13, 13 .EQU GPIOK_PIR_PXDIR12, 12 .EQU GPIOK_PIR_PXDIR11, 11 .EQU GPIOK_PIR_PXDIR10, 10 .EQU GPIOK_PIR_PXDIR9, 9 .EQU GPIOK_PIR_PXDIR8, 8 .EQU GPIOK_PIR_PXDIR7, 7 .EQU GPIOK_PIR_PXDIR6, 6 .EQU GPIOK_PIR_PXDIR5, 5 .EQU GPIOK_PIR_PXDIR4, 4 .EQU GPIOK_PIR_PXDIR3, 3 .EQU GPIOK_PIR_PXDIR2, 2 .EQU GPIOK_PIR_PXDIR1, 1 .EQU GPIOK_PIR_PXDIR0, 0 // register------------------------------------- .EQU GPIOK_POR, 0x50000244 // 0x5000 0244 GPIOK_POR Bits------------------------------------- .EQU GPIOK_POR_PXPOR15, 15 .EQU GPIOK_POR_PXPOR14, 14 .EQU GPIOK_POR_PXPOR13, 13 .EQU GPIOK_POR_PXPOR12, 12 .EQU GPIOK_POR_PXPOR11, 11 .EQU GPIOK_POR_PXPOR10, 10 .EQU GPIOK_POR_PXPOR9, 9 .EQU GPIOK_POR_PXPOR8, 8 .EQU GPIOK_POR_PXPOR7, 7 .EQU GPIOK_POR_PXPOR6, 6 .EQU GPIOK_POR_PXPOR5, 5 .EQU GPIOK_POR_PXPOR4, 4 .EQU GPIOK_POR_PXPOR3, 3 .EQU GPIOK_POR_PXPOR2, 2 .EQU GPIOK_POR_PXPOR1, 1 .EQU GPIOK_POR_PXPOR0, 0 // register------------------------------------- .EQU GPIOK_PUR, 0x50000248 // 0x5000 0248 GPIOK_PUR Bits------------------------------------- .EQU GPIOK_PUR_PXPUR15, 15 .EQU GPIOK_PUR_PXPUR14, 14 .EQU GPIOK_PUR_PXPUR13, 13 .EQU GPIOK_PUR_PXPUR12, 12 .EQU GPIOK_PUR_PXPUR11, 11 .EQU GPIOK_PUR_PXPUR10, 10 .EQU GPIOK_PUR_PXPUR9, 9 .EQU GPIOK_PUR_PXPUR8, 8 .EQU GPIOK_PUR_PXPUR7, 7 .EQU GPIOK_PUR_PXPUR6, 6 .EQU GPIOK_PUR_PXPUR5, 5 .EQU GPIOK_PUR_PXPUR4, 4 .EQU GPIOK_PUR_PXPUR3, 3 .EQU GPIOK_PUR_PXPUR2, 2 .EQU GPIOK_PUR_PXPUR1, 1 .EQU GPIOK_PUR_PXPUR0, 0 // register------------------------------------- .EQU GPIOK_PDR, 0x5000024C // 0x5000 024C GPIOK_PDR Bits------------------------------------- .EQU GPIOK_PDR_PXPDR15, 15 .EQU GPIOK_PDR_PXPDR14, 14 .EQU GPIOK_PDR_PXPDR13, 13 .EQU GPIOK_PDR_PXPDR12, 12 .EQU GPIOK_PDR_PXPDR11, 11 .EQU GPIOK_PDR_PXPDR10, 10 .EQU GPIOK_PDR_PXPDR9, 9 .EQU GPIOK_PDR_PXPDR8, 8 .EQU GPIOK_PDR_PXPDR7, 7 .EQU GPIOK_PDR_PXPDR6, 6 .EQU GPIOK_PDR_PXPDR5, 5 .EQU GPIOK_PDR_PXPDR4, 4 .EQU GPIOK_PDR_PXPDR3, 3 .EQU GPIOK_PDR_PXPDR2, 2 .EQU GPIOK_PDR_PXPDR1, 1 .EQU GPIOK_PDR_PXPDR0, 0 // register------------------------------------- .EQU GPIOK_PODR, 0x50000250 // 0x5000 0250 GPIOK_PODR Bits------------------------------------- .EQU GPIOK_PODR_PXPODR15, 15 .EQU GPIOK_PODR_PXPODR14, 14 .EQU GPIOK_PODR_PXPODR13, 13 .EQU GPIOK_PODR_PXPODR12, 12 .EQU GPIOK_PODR_PXPODR11, 11 .EQU GPIOK_PODR_PXPODR10, 10 .EQU GPIOK_PODR_PXPODR9, 9 .EQU GPIOK_PODR_PXPODR8, 8 .EQU GPIOK_PODR_PXPODR7, 7 .EQU GPIOK_PODR_PXPODR6, 6 .EQU GPIOK_PODR_PXPODR5, 5 .EQU GPIOK_PODR_PXPODR4, 4 .EQU GPIOK_PODR_PXPODR3, 3 .EQU GPIOK_PODR_PXPODR2, 2 .EQU GPIOK_PODR_PXPODR1, 1 .EQU GPIOK_PODR_PXPODR0, 0 // register------------------------------------- .EQU GPIOK_PMOD, 0x50000254 // 0x5000 0254 GPIOK_PMOD Bits------------------------------------- .EQU GPIOK_PMOD_PXPMD15_1, 31 .EQU GPIOK_PMOD_PXPMD15_0, 30 .EQU GPIOK_PMOD_PXPMD14_1, 29 .EQU GPIOK_PMOD_PXPMD14_0, 28 .EQU GPIOK_PMOD_PXPMD13_1, 27 .EQU GPIOK_PMOD_PXPMD13_0, 26 .EQU GPIOK_PMOD_PXPMD12_1, 25 .EQU GPIOK_PMOD_PXPMD12_0, 24 .EQU GPIOK_PMOD_PXPMD11_1, 23 .EQU GPIOK_PMOD_PXPMD11_0, 22 .EQU GPIOK_PMOD_PXPMD10_1, 21 .EQU GPIOK_PMOD_PXPMD10_0, 20 .EQU GPIOK_PMOD_PXPMD9_1, 19 .EQU GPIOK_PMOD_PXPMD9_0, 18 .EQU GPIOK_PMOD_PXPMD8_1, 17 .EQU GPIOK_PMOD_PXPMD8_0, 16 .EQU GPIOK_PMOD_PXPMD7_1, 15 .EQU GPIOK_PMOD_PXPMD7_0, 14 .EQU GPIOK_PMOD_PXPMD6_1, 13 .EQU GPIOK_PMOD_PXPMD6_0, 12 .EQU GPIOK_PMOD_PXPMD5_1, 11 .EQU GPIOK_PMOD_PXPMD5_0, 10 .EQU GPIOK_PMOD_PXPMD4_1, 9 .EQU GPIOK_PMOD_PXPMD4_0, 8 .EQU GPIOK_PMOD_PXPMD3_1, 7 .EQU GPIOK_PMOD_PXPMD3_0, 6 .EQU GPIOK_PMOD_PXPMD2_1, 5 .EQU GPIOK_PMOD_PXPMD2_0, 4 .EQU GPIOK_PMOD_PXPMD1_1, 3 .EQU GPIOK_PMOD_PXPMD1_0, 2 .EQU GPIOK_PMOD_PXPMD0_1, 1 .EQU GPIOK_PMOD_PXPMD0_0, 0 // register------------------------------------- .EQU GPIOK_OMOD, 0x50000258 // 0x5000 0258 GPIOK_OMOD Bits------------------------------------- .EQU GPIOK_OMOD_PXOMD15, 30 .EQU GPIOK_OMOD_PXOMD14, 28 .EQU GPIOK_OMOD_PXOMD13, 26 .EQU GPIOK_OMOD_PXOMD12, 24 .EQU GPIOK_OMOD_PXOMD11, 22 .EQU GPIOK_OMOD_PXOMD10, 20 .EQU GPIOK_OMOD_PXOMD9, 18 .EQU GPIOK_OMOD_PXOMD8, 16 .EQU GPIOK_OMOD_PXOMD7, 14 .EQU GPIOK_OMOD_PXOMD6, 12 .EQU GPIOK_OMOD_PXOMD5, 10 .EQU GPIOK_OMOD_PXOMD4, 8 .EQU GPIOK_OMOD_PXOMD3, 6 .EQU GPIOK_OMOD_PXOMD2, 4 .EQU GPIOK_OMOD_PXOMD1, 2 .EQU GPIOK_OMOD_PXOMD0, 0 // register------------------------------------- .EQU GPIOK_LOCK, 0x5000025C // 0x5000 025C GPIOK_LOCK Bits------------------------------------- .EQU GPIOK_LOCK_PXLCKKEY15, 31 .EQU GPIOK_LOCK_PXLCKKEY14, 30 .EQU GPIOK_LOCK_PXLCKKEY13, 29 .EQU GPIOK_LOCK_PXLCKKEY12, 28 .EQU GPIOK_LOCK_PXLCKKEY11, 27 .EQU GPIOK_LOCK_PXLCKKEY10, 26 .EQU GPIOK_LOCK_PXLCKKEY9, 25 .EQU GPIOK_LOCK_PXLCKKEY8, 24 .EQU GPIOK_LOCK_PXLCKKEY7, 23 .EQU GPIOK_LOCK_PXLCKKEY6, 22 .EQU GPIOK_LOCK_PXLCKKEY5, 21 .EQU GPIOK_LOCK_PXLCKKEY4, 20 .EQU GPIOK_LOCK_PXLCKKEY3, 19 .EQU GPIOK_LOCK_PXLCKKEY2, 18 .EQU GPIOK_LOCK_PXLCKKEY1, 17 .EQU GPIOK_LOCK_PXLCKKEY0, 16 .EQU GPIOK_LOCK_PXLCK15, 15 .EQU GPIOK_LOCK_PXLCK14, 14 .EQU GPIOK_LOCK_PXLCK13, 13 .EQU GPIOK_LOCK_PXLCK12, 12 .EQU GPIOK_LOCK_PXLCK11, 11 .EQU GPIOK_LOCK_PXLCK10, 10 .EQU GPIOK_LOCK_PXLCK9, 9 .EQU GPIOK_LOCK_PXLCK8, 8 .EQU GPIOK_LOCK_PXLCK7, 7 .EQU GPIOK_LOCK_PXLCK6, 6 .EQU GPIOK_LOCK_PXLCK5, 5 .EQU GPIOK_LOCK_PXLCK4, 4 .EQU GPIOK_LOCK_PXLCK3, 3 .EQU GPIOK_LOCK_PXLCK2, 2 .EQU GPIOK_LOCK_PXLCK1, 1 .EQU GPIOK_LOCK_PXLCK0, 0 // register------------------------------------- .EQU GPIOK_RMPL, 0x50000260 // 0x5000 0260 GPIOK_RMPL Bits------------------------------------- .EQU GPIOK_RMPL_PXRMP7_3, 31 .EQU GPIOK_RMPL_PXRMP7_2, 30 .EQU GPIOK_RMPL_PXRMP7_1, 29 .EQU GPIOK_RMPL_PXRMP7_0, 28 .EQU GPIOK_RMPL_PXRMP6_3, 27 .EQU GPIOK_RMPL_PXRMP6_2, 26 .EQU GPIOK_RMPL_PXRMP6_1, 25 .EQU GPIOK_RMPL_PXRMP6_0, 24 .EQU GPIOK_RMPL_PXRMP5_3, 23 .EQU GPIOK_RMPL_PXRMP5_2, 22 .EQU GPIOK_RMPL_PXRMP5_1, 21 .EQU GPIOK_RMPL_PXRMP5_0, 20 .EQU GPIOK_RMPL_PXRMP4_3, 19 .EQU GPIOK_RMPL_PXRMP4_2, 18 .EQU GPIOK_RMPL_PXRMP4_1, 17 .EQU GPIOK_RMPL_PXRMP4_0, 16 .EQU GPIOK_RMPL_PXRMP3_3, 15 .EQU GPIOK_RMPL_PXRMP3_2, 14 .EQU GPIOK_RMPL_PXRMP3_1, 13 .EQU GPIOK_RMPL_PXRMP3_0, 12 .EQU GPIOK_RMPL_PXRMP2_3, 11 .EQU GPIOK_RMPL_PXRMP2_2, 10 .EQU GPIOK_RMPL_PXRMP2_1, 9 .EQU GPIOK_RMPL_PXRMP2_0, 8 .EQU GPIOK_RMPL_PXRMP1_3, 7 .EQU GPIOK_RMPL_PXRMP1_2, 6 .EQU GPIOK_RMPL_PXRMP1_1, 5 .EQU GPIOK_RMPL_PXRMP1_0, 4 .EQU GPIOK_RMPL_PXRMP0_3, 3 .EQU GPIOK_RMPL_PXRMP0_2, 2 .EQU GPIOK_RMPL_PXRMP0_1, 1 .EQU GPIOK_RMPL_PXRMP0_0, 0 // register------------------------------------- .EQU GPIOK_RMPH, 0x50000264 // 0x5000 0264 GPIOK_RMPH Bits------------------------------------- .EQU GPIOK_RMPH_PXRMP15_3, 31 .EQU GPIOK_RMPH_PXRMP15_2, 30 .EQU GPIOK_RMPH_PXRMP15_1, 29 .EQU GPIOK_RMPH_PXRMP15_0, 28 .EQU GPIOK_RMPH_PXRMP14_3, 27 .EQU GPIOK_RMPH_PXRMP14_2, 26 .EQU GPIOK_RMPH_PXRMP14_1, 25 .EQU GPIOK_RMPH_PXRMP14_0, 24 .EQU GPIOK_RMPH_PXRMP13_3, 23 .EQU GPIOK_RMPH_PXRMP13_2, 22 .EQU GPIOK_RMPH_PXRMP13_1, 21 .EQU GPIOK_RMPH_PXRMP13_0, 20 .EQU GPIOK_RMPH_PXRMP12_3, 19 .EQU GPIOK_RMPH_PXRMP12_2, 18 .EQU GPIOK_RMPH_PXRMP12_1, 17 .EQU GPIOK_RMPH_PXRMP12_0, 16 .EQU GPIOK_RMPH_PXRMP11_3, 15 .EQU GPIOK_RMPH_PXRMP11_2, 14 .EQU GPIOK_RMPH_PXRMP11_1, 13 .EQU GPIOK_RMPH_PXRMP11_0, 12 .EQU GPIOK_RMPH_PXRMP10_3, 11 .EQU GPIOK_RMPH_PXRMP10_2, 10 .EQU GPIOK_RMPH_PXRMP10_1, 9 .EQU GPIOK_RMPH_PXRMP10_0, 8 .EQU GPIOK_RMPH_PXRMP9_3, 7 .EQU GPIOK_RMPH_PXRMP9_2, 6 .EQU GPIOK_RMPH_PXRMP9_1, 5 .EQU GPIOK_RMPH_PXRMP9_0, 4 .EQU GPIOK_RMPH_PXRMP8_3, 3 .EQU GPIOK_RMPH_PXRMP8_2, 2 .EQU GPIOK_RMPH_PXRMP8_1, 1 .EQU GPIOK_RMPH_PXRMP8_0, 0 // register------------------------------------- .EQU GPIOK_RMP_MSB, 0x50000274 // 0x5000 0274 GPIOK_RMP_MSB Bits------------------------------------- .EQU GPIOK_RMP_MSB_RMPMSB31, 31 .EQU GPIOK_RMP_MSB_RMPMSB30, 30 .EQU GPIOK_RMP_MSB_RMPMSB29, 29 .EQU GPIOK_RMP_MSB_RMPMSB28, 28 .EQU GPIOK_RMP_MSB_RMPMSB27, 27 .EQU GPIOK_RMP_MSB_RMPMSB26, 26 .EQU GPIOK_RMP_MSB_RMPMSB25, 25 .EQU GPIOK_RMP_MSB_RMPMSB24, 24 .EQU GPIOK_RMP_MSB_RMPMSB23, 23 .EQU GPIOK_RMP_MSB_RMPMSB22, 22 .EQU GPIOK_RMP_MSB_RMPMSB21, 21 .EQU GPIOK_RMP_MSB_RMPMSB20, 20 .EQU GPIOK_RMP_MSB_RMPMSB19, 19 .EQU GPIOK_RMP_MSB_RMPMSB18, 18 .EQU GPIOK_RMP_MSB_RMPMSB17, 17 .EQU GPIOK_RMP_MSB_RMPMSB16, 16 .EQU GPIOK_RMP_MSB_RMPMSB15, 15 .EQU GPIOK_RMP_MSB_RMPMSB14, 14 .EQU GPIOK_RMP_MSB_RMPMSB13, 13 .EQU GPIOK_RMP_MSB_RMPMSB12, 12 .EQU GPIOK_RMP_MSB_RMPMSB11, 11 .EQU GPIOK_RMP_MSB_RMPMSB10, 10 .EQU GPIOK_RMP_MSB_RMPMSB9, 9 .EQU GPIOK_RMP_MSB_RMPMSB8, 8 .EQU GPIOK_RMP_MSB_RMPMSB7, 7 .EQU GPIOK_RMP_MSB_RMPMSB6, 6 .EQU GPIOK_RMP_MSB_RMPMSB5, 5 .EQU GPIOK_RMP_MSB_RMPMSB4, 4 .EQU GPIOK_RMP_MSB_RMPMSB3, 3 .EQU GPIOK_RMP_MSB_RMPMSB2, 2 .EQU GPIOK_RMP_MSB_RMPMSB1, 1 .EQU GPIOK_RMP_MSB_RMPMSB0, 0 // register------------------------------------- .EQU GPIOK_SDE, 0x50000278 // 0x5000 0278 GPIOK_SDE Bits------------------------------------- .EQU GPIOK_SDE_SDEF15, 31 .EQU GPIOK_SDE_SDEF14, 30 .EQU GPIOK_SDE_SDEF13, 29 .EQU GPIOK_SDE_SDEF12, 28 .EQU GPIOK_SDE_SDEF11, 27 .EQU GPIOK_SDE_SDEF10, 26 .EQU GPIOK_SDE_SDEF9, 25 .EQU GPIOK_SDE_SDEF8, 24 .EQU GPIOK_SDE_SDEF7, 23 .EQU GPIOK_SDE_SDEF6, 22 .EQU GPIOK_SDE_SDEF5, 21 .EQU GPIOK_SDE_SDEF4, 20 .EQU GPIOK_SDE_SDEF3, 19 .EQU GPIOK_SDE_SDEF2, 18 .EQU GPIOK_SDE_SDEF1, 17 .EQU GPIOK_SDE_SDEF0, 16 .EQU GPIOK_SDE_SDEN15, 15 .EQU GPIOK_SDE_SDEN14, 14 .EQU GPIOK_SDE_SDEN13, 13 .EQU GPIOK_SDE_SDEN12, 12 .EQU GPIOK_SDE_SDEN11, 11 .EQU GPIOK_SDE_SDEN10, 10 .EQU GPIOK_SDE_SDEN9, 9 .EQU GPIOK_SDE_SDEN8, 8 .EQU GPIOK_SDE_SDEN7, 7 .EQU GPIOK_SDE_SDEN6, 6 .EQU GPIOK_SDE_SDEN5, 5 .EQU GPIOK_SDE_SDEN4, 4 .EQU GPIOK_SDE_SDEN3, 3 .EQU GPIOK_SDE_SDEN2, 2 .EQU GPIOK_SDE_SDEN1, 1 .EQU GPIOK_SDE_SDEN0, 0 // register------------------------------------- .EQU GPIOK_SDCTL, 0x5000027C // 0x5000 027C GPIOK_SDCTL Bits------------------------------------- .EQU GPIOK_SDCTL_PSDEF, 2 .EQU GPIOK_SDCTL_LINKEN, 1 .EQU GPIOK_SDCTL_SWSAMCLK, 0 // register------------------------------------- .EQU GPIOA_INTMASK, 0x50001000 // 0x5000 1000 GPIOA_INTMASK Bits------------------------------------- .EQU GPIOA_INTMASK_INTMASK15, 15 .EQU GPIOA_INTMASK_INTMASK14, 14 .EQU GPIOA_INTMASK_INTMASK13, 13 .EQU GPIOA_INTMASK_INTMASK12, 12 .EQU GPIOA_INTMASK_INTMASK11, 11 .EQU GPIOA_INTMASK_INTMASK10, 10 .EQU GPIOA_INTMASK_INTMASK9, 9 .EQU GPIOA_INTMASK_INTMASK8, 8 .EQU GPIOA_INTMASK_INTMASK7, 7 .EQU GPIOA_INTMASK_INTMASK6, 6 .EQU GPIOA_INTMASK_INTMASK5, 5 .EQU GPIOA_INTMASK_INTMASK4, 4 .EQU GPIOA_INTMASK_INTMASK3, 3 .EQU GPIOA_INTMASK_INTMASK2, 2 .EQU GPIOA_INTMASK_INTMASK1, 1 .EQU GPIOA_INTMASK_INTMASK0, 0 // register------------------------------------- .EQU GPIOA_INTRISE, 0x50001004 // 0x5000 1004 GPIOA_INTRISE Bits------------------------------------- .EQU GPIOA_INTRISE_INTRISE15, 15 .EQU GPIOA_INTRISE_INTRISE14, 14 .EQU GPIOA_INTRISE_INTRISE13, 13 .EQU GPIOA_INTRISE_INTRISE12, 12 .EQU GPIOA_INTRISE_INTRISE11, 11 .EQU GPIOA_INTRISE_INTRISE10, 10 .EQU GPIOA_INTRISE_INTRISE9, 9 .EQU GPIOA_INTRISE_INTRISE8, 8 .EQU GPIOA_INTRISE_INTRISE7, 7 .EQU GPIOA_INTRISE_INTRISE6, 6 .EQU GPIOA_INTRISE_INTRISE5, 5 .EQU GPIOA_INTRISE_INTRISE4, 4 .EQU GPIOA_INTRISE_INTRISE3, 3 .EQU GPIOA_INTRISE_INTRISE2, 2 .EQU GPIOA_INTRISE_INTRISE1, 1 .EQU GPIOA_INTRISE_INTRISE0, 0 // register------------------------------------- .EQU GPIOA_INTFALL, 0x50001008 // 0x5000 1008 GPIOA_INTFALL Bits------------------------------------- .EQU GPIOA_INTFALL_INTFALL15, 15 .EQU GPIOA_INTFALL_INTFALL14, 14 .EQU GPIOA_INTFALL_INTFALL13, 13 .EQU GPIOA_INTFALL_INTFALL12, 12 .EQU GPIOA_INTFALL_INTFALL11, 11 .EQU GPIOA_INTFALL_INTFALL10, 10 .EQU GPIOA_INTFALL_INTFALL9, 9 .EQU GPIOA_INTFALL_INTFALL8, 8 .EQU GPIOA_INTFALL_INTFALL7, 7 .EQU GPIOA_INTFALL_INTFALL6, 6 .EQU GPIOA_INTFALL_INTFALL5, 5 .EQU GPIOA_INTFALL_INTFALL4, 4 .EQU GPIOA_INTFALL_INTFALL3, 3 .EQU GPIOA_INTFALL_INTFALL2, 2 .EQU GPIOA_INTFALL_INTFALL1, 1 .EQU GPIOA_INTFALL_INTFALL0, 0 // register------------------------------------- .EQU GPIOA_INTSSEL, 0x5000100C // 0x5000 100C GPIOA_INTSSEL Bits------------------------------------- .EQU GPIOA_INTSSEL_INTSSEL15, 15 .EQU GPIOA_INTSSEL_INTSSEL14, 14 .EQU GPIOA_INTSSEL_INTSSEL13, 13 .EQU GPIOA_INTSSEL_INTSSEL12, 12 .EQU GPIOA_INTSSEL_INTSSEL11, 11 .EQU GPIOA_INTSSEL_INTSSEL10, 10 .EQU GPIOA_INTSSEL_INTSSEL9, 9 .EQU GPIOA_INTSSEL_INTSSEL8, 8 .EQU GPIOA_INTSSEL_INTSSEL7, 7 .EQU GPIOA_INTSSEL_INTSSEL6, 6 .EQU GPIOA_INTSSEL_INTSSEL5, 5 .EQU GPIOA_INTSSEL_INTSSEL4, 4 .EQU GPIOA_INTSSEL_INTSSEL3, 3 .EQU GPIOA_INTSSEL_INTSSEL2, 2 .EQU GPIOA_INTSSEL_INTSSEL1, 1 .EQU GPIOA_INTSSEL_INTSSEL0, 0 // register------------------------------------- .EQU GPIOA_INTFLAG, 0x50001010 // 0x5000 1010 GPIOA_INTFLAG Bits------------------------------------- .EQU GPIOA_INTFLAG_INTFLAG15, 15 .EQU GPIOA_INTFLAG_INTFLAG14, 14 .EQU GPIOA_INTFLAG_INTFLAG13, 13 .EQU GPIOA_INTFLAG_INTFLAG12, 12 .EQU GPIOA_INTFLAG_INTFLAG11, 11 .EQU GPIOA_INTFLAG_INTFLAG10, 10 .EQU GPIOA_INTFLAG_INTFLAG9, 9 .EQU GPIOA_INTFLAG_INTFLAG8, 8 .EQU GPIOA_INTFLAG_INTFLAG7, 7 .EQU GPIOA_INTFLAG_INTFLAG6, 6 .EQU GPIOA_INTFLAG_INTFLAG5, 5 .EQU GPIOA_INTFLAG_INTFLAG4, 4 .EQU GPIOA_INTFLAG_INTFLAG3, 3 .EQU GPIOA_INTFLAG_INTFLAG2, 2 .EQU GPIOA_INTFLAG_INTFLAG1, 1 .EQU GPIOA_INTFLAG_INTFLAG0, 0 // register------------------------------------- .EQU GPIOB_INTMASK, 0x50001040 // 0x5000 1040 GPIOB_INTMASK Bits------------------------------------- .EQU GPIOB_INTMASK_INTMASK15, 15 .EQU GPIOB_INTMASK_INTMASK14, 14 .EQU GPIOB_INTMASK_INTMASK13, 13 .EQU GPIOB_INTMASK_INTMASK12, 12 .EQU GPIOB_INTMASK_INTMASK11, 11 .EQU GPIOB_INTMASK_INTMASK10, 10 .EQU GPIOB_INTMASK_INTMASK9, 9 .EQU GPIOB_INTMASK_INTMASK8, 8 .EQU GPIOB_INTMASK_INTMASK7, 7 .EQU GPIOB_INTMASK_INTMASK6, 6 .EQU GPIOB_INTMASK_INTMASK5, 5 .EQU GPIOB_INTMASK_INTMASK4, 4 .EQU GPIOB_INTMASK_INTMASK3, 3 .EQU GPIOB_INTMASK_INTMASK2, 2 .EQU GPIOB_INTMASK_INTMASK1, 1 .EQU GPIOB_INTMASK_INTMASK0, 0 // register------------------------------------- .EQU GPIOB_INTRISE, 0x50001044 // 0x5000 1044 GPIOB_INTRISE Bits------------------------------------- .EQU GPIOB_INTRISE_INTRISE15, 15 .EQU GPIOB_INTRISE_INTRISE14, 14 .EQU GPIOB_INTRISE_INTRISE13, 13 .EQU GPIOB_INTRISE_INTRISE12, 12 .EQU GPIOB_INTRISE_INTRISE11, 11 .EQU GPIOB_INTRISE_INTRISE10, 10 .EQU GPIOB_INTRISE_INTRISE9, 9 .EQU GPIOB_INTRISE_INTRISE8, 8 .EQU GPIOB_INTRISE_INTRISE7, 7 .EQU GPIOB_INTRISE_INTRISE6, 6 .EQU GPIOB_INTRISE_INTRISE5, 5 .EQU GPIOB_INTRISE_INTRISE4, 4 .EQU GPIOB_INTRISE_INTRISE3, 3 .EQU GPIOB_INTRISE_INTRISE2, 2 .EQU GPIOB_INTRISE_INTRISE1, 1 .EQU GPIOB_INTRISE_INTRISE0, 0 // register------------------------------------- .EQU GPIOB_INTFALL, 0x50001048 // 0x5000 1048 GPIOB_INTFALL Bits------------------------------------- .EQU GPIOB_INTFALL_INTFALL15, 15 .EQU GPIOB_INTFALL_INTFALL14, 14 .EQU GPIOB_INTFALL_INTFALL13, 13 .EQU GPIOB_INTFALL_INTFALL12, 12 .EQU GPIOB_INTFALL_INTFALL11, 11 .EQU GPIOB_INTFALL_INTFALL10, 10 .EQU GPIOB_INTFALL_INTFALL9, 9 .EQU GPIOB_INTFALL_INTFALL8, 8 .EQU GPIOB_INTFALL_INTFALL7, 7 .EQU GPIOB_INTFALL_INTFALL6, 6 .EQU GPIOB_INTFALL_INTFALL5, 5 .EQU GPIOB_INTFALL_INTFALL4, 4 .EQU GPIOB_INTFALL_INTFALL3, 3 .EQU GPIOB_INTFALL_INTFALL2, 2 .EQU GPIOB_INTFALL_INTFALL1, 1 .EQU GPIOB_INTFALL_INTFALL0, 0 // register------------------------------------- .EQU GPIOB_INTSSEL, 0x5000104C // 0x5000 104C GPIOB_INTSSEL Bits------------------------------------- .EQU GPIOB_INTSSEL_INTSSEL15, 15 .EQU GPIOB_INTSSEL_INTSSEL14, 14 .EQU GPIOB_INTSSEL_INTSSEL13, 13 .EQU GPIOB_INTSSEL_INTSSEL12, 12 .EQU GPIOB_INTSSEL_INTSSEL11, 11 .EQU GPIOB_INTSSEL_INTSSEL10, 10 .EQU GPIOB_INTSSEL_INTSSEL9, 9 .EQU GPIOB_INTSSEL_INTSSEL8, 8 .EQU GPIOB_INTSSEL_INTSSEL7, 7 .EQU GPIOB_INTSSEL_INTSSEL6, 6 .EQU GPIOB_INTSSEL_INTSSEL5, 5 .EQU GPIOB_INTSSEL_INTSSEL4, 4 .EQU GPIOB_INTSSEL_INTSSEL3, 3 .EQU GPIOB_INTSSEL_INTSSEL2, 2 .EQU GPIOB_INTSSEL_INTSSEL1, 1 .EQU GPIOB_INTSSEL_INTSSEL0, 0 // register------------------------------------- .EQU GPIOB_INTFLAG, 0x50001050 // 0x5000 1050 GPIOB_INTFLAG Bits------------------------------------- .EQU GPIOB_INTFLAG_INTFLAG15, 15 .EQU GPIOB_INTFLAG_INTFLAG14, 14 .EQU GPIOB_INTFLAG_INTFLAG13, 13 .EQU GPIOB_INTFLAG_INTFLAG12, 12 .EQU GPIOB_INTFLAG_INTFLAG11, 11 .EQU GPIOB_INTFLAG_INTFLAG10, 10 .EQU GPIOB_INTFLAG_INTFLAG9, 9 .EQU GPIOB_INTFLAG_INTFLAG8, 8 .EQU GPIOB_INTFLAG_INTFLAG7, 7 .EQU GPIOB_INTFLAG_INTFLAG6, 6 .EQU GPIOB_INTFLAG_INTFLAG5, 5 .EQU GPIOB_INTFLAG_INTFLAG4, 4 .EQU GPIOB_INTFLAG_INTFLAG3, 3 .EQU GPIOB_INTFLAG_INTFLAG2, 2 .EQU GPIOB_INTFLAG_INTFLAG1, 1 .EQU GPIOB_INTFLAG_INTFLAG0, 0 // register------------------------------------- .EQU GPIOC_INTMASK, 0x50001080 // 0x5000 1080 GPIOC_INTMASK Bits------------------------------------- .EQU GPIOC_INTMASK_INTMASK15, 15 .EQU GPIOC_INTMASK_INTMASK14, 14 .EQU GPIOC_INTMASK_INTMASK13, 13 .EQU GPIOC_INTMASK_INTMASK12, 12 .EQU GPIOC_INTMASK_INTMASK11, 11 .EQU GPIOC_INTMASK_INTMASK10, 10 .EQU GPIOC_INTMASK_INTMASK9, 9 .EQU GPIOC_INTMASK_INTMASK8, 8 .EQU GPIOC_INTMASK_INTMASK7, 7 .EQU GPIOC_INTMASK_INTMASK6, 6 .EQU GPIOC_INTMASK_INTMASK5, 5 .EQU GPIOC_INTMASK_INTMASK4, 4 .EQU GPIOC_INTMASK_INTMASK3, 3 .EQU GPIOC_INTMASK_INTMASK2, 2 .EQU GPIOC_INTMASK_INTMASK1, 1 .EQU GPIOC_INTMASK_INTMASK0, 0 // register------------------------------------- .EQU GPIOC_INTRISE, 0x50001084 // 0x5000 1084 GPIOC_INTRISE Bits------------------------------------- .EQU GPIOC_INTRISE_INTRISE15, 15 .EQU GPIOC_INTRISE_INTRISE14, 14 .EQU GPIOC_INTRISE_INTRISE13, 13 .EQU GPIOC_INTRISE_INTRISE12, 12 .EQU GPIOC_INTRISE_INTRISE11, 11 .EQU GPIOC_INTRISE_INTRISE10, 10 .EQU GPIOC_INTRISE_INTRISE9, 9 .EQU GPIOC_INTRISE_INTRISE8, 8 .EQU GPIOC_INTRISE_INTRISE7, 7 .EQU GPIOC_INTRISE_INTRISE6, 6 .EQU GPIOC_INTRISE_INTRISE5, 5 .EQU GPIOC_INTRISE_INTRISE4, 4 .EQU GPIOC_INTRISE_INTRISE3, 3 .EQU GPIOC_INTRISE_INTRISE2, 2 .EQU GPIOC_INTRISE_INTRISE1, 1 .EQU GPIOC_INTRISE_INTRISE0, 0 // register------------------------------------- .EQU GPIOC_INTFALL, 0x50001088 // 0x5000 1088 GPIOC_INTFALL Bits------------------------------------- .EQU GPIOC_INTFALL_INTFALL15, 15 .EQU GPIOC_INTFALL_INTFALL14, 14 .EQU GPIOC_INTFALL_INTFALL13, 13 .EQU GPIOC_INTFALL_INTFALL12, 12 .EQU GPIOC_INTFALL_INTFALL11, 11 .EQU GPIOC_INTFALL_INTFALL10, 10 .EQU GPIOC_INTFALL_INTFALL9, 9 .EQU GPIOC_INTFALL_INTFALL8, 8 .EQU GPIOC_INTFALL_INTFALL7, 7 .EQU GPIOC_INTFALL_INTFALL6, 6 .EQU GPIOC_INTFALL_INTFALL5, 5 .EQU GPIOC_INTFALL_INTFALL4, 4 .EQU GPIOC_INTFALL_INTFALL3, 3 .EQU GPIOC_INTFALL_INTFALL2, 2 .EQU GPIOC_INTFALL_INTFALL1, 1 .EQU GPIOC_INTFALL_INTFALL0, 0 // register------------------------------------- .EQU GPIOC_INTSSEL, 0x5000108C // 0x5000 108C GPIOC_INTSSEL Bits------------------------------------- .EQU GPIOC_INTSSEL_INTSSEL15, 15 .EQU GPIOC_INTSSEL_INTSSEL14, 14 .EQU GPIOC_INTSSEL_INTSSEL13, 13 .EQU GPIOC_INTSSEL_INTSSEL12, 12 .EQU GPIOC_INTSSEL_INTSSEL11, 11 .EQU GPIOC_INTSSEL_INTSSEL10, 10 .EQU GPIOC_INTSSEL_INTSSEL9, 9 .EQU GPIOC_INTSSEL_INTSSEL8, 8 .EQU GPIOC_INTSSEL_INTSSEL7, 7 .EQU GPIOC_INTSSEL_INTSSEL6, 6 .EQU GPIOC_INTSSEL_INTSSEL5, 5 .EQU GPIOC_INTSSEL_INTSSEL4, 4 .EQU GPIOC_INTSSEL_INTSSEL3, 3 .EQU GPIOC_INTSSEL_INTSSEL2, 2 .EQU GPIOC_INTSSEL_INTSSEL1, 1 .EQU GPIOC_INTSSEL_INTSSEL0, 0 // register------------------------------------- .EQU GPIOC_INTFLAG, 0x50001090 // 0x5000 1090 GPIOC_INTFLAG Bits------------------------------------- .EQU GPIOC_INTFLAG_INTFLAG15, 15 .EQU GPIOC_INTFLAG_INTFLAG14, 14 .EQU GPIOC_INTFLAG_INTFLAG13, 13 .EQU GPIOC_INTFLAG_INTFLAG12, 12 .EQU GPIOC_INTFLAG_INTFLAG11, 11 .EQU GPIOC_INTFLAG_INTFLAG10, 10 .EQU GPIOC_INTFLAG_INTFLAG9, 9 .EQU GPIOC_INTFLAG_INTFLAG8, 8 .EQU GPIOC_INTFLAG_INTFLAG7, 7 .EQU GPIOC_INTFLAG_INTFLAG6, 6 .EQU GPIOC_INTFLAG_INTFLAG5, 5 .EQU GPIOC_INTFLAG_INTFLAG4, 4 .EQU GPIOC_INTFLAG_INTFLAG3, 3 .EQU GPIOC_INTFLAG_INTFLAG2, 2 .EQU GPIOC_INTFLAG_INTFLAG1, 1 .EQU GPIOC_INTFLAG_INTFLAG0, 0 // register------------------------------------- .EQU GPIOD_INTMASK, 0x500010C0 // 0x5000 10C0 GPIOD_INTMASK Bits------------------------------------- .EQU GPIOD_INTMASK_INTMASK15, 15 .EQU GPIOD_INTMASK_INTMASK14, 14 .EQU GPIOD_INTMASK_INTMASK13, 13 .EQU GPIOD_INTMASK_INTMASK12, 12 .EQU GPIOD_INTMASK_INTMASK11, 11 .EQU GPIOD_INTMASK_INTMASK10, 10 .EQU GPIOD_INTMASK_INTMASK9, 9 .EQU GPIOD_INTMASK_INTMASK8, 8 .EQU GPIOD_INTMASK_INTMASK7, 7 .EQU GPIOD_INTMASK_INTMASK6, 6 .EQU GPIOD_INTMASK_INTMASK5, 5 .EQU GPIOD_INTMASK_INTMASK4, 4 .EQU GPIOD_INTMASK_INTMASK3, 3 .EQU GPIOD_INTMASK_INTMASK2, 2 .EQU GPIOD_INTMASK_INTMASK1, 1 .EQU GPIOD_INTMASK_INTMASK0, 0 // register------------------------------------- .EQU GPIOD_INTRISE, 0x500010C4 // 0x5000 10C4 GPIOD_INTRISE Bits------------------------------------- .EQU GPIOD_INTRISE_INTRISE15, 15 .EQU GPIOD_INTRISE_INTRISE14, 14 .EQU GPIOD_INTRISE_INTRISE13, 13 .EQU GPIOD_INTRISE_INTRISE12, 12 .EQU GPIOD_INTRISE_INTRISE11, 11 .EQU GPIOD_INTRISE_INTRISE10, 10 .EQU GPIOD_INTRISE_INTRISE9, 9 .EQU GPIOD_INTRISE_INTRISE8, 8 .EQU GPIOD_INTRISE_INTRISE7, 7 .EQU GPIOD_INTRISE_INTRISE6, 6 .EQU GPIOD_INTRISE_INTRISE5, 5 .EQU GPIOD_INTRISE_INTRISE4, 4 .EQU GPIOD_INTRISE_INTRISE3, 3 .EQU GPIOD_INTRISE_INTRISE2, 2 .EQU GPIOD_INTRISE_INTRISE1, 1 .EQU GPIOD_INTRISE_INTRISE0, 0 // register------------------------------------- .EQU GPIOD_INTFALL, 0x500010C8 // 0x5000 10C8 GPIOD_INTFALL Bits------------------------------------- .EQU GPIOD_INTFALL_INTFALL15, 15 .EQU GPIOD_INTFALL_INTFALL14, 14 .EQU GPIOD_INTFALL_INTFALL13, 13 .EQU GPIOD_INTFALL_INTFALL12, 12 .EQU GPIOD_INTFALL_INTFALL11, 11 .EQU GPIOD_INTFALL_INTFALL10, 10 .EQU GPIOD_INTFALL_INTFALL9, 9 .EQU GPIOD_INTFALL_INTFALL8, 8 .EQU GPIOD_INTFALL_INTFALL7, 7 .EQU GPIOD_INTFALL_INTFALL6, 6 .EQU GPIOD_INTFALL_INTFALL5, 5 .EQU GPIOD_INTFALL_INTFALL4, 4 .EQU GPIOD_INTFALL_INTFALL3, 3 .EQU GPIOD_INTFALL_INTFALL2, 2 .EQU GPIOD_INTFALL_INTFALL1, 1 .EQU GPIOD_INTFALL_INTFALL0, 0 // register------------------------------------- .EQU GPIOD_INTSSEL, 0x500010CC // 0x5000 10CC GPIOD_INTSSEL Bits------------------------------------- .EQU GPIOD_INTSSEL_INTSSEL15, 15 .EQU GPIOD_INTSSEL_INTSSEL14, 14 .EQU GPIOD_INTSSEL_INTSSEL13, 13 .EQU GPIOD_INTSSEL_INTSSEL12, 12 .EQU GPIOD_INTSSEL_INTSSEL11, 11 .EQU GPIOD_INTSSEL_INTSSEL10, 10 .EQU GPIOD_INTSSEL_INTSSEL9, 9 .EQU GPIOD_INTSSEL_INTSSEL8, 8 .EQU GPIOD_INTSSEL_INTSSEL7, 7 .EQU GPIOD_INTSSEL_INTSSEL6, 6 .EQU GPIOD_INTSSEL_INTSSEL5, 5 .EQU GPIOD_INTSSEL_INTSSEL4, 4 .EQU GPIOD_INTSSEL_INTSSEL3, 3 .EQU GPIOD_INTSSEL_INTSSEL2, 2 .EQU GPIOD_INTSSEL_INTSSEL1, 1 .EQU GPIOD_INTSSEL_INTSSEL0, 0 // register------------------------------------- .EQU GPIOD_INTFLAG, 0x500010D0 // 0x5000 10D0 GPIOD_INTFLAG Bits------------------------------------- .EQU GPIOD_INTFLAG_INTFLAG15, 15 .EQU GPIOD_INTFLAG_INTFLAG14, 14 .EQU GPIOD_INTFLAG_INTFLAG13, 13 .EQU GPIOD_INTFLAG_INTFLAG12, 12 .EQU GPIOD_INTFLAG_INTFLAG11, 11 .EQU GPIOD_INTFLAG_INTFLAG10, 10 .EQU GPIOD_INTFLAG_INTFLAG9, 9 .EQU GPIOD_INTFLAG_INTFLAG8, 8 .EQU GPIOD_INTFLAG_INTFLAG7, 7 .EQU GPIOD_INTFLAG_INTFLAG6, 6 .EQU GPIOD_INTFLAG_INTFLAG5, 5 .EQU GPIOD_INTFLAG_INTFLAG4, 4 .EQU GPIOD_INTFLAG_INTFLAG3, 3 .EQU GPIOD_INTFLAG_INTFLAG2, 2 .EQU GPIOD_INTFLAG_INTFLAG1, 1 .EQU GPIOD_INTFLAG_INTFLAG0, 0 // register------------------------------------- .EQU GPIOE_INTMASK, 0x50001100 // 0x5000 1100 GPIOE_INTMASK Bits------------------------------------- .EQU GPIOE_INTMASK_INTMASK15, 15 .EQU GPIOE_INTMASK_INTMASK14, 14 .EQU GPIOE_INTMASK_INTMASK13, 13 .EQU GPIOE_INTMASK_INTMASK12, 12 .EQU GPIOE_INTMASK_INTMASK11, 11 .EQU GPIOE_INTMASK_INTMASK10, 10 .EQU GPIOE_INTMASK_INTMASK9, 9 .EQU GPIOE_INTMASK_INTMASK8, 8 .EQU GPIOE_INTMASK_INTMASK7, 7 .EQU GPIOE_INTMASK_INTMASK6, 6 .EQU GPIOE_INTMASK_INTMASK5, 5 .EQU GPIOE_INTMASK_INTMASK4, 4 .EQU GPIOE_INTMASK_INTMASK3, 3 .EQU GPIOE_INTMASK_INTMASK2, 2 .EQU GPIOE_INTMASK_INTMASK1, 1 .EQU GPIOE_INTMASK_INTMASK0, 0 // register------------------------------------- .EQU GPIOE_INTRISE, 0x50001104 // 0x5000 1104 GPIOE_INTRISE Bits------------------------------------- .EQU GPIOE_INTRISE_INTRISE15, 15 .EQU GPIOE_INTRISE_INTRISE14, 14 .EQU GPIOE_INTRISE_INTRISE13, 13 .EQU GPIOE_INTRISE_INTRISE12, 12 .EQU GPIOE_INTRISE_INTRISE11, 11 .EQU GPIOE_INTRISE_INTRISE10, 10 .EQU GPIOE_INTRISE_INTRISE9, 9 .EQU GPIOE_INTRISE_INTRISE8, 8 .EQU GPIOE_INTRISE_INTRISE7, 7 .EQU GPIOE_INTRISE_INTRISE6, 6 .EQU GPIOE_INTRISE_INTRISE5, 5 .EQU GPIOE_INTRISE_INTRISE4, 4 .EQU GPIOE_INTRISE_INTRISE3, 3 .EQU GPIOE_INTRISE_INTRISE2, 2 .EQU GPIOE_INTRISE_INTRISE1, 1 .EQU GPIOE_INTRISE_INTRISE0, 0 // register------------------------------------- .EQU GPIOE_INTFALL, 0x50001108 // 0x5000 1108 GPIOE_INTFALL Bits------------------------------------- .EQU GPIOE_INTFALL_INTFALL15, 15 .EQU GPIOE_INTFALL_INTFALL14, 14 .EQU GPIOE_INTFALL_INTFALL13, 13 .EQU GPIOE_INTFALL_INTFALL12, 12 .EQU GPIOE_INTFALL_INTFALL11, 11 .EQU GPIOE_INTFALL_INTFALL10, 10 .EQU GPIOE_INTFALL_INTFALL9, 9 .EQU GPIOE_INTFALL_INTFALL8, 8 .EQU GPIOE_INTFALL_INTFALL7, 7 .EQU GPIOE_INTFALL_INTFALL6, 6 .EQU GPIOE_INTFALL_INTFALL5, 5 .EQU GPIOE_INTFALL_INTFALL4, 4 .EQU GPIOE_INTFALL_INTFALL3, 3 .EQU GPIOE_INTFALL_INTFALL2, 2 .EQU GPIOE_INTFALL_INTFALL1, 1 .EQU GPIOE_INTFALL_INTFALL0, 0 // register------------------------------------- .EQU GPIOE_INTSSEL, 0x5000110C // 0x5000 110C GPIOE_INTSSEL Bits------------------------------------- .EQU GPIOE_INTSSEL_INTSSEL15, 15 .EQU GPIOE_INTSSEL_INTSSEL14, 14 .EQU GPIOE_INTSSEL_INTSSEL13, 13 .EQU GPIOE_INTSSEL_INTSSEL12, 12 .EQU GPIOE_INTSSEL_INTSSEL11, 11 .EQU GPIOE_INTSSEL_INTSSEL10, 10 .EQU GPIOE_INTSSEL_INTSSEL9, 9 .EQU GPIOE_INTSSEL_INTSSEL8, 8 .EQU GPIOE_INTSSEL_INTSSEL7, 7 .EQU GPIOE_INTSSEL_INTSSEL6, 6 .EQU GPIOE_INTSSEL_INTSSEL5, 5 .EQU GPIOE_INTSSEL_INTSSEL4, 4 .EQU GPIOE_INTSSEL_INTSSEL3, 3 .EQU GPIOE_INTSSEL_INTSSEL2, 2 .EQU GPIOE_INTSSEL_INTSSEL1, 1 .EQU GPIOE_INTSSEL_INTSSEL0, 0 // register------------------------------------- .EQU GPIOE_INTFLAG, 0x50001110 // 0x5000 1110 GPIOE_INTFLAG Bits------------------------------------- .EQU GPIOE_INTFLAG_INTFLAG15, 15 .EQU GPIOE_INTFLAG_INTFLAG14, 14 .EQU GPIOE_INTFLAG_INTFLAG13, 13 .EQU GPIOE_INTFLAG_INTFLAG12, 12 .EQU GPIOE_INTFLAG_INTFLAG11, 11 .EQU GPIOE_INTFLAG_INTFLAG10, 10 .EQU GPIOE_INTFLAG_INTFLAG9, 9 .EQU GPIOE_INTFLAG_INTFLAG8, 8 .EQU GPIOE_INTFLAG_INTFLAG7, 7 .EQU GPIOE_INTFLAG_INTFLAG6, 6 .EQU GPIOE_INTFLAG_INTFLAG5, 5 .EQU GPIOE_INTFLAG_INTFLAG4, 4 .EQU GPIOE_INTFLAG_INTFLAG3, 3 .EQU GPIOE_INTFLAG_INTFLAG2, 2 .EQU GPIOE_INTFLAG_INTFLAG1, 1 .EQU GPIOE_INTFLAG_INTFLAG0, 0 // register------------------------------------- .EQU GPIOF_INTMASK, 0x50001140 // 0x5000 1140 GPIOF_INTMASK Bits------------------------------------- .EQU GPIOF_INTMASK_INTMASK15, 15 .EQU GPIOF_INTMASK_INTMASK14, 14 .EQU GPIOF_INTMASK_INTMASK13, 13 .EQU GPIOF_INTMASK_INTMASK12, 12 .EQU GPIOF_INTMASK_INTMASK11, 11 .EQU GPIOF_INTMASK_INTMASK10, 10 .EQU GPIOF_INTMASK_INTMASK9, 9 .EQU GPIOF_INTMASK_INTMASK8, 8 .EQU GPIOF_INTMASK_INTMASK7, 7 .EQU GPIOF_INTMASK_INTMASK6, 6 .EQU GPIOF_INTMASK_INTMASK5, 5 .EQU GPIOF_INTMASK_INTMASK4, 4 .EQU GPIOF_INTMASK_INTMASK3, 3 .EQU GPIOF_INTMASK_INTMASK2, 2 .EQU GPIOF_INTMASK_INTMASK1, 1 .EQU GPIOF_INTMASK_INTMASK0, 0 // register------------------------------------- .EQU GPIOF_INTRISE, 0x50001144 // 0x5000 1144 GPIOF_INTRISE Bits------------------------------------- .EQU GPIOF_INTRISE_INTRISE15, 15 .EQU GPIOF_INTRISE_INTRISE14, 14 .EQU GPIOF_INTRISE_INTRISE13, 13 .EQU GPIOF_INTRISE_INTRISE12, 12 .EQU GPIOF_INTRISE_INTRISE11, 11 .EQU GPIOF_INTRISE_INTRISE10, 10 .EQU GPIOF_INTRISE_INTRISE9, 9 .EQU GPIOF_INTRISE_INTRISE8, 8 .EQU GPIOF_INTRISE_INTRISE7, 7 .EQU GPIOF_INTRISE_INTRISE6, 6 .EQU GPIOF_INTRISE_INTRISE5, 5 .EQU GPIOF_INTRISE_INTRISE4, 4 .EQU GPIOF_INTRISE_INTRISE3, 3 .EQU GPIOF_INTRISE_INTRISE2, 2 .EQU GPIOF_INTRISE_INTRISE1, 1 .EQU GPIOF_INTRISE_INTRISE0, 0 // register------------------------------------- .EQU GPIOF_INTFALL, 0x50001148 // 0x5000 1148 GPIOF_INTFALL Bits------------------------------------- .EQU GPIOF_INTFALL_INTFALL15, 15 .EQU GPIOF_INTFALL_INTFALL14, 14 .EQU GPIOF_INTFALL_INTFALL13, 13 .EQU GPIOF_INTFALL_INTFALL12, 12 .EQU GPIOF_INTFALL_INTFALL11, 11 .EQU GPIOF_INTFALL_INTFALL10, 10 .EQU GPIOF_INTFALL_INTFALL9, 9 .EQU GPIOF_INTFALL_INTFALL8, 8 .EQU GPIOF_INTFALL_INTFALL7, 7 .EQU GPIOF_INTFALL_INTFALL6, 6 .EQU GPIOF_INTFALL_INTFALL5, 5 .EQU GPIOF_INTFALL_INTFALL4, 4 .EQU GPIOF_INTFALL_INTFALL3, 3 .EQU GPIOF_INTFALL_INTFALL2, 2 .EQU GPIOF_INTFALL_INTFALL1, 1 .EQU GPIOF_INTFALL_INTFALL0, 0 // register------------------------------------- .EQU GPIOF_INTSSEL, 0x5000114C // 0x5000 114C GPIOF_INTSSEL Bits------------------------------------- .EQU GPIOF_INTSSEL_INTSSEL15, 15 .EQU GPIOF_INTSSEL_INTSSEL14, 14 .EQU GPIOF_INTSSEL_INTSSEL13, 13 .EQU GPIOF_INTSSEL_INTSSEL12, 12 .EQU GPIOF_INTSSEL_INTSSEL11, 11 .EQU GPIOF_INTSSEL_INTSSEL10, 10 .EQU GPIOF_INTSSEL_INTSSEL9, 9 .EQU GPIOF_INTSSEL_INTSSEL8, 8 .EQU GPIOF_INTSSEL_INTSSEL7, 7 .EQU GPIOF_INTSSEL_INTSSEL6, 6 .EQU GPIOF_INTSSEL_INTSSEL5, 5 .EQU GPIOF_INTSSEL_INTSSEL4, 4 .EQU GPIOF_INTSSEL_INTSSEL3, 3 .EQU GPIOF_INTSSEL_INTSSEL2, 2 .EQU GPIOF_INTSSEL_INTSSEL1, 1 .EQU GPIOF_INTSSEL_INTSSEL0, 0 // register------------------------------------- .EQU GPIOF_INTFLAG, 0x50001150 // 0x5000 1150 GPIOF_INTFLAG Bits------------------------------------- .EQU GPIOF_INTFLAG_INTFLAG15, 15 .EQU GPIOF_INTFLAG_INTFLAG14, 14 .EQU GPIOF_INTFLAG_INTFLAG13, 13 .EQU GPIOF_INTFLAG_INTFLAG12, 12 .EQU GPIOF_INTFLAG_INTFLAG11, 11 .EQU GPIOF_INTFLAG_INTFLAG10, 10 .EQU GPIOF_INTFLAG_INTFLAG9, 9 .EQU GPIOF_INTFLAG_INTFLAG8, 8 .EQU GPIOF_INTFLAG_INTFLAG7, 7 .EQU GPIOF_INTFLAG_INTFLAG6, 6 .EQU GPIOF_INTFLAG_INTFLAG5, 5 .EQU GPIOF_INTFLAG_INTFLAG4, 4 .EQU GPIOF_INTFLAG_INTFLAG3, 3 .EQU GPIOF_INTFLAG_INTFLAG2, 2 .EQU GPIOF_INTFLAG_INTFLAG1, 1 .EQU GPIOF_INTFLAG_INTFLAG0, 0 // register------------------------------------- .EQU IONMI_CTLR, 0x5000117C // 0x5000 117C IONMI_CTLR Bits------------------------------------- .EQU IONMI_CTLR_IONMIIF, 14 .EQU IONMI_CTLR_IONMIIC, 13 .EQU IONMI_CTLR_FLTCKS, 12 .EQU IONMI_CTLR_FLTEN, 11 .EQU IONMI_CTLR_IRQMS2, 10 .EQU IONMI_CTLR_IRQMS1, 9 .EQU IONMI_CTLR_IRQMS0, 8 .EQU IONMI_CTLR_FCKDIV2, 6 .EQU IONMI_CTLR_FCKDIV1, 5 .EQU IONMI_CTLR_FCKDIV0, 4 .EQU IONMI_CTLR_FLTWR2, 3 .EQU IONMI_CTLR_FLTWR1, 2 .EQU IONMI_CTLR_FLTWR0, 1 .EQU IONMI_CTLR_IONMIEN, 0 // register------------------------------------- .EQU GPIOG_INTMASK, 0x50001180 // 0x5000 1180 GPIOG_INTMASK Bits------------------------------------- .EQU GPIOG_INTMASK_INTMASK15, 15 .EQU GPIOG_INTMASK_INTMASK14, 14 .EQU GPIOG_INTMASK_INTMASK13, 13 .EQU GPIOG_INTMASK_INTMASK12, 12 .EQU GPIOG_INTMASK_INTMASK11, 11 .EQU GPIOG_INTMASK_INTMASK10, 10 .EQU GPIOG_INTMASK_INTMASK9, 9 .EQU GPIOG_INTMASK_INTMASK8, 8 .EQU GPIOG_INTMASK_INTMASK7, 7 .EQU GPIOG_INTMASK_INTMASK6, 6 .EQU GPIOG_INTMASK_INTMASK5, 5 .EQU GPIOG_INTMASK_INTMASK4, 4 .EQU GPIOG_INTMASK_INTMASK3, 3 .EQU GPIOG_INTMASK_INTMASK2, 2 .EQU GPIOG_INTMASK_INTMASK1, 1 .EQU GPIOG_INTMASK_INTMASK0, 0 // register------------------------------------- .EQU GPIOG_INTRISE, 0x50001184 // 0x5000 1184 GPIOG_INTRISE Bits------------------------------------- .EQU GPIOG_INTRISE_INTRISE15, 15 .EQU GPIOG_INTRISE_INTRISE14, 14 .EQU GPIOG_INTRISE_INTRISE13, 13 .EQU GPIOG_INTRISE_INTRISE12, 12 .EQU GPIOG_INTRISE_INTRISE11, 11 .EQU GPIOG_INTRISE_INTRISE10, 10 .EQU GPIOG_INTRISE_INTRISE9, 9 .EQU GPIOG_INTRISE_INTRISE8, 8 .EQU GPIOG_INTRISE_INTRISE7, 7 .EQU GPIOG_INTRISE_INTRISE6, 6 .EQU GPIOG_INTRISE_INTRISE5, 5 .EQU GPIOG_INTRISE_INTRISE4, 4 .EQU GPIOG_INTRISE_INTRISE3, 3 .EQU GPIOG_INTRISE_INTRISE2, 2 .EQU GPIOG_INTRISE_INTRISE1, 1 .EQU GPIOG_INTRISE_INTRISE0, 0 // register------------------------------------- .EQU GPIOG_INTFALL, 0x50001188 // 0x5000 1188 GPIOG_INTFALL Bits------------------------------------- .EQU GPIOG_INTFALL_INTFALL15, 15 .EQU GPIOG_INTFALL_INTFALL14, 14 .EQU GPIOG_INTFALL_INTFALL13, 13 .EQU GPIOG_INTFALL_INTFALL12, 12 .EQU GPIOG_INTFALL_INTFALL11, 11 .EQU GPIOG_INTFALL_INTFALL10, 10 .EQU GPIOG_INTFALL_INTFALL9, 9 .EQU GPIOG_INTFALL_INTFALL8, 8 .EQU GPIOG_INTFALL_INTFALL7, 7 .EQU GPIOG_INTFALL_INTFALL6, 6 .EQU GPIOG_INTFALL_INTFALL5, 5 .EQU GPIOG_INTFALL_INTFALL4, 4 .EQU GPIOG_INTFALL_INTFALL3, 3 .EQU GPIOG_INTFALL_INTFALL2, 2 .EQU GPIOG_INTFALL_INTFALL1, 1 .EQU GPIOG_INTFALL_INTFALL0, 0 // register------------------------------------- .EQU GPIOG_INTSSEL, 0x5000118C // 0x5000 118C GPIOG_INTSSEL Bits------------------------------------- .EQU GPIOG_INTSSEL_INTSSEL15, 15 .EQU GPIOG_INTSSEL_INTSSEL14, 14 .EQU GPIOG_INTSSEL_INTSSEL13, 13 .EQU GPIOG_INTSSEL_INTSSEL12, 12 .EQU GPIOG_INTSSEL_INTSSEL11, 11 .EQU GPIOG_INTSSEL_INTSSEL10, 10 .EQU GPIOG_INTSSEL_INTSSEL9, 9 .EQU GPIOG_INTSSEL_INTSSEL8, 8 .EQU GPIOG_INTSSEL_INTSSEL7, 7 .EQU GPIOG_INTSSEL_INTSSEL6, 6 .EQU GPIOG_INTSSEL_INTSSEL5, 5 .EQU GPIOG_INTSSEL_INTSSEL4, 4 .EQU GPIOG_INTSSEL_INTSSEL3, 3 .EQU GPIOG_INTSSEL_INTSSEL2, 2 .EQU GPIOG_INTSSEL_INTSSEL1, 1 .EQU GPIOG_INTSSEL_INTSSEL0, 0 // register------------------------------------- .EQU GPIOG_INTFLAG, 0x50001190 // 0x5000 1190 GPIOG_INTFLAG Bits------------------------------------- .EQU GPIOG_INTFLAG_INTFLAG15, 15 .EQU GPIOG_INTFLAG_INTFLAG14, 14 .EQU GPIOG_INTFLAG_INTFLAG13, 13 .EQU GPIOG_INTFLAG_INTFLAG12, 12 .EQU GPIOG_INTFLAG_INTFLAG11, 11 .EQU GPIOG_INTFLAG_INTFLAG10, 10 .EQU GPIOG_INTFLAG_INTFLAG9, 9 .EQU GPIOG_INTFLAG_INTFLAG8, 8 .EQU GPIOG_INTFLAG_INTFLAG7, 7 .EQU GPIOG_INTFLAG_INTFLAG6, 6 .EQU GPIOG_INTFLAG_INTFLAG5, 5 .EQU GPIOG_INTFLAG_INTFLAG4, 4 .EQU GPIOG_INTFLAG_INTFLAG3, 3 .EQU GPIOG_INTFLAG_INTFLAG2, 2 .EQU GPIOG_INTFLAG_INTFLAG1, 1 .EQU GPIOG_INTFLAG_INTFLAG0, 0 // register------------------------------------- .EQU GPIOH_INTMASK, 0x500011C0 // 0x5000 11C0 GPIOH_INTMASK Bits------------------------------------- .EQU GPIOH_INTMASK_INTMASK15, 15 .EQU GPIOH_INTMASK_INTMASK14, 14 .EQU GPIOH_INTMASK_INTMASK13, 13 .EQU GPIOH_INTMASK_INTMASK12, 12 .EQU GPIOH_INTMASK_INTMASK11, 11 .EQU GPIOH_INTMASK_INTMASK10, 10 .EQU GPIOH_INTMASK_INTMASK9, 9 .EQU GPIOH_INTMASK_INTMASK8, 8 .EQU GPIOH_INTMASK_INTMASK7, 7 .EQU GPIOH_INTMASK_INTMASK6, 6 .EQU GPIOH_INTMASK_INTMASK5, 5 .EQU GPIOH_INTMASK_INTMASK4, 4 .EQU GPIOH_INTMASK_INTMASK3, 3 .EQU GPIOH_INTMASK_INTMASK2, 2 .EQU GPIOH_INTMASK_INTMASK1, 1 .EQU GPIOH_INTMASK_INTMASK0, 0 // register------------------------------------- .EQU GPIOH_INTRISE, 0x500011C4 // 0x5000 11C4 GPIOH_INTRISE Bits------------------------------------- .EQU GPIOH_INTRISE_INTRISE15, 15 .EQU GPIOH_INTRISE_INTRISE14, 14 .EQU GPIOH_INTRISE_INTRISE13, 13 .EQU GPIOH_INTRISE_INTRISE12, 12 .EQU GPIOH_INTRISE_INTRISE11, 11 .EQU GPIOH_INTRISE_INTRISE10, 10 .EQU GPIOH_INTRISE_INTRISE9, 9 .EQU GPIOH_INTRISE_INTRISE8, 8 .EQU GPIOH_INTRISE_INTRISE7, 7 .EQU GPIOH_INTRISE_INTRISE6, 6 .EQU GPIOH_INTRISE_INTRISE5, 5 .EQU GPIOH_INTRISE_INTRISE4, 4 .EQU GPIOH_INTRISE_INTRISE3, 3 .EQU GPIOH_INTRISE_INTRISE2, 2 .EQU GPIOH_INTRISE_INTRISE1, 1 .EQU GPIOH_INTRISE_INTRISE0, 0 // register------------------------------------- .EQU GPIOH_INTFALL, 0x500011C8 // 0x5000 11C8 GPIOH_INTFALL Bits------------------------------------- .EQU GPIOH_INTFALL_INTFALL15, 15 .EQU GPIOH_INTFALL_INTFALL14, 14 .EQU GPIOH_INTFALL_INTFALL13, 13 .EQU GPIOH_INTFALL_INTFALL12, 12 .EQU GPIOH_INTFALL_INTFALL11, 11 .EQU GPIOH_INTFALL_INTFALL10, 10 .EQU GPIOH_INTFALL_INTFALL9, 9 .EQU GPIOH_INTFALL_INTFALL8, 8 .EQU GPIOH_INTFALL_INTFALL7, 7 .EQU GPIOH_INTFALL_INTFALL6, 6 .EQU GPIOH_INTFALL_INTFALL5, 5 .EQU GPIOH_INTFALL_INTFALL4, 4 .EQU GPIOH_INTFALL_INTFALL3, 3 .EQU GPIOH_INTFALL_INTFALL2, 2 .EQU GPIOH_INTFALL_INTFALL1, 1 .EQU GPIOH_INTFALL_INTFALL0, 0 // register------------------------------------- .EQU GPIOH_INTSSEL, 0x500011CC // 0x5000 11CC GPIOH_INTSSEL Bits------------------------------------- .EQU GPIOH_INTSSEL_INTSSEL15, 15 .EQU GPIOH_INTSSEL_INTSSEL14, 14 .EQU GPIOH_INTSSEL_INTSSEL13, 13 .EQU GPIOH_INTSSEL_INTSSEL12, 12 .EQU GPIOH_INTSSEL_INTSSEL11, 11 .EQU GPIOH_INTSSEL_INTSSEL10, 10 .EQU GPIOH_INTSSEL_INTSSEL9, 9 .EQU GPIOH_INTSSEL_INTSSEL8, 8 .EQU GPIOH_INTSSEL_INTSSEL7, 7 .EQU GPIOH_INTSSEL_INTSSEL6, 6 .EQU GPIOH_INTSSEL_INTSSEL5, 5 .EQU GPIOH_INTSSEL_INTSSEL4, 4 .EQU GPIOH_INTSSEL_INTSSEL3, 3 .EQU GPIOH_INTSSEL_INTSSEL2, 2 .EQU GPIOH_INTSSEL_INTSSEL1, 1 .EQU GPIOH_INTSSEL_INTSSEL0, 0 // register------------------------------------- .EQU GPIOH_INTFLAG, 0x500011D0 // 0x5000 11D0 GPIOH_INTFLAG Bits------------------------------------- .EQU GPIOH_INTFLAG_INTFLAG15, 15 .EQU GPIOH_INTFLAG_INTFLAG14, 14 .EQU GPIOH_INTFLAG_INTFLAG13, 13 .EQU GPIOH_INTFLAG_INTFLAG12, 12 .EQU GPIOH_INTFLAG_INTFLAG11, 11 .EQU GPIOH_INTFLAG_INTFLAG10, 10 .EQU GPIOH_INTFLAG_INTFLAG9, 9 .EQU GPIOH_INTFLAG_INTFLAG8, 8 .EQU GPIOH_INTFLAG_INTFLAG7, 7 .EQU GPIOH_INTFLAG_INTFLAG6, 6 .EQU GPIOH_INTFLAG_INTFLAG5, 5 .EQU GPIOH_INTFLAG_INTFLAG4, 4 .EQU GPIOH_INTFLAG_INTFLAG3, 3 .EQU GPIOH_INTFLAG_INTFLAG2, 2 .EQU GPIOH_INTFLAG_INTFLAG1, 1 .EQU GPIOH_INTFLAG_INTFLAG0, 0 // register------------------------------------- .EQU GPIOJ_INTMASK, 0x50001200 // 0x5000 1200 GPIOJ_INTMASK Bits------------------------------------- .EQU GPIOJ_INTMASK_INTMASK15, 15 .EQU GPIOJ_INTMASK_INTMASK14, 14 .EQU GPIOJ_INTMASK_INTMASK13, 13 .EQU GPIOJ_INTMASK_INTMASK12, 12 .EQU GPIOJ_INTMASK_INTMASK11, 11 .EQU GPIOJ_INTMASK_INTMASK10, 10 .EQU GPIOJ_INTMASK_INTMASK9, 9 .EQU GPIOJ_INTMASK_INTMASK8, 8 .EQU GPIOJ_INTMASK_INTMASK7, 7 .EQU GPIOJ_INTMASK_INTMASK6, 6 .EQU GPIOJ_INTMASK_INTMASK5, 5 .EQU GPIOJ_INTMASK_INTMASK4, 4 .EQU GPIOJ_INTMASK_INTMASK3, 3 .EQU GPIOJ_INTMASK_INTMASK2, 2 .EQU GPIOJ_INTMASK_INTMASK1, 1 .EQU GPIOJ_INTMASK_INTMASK0, 0 // register------------------------------------- .EQU GPIOJ_INTRISE, 0x50001204 // 0x5000 1204 GPIOJ_INTRISE Bits------------------------------------- .EQU GPIOJ_INTRISE_INTRISE15, 15 .EQU GPIOJ_INTRISE_INTRISE14, 14 .EQU GPIOJ_INTRISE_INTRISE13, 13 .EQU GPIOJ_INTRISE_INTRISE12, 12 .EQU GPIOJ_INTRISE_INTRISE11, 11 .EQU GPIOJ_INTRISE_INTRISE10, 10 .EQU GPIOJ_INTRISE_INTRISE9, 9 .EQU GPIOJ_INTRISE_INTRISE8, 8 .EQU GPIOJ_INTRISE_INTRISE7, 7 .EQU GPIOJ_INTRISE_INTRISE6, 6 .EQU GPIOJ_INTRISE_INTRISE5, 5 .EQU GPIOJ_INTRISE_INTRISE4, 4 .EQU GPIOJ_INTRISE_INTRISE3, 3 .EQU GPIOJ_INTRISE_INTRISE2, 2 .EQU GPIOJ_INTRISE_INTRISE1, 1 .EQU GPIOJ_INTRISE_INTRISE0, 0 // register------------------------------------- .EQU GPIOJ_INTFALL, 0x50001208 // 0x5000 1208 GPIOJ_INTFALL Bits------------------------------------- .EQU GPIOJ_INTFALL_INTFALL15, 15 .EQU GPIOJ_INTFALL_INTFALL14, 14 .EQU GPIOJ_INTFALL_INTFALL13, 13 .EQU GPIOJ_INTFALL_INTFALL12, 12 .EQU GPIOJ_INTFALL_INTFALL11, 11 .EQU GPIOJ_INTFALL_INTFALL10, 10 .EQU GPIOJ_INTFALL_INTFALL9, 9 .EQU GPIOJ_INTFALL_INTFALL8, 8 .EQU GPIOJ_INTFALL_INTFALL7, 7 .EQU GPIOJ_INTFALL_INTFALL6, 6 .EQU GPIOJ_INTFALL_INTFALL5, 5 .EQU GPIOJ_INTFALL_INTFALL4, 4 .EQU GPIOJ_INTFALL_INTFALL3, 3 .EQU GPIOJ_INTFALL_INTFALL2, 2 .EQU GPIOJ_INTFALL_INTFALL1, 1 .EQU GPIOJ_INTFALL_INTFALL0, 0 // register------------------------------------- .EQU GPIOJ_INTSSEL, 0x5000120C // 0x5000 120C GPIOJ_INTSSEL Bits------------------------------------- .EQU GPIOJ_INTSSEL_INTSSEL15, 15 .EQU GPIOJ_INTSSEL_INTSSEL14, 14 .EQU GPIOJ_INTSSEL_INTSSEL13, 13 .EQU GPIOJ_INTSSEL_INTSSEL12, 12 .EQU GPIOJ_INTSSEL_INTSSEL11, 11 .EQU GPIOJ_INTSSEL_INTSSEL10, 10 .EQU GPIOJ_INTSSEL_INTSSEL9, 9 .EQU GPIOJ_INTSSEL_INTSSEL8, 8 .EQU GPIOJ_INTSSEL_INTSSEL7, 7 .EQU GPIOJ_INTSSEL_INTSSEL6, 6 .EQU GPIOJ_INTSSEL_INTSSEL5, 5 .EQU GPIOJ_INTSSEL_INTSSEL4, 4 .EQU GPIOJ_INTSSEL_INTSSEL3, 3 .EQU GPIOJ_INTSSEL_INTSSEL2, 2 .EQU GPIOJ_INTSSEL_INTSSEL1, 1 .EQU GPIOJ_INTSSEL_INTSSEL0, 0 // register------------------------------------- .EQU GPIOJ_INTFLAG, 0x50001210 // 0x5000 1210 GPIOJ_INTFLAG Bits------------------------------------- .EQU GPIOJ_INTFLAG_INTFLAG15, 15 .EQU GPIOJ_INTFLAG_INTFLAG14, 14 .EQU GPIOJ_INTFLAG_INTFLAG13, 13 .EQU GPIOJ_INTFLAG_INTFLAG12, 12 .EQU GPIOJ_INTFLAG_INTFLAG11, 11 .EQU GPIOJ_INTFLAG_INTFLAG10, 10 .EQU GPIOJ_INTFLAG_INTFLAG9, 9 .EQU GPIOJ_INTFLAG_INTFLAG8, 8 .EQU GPIOJ_INTFLAG_INTFLAG7, 7 .EQU GPIOJ_INTFLAG_INTFLAG6, 6 .EQU GPIOJ_INTFLAG_INTFLAG5, 5 .EQU GPIOJ_INTFLAG_INTFLAG4, 4 .EQU GPIOJ_INTFLAG_INTFLAG3, 3 .EQU GPIOJ_INTFLAG_INTFLAG2, 2 .EQU GPIOJ_INTFLAG_INTFLAG1, 1 .EQU GPIOJ_INTFLAG_INTFLAG0, 0 // register------------------------------------- .EQU GPIOK_INTMASK, 0x50001240 // 0x5000 1240 GPIOK_INTMASK Bits------------------------------------- .EQU GPIOK_INTMASK_INTMASK15, 15 .EQU GPIOK_INTMASK_INTMASK14, 14 .EQU GPIOK_INTMASK_INTMASK13, 13 .EQU GPIOK_INTMASK_INTMASK12, 12 .EQU GPIOK_INTMASK_INTMASK11, 11 .EQU GPIOK_INTMASK_INTMASK10, 10 .EQU GPIOK_INTMASK_INTMASK9, 9 .EQU GPIOK_INTMASK_INTMASK8, 8 .EQU GPIOK_INTMASK_INTMASK7, 7 .EQU GPIOK_INTMASK_INTMASK6, 6 .EQU GPIOK_INTMASK_INTMASK5, 5 .EQU GPIOK_INTMASK_INTMASK4, 4 .EQU GPIOK_INTMASK_INTMASK3, 3 .EQU GPIOK_INTMASK_INTMASK2, 2 .EQU GPIOK_INTMASK_INTMASK1, 1 .EQU GPIOK_INTMASK_INTMASK0, 0 // register------------------------------------- .EQU GPIOK_INTRISE, 0x50001244 // 0x5000 1244 GPIOK_INTRISE Bits------------------------------------- .EQU GPIOK_INTRISE_INTRISE15, 15 .EQU GPIOK_INTRISE_INTRISE14, 14 .EQU GPIOK_INTRISE_INTRISE13, 13 .EQU GPIOK_INTRISE_INTRISE12, 12 .EQU GPIOK_INTRISE_INTRISE11, 11 .EQU GPIOK_INTRISE_INTRISE10, 10 .EQU GPIOK_INTRISE_INTRISE9, 9 .EQU GPIOK_INTRISE_INTRISE8, 8 .EQU GPIOK_INTRISE_INTRISE7, 7 .EQU GPIOK_INTRISE_INTRISE6, 6 .EQU GPIOK_INTRISE_INTRISE5, 5 .EQU GPIOK_INTRISE_INTRISE4, 4 .EQU GPIOK_INTRISE_INTRISE3, 3 .EQU GPIOK_INTRISE_INTRISE2, 2 .EQU GPIOK_INTRISE_INTRISE1, 1 .EQU GPIOK_INTRISE_INTRISE0, 0 // register------------------------------------- .EQU GPIOK_INTFALL, 0x50001248 // 0x5000 1248 GPIOK_INTFALL Bits------------------------------------- .EQU GPIOK_INTFALL_INTFALL15, 15 .EQU GPIOK_INTFALL_INTFALL14, 14 .EQU GPIOK_INTFALL_INTFALL13, 13 .EQU GPIOK_INTFALL_INTFALL12, 12 .EQU GPIOK_INTFALL_INTFALL11, 11 .EQU GPIOK_INTFALL_INTFALL10, 10 .EQU GPIOK_INTFALL_INTFALL9, 9 .EQU GPIOK_INTFALL_INTFALL8, 8 .EQU GPIOK_INTFALL_INTFALL7, 7 .EQU GPIOK_INTFALL_INTFALL6, 6 .EQU GPIOK_INTFALL_INTFALL5, 5 .EQU GPIOK_INTFALL_INTFALL4, 4 .EQU GPIOK_INTFALL_INTFALL3, 3 .EQU GPIOK_INTFALL_INTFALL2, 2 .EQU GPIOK_INTFALL_INTFALL1, 1 .EQU GPIOK_INTFALL_INTFALL0, 0 // register------------------------------------- .EQU GPIOK_INTSSEL, 0x5000124C // 0x5000 124C GPIOK_INTSSEL Bits------------------------------------- .EQU GPIOK_INTSSEL_INTSSEL15, 15 .EQU GPIOK_INTSSEL_INTSSEL14, 14 .EQU GPIOK_INTSSEL_INTSSEL13, 13 .EQU GPIOK_INTSSEL_INTSSEL12, 12 .EQU GPIOK_INTSSEL_INTSSEL11, 11 .EQU GPIOK_INTSSEL_INTSSEL10, 10 .EQU GPIOK_INTSSEL_INTSSEL9, 9 .EQU GPIOK_INTSSEL_INTSSEL8, 8 .EQU GPIOK_INTSSEL_INTSSEL7, 7 .EQU GPIOK_INTSSEL_INTSSEL6, 6 .EQU GPIOK_INTSSEL_INTSSEL5, 5 .EQU GPIOK_INTSSEL_INTSSEL4, 4 .EQU GPIOK_INTSSEL_INTSSEL3, 3 .EQU GPIOK_INTSSEL_INTSSEL2, 2 .EQU GPIOK_INTSSEL_INTSSEL1, 1 .EQU GPIOK_INTSSEL_INTSSEL0, 0 // register------------------------------------- .EQU GPIOK_INTFLAG, 0x50001250 // 0x5000 1250 GPIOK_INTFLAG Bits------------------------------------- .EQU GPIOK_INTFLAG_INTFLAG15, 15 .EQU GPIOK_INTFLAG_INTFLAG14, 14 .EQU GPIOK_INTFLAG_INTFLAG13, 13 .EQU GPIOK_INTFLAG_INTFLAG12, 12 .EQU GPIOK_INTFLAG_INTFLAG11, 11 .EQU GPIOK_INTFLAG_INTFLAG10, 10 .EQU GPIOK_INTFLAG_INTFLAG9, 9 .EQU GPIOK_INTFLAG_INTFLAG8, 8 .EQU GPIOK_INTFLAG_INTFLAG7, 7 .EQU GPIOK_INTFLAG_INTFLAG6, 6 .EQU GPIOK_INTFLAG_INTFLAG5, 5 .EQU GPIOK_INTFLAG_INTFLAG4, 4 .EQU GPIOK_INTFLAG_INTFLAG3, 3 .EQU GPIOK_INTFLAG_INTFLAG2, 2 .EQU GPIOK_INTFLAG_INTFLAG1, 1 .EQU GPIOK_INTFLAG_INTFLAG0, 0